authorgravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-01-17 05:21:10+01:00
committergravatar for alex@alexrp.comAlex Rønne Petersen <alex@alexrp.com> 2026-04-25 21:49:39+02:00
log520af6966041b891442ab34ac13b0f6861a09fc0
treeb0b05df2b2bab08eaa841b372985ba8545ec533e
parent11807110357b6434e4ee2ae8b3b6948ea45caccb
signaturebadge-check Signed by SSH key SHA256:7B/LJ7bpR1eX8aCXSr4mtd5M45VMPKcx9zY8e95b5QM

zig cc: update intrinsic headers to LLVM 22

94 files changed, 11869 insertions(+), 12978 deletions(-)

lib/include/__clang_spirv_builtins.h+12-12
...@@ -52,30 +52,30 @@...@@ -52,30 +52,30 @@
52// Builtin IDs and sizes52// Builtin IDs and sizes
5353
54extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_num_workgroups) __size_t54extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_num_workgroups) __size_t
55 __spirv_NumWorkgroups(int);55 __spirv_BuiltInNumWorkgroups(int);
56extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_workgroup_size) __size_t56extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_workgroup_size) __size_t
57 __spirv_WorkgroupSize(int);57 __spirv_BuiltInWorkgroupSize(int);
58extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_workgroup_id) __size_t58extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_workgroup_id) __size_t
59 __spirv_WorkgroupId(int);59 __spirv_BuiltInWorkgroupId(int);
60extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_local_invocation_id) __size_t60extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_local_invocation_id) __size_t
61 __spirv_LocalInvocationId(int);61 __spirv_BuiltInLocalInvocationId(int);
62extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_invocation_id) __size_t62extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_invocation_id) __size_t
63 __spirv_GlobalInvocationId(int);63 __spirv_BuiltInGlobalInvocationId(int);
6464
65extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_size) __size_t65extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_size) __size_t
66 __spirv_GlobalSize(int);66 __spirv_BuiltInGlobalSize(int);
67extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_offset) __size_t67extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_offset) __size_t
68 __spirv_GlobalOffset(int);68 __spirv_BuiltInGlobalOffset(int);
69extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_size) __uint32_t69extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_size) __uint32_t
70 __spirv_SubgroupSize();70 __spirv_BuiltInSubgroupSize();
71extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_max_size) __uint32_t71extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_max_size) __uint32_t
72 __spirv_SubgroupMaxSize();72 __spirv_BuiltInSubgroupMaxSize();
73extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_num_subgroups) __uint32_t73extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_num_subgroups) __uint32_t
74 __spirv_NumSubgroups();74 __spirv_BuiltInNumSubgroups();
75extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_id) __uint32_t75extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_id) __uint32_t
76 __spirv_SubgroupId();76 __spirv_BuiltInSubgroupId();
77extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_local_invocation_id)77extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_local_invocation_id)
78 __uint32_t __spirv_SubgroupLocalInvocationId();78 __uint32_t __spirv_BuiltInSubgroupLocalInvocationId();
7979
80// OpGenericCastToPtrExplicit80// OpGenericCastToPtrExplicit
8181
lib/include/__float_float.h created+176
...@@ -0,0 +1,176 @@
1/*===---- __float_float.h --------------------------------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __CLANG_FLOAT_FLOAT_H
11#define __CLANG_FLOAT_FLOAT_H
12
13#if (defined(__MINGW32__) || defined(_MSC_VER) || defined(_AIX)) && \
14 __STDC_HOSTED__
15
16/* Undefine anything that we'll be redefining below. */
17# undef FLT_EVAL_METHOD
18# undef FLT_ROUNDS
19# undef FLT_RADIX
20# undef FLT_MANT_DIG
21# undef DBL_MANT_DIG
22# undef LDBL_MANT_DIG
23#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \
24 !defined(__STRICT_ANSI__) || \
25 (defined(__cplusplus) && __cplusplus >= 201103L) || \
26 (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE))
27# undef DECIMAL_DIG
28# endif
29# undef FLT_DIG
30# undef DBL_DIG
31# undef LDBL_DIG
32# undef FLT_MIN_EXP
33# undef DBL_MIN_EXP
34# undef LDBL_MIN_EXP
35# undef FLT_MIN_10_EXP
36# undef DBL_MIN_10_EXP
37# undef LDBL_MIN_10_EXP
38# undef FLT_MAX_EXP
39# undef DBL_MAX_EXP
40# undef LDBL_MAX_EXP
41# undef FLT_MAX_10_EXP
42# undef DBL_MAX_10_EXP
43# undef LDBL_MAX_10_EXP
44# undef FLT_MAX
45# undef DBL_MAX
46# undef LDBL_MAX
47# undef FLT_EPSILON
48# undef DBL_EPSILON
49# undef LDBL_EPSILON
50# undef FLT_MIN
51# undef DBL_MIN
52# undef LDBL_MIN
53#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \
54 !defined(__STRICT_ANSI__) || \
55 (defined(__cplusplus) && __cplusplus >= 201703L) || \
56 (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE))
57# undef FLT_TRUE_MIN
58# undef DBL_TRUE_MIN
59# undef LDBL_TRUE_MIN
60# undef FLT_DECIMAL_DIG
61# undef DBL_DECIMAL_DIG
62# undef LDBL_DECIMAL_DIG
63# undef FLT_HAS_SUBNORM
64# undef DBL_HAS_SUBNORM
65# undef LDBL_HAS_SUBNORM
66# endif
67#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \
68 !defined(__STRICT_ANSI__)
69# undef FLT_NORM_MAX
70# undef DBL_NORM_MAX
71# undef LDBL_NORM_MAX
72#endif
73#endif
74
75#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \
76 !defined(__STRICT_ANSI__)
77# undef FLT_SNAN
78# undef DBL_SNAN
79# undef LDBL_SNAN
80#endif
81
82/* Characteristics of floating point types, C99 5.2.4.2.2 */
83
84#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \
85 (defined(__cplusplus) && __cplusplus >= 201103L)
86#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
87#endif
88#define FLT_ROUNDS (__builtin_flt_rounds())
89#define FLT_RADIX __FLT_RADIX__
90
91#define FLT_MANT_DIG __FLT_MANT_DIG__
92#define DBL_MANT_DIG __DBL_MANT_DIG__
93#define LDBL_MANT_DIG __LDBL_MANT_DIG__
94
95#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \
96 !defined(__STRICT_ANSI__) || \
97 (defined(__cplusplus) && __cplusplus >= 201103L) || \
98 (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE))
99# define DECIMAL_DIG __DECIMAL_DIG__
100#endif
101
102#define FLT_DIG __FLT_DIG__
103#define DBL_DIG __DBL_DIG__
104#define LDBL_DIG __LDBL_DIG__
105
106#define FLT_MIN_EXP __FLT_MIN_EXP__
107#define DBL_MIN_EXP __DBL_MIN_EXP__
108#define LDBL_MIN_EXP __LDBL_MIN_EXP__
109
110#define FLT_MIN_10_EXP __FLT_MIN_10_EXP__
111#define DBL_MIN_10_EXP __DBL_MIN_10_EXP__
112#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__
113
114#define FLT_MAX_EXP __FLT_MAX_EXP__
115#define DBL_MAX_EXP __DBL_MAX_EXP__
116#define LDBL_MAX_EXP __LDBL_MAX_EXP__
117
118#define FLT_MAX_10_EXP __FLT_MAX_10_EXP__
119#define DBL_MAX_10_EXP __DBL_MAX_10_EXP__
120#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__
121
122#define FLT_MAX __FLT_MAX__
123#define DBL_MAX __DBL_MAX__
124#define LDBL_MAX __LDBL_MAX__
125
126#define FLT_EPSILON __FLT_EPSILON__
127#define DBL_EPSILON __DBL_EPSILON__
128#define LDBL_EPSILON __LDBL_EPSILON__
129
130#define FLT_MIN __FLT_MIN__
131#define DBL_MIN __DBL_MIN__
132#define LDBL_MIN __LDBL_MIN__
133
134#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \
135 !defined(__STRICT_ANSI__) || \
136 (defined(__cplusplus) && __cplusplus >= 201703L) || \
137 (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE))
138# define FLT_TRUE_MIN __FLT_DENORM_MIN__
139# define DBL_TRUE_MIN __DBL_DENORM_MIN__
140# define LDBL_TRUE_MIN __LDBL_DENORM_MIN__
141# define FLT_DECIMAL_DIG __FLT_DECIMAL_DIG__
142# define DBL_DECIMAL_DIG __DBL_DECIMAL_DIG__
143# define LDBL_DECIMAL_DIG __LDBL_DECIMAL_DIG__
144# define FLT_HAS_SUBNORM __FLT_HAS_DENORM__
145# define DBL_HAS_SUBNORM __DBL_HAS_DENORM__
146# define LDBL_HAS_SUBNORM __LDBL_HAS_DENORM__
147#endif
148
149#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \
150 !defined(__STRICT_ANSI__)
151 /* C23 5.2.5.3.2p28 */
152# define FLT_SNAN (__builtin_nansf(""))
153# define DBL_SNAN (__builtin_nans(""))
154# define LDBL_SNAN (__builtin_nansl(""))
155
156 /* C23 5.2.5.3.3p32 */
157# define FLT_NORM_MAX __FLT_NORM_MAX__
158# define DBL_NORM_MAX __DBL_NORM_MAX__
159# define LDBL_NORM_MAX __LDBL_NORM_MAX__
160#endif
161
162#ifdef __STDC_WANT_IEC_60559_TYPES_EXT__
163# define FLT16_MANT_DIG __FLT16_MANT_DIG__
164# define FLT16_DECIMAL_DIG __FLT16_DECIMAL_DIG__
165# define FLT16_DIG __FLT16_DIG__
166# define FLT16_MIN_EXP __FLT16_MIN_EXP__
167# define FLT16_MIN_10_EXP __FLT16_MIN_10_EXP__
168# define FLT16_MAX_EXP __FLT16_MAX_EXP__
169# define FLT16_MAX_10_EXP __FLT16_MAX_10_EXP__
170# define FLT16_MAX __FLT16_MAX__
171# define FLT16_EPSILON __FLT16_EPSILON__
172# define FLT16_MIN __FLT16_MIN__
173# define FLT16_TRUE_MIN __FLT16_TRUE_MIN__
174#endif /* __STDC_WANT_IEC_60559_TYPES_EXT__ */
175
176#endif /* __CLANG_FLOAT_FLOAT_H */
lib/include/__float_header_macro.h created+12
...@@ -0,0 +1,12 @@
1/*===---- __float_header_macro.h -------------------------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __CLANG_FLOAT_H
11#define __CLANG_FLOAT_H
12#endif /* __CLANG_FLOAT_H */
lib/include/__float_infinity_nan.h created+20
...@@ -0,0 +1,20 @@
1/*===---- __float_infinity_nan.h -------------------------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __CLANG_FLOAT_INFINITY_NAN_H
11#define __CLANG_FLOAT_INFINITY_NAN_H
12
13/* C23 5.2.5.3.3p29-30 */
14#undef INFINITY
15#undef NAN
16
17#define INFINITY (__builtin_inff())
18#define NAN (__builtin_nanf(""))
19
20#endif /* __CLANG_FLOAT_INFINITY_NAN_H */
lib/include/amo.h created+131
...@@ -0,0 +1,131 @@
1/*===---- amo.h - PowerPC Atomic Memory Operations ------------------------===*\
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7\*===----------------------------------------------------------------------===*/
8
9/* This header provides compatibility for GCC's AMO functions.
10 * The functions here call Clang's underlying AMO builtins.
11 */
12
13#ifndef _AMO_H
14#define _AMO_H
15
16#include <stdint.h>
17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22/* AMO Load Operation Codes (FC values) */
23enum {
24 _AMO_LD_ADD = 0x00, /* Fetch and Add */
25 _AMO_LD_XOR = 0x01, /* Fetch and XOR */
26 _AMO_LD_IOR = 0x02, /* Fetch and OR */
27 _AMO_LD_AND = 0x03, /* Fetch and AND */
28 _AMO_LD_UMAX = 0x04, /* Fetch and Maximum Unsigned */
29 _AMO_LD_SMAX = 0x05, /* Fetch and Maximum Signed */
30 _AMO_LD_UMIN = 0x06, /* Fetch and Minimum Unsigned */
31 _AMO_LD_SMIN = 0x07, /* Fetch and Minimum Signed */
32 _AMO_LD_SWAP = 0x08 /* Swap */
33};
34
35/* 32-bit unsigned AMO load operations */
36static inline uint32_t amo_lwat_add(uint32_t *ptr, uint32_t val) {
37 return __builtin_amo_lwat(ptr, val, _AMO_LD_ADD);
38}
39
40static inline uint32_t amo_lwat_xor(uint32_t *ptr, uint32_t val) {
41 return __builtin_amo_lwat(ptr, val, _AMO_LD_XOR);
42}
43
44static inline uint32_t amo_lwat_ior(uint32_t *ptr, uint32_t val) {
45 return __builtin_amo_lwat(ptr, val, _AMO_LD_IOR);
46}
47
48static inline uint32_t amo_lwat_and(uint32_t *ptr, uint32_t val) {
49 return __builtin_amo_lwat(ptr, val, _AMO_LD_AND);
50}
51
52static inline uint32_t amo_lwat_umax(uint32_t *ptr, uint32_t val) {
53 return __builtin_amo_lwat(ptr, val, _AMO_LD_UMAX);
54}
55
56static inline uint32_t amo_lwat_umin(uint32_t *ptr, uint32_t val) {
57 return __builtin_amo_lwat(ptr, val, _AMO_LD_UMIN);
58}
59
60static inline uint32_t amo_lwat_swap(uint32_t *ptr, uint32_t val) {
61 return __builtin_amo_lwat(ptr, val, _AMO_LD_SWAP);
62}
63
64/* 32-bit signed AMO load operations */
65static inline int32_t amo_lwat_sadd(int32_t *ptr, int32_t val) {
66 return __builtin_amo_lwat_s(ptr, val, _AMO_LD_ADD);
67}
68
69static inline int32_t amo_lwat_smax(int32_t *ptr, int32_t val) {
70 return __builtin_amo_lwat_s(ptr, val, _AMO_LD_SMAX);
71}
72
73static inline int32_t amo_lwat_smin(int32_t *ptr, int32_t val) {
74 return __builtin_amo_lwat_s(ptr, val, _AMO_LD_SMIN);
75}
76
77static inline int32_t amo_lwat_sswap(int32_t *ptr, int32_t val) {
78 return __builtin_amo_lwat_s(ptr, val, _AMO_LD_SWAP);
79}
80
81/* 64-bit unsigned AMO load operations */
82static inline uint64_t amo_ldat_add(uint64_t *ptr, uint64_t val) {
83 return __builtin_amo_ldat(ptr, val, _AMO_LD_ADD);
84}
85
86static inline uint64_t amo_ldat_xor(uint64_t *ptr, uint64_t val) {
87 return __builtin_amo_ldat(ptr, val, _AMO_LD_XOR);
88}
89
90static inline uint64_t amo_ldat_ior(uint64_t *ptr, uint64_t val) {
91 return __builtin_amo_ldat(ptr, val, _AMO_LD_IOR);
92}
93
94static inline uint64_t amo_ldat_and(uint64_t *ptr, uint64_t val) {
95 return __builtin_amo_ldat(ptr, val, _AMO_LD_AND);
96}
97
98static inline uint64_t amo_ldat_umax(uint64_t *ptr, uint64_t val) {
99 return __builtin_amo_ldat(ptr, val, _AMO_LD_UMAX);
100}
101
102static inline uint64_t amo_ldat_umin(uint64_t *ptr, uint64_t val) {
103 return __builtin_amo_ldat(ptr, val, _AMO_LD_UMIN);
104}
105
106static inline uint64_t amo_ldat_swap(uint64_t *ptr, uint64_t val) {
107 return __builtin_amo_ldat(ptr, val, _AMO_LD_SWAP);
108}
109
110/* 64-bit signed AMO load operations */
111static inline int64_t amo_ldat_sadd(int64_t *ptr, int64_t val) {
112 return __builtin_amo_ldat_s(ptr, val, _AMO_LD_ADD);
113}
114
115static inline int64_t amo_ldat_smax(int64_t *ptr, int64_t val) {
116 return __builtin_amo_ldat_s(ptr, val, _AMO_LD_SMAX);
117}
118
119static inline int64_t amo_ldat_smin(int64_t *ptr, int64_t val) {
120 return __builtin_amo_ldat_s(ptr, val, _AMO_LD_SMIN);
121}
122
123static inline int64_t amo_ldat_sswap(int64_t *ptr, int64_t val) {
124 return __builtin_amo_ldat_s(ptr, val, _AMO_LD_SWAP);
125}
126
127#ifdef __cplusplus
128}
129#endif
130
131#endif /* _AMO_H */
lib/include/amxavx512intrin.h+215-1
...@@ -16,7 +16,7 @@...@@ -16,7 +16,7 @@
1616
17#define __DEFAULT_FN_ATTRS_AVX512 \17#define __DEFAULT_FN_ATTRS_AVX512 \
18 __attribute__((__always_inline__, __nodebug__, \18 __attribute__((__always_inline__, __nodebug__, \
19 __target__("amx-avx512,avx10.2-512")))19 __target__("amx-avx512,avx10.2"), __min_vector_width__(512)))
2020
21/// Moves a row from a tile register to a zmm destination register, converting21/// Moves a row from a tile register to a zmm destination register, converting
22/// the int32 source elements to fp32. The row of the tile is selected by a22/// the int32 source elements to fp32. The row of the tile is selected by a
...@@ -52,6 +52,40 @@...@@ -52,6 +52,40 @@
52/// The row of the source tile52/// The row of the source tile
53#define _tile_cvtrowd2ps(tsrc, row) __builtin_ia32_tcvtrowd2ps(tsrc, row)53#define _tile_cvtrowd2ps(tsrc, row) __builtin_ia32_tcvtrowd2ps(tsrc, row)
5454
55/// Moves a row from a tile register to a zmm destination register, converting
56/// the int32 source elements to fp32. The row of the tile is selected by a
57/// 8b immediate value.
58///
59/// \headerfile <x86intrin.h>
60///
61/// \code
62/// __m512i _tile_cvtrowd2psi(__tile tsrc, const unsigned int imm8);
63/// \endcode
64///
65/// \code{.operation}
66/// VL := 512
67/// VL_bytes := VL >> 3
68/// row_index := imm8 & 0x3f
69/// row_chunk := (imm8 >> 6) * VL_bytes
70/// FOR i := 0 TO (VL_bytes / 4) - 1
71/// IF i + row_chunk / 4 >= tsrc.colsb / 4
72/// dst.dword[i] := 0
73/// ELSE
74/// dst.f32[i] := CONVERT_INT32_TO_FP32(tsrc.row[row_index].dword[row_chunk/4+i], RNE)
75/// FI
76/// ENDFOR
77/// dst[MAX_VL-1:VL] := 0
78/// zero_tileconfig_start()
79/// \endcode
80///
81/// This intrinsic corresponds to the \c TCVTROWD2PS instruction.
82///
83/// \param tsrc
84/// The source tile. Max size is 1024 Bytes.
85/// \param imm8
86/// The row of the source tile
87#define _tile_cvtrowd2psi(tsrc, imm8) __builtin_ia32_tcvtrowd2psi(tsrc, imm8)
88
55/// Moves a row from a tile register to a zmm destination register, converting89/// Moves a row from a tile register to a zmm destination register, converting
56/// the fp32 source elements to bf16. It places the resulting bf16 elements90/// the fp32 source elements to bf16. It places the resulting bf16 elements
57/// in the high 16 bits within each dword. The row of the tile is selected91/// in the high 16 bits within each dword. The row of the tile is selected
...@@ -89,6 +123,43 @@...@@ -89,6 +123,43 @@
89#define _tile_cvtrowps2bf16h(tsrc, row) \123#define _tile_cvtrowps2bf16h(tsrc, row) \
90 __builtin_ia32_tcvtrowps2bf16h(tsrc, row)124 __builtin_ia32_tcvtrowps2bf16h(tsrc, row)
91125
126/// Moves a row from a tile register to a zmm destination register, converting
127/// the fp32 source elements to bf16. It places the resulting bf16 elements
128/// in the high 16 bits within each dword. The row of the tile is selected
129/// by a 8b immediate value.
130///
131/// \headerfile <x86intrin.h>
132///
133/// \code
134/// __m512i _tile_cvtrowps2bf16hi(__tile tsrc, const unsigned int imm8);
135/// \endcode
136///
137/// \code{.operation}
138/// VL := 512
139/// VL_bytes := VL >> 3
140/// row_index := imm8 & 0x3f
141/// row_chunk := (imm8 >> 6) * VL_bytes
142/// FOR i := 0 TO (VL_bytes / 4) - 1
143/// IF i + row_chunk / 4 >= tsrc.colsb / 4
144/// dst.dword[i] := 0
145/// ELSE
146/// dst.word[2*i+0] := 0
147/// dst.bf16[2*i+1] := CONVERT_FP32_TO_BF16(tsrc.row[row_index].fp32[row_chunk/4+i], RNE)
148/// FI
149/// ENDFOR
150/// dst[MAX_VL-1:VL] := 0
151/// zero_tileconfig_start()
152/// \endcode
153///
154/// This intrinsic corresponds to the \c TCVTROWPS2BF16H instruction.
155///
156/// \param tsrc
157/// The source tile. Max size is 1024 Bytes.
158/// \param imm8
159/// The the row of the source tile.
160#define _tile_cvtrowps2bf16hi(tsrc, imm8) \
161 __builtin_ia32_tcvtrowps2bf16hi(tsrc, imm8)
162
92/// Moves a row from a tile register to a zmm destination register, converting163/// Moves a row from a tile register to a zmm destination register, converting
93/// the fp32 source elements to bf16. It places the resulting bf16 elements164/// the fp32 source elements to bf16. It places the resulting bf16 elements
94/// in the low 16 bits within each dword. The row of the tile is selected165/// in the low 16 bits within each dword. The row of the tile is selected
...@@ -126,6 +197,43 @@...@@ -126,6 +197,43 @@
126#define _tile_cvtrowps2bf16l(tsrc, row) \197#define _tile_cvtrowps2bf16l(tsrc, row) \
127 __builtin_ia32_tcvtrowps2bf16l(tsrc, row)198 __builtin_ia32_tcvtrowps2bf16l(tsrc, row)
128199
200/// Moves a row from a tile register to a zmm destination register, converting
201/// the fp32 source elements to bf16. It places the resulting bf16 elements
202/// in the low 16 bits within each dword. The row of the tile is selected
203/// by a 8b immediate value.
204///
205/// \headerfile <x86intrin.h>
206///
207/// \code
208/// __m512i _tile_cvtrowps2bf16li(__tile tsrc, const unsigned int imm8);
209/// \endcode
210///
211/// \code{.operation}
212/// VL := 512
213/// VL_bytes := VL >> 3
214/// row_index := imm8 & 0x3f
215/// row_chunk := (imm8 >> 6) * VL_bytes
216/// FOR i := 0 TO (VL_bytes / 4) - 1
217/// IF i + row_chunk / 4 >= tsrc.colsb / 4
218/// dst.dword[i] := 0
219/// ELSE
220/// dst.word[2*i+1] := 0
221/// dst.bf16[2*i+0] := CONVERT_FP32_TO_BF16(tsrc.row[row_index].fp32[row_chunk/4+i], RNE)
222/// FI
223/// ENDFOR
224/// dst[MAX_VL-1:VL] := 0
225/// zero_tileconfig_start()
226/// \endcode
227///
228/// This intrinsic corresponds to the \c TCVTROWPS2BF16L instruction.
229///
230/// \param tsrc
231/// The source tile. Max size is 1024 Bytes.
232/// \param imm8
233/// The the row of the source tile.
234#define _tile_cvtrowps2bf16li(tsrc, imm8) \
235 __builtin_ia32_tcvtrowps2bf16li(tsrc, imm8)
236
129/// Moves a row from a tile register to a zmm destination register, converting237/// Moves a row from a tile register to a zmm destination register, converting
130/// the fp32 source elements to fp16. It places the resulting fp16 elements238/// the fp32 source elements to fp16. It places the resulting fp16 elements
131/// in the high 16 bits within each dword. The row of the tile is selected239/// in the high 16 bits within each dword. The row of the tile is selected
...@@ -162,6 +270,43 @@...@@ -162,6 +270,43 @@
162/// The the row of the source tile.270/// The the row of the source tile.
163#define _tile_cvtrowps2phh(tsrc, row) __builtin_ia32_tcvtrowps2phh(tsrc, row)271#define _tile_cvtrowps2phh(tsrc, row) __builtin_ia32_tcvtrowps2phh(tsrc, row)
164272
273/// Moves a row from a tile register to a zmm destination register, converting
274/// the fp32 source elements to fp16. It places the resulting fp16 elements
275/// in the high 16 bits within each dword. The row of the tile is selected
276/// by a 8b immediate value.
277///
278/// \headerfile <x86intrin.h>
279///
280/// \code
281/// __m512i _tile_cvtrowps2phhi(__tile tsrc, constunsigned int imm8);
282/// \endcode
283///
284/// \code{.operation}
285/// VL := 512
286/// VL_bytes := VL >> 3
287/// row_index := imm8 & 0x3f
288/// row_chunk := (imm8 >> 6) * VL_bytes
289/// FOR i := 0 TO (VL_bytes / 4) - 1
290/// IF i + row_chunk / 4 >= tsrc.colsb / 4
291/// dst.dword[i] := 0
292/// ELSE
293/// dst.word[2*i+0] := 0
294/// dst.fp16[2*i+1] := CONVERT_FP32_TO_FP16(tsrc.row[row_index].fp32[row_chunk/4+i], RNE)
295/// FI
296/// ENDFOR
297/// dst[MAX_VL-1:VL] := 0
298/// zero_tileconfig_start()
299/// \endcode
300///
301/// This intrinsic corresponds to the \c TCVTROWPS2PHH instruction.
302///
303/// \param tsrc
304/// The source tile. Max size is 1024 Bytes.
305/// \param imm8
306/// The the row of the source tile.
307#define _tile_cvtrowps2phhi(tsrc, imm8) \
308 __builtin_ia32_tcvtrowps2phhi(tsrc, imm8)
309
165/// Moves a row from a tile register to a zmm destination register, converting310/// Moves a row from a tile register to a zmm destination register, converting
166/// the fp32 source elements to fp16. It places the resulting fp16 elements311/// the fp32 source elements to fp16. It places the resulting fp16 elements
167/// in the low 16 bits within each dword. The row of the tile is selected312/// in the low 16 bits within each dword. The row of the tile is selected
...@@ -198,6 +343,43 @@...@@ -198,6 +343,43 @@
198/// The the row of the source tile.343/// The the row of the source tile.
199#define _tile_cvtrowps2phl(tsrc, row) __builtin_ia32_tcvtrowps2phl(tsrc, row)344#define _tile_cvtrowps2phl(tsrc, row) __builtin_ia32_tcvtrowps2phl(tsrc, row)
200345
346/// Moves a row from a tile register to a zmm destination register, converting
347/// the fp32 source elements to fp16. It places the resulting fp16 elements
348/// in the low 16 bits within each dword. The row of the tile is selected
349/// by a 8b immediate value.
350///
351/// \headerfile <x86intrin.h>
352///
353/// \code
354/// __m512i _tile_cvtrowps2phli(__tile tsrc, const unsigned int imm8);
355/// \endcode
356///
357/// \code{.operation}
358/// VL := 512
359/// VL_bytes := VL >> 3
360/// row_index := imm8 & 0x3f
361/// row_chunk := (imm8 >> 6) * VL_bytes
362/// FOR i := 0 TO (VL_bytes / 4) - 1
363/// IF i + row_chunk / 4 >= tsrc.colsb / 4
364/// dst.dword[i] := 0
365/// ELSE
366/// dst.word[2*i+1] := 0
367/// dst.fp16[2*i+0] := CONVERT_FP32_TO_FP16(tsrc.row[row_index].fp32[row_chunk/4+i], RNE)
368/// FI
369/// ENDFOR
370/// dst[MAX_VL-1:VL] := 0
371/// zero_tileconfig_start()
372/// \endcode
373///
374/// This intrinsic corresponds to the \c TCVTROWPS2PHL instruction.
375///
376/// \param tsrc
377/// The source tile. Max size is 1024 Bytes.
378/// \param imm8
379/// The the row of the source tile.
380#define _tile_cvtrowps2phli(tsrc, imm8) \
381 __builtin_ia32_tcvtrowps2phli(tsrc, imm8)
382
201/// Move one row of a tile data to a v16f32 data.383/// Move one row of a tile data to a v16f32 data.
202/// The row of the tile is selected by a 32b GPR.384/// The row of the tile is selected by a 32b GPR.
203///385///
...@@ -230,6 +412,38 @@...@@ -230,6 +412,38 @@
230/// \endcode412/// \endcode
231#define _tile_movrow(a, b) ((__m512i)__builtin_ia32_tilemovrow(a, b))413#define _tile_movrow(a, b) ((__m512i)__builtin_ia32_tilemovrow(a, b))
232414
415/// Move one row of a tile data to a v16f32 data.
416/// The row of the tile is selected by a 8b immediate value.
417///
418/// \headerfile <immintrin.h>
419///
420/// \code
421/// __m512 _tile_movrowi(__tile a, const unsigned b);
422/// \endcode
423///
424/// This intrinsic corresponds to the <c> TILEMOVROW </c> instruction.
425///
426/// \param a
427/// The 1st source tile. Max size is 1024 Bytes.
428/// \param b
429/// The 2nd source r32. Size is 4 Bytes.
430/// \returns
431/// The destination v16f32 data. Size is 64 Bytes.
432///
433/// \code{.operation}
434/// VL := 512
435/// VL_bytes := VL>>3
436/// row_index := b&0x3f
437/// row_chunk := (b>>6) * VL_bytes
438/// FOR i := 0 TO (VL_bytes-1)
439/// IF (row_chunk + i >= a.colsb)
440/// dst.byte[i] := 0
441/// ELSE
442/// dst.byte[i] := a.row[row_index].byte[row_chunk+i]
443/// ENDFOR
444/// \endcode
445#define _tile_movrowi(a, b) ((__m512i)__builtin_ia32_tilemovrowi(a, b))
446
233/// This is internal intrinsic. C/C++ user should avoid calling it directly.447/// This is internal intrinsic. C/C++ user should avoid calling it directly.
234448
235static __inline__ __m512 __DEFAULT_FN_ATTRS_AVX512 _tile_cvtrowd2ps_internal(449static __inline__ __m512 __DEFAULT_FN_ATTRS_AVX512 _tile_cvtrowd2ps_internal(
lib/include/amxbf16transposeintrin.h deleted-94
...@@ -1,94 +0,0 @@
1/*===----- amxbf16transposeintrin.h - AMX-BF16 and AMX-TRANSPOSE ------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===------------------------------------------------------------------------===
8 */
9
10#ifndef __IMMINTRIN_H
11#error \
12 "Never use <amxbf16transposeintrin.h> directly; use <immintrin.h> instead."
13#endif /* __IMMINTRIN_H */
14
15#ifndef __AMX_BF16TRANSPOSEINTRIN_H
16#define __AMX_BF16TRANSPOSEINTRIN_H
17#ifdef __x86_64__
18
19/* Define the default attributes for the functions in this file. */
20#define __DEFAULT_FN_ATTRS \
21 __attribute__((__always_inline__, __nodebug__, \
22 __target__("amx-bf16,amx-transpose")))
23
24/// Compute transpose and dot-product of BF16 (16-bit) floating-point pairs in
25/// tiles \a a and \a b, accumulating the intermediate single-precision
26/// (32-bit) floating-point elements with elements in \a dst, and store the
27/// 32-bit result back to tile \a dst.
28///
29/// \headerfile <immintrin.h>
30///
31/// \code
32/// void _tile_tdpbf16ps (__tile dst, __tile a, __tile b)
33/// \endcode
34///
35/// \code{.operation}
36/// FOR m := 0 TO dst.rows - 1
37/// tmp := dst.row[m]
38/// FOR k := 0 TO (a.colsb / 4) - 1
39/// FOR n := 0 TO (dst.colsb / 4) - 1
40/// tmp.bf32[n] += FP32(a.row[m].bf16[2*k+0]) *
41/// FP32(b.row[k].bf16[2*n+0])
42/// tmp.bf32[n] += FP32(a.row[m].bf16[2*k+1]) *
43/// FP32(b.row[k].bf16[2*n+1])
44/// ENDFOR
45/// ENDFOR
46/// write_row_and_zero(dst, m, tmp, dst.colsb)
47/// ENDFOR
48/// zero_upper_rows(dst, dst.rows)
49/// zero_tileconfig_start()
50/// \endcode
51///
52/// This intrinsic corresponds to the \c TTDPBF16PS instruction.
53///
54/// \param dst
55/// The destination tile. Max size is 1024 Bytes.
56/// \param a
57/// The 1st source tile. Max size is 1024 Bytes.
58/// \param b
59/// The 2nd source tile. Max size is 1024 Bytes.
60#define _tile_tdpbf16ps(dst, a, b) __builtin_ia32_ttdpbf16ps((dst), (a), (b))
61
62/// This is internal intrinsic. C/C++ user should avoid calling it directly.
63static __inline__ _tile1024i __DEFAULT_FN_ATTRS
64_tile_tdpbf16ps_internal(unsigned short m, unsigned short n, unsigned short k,
65 _tile1024i dst, _tile1024i src1, _tile1024i src2) {
66 return __builtin_ia32_ttdpbf16ps_internal(m, n, k, dst, src1, src2);
67}
68
69/// Compute transpose and dot-product of BF16 (16-bit) floating-point pairs in
70/// tiles src0 and src1, accumulating the intermediate single-precision
71/// (32-bit) floating-point elements with elements in "dst", and store the
72/// 32-bit result back to tile "dst".
73///
74/// \headerfile <immintrin.h>
75///
76/// This intrinsic corresponds to the <c> TTDPBF16PS </c> instruction.
77///
78/// \param dst
79/// The destination tile. Max size is 1024 Bytes.
80/// \param src0
81/// The 1st source tile. Max size is 1024 Bytes.
82/// \param src1
83/// The 2nd source tile. Max size is 1024 Bytes.
84__DEFAULT_FN_ATTRS
85static __inline__ void __tile_tdpbf16ps(__tile1024i *dst, __tile1024i src0,
86 __tile1024i src1) {
87 dst->tile = _tile_tdpbf16ps_internal(src0.row, src1.col, src0.col, dst->tile,
88 src0.tile, src1.tile);
89}
90
91#undef __DEFAULT_FN_ATTRS
92
93#endif /* __x86_64__ */
94#endif /* __AMX_BF16TRANSPOSEINTRIN_H */
lib/include/amxcomplextransposeintrin.h deleted-303
...@@ -1,303 +0,0 @@
1/*===----- amxcomplextransposeintrin.h - AMX-COMPLEX and AMX-TRANSPOSE ------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===------------------------------------------------------------------------===
8 */
9
10#ifndef __IMMINTRIN_H
11#error \
12 "Never use <amxcomplextransposeintrin.h> directly; include <immintrin.h> instead."
13#endif // __IMMINTRIN_H
14
15#ifndef __AMX_COMPLEXTRANSPOSEINTRIN_H
16#define __AMX_COMPLEXTRANSPOSEINTRIN_H
17#ifdef __x86_64__
18
19#define __DEFAULT_FN_ATTRS \
20 __attribute__((__always_inline__, __nodebug__, \
21 __target__("amx-complex,amx-transpose")))
22
23/// Perform matrix multiplication of two tiles containing complex elements and
24/// accumulate the results into a packed single precision tile. Each dword
25/// element in input tiles \a a and \a b is interpreted as a complex number
26/// with FP16 real part and FP16 imaginary part.
27/// Calculates the imaginary part of the result. For each possible combination
28/// of (transposed column of \a a, column of \a b), it performs a set of
29/// multiplication and accumulations on all corresponding complex numbers
30/// (one from \a a and one from \a b). The imaginary part of the \a a element
31/// is multiplied with the real part of the corresponding \a b element, and
32/// the real part of the \a a element is multiplied with the imaginary part
33/// of the corresponding \a b elements. The two accumulated results are
34/// added, and then accumulated into the corresponding row and column of
35/// \a dst.
36///
37/// \headerfile <x86intrin.h>
38///
39/// \code
40/// void _tile_tcmmimfp16ps(__tile dst, __tile a, __tile b);
41/// \endcode
42///
43/// \code{.operation}
44/// FOR m := 0 TO dst.rows - 1
45/// tmp := dst.row[m]
46/// FOR k := 0 TO a.rows - 1
47/// FOR n := 0 TO (dst.colsb / 4) - 1
48/// tmp.fp32[n] += FP32(a.row[m].fp16[2*k+0]) * FP32(b.row[k].fp16[2*n+1])
49/// tmp.fp32[n] += FP32(a.row[m].fp16[2*k+1]) * FP32(b.row[k].fp16[2*n+0])
50/// ENDFOR
51/// ENDFOR
52/// write_row_and_zero(dst, m, tmp, dst.colsb)
53/// ENDFOR
54/// zero_upper_rows(dst, dst.rows)
55/// zero_tileconfig_start()
56/// \endcode
57///
58/// This intrinsic corresponds to the \c TTCMMIMFP16PS instruction.
59///
60/// \param dst
61/// The destination tile. Max size is 1024 Bytes.
62/// \param a
63/// The 1st source tile. Max size is 1024 Bytes.
64/// \param b
65/// The 2nd source tile. Max size is 1024 Bytes.
66#define _tile_tcmmimfp16ps(dst, a, b) \
67 __builtin_ia32_ttcmmimfp16ps((dst), (a), (b))
68
69/// Perform matrix multiplication of two tiles containing complex elements and
70/// accumulate the results into a packed single precision tile. Each dword
71/// element in input tiles \a a and \a b is interpreted as a complex number
72/// with FP16 real part and FP16 imaginary part.
73/// Calculates the real part of the result. For each possible combination
74/// of (rtransposed colum of \a a, column of \a b), it performs a set of
75/// multiplication and accumulations on all corresponding complex numbers
76/// (one from \a a and one from \a b). The real part of the \a a element is
77/// multiplied with the real part of the corresponding \a b element, and the
78/// negated imaginary part of the \a a element is multiplied with the
79/// imaginary part of the corresponding \a b elements. The two accumulated
80/// results are added, and then accumulated into the corresponding row and
81/// column of \a dst.
82///
83/// \headerfile <x86intrin.h>
84///
85/// \code
86/// void _tile_tcmmrlfp16ps(__tile dst, __tile a, __tile b);
87/// \endcode
88///
89/// \code{.operation}
90/// FOR m := 0 TO dst.rows - 1
91/// tmp := dst.row[m]
92/// FOR k := 0 TO a.rows - 1
93/// FOR n := 0 TO (dst.colsb / 4) - 1
94/// tmp.fp32[n] += FP32(a.row[m].fp16[2*k+0]) * FP32(b.row[k].fp16[2*n+0])
95/// tmp.fp32[n] += FP32(-a.row[m].fp16[2*k+1]) * FP32(b.row[k].fp16[2*n+1])
96/// ENDFOR
97/// ENDFOR
98/// write_row_and_zero(dst, m, tmp, dst.colsb)
99/// ENDFOR
100/// zero_upper_rows(dst, dst.rows)
101/// zero_tileconfig_start()
102/// \endcode
103///
104/// This intrinsic corresponds to the \c TTCMMIMFP16PS instruction.
105///
106/// \param dst
107/// The destination tile. Max size is 1024 Bytes.
108/// \param a
109/// The 1st source tile. Max size is 1024 Bytes.
110/// \param b
111/// The 2nd source tile. Max size is 1024 Bytes.
112#define _tile_tcmmrlfp16ps(dst, a, b) \
113 __builtin_ia32_ttcmmrlfp16ps((dst), (a), (b))
114
115/// Perform matrix conjugate transpose and multiplication of two tiles
116/// containing complex elements and accumulate the results into a packed
117/// single precision tile. Each dword element in input tiles \a a and \a b
118/// is interpreted as a complex number with FP16 real part and FP16 imaginary
119/// part.
120/// Calculates the imaginary part of the result. For each possible combination
121/// of (transposed column of \a a, column of \a b), it performs a set of
122/// multiplication and accumulations on all corresponding complex numbers
123/// (one from \a a and one from \a b). The negated imaginary part of the \a a
124/// element is multiplied with the real part of the corresponding \a b
125/// element, and the real part of the \a a element is multiplied with the
126/// imaginary part of the corresponding \a b elements. The two accumulated
127/// results are added, and then accumulated into the corresponding row and
128/// column of \a dst.
129///
130/// \headerfile <x86intrin.h>
131///
132/// \code
133/// void _tile_conjtcmmimfp16ps(__tile dst, __tile a, __tile b);
134/// \endcode
135///
136/// \code{.operation}
137/// FOR m := 0 TO dst.rows - 1
138/// tmp := dst.row[m]
139/// FOR k := 0 TO a.rows - 1
140/// FOR n := 0 TO (dst.colsb / 4) - 1
141/// tmp.fp32[n] += FP32(a.row[m].fp16[2*k+0]) * FP32(b.row[k].fp16[2*n+1])
142/// tmp.fp32[n] += FP32(-a.row[m].fp16[2*k+1]) * FP32(b.row[k].fp16[2*n+0])
143/// ENDFOR
144/// ENDFOR
145/// write_row_and_zero(dst, m, tmp, dst.colsb)
146/// ENDFOR
147/// zero_upper_rows(dst, dst.rows)
148/// zero_tileconfig_start()
149/// \endcode
150///
151/// This intrinsic corresponds to the \c TCONJTCMMIMFP16PS instruction.
152///
153/// \param dst
154/// The destination tile. Max size is 1024 Bytes.
155/// \param a
156/// The 1st source tile. Max size is 1024 Bytes.
157/// \param b
158/// The 2nd source tile. Max size is 1024 Bytes.
159#define _tile_conjtcmmimfp16ps(dst, a, b) \
160 __builtin_ia32_tconjtcmmimfp16ps((dst), (a), (b))
161
162/// Perform conjugate transpose of an FP16-pair of complex elements from \a a
163/// and writes the result to \a dst.
164///
165/// \headerfile <x86intrin.h>
166///
167/// \code
168/// void _tile_conjtfp16(__tile dst, __tile a);
169/// \endcode
170///
171/// \code{.operation}
172/// FOR i := 0 TO dst.rows - 1
173/// FOR j := 0 TO (dst.colsb / 4) - 1
174/// tmp.fp16[2*j+0] := a.row[j].fp16[2*i+0]
175/// tmp.fp16[2*j+1] := -a.row[j].fp16[2*i+1]
176/// ENDFOR
177/// write_row_and_zero(dst, i, tmp, dst.colsb)
178/// ENDFOR
179/// zero_upper_rows(dst, dst.rows)
180/// zero_tileconfig_start()
181/// \endcode
182///
183/// This intrinsic corresponds to the \c TCONJTFP16 instruction.
184///
185/// \param dst
186/// The destination tile. Max size is 1024 Bytes.
187/// \param a
188/// The source tile. Max size is 1024 Bytes.
189#define _tile_conjtfp16(dst, a) __builtin_ia32_tconjtfp16((dst), (a))
190
191static __inline__ _tile1024i __DEFAULT_FN_ATTRS _tile_tcmmimfp16ps_internal(
192 unsigned short m, unsigned short n, unsigned short k, _tile1024i dst,
193 _tile1024i src1, _tile1024i src2) {
194 return __builtin_ia32_ttcmmimfp16ps_internal(m, n, k, dst, src1, src2);
195}
196
197static __inline__ _tile1024i __DEFAULT_FN_ATTRS _tile_tcmmrlfp16ps_internal(
198 unsigned short m, unsigned short n, unsigned short k, _tile1024i dst,
199 _tile1024i src1, _tile1024i src2) {
200 return __builtin_ia32_ttcmmrlfp16ps_internal(m, n, k, dst, src1, src2);
201}
202
203static __inline__ _tile1024i __DEFAULT_FN_ATTRS _tile_conjtcmmimfp16ps_internal(
204 unsigned short m, unsigned short n, unsigned short k, _tile1024i dst,
205 _tile1024i src1, _tile1024i src2) {
206 return __builtin_ia32_tconjtcmmimfp16ps_internal(m, n, k, dst, src1, src2);
207}
208
209static __inline__ _tile1024i __DEFAULT_FN_ATTRS
210_tile_conjtfp16_internal(unsigned short m, unsigned short n, _tile1024i src) {
211 return __builtin_ia32_tconjtfp16_internal(m, n, src);
212}
213
214/// Perform matrix multiplication of two tiles containing complex elements and
215/// accumulate the results into a packed single precision tile. Each dword
216/// element in input tiles src0 and src1 is interpreted as a complex number
217/// with FP16 real part and FP16 imaginary part.
218/// This function calculates the imaginary part of the result.
219///
220/// \headerfile <immintrin.h>
221///
222/// This intrinsic corresponds to the <c> TTCMMIMFP16PS </c> instruction.
223///
224/// \param dst
225/// The destination tile. Max size is 1024 Bytes.
226/// \param src0
227/// The 1st source tile. Max size is 1024 Bytes.
228/// \param src1
229/// The 2nd source tile. Max size is 1024 Bytes.
230__DEFAULT_FN_ATTRS
231static void __tile_tcmmimfp16ps(__tile1024i *dst, __tile1024i src0,
232 __tile1024i src1) {
233 dst->tile = _tile_tcmmimfp16ps_internal(src0.row, src1.col, src0.col,
234 dst->tile, src0.tile, src1.tile);
235}
236
237/// Perform matrix multiplication of two tiles containing complex elements and
238/// accumulate the results into a packed single precision tile. Each dword
239/// element in input tiles src0 and src1 is interpreted as a complex number
240/// with FP16 real part and FP16 imaginary part.
241/// This function calculates the real part of the result.
242///
243/// \headerfile <immintrin.h>
244///
245/// This intrinsic corresponds to the <c> TTCMMRLFP16PS </c> instruction.
246///
247/// \param dst
248/// The destination tile. Max size is 1024 Bytes.
249/// \param src0
250/// The 1st source tile. Max size is 1024 Bytes.
251/// \param src1
252/// The 2nd source tile. Max size is 1024 Bytes.
253__DEFAULT_FN_ATTRS
254static void __tile_tcmmrlfp16ps(__tile1024i *dst, __tile1024i src0,
255 __tile1024i src1) {
256 dst->tile = _tile_tcmmrlfp16ps_internal(src0.row, src1.col, src0.col,
257 dst->tile, src0.tile, src1.tile);
258}
259
260/// Perform matrix conjugate transpose and multiplication of two tiles
261/// containing complex elements and accumulate the results into a packed
262/// single precision tile. Each dword element in input tiles src0 and src1
263/// is interpreted as a complex number with FP16 real part and FP16 imaginary
264/// part.
265/// This function calculates the imaginary part of the result.
266///
267/// \headerfile <immintrin.h>
268///
269/// This intrinsic corresponds to the <c> TCONJTCMMIMFP16PS </c> instruction.
270///
271/// \param dst
272/// The destination tile. Max size is 1024 Bytes.
273/// \param src0
274/// The 1st source tile. Max size is 1024 Bytes.
275/// \param src1
276/// The 2nd source tile. Max size is 1024 Bytes.
277__DEFAULT_FN_ATTRS
278static void __tile_conjtcmmimfp16ps(__tile1024i *dst, __tile1024i src0,
279 __tile1024i src1) {
280 dst->tile = _tile_conjtcmmimfp16ps_internal(src0.row, src1.col, src0.col,
281 dst->tile, src0.tile, src1.tile);
282}
283
284/// Perform conjugate transpose of an FP16-pair of complex elements from src and
285/// writes the result to dst.
286///
287/// \headerfile <immintrin.h>
288///
289/// This intrinsic corresponds to the <c> TCONJTFP16 </c> instruction.
290///
291/// \param dst
292/// The destination tile. Max size is 1024 Bytes.
293/// \param src
294/// The source tile. Max size is 1024 Bytes.
295__DEFAULT_FN_ATTRS
296static void __tile_conjtfp16(__tile1024i *dst, __tile1024i src) {
297 dst->tile = _tile_conjtfp16_internal(src.row, src.col, src.tile);
298}
299
300#undef __DEFAULT_FN_ATTRS
301
302#endif // __x86_64__
303#endif // __AMX_COMPLEXTRANSPOSEINTRIN_H
lib/include/amxfp16transposeintrin.h deleted-94
...@@ -1,94 +0,0 @@
1/*===----- amxfp16transposeintrin.h - AMX-FP16 and AMX-TRANSPOSE ------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===------------------------------------------------------------------------===
8 */
9
10#ifndef __IMMINTRIN_H
11#error \
12 "Never use <amxfp16transposeintrin.h> directly; use <immintrin.h> instead."
13#endif /* __IMMINTRIN_H */
14
15#ifndef __AMX_FP16TRANSPOSEINTRIN_H
16#define __AMX_FP16TRANSPOSEINTRIN_H
17#ifdef __x86_64__
18
19/* Define the default attributes for the functions in this file. */
20#define __DEFAULT_FN_ATTRS \
21 __attribute__((__always_inline__, __nodebug__, \
22 __target__("amx-fp16,amx-transpose")))
23
24/// Compute transpose and dot-product of FP16 (16-bit) floating-point pairs in
25/// tiles \a a and \a b, accumulating the intermediate single-precision
26/// (32-bit) floating-point elements with elements in \a dst, and store the
27/// 32-bit result back to tile \a dst.
28///
29/// \headerfile <immintrin.h>
30///
31/// \code
32/// void _tile_tdpfp16ps (__tile dst, __tile a, __tile b)
33/// \endcode
34///
35/// \code{.operation}
36/// FOR m := 0 TO dst.rows - 1
37/// tmp := dst.row[m]
38/// FOR k := 0 TO (a.colsb / 4) - 1
39/// FOR n := 0 TO (dst.colsb / 4) - 1
40/// tmp.fp32[n] += FP32(a.row[m].fp16[2*k+0]) *
41/// FP32(b.row[k].fp16[2*n+0])
42/// tmp.fp32[n] += FP32(a.row[m].fp16[2*k+1]) *
43/// FP32(b.row[k].fp16[2*n+1])
44/// ENDFOR
45/// ENDFOR
46/// write_row_and_zero(dst, m, tmp, dst.colsb)
47/// ENDFOR
48/// zero_upper_rows(dst, dst.rows)
49/// zero_tileconfig_start()
50/// \endcode
51///
52/// This intrinsic corresponds to the \c TTDPFP16PS instruction.
53///
54/// \param dst
55/// The destination tile. Max size is 1024 Bytes.
56/// \param a
57/// The 1st source tile. Max size is 1024 Bytes.
58/// \param b
59/// The 2nd source tile. Max size is 1024 Bytes.
60#define _tile_tdpfp16ps(dst, a, b) __builtin_ia32_ttdpfp16ps((dst), (a), (b))
61
62/// This is internal intrinsic. C/C++ user should avoid calling it directly.
63static __inline__ _tile1024i __DEFAULT_FN_ATTRS
64_tile_tdpfp16ps_internal(unsigned short m, unsigned short n, unsigned short k,
65 _tile1024i dst, _tile1024i src1, _tile1024i src2) {
66 return __builtin_ia32_ttdpfp16ps_internal(m, n, k, dst, src1, src2);
67}
68
69/// Compute transpose and dot-product of FP16 (16-bit) floating-point pairs in
70/// tiles src0 and src1, accumulating the intermediate single-precision
71/// (32-bit) floating-point elements with elements in "dst", and store the
72/// 32-bit result back to tile "dst".
73///
74/// \headerfile <immintrin.h>
75///
76/// This intrinsic corresponds to the <c> TTDPFP16PS </c> instruction.
77///
78/// \param dst
79/// The destination tile. Max size is 1024 Bytes.
80/// \param src0
81/// The 1st source tile. Max size is 1024 Bytes.
82/// \param src1
83/// The 2nd source tile. Max size is 1024 Bytes.
84__DEFAULT_FN_ATTRS
85static __inline__ void __tile_tdpfp16ps(__tile1024i *dst, __tile1024i src0,
86 __tile1024i src1) {
87 dst->tile = _tile_tdpfp16ps_internal(src0.row, src1.col, src0.col, dst->tile,
88 src0.tile, src1.tile);
89}
90
91#undef __DEFAULT_FN_ATTRS
92
93#endif /* __x86_64__ */
94#endif /* __AMX_FP16TRANSPOSEINTRIN_H */
lib/include/amxintrin.h-2
...@@ -230,8 +230,6 @@ static __inline__ void __DEFAULT_FN_ATTRS_TILE _tile_release(void) {...@@ -230,8 +230,6 @@ static __inline__ void __DEFAULT_FN_ATTRS_TILE _tile_release(void) {
230/// bytes. Since there is no 2D type in llvm IR, we use vector type to230/// bytes. Since there is no 2D type in llvm IR, we use vector type to
231/// represent 2D tile and the fixed size is maximum amx tile register size.231/// represent 2D tile and the fixed size is maximum amx tile register size.
232typedef int _tile1024i __attribute__((__vector_size__(1024), __aligned__(64)));232typedef int _tile1024i __attribute__((__vector_size__(1024), __aligned__(64)));
233typedef int _tile1024i_1024a
234 __attribute__((__vector_size__(1024), __aligned__(1024)));
235233
236/// This is internal intrinsic. C/C++ user should avoid calling it directly.234/// This is internal intrinsic. C/C++ user should avoid calling it directly.
237static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TILE235static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TILE
lib/include/amxmovrstransposeintrin.h deleted-200
...@@ -1,200 +0,0 @@
1/* ===--- amxmovrstransposeintrin.h - AMX_MOVRS_TRANSPOSE intrinsics --------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 * ===-----------------------------------------------------------------------===
8 */
9
10#ifndef __IMMINTRIN_H
11#error \
12 "Never use <amxmovrstransposeintrin.h> directly; use <immintrin.h> instead."
13#endif /* __IMMINTRIN_H */
14
15#ifndef __AMX_MOVRS_TRANSPOSEINTRIN_H
16#define __AMX_MOVRS_TRANSPOSEINTRIN_H
17#ifdef __x86_64__
18
19#define __DEFAULT_FN_ATTRS \
20 __attribute__((__always_inline__, __nodebug__, \
21 __target__("amx-transpose,amx-movrs")))
22
23#define _tile_2rpntlvwz0rs(tdst, base, stride) \
24 __builtin_ia32_t2rpntlvwz0rs(tdst, base, stride)
25#define _tile_2rpntlvwz0rst1(tdst, base, stride) \
26 __builtin_ia32_t2rpntlvwz0rst1(tdst, base, stride)
27#define _tile_2rpntlvwz1rs(tdst, base, stride) \
28 __builtin_ia32_t2rpntlvwz1rs(tdst, base, stride)
29#define _tile_2rpntlvwz1rst1(tdst, base, stride) \
30 __builtin_ia32_t2rpntlvwz1rst1(tdst, base, stride)
31
32static __inline__ void __DEFAULT_FN_ATTRS _tile_2rpntlvwz0rs_internal(
33 unsigned short row, unsigned short col0, unsigned short col1,
34 _tile1024i *dst0, _tile1024i *dst1, const void *base,
35 __SIZE_TYPE__ stride) {
36 // Use __tile1024i_1024a* to escape the alignment check in
37 // clang/test/Headers/x86-intrinsics-headers-clean.cpp
38 __builtin_ia32_t2rpntlvwz0rs_internal(
39 row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base,
40 (__SIZE_TYPE__)(stride));
41}
42
43static __inline__ void __DEFAULT_FN_ATTRS _tile_2rpntlvwz0rst1_internal(
44 unsigned short row, unsigned short col0, unsigned short col1,
45 _tile1024i *dst0, _tile1024i *dst1, const void *base,
46 __SIZE_TYPE__ stride) {
47 __builtin_ia32_t2rpntlvwz0rst1_internal(
48 row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base,
49 (__SIZE_TYPE__)(stride));
50}
51
52static __inline__ void __DEFAULT_FN_ATTRS _tile_2rpntlvwz1rs_internal(
53 unsigned short row, unsigned short col0, unsigned short col1,
54 _tile1024i *dst0, _tile1024i *dst1, const void *base,
55 __SIZE_TYPE__ stride) {
56 __builtin_ia32_t2rpntlvwz1rs_internal(
57 row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base,
58 (__SIZE_TYPE__)(stride));
59}
60
61static __inline__ void __DEFAULT_FN_ATTRS _tile_2rpntlvwz1rst1_internal(
62 unsigned short row, unsigned short col0, unsigned short col1,
63 _tile1024i *dst0, _tile1024i *dst1, const void *base,
64 __SIZE_TYPE__ stride) {
65 __builtin_ia32_t2rpntlvwz1rst1_internal(
66 row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base,
67 (__SIZE_TYPE__)(stride));
68}
69
70/// Converts a pair of tiles from memory into VNNI format, and places the
71/// results in a pair of destinations specified by dst. The pair of tiles
72/// in memory is specified via a tsib; the second tile is after the first
73/// one, separated by the same stride that separates each row.
74/// The tile configuration for the destination tiles indicates the amount
75/// of data to read from memory. The instruction will load a number of rows
76/// that is equal to twice the number of rows in tmm1. The size of each row
77/// is equal to the average width of the destination tiles. If the second
78/// tile is configured with zero rows and columns, only the first tile will
79/// be written.
80/// Provides a hint to the implementation that the data will likely become
81/// read shared in the near future and the data caching can be optimized.
82///
83/// \headerfile <immintrin.h>
84///
85/// This intrinsic corresponds to the <c> T2RPNTLVWZ0RS </c> instruction.
86///
87/// \param dst0
88/// First tile of destination tile pair. Max size is 1024i*2 Bytes.
89/// \param dst1
90/// Second tile of destination tile pair. Max size is 1024i*2 Bytes.
91/// \param base
92/// A pointer to base address.
93/// \param stride
94/// The stride between the rows' data to be loaded in memory.
95__DEFAULT_FN_ATTRS
96static void __tile_2rpntlvwz0rs(__tile1024i *dst0, __tile1024i *dst1,
97 const void *base, __SIZE_TYPE__ stride) {
98 _tile_2rpntlvwz0rs_internal(dst0->row, dst0->col, dst1->col, &dst0->tile,
99 &dst1->tile, base, stride);
100}
101
102/// Converts a pair of tiles from memory into VNNI format, and places the
103/// results in a pair of destinations specified by dst. The pair of tiles
104/// in memory is specified via a tsib; the second tile is after the first
105/// one, separated by the same stride that separates each row.
106/// The tile configuration for the destination tiles indicates the amount
107/// of data to read from memory. The instruction will load a number of rows
108/// that is equal to twice the number of rows in tmm1. The size of each row
109/// is equal to the average width of the destination tiles. If the second
110/// tile is configured with zero rows and columns, only the first tile will
111/// be written.
112///
113/// \headerfile <immintrin.h>
114///
115/// This intrinsic corresponds to the <c> T2RPNTLVWZ0T1RS </c> instruction.
116///
117/// \param dst0
118/// First tile of destination tile pair. Max size is 1024i*2 Bytes.
119/// \param dst1
120/// Second tile of destination tile pair. Max size is 1024i*2 Bytes.
121/// \param base
122/// A pointer to base address.
123/// \param stride
124/// The stride between the rows' data to be loaded in memory.
125__DEFAULT_FN_ATTRS
126static void __tile_2rpntlvwz0rst1(__tile1024i *dst0, __tile1024i *dst1,
127 const void *base, __SIZE_TYPE__ stride) {
128 _tile_2rpntlvwz0rst1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile,
129 &dst1->tile, base, stride);
130}
131
132/// Converts a pair of tiles from memory into VNNI format, and places the
133/// results in a pair of destinations specified by dst. The pair of tiles
134/// in memory is specified via a tsib; the second tile is after the first
135/// one, separated by the same stride that separates each row.
136/// The tile configuration for the destination tiles indicates the amount
137/// of data to read from memory. The instruction will load a number of rows
138/// that is equal to twice the number of rows in tmm1. The size of each row
139/// is equal to the average width of the destination tiles. If the second
140/// tile is configured with zero rows and columns, only the first tile will
141/// be written. The last row will be not be read from memory but instead
142/// filled with zeros.
143/// Provides a hint to the implementation that the data will likely become
144/// read shared in the near future and the data caching can be optimized.
145///
146/// \headerfile <immintrin.h>
147///
148/// This intrinsic corresponds to the <c> T2RPNTLVWZ1 </c> instruction.
149///
150/// \param dst0
151/// First tile of destination tile pair. Max size is 1024i*2 Bytes.
152/// \param dst1
153/// Second tile of destination tile pair. Max size is 1024i*2 Bytes.
154/// \param base
155/// A pointer to base address.
156/// \param stride
157/// The stride between the rows' data to be loaded in memory.
158__DEFAULT_FN_ATTRS
159static void __tile_2rpntlvwz1rs(__tile1024i *dst0, __tile1024i *dst1,
160 const void *base, __SIZE_TYPE__ stride) {
161 _tile_2rpntlvwz1rs_internal(dst0->row, dst0->col, dst1->col, &dst0->tile,
162 &dst1->tile, base, stride);
163}
164
165/// Converts a pair of tiles from memory into VNNI format, and places the
166/// results in a pair of destinations specified by dst. The pair of tiles
167/// in memory is specified via a tsib; the second tile is after the first
168/// one, separated by the same stride that separates each row.
169/// The tile configuration for the destination tiles indicates the amount
170/// of data to read from memory. The instruction will load a number of rows
171/// that is equal to twice the number of rows in tmm1. The size of each row
172/// is equal to the average width of the destination tiles. If the second
173/// tile is configured with zero rows and columns, only the first tile will
174/// be written. The last row will be not be read from memory but instead
175/// filled with zeros.
176/// Provides a hint to the implementation that the data will likely become
177/// read shared in the near future and the data caching can be optimized.
178///
179/// \headerfile <immintrin.h>
180///
181/// This intrinsic corresponds to the <c> T2RPNTLVWZ1T1RS </c> instruction.
182///
183/// \param dst0
184/// First tile of destination tile pair. Max size is 1024i*2 Bytes.
185/// \param dst1
186/// Second tile of destination tile pair. Max size is 1024i*2 Bytes.
187/// \param base
188/// A pointer to base address.
189/// \param stride
190/// The stride between the rows' data to be loaded in memory.
191__DEFAULT_FN_ATTRS
192static void __tile_2rpntlvwz1rst1(__tile1024i *dst0, __tile1024i *dst1,
193 const void *base, __SIZE_TYPE__ stride) {
194 _tile_2rpntlvwz1rst1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile,
195 &dst1->tile, base, stride);
196}
197
198#undef __DEFAULT_FN_ATTRS
199#endif /* __x86_64__ */
200#endif /* __AMX_MOVRS_TRANSPOSEINTRIN_H */
lib/include/amxtf32transposeintrin.h deleted-105
...@@ -1,105 +0,0 @@
1/*===--------- amxtf32transposeintrin.h - AMX-TF32 and AMX-TRANSPOSE --------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===------------------------------------------------------------------------===
8 */
9#ifndef __IMMINTRIN_H
10#error \
11 "Never use <amxtf32transposeintrin.h> directly; include <immintrin.h> instead."
12#endif // __IMMINTRIN_H
13
14#ifndef __AMX_TF32TRANSPOSEINTRIN_H
15#define __AMX_TF32TRANSPOSEINTRIN_H
16#ifdef __x86_64__
17
18#define __DEFAULT_FN_ATTRS_TF32_TRANSPOSE \
19 __attribute__((__always_inline__, __nodebug__, \
20 __target__("amx-tf32,amx-transpose")))
21
22/// \code
23/// void _tile_tmmultf32ps(constexpr int srcdst, constexpr int a, \
24/// constexpr int b);
25/// \endcode
26///
27/// This intrinsic corresponds to the <c> TTMMULTF32PS </c> instruction.
28///
29/// \param srcdst
30/// The destination tile. Max size is 1024 Bytes.
31/// \param a
32/// The 1st source tile. Max size is 1024 Bytes.
33/// \param b
34/// The 2nd source tile. Max size is 1024 Bytes.
35///
36/// \code{.operation}
37/// DEFINE zero_lower_mantissa_bits_fp32(x[31:0]) {
38/// dword[12:0] := 0
39/// dword[31:13] := x[31:13]
40/// return dword
41/// }
42///
43/// DEFINE silence_snan_fp32(x[31:0]) {
44/// IF (x.exponent == 255 and x.fraction != 0 and x.fraction[22] == 0)
45/// x.fraction[22] := 1
46/// return x
47/// }
48///
49/// elements_dest:= srcdst.colsb/4
50///
51/// FOR m := 0 TO (srcdst.rows-1)
52/// tmp[511:0] := 0
53/// FOR k := 0 TO (a.rows-1)
54/// FOR n := 0 TO (elements_dest-1)
55/// a1e := silence_snan_fp32(a.row[k].fp32[m])
56/// a2e := silence_snan_fp32(b.row[k].fp32[n])
57/// s1e := zero_lower_mantissa_bits_fp32(a1e)
58/// s2e := zero_lower_mantissa_bits_fp32(a2e)
59/// tmp.fp32[n] += s1e * s2e
60/// ENDFOR
61/// ENDFOR
62///
63/// FOR n := 0 TO (elements_dest-1)
64/// tmp.fp32[n] += srcdst.row[m].fp32[n]
65/// ENDFOR
66/// write_row_and_zero(srcdst, m, tmp, srcdst.colsb)
67///
68/// ENDFOR
69///
70/// zero_upper_rows(srcdst, srcdst.rows)
71/// zero_tileconfig_start()
72/// \endcode
73#define _tile_tmmultf32ps(srcdst, a, b) \
74 __builtin_ia32_ttmmultf32ps((srcdst), (a), (b))
75
76// dst = m x n (srcdest), src1 = k x m, src2 = k x n
77static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TF32_TRANSPOSE
78_tile_tmmultf32ps_internal(unsigned short m, unsigned short n, unsigned short k,
79 _tile1024i dst, _tile1024i src1, _tile1024i src2) {
80 return __builtin_ia32_ttmmultf32ps_internal(m, n, k, dst, src1, src2);
81}
82
83/// Compute transpose and do Matrix Multiplication of src0 and src1, and then do
84/// Matrix Plus with dst. All the calculation is base on float32 but with the
85/// lower 13-bit set to 0.
86///
87/// \headerfile <immintrin.h>
88///
89/// This intrinsic corresponds to the <c> TTMMULTF32PS </c> instruction.
90///
91/// \param dst
92/// The destination tile. Max size is 1024 Bytes.
93/// \param src0
94/// The 1st source tile. Max size is 1024 Bytes.
95/// \param src1
96/// The 2nd source tile. Max size is 1024 Bytes.
97__DEFAULT_FN_ATTRS_TF32_TRANSPOSE
98static void __tile_tmmultf32ps(__tile1024i *dst, __tile1024i src0,
99 __tile1024i src1) {
100 dst->tile = _tile_tmmultf32ps_internal(src0.row, src1.col, src0.col,
101 dst->tile, src0.tile, src1.tile);
102}
103
104#endif // __x86_64__
105#endif // __AMX_TF32TRANSPOSEINTRIN_H
lib/include/amxtransposeintrin.h deleted-248
...@@ -1,248 +0,0 @@
1/* ===--- amxtransposeintrin.h - AMX_TRANSPOSE intrinsics -*- C++ -*---------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 * ===-----------------------------------------------------------------------===
8 */
9
10#ifndef __IMMINTRIN_H
11#error "Never use <amxtransposeintrin.h> directly; use <immintrin.h> instead."
12#endif /* __IMMINTRIN_H */
13
14#ifndef __AMX_TRANSPOSEINTRIN_H
15#define __AMX_TRANSPOSEINTRIN_H
16#ifdef __x86_64__
17
18#define __DEFAULT_FN_ATTRS_TRANSPOSE \
19 __attribute__((__always_inline__, __nodebug__, __target__("amx-transpose")))
20
21#define _tile_2rpntlvwz0(tdst, base, stride) \
22 __builtin_ia32_t2rpntlvwz0(tdst, base, stride)
23#define _tile_2rpntlvwz0t1(tdst, base, stride) \
24 __builtin_ia32_t2rpntlvwz0t1(tdst, base, stride)
25#define _tile_2rpntlvwz1(tdst, base, stride) \
26 __builtin_ia32_t2rpntlvwz1(tdst, base, stride)
27#define _tile_2rpntlvwz1t1(tdst, base, stride) \
28 __builtin_ia32_t2rpntlvwz1t1(tdst, base, stride)
29
30/// Transpose 32-bit elements from \a src and write the result to \a dst.
31///
32/// \headerfile <immintrin.h>
33///
34/// \code
35/// void _tile_transposed(__tile dst, __tile src);
36/// \endcode
37///
38/// This intrinsic corresponds to the <c> TTRANSPOSED </c> instruction.
39///
40/// \param dst
41/// The destination tile. Max size is 1024 Bytes.
42/// \param src
43/// The source tile. Max size is 1024 Bytes.
44///
45/// \code{.operation}
46///
47/// FOR i := 0 TO (dst.rows-1)
48/// tmp[511:0] := 0
49/// FOR j := 0 TO (dst.colsb/4-1)
50/// tmp.dword[j] := src.row[j].dword[i]
51/// ENDFOR
52/// dst.row[i] := tmp
53/// ENDFOR
54///
55/// zero_upper_rows(dst, dst.rows)
56/// zero_tileconfig_start()
57/// \endcode
58#define _tile_transposed(dst, src) __builtin_ia32_ttransposed(dst, src)
59
60static __inline__ void __DEFAULT_FN_ATTRS_TRANSPOSE _tile_2rpntlvwz0_internal(
61 unsigned short row, unsigned short col0, unsigned short col1,
62 _tile1024i *dst0, _tile1024i *dst1, const void *base,
63 __SIZE_TYPE__ stride) {
64 // Use __tile1024i_1024a* to escape the alignment check in
65 // clang/test/Headers/x86-intrinsics-headers-clean.cpp
66 __builtin_ia32_t2rpntlvwz0_internal(row, col0, col1, (_tile1024i_1024a *)dst0,
67 (_tile1024i_1024a *)dst1, base,
68 (__SIZE_TYPE__)(stride));
69}
70
71static __inline__ void __DEFAULT_FN_ATTRS_TRANSPOSE _tile_2rpntlvwz0t1_internal(
72 unsigned short row, unsigned short col0, unsigned short col1,
73 _tile1024i *dst0, _tile1024i *dst1, const void *base,
74 __SIZE_TYPE__ stride) {
75 __builtin_ia32_t2rpntlvwz0t1_internal(
76 row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base,
77 (__SIZE_TYPE__)(stride));
78}
79
80static __inline__ void __DEFAULT_FN_ATTRS_TRANSPOSE _tile_2rpntlvwz1_internal(
81 unsigned short row, unsigned short col0, unsigned short col1,
82 _tile1024i *dst0, _tile1024i *dst1, const void *base,
83 __SIZE_TYPE__ stride) {
84 __builtin_ia32_t2rpntlvwz1_internal(row, col0, col1, (_tile1024i_1024a *)dst0,
85 (_tile1024i_1024a *)dst1, base,
86 (__SIZE_TYPE__)(stride));
87}
88
89static __inline__ void __DEFAULT_FN_ATTRS_TRANSPOSE _tile_2rpntlvwz1t1_internal(
90 unsigned short row, unsigned short col0, unsigned short col1,
91 _tile1024i *dst0, _tile1024i *dst1, const void *base,
92 __SIZE_TYPE__ stride) {
93 __builtin_ia32_t2rpntlvwz1t1_internal(
94 row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base,
95 (__SIZE_TYPE__)(stride));
96}
97
98// This is internal intrinsic. C/C++ user should avoid calling it directly.
99static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TRANSPOSE
100_tile_transposed_internal(unsigned short m, unsigned short n, _tile1024i src) {
101 return __builtin_ia32_ttransposed_internal(m, n, src);
102}
103
104/// Converts a pair of tiles from memory into VNNI format, and places the
105/// results in a pair of destinations specified by dst. The pair of tiles
106/// in memory is specified via a tsib; the second tile is after the first
107/// one, separated by the same stride that separates each row.
108/// The tile configuration for the destination tiles indicates the amount
109/// of data to read from memory. The instruction will load a number of rows
110/// that is equal to twice the number of rows in tmm1. The size of each row
111/// is equal to the average width of the destination tiles. If the second
112/// tile is configured with zero rows and columns, only the first tile will
113/// be written.
114/// Provides a hint to the implementation that the data will likely not be
115/// reused in the near future and the data caching can be optimized.
116///
117/// \headerfile <immintrin.h>
118///
119/// This intrinsic corresponds to the <c> T2RPNTLVWZ0 </c> instruction.
120///
121/// \param dst0
122/// First tile of destination tile pair. Max size is 1024i*2 Bytes.
123/// \param dst1
124/// Second tile of destination tile pair. Max size is 1024i*2 Bytes.
125/// \param base
126/// A pointer to base address.
127/// \param stride
128/// The stride between the rows' data to be loaded in memory.
129__DEFAULT_FN_ATTRS_TRANSPOSE
130static void __tile_2rpntlvwz0(__tile1024i *dst0, __tile1024i *dst1,
131 const void *base, __SIZE_TYPE__ stride) {
132 _tile_2rpntlvwz0_internal(dst0->row, dst0->col, dst1->col, &dst0->tile,
133 &dst1->tile, base, stride);
134}
135
136/// Converts a pair of tiles from memory into VNNI format, and places the
137/// results in a pair of destinations specified by dst. The pair of tiles
138/// in memory is specified via a tsib; the second tile is after the first
139/// one, separated by the same stride that separates each row.
140/// The tile configuration for the destination tiles indicates the amount
141/// of data to read from memory. The instruction will load a number of rows
142/// that is equal to twice the number of rows in tmm1. The size of each row
143/// is equal to the average width of the destination tiles. If the second
144/// tile is configured with zero rows and columns, only the first tile will
145/// be written.
146///
147/// \headerfile <immintrin.h>
148///
149/// This intrinsic corresponds to the <c> T2RPNTLVWZ0T1 </c> instruction.
150///
151/// \param dst0
152/// First tile of destination tile pair. Max size is 1024i*2 Bytes.
153/// \param dst1
154/// Second tile of destination tile pair. Max size is 1024i*2 Bytes.
155/// \param base
156/// A pointer to base address.
157/// \param stride
158/// The stride between the rows' data to be loaded in memory.
159__DEFAULT_FN_ATTRS_TRANSPOSE
160static void __tile_2rpntlvwz0t1(__tile1024i *dst0, __tile1024i *dst1,
161 const void *base, __SIZE_TYPE__ stride) {
162 _tile_2rpntlvwz0t1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile,
163 &dst1->tile, base, stride);
164}
165
166/// Converts a pair of tiles from memory into VNNI format, and places the
167/// results in a pair of destinations specified by dst. The pair of tiles
168/// in memory is specified via a tsib; the second tile is after the first
169/// one, separated by the same stride that separates each row.
170/// The tile configuration for the destination tiles indicates the amount
171/// of data to read from memory. The instruction will load a number of rows
172/// that is equal to twice the number of rows in tmm1. The size of each row
173/// is equal to the average width of the destination tiles. If the second
174/// tile is configured with zero rows and columns, only the first tile will
175/// be written. The last row will be not be read from memory but instead
176/// filled with zeros.
177/// Provides a hint to the implementation that the data will likely not be
178/// reused in the near future and the data caching can be optimized.
179///
180/// \headerfile <immintrin.h>
181///
182/// This intrinsic corresponds to the <c> T2RPNTLVWZ1 </c> instruction.
183///
184/// \param dst0
185/// First tile of destination tile pair. Max size is 1024i*2 Bytes.
186/// \param dst1
187/// Second tile of destination tile pair. Max size is 1024i*2 Bytes.
188/// \param base
189/// A pointer to base address.
190/// \param stride
191/// The stride between the rows' data to be loaded in memory.
192__DEFAULT_FN_ATTRS_TRANSPOSE
193static void __tile_2rpntlvwz1(__tile1024i *dst0, __tile1024i *dst1,
194 const void *base, __SIZE_TYPE__ stride) {
195 _tile_2rpntlvwz1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile,
196 &dst1->tile, base, stride);
197}
198
199/// Converts a pair of tiles from memory into VNNI format, and places the
200/// results in a pair of destinations specified by dst. The pair of tiles
201/// in memory is specified via a tsib; the second tile is after the first
202/// one, separated by the same stride that separates each row.
203/// The tile configuration for the destination tiles indicates the amount
204/// of data to read from memory. The instruction will load a number of rows
205/// that is equal to twice the number of rows in tmm1. The size of each row
206/// is equal to the average width of the destination tiles. If the second
207/// tile is configured with zero rows and columns, only the first tile will
208/// be written. The last row will be not be read from memory but instead
209/// filled with zeros.
210/// Provides a hint to the implementation that the data will likely not be
211/// reused in the near future and the data caching can be optimized.
212///
213/// \headerfile <immintrin.h>
214///
215/// This intrinsic corresponds to the <c> T2RPNTLVWZ1T1 </c> instruction.
216///
217/// \param dst0
218/// First tile of destination tile pair. Max size is 1024i*2 Bytes.
219/// \param dst1
220/// Second tile of destination tile pair. Max size is 1024i*2 Bytes.
221/// \param base
222/// A pointer to base address.
223/// \param stride
224/// The stride between the rows' data to be loaded in memory.
225__DEFAULT_FN_ATTRS_TRANSPOSE
226static void __tile_2rpntlvwz1t1(__tile1024i *dst0, __tile1024i *dst1,
227 const void *base, __SIZE_TYPE__ stride) {
228 _tile_2rpntlvwz1t1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile,
229 &dst1->tile, base, stride);
230}
231
232/// Transpose 32-bit elements from src and write the result to dst.
233///
234/// \headerfile <immintrin.h>
235///
236/// This intrinsic corresponds to the <c> TTRANSPOSED </c> instruction.
237///
238/// \param dst
239/// The destination tile. Max size is 1024 Bytes.
240/// \param src
241/// The source tile. Max size is 1024 Bytes.
242__DEFAULT_FN_ATTRS_TRANSPOSE
243static void __tile_transposed(__tile1024i *dst, __tile1024i src) {
244 dst->tile = _tile_transposed_internal(dst->row, dst->col, src.tile);
245}
246
247#endif /* __x86_64__ */
248#endif /* __AMX_TRANSPOSEINTRIN_H */
lib/include/arm_acle.h+37-27
...@@ -55,11 +55,37 @@ __chkfeat(uint64_t __features) {...@@ -55,11 +55,37 @@ __chkfeat(uint64_t __features) {
55/* 7.5 Swap */55/* 7.5 Swap */
56static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))56static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
57__swp(uint32_t __x, volatile uint32_t *__p) {57__swp(uint32_t __x, volatile uint32_t *__p) {
58 uint32_t v;58 uint32_t __v;
59 do59#if (__ARM_FEATURE_LDREX & 4) || __ARM_ARCH_6M__ || __linux__
60 v = __builtin_arm_ldrex(__p);60 /*
61 while (__builtin_arm_strex(__x, __p));61 * Using this clang builtin is sensible in most situations. Where
62 return v;62 * LDREX and STREX are available, it will compile to a loop using
63 * them. Otherwise it will compile to a libcall, requiring the
64 * runtime to provide that library function.
65 *
66 * That's unavoidable on Armv6-M, which has no atomic instructions
67 * at all (not even SWP), so in that situation the user will just
68 * have to provide an implementation of __atomic_exchange_4 (perhaps
69 * it would temporarily disable interrupts, and then do a separate
70 * load and store).
71 *
72 * We also use the libcall strategy on pre-Armv7 Linux targets, on
73 * the theory that Linux's runtime support library _will_ provide a
74 * suitable libcall, and it's better to use that than the SWP
75 * instruction because then when the same binary is run on a later
76 * Linux system the libcall implementation will use LDREX instead.
77 */
78 __v = __atomic_exchange_n(__p, __x, __ATOMIC_RELAXED);
79#else
80 /*
81 * But for older Arm architectures when the target is not Linux, we
82 * fall back to using the SWP instruction via inline assembler. ACLE
83 * is clear that we're allowed to do this, but shouldn't do it if we
84 * have a better alternative.
85 */
86 __asm__("swp %0, %1, [%2]" : "=r"(__v) : "r"(__x), "r"(__p) : "memory");
87#endif
88 return __v;
63}89}
6490
65/* 7.6 Memory prefetch intrinsics */91/* 7.6 Memory prefetch intrinsics */
...@@ -72,6 +98,12 @@ __swp(uint32_t __x, volatile uint32_t *__p) {...@@ -72,6 +98,12 @@ __swp(uint32_t __x, volatile uint32_t *__p) {
72#else98#else
73#define __pldx(access_kind, cache_level, retention_policy, addr) \99#define __pldx(access_kind, cache_level, retention_policy, addr) \
74 __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)100 __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
101#define __pldx_range(access_kind, retention_policy, length, count, stride, \
102 reuse_distance, addr) \
103 __builtin_arm_range_prefetch_x(addr, access_kind, retention_policy, length, \
104 count, stride, reuse_distance)
105#define __pld_range(access_kind, retention_policy, metadata, addr) \
106 __builtin_arm_range_prefetch(addr, access_kind, retention_policy, metadata)
75#endif107#endif
76108
77/* 7.6.2 Instruction prefetch */109/* 7.6.2 Instruction prefetch */
...@@ -795,28 +827,6 @@ __arm_st64bv0(void *__addr, data512_t __value) {...@@ -795,28 +827,6 @@ __arm_st64bv0(void *__addr, data512_t __value) {
795827
796#endif // __ARM_FEATURE_COPROC828#endif // __ARM_FEATURE_COPROC
797829
798/* 17 Transactional Memory Extension (TME) Intrinsics */
799#if defined(__ARM_FEATURE_TME) && __ARM_FEATURE_TME
800
801#define _TMFAILURE_REASON 0x00007fffu
802#define _TMFAILURE_RTRY 0x00008000u
803#define _TMFAILURE_CNCL 0x00010000u
804#define _TMFAILURE_MEM 0x00020000u
805#define _TMFAILURE_IMP 0x00040000u
806#define _TMFAILURE_ERR 0x00080000u
807#define _TMFAILURE_SIZE 0x00100000u
808#define _TMFAILURE_NEST 0x00200000u
809#define _TMFAILURE_DBG 0x00400000u
810#define _TMFAILURE_INT 0x00800000u
811#define _TMFAILURE_TRIVIAL 0x01000000u
812
813#define __tstart() __builtin_arm_tstart()
814#define __tcommit() __builtin_arm_tcommit()
815#define __tcancel(__arg) __builtin_arm_tcancel(__arg)
816#define __ttest() __builtin_arm_ttest()
817
818#endif /* __ARM_FEATURE_TME */
819
820/* 8.7 Armv8.5-A Random number generation intrinsics */830/* 8.7 Armv8.5-A Random number generation intrinsics */
821#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE831#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE
822static __inline__ int __attribute__((__always_inline__, __nodebug__, target("rand")))832static __inline__ int __attribute__((__always_inline__, __nodebug__, target("rand")))
lib/include/arm_neon.h+218-82
...@@ -10562,7 +10562,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t...@@ -10562,7 +10562,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t
10562#define vget_lane_p8(__p0, __p1) __extension__ ({ \10562#define vget_lane_p8(__p0, __p1) __extension__ ({ \
10563 poly8_t __ret; \10563 poly8_t __ret; \
10564 poly8x8_t __s0 = __p0; \10564 poly8x8_t __s0 = __p0; \
10565 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__s0, __p1)); \10565 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__builtin_bit_cast(int8x8_t, __s0), __p1)); \
10566 __ret; \10566 __ret; \
10567})10567})
10568#else10568#else
...@@ -10570,13 +10570,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t...@@ -10570,13 +10570,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t
10570 poly8_t __ret; \10570 poly8_t __ret; \
10571 poly8x8_t __s0 = __p0; \10571 poly8x8_t __s0 = __p0; \
10572 poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_8); \10572 poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_8); \
10573 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__rev0, __p1)); \10573 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__builtin_bit_cast(int8x8_t, __rev0), __p1)); \
10574 __ret; \10574 __ret; \
10575})10575})
10576#define __noswap_vget_lane_p8(__p0, __p1) __extension__ ({ \10576#define __noswap_vget_lane_p8(__p0, __p1) __extension__ ({ \
10577 poly8_t __ret; \10577 poly8_t __ret; \
10578 poly8x8_t __s0 = __p0; \10578 poly8x8_t __s0 = __p0; \
10579 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__s0, __p1)); \10579 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__builtin_bit_cast(int8x8_t, __s0), __p1)); \
10580 __ret; \10580 __ret; \
10581})10581})
10582#endif10582#endif
...@@ -10585,7 +10585,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t...@@ -10585,7 +10585,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t
10585#define vget_lane_p16(__p0, __p1) __extension__ ({ \10585#define vget_lane_p16(__p0, __p1) __extension__ ({ \
10586 poly16_t __ret; \10586 poly16_t __ret; \
10587 poly16x4_t __s0 = __p0; \10587 poly16x4_t __s0 = __p0; \
10588 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__s0, __p1)); \10588 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__builtin_bit_cast(int16x4_t, __s0), __p1)); \
10589 __ret; \10589 __ret; \
10590})10590})
10591#else10591#else
...@@ -10593,13 +10593,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t...@@ -10593,13 +10593,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t
10593 poly16_t __ret; \10593 poly16_t __ret; \
10594 poly16x4_t __s0 = __p0; \10594 poly16x4_t __s0 = __p0; \
10595 poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_16); \10595 poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_16); \
10596 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__rev0, __p1)); \10596 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__builtin_bit_cast(int16x4_t, __rev0), __p1)); \
10597 __ret; \10597 __ret; \
10598})10598})
10599#define __noswap_vget_lane_p16(__p0, __p1) __extension__ ({ \10599#define __noswap_vget_lane_p16(__p0, __p1) __extension__ ({ \
10600 poly16_t __ret; \10600 poly16_t __ret; \
10601 poly16x4_t __s0 = __p0; \10601 poly16x4_t __s0 = __p0; \
10602 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__s0, __p1)); \10602 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__builtin_bit_cast(int16x4_t, __s0), __p1)); \
10603 __ret; \10603 __ret; \
10604})10604})
10605#endif10605#endif
...@@ -10608,7 +10608,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t...@@ -10608,7 +10608,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t
10608#define vgetq_lane_p8(__p0, __p1) __extension__ ({ \10608#define vgetq_lane_p8(__p0, __p1) __extension__ ({ \
10609 poly8_t __ret; \10609 poly8_t __ret; \
10610 poly8x16_t __s0 = __p0; \10610 poly8x16_t __s0 = __p0; \
10611 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__s0, __p1)); \10611 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__builtin_bit_cast(int8x16_t, __s0), __p1)); \
10612 __ret; \10612 __ret; \
10613})10613})
10614#else10614#else
...@@ -10616,13 +10616,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t...@@ -10616,13 +10616,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t
10616 poly8_t __ret; \10616 poly8_t __ret; \
10617 poly8x16_t __s0 = __p0; \10617 poly8x16_t __s0 = __p0; \
10618 poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_8); \10618 poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_8); \
10619 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__rev0, __p1)); \10619 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__builtin_bit_cast(int8x16_t, __rev0), __p1)); \
10620 __ret; \10620 __ret; \
10621})10621})
10622#define __noswap_vgetq_lane_p8(__p0, __p1) __extension__ ({ \10622#define __noswap_vgetq_lane_p8(__p0, __p1) __extension__ ({ \
10623 poly8_t __ret; \10623 poly8_t __ret; \
10624 poly8x16_t __s0 = __p0; \10624 poly8x16_t __s0 = __p0; \
10625 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__s0, __p1)); \10625 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__builtin_bit_cast(int8x16_t, __s0), __p1)); \
10626 __ret; \10626 __ret; \
10627})10627})
10628#endif10628#endif
...@@ -10631,7 +10631,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t...@@ -10631,7 +10631,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t
10631#define vgetq_lane_p16(__p0, __p1) __extension__ ({ \10631#define vgetq_lane_p16(__p0, __p1) __extension__ ({ \
10632 poly16_t __ret; \10632 poly16_t __ret; \
10633 poly16x8_t __s0 = __p0; \10633 poly16x8_t __s0 = __p0; \
10634 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__s0, __p1)); \10634 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__builtin_bit_cast(int16x8_t, __s0), __p1)); \
10635 __ret; \10635 __ret; \
10636})10636})
10637#else10637#else
...@@ -10639,13 +10639,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t...@@ -10639,13 +10639,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t
10639 poly16_t __ret; \10639 poly16_t __ret; \
10640 poly16x8_t __s0 = __p0; \10640 poly16x8_t __s0 = __p0; \
10641 poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_16); \10641 poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_16); \
10642 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__rev0, __p1)); \10642 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__builtin_bit_cast(int16x8_t, __rev0), __p1)); \
10643 __ret; \10643 __ret; \
10644})10644})
10645#define __noswap_vgetq_lane_p16(__p0, __p1) __extension__ ({ \10645#define __noswap_vgetq_lane_p16(__p0, __p1) __extension__ ({ \
10646 poly16_t __ret; \10646 poly16_t __ret; \
10647 poly16x8_t __s0 = __p0; \10647 poly16x8_t __s0 = __p0; \
10648 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__s0, __p1)); \10648 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__builtin_bit_cast(int16x8_t, __s0), __p1)); \
10649 __ret; \10649 __ret; \
10650})10650})
10651#endif10651#endif
...@@ -27027,7 +27027,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27027,7 +27027,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27027 poly8x8_t __ret; \27027 poly8x8_t __ret; \
27028 poly8_t __s0 = __p0; \27028 poly8_t __s0 = __p0; \
27029 poly8x8_t __s1 = __p1; \27029 poly8x8_t __s1 = __p1; \
27030 __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __s1, __p2)); \27030 __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __builtin_bit_cast(int8x8_t, __s1), __p2)); \
27031 __ret; \27031 __ret; \
27032})27032})
27033#else27033#else
...@@ -27036,7 +27036,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27036,7 +27036,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27036 poly8_t __s0 = __p0; \27036 poly8_t __s0 = __p0; \
27037 poly8x8_t __s1 = __p1; \27037 poly8x8_t __s1 = __p1; \
27038 poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_64_8); \27038 poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_64_8); \
27039 __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __rev1, __p2)); \27039 __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __builtin_bit_cast(int8x8_t, __rev1), __p2)); \
27040 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_64_8); \27040 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_64_8); \
27041 __ret; \27041 __ret; \
27042})27042})
...@@ -27044,7 +27044,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27044,7 +27044,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27044 poly8x8_t __ret; \27044 poly8x8_t __ret; \
27045 poly8_t __s0 = __p0; \27045 poly8_t __s0 = __p0; \
27046 poly8x8_t __s1 = __p1; \27046 poly8x8_t __s1 = __p1; \
27047 __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __s1, __p2)); \27047 __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __builtin_bit_cast(int8x8_t, __s1), __p2)); \
27048 __ret; \27048 __ret; \
27049})27049})
27050#endif27050#endif
...@@ -27054,7 +27054,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27054,7 +27054,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27054 poly16x4_t __ret; \27054 poly16x4_t __ret; \
27055 poly16_t __s0 = __p0; \27055 poly16_t __s0 = __p0; \
27056 poly16x4_t __s1 = __p1; \27056 poly16x4_t __s1 = __p1; \
27057 __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __s1, __p2)); \27057 __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __builtin_bit_cast(int16x4_t, __s1), __p2)); \
27058 __ret; \27058 __ret; \
27059})27059})
27060#else27060#else
...@@ -27063,7 +27063,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27063,7 +27063,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27063 poly16_t __s0 = __p0; \27063 poly16_t __s0 = __p0; \
27064 poly16x4_t __s1 = __p1; \27064 poly16x4_t __s1 = __p1; \
27065 poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_64_16); \27065 poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_64_16); \
27066 __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __rev1, __p2)); \27066 __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __builtin_bit_cast(int16x4_t, __rev1), __p2)); \
27067 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_64_16); \27067 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_64_16); \
27068 __ret; \27068 __ret; \
27069})27069})
...@@ -27071,7 +27071,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27071,7 +27071,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27071 poly16x4_t __ret; \27071 poly16x4_t __ret; \
27072 poly16_t __s0 = __p0; \27072 poly16_t __s0 = __p0; \
27073 poly16x4_t __s1 = __p1; \27073 poly16x4_t __s1 = __p1; \
27074 __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __s1, __p2)); \27074 __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __builtin_bit_cast(int16x4_t, __s1), __p2)); \
27075 __ret; \27075 __ret; \
27076})27076})
27077#endif27077#endif
...@@ -27081,7 +27081,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27081,7 +27081,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27081 poly8x16_t __ret; \27081 poly8x16_t __ret; \
27082 poly8_t __s0 = __p0; \27082 poly8_t __s0 = __p0; \
27083 poly8x16_t __s1 = __p1; \27083 poly8x16_t __s1 = __p1; \
27084 __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __s1, __p2)); \27084 __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __builtin_bit_cast(int8x16_t, __s1), __p2)); \
27085 __ret; \27085 __ret; \
27086})27086})
27087#else27087#else
...@@ -27090,7 +27090,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27090,7 +27090,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27090 poly8_t __s0 = __p0; \27090 poly8_t __s0 = __p0; \
27091 poly8x16_t __s1 = __p1; \27091 poly8x16_t __s1 = __p1; \
27092 poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_8); \27092 poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_8); \
27093 __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __rev1, __p2)); \27093 __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __builtin_bit_cast(int8x16_t, __rev1), __p2)); \
27094 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_8); \27094 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_8); \
27095 __ret; \27095 __ret; \
27096})27096})
...@@ -27098,7 +27098,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27098,7 +27098,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27098 poly8x16_t __ret; \27098 poly8x16_t __ret; \
27099 poly8_t __s0 = __p0; \27099 poly8_t __s0 = __p0; \
27100 poly8x16_t __s1 = __p1; \27100 poly8x16_t __s1 = __p1; \
27101 __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __s1, __p2)); \27101 __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __builtin_bit_cast(int8x16_t, __s1), __p2)); \
27102 __ret; \27102 __ret; \
27103})27103})
27104#endif27104#endif
...@@ -27108,7 +27108,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27108,7 +27108,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27108 poly16x8_t __ret; \27108 poly16x8_t __ret; \
27109 poly16_t __s0 = __p0; \27109 poly16_t __s0 = __p0; \
27110 poly16x8_t __s1 = __p1; \27110 poly16x8_t __s1 = __p1; \
27111 __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __s1, __p2)); \27111 __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __builtin_bit_cast(int16x8_t, __s1), __p2)); \
27112 __ret; \27112 __ret; \
27113})27113})
27114#else27114#else
...@@ -27117,7 +27117,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27117,7 +27117,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27117 poly16_t __s0 = __p0; \27117 poly16_t __s0 = __p0; \
27118 poly16x8_t __s1 = __p1; \27118 poly16x8_t __s1 = __p1; \
27119 poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_16); \27119 poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_16); \
27120 __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __rev1, __p2)); \27120 __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __builtin_bit_cast(int16x8_t, __rev1), __p2)); \
27121 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_16); \27121 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_16); \
27122 __ret; \27122 __ret; \
27123})27123})
...@@ -27125,7 +27125,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p...@@ -27125,7 +27125,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p
27125 poly16x8_t __ret; \27125 poly16x8_t __ret; \
27126 poly16_t __s0 = __p0; \27126 poly16_t __s0 = __p0; \
27127 poly16x8_t __s1 = __p1; \27127 poly16x8_t __s1 = __p1; \
27128 __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __s1, __p2)); \27128 __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __builtin_bit_cast(int16x8_t, __s1), __p2)); \
27129 __ret; \27129 __ret; \
27130})27130})
27131#endif27131#endif
...@@ -41141,6 +41141,42 @@ __ai __attribute__((target("neon"))) float32x2_t vfms_f32(float32x2_t __p0, floa...@@ -41141,6 +41141,42 @@ __ai __attribute__((target("neon"))) float32x2_t vfms_f32(float32x2_t __p0, floa
4114141141
41142#endif41142#endif
41143#if defined(__aarch64__)41143#if defined(__aarch64__)
41144#ifdef __LITTLE_ENDIAN__
41145__ai __attribute__((target("f8f16mm,neon"))) float16x8_t vmmlaq_f16_mf8_fpm(float16x8_t __p0, mfloat8x16_t __p1, mfloat8x16_t __p2, fpm_t __p3) {
41146 float16x8_t __ret;
41147 __ret = __builtin_bit_cast(float16x8_t, __builtin_neon_vmmlaq_f16_mf8_fpm(__builtin_bit_cast(int8x16_t, __p0), __p1, __p2, __p3));
41148 return __ret;
41149}
41150#else
41151__ai __attribute__((target("f8f16mm,neon"))) float16x8_t vmmlaq_f16_mf8_fpm(float16x8_t __p0, mfloat8x16_t __p1, mfloat8x16_t __p2, fpm_t __p3) {
41152 float16x8_t __ret;
41153 float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, __lane_reverse_128_16);
41154 mfloat8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, __lane_reverse_128_8);
41155 mfloat8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, __lane_reverse_128_8);
41156 __ret = __builtin_bit_cast(float16x8_t, __builtin_neon_vmmlaq_f16_mf8_fpm(__builtin_bit_cast(int8x16_t, __rev0), __rev1, __rev2, __p3));
41157 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_16);
41158 return __ret;
41159}
41160#endif
41161
41162#ifdef __LITTLE_ENDIAN__
41163__ai __attribute__((target("f8f32mm,neon"))) float32x4_t vmmlaq_f32_mf8_fpm(float32x4_t __p0, mfloat8x16_t __p1, mfloat8x16_t __p2, fpm_t __p3) {
41164 float32x4_t __ret;
41165 __ret = __builtin_bit_cast(float32x4_t, __builtin_neon_vmmlaq_f32_mf8_fpm(__p0, __p1, __p2, __p3));
41166 return __ret;
41167}
41168#else
41169__ai __attribute__((target("f8f32mm,neon"))) float32x4_t vmmlaq_f32_mf8_fpm(float32x4_t __p0, mfloat8x16_t __p1, mfloat8x16_t __p2, fpm_t __p3) {
41170 float32x4_t __ret;
41171 float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, __lane_reverse_128_32);
41172 mfloat8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, __lane_reverse_128_8);
41173 mfloat8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, __lane_reverse_128_8);
41174 __ret = __builtin_bit_cast(float32x4_t, __builtin_neon_vmmlaq_f32_mf8_fpm(__rev0, __rev1, __rev2, __p3));
41175 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_32);
41176 return __ret;
41177}
41178#endif
41179
41144#ifdef __LITTLE_ENDIAN__41180#ifdef __LITTLE_ENDIAN__
41145__ai __attribute__((target("fp8,neon"))) bfloat16x8_t vcvt1_bf16_mf8_fpm(mfloat8x8_t __p0, fpm_t __p1) {41181__ai __attribute__((target("fp8,neon"))) bfloat16x8_t vcvt1_bf16_mf8_fpm(mfloat8x8_t __p0, fpm_t __p1) {
41146 bfloat16x8_t __ret;41182 bfloat16x8_t __ret;
...@@ -49847,6 +49883,16 @@ __ai __attribute__((target("neon"))) int32_t vcvts_s32_f32(float32_t __p0) {...@@ -49847,6 +49883,16 @@ __ai __attribute__((target("neon"))) int32_t vcvts_s32_f32(float32_t __p0) {
49847 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvts_s32_f32(__p0));49883 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvts_s32_f32(__p0));
49848 return __ret;49884 return __ret;
49849}49885}
49886__ai __attribute__((target("neon"))) int32_t vcvtd_s32_f64(float64_t __p0) {
49887 int32_t __ret;
49888 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtd_s32_f64(__p0));
49889 return __ret;
49890}
49891__ai __attribute__((target("neon"))) int64_t vcvts_s64_f32(float32_t __p0) {
49892 int64_t __ret;
49893 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvts_s64_f32(__p0));
49894 return __ret;
49895}
49850__ai __attribute__((target("neon"))) int64_t vcvtd_s64_f64(float64_t __p0) {49896__ai __attribute__((target("neon"))) int64_t vcvtd_s64_f64(float64_t __p0) {
49851 int64_t __ret;49897 int64_t __ret;
49852 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtd_s64_f64(__p0));49898 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtd_s64_f64(__p0));
...@@ -49878,6 +49924,16 @@ __ai __attribute__((target("neon"))) uint32_t vcvts_u32_f32(float32_t __p0) {...@@ -49878,6 +49924,16 @@ __ai __attribute__((target("neon"))) uint32_t vcvts_u32_f32(float32_t __p0) {
49878 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvts_u32_f32(__p0));49924 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvts_u32_f32(__p0));
49879 return __ret;49925 return __ret;
49880}49926}
49927__ai __attribute__((target("neon"))) uint32_t vcvtd_u32_f64(float64_t __p0) {
49928 uint32_t __ret;
49929 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtd_u32_f64(__p0));
49930 return __ret;
49931}
49932__ai __attribute__((target("neon"))) uint64_t vcvts_u64_f32(float32_t __p0) {
49933 uint64_t __ret;
49934 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvts_u64_f32(__p0));
49935 return __ret;
49936}
49881__ai __attribute__((target("neon"))) uint64_t vcvtd_u64_f64(float64_t __p0) {49937__ai __attribute__((target("neon"))) uint64_t vcvtd_u64_f64(float64_t __p0) {
49882 uint64_t __ret;49938 uint64_t __ret;
49883 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtd_u64_f64(__p0));49939 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtd_u64_f64(__p0));
...@@ -49909,6 +49965,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtas_s32_f32(float32_t __p0) {...@@ -49909,6 +49965,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtas_s32_f32(float32_t __p0) {
49909 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtas_s32_f32(__p0));49965 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtas_s32_f32(__p0));
49910 return __ret;49966 return __ret;
49911}49967}
49968__ai __attribute__((target("neon"))) int32_t vcvtad_s32_f64(float64_t __p0) {
49969 int32_t __ret;
49970 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtad_s32_f64(__p0));
49971 return __ret;
49972}
49912#ifdef __LITTLE_ENDIAN__49973#ifdef __LITTLE_ENDIAN__
49913__ai __attribute__((target("neon"))) int64x2_t vcvtaq_s64_f64(float64x2_t __p0) {49974__ai __attribute__((target("neon"))) int64x2_t vcvtaq_s64_f64(float64x2_t __p0) {
49914 int64x2_t __ret;49975 int64x2_t __ret;
...@@ -49930,6 +49991,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvta_s64_f64(float64x1_t __p0) {...@@ -49930,6 +49991,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvta_s64_f64(float64x1_t __p0) {
49930 __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvta_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3));49991 __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvta_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3));
49931 return __ret;49992 return __ret;
49932}49993}
49994__ai __attribute__((target("neon"))) int64_t vcvtas_s64_f32(float32_t __p0) {
49995 int64_t __ret;
49996 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtas_s64_f32(__p0));
49997 return __ret;
49998}
49933__ai __attribute__((target("neon"))) int64_t vcvtad_s64_f64(float64_t __p0) {49999__ai __attribute__((target("neon"))) int64_t vcvtad_s64_f64(float64_t __p0) {
49934 int64_t __ret;50000 int64_t __ret;
49935 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtad_s64_f64(__p0));50001 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtad_s64_f64(__p0));
...@@ -49940,6 +50006,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtas_u32_f32(float32_t __p0) {...@@ -49940,6 +50006,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtas_u32_f32(float32_t __p0) {
49940 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtas_u32_f32(__p0));50006 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtas_u32_f32(__p0));
49941 return __ret;50007 return __ret;
49942}50008}
50009__ai __attribute__((target("neon"))) uint32_t vcvtad_u32_f64(float64_t __p0) {
50010 uint32_t __ret;
50011 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtad_u32_f64(__p0));
50012 return __ret;
50013}
49943#ifdef __LITTLE_ENDIAN__50014#ifdef __LITTLE_ENDIAN__
49944__ai __attribute__((target("neon"))) uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) {50015__ai __attribute__((target("neon"))) uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) {
49945 uint64x2_t __ret;50016 uint64x2_t __ret;
...@@ -49961,6 +50032,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvta_u64_f64(float64x1_t __p0)...@@ -49961,6 +50032,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvta_u64_f64(float64x1_t __p0)
49961 __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvta_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19));50032 __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvta_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19));
49962 return __ret;50033 return __ret;
49963}50034}
50035__ai __attribute__((target("neon"))) uint64_t vcvtas_u64_f32(float32_t __p0) {
50036 uint64_t __ret;
50037 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtas_u64_f32(__p0));
50038 return __ret;
50039}
49964__ai __attribute__((target("neon"))) uint64_t vcvtad_u64_f64(float64_t __p0) {50040__ai __attribute__((target("neon"))) uint64_t vcvtad_u64_f64(float64_t __p0) {
49965 uint64_t __ret;50041 uint64_t __ret;
49966 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtad_u64_f64(__p0));50042 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtad_u64_f64(__p0));
...@@ -49971,6 +50047,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtms_s32_f32(float32_t __p0) {...@@ -49971,6 +50047,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtms_s32_f32(float32_t __p0) {
49971 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtms_s32_f32(__p0));50047 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtms_s32_f32(__p0));
49972 return __ret;50048 return __ret;
49973}50049}
50050__ai __attribute__((target("neon"))) int32_t vcvtmd_s32_f64(float64_t __p0) {
50051 int32_t __ret;
50052 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtmd_s32_f64(__p0));
50053 return __ret;
50054}
49974#ifdef __LITTLE_ENDIAN__50055#ifdef __LITTLE_ENDIAN__
49975__ai __attribute__((target("neon"))) int64x2_t vcvtmq_s64_f64(float64x2_t __p0) {50056__ai __attribute__((target("neon"))) int64x2_t vcvtmq_s64_f64(float64x2_t __p0) {
49976 int64x2_t __ret;50057 int64x2_t __ret;
...@@ -49992,6 +50073,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtm_s64_f64(float64x1_t __p0) {...@@ -49992,6 +50073,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtm_s64_f64(float64x1_t __p0) {
49992 __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtm_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3));50073 __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtm_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3));
49993 return __ret;50074 return __ret;
49994}50075}
50076__ai __attribute__((target("neon"))) int64_t vcvtms_s64_f32(float32_t __p0) {
50077 int64_t __ret;
50078 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtms_s64_f32(__p0));
50079 return __ret;
50080}
49995__ai __attribute__((target("neon"))) int64_t vcvtmd_s64_f64(float64_t __p0) {50081__ai __attribute__((target("neon"))) int64_t vcvtmd_s64_f64(float64_t __p0) {
49996 int64_t __ret;50082 int64_t __ret;
49997 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtmd_s64_f64(__p0));50083 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtmd_s64_f64(__p0));
...@@ -50002,6 +50088,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtms_u32_f32(float32_t __p0) {...@@ -50002,6 +50088,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtms_u32_f32(float32_t __p0) {
50002 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtms_u32_f32(__p0));50088 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtms_u32_f32(__p0));
50003 return __ret;50089 return __ret;
50004}50090}
50091__ai __attribute__((target("neon"))) uint32_t vcvtmd_u32_f64(float64_t __p0) {
50092 uint32_t __ret;
50093 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtmd_u32_f64(__p0));
50094 return __ret;
50095}
50005#ifdef __LITTLE_ENDIAN__50096#ifdef __LITTLE_ENDIAN__
50006__ai __attribute__((target("neon"))) uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) {50097__ai __attribute__((target("neon"))) uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) {
50007 uint64x2_t __ret;50098 uint64x2_t __ret;
...@@ -50023,6 +50114,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtm_u64_f64(float64x1_t __p0)...@@ -50023,6 +50114,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtm_u64_f64(float64x1_t __p0)
50023 __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtm_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19));50114 __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtm_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19));
50024 return __ret;50115 return __ret;
50025}50116}
50117__ai __attribute__((target("neon"))) uint64_t vcvtms_u64_f32(float32_t __p0) {
50118 uint64_t __ret;
50119 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtms_u64_f32(__p0));
50120 return __ret;
50121}
50026__ai __attribute__((target("neon"))) uint64_t vcvtmd_u64_f64(float64_t __p0) {50122__ai __attribute__((target("neon"))) uint64_t vcvtmd_u64_f64(float64_t __p0) {
50027 uint64_t __ret;50123 uint64_t __ret;
50028 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtmd_u64_f64(__p0));50124 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtmd_u64_f64(__p0));
...@@ -50033,6 +50129,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtns_s32_f32(float32_t __p0) {...@@ -50033,6 +50129,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtns_s32_f32(float32_t __p0) {
50033 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtns_s32_f32(__p0));50129 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtns_s32_f32(__p0));
50034 return __ret;50130 return __ret;
50035}50131}
50132__ai __attribute__((target("neon"))) int32_t vcvtnd_s32_f64(float64_t __p0) {
50133 int32_t __ret;
50134 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtnd_s32_f64(__p0));
50135 return __ret;
50136}
50036#ifdef __LITTLE_ENDIAN__50137#ifdef __LITTLE_ENDIAN__
50037__ai __attribute__((target("neon"))) int64x2_t vcvtnq_s64_f64(float64x2_t __p0) {50138__ai __attribute__((target("neon"))) int64x2_t vcvtnq_s64_f64(float64x2_t __p0) {
50038 int64x2_t __ret;50139 int64x2_t __ret;
...@@ -50054,6 +50155,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtn_s64_f64(float64x1_t __p0) {...@@ -50054,6 +50155,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtn_s64_f64(float64x1_t __p0) {
50054 __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtn_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3));50155 __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtn_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3));
50055 return __ret;50156 return __ret;
50056}50157}
50158__ai __attribute__((target("neon"))) int64_t vcvtns_s64_f32(float32_t __p0) {
50159 int64_t __ret;
50160 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtns_s64_f32(__p0));
50161 return __ret;
50162}
50057__ai __attribute__((target("neon"))) int64_t vcvtnd_s64_f64(float64_t __p0) {50163__ai __attribute__((target("neon"))) int64_t vcvtnd_s64_f64(float64_t __p0) {
50058 int64_t __ret;50164 int64_t __ret;
50059 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtnd_s64_f64(__p0));50165 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtnd_s64_f64(__p0));
...@@ -50064,6 +50170,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtns_u32_f32(float32_t __p0) {...@@ -50064,6 +50170,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtns_u32_f32(float32_t __p0) {
50064 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtns_u32_f32(__p0));50170 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtns_u32_f32(__p0));
50065 return __ret;50171 return __ret;
50066}50172}
50173__ai __attribute__((target("neon"))) uint32_t vcvtnd_u32_f64(float64_t __p0) {
50174 uint32_t __ret;
50175 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtnd_u32_f64(__p0));
50176 return __ret;
50177}
50067#ifdef __LITTLE_ENDIAN__50178#ifdef __LITTLE_ENDIAN__
50068__ai __attribute__((target("neon"))) uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) {50179__ai __attribute__((target("neon"))) uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) {
50069 uint64x2_t __ret;50180 uint64x2_t __ret;
...@@ -50085,6 +50196,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtn_u64_f64(float64x1_t __p0)...@@ -50085,6 +50196,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtn_u64_f64(float64x1_t __p0)
50085 __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtn_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19));50196 __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtn_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19));
50086 return __ret;50197 return __ret;
50087}50198}
50199__ai __attribute__((target("neon"))) uint64_t vcvtns_u64_f32(float32_t __p0) {
50200 uint64_t __ret;
50201 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtns_u64_f32(__p0));
50202 return __ret;
50203}
50088__ai __attribute__((target("neon"))) uint64_t vcvtnd_u64_f64(float64_t __p0) {50204__ai __attribute__((target("neon"))) uint64_t vcvtnd_u64_f64(float64_t __p0) {
50089 uint64_t __ret;50205 uint64_t __ret;
50090 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtnd_u64_f64(__p0));50206 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtnd_u64_f64(__p0));
...@@ -50095,6 +50211,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtps_s32_f32(float32_t __p0) {...@@ -50095,6 +50211,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtps_s32_f32(float32_t __p0) {
50095 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtps_s32_f32(__p0));50211 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtps_s32_f32(__p0));
50096 return __ret;50212 return __ret;
50097}50213}
50214__ai __attribute__((target("neon"))) int32_t vcvtpd_s32_f64(float64_t __p0) {
50215 int32_t __ret;
50216 __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtpd_s32_f64(__p0));
50217 return __ret;
50218}
50098#ifdef __LITTLE_ENDIAN__50219#ifdef __LITTLE_ENDIAN__
50099__ai __attribute__((target("neon"))) int64x2_t vcvtpq_s64_f64(float64x2_t __p0) {50220__ai __attribute__((target("neon"))) int64x2_t vcvtpq_s64_f64(float64x2_t __p0) {
50100 int64x2_t __ret;50221 int64x2_t __ret;
...@@ -50116,6 +50237,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtp_s64_f64(float64x1_t __p0) {...@@ -50116,6 +50237,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtp_s64_f64(float64x1_t __p0) {
50116 __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtp_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3));50237 __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtp_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3));
50117 return __ret;50238 return __ret;
50118}50239}
50240__ai __attribute__((target("neon"))) int64_t vcvtps_s64_f32(float32_t __p0) {
50241 int64_t __ret;
50242 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtps_s64_f32(__p0));
50243 return __ret;
50244}
50119__ai __attribute__((target("neon"))) int64_t vcvtpd_s64_f64(float64_t __p0) {50245__ai __attribute__((target("neon"))) int64_t vcvtpd_s64_f64(float64_t __p0) {
50120 int64_t __ret;50246 int64_t __ret;
50121 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtpd_s64_f64(__p0));50247 __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtpd_s64_f64(__p0));
...@@ -50126,6 +50252,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtps_u32_f32(float32_t __p0) {...@@ -50126,6 +50252,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtps_u32_f32(float32_t __p0) {
50126 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtps_u32_f32(__p0));50252 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtps_u32_f32(__p0));
50127 return __ret;50253 return __ret;
50128}50254}
50255__ai __attribute__((target("neon"))) uint32_t vcvtpd_u32_f64(float64_t __p0) {
50256 uint32_t __ret;
50257 __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtpd_u32_f64(__p0));
50258 return __ret;
50259}
50129#ifdef __LITTLE_ENDIAN__50260#ifdef __LITTLE_ENDIAN__
50130__ai __attribute__((target("neon"))) uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) {50261__ai __attribute__((target("neon"))) uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) {
50131 uint64x2_t __ret;50262 uint64x2_t __ret;
...@@ -50147,6 +50278,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtp_u64_f64(float64x1_t __p0)...@@ -50147,6 +50278,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtp_u64_f64(float64x1_t __p0)
50147 __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtp_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19));50278 __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtp_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19));
50148 return __ret;50279 return __ret;
50149}50280}
50281__ai __attribute__((target("neon"))) uint64_t vcvtps_u64_f32(float32_t __p0) {
50282 uint64_t __ret;
50283 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtps_u64_f32(__p0));
50284 return __ret;
50285}
50150__ai __attribute__((target("neon"))) uint64_t vcvtpd_u64_f64(float64_t __p0) {50286__ai __attribute__((target("neon"))) uint64_t vcvtpd_u64_f64(float64_t __p0) {
50151 uint64_t __ret;50287 uint64_t __ret;
50152 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtpd_u64_f64(__p0));50288 __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtpd_u64_f64(__p0));
...@@ -50255,7 +50391,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa...@@ -50255,7 +50391,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa
50255#define vdupb_lane_p8(__p0, __p1) __extension__ ({ \50391#define vdupb_lane_p8(__p0, __p1) __extension__ ({ \
50256 poly8_t __ret; \50392 poly8_t __ret; \
50257 poly8x8_t __s0 = __p0; \50393 poly8x8_t __s0 = __p0; \
50258 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_lane_i8(__s0, __p1)); \50394 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_lane_i8(__builtin_bit_cast(int8x8_t, __s0), __p1)); \
50259 __ret; \50395 __ret; \
50260})50396})
50261#else50397#else
...@@ -50263,7 +50399,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa...@@ -50263,7 +50399,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa
50263 poly8_t __ret; \50399 poly8_t __ret; \
50264 poly8x8_t __s0 = __p0; \50400 poly8x8_t __s0 = __p0; \
50265 poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_8); \50401 poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_8); \
50266 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_lane_i8(__rev0, __p1)); \50402 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_lane_i8(__builtin_bit_cast(int8x8_t, __rev0), __p1)); \
50267 __ret; \50403 __ret; \
50268})50404})
50269#endif50405#endif
...@@ -50272,7 +50408,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa...@@ -50272,7 +50408,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa
50272#define vduph_lane_p16(__p0, __p1) __extension__ ({ \50408#define vduph_lane_p16(__p0, __p1) __extension__ ({ \
50273 poly16_t __ret; \50409 poly16_t __ret; \
50274 poly16x4_t __s0 = __p0; \50410 poly16x4_t __s0 = __p0; \
50275 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_lane_i16(__s0, __p1)); \50411 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_lane_i16(__builtin_bit_cast(int16x4_t, __s0), __p1)); \
50276 __ret; \50412 __ret; \
50277})50413})
50278#else50414#else
...@@ -50280,7 +50416,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa...@@ -50280,7 +50416,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa
50280 poly16_t __ret; \50416 poly16_t __ret; \
50281 poly16x4_t __s0 = __p0; \50417 poly16x4_t __s0 = __p0; \
50282 poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_16); \50418 poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_16); \
50283 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_lane_i16(__rev0, __p1)); \50419 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_lane_i16(__builtin_bit_cast(int16x4_t, __rev0), __p1)); \
50284 __ret; \50420 __ret; \
50285})50421})
50286#endif50422#endif
...@@ -50506,7 +50642,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa...@@ -50506,7 +50642,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa
50506#define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \50642#define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \
50507 poly8_t __ret; \50643 poly8_t __ret; \
50508 poly8x16_t __s0 = __p0; \50644 poly8x16_t __s0 = __p0; \
50509 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_laneq_i8(__s0, __p1)); \50645 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_laneq_i8(__builtin_bit_cast(int8x16_t, __s0), __p1)); \
50510 __ret; \50646 __ret; \
50511})50647})
50512#else50648#else
...@@ -50514,7 +50650,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa...@@ -50514,7 +50650,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa
50514 poly8_t __ret; \50650 poly8_t __ret; \
50515 poly8x16_t __s0 = __p0; \50651 poly8x16_t __s0 = __p0; \
50516 poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_8); \50652 poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_8); \
50517 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_laneq_i8(__rev0, __p1)); \50653 __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_laneq_i8(__builtin_bit_cast(int8x16_t, __rev0), __p1)); \
50518 __ret; \50654 __ret; \
50519})50655})
50520#endif50656#endif
...@@ -50523,7 +50659,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa...@@ -50523,7 +50659,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa
50523#define vduph_laneq_p16(__p0, __p1) __extension__ ({ \50659#define vduph_laneq_p16(__p0, __p1) __extension__ ({ \
50524 poly16_t __ret; \50660 poly16_t __ret; \
50525 poly16x8_t __s0 = __p0; \50661 poly16x8_t __s0 = __p0; \
50526 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_laneq_i16(__s0, __p1)); \50662 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_laneq_i16(__builtin_bit_cast(int16x8_t, __s0), __p1)); \
50527 __ret; \50663 __ret; \
50528})50664})
50529#else50665#else
...@@ -50531,7 +50667,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa...@@ -50531,7 +50667,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa
50531 poly16_t __ret; \50667 poly16_t __ret; \
50532 poly16x8_t __s0 = __p0; \50668 poly16x8_t __s0 = __p0; \
50533 poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_16); \50669 poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_16); \
50534 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_laneq_i16(__rev0, __p1)); \50670 __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_laneq_i16(__builtin_bit_cast(int16x8_t, __rev0), __p1)); \
50535 __ret; \50671 __ret; \
50536})50672})
50537#endif50673#endif
...@@ -52105,14 +52241,14 @@ __ai __attribute__((target("neon"))) float64x1_t vget_high_f64(float64x2_t __p0)...@@ -52105,14 +52241,14 @@ __ai __attribute__((target("neon"))) float64x1_t vget_high_f64(float64x2_t __p0)
52105#define vget_lane_p64(__p0, __p1) __extension__ ({ \52241#define vget_lane_p64(__p0, __p1) __extension__ ({ \
52106 poly64_t __ret; \52242 poly64_t __ret; \
52107 poly64x1_t __s0 = __p0; \52243 poly64x1_t __s0 = __p0; \
52108 __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vget_lane_i64(__s0, __p1)); \52244 __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vget_lane_i64(__builtin_bit_cast(int64x1_t, __s0), __p1)); \
52109 __ret; \52245 __ret; \
52110})52246})
52111#ifdef __LITTLE_ENDIAN__52247#ifdef __LITTLE_ENDIAN__
52112#define vgetq_lane_p64(__p0, __p1) __extension__ ({ \52248#define vgetq_lane_p64(__p0, __p1) __extension__ ({ \
52113 poly64_t __ret; \52249 poly64_t __ret; \
52114 poly64x2_t __s0 = __p0; \52250 poly64x2_t __s0 = __p0; \
52115 __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__s0, __p1)); \52251 __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__builtin_bit_cast(int64x2_t, __s0), __p1)); \
52116 __ret; \52252 __ret; \
52117})52253})
52118#else52254#else
...@@ -52120,13 +52256,13 @@ __ai __attribute__((target("neon"))) float64x1_t vget_high_f64(float64x2_t __p0)...@@ -52120,13 +52256,13 @@ __ai __attribute__((target("neon"))) float64x1_t vget_high_f64(float64x2_t __p0)
52120 poly64_t __ret; \52256 poly64_t __ret; \
52121 poly64x2_t __s0 = __p0; \52257 poly64x2_t __s0 = __p0; \
52122 poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_64); \52258 poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_64); \
52123 __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__rev0, __p1)); \52259 __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__builtin_bit_cast(int64x2_t, __rev0), __p1)); \
52124 __ret; \52260 __ret; \
52125})52261})
52126#define __noswap_vgetq_lane_p64(__p0, __p1) __extension__ ({ \52262#define __noswap_vgetq_lane_p64(__p0, __p1) __extension__ ({ \
52127 poly64_t __ret; \52263 poly64_t __ret; \
52128 poly64x2_t __s0 = __p0; \52264 poly64x2_t __s0 = __p0; \
52129 __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__s0, __p1)); \52265 __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__builtin_bit_cast(int64x2_t, __s0), __p1)); \
52130 __ret; \52266 __ret; \
52131})52267})
52132#endif52268#endif
...@@ -59743,20 +59879,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _...@@ -59743,20 +59879,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _
59743})59879})
59744#ifdef __LITTLE_ENDIAN__59880#ifdef __LITTLE_ENDIAN__
59745#define vqrshrun_high_n_s32(__p0_716, __p1_716, __p2_716) __extension__ ({ \59881#define vqrshrun_high_n_s32(__p0_716, __p1_716, __p2_716) __extension__ ({ \
59746 int16x8_t __ret_716; \59882 uint16x8_t __ret_716; \
59747 int16x4_t __s0_716 = __p0_716; \59883 uint16x4_t __s0_716 = __p0_716; \
59748 int32x4_t __s1_716 = __p1_716; \59884 int32x4_t __s1_716 = __p1_716; \
59749 __ret_716 = __builtin_bit_cast(int16x8_t, vcombine_s16(__builtin_bit_cast(int16x4_t, __s0_716), __builtin_bit_cast(int16x4_t, vqrshrun_n_s32(__s1_716, __p2_716)))); \59885 __ret_716 = __builtin_bit_cast(uint16x8_t, vcombine_u16(__builtin_bit_cast(uint16x4_t, __s0_716), __builtin_bit_cast(uint16x4_t, vqrshrun_n_s32(__s1_716, __p2_716)))); \
59750 __ret_716; \59886 __ret_716; \
59751})59887})
59752#else59888#else
59753#define vqrshrun_high_n_s32(__p0_717, __p1_717, __p2_717) __extension__ ({ \59889#define vqrshrun_high_n_s32(__p0_717, __p1_717, __p2_717) __extension__ ({ \
59754 int16x8_t __ret_717; \59890 uint16x8_t __ret_717; \
59755 int16x4_t __s0_717 = __p0_717; \59891 uint16x4_t __s0_717 = __p0_717; \
59756 int32x4_t __s1_717 = __p1_717; \59892 int32x4_t __s1_717 = __p1_717; \
59757 int16x4_t __rev0_717; __rev0_717 = __builtin_shufflevector(__s0_717, __s0_717, __lane_reverse_64_16); \59893 uint16x4_t __rev0_717; __rev0_717 = __builtin_shufflevector(__s0_717, __s0_717, __lane_reverse_64_16); \
59758 int32x4_t __rev1_717; __rev1_717 = __builtin_shufflevector(__s1_717, __s1_717, __lane_reverse_128_32); \59894 int32x4_t __rev1_717; __rev1_717 = __builtin_shufflevector(__s1_717, __s1_717, __lane_reverse_128_32); \
59759 __ret_717 = __builtin_bit_cast(int16x8_t, __noswap_vcombine_s16(__builtin_bit_cast(int16x4_t, __rev0_717), __builtin_bit_cast(int16x4_t, __noswap_vqrshrun_n_s32(__rev1_717, __p2_717)))); \59895 __ret_717 = __builtin_bit_cast(uint16x8_t, __noswap_vcombine_u16(__builtin_bit_cast(uint16x4_t, __rev0_717), __builtin_bit_cast(uint16x4_t, __noswap_vqrshrun_n_s32(__rev1_717, __p2_717)))); \
59760 __ret_717 = __builtin_shufflevector(__ret_717, __ret_717, __lane_reverse_128_16); \59896 __ret_717 = __builtin_shufflevector(__ret_717, __ret_717, __lane_reverse_128_16); \
59761 __ret_717; \59897 __ret_717; \
59762})59898})
...@@ -59764,20 +59900,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _...@@ -59764,20 +59900,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _
5976459900
59765#ifdef __LITTLE_ENDIAN__59901#ifdef __LITTLE_ENDIAN__
59766#define vqrshrun_high_n_s64(__p0_718, __p1_718, __p2_718) __extension__ ({ \59902#define vqrshrun_high_n_s64(__p0_718, __p1_718, __p2_718) __extension__ ({ \
59767 int32x4_t __ret_718; \59903 uint32x4_t __ret_718; \
59768 int32x2_t __s0_718 = __p0_718; \59904 uint32x2_t __s0_718 = __p0_718; \
59769 int64x2_t __s1_718 = __p1_718; \59905 int64x2_t __s1_718 = __p1_718; \
59770 __ret_718 = __builtin_bit_cast(int32x4_t, vcombine_s32(__builtin_bit_cast(int32x2_t, __s0_718), __builtin_bit_cast(int32x2_t, vqrshrun_n_s64(__s1_718, __p2_718)))); \59906 __ret_718 = __builtin_bit_cast(uint32x4_t, vcombine_u32(__builtin_bit_cast(uint32x2_t, __s0_718), __builtin_bit_cast(uint32x2_t, vqrshrun_n_s64(__s1_718, __p2_718)))); \
59771 __ret_718; \59907 __ret_718; \
59772})59908})
59773#else59909#else
59774#define vqrshrun_high_n_s64(__p0_719, __p1_719, __p2_719) __extension__ ({ \59910#define vqrshrun_high_n_s64(__p0_719, __p1_719, __p2_719) __extension__ ({ \
59775 int32x4_t __ret_719; \59911 uint32x4_t __ret_719; \
59776 int32x2_t __s0_719 = __p0_719; \59912 uint32x2_t __s0_719 = __p0_719; \
59777 int64x2_t __s1_719 = __p1_719; \59913 int64x2_t __s1_719 = __p1_719; \
59778 int32x2_t __rev0_719; __rev0_719 = __builtin_shufflevector(__s0_719, __s0_719, __lane_reverse_64_32); \59914 uint32x2_t __rev0_719; __rev0_719 = __builtin_shufflevector(__s0_719, __s0_719, __lane_reverse_64_32); \
59779 int64x2_t __rev1_719; __rev1_719 = __builtin_shufflevector(__s1_719, __s1_719, __lane_reverse_128_64); \59915 int64x2_t __rev1_719; __rev1_719 = __builtin_shufflevector(__s1_719, __s1_719, __lane_reverse_128_64); \
59780 __ret_719 = __builtin_bit_cast(int32x4_t, __noswap_vcombine_s32(__builtin_bit_cast(int32x2_t, __rev0_719), __builtin_bit_cast(int32x2_t, __noswap_vqrshrun_n_s64(__rev1_719, __p2_719)))); \59916 __ret_719 = __builtin_bit_cast(uint32x4_t, __noswap_vcombine_u32(__builtin_bit_cast(uint32x2_t, __rev0_719), __builtin_bit_cast(uint32x2_t, __noswap_vqrshrun_n_s64(__rev1_719, __p2_719)))); \
59781 __ret_719 = __builtin_shufflevector(__ret_719, __ret_719, __lane_reverse_128_32); \59917 __ret_719 = __builtin_shufflevector(__ret_719, __ret_719, __lane_reverse_128_32); \
59782 __ret_719; \59918 __ret_719; \
59783})59919})
...@@ -59785,20 +59921,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _...@@ -59785,20 +59921,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _
5978559921
59786#ifdef __LITTLE_ENDIAN__59922#ifdef __LITTLE_ENDIAN__
59787#define vqrshrun_high_n_s16(__p0_720, __p1_720, __p2_720) __extension__ ({ \59923#define vqrshrun_high_n_s16(__p0_720, __p1_720, __p2_720) __extension__ ({ \
59788 int8x16_t __ret_720; \59924 uint8x16_t __ret_720; \
59789 int8x8_t __s0_720 = __p0_720; \59925 uint8x8_t __s0_720 = __p0_720; \
59790 int16x8_t __s1_720 = __p1_720; \59926 int16x8_t __s1_720 = __p1_720; \
59791 __ret_720 = __builtin_bit_cast(int8x16_t, vcombine_s8(__builtin_bit_cast(int8x8_t, __s0_720), __builtin_bit_cast(int8x8_t, vqrshrun_n_s16(__s1_720, __p2_720)))); \59927 __ret_720 = __builtin_bit_cast(uint8x16_t, vcombine_u8(__builtin_bit_cast(uint8x8_t, __s0_720), __builtin_bit_cast(uint8x8_t, vqrshrun_n_s16(__s1_720, __p2_720)))); \
59792 __ret_720; \59928 __ret_720; \
59793})59929})
59794#else59930#else
59795#define vqrshrun_high_n_s16(__p0_721, __p1_721, __p2_721) __extension__ ({ \59931#define vqrshrun_high_n_s16(__p0_721, __p1_721, __p2_721) __extension__ ({ \
59796 int8x16_t __ret_721; \59932 uint8x16_t __ret_721; \
59797 int8x8_t __s0_721 = __p0_721; \59933 uint8x8_t __s0_721 = __p0_721; \
59798 int16x8_t __s1_721 = __p1_721; \59934 int16x8_t __s1_721 = __p1_721; \
59799 int8x8_t __rev0_721; __rev0_721 = __builtin_shufflevector(__s0_721, __s0_721, __lane_reverse_64_8); \59935 uint8x8_t __rev0_721; __rev0_721 = __builtin_shufflevector(__s0_721, __s0_721, __lane_reverse_64_8); \
59800 int16x8_t __rev1_721; __rev1_721 = __builtin_shufflevector(__s1_721, __s1_721, __lane_reverse_128_16); \59936 int16x8_t __rev1_721; __rev1_721 = __builtin_shufflevector(__s1_721, __s1_721, __lane_reverse_128_16); \
59801 __ret_721 = __builtin_bit_cast(int8x16_t, __noswap_vcombine_s8(__builtin_bit_cast(int8x8_t, __rev0_721), __builtin_bit_cast(int8x8_t, __noswap_vqrshrun_n_s16(__rev1_721, __p2_721)))); \59937 __ret_721 = __builtin_bit_cast(uint8x16_t, __noswap_vcombine_u8(__builtin_bit_cast(uint8x8_t, __rev0_721), __builtin_bit_cast(uint8x8_t, __noswap_vqrshrun_n_s16(__rev1_721, __p2_721)))); \
59802 __ret_721 = __builtin_shufflevector(__ret_721, __ret_721, __lane_reverse_128_8); \59938 __ret_721 = __builtin_shufflevector(__ret_721, __ret_721, __lane_reverse_128_8); \
59803 __ret_721; \59939 __ret_721; \
59804})59940})
...@@ -60098,20 +60234,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __...@@ -60098,20 +60234,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __
60098})60234})
60099#ifdef __LITTLE_ENDIAN__60235#ifdef __LITTLE_ENDIAN__
60100#define vqshrun_high_n_s32(__p0_734, __p1_734, __p2_734) __extension__ ({ \60236#define vqshrun_high_n_s32(__p0_734, __p1_734, __p2_734) __extension__ ({ \
60101 int16x8_t __ret_734; \60237 uint16x8_t __ret_734; \
60102 int16x4_t __s0_734 = __p0_734; \60238 uint16x4_t __s0_734 = __p0_734; \
60103 int32x4_t __s1_734 = __p1_734; \60239 int32x4_t __s1_734 = __p1_734; \
60104 __ret_734 = __builtin_bit_cast(int16x8_t, vcombine_s16(__builtin_bit_cast(int16x4_t, __s0_734), __builtin_bit_cast(int16x4_t, vqshrun_n_s32(__s1_734, __p2_734)))); \60240 __ret_734 = __builtin_bit_cast(uint16x8_t, vcombine_u16(__builtin_bit_cast(uint16x4_t, __s0_734), __builtin_bit_cast(uint16x4_t, vqshrun_n_s32(__s1_734, __p2_734)))); \
60105 __ret_734; \60241 __ret_734; \
60106})60242})
60107#else60243#else
60108#define vqshrun_high_n_s32(__p0_735, __p1_735, __p2_735) __extension__ ({ \60244#define vqshrun_high_n_s32(__p0_735, __p1_735, __p2_735) __extension__ ({ \
60109 int16x8_t __ret_735; \60245 uint16x8_t __ret_735; \
60110 int16x4_t __s0_735 = __p0_735; \60246 uint16x4_t __s0_735 = __p0_735; \
60111 int32x4_t __s1_735 = __p1_735; \60247 int32x4_t __s1_735 = __p1_735; \
60112 int16x4_t __rev0_735; __rev0_735 = __builtin_shufflevector(__s0_735, __s0_735, __lane_reverse_64_16); \60248 uint16x4_t __rev0_735; __rev0_735 = __builtin_shufflevector(__s0_735, __s0_735, __lane_reverse_64_16); \
60113 int32x4_t __rev1_735; __rev1_735 = __builtin_shufflevector(__s1_735, __s1_735, __lane_reverse_128_32); \60249 int32x4_t __rev1_735; __rev1_735 = __builtin_shufflevector(__s1_735, __s1_735, __lane_reverse_128_32); \
60114 __ret_735 = __builtin_bit_cast(int16x8_t, __noswap_vcombine_s16(__builtin_bit_cast(int16x4_t, __rev0_735), __builtin_bit_cast(int16x4_t, __noswap_vqshrun_n_s32(__rev1_735, __p2_735)))); \60250 __ret_735 = __builtin_bit_cast(uint16x8_t, __noswap_vcombine_u16(__builtin_bit_cast(uint16x4_t, __rev0_735), __builtin_bit_cast(uint16x4_t, __noswap_vqshrun_n_s32(__rev1_735, __p2_735)))); \
60115 __ret_735 = __builtin_shufflevector(__ret_735, __ret_735, __lane_reverse_128_16); \60251 __ret_735 = __builtin_shufflevector(__ret_735, __ret_735, __lane_reverse_128_16); \
60116 __ret_735; \60252 __ret_735; \
60117})60253})
...@@ -60119,20 +60255,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __...@@ -60119,20 +60255,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __
6011960255
60120#ifdef __LITTLE_ENDIAN__60256#ifdef __LITTLE_ENDIAN__
60121#define vqshrun_high_n_s64(__p0_736, __p1_736, __p2_736) __extension__ ({ \60257#define vqshrun_high_n_s64(__p0_736, __p1_736, __p2_736) __extension__ ({ \
60122 int32x4_t __ret_736; \60258 uint32x4_t __ret_736; \
60123 int32x2_t __s0_736 = __p0_736; \60259 uint32x2_t __s0_736 = __p0_736; \
60124 int64x2_t __s1_736 = __p1_736; \60260 int64x2_t __s1_736 = __p1_736; \
60125 __ret_736 = __builtin_bit_cast(int32x4_t, vcombine_s32(__builtin_bit_cast(int32x2_t, __s0_736), __builtin_bit_cast(int32x2_t, vqshrun_n_s64(__s1_736, __p2_736)))); \60261 __ret_736 = __builtin_bit_cast(uint32x4_t, vcombine_u32(__builtin_bit_cast(uint32x2_t, __s0_736), __builtin_bit_cast(uint32x2_t, vqshrun_n_s64(__s1_736, __p2_736)))); \
60126 __ret_736; \60262 __ret_736; \
60127})60263})
60128#else60264#else
60129#define vqshrun_high_n_s64(__p0_737, __p1_737, __p2_737) __extension__ ({ \60265#define vqshrun_high_n_s64(__p0_737, __p1_737, __p2_737) __extension__ ({ \
60130 int32x4_t __ret_737; \60266 uint32x4_t __ret_737; \
60131 int32x2_t __s0_737 = __p0_737; \60267 uint32x2_t __s0_737 = __p0_737; \
60132 int64x2_t __s1_737 = __p1_737; \60268 int64x2_t __s1_737 = __p1_737; \
60133 int32x2_t __rev0_737; __rev0_737 = __builtin_shufflevector(__s0_737, __s0_737, __lane_reverse_64_32); \60269 uint32x2_t __rev0_737; __rev0_737 = __builtin_shufflevector(__s0_737, __s0_737, __lane_reverse_64_32); \
60134 int64x2_t __rev1_737; __rev1_737 = __builtin_shufflevector(__s1_737, __s1_737, __lane_reverse_128_64); \60270 int64x2_t __rev1_737; __rev1_737 = __builtin_shufflevector(__s1_737, __s1_737, __lane_reverse_128_64); \
60135 __ret_737 = __builtin_bit_cast(int32x4_t, __noswap_vcombine_s32(__builtin_bit_cast(int32x2_t, __rev0_737), __builtin_bit_cast(int32x2_t, __noswap_vqshrun_n_s64(__rev1_737, __p2_737)))); \60271 __ret_737 = __builtin_bit_cast(uint32x4_t, __noswap_vcombine_u32(__builtin_bit_cast(uint32x2_t, __rev0_737), __builtin_bit_cast(uint32x2_t, __noswap_vqshrun_n_s64(__rev1_737, __p2_737)))); \
60136 __ret_737 = __builtin_shufflevector(__ret_737, __ret_737, __lane_reverse_128_32); \60272 __ret_737 = __builtin_shufflevector(__ret_737, __ret_737, __lane_reverse_128_32); \
60137 __ret_737; \60273 __ret_737; \
60138})60274})
...@@ -60140,20 +60276,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __...@@ -60140,20 +60276,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __
6014060276
60141#ifdef __LITTLE_ENDIAN__60277#ifdef __LITTLE_ENDIAN__
60142#define vqshrun_high_n_s16(__p0_738, __p1_738, __p2_738) __extension__ ({ \60278#define vqshrun_high_n_s16(__p0_738, __p1_738, __p2_738) __extension__ ({ \
60143 int8x16_t __ret_738; \60279 uint8x16_t __ret_738; \
60144 int8x8_t __s0_738 = __p0_738; \60280 uint8x8_t __s0_738 = __p0_738; \
60145 int16x8_t __s1_738 = __p1_738; \60281 int16x8_t __s1_738 = __p1_738; \
60146 __ret_738 = __builtin_bit_cast(int8x16_t, vcombine_s8(__builtin_bit_cast(int8x8_t, __s0_738), __builtin_bit_cast(int8x8_t, vqshrun_n_s16(__s1_738, __p2_738)))); \60282 __ret_738 = __builtin_bit_cast(uint8x16_t, vcombine_u8(__builtin_bit_cast(uint8x8_t, __s0_738), __builtin_bit_cast(uint8x8_t, vqshrun_n_s16(__s1_738, __p2_738)))); \
60147 __ret_738; \60283 __ret_738; \
60148})60284})
60149#else60285#else
60150#define vqshrun_high_n_s16(__p0_739, __p1_739, __p2_739) __extension__ ({ \60286#define vqshrun_high_n_s16(__p0_739, __p1_739, __p2_739) __extension__ ({ \
60151 int8x16_t __ret_739; \60287 uint8x16_t __ret_739; \
60152 int8x8_t __s0_739 = __p0_739; \60288 uint8x8_t __s0_739 = __p0_739; \
60153 int16x8_t __s1_739 = __p1_739; \60289 int16x8_t __s1_739 = __p1_739; \
60154 int8x8_t __rev0_739; __rev0_739 = __builtin_shufflevector(__s0_739, __s0_739, __lane_reverse_64_8); \60290 uint8x8_t __rev0_739; __rev0_739 = __builtin_shufflevector(__s0_739, __s0_739, __lane_reverse_64_8); \
60155 int16x8_t __rev1_739; __rev1_739 = __builtin_shufflevector(__s1_739, __s1_739, __lane_reverse_128_16); \60291 int16x8_t __rev1_739; __rev1_739 = __builtin_shufflevector(__s1_739, __s1_739, __lane_reverse_128_16); \
60156 __ret_739 = __builtin_bit_cast(int8x16_t, __noswap_vcombine_s8(__builtin_bit_cast(int8x8_t, __rev0_739), __builtin_bit_cast(int8x8_t, __noswap_vqshrun_n_s16(__rev1_739, __p2_739)))); \60292 __ret_739 = __builtin_bit_cast(uint8x16_t, __noswap_vcombine_u8(__builtin_bit_cast(uint8x8_t, __rev0_739), __builtin_bit_cast(uint8x8_t, __noswap_vqshrun_n_s16(__rev1_739, __p2_739)))); \
60157 __ret_739 = __builtin_shufflevector(__ret_739, __ret_739, __lane_reverse_128_8); \60293 __ret_739 = __builtin_shufflevector(__ret_739, __ret_739, __lane_reverse_128_8); \
60158 __ret_739; \60294 __ret_739; \
60159})60295})
...@@ -64345,7 +64481,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i...@@ -64345,7 +64481,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i
64345 poly64x1_t __ret; \64481 poly64x1_t __ret; \
64346 poly64_t __s0 = __p0; \64482 poly64_t __s0 = __p0; \
64347 poly64x1_t __s1 = __p1; \64483 poly64x1_t __s1 = __p1; \
64348 __ret = __builtin_bit_cast(poly64x1_t, __builtin_neon_vset_lane_i64(__s0, __s1, __p2)); \64484 __ret = __builtin_bit_cast(poly64x1_t, __builtin_neon_vset_lane_i64(__s0, __builtin_bit_cast(int64x1_t, __s1), __p2)); \
64349 __ret; \64485 __ret; \
64350})64486})
64351#ifdef __LITTLE_ENDIAN__64487#ifdef __LITTLE_ENDIAN__
...@@ -64353,7 +64489,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i...@@ -64353,7 +64489,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i
64353 poly64x2_t __ret; \64489 poly64x2_t __ret; \
64354 poly64_t __s0 = __p0; \64490 poly64_t __s0 = __p0; \
64355 poly64x2_t __s1 = __p1; \64491 poly64x2_t __s1 = __p1; \
64356 __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __s1, __p2)); \64492 __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __builtin_bit_cast(int64x2_t, __s1), __p2)); \
64357 __ret; \64493 __ret; \
64358})64494})
64359#else64495#else
...@@ -64362,7 +64498,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i...@@ -64362,7 +64498,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i
64362 poly64_t __s0 = __p0; \64498 poly64_t __s0 = __p0; \
64363 poly64x2_t __s1 = __p1; \64499 poly64x2_t __s1 = __p1; \
64364 poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_64); \64500 poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_64); \
64365 __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __rev1, __p2)); \64501 __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __builtin_bit_cast(int64x2_t, __rev1), __p2)); \
64366 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_64); \64502 __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_64); \
64367 __ret; \64503 __ret; \
64368})64504})
...@@ -64370,7 +64506,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i...@@ -64370,7 +64506,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i
64370 poly64x2_t __ret; \64506 poly64x2_t __ret; \
64371 poly64_t __s0 = __p0; \64507 poly64_t __s0 = __p0; \
64372 poly64x2_t __s1 = __p1; \64508 poly64x2_t __s1 = __p1; \
64373 __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __s1, __p2)); \64509 __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __builtin_bit_cast(int64x2_t, __s1), __p2)); \
64374 __ret; \64510 __ret; \
64375})64511})
64376#endif64512#endif
lib/include/arm_sme.h+8-8
...@@ -796,8 +796,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x2...@@ -796,8 +796,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x2
796void svdot_za16_mf8_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);796void svdot_za16_mf8_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);
797__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x4_fpm)))797__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x4_fpm)))
798void svdot_za16_mf8_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t);798void svdot_za16_mf8_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t);
799__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x1_fpm)))
800void svmla_single_za16_mf8_vg2x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t);
801__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x2_fpm)))799__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x2_fpm)))
802void svmla_single_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t);800void svmla_single_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t);
803__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x4_fpm)))801__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x4_fpm)))
...@@ -808,6 +806,8 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_...@@ -808,6 +806,8 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_
808void svmla_lane_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t);806void svmla_lane_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t);
809__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_vg2x4_fpm)))807__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_vg2x4_fpm)))
810void svmla_lane_za16_mf8_vg2x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t);808void svmla_lane_za16_mf8_vg2x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t);
809__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x1_fpm)))
810void svmla_za16_mf8_vg2x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t);
811__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x2_fpm)))811__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x2_fpm)))
812void svmla_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);812void svmla_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);
813__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x4_fpm)))813__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x4_fpm)))
...@@ -828,8 +828,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x...@@ -828,8 +828,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x
828void svdot_za16_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);828void svdot_za16_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);
829__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x4_fpm)))829__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x4_fpm)))
830void svdot_za16_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t);830void svdot_za16_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t);
831__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x1_fpm)))
832void svmla_za16_vg2x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t);
833__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x2_fpm)))831__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x2_fpm)))
834void svmla_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t);832void svmla_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t);
835__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x4_fpm)))833__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x4_fpm)))
...@@ -840,6 +838,8 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8...@@ -840,6 +838,8 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8
840void svmla_lane_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t);838void svmla_lane_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t);
841__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_vg2x4_fpm)))839__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_vg2x4_fpm)))
842void svmla_lane_za16_vg2x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t);840void svmla_lane_za16_vg2x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t);
841__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x1_fpm)))
842void svmla_za16_vg2x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t);
843__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x2_fpm)))843__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x2_fpm)))
844void svmla_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);844void svmla_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);
845__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x4_fpm)))845__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x4_fpm)))
...@@ -860,8 +860,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x2...@@ -860,8 +860,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x2
860void svdot_za32_mf8_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);860void svdot_za32_mf8_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);
861__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x4_fpm)))861__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x4_fpm)))
862void svdot_za32_mf8_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t);862void svdot_za32_mf8_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t);
863__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x1_fpm)))
864void svmla_single_za32_mf8_vg4x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t);
865__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x2_fpm)))863__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x2_fpm)))
866void svmla_single_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t);864void svmla_single_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t);
867__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x4_fpm)))865__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x4_fpm)))
...@@ -872,6 +870,8 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_...@@ -872,6 +870,8 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_
872void svmla_lane_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t);870void svmla_lane_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t);
873__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_vg4x4_fpm)))871__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_vg4x4_fpm)))
874void svmla_lane_za32_mf8_vg4x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t);872void svmla_lane_za32_mf8_vg4x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t);
873__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x1_fpm)))
874void svmla_za32_mf8_vg4x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t);
875__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x2_fpm)))875__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x2_fpm)))
876void svmla_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);876void svmla_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);
877__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x4_fpm)))877__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x4_fpm)))
...@@ -894,8 +894,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x...@@ -894,8 +894,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x
894void svdot_za32_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);894void svdot_za32_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);
895__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x4_fpm)))895__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x4_fpm)))
896void svdot_za32_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t);896void svdot_za32_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t);
897__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x1_fpm)))
898void svmla_za32_vg4x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t);
899__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x2_fpm)))897__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x2_fpm)))
900void svmla_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t);898void svmla_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t);
901__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x4_fpm)))899__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x4_fpm)))
...@@ -906,6 +904,8 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8...@@ -906,6 +904,8 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8
906void svmla_lane_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t);904void svmla_lane_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t);
907__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_vg4x4_fpm)))905__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_vg4x4_fpm)))
908void svmla_lane_za32_vg4x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t);906void svmla_lane_za32_vg4x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t);
907__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x1_fpm)))
908void svmla_za32_vg4x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t);
909__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x2_fpm)))909__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x2_fpm)))
910void svmla_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);910void svmla_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t);
911__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x4_fpm)))911__aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x4_fpm)))
lib/include/arm_sve.h+4162-3782
...@@ -4617,6 +4617,86 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x2)))...@@ -4617,6 +4617,86 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x2)))
4617svbfloat16x2_t svminnm(svbfloat16x2_t, svbfloat16x2_t);4617svbfloat16x2_t svminnm(svbfloat16x2_t, svbfloat16x2_t);
4618__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x4)))4618__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x4)))
4619svbfloat16x4_t svminnm(svbfloat16x4_t, svbfloat16x4_t);4619svbfloat16x4_t svminnm(svbfloat16x4_t, svbfloat16x4_t);
4620__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_bf16_x2)))
4621svbfloat16x2_t svmul_single_bf16_x2(svbfloat16x2_t, svbfloat16_t);
4622__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_bf16_x4)))
4623svbfloat16x4_t svmul_single_bf16_x4(svbfloat16x4_t, svbfloat16_t);
4624__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x2)))
4625svbfloat16x2_t svmul_bf16_x2(svbfloat16x2_t, svbfloat16x2_t);
4626__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x4)))
4627svbfloat16x4_t svmul_bf16_x4(svbfloat16x4_t, svbfloat16x4_t);
4628__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_single_bf16_x2)))
4629svbfloat16x2_t svscale_single_bf16_x2(svbfloat16x2_t, svint16_t);
4630__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_single_bf16_x4)))
4631svbfloat16x4_t svscale_single_bf16_x4(svbfloat16x4_t, svint16_t);
4632__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x2)))
4633svbfloat16x2_t svscale_bf16_x2(svbfloat16x2_t, svint16x2_t);
4634__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x4)))
4635svbfloat16x4_t svscale_bf16_x4(svbfloat16x4_t, svint16x4_t);
4636__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_bf16_x2)))
4637svbfloat16x2_t svmul(svbfloat16x2_t, svbfloat16_t);
4638__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_bf16_x4)))
4639svbfloat16x4_t svmul(svbfloat16x4_t, svbfloat16_t);
4640__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x2)))
4641svbfloat16x2_t svmul(svbfloat16x2_t, svbfloat16x2_t);
4642__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x4)))
4643svbfloat16x4_t svmul(svbfloat16x4_t, svbfloat16x4_t);
4644__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_single_bf16_x2)))
4645svbfloat16x2_t svscale(svbfloat16x2_t, svint16_t);
4646__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_single_bf16_x4)))
4647svbfloat16x4_t svscale(svbfloat16x4_t, svint16_t);
4648__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x2)))
4649svbfloat16x2_t svscale(svbfloat16x2_t, svint16x2_t);
4650__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x4)))
4651svbfloat16x4_t svscale(svbfloat16x4_t, svint16x4_t);
4652__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f64_x2)))
4653svfloat64x2_t svmul_single_f64_x2(svfloat64x2_t, svfloat64_t);
4654__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f32_x2)))
4655svfloat32x2_t svmul_single_f32_x2(svfloat32x2_t, svfloat32_t);
4656__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f16_x2)))
4657svfloat16x2_t svmul_single_f16_x2(svfloat16x2_t, svfloat16_t);
4658__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f64_x4)))
4659svfloat64x4_t svmul_single_f64_x4(svfloat64x4_t, svfloat64_t);
4660__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f32_x4)))
4661svfloat32x4_t svmul_single_f32_x4(svfloat32x4_t, svfloat32_t);
4662__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f16_x4)))
4663svfloat16x4_t svmul_single_f16_x4(svfloat16x4_t, svfloat16_t);
4664__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f64_x2)))
4665svfloat64x2_t svmul_f64_x2(svfloat64x2_t, svfloat64x2_t);
4666__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f32_x2)))
4667svfloat32x2_t svmul_f32_x2(svfloat32x2_t, svfloat32x2_t);
4668__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f16_x2)))
4669svfloat16x2_t svmul_f16_x2(svfloat16x2_t, svfloat16x2_t);
4670__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f64_x4)))
4671svfloat64x4_t svmul_f64_x4(svfloat64x4_t, svfloat64x4_t);
4672__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f32_x4)))
4673svfloat32x4_t svmul_f32_x4(svfloat32x4_t, svfloat32x4_t);
4674__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f16_x4)))
4675svfloat16x4_t svmul_f16_x4(svfloat16x4_t, svfloat16x4_t);
4676__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f64_x2)))
4677svfloat64x2_t svmul(svfloat64x2_t, svfloat64_t);
4678__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f32_x2)))
4679svfloat32x2_t svmul(svfloat32x2_t, svfloat32_t);
4680__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f16_x2)))
4681svfloat16x2_t svmul(svfloat16x2_t, svfloat16_t);
4682__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f64_x4)))
4683svfloat64x4_t svmul(svfloat64x4_t, svfloat64_t);
4684__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f32_x4)))
4685svfloat32x4_t svmul(svfloat32x4_t, svfloat32_t);
4686__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f16_x4)))
4687svfloat16x4_t svmul(svfloat16x4_t, svfloat16_t);
4688__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f64_x2)))
4689svfloat64x2_t svmul(svfloat64x2_t, svfloat64x2_t);
4690__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f32_x2)))
4691svfloat32x2_t svmul(svfloat32x2_t, svfloat32x2_t);
4692__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f16_x2)))
4693svfloat16x2_t svmul(svfloat16x2_t, svfloat16x2_t);
4694__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f64_x4)))
4695svfloat64x4_t svmul(svfloat64x4_t, svfloat64x4_t);
4696__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f32_x4)))
4697svfloat32x4_t svmul(svfloat32x4_t, svfloat32x4_t);
4698__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f16_x4)))
4699svfloat16x4_t svmul(svfloat16x4_t, svfloat16x4_t);
4620__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadda_f64)))4700__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadda_f64)))
4621float64_t svadda_f64(svbool_t, float64_t, svfloat64_t);4701float64_t svadda_f64(svbool_t, float64_t, svfloat64_t);
4622__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadda_f32)))4702__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadda_f32)))
...@@ -4655,18 +4735,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u32base_s32in...@@ -4655,18 +4735,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u32base_s32in
4655svuint32_t svadrw_u32base_s32index(svuint32_t, svint32_t);4735svuint32_t svadrw_u32base_s32index(svuint32_t, svint32_t);
4656__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u64base_s64index)))4736__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u64base_s64index)))
4657svuint64_t svadrw_u64base_s64index(svuint64_t, svint64_t);4737svuint64_t svadrw_u64base_s64index(svuint64_t, svint64_t);
4658__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u32)))
4659svuint32_t svcompact_u32(svbool_t, svuint32_t);
4660__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u64)))
4661svuint64_t svcompact_u64(svbool_t, svuint64_t);
4662__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f64)))
4663svfloat64_t svcompact_f64(svbool_t, svfloat64_t);
4664__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f32)))
4665svfloat32_t svcompact_f32(svbool_t, svfloat32_t);
4666__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s32)))
4667svint32_t svcompact_s32(svbool_t, svint32_t);
4668__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s64)))
4669svint64_t svcompact_s64(svbool_t, svint64_t);
4670__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u32base_index_u32)))4738__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u32base_index_u32)))
4671svuint32_t svld1_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t);4739svuint32_t svld1_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t);
4672__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u64base_index_u64)))4740__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u64base_index_u64)))
...@@ -5923,18 +5991,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u32base_s32i...@@ -5923,18 +5991,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u32base_s32i
5923svuint32_t svadrw_index(svuint32_t, svint32_t);5991svuint32_t svadrw_index(svuint32_t, svint32_t);
5924__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u64base_s64index)))5992__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u64base_s64index)))
5925svuint64_t svadrw_index(svuint64_t, svint64_t);5993svuint64_t svadrw_index(svuint64_t, svint64_t);
5926__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u32)))
5927svuint32_t svcompact(svbool_t, svuint32_t);
5928__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u64)))
5929svuint64_t svcompact(svbool_t, svuint64_t);
5930__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f64)))
5931svfloat64_t svcompact(svbool_t, svfloat64_t);
5932__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f32)))
5933svfloat32_t svcompact(svbool_t, svfloat32_t);
5934__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s32)))
5935svint32_t svcompact(svbool_t, svint32_t);
5936__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s64)))
5937svint64_t svcompact(svbool_t, svint64_t);
5938__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u32base_index_u32)))5994__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u32base_index_u32)))
5939svuint32_t svld1_gather_index_u32(svbool_t, svuint32_t, int64_t);5995svuint32_t svld1_gather_index_u32(svbool_t, svuint32_t, int64_t);
5940__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u64base_index_u64)))5996__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u64base_index_u64)))
...@@ -8777,3764 +8833,222 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzipq2_mf8)))...@@ -8777,3764 +8833,222 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzipq2_mf8)))
8777svmfloat8_t svzipq2(svmfloat8_t, svmfloat8_t);8833svmfloat8_t svzipq2(svmfloat8_t, svmfloat8_t);
8778__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzipq2_s16)))8834__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzipq2_s16)))
8779svint16_t svzipq2(svint16_t, svint16_t);8835svint16_t svzipq2(svint16_t, svint16_t);
8780__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmmla_f32)))8836__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt_f32_f16_z)))
8781svfloat32_t svbfmmla_f32(svfloat32_t, svbfloat16_t, svbfloat16_t);8837svfloat32_t svcvtlt_f32_f16_z(svbool_t, svfloat16_t);
8782__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmmla_f32)))8838__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt_f64_f32_z)))
8783svfloat32_t svbfmmla(svfloat32_t, svbfloat16_t, svbfloat16_t);8839svfloat64_t svcvtlt_f64_f32_z(svbool_t, svfloat32_t);
8784__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_n_f32)))8840__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_z)))
8785svfloat32_t svbfdot_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t);8841svbfloat16_t svcvtnt_bf16_f32_z(svbfloat16_t, svbool_t, svfloat32_t);
8786__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_f32)))8842__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_f16_f32_z)))
8787svfloat32_t svbfdot_f32(svfloat32_t, svbfloat16_t, svbfloat16_t);8843svfloat16_t svcvtnt_f16_f32_z(svfloat16_t, svbool_t, svfloat32_t);
8788__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_lane_f32)))8844__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_f32_f64_z)))
8789svfloat32_t svbfdot_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);8845svfloat32_t svcvtnt_f32_f64_z(svfloat32_t, svbool_t, svfloat64_t);
8790__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_n_f32)))8846__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtxnt_f32_f64_z)))
8791svfloat32_t svbfmlalb_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t);8847svfloat32_t svcvtxnt_f32_f64_z(svfloat32_t, svbool_t, svfloat64_t);
8792__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_f32)))8848__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svfirstp_b8)))
8793svfloat32_t svbfmlalb_f32(svfloat32_t, svbfloat16_t, svbfloat16_t);8849int64_t svfirstp_b8(svbool_t, svbool_t);
8794__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_lane_f32)))8850__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svfirstp_b32)))
8795svfloat32_t svbfmlalb_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);8851int64_t svfirstp_b32(svbool_t, svbool_t);
8796__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_n_f32)))8852__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svfirstp_b64)))
8797svfloat32_t svbfmlalt_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t);8853int64_t svfirstp_b64(svbool_t, svbool_t);
8798__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_f32)))8854__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svfirstp_b16)))
8799svfloat32_t svbfmlalt_f32(svfloat32_t, svbfloat16_t, svbfloat16_t);8855int64_t svfirstp_b16(svbool_t, svbool_t);
8800__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_lane_f32)))8856__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svlastp_b8)))
8801svfloat32_t svbfmlalt_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);8857int64_t svlastp_b8(svbool_t, svbool_t);
8802__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_m)))8858__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svlastp_b32)))
8803svbfloat16_t svcvt_bf16_f32_m(svbfloat16_t, svbool_t, svfloat32_t);8859int64_t svlastp_b32(svbool_t, svbool_t);
8804__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_x)))8860__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svlastp_b64)))
8805svbfloat16_t svcvt_bf16_f32_x(svbool_t, svfloat32_t);8861int64_t svlastp_b64(svbool_t, svbool_t);
8806__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_z)))8862__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svlastp_b16)))
8807svbfloat16_t svcvt_bf16_f32_z(svbool_t, svfloat32_t);8863int64_t svlastp_b16(svbool_t, svbool_t);
8808__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_m)))8864__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_m)))
8809svbfloat16_t svcvtnt_bf16_f32_m(svbfloat16_t, svbool_t, svfloat32_t);8865svfloat64_t svrint32x_f64_m(svfloat64_t, svbool_t, svfloat64_t);
8810__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_n_f32)))8866__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_m)))
8811svfloat32_t svbfdot(svfloat32_t, svbfloat16_t, bfloat16_t);8867svfloat32_t svrint32x_f32_m(svfloat32_t, svbool_t, svfloat32_t);
8812__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_f32)))8868__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_x)))
8813svfloat32_t svbfdot(svfloat32_t, svbfloat16_t, svbfloat16_t);8869svfloat64_t svrint32x_f64_x(svbool_t, svfloat64_t);
8814__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_lane_f32)))8870__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_x)))
8815svfloat32_t svbfdot_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);8871svfloat32_t svrint32x_f32_x(svbool_t, svfloat32_t);
8816__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_n_f32)))8872__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_z)))
8817svfloat32_t svbfmlalb(svfloat32_t, svbfloat16_t, bfloat16_t);8873svfloat64_t svrint32x_f64_z(svbool_t, svfloat64_t);
8818__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_f32)))8874__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_z)))
8819svfloat32_t svbfmlalb(svfloat32_t, svbfloat16_t, svbfloat16_t);8875svfloat32_t svrint32x_f32_z(svbool_t, svfloat32_t);
8820__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_lane_f32)))8876__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_m)))
8821svfloat32_t svbfmlalb_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);8877svfloat64_t svrint32z_f64_m(svfloat64_t, svbool_t, svfloat64_t);
8822__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_n_f32)))8878__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_m)))
8823svfloat32_t svbfmlalt(svfloat32_t, svbfloat16_t, bfloat16_t);8879svfloat32_t svrint32z_f32_m(svfloat32_t, svbool_t, svfloat32_t);
8824__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_f32)))8880__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_x)))
8825svfloat32_t svbfmlalt(svfloat32_t, svbfloat16_t, svbfloat16_t);8881svfloat64_t svrint32z_f64_x(svbool_t, svfloat64_t);
8826__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_lane_f32)))8882__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_x)))
8827svfloat32_t svbfmlalt_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);8883svfloat32_t svrint32z_f32_x(svbool_t, svfloat32_t);
8828__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_m)))8884__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_z)))
8829svbfloat16_t svcvt_bf16_m(svbfloat16_t, svbool_t, svfloat32_t);8885svfloat64_t svrint32z_f64_z(svbool_t, svfloat64_t);
8830__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_x)))8886__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_z)))
8831svbfloat16_t svcvt_bf16_x(svbool_t, svfloat32_t);8887svfloat32_t svrint32z_f32_z(svbool_t, svfloat32_t);
8832__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_z)))8888__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_m)))
8833svbfloat16_t svcvt_bf16_z(svbool_t, svfloat32_t);8889svfloat64_t svrint64x_f64_m(svfloat64_t, svbool_t, svfloat64_t);
8834__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_m)))8890__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_m)))
8835svbfloat16_t svcvtnt_bf16_m(svbfloat16_t, svbool_t, svfloat32_t);8891svfloat32_t svrint64x_f32_m(svfloat32_t, svbool_t, svfloat32_t);
8836__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32)))8892__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_x)))
8837svfloat32_t svmmla_f32(svfloat32_t, svfloat32_t, svfloat32_t);8893svfloat64_t svrint64x_f64_x(svbool_t, svfloat64_t);
8838__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32)))8894__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_x)))
8839svfloat32_t svmmla(svfloat32_t, svfloat32_t, svfloat32_t);8895svfloat32_t svrint64x_f32_x(svbool_t, svfloat32_t);
8840__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u8)))8896__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_z)))
8841svuint8_t svld1ro_u8(svbool_t, uint8_t const *);8897svfloat64_t svrint64x_f64_z(svbool_t, svfloat64_t);
8842__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u32)))8898__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_z)))
8843svuint32_t svld1ro_u32(svbool_t, uint32_t const *);8899svfloat32_t svrint64x_f32_z(svbool_t, svfloat32_t);
8844__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u64)))8900__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_m)))
8845svuint64_t svld1ro_u64(svbool_t, uint64_t const *);8901svfloat64_t svrint64z_f64_m(svfloat64_t, svbool_t, svfloat64_t);
8846__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u16)))8902__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_m)))
8847svuint16_t svld1ro_u16(svbool_t, uint16_t const *);8903svfloat32_t svrint64z_f32_m(svfloat32_t, svbool_t, svfloat32_t);
8848__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_bf16)))8904__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_x)))
8849svbfloat16_t svld1ro_bf16(svbool_t, bfloat16_t const *);8905svfloat64_t svrint64z_f64_x(svbool_t, svfloat64_t);
8850__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s8)))8906__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_x)))
8851svint8_t svld1ro_s8(svbool_t, int8_t const *);8907svfloat32_t svrint64z_f32_x(svbool_t, svfloat32_t);
8852__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f64)))8908__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_z)))
8853svfloat64_t svld1ro_f64(svbool_t, float64_t const *);8909svfloat64_t svrint64z_f64_z(svbool_t, svfloat64_t);
8854__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f32)))8910__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_z)))
8855svfloat32_t svld1ro_f32(svbool_t, float32_t const *);8911svfloat32_t svrint64z_f32_z(svbool_t, svfloat32_t);
8856__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f16)))8912__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt_f32_f16_z)))
8857svfloat16_t svld1ro_f16(svbool_t, float16_t const *);8913svfloat32_t svcvtlt_f32_z(svbool_t, svfloat16_t);
8858__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s32)))8914__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt_f64_f32_z)))
8859svint32_t svld1ro_s32(svbool_t, int32_t const *);8915svfloat64_t svcvtlt_f64_z(svbool_t, svfloat32_t);
8860__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s64)))8916__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_z)))
8861svint64_t svld1ro_s64(svbool_t, int64_t const *);8917svbfloat16_t svcvtnt_bf16_z(svbfloat16_t, svbool_t, svfloat32_t);
8862__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_mf8)))8918__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_f16_f32_z)))
8863svmfloat8_t svld1ro_mf8(svbool_t, mfloat8_t const *);8919svfloat16_t svcvtnt_f16_z(svfloat16_t, svbool_t, svfloat32_t);
8864__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s16)))8920__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_f32_f64_z)))
8865svint16_t svld1ro_s16(svbool_t, int16_t const *);8921svfloat32_t svcvtnt_f32_z(svfloat32_t, svbool_t, svfloat64_t);
8866__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f64)))8922__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtxnt_f32_f64_z)))
8867svfloat64_t svmmla_f64(svfloat64_t, svfloat64_t, svfloat64_t);8923svfloat32_t svcvtxnt_f32_z(svfloat32_t, svbool_t, svfloat64_t);
8868__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u8)))8924__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_m)))
8869svuint8_t svtrn1q_u8(svuint8_t, svuint8_t);8925svfloat64_t svrint32x_m(svfloat64_t, svbool_t, svfloat64_t);
8870__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u32)))8926__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_m)))
8871svuint32_t svtrn1q_u32(svuint32_t, svuint32_t);8927svfloat32_t svrint32x_m(svfloat32_t, svbool_t, svfloat32_t);
8872__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u64)))8928__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_x)))
8873svuint64_t svtrn1q_u64(svuint64_t, svuint64_t);8929svfloat64_t svrint32x_x(svbool_t, svfloat64_t);
8874__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u16)))8930__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_x)))
8875svuint16_t svtrn1q_u16(svuint16_t, svuint16_t);8931svfloat32_t svrint32x_x(svbool_t, svfloat32_t);
8876__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_bf16)))8932__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_z)))
8877svbfloat16_t svtrn1q_bf16(svbfloat16_t, svbfloat16_t);8933svfloat64_t svrint32x_z(svbool_t, svfloat64_t);
8878__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s8)))8934__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_z)))
8879svint8_t svtrn1q_s8(svint8_t, svint8_t);8935svfloat32_t svrint32x_z(svbool_t, svfloat32_t);
8880__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f64)))8936__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_m)))
8881svfloat64_t svtrn1q_f64(svfloat64_t, svfloat64_t);8937svfloat64_t svrint32z_m(svfloat64_t, svbool_t, svfloat64_t);
8882__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f32)))8938__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_m)))
8883svfloat32_t svtrn1q_f32(svfloat32_t, svfloat32_t);8939svfloat32_t svrint32z_m(svfloat32_t, svbool_t, svfloat32_t);
8884__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f16)))8940__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_x)))
8885svfloat16_t svtrn1q_f16(svfloat16_t, svfloat16_t);8941svfloat64_t svrint32z_x(svbool_t, svfloat64_t);
8886__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s32)))8942__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_x)))
8887svint32_t svtrn1q_s32(svint32_t, svint32_t);8943svfloat32_t svrint32z_x(svbool_t, svfloat32_t);
8888__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s64)))8944__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_z)))
8889svint64_t svtrn1q_s64(svint64_t, svint64_t);8945svfloat64_t svrint32z_z(svbool_t, svfloat64_t);
8890__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s16)))8946__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_z)))
8891svint16_t svtrn1q_s16(svint16_t, svint16_t);8947svfloat32_t svrint32z_z(svbool_t, svfloat32_t);
8892__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u8)))8948__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_m)))
8893svuint8_t svtrn2q_u8(svuint8_t, svuint8_t);8949svfloat64_t svrint64x_m(svfloat64_t, svbool_t, svfloat64_t);
8894__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u32)))8950__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_m)))
8895svuint32_t svtrn2q_u32(svuint32_t, svuint32_t);8951svfloat32_t svrint64x_m(svfloat32_t, svbool_t, svfloat32_t);
8896__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u64)))8952__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_x)))
8897svuint64_t svtrn2q_u64(svuint64_t, svuint64_t);8953svfloat64_t svrint64x_x(svbool_t, svfloat64_t);
8898__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u16)))8954__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_x)))
8899svuint16_t svtrn2q_u16(svuint16_t, svuint16_t);8955svfloat32_t svrint64x_x(svbool_t, svfloat32_t);
8900__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_bf16)))8956__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_z)))
8901svbfloat16_t svtrn2q_bf16(svbfloat16_t, svbfloat16_t);8957svfloat64_t svrint64x_z(svbool_t, svfloat64_t);
8902__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s8)))8958__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_z)))
8903svint8_t svtrn2q_s8(svint8_t, svint8_t);8959svfloat32_t svrint64x_z(svbool_t, svfloat32_t);
8904__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f64)))8960__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_m)))
8905svfloat64_t svtrn2q_f64(svfloat64_t, svfloat64_t);8961svfloat64_t svrint64z_m(svfloat64_t, svbool_t, svfloat64_t);
8906__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f32)))8962__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_m)))
8907svfloat32_t svtrn2q_f32(svfloat32_t, svfloat32_t);8963svfloat32_t svrint64z_m(svfloat32_t, svbool_t, svfloat32_t);
8908__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f16)))8964__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_x)))
8909svfloat16_t svtrn2q_f16(svfloat16_t, svfloat16_t);8965svfloat64_t svrint64z_x(svbool_t, svfloat64_t);
8910__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s32)))8966__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_x)))
8911svint32_t svtrn2q_s32(svint32_t, svint32_t);8967svfloat32_t svrint64z_x(svbool_t, svfloat32_t);
8912__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s64)))8968__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_z)))
8913svint64_t svtrn2q_s64(svint64_t, svint64_t);8969svfloat64_t svrint64z_z(svbool_t, svfloat64_t);
8914__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s16)))8970__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_z)))
8915svint16_t svtrn2q_s16(svint16_t, svint16_t);8971svfloat32_t svrint64z_z(svbool_t, svfloat32_t);
8916__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u8)))8972__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u8)))
8917svuint8_t svuzp1q_u8(svuint8_t, svuint8_t);8973svuint8_t svcompact_u8(svbool_t, svuint8_t);
8918__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u32)))8974__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u16)))
8919svuint32_t svuzp1q_u32(svuint32_t, svuint32_t);8975svuint16_t svcompact_u16(svbool_t, svuint16_t);
8920__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u64)))8976__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_bf16)))
8921svuint64_t svuzp1q_u64(svuint64_t, svuint64_t);8977svbfloat16_t svcompact_bf16(svbool_t, svbfloat16_t);
8922__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u16)))8978__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s8)))
8923svuint16_t svuzp1q_u16(svuint16_t, svuint16_t);8979svint8_t svcompact_s8(svbool_t, svint8_t);
8924__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_bf16)))8980__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f16)))
8925svbfloat16_t svuzp1q_bf16(svbfloat16_t, svbfloat16_t);8981svfloat16_t svcompact_f16(svbool_t, svfloat16_t);
8926__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s8)))8982__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_mf8)))
8927svint8_t svuzp1q_s8(svint8_t, svint8_t);8983svmfloat8_t svcompact_mf8(svbool_t, svmfloat8_t);
8928__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f64)))8984__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s16)))
8929svfloat64_t svuzp1q_f64(svfloat64_t, svfloat64_t);8985svint16_t svcompact_s16(svbool_t, svint16_t);
8930__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f32)))8986__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u8)))
8931svfloat32_t svuzp1q_f32(svfloat32_t, svfloat32_t);8987svuint8_t svexpand_u8(svbool_t, svuint8_t);
8932__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f16)))8988__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u32)))
8933svfloat16_t svuzp1q_f16(svfloat16_t, svfloat16_t);8989svuint32_t svexpand_u32(svbool_t, svuint32_t);
8934__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s32)))8990__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u64)))
8935svint32_t svuzp1q_s32(svint32_t, svint32_t);8991svuint64_t svexpand_u64(svbool_t, svuint64_t);
8936__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s64)))8992__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u16)))
8937svint64_t svuzp1q_s64(svint64_t, svint64_t);8993svuint16_t svexpand_u16(svbool_t, svuint16_t);
8938__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s16)))8994__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_bf16)))
8939svint16_t svuzp1q_s16(svint16_t, svint16_t);8995svbfloat16_t svexpand_bf16(svbool_t, svbfloat16_t);
8940__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u8)))8996__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s8)))
8941svuint8_t svuzp2q_u8(svuint8_t, svuint8_t);8997svint8_t svexpand_s8(svbool_t, svint8_t);
8942__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u32)))8998__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f64)))
8943svuint32_t svuzp2q_u32(svuint32_t, svuint32_t);8999svfloat64_t svexpand_f64(svbool_t, svfloat64_t);
8944__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u64)))9000__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f32)))
8945svuint64_t svuzp2q_u64(svuint64_t, svuint64_t);9001svfloat32_t svexpand_f32(svbool_t, svfloat32_t);
8946__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u16)))9002__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f16)))
8947svuint16_t svuzp2q_u16(svuint16_t, svuint16_t);9003svfloat16_t svexpand_f16(svbool_t, svfloat16_t);
8948__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_bf16)))9004__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s32)))
8949svbfloat16_t svuzp2q_bf16(svbfloat16_t, svbfloat16_t);9005svint32_t svexpand_s32(svbool_t, svint32_t);
8950__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s8)))9006__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s64)))
8951svint8_t svuzp2q_s8(svint8_t, svint8_t);9007svint64_t svexpand_s64(svbool_t, svint64_t);
8952__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f64)))9008__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_mf8)))
8953svfloat64_t svuzp2q_f64(svfloat64_t, svfloat64_t);9009svmfloat8_t svexpand_mf8(svbool_t, svmfloat8_t);
8954__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f32)))9010__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s16)))
8955svfloat32_t svuzp2q_f32(svfloat32_t, svfloat32_t);9011svint16_t svexpand_s16(svbool_t, svint16_t);
8956__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f16)))9012__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u8)))
8957svfloat16_t svuzp2q_f16(svfloat16_t, svfloat16_t);9013svuint8_t svcompact(svbool_t, svuint8_t);
8958__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s32)))9014__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u16)))
8959svint32_t svuzp2q_s32(svint32_t, svint32_t);9015svuint16_t svcompact(svbool_t, svuint16_t);
8960__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s64)))9016__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_bf16)))
8961svint64_t svuzp2q_s64(svint64_t, svint64_t);9017svbfloat16_t svcompact(svbool_t, svbfloat16_t);
8962__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s16)))9018__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s8)))
8963svint16_t svuzp2q_s16(svint16_t, svint16_t);9019svint8_t svcompact(svbool_t, svint8_t);
8964__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u8)))9020__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f16)))
8965svuint8_t svzip1q_u8(svuint8_t, svuint8_t);9021svfloat16_t svcompact(svbool_t, svfloat16_t);
8966__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u32)))9022__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_mf8)))
8967svuint32_t svzip1q_u32(svuint32_t, svuint32_t);9023svmfloat8_t svcompact(svbool_t, svmfloat8_t);
8968__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u64)))9024__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s16)))
8969svuint64_t svzip1q_u64(svuint64_t, svuint64_t);9025svint16_t svcompact(svbool_t, svint16_t);
8970__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u16)))9026__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u8)))
8971svuint16_t svzip1q_u16(svuint16_t, svuint16_t);9027svuint8_t svexpand(svbool_t, svuint8_t);
8972__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_bf16)))9028__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u32)))
8973svbfloat16_t svzip1q_bf16(svbfloat16_t, svbfloat16_t);9029svuint32_t svexpand(svbool_t, svuint32_t);
8974__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s8)))9030__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u64)))
8975svint8_t svzip1q_s8(svint8_t, svint8_t);9031svuint64_t svexpand(svbool_t, svuint64_t);
8976__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f64)))9032__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u16)))
8977svfloat64_t svzip1q_f64(svfloat64_t, svfloat64_t);9033svuint16_t svexpand(svbool_t, svuint16_t);
8978__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f32)))9034__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_bf16)))
8979svfloat32_t svzip1q_f32(svfloat32_t, svfloat32_t);9035svbfloat16_t svexpand(svbool_t, svbfloat16_t);
8980__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f16)))9036__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s8)))
8981svfloat16_t svzip1q_f16(svfloat16_t, svfloat16_t);9037svint8_t svexpand(svbool_t, svint8_t);
8982__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s32)))9038__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f64)))
8983svint32_t svzip1q_s32(svint32_t, svint32_t);9039svfloat64_t svexpand(svbool_t, svfloat64_t);
8984__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s64)))9040__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f32)))
8985svint64_t svzip1q_s64(svint64_t, svint64_t);9041svfloat32_t svexpand(svbool_t, svfloat32_t);
8986__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s16)))9042__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f16)))
8987svint16_t svzip1q_s16(svint16_t, svint16_t);9043svfloat16_t svexpand(svbool_t, svfloat16_t);
8988__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u8)))9044__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s32)))
8989svuint8_t svzip2q_u8(svuint8_t, svuint8_t);9045svint32_t svexpand(svbool_t, svint32_t);
8990__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u32)))9046__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s64)))
8991svuint32_t svzip2q_u32(svuint32_t, svuint32_t);9047svint64_t svexpand(svbool_t, svint64_t);
8992__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u64)))9048__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_mf8)))
8993svuint64_t svzip2q_u64(svuint64_t, svuint64_t);9049svmfloat8_t svexpand(svbool_t, svmfloat8_t);
8994__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u16)))9050__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s16)))
8995svuint16_t svzip2q_u16(svuint16_t, svuint16_t);9051svint16_t svexpand(svbool_t, svint16_t);
8996__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_bf16)))
8997svbfloat16_t svzip2q_bf16(svbfloat16_t, svbfloat16_t);
8998__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s8)))
8999svint8_t svzip2q_s8(svint8_t, svint8_t);
9000__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f64)))
9001svfloat64_t svzip2q_f64(svfloat64_t, svfloat64_t);
9002__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f32)))
9003svfloat32_t svzip2q_f32(svfloat32_t, svfloat32_t);
9004__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f16)))
9005svfloat16_t svzip2q_f16(svfloat16_t, svfloat16_t);
9006__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s32)))
9007svint32_t svzip2q_s32(svint32_t, svint32_t);
9008__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s64)))
9009svint64_t svzip2q_s64(svint64_t, svint64_t);
9010__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s16)))
9011svint16_t svzip2q_s16(svint16_t, svint16_t);
9012__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u8)))
9013svuint8_t svld1ro(svbool_t, uint8_t const *);
9014__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u32)))
9015svuint32_t svld1ro(svbool_t, uint32_t const *);
9016__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u64)))
9017svuint64_t svld1ro(svbool_t, uint64_t const *);
9018__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u16)))
9019svuint16_t svld1ro(svbool_t, uint16_t const *);
9020__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_bf16)))
9021svbfloat16_t svld1ro(svbool_t, bfloat16_t const *);
9022__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s8)))
9023svint8_t svld1ro(svbool_t, int8_t const *);
9024__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f64)))
9025svfloat64_t svld1ro(svbool_t, float64_t const *);
9026__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f32)))
9027svfloat32_t svld1ro(svbool_t, float32_t const *);
9028__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f16)))
9029svfloat16_t svld1ro(svbool_t, float16_t const *);
9030__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s32)))
9031svint32_t svld1ro(svbool_t, int32_t const *);
9032__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s64)))
9033svint64_t svld1ro(svbool_t, int64_t const *);
9034__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_mf8)))
9035svmfloat8_t svld1ro(svbool_t, mfloat8_t const *);
9036__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s16)))
9037svint16_t svld1ro(svbool_t, int16_t const *);
9038__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f64)))
9039svfloat64_t svmmla(svfloat64_t, svfloat64_t, svfloat64_t);
9040__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u8)))
9041svuint8_t svtrn1q(svuint8_t, svuint8_t);
9042__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u32)))
9043svuint32_t svtrn1q(svuint32_t, svuint32_t);
9044__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u64)))
9045svuint64_t svtrn1q(svuint64_t, svuint64_t);
9046__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u16)))
9047svuint16_t svtrn1q(svuint16_t, svuint16_t);
9048__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_bf16)))
9049svbfloat16_t svtrn1q(svbfloat16_t, svbfloat16_t);
9050__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s8)))
9051svint8_t svtrn1q(svint8_t, svint8_t);
9052__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f64)))
9053svfloat64_t svtrn1q(svfloat64_t, svfloat64_t);
9054__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f32)))
9055svfloat32_t svtrn1q(svfloat32_t, svfloat32_t);
9056__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f16)))
9057svfloat16_t svtrn1q(svfloat16_t, svfloat16_t);
9058__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s32)))
9059svint32_t svtrn1q(svint32_t, svint32_t);
9060__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s64)))
9061svint64_t svtrn1q(svint64_t, svint64_t);
9062__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s16)))
9063svint16_t svtrn1q(svint16_t, svint16_t);
9064__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u8)))
9065svuint8_t svtrn2q(svuint8_t, svuint8_t);
9066__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u32)))
9067svuint32_t svtrn2q(svuint32_t, svuint32_t);
9068__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u64)))
9069svuint64_t svtrn2q(svuint64_t, svuint64_t);
9070__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u16)))
9071svuint16_t svtrn2q(svuint16_t, svuint16_t);
9072__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_bf16)))
9073svbfloat16_t svtrn2q(svbfloat16_t, svbfloat16_t);
9074__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s8)))
9075svint8_t svtrn2q(svint8_t, svint8_t);
9076__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f64)))
9077svfloat64_t svtrn2q(svfloat64_t, svfloat64_t);
9078__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f32)))
9079svfloat32_t svtrn2q(svfloat32_t, svfloat32_t);
9080__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f16)))
9081svfloat16_t svtrn2q(svfloat16_t, svfloat16_t);
9082__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s32)))
9083svint32_t svtrn2q(svint32_t, svint32_t);
9084__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s64)))
9085svint64_t svtrn2q(svint64_t, svint64_t);
9086__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s16)))
9087svint16_t svtrn2q(svint16_t, svint16_t);
9088__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u8)))
9089svuint8_t svuzp1q(svuint8_t, svuint8_t);
9090__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u32)))
9091svuint32_t svuzp1q(svuint32_t, svuint32_t);
9092__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u64)))
9093svuint64_t svuzp1q(svuint64_t, svuint64_t);
9094__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u16)))
9095svuint16_t svuzp1q(svuint16_t, svuint16_t);
9096__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_bf16)))
9097svbfloat16_t svuzp1q(svbfloat16_t, svbfloat16_t);
9098__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s8)))
9099svint8_t svuzp1q(svint8_t, svint8_t);
9100__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f64)))
9101svfloat64_t svuzp1q(svfloat64_t, svfloat64_t);
9102__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f32)))
9103svfloat32_t svuzp1q(svfloat32_t, svfloat32_t);
9104__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f16)))
9105svfloat16_t svuzp1q(svfloat16_t, svfloat16_t);
9106__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s32)))
9107svint32_t svuzp1q(svint32_t, svint32_t);
9108__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s64)))
9109svint64_t svuzp1q(svint64_t, svint64_t);
9110__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s16)))
9111svint16_t svuzp1q(svint16_t, svint16_t);
9112__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u8)))
9113svuint8_t svuzp2q(svuint8_t, svuint8_t);
9114__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u32)))
9115svuint32_t svuzp2q(svuint32_t, svuint32_t);
9116__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u64)))
9117svuint64_t svuzp2q(svuint64_t, svuint64_t);
9118__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u16)))
9119svuint16_t svuzp2q(svuint16_t, svuint16_t);
9120__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_bf16)))
9121svbfloat16_t svuzp2q(svbfloat16_t, svbfloat16_t);
9122__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s8)))
9123svint8_t svuzp2q(svint8_t, svint8_t);
9124__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f64)))
9125svfloat64_t svuzp2q(svfloat64_t, svfloat64_t);
9126__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f32)))
9127svfloat32_t svuzp2q(svfloat32_t, svfloat32_t);
9128__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f16)))
9129svfloat16_t svuzp2q(svfloat16_t, svfloat16_t);
9130__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s32)))
9131svint32_t svuzp2q(svint32_t, svint32_t);
9132__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s64)))
9133svint64_t svuzp2q(svint64_t, svint64_t);
9134__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s16)))
9135svint16_t svuzp2q(svint16_t, svint16_t);
9136__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u8)))
9137svuint8_t svzip1q(svuint8_t, svuint8_t);
9138__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u32)))
9139svuint32_t svzip1q(svuint32_t, svuint32_t);
9140__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u64)))
9141svuint64_t svzip1q(svuint64_t, svuint64_t);
9142__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u16)))
9143svuint16_t svzip1q(svuint16_t, svuint16_t);
9144__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_bf16)))
9145svbfloat16_t svzip1q(svbfloat16_t, svbfloat16_t);
9146__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s8)))
9147svint8_t svzip1q(svint8_t, svint8_t);
9148__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f64)))
9149svfloat64_t svzip1q(svfloat64_t, svfloat64_t);
9150__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f32)))
9151svfloat32_t svzip1q(svfloat32_t, svfloat32_t);
9152__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f16)))
9153svfloat16_t svzip1q(svfloat16_t, svfloat16_t);
9154__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s32)))
9155svint32_t svzip1q(svint32_t, svint32_t);
9156__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s64)))
9157svint64_t svzip1q(svint64_t, svint64_t);
9158__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s16)))
9159svint16_t svzip1q(svint16_t, svint16_t);
9160__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u8)))
9161svuint8_t svzip2q(svuint8_t, svuint8_t);
9162__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u32)))
9163svuint32_t svzip2q(svuint32_t, svuint32_t);
9164__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u64)))
9165svuint64_t svzip2q(svuint64_t, svuint64_t);
9166__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u16)))
9167svuint16_t svzip2q(svuint16_t, svuint16_t);
9168__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_bf16)))
9169svbfloat16_t svzip2q(svbfloat16_t, svbfloat16_t);
9170__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s8)))
9171svint8_t svzip2q(svint8_t, svint8_t);
9172__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f64)))
9173svfloat64_t svzip2q(svfloat64_t, svfloat64_t);
9174__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f32)))
9175svfloat32_t svzip2q(svfloat32_t, svfloat32_t);
9176__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f16)))
9177svfloat16_t svzip2q(svfloat16_t, svfloat16_t);
9178__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s32)))
9179svint32_t svzip2q(svint32_t, svint32_t);
9180__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s64)))
9181svint64_t svzip2q(svint64_t, svint64_t);
9182__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s16)))
9183svint16_t svzip2q(svint16_t, svint16_t);
9184__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_s32)))
9185svint32_t svmmla_s32(svint32_t, svint8_t, svint8_t);
9186__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_u32)))
9187svuint32_t svmmla_u32(svuint32_t, svuint8_t, svuint8_t);
9188__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusmmla_s32)))
9189svint32_t svusmmla_s32(svint32_t, svuint8_t, svint8_t);
9190__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_s32)))
9191svint32_t svmmla(svint32_t, svint8_t, svint8_t);
9192__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_u32)))
9193svuint32_t svmmla(svuint32_t, svuint8_t, svuint8_t);
9194__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusmmla_s32)))
9195svint32_t svusmmla(svint32_t, svuint8_t, svint8_t);
9196__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_n_s32)))
9197svint32_t svsudot_n_s32(svint32_t, svint8_t, uint8_t);
9198__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_s32)))
9199svint32_t svsudot_s32(svint32_t, svint8_t, svuint8_t);
9200__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_lane_s32)))
9201svint32_t svsudot_lane_s32(svint32_t, svint8_t, svuint8_t, uint64_t);
9202__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_n_s32)))
9203svint32_t svusdot_n_s32(svint32_t, svuint8_t, int8_t);
9204__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_s32)))
9205svint32_t svusdot_s32(svint32_t, svuint8_t, svint8_t);
9206__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_lane_s32)))
9207svint32_t svusdot_lane_s32(svint32_t, svuint8_t, svint8_t, uint64_t);
9208__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_n_s32)))
9209svint32_t svsudot(svint32_t, svint8_t, uint8_t);
9210__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_s32)))
9211svint32_t svsudot(svint32_t, svint8_t, svuint8_t);
9212__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_lane_s32)))
9213svint32_t svsudot_lane(svint32_t, svint8_t, svuint8_t, uint64_t);
9214__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_n_s32)))
9215svint32_t svusdot(svint32_t, svuint8_t, int8_t);
9216__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_s32)))
9217svint32_t svusdot(svint32_t, svuint8_t, svint8_t);
9218__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_lane_s32)))
9219svint32_t svusdot_lane(svint32_t, svuint8_t, svint8_t, uint64_t);
9220__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_u64)))
9221svuint64_t svrax1_u64(svuint64_t, svuint64_t);
9222__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_s64)))
9223svint64_t svrax1_s64(svint64_t, svint64_t);
9224__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_u64)))
9225svuint64_t svrax1(svuint64_t, svuint64_t);
9226__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_s64)))
9227svint64_t svrax1(svint64_t, svint64_t);
9228__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u32_z)))
9229svuint32_t svhistcnt_u32_z(svbool_t, svuint32_t, svuint32_t);
9230__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u64_z)))
9231svuint64_t svhistcnt_u64_z(svbool_t, svuint64_t, svuint64_t);
9232__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s32_z)))
9233svuint32_t svhistcnt_s32_z(svbool_t, svint32_t, svint32_t);
9234__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s64_z)))
9235svuint64_t svhistcnt_s64_z(svbool_t, svint64_t, svint64_t);
9236__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_u8)))
9237svuint8_t svhistseg_u8(svuint8_t, svuint8_t);
9238__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_s8)))
9239svuint8_t svhistseg_s8(svint8_t, svint8_t);
9240__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_u32)))
9241svuint32_t svldnt1_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t);
9242__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_u64)))
9243svuint64_t svldnt1_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
9244__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_f64)))
9245svfloat64_t svldnt1_gather_u64base_index_f64(svbool_t, svuint64_t, int64_t);
9246__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_f32)))
9247svfloat32_t svldnt1_gather_u32base_index_f32(svbool_t, svuint32_t, int64_t);
9248__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_s32)))
9249svint32_t svldnt1_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t);
9250__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_s64)))
9251svint64_t svldnt1_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
9252__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_u32)))
9253svuint32_t svldnt1_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
9254__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_u64)))
9255svuint64_t svldnt1_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
9256__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_f64)))
9257svfloat64_t svldnt1_gather_u64base_offset_f64(svbool_t, svuint64_t, int64_t);
9258__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_f32)))
9259svfloat32_t svldnt1_gather_u32base_offset_f32(svbool_t, svuint32_t, int64_t);
9260__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_s32)))
9261svint32_t svldnt1_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
9262__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_s64)))
9263svint64_t svldnt1_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
9264__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_u32)))
9265svuint32_t svldnt1_gather_u32base_u32(svbool_t, svuint32_t);
9266__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_u64)))
9267svuint64_t svldnt1_gather_u64base_u64(svbool_t, svuint64_t);
9268__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_f64)))
9269svfloat64_t svldnt1_gather_u64base_f64(svbool_t, svuint64_t);
9270__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_f32)))
9271svfloat32_t svldnt1_gather_u32base_f32(svbool_t, svuint32_t);
9272__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_s32)))
9273svint32_t svldnt1_gather_u32base_s32(svbool_t, svuint32_t);
9274__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_s64)))
9275svint64_t svldnt1_gather_u64base_s64(svbool_t, svuint64_t);
9276__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_u64)))
9277svuint64_t svldnt1_gather_s64index_u64(svbool_t, uint64_t const *, svint64_t);
9278__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_f64)))
9279svfloat64_t svldnt1_gather_s64index_f64(svbool_t, float64_t const *, svint64_t);
9280__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_s64)))
9281svint64_t svldnt1_gather_s64index_s64(svbool_t, int64_t const *, svint64_t);
9282__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_u64)))
9283svuint64_t svldnt1_gather_u64index_u64(svbool_t, uint64_t const *, svuint64_t);
9284__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_f64)))
9285svfloat64_t svldnt1_gather_u64index_f64(svbool_t, float64_t const *, svuint64_t);
9286__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_s64)))
9287svint64_t svldnt1_gather_u64index_s64(svbool_t, int64_t const *, svuint64_t);
9288__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_u32)))
9289svuint32_t svldnt1_gather_u32offset_u32(svbool_t, uint32_t const *, svuint32_t);
9290__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_f32)))
9291svfloat32_t svldnt1_gather_u32offset_f32(svbool_t, float32_t const *, svuint32_t);
9292__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_s32)))
9293svint32_t svldnt1_gather_u32offset_s32(svbool_t, int32_t const *, svuint32_t);
9294__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_u64)))
9295svuint64_t svldnt1_gather_s64offset_u64(svbool_t, uint64_t const *, svint64_t);
9296__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_f64)))
9297svfloat64_t svldnt1_gather_s64offset_f64(svbool_t, float64_t const *, svint64_t);
9298__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_s64)))
9299svint64_t svldnt1_gather_s64offset_s64(svbool_t, int64_t const *, svint64_t);
9300__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_u64)))
9301svuint64_t svldnt1_gather_u64offset_u64(svbool_t, uint64_t const *, svuint64_t);
9302__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_f64)))
9303svfloat64_t svldnt1_gather_u64offset_f64(svbool_t, float64_t const *, svuint64_t);
9304__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_s64)))
9305svint64_t svldnt1_gather_u64offset_s64(svbool_t, int64_t const *, svuint64_t);
9306__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_u32)))
9307svuint32_t svldnt1sb_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
9308__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_u64)))
9309svuint64_t svldnt1sb_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
9310__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_s32)))
9311svint32_t svldnt1sb_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
9312__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_s64)))
9313svint64_t svldnt1sb_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
9314__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_u32)))
9315svuint32_t svldnt1sb_gather_u32base_u32(svbool_t, svuint32_t);
9316__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_u64)))
9317svuint64_t svldnt1sb_gather_u64base_u64(svbool_t, svuint64_t);
9318__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_s32)))
9319svint32_t svldnt1sb_gather_u32base_s32(svbool_t, svuint32_t);
9320__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_s64)))
9321svint64_t svldnt1sb_gather_u64base_s64(svbool_t, svuint64_t);
9322__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_u32)))
9323svuint32_t svldnt1sb_gather_u32offset_u32(svbool_t, int8_t const *, svuint32_t);
9324__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_s32)))
9325svint32_t svldnt1sb_gather_u32offset_s32(svbool_t, int8_t const *, svuint32_t);
9326__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_u64)))
9327svuint64_t svldnt1sb_gather_s64offset_u64(svbool_t, int8_t const *, svint64_t);
9328__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_s64)))
9329svint64_t svldnt1sb_gather_s64offset_s64(svbool_t, int8_t const *, svint64_t);
9330__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_u64)))
9331svuint64_t svldnt1sb_gather_u64offset_u64(svbool_t, int8_t const *, svuint64_t);
9332__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_s64)))
9333svint64_t svldnt1sb_gather_u64offset_s64(svbool_t, int8_t const *, svuint64_t);
9334__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_u32)))
9335svuint32_t svldnt1sh_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t);
9336__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_u64)))
9337svuint64_t svldnt1sh_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
9338__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_s32)))
9339svint32_t svldnt1sh_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t);
9340__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_s64)))
9341svint64_t svldnt1sh_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
9342__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_u32)))
9343svuint32_t svldnt1sh_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
9344__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_u64)))
9345svuint64_t svldnt1sh_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
9346__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_s32)))
9347svint32_t svldnt1sh_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
9348__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_s64)))
9349svint64_t svldnt1sh_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
9350__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_u32)))
9351svuint32_t svldnt1sh_gather_u32base_u32(svbool_t, svuint32_t);
9352__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_u64)))
9353svuint64_t svldnt1sh_gather_u64base_u64(svbool_t, svuint64_t);
9354__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_s32)))
9355svint32_t svldnt1sh_gather_u32base_s32(svbool_t, svuint32_t);
9356__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_s64)))
9357svint64_t svldnt1sh_gather_u64base_s64(svbool_t, svuint64_t);
9358__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_u64)))
9359svuint64_t svldnt1sh_gather_s64index_u64(svbool_t, int16_t const *, svint64_t);
9360__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_s64)))
9361svint64_t svldnt1sh_gather_s64index_s64(svbool_t, int16_t const *, svint64_t);
9362__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_u64)))
9363svuint64_t svldnt1sh_gather_u64index_u64(svbool_t, int16_t const *, svuint64_t);
9364__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_s64)))
9365svint64_t svldnt1sh_gather_u64index_s64(svbool_t, int16_t const *, svuint64_t);
9366__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_u32)))
9367svuint32_t svldnt1sh_gather_u32offset_u32(svbool_t, int16_t const *, svuint32_t);
9368__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_s32)))
9369svint32_t svldnt1sh_gather_u32offset_s32(svbool_t, int16_t const *, svuint32_t);
9370__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_u64)))
9371svuint64_t svldnt1sh_gather_s64offset_u64(svbool_t, int16_t const *, svint64_t);
9372__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_s64)))
9373svint64_t svldnt1sh_gather_s64offset_s64(svbool_t, int16_t const *, svint64_t);
9374__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_u64)))
9375svuint64_t svldnt1sh_gather_u64offset_u64(svbool_t, int16_t const *, svuint64_t);
9376__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_s64)))
9377svint64_t svldnt1sh_gather_u64offset_s64(svbool_t, int16_t const *, svuint64_t);
9378__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_u64)))
9379svuint64_t svldnt1sw_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
9380__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_s64)))
9381svint64_t svldnt1sw_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
9382__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_u64)))
9383svuint64_t svldnt1sw_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
9384__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_s64)))
9385svint64_t svldnt1sw_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
9386__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_u64)))
9387svuint64_t svldnt1sw_gather_u64base_u64(svbool_t, svuint64_t);
9388__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_s64)))
9389svint64_t svldnt1sw_gather_u64base_s64(svbool_t, svuint64_t);
9390__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_u64)))
9391svuint64_t svldnt1sw_gather_s64index_u64(svbool_t, int32_t const *, svint64_t);
9392__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_s64)))
9393svint64_t svldnt1sw_gather_s64index_s64(svbool_t, int32_t const *, svint64_t);
9394__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_u64)))
9395svuint64_t svldnt1sw_gather_u64index_u64(svbool_t, int32_t const *, svuint64_t);
9396__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_s64)))
9397svint64_t svldnt1sw_gather_u64index_s64(svbool_t, int32_t const *, svuint64_t);
9398__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_u64)))
9399svuint64_t svldnt1sw_gather_s64offset_u64(svbool_t, int32_t const *, svint64_t);
9400__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_s64)))
9401svint64_t svldnt1sw_gather_s64offset_s64(svbool_t, int32_t const *, svint64_t);
9402__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_u64)))
9403svuint64_t svldnt1sw_gather_u64offset_u64(svbool_t, int32_t const *, svuint64_t);
9404__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_s64)))
9405svint64_t svldnt1sw_gather_u64offset_s64(svbool_t, int32_t const *, svuint64_t);
9406__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_u32)))
9407svuint32_t svldnt1ub_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
9408__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_u64)))
9409svuint64_t svldnt1ub_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
9410__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_s32)))
9411svint32_t svldnt1ub_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
9412__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_s64)))
9413svint64_t svldnt1ub_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
9414__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_u32)))
9415svuint32_t svldnt1ub_gather_u32base_u32(svbool_t, svuint32_t);
9416__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_u64)))
9417svuint64_t svldnt1ub_gather_u64base_u64(svbool_t, svuint64_t);
9418__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_s32)))
9419svint32_t svldnt1ub_gather_u32base_s32(svbool_t, svuint32_t);
9420__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_s64)))
9421svint64_t svldnt1ub_gather_u64base_s64(svbool_t, svuint64_t);
9422__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_u32)))
9423svuint32_t svldnt1ub_gather_u32offset_u32(svbool_t, uint8_t const *, svuint32_t);
9424__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_s32)))
9425svint32_t svldnt1ub_gather_u32offset_s32(svbool_t, uint8_t const *, svuint32_t);
9426__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_u64)))
9427svuint64_t svldnt1ub_gather_s64offset_u64(svbool_t, uint8_t const *, svint64_t);
9428__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_s64)))
9429svint64_t svldnt1ub_gather_s64offset_s64(svbool_t, uint8_t const *, svint64_t);
9430__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_u64)))
9431svuint64_t svldnt1ub_gather_u64offset_u64(svbool_t, uint8_t const *, svuint64_t);
9432__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_s64)))
9433svint64_t svldnt1ub_gather_u64offset_s64(svbool_t, uint8_t const *, svuint64_t);
9434__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_u32)))
9435svuint32_t svldnt1uh_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t);
9436__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_u64)))
9437svuint64_t svldnt1uh_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
9438__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_s32)))
9439svint32_t svldnt1uh_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t);
9440__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_s64)))
9441svint64_t svldnt1uh_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
9442__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_u32)))
9443svuint32_t svldnt1uh_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
9444__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_u64)))
9445svuint64_t svldnt1uh_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
9446__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_s32)))
9447svint32_t svldnt1uh_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
9448__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_s64)))
9449svint64_t svldnt1uh_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
9450__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_u32)))
9451svuint32_t svldnt1uh_gather_u32base_u32(svbool_t, svuint32_t);
9452__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_u64)))
9453svuint64_t svldnt1uh_gather_u64base_u64(svbool_t, svuint64_t);
9454__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_s32)))
9455svint32_t svldnt1uh_gather_u32base_s32(svbool_t, svuint32_t);
9456__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_s64)))
9457svint64_t svldnt1uh_gather_u64base_s64(svbool_t, svuint64_t);
9458__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_u64)))
9459svuint64_t svldnt1uh_gather_s64index_u64(svbool_t, uint16_t const *, svint64_t);
9460__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_s64)))
9461svint64_t svldnt1uh_gather_s64index_s64(svbool_t, uint16_t const *, svint64_t);
9462__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_u64)))
9463svuint64_t svldnt1uh_gather_u64index_u64(svbool_t, uint16_t const *, svuint64_t);
9464__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_s64)))
9465svint64_t svldnt1uh_gather_u64index_s64(svbool_t, uint16_t const *, svuint64_t);
9466__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_u32)))
9467svuint32_t svldnt1uh_gather_u32offset_u32(svbool_t, uint16_t const *, svuint32_t);
9468__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_s32)))
9469svint32_t svldnt1uh_gather_u32offset_s32(svbool_t, uint16_t const *, svuint32_t);
9470__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_u64)))
9471svuint64_t svldnt1uh_gather_s64offset_u64(svbool_t, uint16_t const *, svint64_t);
9472__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_s64)))
9473svint64_t svldnt1uh_gather_s64offset_s64(svbool_t, uint16_t const *, svint64_t);
9474__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_u64)))
9475svuint64_t svldnt1uh_gather_u64offset_u64(svbool_t, uint16_t const *, svuint64_t);
9476__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_s64)))
9477svint64_t svldnt1uh_gather_u64offset_s64(svbool_t, uint16_t const *, svuint64_t);
9478__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_u64)))
9479svuint64_t svldnt1uw_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
9480__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_s64)))
9481svint64_t svldnt1uw_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
9482__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_u64)))
9483svuint64_t svldnt1uw_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
9484__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_s64)))
9485svint64_t svldnt1uw_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
9486__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_u64)))
9487svuint64_t svldnt1uw_gather_u64base_u64(svbool_t, svuint64_t);
9488__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_s64)))
9489svint64_t svldnt1uw_gather_u64base_s64(svbool_t, svuint64_t);
9490__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_u64)))
9491svuint64_t svldnt1uw_gather_s64index_u64(svbool_t, uint32_t const *, svint64_t);
9492__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_s64)))
9493svint64_t svldnt1uw_gather_s64index_s64(svbool_t, uint32_t const *, svint64_t);
9494__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_u64)))
9495svuint64_t svldnt1uw_gather_u64index_u64(svbool_t, uint32_t const *, svuint64_t);
9496__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_s64)))
9497svint64_t svldnt1uw_gather_u64index_s64(svbool_t, uint32_t const *, svuint64_t);
9498__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_u64)))
9499svuint64_t svldnt1uw_gather_s64offset_u64(svbool_t, uint32_t const *, svint64_t);
9500__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_s64)))
9501svint64_t svldnt1uw_gather_s64offset_s64(svbool_t, uint32_t const *, svint64_t);
9502__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_u64)))
9503svuint64_t svldnt1uw_gather_u64offset_u64(svbool_t, uint32_t const *, svuint64_t);
9504__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_s64)))
9505svint64_t svldnt1uw_gather_u64offset_s64(svbool_t, uint32_t const *, svuint64_t);
9506__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u8)))
9507svbool_t svmatch_u8(svbool_t, svuint8_t, svuint8_t);
9508__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u16)))
9509svbool_t svmatch_u16(svbool_t, svuint16_t, svuint16_t);
9510__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s8)))
9511svbool_t svmatch_s8(svbool_t, svint8_t, svint8_t);
9512__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s16)))
9513svbool_t svmatch_s16(svbool_t, svint16_t, svint16_t);
9514__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u8)))
9515svbool_t svnmatch_u8(svbool_t, svuint8_t, svuint8_t);
9516__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u16)))
9517svbool_t svnmatch_u16(svbool_t, svuint16_t, svuint16_t);
9518__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s8)))
9519svbool_t svnmatch_s8(svbool_t, svint8_t, svint8_t);
9520__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s16)))
9521svbool_t svnmatch_s16(svbool_t, svint16_t, svint16_t);
9522__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_u32)))
9523void svstnt1_scatter_u32base_index_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
9524__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_u64)))
9525void svstnt1_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
9526__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_f64)))
9527void svstnt1_scatter_u64base_index_f64(svbool_t, svuint64_t, int64_t, svfloat64_t);
9528__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_f32)))
9529void svstnt1_scatter_u32base_index_f32(svbool_t, svuint32_t, int64_t, svfloat32_t);
9530__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_s32)))
9531void svstnt1_scatter_u32base_index_s32(svbool_t, svuint32_t, int64_t, svint32_t);
9532__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_s64)))
9533void svstnt1_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t);
9534__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_u32)))
9535void svstnt1_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
9536__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_u64)))
9537void svstnt1_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
9538__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_f64)))
9539void svstnt1_scatter_u64base_offset_f64(svbool_t, svuint64_t, int64_t, svfloat64_t);
9540__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_f32)))
9541void svstnt1_scatter_u32base_offset_f32(svbool_t, svuint32_t, int64_t, svfloat32_t);
9542__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_s32)))
9543void svstnt1_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t);
9544__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_s64)))
9545void svstnt1_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
9546__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_u32)))
9547void svstnt1_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t);
9548__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_u64)))
9549void svstnt1_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
9550__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_f64)))
9551void svstnt1_scatter_u64base_f64(svbool_t, svuint64_t, svfloat64_t);
9552__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_f32)))
9553void svstnt1_scatter_u32base_f32(svbool_t, svuint32_t, svfloat32_t);
9554__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_s32)))
9555void svstnt1_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t);
9556__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_s64)))
9557void svstnt1_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
9558__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_u64)))
9559void svstnt1_scatter_s64index_u64(svbool_t, uint64_t *, svint64_t, svuint64_t);
9560__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_f64)))
9561void svstnt1_scatter_s64index_f64(svbool_t, float64_t *, svint64_t, svfloat64_t);
9562__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_s64)))
9563void svstnt1_scatter_s64index_s64(svbool_t, int64_t *, svint64_t, svint64_t);
9564__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_u64)))
9565void svstnt1_scatter_u64index_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t);
9566__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_f64)))
9567void svstnt1_scatter_u64index_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t);
9568__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_s64)))
9569void svstnt1_scatter_u64index_s64(svbool_t, int64_t *, svuint64_t, svint64_t);
9570__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_u32)))
9571void svstnt1_scatter_u32offset_u32(svbool_t, uint32_t *, svuint32_t, svuint32_t);
9572__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_f32)))
9573void svstnt1_scatter_u32offset_f32(svbool_t, float32_t *, svuint32_t, svfloat32_t);
9574__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_s32)))
9575void svstnt1_scatter_u32offset_s32(svbool_t, int32_t *, svuint32_t, svint32_t);
9576__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_u64)))
9577void svstnt1_scatter_s64offset_u64(svbool_t, uint64_t *, svint64_t, svuint64_t);
9578__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_f64)))
9579void svstnt1_scatter_s64offset_f64(svbool_t, float64_t *, svint64_t, svfloat64_t);
9580__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_s64)))
9581void svstnt1_scatter_s64offset_s64(svbool_t, int64_t *, svint64_t, svint64_t);
9582__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_u64)))
9583void svstnt1_scatter_u64offset_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t);
9584__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_f64)))
9585void svstnt1_scatter_u64offset_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t);
9586__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_s64)))
9587void svstnt1_scatter_u64offset_s64(svbool_t, int64_t *, svuint64_t, svint64_t);
9588__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_u32)))
9589void svstnt1b_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
9590__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_u64)))
9591void svstnt1b_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
9592__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_s32)))
9593void svstnt1b_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t);
9594__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_s64)))
9595void svstnt1b_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
9596__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_u32)))
9597void svstnt1b_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t);
9598__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_u64)))
9599void svstnt1b_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
9600__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_s32)))
9601void svstnt1b_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t);
9602__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_s64)))
9603void svstnt1b_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
9604__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_s32)))
9605void svstnt1b_scatter_u32offset_s32(svbool_t, int8_t *, svuint32_t, svint32_t);
9606__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_u32)))
9607void svstnt1b_scatter_u32offset_u32(svbool_t, uint8_t *, svuint32_t, svuint32_t);
9608__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_s64)))
9609void svstnt1b_scatter_s64offset_s64(svbool_t, int8_t *, svint64_t, svint64_t);
9610__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_u64)))
9611void svstnt1b_scatter_s64offset_u64(svbool_t, uint8_t *, svint64_t, svuint64_t);
9612__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_s64)))
9613void svstnt1b_scatter_u64offset_s64(svbool_t, int8_t *, svuint64_t, svint64_t);
9614__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_u64)))
9615void svstnt1b_scatter_u64offset_u64(svbool_t, uint8_t *, svuint64_t, svuint64_t);
9616__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_u32)))
9617void svstnt1h_scatter_u32base_index_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
9618__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_u64)))
9619void svstnt1h_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
9620__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_s32)))
9621void svstnt1h_scatter_u32base_index_s32(svbool_t, svuint32_t, int64_t, svint32_t);
9622__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_s64)))
9623void svstnt1h_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t);
9624__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_u32)))
9625void svstnt1h_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
9626__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_u64)))
9627void svstnt1h_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
9628__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_s32)))
9629void svstnt1h_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t);
9630__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_s64)))
9631void svstnt1h_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
9632__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_u32)))
9633void svstnt1h_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t);
9634__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_u64)))
9635void svstnt1h_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
9636__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_s32)))
9637void svstnt1h_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t);
9638__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_s64)))
9639void svstnt1h_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
9640__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_s64)))
9641void svstnt1h_scatter_s64index_s64(svbool_t, int16_t *, svint64_t, svint64_t);
9642__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_u64)))
9643void svstnt1h_scatter_s64index_u64(svbool_t, uint16_t *, svint64_t, svuint64_t);
9644__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_s64)))
9645void svstnt1h_scatter_u64index_s64(svbool_t, int16_t *, svuint64_t, svint64_t);
9646__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_u64)))
9647void svstnt1h_scatter_u64index_u64(svbool_t, uint16_t *, svuint64_t, svuint64_t);
9648__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_s32)))
9649void svstnt1h_scatter_u32offset_s32(svbool_t, int16_t *, svuint32_t, svint32_t);
9650__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_u32)))
9651void svstnt1h_scatter_u32offset_u32(svbool_t, uint16_t *, svuint32_t, svuint32_t);
9652__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_s64)))
9653void svstnt1h_scatter_s64offset_s64(svbool_t, int16_t *, svint64_t, svint64_t);
9654__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_u64)))
9655void svstnt1h_scatter_s64offset_u64(svbool_t, uint16_t *, svint64_t, svuint64_t);
9656__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_s64)))
9657void svstnt1h_scatter_u64offset_s64(svbool_t, int16_t *, svuint64_t, svint64_t);
9658__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_u64)))
9659void svstnt1h_scatter_u64offset_u64(svbool_t, uint16_t *, svuint64_t, svuint64_t);
9660__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_u64)))
9661void svstnt1w_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
9662__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_s64)))
9663void svstnt1w_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t);
9664__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_u64)))
9665void svstnt1w_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
9666__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_s64)))
9667void svstnt1w_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
9668__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_u64)))
9669void svstnt1w_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
9670__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_s64)))
9671void svstnt1w_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
9672__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_s64)))
9673void svstnt1w_scatter_s64index_s64(svbool_t, int32_t *, svint64_t, svint64_t);
9674__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_u64)))
9675void svstnt1w_scatter_s64index_u64(svbool_t, uint32_t *, svint64_t, svuint64_t);
9676__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_s64)))
9677void svstnt1w_scatter_u64index_s64(svbool_t, int32_t *, svuint64_t, svint64_t);
9678__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_u64)))
9679void svstnt1w_scatter_u64index_u64(svbool_t, uint32_t *, svuint64_t, svuint64_t);
9680__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_s64)))
9681void svstnt1w_scatter_s64offset_s64(svbool_t, int32_t *, svint64_t, svint64_t);
9682__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_u64)))
9683void svstnt1w_scatter_s64offset_u64(svbool_t, uint32_t *, svint64_t, svuint64_t);
9684__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_s64)))
9685void svstnt1w_scatter_u64offset_s64(svbool_t, int32_t *, svuint64_t, svint64_t);
9686__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_u64)))
9687void svstnt1w_scatter_u64offset_u64(svbool_t, uint32_t *, svuint64_t, svuint64_t);
9688__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u32_z)))
9689svuint32_t svhistcnt_z(svbool_t, svuint32_t, svuint32_t);
9690__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u64_z)))
9691svuint64_t svhistcnt_z(svbool_t, svuint64_t, svuint64_t);
9692__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s32_z)))
9693svuint32_t svhistcnt_z(svbool_t, svint32_t, svint32_t);
9694__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s64_z)))
9695svuint64_t svhistcnt_z(svbool_t, svint64_t, svint64_t);
9696__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_u8)))
9697svuint8_t svhistseg(svuint8_t, svuint8_t);
9698__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_s8)))
9699svuint8_t svhistseg(svint8_t, svint8_t);
9700__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_u32)))
9701svuint32_t svldnt1_gather_index_u32(svbool_t, svuint32_t, int64_t);
9702__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_u64)))
9703svuint64_t svldnt1_gather_index_u64(svbool_t, svuint64_t, int64_t);
9704__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_f64)))
9705svfloat64_t svldnt1_gather_index_f64(svbool_t, svuint64_t, int64_t);
9706__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_f32)))
9707svfloat32_t svldnt1_gather_index_f32(svbool_t, svuint32_t, int64_t);
9708__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_s32)))
9709svint32_t svldnt1_gather_index_s32(svbool_t, svuint32_t, int64_t);
9710__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_s64)))
9711svint64_t svldnt1_gather_index_s64(svbool_t, svuint64_t, int64_t);
9712__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_u32)))
9713svuint32_t svldnt1_gather_offset_u32(svbool_t, svuint32_t, int64_t);
9714__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_u64)))
9715svuint64_t svldnt1_gather_offset_u64(svbool_t, svuint64_t, int64_t);
9716__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_f64)))
9717svfloat64_t svldnt1_gather_offset_f64(svbool_t, svuint64_t, int64_t);
9718__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_f32)))
9719svfloat32_t svldnt1_gather_offset_f32(svbool_t, svuint32_t, int64_t);
9720__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_s32)))
9721svint32_t svldnt1_gather_offset_s32(svbool_t, svuint32_t, int64_t);
9722__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_s64)))
9723svint64_t svldnt1_gather_offset_s64(svbool_t, svuint64_t, int64_t);
9724__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_u32)))
9725svuint32_t svldnt1_gather_u32(svbool_t, svuint32_t);
9726__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_u64)))
9727svuint64_t svldnt1_gather_u64(svbool_t, svuint64_t);
9728__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_f64)))
9729svfloat64_t svldnt1_gather_f64(svbool_t, svuint64_t);
9730__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_f32)))
9731svfloat32_t svldnt1_gather_f32(svbool_t, svuint32_t);
9732__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_s32)))
9733svint32_t svldnt1_gather_s32(svbool_t, svuint32_t);
9734__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_s64)))
9735svint64_t svldnt1_gather_s64(svbool_t, svuint64_t);
9736__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_u64)))
9737svuint64_t svldnt1_gather_index(svbool_t, uint64_t const *, svint64_t);
9738__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_f64)))
9739svfloat64_t svldnt1_gather_index(svbool_t, float64_t const *, svint64_t);
9740__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_s64)))
9741svint64_t svldnt1_gather_index(svbool_t, int64_t const *, svint64_t);
9742__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_u64)))
9743svuint64_t svldnt1_gather_index(svbool_t, uint64_t const *, svuint64_t);
9744__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_f64)))
9745svfloat64_t svldnt1_gather_index(svbool_t, float64_t const *, svuint64_t);
9746__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_s64)))
9747svint64_t svldnt1_gather_index(svbool_t, int64_t const *, svuint64_t);
9748__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_u32)))
9749svuint32_t svldnt1_gather_offset(svbool_t, uint32_t const *, svuint32_t);
9750__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_f32)))
9751svfloat32_t svldnt1_gather_offset(svbool_t, float32_t const *, svuint32_t);
9752__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_s32)))
9753svint32_t svldnt1_gather_offset(svbool_t, int32_t const *, svuint32_t);
9754__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_u64)))
9755svuint64_t svldnt1_gather_offset(svbool_t, uint64_t const *, svint64_t);
9756__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_f64)))
9757svfloat64_t svldnt1_gather_offset(svbool_t, float64_t const *, svint64_t);
9758__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_s64)))
9759svint64_t svldnt1_gather_offset(svbool_t, int64_t const *, svint64_t);
9760__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_u64)))
9761svuint64_t svldnt1_gather_offset(svbool_t, uint64_t const *, svuint64_t);
9762__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_f64)))
9763svfloat64_t svldnt1_gather_offset(svbool_t, float64_t const *, svuint64_t);
9764__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_s64)))
9765svint64_t svldnt1_gather_offset(svbool_t, int64_t const *, svuint64_t);
9766__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_u32)))
9767svuint32_t svldnt1sb_gather_offset_u32(svbool_t, svuint32_t, int64_t);
9768__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_u64)))
9769svuint64_t svldnt1sb_gather_offset_u64(svbool_t, svuint64_t, int64_t);
9770__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_s32)))
9771svint32_t svldnt1sb_gather_offset_s32(svbool_t, svuint32_t, int64_t);
9772__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_s64)))
9773svint64_t svldnt1sb_gather_offset_s64(svbool_t, svuint64_t, int64_t);
9774__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_u32)))
9775svuint32_t svldnt1sb_gather_u32(svbool_t, svuint32_t);
9776__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_u64)))
9777svuint64_t svldnt1sb_gather_u64(svbool_t, svuint64_t);
9778__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_s32)))
9779svint32_t svldnt1sb_gather_s32(svbool_t, svuint32_t);
9780__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_s64)))
9781svint64_t svldnt1sb_gather_s64(svbool_t, svuint64_t);
9782__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_u32)))
9783svuint32_t svldnt1sb_gather_offset_u32(svbool_t, int8_t const *, svuint32_t);
9784__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_s32)))
9785svint32_t svldnt1sb_gather_offset_s32(svbool_t, int8_t const *, svuint32_t);
9786__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_u64)))
9787svuint64_t svldnt1sb_gather_offset_u64(svbool_t, int8_t const *, svint64_t);
9788__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_s64)))
9789svint64_t svldnt1sb_gather_offset_s64(svbool_t, int8_t const *, svint64_t);
9790__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_u64)))
9791svuint64_t svldnt1sb_gather_offset_u64(svbool_t, int8_t const *, svuint64_t);
9792__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_s64)))
9793svint64_t svldnt1sb_gather_offset_s64(svbool_t, int8_t const *, svuint64_t);
9794__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_u32)))
9795svuint32_t svldnt1sh_gather_index_u32(svbool_t, svuint32_t, int64_t);
9796__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_u64)))
9797svuint64_t svldnt1sh_gather_index_u64(svbool_t, svuint64_t, int64_t);
9798__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_s32)))
9799svint32_t svldnt1sh_gather_index_s32(svbool_t, svuint32_t, int64_t);
9800__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_s64)))
9801svint64_t svldnt1sh_gather_index_s64(svbool_t, svuint64_t, int64_t);
9802__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_u32)))
9803svuint32_t svldnt1sh_gather_offset_u32(svbool_t, svuint32_t, int64_t);
9804__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_u64)))
9805svuint64_t svldnt1sh_gather_offset_u64(svbool_t, svuint64_t, int64_t);
9806__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_s32)))
9807svint32_t svldnt1sh_gather_offset_s32(svbool_t, svuint32_t, int64_t);
9808__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_s64)))
9809svint64_t svldnt1sh_gather_offset_s64(svbool_t, svuint64_t, int64_t);
9810__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_u32)))
9811svuint32_t svldnt1sh_gather_u32(svbool_t, svuint32_t);
9812__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_u64)))
9813svuint64_t svldnt1sh_gather_u64(svbool_t, svuint64_t);
9814__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_s32)))
9815svint32_t svldnt1sh_gather_s32(svbool_t, svuint32_t);
9816__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_s64)))
9817svint64_t svldnt1sh_gather_s64(svbool_t, svuint64_t);
9818__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_u64)))
9819svuint64_t svldnt1sh_gather_index_u64(svbool_t, int16_t const *, svint64_t);
9820__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_s64)))
9821svint64_t svldnt1sh_gather_index_s64(svbool_t, int16_t const *, svint64_t);
9822__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_u64)))
9823svuint64_t svldnt1sh_gather_index_u64(svbool_t, int16_t const *, svuint64_t);
9824__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_s64)))
9825svint64_t svldnt1sh_gather_index_s64(svbool_t, int16_t const *, svuint64_t);
9826__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_u32)))
9827svuint32_t svldnt1sh_gather_offset_u32(svbool_t, int16_t const *, svuint32_t);
9828__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_s32)))
9829svint32_t svldnt1sh_gather_offset_s32(svbool_t, int16_t const *, svuint32_t);
9830__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_u64)))
9831svuint64_t svldnt1sh_gather_offset_u64(svbool_t, int16_t const *, svint64_t);
9832__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_s64)))
9833svint64_t svldnt1sh_gather_offset_s64(svbool_t, int16_t const *, svint64_t);
9834__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_u64)))
9835svuint64_t svldnt1sh_gather_offset_u64(svbool_t, int16_t const *, svuint64_t);
9836__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_s64)))
9837svint64_t svldnt1sh_gather_offset_s64(svbool_t, int16_t const *, svuint64_t);
9838__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_u64)))
9839svuint64_t svldnt1sw_gather_index_u64(svbool_t, svuint64_t, int64_t);
9840__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_s64)))
9841svint64_t svldnt1sw_gather_index_s64(svbool_t, svuint64_t, int64_t);
9842__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_u64)))
9843svuint64_t svldnt1sw_gather_offset_u64(svbool_t, svuint64_t, int64_t);
9844__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_s64)))
9845svint64_t svldnt1sw_gather_offset_s64(svbool_t, svuint64_t, int64_t);
9846__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_u64)))
9847svuint64_t svldnt1sw_gather_u64(svbool_t, svuint64_t);
9848__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_s64)))
9849svint64_t svldnt1sw_gather_s64(svbool_t, svuint64_t);
9850__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_u64)))
9851svuint64_t svldnt1sw_gather_index_u64(svbool_t, int32_t const *, svint64_t);
9852__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_s64)))
9853svint64_t svldnt1sw_gather_index_s64(svbool_t, int32_t const *, svint64_t);
9854__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_u64)))
9855svuint64_t svldnt1sw_gather_index_u64(svbool_t, int32_t const *, svuint64_t);
9856__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_s64)))
9857svint64_t svldnt1sw_gather_index_s64(svbool_t, int32_t const *, svuint64_t);
9858__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_u64)))
9859svuint64_t svldnt1sw_gather_offset_u64(svbool_t, int32_t const *, svint64_t);
9860__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_s64)))
9861svint64_t svldnt1sw_gather_offset_s64(svbool_t, int32_t const *, svint64_t);
9862__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_u64)))
9863svuint64_t svldnt1sw_gather_offset_u64(svbool_t, int32_t const *, svuint64_t);
9864__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_s64)))
9865svint64_t svldnt1sw_gather_offset_s64(svbool_t, int32_t const *, svuint64_t);
9866__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_u32)))
9867svuint32_t svldnt1ub_gather_offset_u32(svbool_t, svuint32_t, int64_t);
9868__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_u64)))
9869svuint64_t svldnt1ub_gather_offset_u64(svbool_t, svuint64_t, int64_t);
9870__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_s32)))
9871svint32_t svldnt1ub_gather_offset_s32(svbool_t, svuint32_t, int64_t);
9872__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_s64)))
9873svint64_t svldnt1ub_gather_offset_s64(svbool_t, svuint64_t, int64_t);
9874__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_u32)))
9875svuint32_t svldnt1ub_gather_u32(svbool_t, svuint32_t);
9876__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_u64)))
9877svuint64_t svldnt1ub_gather_u64(svbool_t, svuint64_t);
9878__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_s32)))
9879svint32_t svldnt1ub_gather_s32(svbool_t, svuint32_t);
9880__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_s64)))
9881svint64_t svldnt1ub_gather_s64(svbool_t, svuint64_t);
9882__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_u32)))
9883svuint32_t svldnt1ub_gather_offset_u32(svbool_t, uint8_t const *, svuint32_t);
9884__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_s32)))
9885svint32_t svldnt1ub_gather_offset_s32(svbool_t, uint8_t const *, svuint32_t);
9886__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_u64)))
9887svuint64_t svldnt1ub_gather_offset_u64(svbool_t, uint8_t const *, svint64_t);
9888__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_s64)))
9889svint64_t svldnt1ub_gather_offset_s64(svbool_t, uint8_t const *, svint64_t);
9890__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_u64)))
9891svuint64_t svldnt1ub_gather_offset_u64(svbool_t, uint8_t const *, svuint64_t);
9892__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_s64)))
9893svint64_t svldnt1ub_gather_offset_s64(svbool_t, uint8_t const *, svuint64_t);
9894__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_u32)))
9895svuint32_t svldnt1uh_gather_index_u32(svbool_t, svuint32_t, int64_t);
9896__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_u64)))
9897svuint64_t svldnt1uh_gather_index_u64(svbool_t, svuint64_t, int64_t);
9898__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_s32)))
9899svint32_t svldnt1uh_gather_index_s32(svbool_t, svuint32_t, int64_t);
9900__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_s64)))
9901svint64_t svldnt1uh_gather_index_s64(svbool_t, svuint64_t, int64_t);
9902__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_u32)))
9903svuint32_t svldnt1uh_gather_offset_u32(svbool_t, svuint32_t, int64_t);
9904__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_u64)))
9905svuint64_t svldnt1uh_gather_offset_u64(svbool_t, svuint64_t, int64_t);
9906__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_s32)))
9907svint32_t svldnt1uh_gather_offset_s32(svbool_t, svuint32_t, int64_t);
9908__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_s64)))
9909svint64_t svldnt1uh_gather_offset_s64(svbool_t, svuint64_t, int64_t);
9910__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_u32)))
9911svuint32_t svldnt1uh_gather_u32(svbool_t, svuint32_t);
9912__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_u64)))
9913svuint64_t svldnt1uh_gather_u64(svbool_t, svuint64_t);
9914__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_s32)))
9915svint32_t svldnt1uh_gather_s32(svbool_t, svuint32_t);
9916__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_s64)))
9917svint64_t svldnt1uh_gather_s64(svbool_t, svuint64_t);
9918__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_u64)))
9919svuint64_t svldnt1uh_gather_index_u64(svbool_t, uint16_t const *, svint64_t);
9920__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_s64)))
9921svint64_t svldnt1uh_gather_index_s64(svbool_t, uint16_t const *, svint64_t);
9922__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_u64)))
9923svuint64_t svldnt1uh_gather_index_u64(svbool_t, uint16_t const *, svuint64_t);
9924__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_s64)))
9925svint64_t svldnt1uh_gather_index_s64(svbool_t, uint16_t const *, svuint64_t);
9926__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_u32)))
9927svuint32_t svldnt1uh_gather_offset_u32(svbool_t, uint16_t const *, svuint32_t);
9928__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_s32)))
9929svint32_t svldnt1uh_gather_offset_s32(svbool_t, uint16_t const *, svuint32_t);
9930__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_u64)))
9931svuint64_t svldnt1uh_gather_offset_u64(svbool_t, uint16_t const *, svint64_t);
9932__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_s64)))
9933svint64_t svldnt1uh_gather_offset_s64(svbool_t, uint16_t const *, svint64_t);
9934__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_u64)))
9935svuint64_t svldnt1uh_gather_offset_u64(svbool_t, uint16_t const *, svuint64_t);
9936__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_s64)))
9937svint64_t svldnt1uh_gather_offset_s64(svbool_t, uint16_t const *, svuint64_t);
9938__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_u64)))
9939svuint64_t svldnt1uw_gather_index_u64(svbool_t, svuint64_t, int64_t);
9940__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_s64)))
9941svint64_t svldnt1uw_gather_index_s64(svbool_t, svuint64_t, int64_t);
9942__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_u64)))
9943svuint64_t svldnt1uw_gather_offset_u64(svbool_t, svuint64_t, int64_t);
9944__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_s64)))
9945svint64_t svldnt1uw_gather_offset_s64(svbool_t, svuint64_t, int64_t);
9946__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_u64)))
9947svuint64_t svldnt1uw_gather_u64(svbool_t, svuint64_t);
9948__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_s64)))
9949svint64_t svldnt1uw_gather_s64(svbool_t, svuint64_t);
9950__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_u64)))
9951svuint64_t svldnt1uw_gather_index_u64(svbool_t, uint32_t const *, svint64_t);
9952__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_s64)))
9953svint64_t svldnt1uw_gather_index_s64(svbool_t, uint32_t const *, svint64_t);
9954__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_u64)))
9955svuint64_t svldnt1uw_gather_index_u64(svbool_t, uint32_t const *, svuint64_t);
9956__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_s64)))
9957svint64_t svldnt1uw_gather_index_s64(svbool_t, uint32_t const *, svuint64_t);
9958__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_u64)))
9959svuint64_t svldnt1uw_gather_offset_u64(svbool_t, uint32_t const *, svint64_t);
9960__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_s64)))
9961svint64_t svldnt1uw_gather_offset_s64(svbool_t, uint32_t const *, svint64_t);
9962__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_u64)))
9963svuint64_t svldnt1uw_gather_offset_u64(svbool_t, uint32_t const *, svuint64_t);
9964__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_s64)))
9965svint64_t svldnt1uw_gather_offset_s64(svbool_t, uint32_t const *, svuint64_t);
9966__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u8)))
9967svbool_t svmatch(svbool_t, svuint8_t, svuint8_t);
9968__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u16)))
9969svbool_t svmatch(svbool_t, svuint16_t, svuint16_t);
9970__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s8)))
9971svbool_t svmatch(svbool_t, svint8_t, svint8_t);
9972__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s16)))
9973svbool_t svmatch(svbool_t, svint16_t, svint16_t);
9974__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u8)))
9975svbool_t svnmatch(svbool_t, svuint8_t, svuint8_t);
9976__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u16)))
9977svbool_t svnmatch(svbool_t, svuint16_t, svuint16_t);
9978__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s8)))
9979svbool_t svnmatch(svbool_t, svint8_t, svint8_t);
9980__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s16)))
9981svbool_t svnmatch(svbool_t, svint16_t, svint16_t);
9982__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_u32)))
9983void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svuint32_t);
9984__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_u64)))
9985void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t);
9986__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_f64)))
9987void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svfloat64_t);
9988__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_f32)))
9989void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svfloat32_t);
9990__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_s32)))
9991void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svint32_t);
9992__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_s64)))
9993void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t);
9994__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_u32)))
9995void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t);
9996__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_u64)))
9997void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
9998__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_f64)))
9999void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat64_t);
10000__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_f32)))
10001void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svfloat32_t);
10002__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_s32)))
10003void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t);
10004__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_s64)))
10005void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
10006__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_u32)))
10007void svstnt1_scatter(svbool_t, svuint32_t, svuint32_t);
10008__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_u64)))
10009void svstnt1_scatter(svbool_t, svuint64_t, svuint64_t);
10010__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_f64)))
10011void svstnt1_scatter(svbool_t, svuint64_t, svfloat64_t);
10012__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_f32)))
10013void svstnt1_scatter(svbool_t, svuint32_t, svfloat32_t);
10014__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_s32)))
10015void svstnt1_scatter(svbool_t, svuint32_t, svint32_t);
10016__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_s64)))
10017void svstnt1_scatter(svbool_t, svuint64_t, svint64_t);
10018__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_u64)))
10019void svstnt1_scatter_index(svbool_t, uint64_t *, svint64_t, svuint64_t);
10020__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_f64)))
10021void svstnt1_scatter_index(svbool_t, float64_t *, svint64_t, svfloat64_t);
10022__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_s64)))
10023void svstnt1_scatter_index(svbool_t, int64_t *, svint64_t, svint64_t);
10024__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_u64)))
10025void svstnt1_scatter_index(svbool_t, uint64_t *, svuint64_t, svuint64_t);
10026__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_f64)))
10027void svstnt1_scatter_index(svbool_t, float64_t *, svuint64_t, svfloat64_t);
10028__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_s64)))
10029void svstnt1_scatter_index(svbool_t, int64_t *, svuint64_t, svint64_t);
10030__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_u32)))
10031void svstnt1_scatter_offset(svbool_t, uint32_t *, svuint32_t, svuint32_t);
10032__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_f32)))
10033void svstnt1_scatter_offset(svbool_t, float32_t *, svuint32_t, svfloat32_t);
10034__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_s32)))
10035void svstnt1_scatter_offset(svbool_t, int32_t *, svuint32_t, svint32_t);
10036__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_u64)))
10037void svstnt1_scatter_offset(svbool_t, uint64_t *, svint64_t, svuint64_t);
10038__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_f64)))
10039void svstnt1_scatter_offset(svbool_t, float64_t *, svint64_t, svfloat64_t);
10040__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_s64)))
10041void svstnt1_scatter_offset(svbool_t, int64_t *, svint64_t, svint64_t);
10042__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_u64)))
10043void svstnt1_scatter_offset(svbool_t, uint64_t *, svuint64_t, svuint64_t);
10044__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_f64)))
10045void svstnt1_scatter_offset(svbool_t, float64_t *, svuint64_t, svfloat64_t);
10046__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_s64)))
10047void svstnt1_scatter_offset(svbool_t, int64_t *, svuint64_t, svint64_t);
10048__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_u32)))
10049void svstnt1b_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t);
10050__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_u64)))
10051void svstnt1b_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
10052__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_s32)))
10053void svstnt1b_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t);
10054__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_s64)))
10055void svstnt1b_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
10056__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_u32)))
10057void svstnt1b_scatter(svbool_t, svuint32_t, svuint32_t);
10058__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_u64)))
10059void svstnt1b_scatter(svbool_t, svuint64_t, svuint64_t);
10060__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_s32)))
10061void svstnt1b_scatter(svbool_t, svuint32_t, svint32_t);
10062__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_s64)))
10063void svstnt1b_scatter(svbool_t, svuint64_t, svint64_t);
10064__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_s32)))
10065void svstnt1b_scatter_offset(svbool_t, int8_t *, svuint32_t, svint32_t);
10066__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_u32)))
10067void svstnt1b_scatter_offset(svbool_t, uint8_t *, svuint32_t, svuint32_t);
10068__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_s64)))
10069void svstnt1b_scatter_offset(svbool_t, int8_t *, svint64_t, svint64_t);
10070__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_u64)))
10071void svstnt1b_scatter_offset(svbool_t, uint8_t *, svint64_t, svuint64_t);
10072__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_s64)))
10073void svstnt1b_scatter_offset(svbool_t, int8_t *, svuint64_t, svint64_t);
10074__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_u64)))
10075void svstnt1b_scatter_offset(svbool_t, uint8_t *, svuint64_t, svuint64_t);
10076__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_u32)))
10077void svstnt1h_scatter_index(svbool_t, svuint32_t, int64_t, svuint32_t);
10078__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_u64)))
10079void svstnt1h_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t);
10080__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_s32)))
10081void svstnt1h_scatter_index(svbool_t, svuint32_t, int64_t, svint32_t);
10082__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_s64)))
10083void svstnt1h_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t);
10084__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_u32)))
10085void svstnt1h_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t);
10086__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_u64)))
10087void svstnt1h_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
10088__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_s32)))
10089void svstnt1h_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t);
10090__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_s64)))
10091void svstnt1h_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
10092__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_u32)))
10093void svstnt1h_scatter(svbool_t, svuint32_t, svuint32_t);
10094__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_u64)))
10095void svstnt1h_scatter(svbool_t, svuint64_t, svuint64_t);
10096__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_s32)))
10097void svstnt1h_scatter(svbool_t, svuint32_t, svint32_t);
10098__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_s64)))
10099void svstnt1h_scatter(svbool_t, svuint64_t, svint64_t);
10100__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_s64)))
10101void svstnt1h_scatter_index(svbool_t, int16_t *, svint64_t, svint64_t);
10102__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_u64)))
10103void svstnt1h_scatter_index(svbool_t, uint16_t *, svint64_t, svuint64_t);
10104__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_s64)))
10105void svstnt1h_scatter_index(svbool_t, int16_t *, svuint64_t, svint64_t);
10106__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_u64)))
10107void svstnt1h_scatter_index(svbool_t, uint16_t *, svuint64_t, svuint64_t);
10108__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_s32)))
10109void svstnt1h_scatter_offset(svbool_t, int16_t *, svuint32_t, svint32_t);
10110__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_u32)))
10111void svstnt1h_scatter_offset(svbool_t, uint16_t *, svuint32_t, svuint32_t);
10112__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_s64)))
10113void svstnt1h_scatter_offset(svbool_t, int16_t *, svint64_t, svint64_t);
10114__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_u64)))
10115void svstnt1h_scatter_offset(svbool_t, uint16_t *, svint64_t, svuint64_t);
10116__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_s64)))
10117void svstnt1h_scatter_offset(svbool_t, int16_t *, svuint64_t, svint64_t);
10118__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_u64)))
10119void svstnt1h_scatter_offset(svbool_t, uint16_t *, svuint64_t, svuint64_t);
10120__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_u64)))
10121void svstnt1w_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t);
10122__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_s64)))
10123void svstnt1w_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t);
10124__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_u64)))
10125void svstnt1w_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
10126__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_s64)))
10127void svstnt1w_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
10128__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_u64)))
10129void svstnt1w_scatter(svbool_t, svuint64_t, svuint64_t);
10130__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_s64)))
10131void svstnt1w_scatter(svbool_t, svuint64_t, svint64_t);
10132__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_s64)))
10133void svstnt1w_scatter_index(svbool_t, int32_t *, svint64_t, svint64_t);
10134__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_u64)))
10135void svstnt1w_scatter_index(svbool_t, uint32_t *, svint64_t, svuint64_t);
10136__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_s64)))
10137void svstnt1w_scatter_index(svbool_t, int32_t *, svuint64_t, svint64_t);
10138__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_u64)))
10139void svstnt1w_scatter_index(svbool_t, uint32_t *, svuint64_t, svuint64_t);
10140__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_s64)))
10141void svstnt1w_scatter_offset(svbool_t, int32_t *, svint64_t, svint64_t);
10142__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_u64)))
10143void svstnt1w_scatter_offset(svbool_t, uint32_t *, svint64_t, svuint64_t);
10144__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_s64)))
10145void svstnt1w_scatter_offset(svbool_t, int32_t *, svuint64_t, svint64_t);
10146__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_u64)))
10147void svstnt1w_scatter_offset(svbool_t, uint32_t *, svuint64_t, svuint64_t);
10148__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_m)))
10149svfloat64_t svamax_n_f64_m(svbool_t, svfloat64_t, float64_t);
10150__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_m)))
10151svfloat32_t svamax_n_f32_m(svbool_t, svfloat32_t, float32_t);
10152__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_m)))
10153svfloat16_t svamax_n_f16_m(svbool_t, svfloat16_t, float16_t);
10154__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_x)))
10155svfloat64_t svamax_n_f64_x(svbool_t, svfloat64_t, float64_t);
10156__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_x)))
10157svfloat32_t svamax_n_f32_x(svbool_t, svfloat32_t, float32_t);
10158__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_x)))
10159svfloat16_t svamax_n_f16_x(svbool_t, svfloat16_t, float16_t);
10160__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_z)))
10161svfloat64_t svamax_n_f64_z(svbool_t, svfloat64_t, float64_t);
10162__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_z)))
10163svfloat32_t svamax_n_f32_z(svbool_t, svfloat32_t, float32_t);
10164__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_z)))
10165svfloat16_t svamax_n_f16_z(svbool_t, svfloat16_t, float16_t);
10166__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_m)))
10167svfloat64_t svamax_f64_m(svbool_t, svfloat64_t, svfloat64_t);
10168__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_m)))
10169svfloat32_t svamax_f32_m(svbool_t, svfloat32_t, svfloat32_t);
10170__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_m)))
10171svfloat16_t svamax_f16_m(svbool_t, svfloat16_t, svfloat16_t);
10172__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_x)))
10173svfloat64_t svamax_f64_x(svbool_t, svfloat64_t, svfloat64_t);
10174__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_x)))
10175svfloat32_t svamax_f32_x(svbool_t, svfloat32_t, svfloat32_t);
10176__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_x)))
10177svfloat16_t svamax_f16_x(svbool_t, svfloat16_t, svfloat16_t);
10178__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_z)))
10179svfloat64_t svamax_f64_z(svbool_t, svfloat64_t, svfloat64_t);
10180__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_z)))
10181svfloat32_t svamax_f32_z(svbool_t, svfloat32_t, svfloat32_t);
10182__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_z)))
10183svfloat16_t svamax_f16_z(svbool_t, svfloat16_t, svfloat16_t);
10184__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_m)))
10185svfloat64_t svamin_n_f64_m(svbool_t, svfloat64_t, float64_t);
10186__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_m)))
10187svfloat32_t svamin_n_f32_m(svbool_t, svfloat32_t, float32_t);
10188__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_m)))
10189svfloat16_t svamin_n_f16_m(svbool_t, svfloat16_t, float16_t);
10190__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_x)))
10191svfloat64_t svamin_n_f64_x(svbool_t, svfloat64_t, float64_t);
10192__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_x)))
10193svfloat32_t svamin_n_f32_x(svbool_t, svfloat32_t, float32_t);
10194__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_x)))
10195svfloat16_t svamin_n_f16_x(svbool_t, svfloat16_t, float16_t);
10196__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_z)))
10197svfloat64_t svamin_n_f64_z(svbool_t, svfloat64_t, float64_t);
10198__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_z)))
10199svfloat32_t svamin_n_f32_z(svbool_t, svfloat32_t, float32_t);
10200__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_z)))
10201svfloat16_t svamin_n_f16_z(svbool_t, svfloat16_t, float16_t);
10202__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_m)))
10203svfloat64_t svamin_f64_m(svbool_t, svfloat64_t, svfloat64_t);
10204__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_m)))
10205svfloat32_t svamin_f32_m(svbool_t, svfloat32_t, svfloat32_t);
10206__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_m)))
10207svfloat16_t svamin_f16_m(svbool_t, svfloat16_t, svfloat16_t);
10208__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_x)))
10209svfloat64_t svamin_f64_x(svbool_t, svfloat64_t, svfloat64_t);
10210__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_x)))
10211svfloat32_t svamin_f32_x(svbool_t, svfloat32_t, svfloat32_t);
10212__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_x)))
10213svfloat16_t svamin_f16_x(svbool_t, svfloat16_t, svfloat16_t);
10214__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_z)))
10215svfloat64_t svamin_f64_z(svbool_t, svfloat64_t, svfloat64_t);
10216__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_z)))
10217svfloat32_t svamin_f32_z(svbool_t, svfloat32_t, svfloat32_t);
10218__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_z)))
10219svfloat16_t svamin_f16_z(svbool_t, svfloat16_t, svfloat16_t);
10220__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_m)))
10221svfloat64_t svamax_m(svbool_t, svfloat64_t, float64_t);
10222__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_m)))
10223svfloat32_t svamax_m(svbool_t, svfloat32_t, float32_t);
10224__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_m)))
10225svfloat16_t svamax_m(svbool_t, svfloat16_t, float16_t);
10226__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_x)))
10227svfloat64_t svamax_x(svbool_t, svfloat64_t, float64_t);
10228__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_x)))
10229svfloat32_t svamax_x(svbool_t, svfloat32_t, float32_t);
10230__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_x)))
10231svfloat16_t svamax_x(svbool_t, svfloat16_t, float16_t);
10232__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_z)))
10233svfloat64_t svamax_z(svbool_t, svfloat64_t, float64_t);
10234__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_z)))
10235svfloat32_t svamax_z(svbool_t, svfloat32_t, float32_t);
10236__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_z)))
10237svfloat16_t svamax_z(svbool_t, svfloat16_t, float16_t);
10238__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_m)))
10239svfloat64_t svamax_m(svbool_t, svfloat64_t, svfloat64_t);
10240__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_m)))
10241svfloat32_t svamax_m(svbool_t, svfloat32_t, svfloat32_t);
10242__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_m)))
10243svfloat16_t svamax_m(svbool_t, svfloat16_t, svfloat16_t);
10244__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_x)))
10245svfloat64_t svamax_x(svbool_t, svfloat64_t, svfloat64_t);
10246__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_x)))
10247svfloat32_t svamax_x(svbool_t, svfloat32_t, svfloat32_t);
10248__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_x)))
10249svfloat16_t svamax_x(svbool_t, svfloat16_t, svfloat16_t);
10250__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_z)))
10251svfloat64_t svamax_z(svbool_t, svfloat64_t, svfloat64_t);
10252__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_z)))
10253svfloat32_t svamax_z(svbool_t, svfloat32_t, svfloat32_t);
10254__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_z)))
10255svfloat16_t svamax_z(svbool_t, svfloat16_t, svfloat16_t);
10256__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_m)))
10257svfloat64_t svamin_m(svbool_t, svfloat64_t, float64_t);
10258__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_m)))
10259svfloat32_t svamin_m(svbool_t, svfloat32_t, float32_t);
10260__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_m)))
10261svfloat16_t svamin_m(svbool_t, svfloat16_t, float16_t);
10262__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_x)))
10263svfloat64_t svamin_x(svbool_t, svfloat64_t, float64_t);
10264__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_x)))
10265svfloat32_t svamin_x(svbool_t, svfloat32_t, float32_t);
10266__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_x)))
10267svfloat16_t svamin_x(svbool_t, svfloat16_t, float16_t);
10268__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_z)))
10269svfloat64_t svamin_z(svbool_t, svfloat64_t, float64_t);
10270__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_z)))
10271svfloat32_t svamin_z(svbool_t, svfloat32_t, float32_t);
10272__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_z)))
10273svfloat16_t svamin_z(svbool_t, svfloat16_t, float16_t);
10274__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_m)))
10275svfloat64_t svamin_m(svbool_t, svfloat64_t, svfloat64_t);
10276__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_m)))
10277svfloat32_t svamin_m(svbool_t, svfloat32_t, svfloat32_t);
10278__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_m)))
10279svfloat16_t svamin_m(svbool_t, svfloat16_t, svfloat16_t);
10280__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_x)))
10281svfloat64_t svamin_x(svbool_t, svfloat64_t, svfloat64_t);
10282__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_x)))
10283svfloat32_t svamin_x(svbool_t, svfloat32_t, svfloat32_t);
10284__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_x)))
10285svfloat16_t svamin_x(svbool_t, svfloat16_t, svfloat16_t);
10286__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_z)))
10287svfloat64_t svamin_z(svbool_t, svfloat64_t, svfloat64_t);
10288__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_z)))
10289svfloat32_t svamin_z(svbool_t, svfloat32_t, svfloat32_t);
10290__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_z)))
10291svfloat16_t svamin_z(svbool_t, svfloat16_t, svfloat16_t);
10292__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f16_mf8_fpm)))
10293svfloat16_t svdot_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
10294__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f16_mf8_fpm)))
10295svfloat16_t svdot_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
10296__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f16_mf8_fpm)))
10297svfloat16_t svdot_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10298__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f16_mf8_fpm)))
10299svfloat16_t svdot_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
10300__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f16_mf8_fpm)))
10301svfloat16_t svdot_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
10302__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f16_mf8_fpm)))
10303svfloat16_t svdot_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10304__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f32_mf8_fpm)))
10305svfloat32_t svdot_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10306__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f32_mf8_fpm)))
10307svfloat32_t svdot_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10308__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f32_mf8_fpm)))
10309svfloat32_t svdot_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10310__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f32_mf8_fpm)))
10311svfloat32_t svdot_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10312__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f32_mf8_fpm)))
10313svfloat32_t svdot_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10314__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f32_mf8_fpm)))
10315svfloat32_t svdot_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10316__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_f16_mf8_fpm)))
10317svfloat16_t svmlalb_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
10318__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_n_f16_mf8_fpm)))
10319svfloat16_t svmlalb_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
10320__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_lane_f16_mf8_fpm)))
10321svfloat16_t svmlalb_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10322__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_f32_mf8_fpm)))
10323svfloat32_t svmlallbb_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10324__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_n_f32_mf8_fpm)))
10325svfloat32_t svmlallbb_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10326__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_lane_f32_mf8_fpm)))
10327svfloat32_t svmlallbb_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10328__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_f32_mf8_fpm)))
10329svfloat32_t svmlallbt_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10330__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_n_f32_mf8_fpm)))
10331svfloat32_t svmlallbt_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10332__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_lane_f32_mf8_fpm)))
10333svfloat32_t svmlallbt_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10334__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_f32_mf8_fpm)))
10335svfloat32_t svmlalltb_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10336__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_n_f32_mf8_fpm)))
10337svfloat32_t svmlalltb_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10338__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_lane_f32_mf8_fpm)))
10339svfloat32_t svmlalltb_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10340__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_f32_mf8_fpm)))
10341svfloat32_t svmlalltt_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10342__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_n_f32_mf8_fpm)))
10343svfloat32_t svmlalltt_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10344__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_lane_f32_mf8_fpm)))
10345svfloat32_t svmlalltt_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10346__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_f16_mf8_fpm)))
10347svfloat16_t svmlalt_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
10348__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_n_f16_mf8_fpm)))
10349svfloat16_t svmlalt_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
10350__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_lane_f16_mf8_fpm)))
10351svfloat16_t svmlalt_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10352__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_f16_mf8_fpm)))
10353svfloat16_t svmlalb_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
10354__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_n_f16_mf8_fpm)))
10355svfloat16_t svmlalb_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
10356__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_lane_f16_mf8_fpm)))
10357svfloat16_t svmlalb_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10358__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_f32_mf8_fpm)))
10359svfloat32_t svmlallbb_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10360__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_n_f32_mf8_fpm)))
10361svfloat32_t svmlallbb_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10362__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_lane_f32_mf8_fpm)))
10363svfloat32_t svmlallbb_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10364__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_f32_mf8_fpm)))
10365svfloat32_t svmlallbt_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10366__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_n_f32_mf8_fpm)))
10367svfloat32_t svmlallbt_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10368__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_lane_f32_mf8_fpm)))
10369svfloat32_t svmlallbt_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10370__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_f32_mf8_fpm)))
10371svfloat32_t svmlalltb_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10372__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_n_f32_mf8_fpm)))
10373svfloat32_t svmlalltb_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10374__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_lane_f32_mf8_fpm)))
10375svfloat32_t svmlalltb_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10376__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_f32_mf8_fpm)))
10377svfloat32_t svmlalltt_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
10378__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_n_f32_mf8_fpm)))
10379svfloat32_t svmlalltt_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
10380__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_lane_f32_mf8_fpm)))
10381svfloat32_t svmlalltt_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10382__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_f16_mf8_fpm)))
10383svfloat16_t svmlalt_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
10384__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_n_f16_mf8_fpm)))
10385svfloat16_t svmlalt_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
10386__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_lane_f16_mf8_fpm)))
10387svfloat16_t svmlalt_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
10388__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_bf16_mf8_fpm)))
10389svbfloat16_t svcvt1_bf16_mf8_fpm(svmfloat8_t, fpm_t);
10390__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_f16_mf8_fpm)))
10391svfloat16_t svcvt1_f16_mf8_fpm(svmfloat8_t, fpm_t);
10392__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_bf16_mf8_fpm)))
10393svbfloat16_t svcvt2_bf16_mf8_fpm(svmfloat8_t, fpm_t);
10394__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_f16_mf8_fpm)))
10395svfloat16_t svcvt2_f16_mf8_fpm(svmfloat8_t, fpm_t);
10396__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_bf16_mf8_fpm)))
10397svbfloat16_t svcvtlt1_bf16_mf8_fpm(svmfloat8_t, fpm_t);
10398__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_f16_mf8_fpm)))
10399svfloat16_t svcvtlt1_f16_mf8_fpm(svmfloat8_t, fpm_t);
10400__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_bf16_mf8_fpm)))
10401svbfloat16_t svcvtlt2_bf16_mf8_fpm(svmfloat8_t, fpm_t);
10402__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_f16_mf8_fpm)))
10403svfloat16_t svcvtlt2_f16_mf8_fpm(svmfloat8_t, fpm_t);
10404__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_bf16_x2_fpm)))
10405svmfloat8_t svcvtn_mf8_bf16_x2_fpm(svbfloat16x2_t, fpm_t);
10406__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_f16_x2_fpm)))
10407svmfloat8_t svcvtn_mf8_f16_x2_fpm(svfloat16x2_t, fpm_t);
10408__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnb_mf8_f32_x2_fpm)))
10409svmfloat8_t svcvtnb_mf8_f32_x2_fpm(svfloat32x2_t, fpm_t);
10410__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_mf8_f32_x2_fpm)))
10411svmfloat8_t svcvtnt_mf8_f32_x2_fpm(svmfloat8_t, svfloat32x2_t, fpm_t);
10412__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_bf16_mf8_fpm)))
10413svbfloat16_t svcvt1_bf16_fpm(svmfloat8_t, fpm_t);
10414__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_f16_mf8_fpm)))
10415svfloat16_t svcvt1_f16_fpm(svmfloat8_t, fpm_t);
10416__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_bf16_mf8_fpm)))
10417svbfloat16_t svcvt2_bf16_fpm(svmfloat8_t, fpm_t);
10418__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_f16_mf8_fpm)))
10419svfloat16_t svcvt2_f16_fpm(svmfloat8_t, fpm_t);
10420__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_bf16_mf8_fpm)))
10421svbfloat16_t svcvtlt1_bf16_fpm(svmfloat8_t, fpm_t);
10422__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_f16_mf8_fpm)))
10423svfloat16_t svcvtlt1_f16_fpm(svmfloat8_t, fpm_t);
10424__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_bf16_mf8_fpm)))
10425svbfloat16_t svcvtlt2_bf16_fpm(svmfloat8_t, fpm_t);
10426__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_f16_mf8_fpm)))
10427svfloat16_t svcvtlt2_f16_fpm(svmfloat8_t, fpm_t);
10428__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_bf16_x2_fpm)))
10429svmfloat8_t svcvtn_mf8_fpm(svbfloat16x2_t, fpm_t);
10430__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_f16_x2_fpm)))
10431svmfloat8_t svcvtn_mf8_fpm(svfloat16x2_t, fpm_t);
10432__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnb_mf8_f32_x2_fpm)))
10433svmfloat8_t svcvtnb_mf8_fpm(svfloat32x2_t, fpm_t);
10434__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_mf8_f32_x2_fpm)))
10435svmfloat8_t svcvtnt_mf8_fpm(svmfloat8_t, svfloat32x2_t, fpm_t);
10436__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u8)))
10437svuint8_t svluti2_lane_u8(svuint8_t, svuint8_t, uint64_t);
10438__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s8)))
10439svint8_t svluti2_lane_s8(svint8_t, svuint8_t, uint64_t);
10440__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u16)))
10441svuint16_t svluti2_lane_u16(svuint16_t, svuint8_t, uint64_t);
10442__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_bf16)))
10443svbfloat16_t svluti2_lane_bf16(svbfloat16_t, svuint8_t, uint64_t);
10444__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_f16)))
10445svfloat16_t svluti2_lane_f16(svfloat16_t, svuint8_t, uint64_t);
10446__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s16)))
10447svint16_t svluti2_lane_s16(svint16_t, svuint8_t, uint64_t);
10448__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u8)))
10449svuint8_t svluti4_lane_u8(svuint8_t, svuint8_t, uint64_t);
10450__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s8)))
10451svint8_t svluti4_lane_s8(svint8_t, svuint8_t, uint64_t);
10452__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16)))
10453svuint16_t svluti4_lane_u16(svuint16_t, svuint8_t, uint64_t);
10454__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16)))
10455svbfloat16_t svluti4_lane_bf16(svbfloat16_t, svuint8_t, uint64_t);
10456__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16)))
10457svfloat16_t svluti4_lane_f16(svfloat16_t, svuint8_t, uint64_t);
10458__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16)))
10459svint16_t svluti4_lane_s16(svint16_t, svuint8_t, uint64_t);
10460__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16_x2)))
10461svuint16_t svluti4_lane_u16_x2(svuint16x2_t, svuint8_t, uint64_t);
10462__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16_x2)))
10463svbfloat16_t svluti4_lane_bf16_x2(svbfloat16x2_t, svuint8_t, uint64_t);
10464__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16_x2)))
10465svfloat16_t svluti4_lane_f16_x2(svfloat16x2_t, svuint8_t, uint64_t);
10466__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16_x2)))
10467svint16_t svluti4_lane_s16_x2(svint16x2_t, svuint8_t, uint64_t);
10468__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u8)))
10469svuint8_t svluti2_lane(svuint8_t, svuint8_t, uint64_t);
10470__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s8)))
10471svint8_t svluti2_lane(svint8_t, svuint8_t, uint64_t);
10472__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u16)))
10473svuint16_t svluti2_lane(svuint16_t, svuint8_t, uint64_t);
10474__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_bf16)))
10475svbfloat16_t svluti2_lane(svbfloat16_t, svuint8_t, uint64_t);
10476__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_f16)))
10477svfloat16_t svluti2_lane(svfloat16_t, svuint8_t, uint64_t);
10478__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s16)))
10479svint16_t svluti2_lane(svint16_t, svuint8_t, uint64_t);
10480__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u8)))
10481svuint8_t svluti4_lane(svuint8_t, svuint8_t, uint64_t);
10482__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s8)))
10483svint8_t svluti4_lane(svint8_t, svuint8_t, uint64_t);
10484__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16)))
10485svuint16_t svluti4_lane(svuint16_t, svuint8_t, uint64_t);
10486__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16)))
10487svbfloat16_t svluti4_lane(svbfloat16_t, svuint8_t, uint64_t);
10488__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16)))
10489svfloat16_t svluti4_lane(svfloat16_t, svuint8_t, uint64_t);
10490__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16)))
10491svint16_t svluti4_lane(svint16_t, svuint8_t, uint64_t);
10492__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16_x2)))
10493svuint16_t svluti4_lane(svuint16x2_t, svuint8_t, uint64_t);
10494__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16_x2)))
10495svbfloat16_t svluti4_lane(svbfloat16x2_t, svuint8_t, uint64_t);
10496__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16_x2)))
10497svfloat16_t svluti4_lane(svfloat16x2_t, svuint8_t, uint64_t);
10498__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16_x2)))
10499svint16_t svluti4_lane(svint16x2_t, svuint8_t, uint64_t);
10500__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_u8)))
10501svuint8_t svaesd_u8(svuint8_t, svuint8_t);
10502__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_u8)))
10503svuint8_t svaese_u8(svuint8_t, svuint8_t);
10504__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesimc_u8)))
10505svuint8_t svaesimc_u8(svuint8_t);
10506__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesmc_u8)))
10507svuint8_t svaesmc_u8(svuint8_t);
10508__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_n_u64)))
10509svuint64_t svpmullb_pair_n_u64(svuint64_t, uint64_t);
10510__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_u64)))
10511svuint64_t svpmullb_pair_u64(svuint64_t, svuint64_t);
10512__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_n_u64)))
10513svuint64_t svpmullt_pair_n_u64(svuint64_t, uint64_t);
10514__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_u64)))
10515svuint64_t svpmullt_pair_u64(svuint64_t, svuint64_t);
10516__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_u8)))
10517svuint8_t svaesd(svuint8_t, svuint8_t);
10518__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_u8)))
10519svuint8_t svaese(svuint8_t, svuint8_t);
10520__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesimc_u8)))
10521svuint8_t svaesimc(svuint8_t);
10522__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesmc_u8)))
10523svuint8_t svaesmc(svuint8_t);
10524__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_n_u64)))
10525svuint64_t svpmullb_pair(svuint64_t, uint64_t);
10526__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_u64)))
10527svuint64_t svpmullb_pair(svuint64_t, svuint64_t);
10528__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_n_u64)))
10529svuint64_t svpmullt_pair(svuint64_t, uint64_t);
10530__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_u64)))
10531svuint64_t svpmullt_pair(svuint64_t, svuint64_t);
10532__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_m)))
10533svbfloat16_t svadd_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
10534__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_x)))
10535svbfloat16_t svadd_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
10536__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_z)))
10537svbfloat16_t svadd_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
10538__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_m)))
10539svbfloat16_t svadd_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
10540__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_x)))
10541svbfloat16_t svadd_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
10542__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_z)))
10543svbfloat16_t svadd_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
10544__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svclamp_bf16)))
10545svbfloat16_t svclamp_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t);
10546__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_m)))
10547svbfloat16_t svmax_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
10548__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_x)))
10549svbfloat16_t svmax_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
10550__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_z)))
10551svbfloat16_t svmax_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
10552__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_m)))
10553svbfloat16_t svmax_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
10554__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_x)))
10555svbfloat16_t svmax_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
10556__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_z)))
10557svbfloat16_t svmax_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
10558__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_m)))
10559svbfloat16_t svmaxnm_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
10560__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_x)))
10561svbfloat16_t svmaxnm_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
10562__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_z)))
10563svbfloat16_t svmaxnm_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
10564__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_m)))
10565svbfloat16_t svmaxnm_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
10566__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_x)))
10567svbfloat16_t svmaxnm_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
10568__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_z)))
10569svbfloat16_t svmaxnm_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
10570__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_m)))
10571svbfloat16_t svmin_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
10572__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_x)))
10573svbfloat16_t svmin_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
10574__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_z)))
10575svbfloat16_t svmin_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
10576__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_m)))
10577svbfloat16_t svmin_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
10578__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_x)))
10579svbfloat16_t svmin_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
10580__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_z)))
10581svbfloat16_t svmin_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
10582__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_m)))
10583svbfloat16_t svminnm_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
10584__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_x)))
10585svbfloat16_t svminnm_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
10586__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_z)))
10587svbfloat16_t svminnm_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
10588__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_m)))
10589svbfloat16_t svminnm_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
10590__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x)))
10591svbfloat16_t svminnm_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
10592__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_z)))
10593svbfloat16_t svminnm_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
10594__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_m)))
10595svbfloat16_t svmla_n_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10596__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_x)))
10597svbfloat16_t svmla_n_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10598__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_z)))
10599svbfloat16_t svmla_n_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10600__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_m)))
10601svbfloat16_t svmla_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10602__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_x)))
10603svbfloat16_t svmla_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10604__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_z)))
10605svbfloat16_t svmla_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10606__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_lane_bf16)))
10607svbfloat16_t svmla_lane_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t);
10608__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_m)))
10609svbfloat16_t svmls_n_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10610__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_x)))
10611svbfloat16_t svmls_n_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10612__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_z)))
10613svbfloat16_t svmls_n_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10614__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_m)))
10615svbfloat16_t svmls_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10616__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_x)))
10617svbfloat16_t svmls_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10618__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_z)))
10619svbfloat16_t svmls_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10620__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_lane_bf16)))
10621svbfloat16_t svmls_lane_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t);
10622__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_m)))
10623svbfloat16_t svmul_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
10624__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_x)))
10625svbfloat16_t svmul_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
10626__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_z)))
10627svbfloat16_t svmul_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
10628__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_m)))
10629svbfloat16_t svmul_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
10630__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x)))
10631svbfloat16_t svmul_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
10632__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_z)))
10633svbfloat16_t svmul_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
10634__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_lane_bf16)))
10635svbfloat16_t svmul_lane_bf16(svbfloat16_t, svbfloat16_t, uint64_t);
10636__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_m)))
10637svbfloat16_t svsub_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
10638__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_x)))
10639svbfloat16_t svsub_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
10640__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_z)))
10641svbfloat16_t svsub_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
10642__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_m)))
10643svbfloat16_t svsub_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
10644__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_x)))
10645svbfloat16_t svsub_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
10646__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_z)))
10647svbfloat16_t svsub_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
10648__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_m)))
10649svbfloat16_t svadd_m(svbool_t, svbfloat16_t, bfloat16_t);
10650__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_x)))
10651svbfloat16_t svadd_x(svbool_t, svbfloat16_t, bfloat16_t);
10652__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_z)))
10653svbfloat16_t svadd_z(svbool_t, svbfloat16_t, bfloat16_t);
10654__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_m)))
10655svbfloat16_t svadd_m(svbool_t, svbfloat16_t, svbfloat16_t);
10656__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_x)))
10657svbfloat16_t svadd_x(svbool_t, svbfloat16_t, svbfloat16_t);
10658__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_z)))
10659svbfloat16_t svadd_z(svbool_t, svbfloat16_t, svbfloat16_t);
10660__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svclamp_bf16)))
10661svbfloat16_t svclamp(svbfloat16_t, svbfloat16_t, svbfloat16_t);
10662__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_m)))
10663svbfloat16_t svmax_m(svbool_t, svbfloat16_t, bfloat16_t);
10664__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_x)))
10665svbfloat16_t svmax_x(svbool_t, svbfloat16_t, bfloat16_t);
10666__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_z)))
10667svbfloat16_t svmax_z(svbool_t, svbfloat16_t, bfloat16_t);
10668__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_m)))
10669svbfloat16_t svmax_m(svbool_t, svbfloat16_t, svbfloat16_t);
10670__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_x)))
10671svbfloat16_t svmax_x(svbool_t, svbfloat16_t, svbfloat16_t);
10672__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_z)))
10673svbfloat16_t svmax_z(svbool_t, svbfloat16_t, svbfloat16_t);
10674__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_m)))
10675svbfloat16_t svmaxnm_m(svbool_t, svbfloat16_t, bfloat16_t);
10676__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_x)))
10677svbfloat16_t svmaxnm_x(svbool_t, svbfloat16_t, bfloat16_t);
10678__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_z)))
10679svbfloat16_t svmaxnm_z(svbool_t, svbfloat16_t, bfloat16_t);
10680__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_m)))
10681svbfloat16_t svmaxnm_m(svbool_t, svbfloat16_t, svbfloat16_t);
10682__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_x)))
10683svbfloat16_t svmaxnm_x(svbool_t, svbfloat16_t, svbfloat16_t);
10684__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_z)))
10685svbfloat16_t svmaxnm_z(svbool_t, svbfloat16_t, svbfloat16_t);
10686__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_m)))
10687svbfloat16_t svmin_m(svbool_t, svbfloat16_t, bfloat16_t);
10688__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_x)))
10689svbfloat16_t svmin_x(svbool_t, svbfloat16_t, bfloat16_t);
10690__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_z)))
10691svbfloat16_t svmin_z(svbool_t, svbfloat16_t, bfloat16_t);
10692__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_m)))
10693svbfloat16_t svmin_m(svbool_t, svbfloat16_t, svbfloat16_t);
10694__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_x)))
10695svbfloat16_t svmin_x(svbool_t, svbfloat16_t, svbfloat16_t);
10696__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_z)))
10697svbfloat16_t svmin_z(svbool_t, svbfloat16_t, svbfloat16_t);
10698__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_m)))
10699svbfloat16_t svminnm_m(svbool_t, svbfloat16_t, bfloat16_t);
10700__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_x)))
10701svbfloat16_t svminnm_x(svbool_t, svbfloat16_t, bfloat16_t);
10702__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_z)))
10703svbfloat16_t svminnm_z(svbool_t, svbfloat16_t, bfloat16_t);
10704__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_m)))
10705svbfloat16_t svminnm_m(svbool_t, svbfloat16_t, svbfloat16_t);
10706__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x)))
10707svbfloat16_t svminnm_x(svbool_t, svbfloat16_t, svbfloat16_t);
10708__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_z)))
10709svbfloat16_t svminnm_z(svbool_t, svbfloat16_t, svbfloat16_t);
10710__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_m)))
10711svbfloat16_t svmla_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10712__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_x)))
10713svbfloat16_t svmla_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10714__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_z)))
10715svbfloat16_t svmla_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10716__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_m)))
10717svbfloat16_t svmla_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10718__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_x)))
10719svbfloat16_t svmla_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10720__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_z)))
10721svbfloat16_t svmla_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10722__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_lane_bf16)))
10723svbfloat16_t svmla_lane(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t);
10724__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_m)))
10725svbfloat16_t svmls_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10726__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_x)))
10727svbfloat16_t svmls_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10728__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_z)))
10729svbfloat16_t svmls_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
10730__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_m)))
10731svbfloat16_t svmls_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10732__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_x)))
10733svbfloat16_t svmls_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10734__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_z)))
10735svbfloat16_t svmls_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
10736__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_lane_bf16)))
10737svbfloat16_t svmls_lane(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t);
10738__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_m)))
10739svbfloat16_t svmul_m(svbool_t, svbfloat16_t, bfloat16_t);
10740__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_x)))
10741svbfloat16_t svmul_x(svbool_t, svbfloat16_t, bfloat16_t);
10742__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_z)))
10743svbfloat16_t svmul_z(svbool_t, svbfloat16_t, bfloat16_t);
10744__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_m)))
10745svbfloat16_t svmul_m(svbool_t, svbfloat16_t, svbfloat16_t);
10746__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x)))
10747svbfloat16_t svmul_x(svbool_t, svbfloat16_t, svbfloat16_t);
10748__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_z)))
10749svbfloat16_t svmul_z(svbool_t, svbfloat16_t, svbfloat16_t);
10750__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_lane_bf16)))
10751svbfloat16_t svmul_lane(svbfloat16_t, svbfloat16_t, uint64_t);
10752__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_m)))
10753svbfloat16_t svsub_m(svbool_t, svbfloat16_t, bfloat16_t);
10754__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_x)))
10755svbfloat16_t svsub_x(svbool_t, svbfloat16_t, bfloat16_t);
10756__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_z)))
10757svbfloat16_t svsub_z(svbool_t, svbfloat16_t, bfloat16_t);
10758__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_m)))
10759svbfloat16_t svsub_m(svbool_t, svbfloat16_t, svbfloat16_t);
10760__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_x)))
10761svbfloat16_t svsub_x(svbool_t, svbfloat16_t, svbfloat16_t);
10762__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_z)))
10763svbfloat16_t svsub_z(svbool_t, svbfloat16_t, svbfloat16_t);
10764__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u8)))
10765svuint8_t svbdep_n_u8(svuint8_t, uint8_t);
10766__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u32)))
10767svuint32_t svbdep_n_u32(svuint32_t, uint32_t);
10768__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u64)))
10769svuint64_t svbdep_n_u64(svuint64_t, uint64_t);
10770__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u16)))
10771svuint16_t svbdep_n_u16(svuint16_t, uint16_t);
10772__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u8)))
10773svuint8_t svbdep_u8(svuint8_t, svuint8_t);
10774__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u32)))
10775svuint32_t svbdep_u32(svuint32_t, svuint32_t);
10776__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u64)))
10777svuint64_t svbdep_u64(svuint64_t, svuint64_t);
10778__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u16)))
10779svuint16_t svbdep_u16(svuint16_t, svuint16_t);
10780__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u8)))
10781svuint8_t svbext_n_u8(svuint8_t, uint8_t);
10782__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u32)))
10783svuint32_t svbext_n_u32(svuint32_t, uint32_t);
10784__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u64)))
10785svuint64_t svbext_n_u64(svuint64_t, uint64_t);
10786__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u16)))
10787svuint16_t svbext_n_u16(svuint16_t, uint16_t);
10788__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u8)))
10789svuint8_t svbext_u8(svuint8_t, svuint8_t);
10790__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u32)))
10791svuint32_t svbext_u32(svuint32_t, svuint32_t);
10792__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u64)))
10793svuint64_t svbext_u64(svuint64_t, svuint64_t);
10794__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u16)))
10795svuint16_t svbext_u16(svuint16_t, svuint16_t);
10796__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u8)))
10797svuint8_t svbgrp_n_u8(svuint8_t, uint8_t);
10798__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u32)))
10799svuint32_t svbgrp_n_u32(svuint32_t, uint32_t);
10800__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u64)))
10801svuint64_t svbgrp_n_u64(svuint64_t, uint64_t);
10802__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u16)))
10803svuint16_t svbgrp_n_u16(svuint16_t, uint16_t);
10804__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u8)))
10805svuint8_t svbgrp_u8(svuint8_t, svuint8_t);
10806__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u32)))
10807svuint32_t svbgrp_u32(svuint32_t, svuint32_t);
10808__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u64)))
10809svuint64_t svbgrp_u64(svuint64_t, svuint64_t);
10810__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u16)))
10811svuint16_t svbgrp_u16(svuint16_t, svuint16_t);
10812__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u8)))
10813svuint8_t svbdep(svuint8_t, uint8_t);
10814__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u32)))
10815svuint32_t svbdep(svuint32_t, uint32_t);
10816__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u64)))
10817svuint64_t svbdep(svuint64_t, uint64_t);
10818__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u16)))
10819svuint16_t svbdep(svuint16_t, uint16_t);
10820__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u8)))
10821svuint8_t svbdep(svuint8_t, svuint8_t);
10822__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u32)))
10823svuint32_t svbdep(svuint32_t, svuint32_t);
10824__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u64)))
10825svuint64_t svbdep(svuint64_t, svuint64_t);
10826__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u16)))
10827svuint16_t svbdep(svuint16_t, svuint16_t);
10828__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u8)))
10829svuint8_t svbext(svuint8_t, uint8_t);
10830__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u32)))
10831svuint32_t svbext(svuint32_t, uint32_t);
10832__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u64)))
10833svuint64_t svbext(svuint64_t, uint64_t);
10834__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u16)))
10835svuint16_t svbext(svuint16_t, uint16_t);
10836__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u8)))
10837svuint8_t svbext(svuint8_t, svuint8_t);
10838__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u32)))
10839svuint32_t svbext(svuint32_t, svuint32_t);
10840__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u64)))
10841svuint64_t svbext(svuint64_t, svuint64_t);
10842__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u16)))
10843svuint16_t svbext(svuint16_t, svuint16_t);
10844__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u8)))
10845svuint8_t svbgrp(svuint8_t, uint8_t);
10846__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u32)))
10847svuint32_t svbgrp(svuint32_t, uint32_t);
10848__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u64)))
10849svuint64_t svbgrp(svuint64_t, uint64_t);
10850__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u16)))
10851svuint16_t svbgrp(svuint16_t, uint16_t);
10852__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u8)))
10853svuint8_t svbgrp(svuint8_t, svuint8_t);
10854__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u32)))
10855svuint32_t svbgrp(svuint32_t, svuint32_t);
10856__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u64)))
10857svuint64_t svbgrp(svuint64_t, svuint64_t);
10858__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u16)))
10859svuint16_t svbgrp(svuint16_t, svuint16_t);
10860__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4e_u32)))
10861svuint32_t svsm4e_u32(svuint32_t, svuint32_t);
10862__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4ekey_u32)))
10863svuint32_t svsm4ekey_u32(svuint32_t, svuint32_t);
10864__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4e_u32)))
10865svuint32_t svsm4e(svuint32_t, svuint32_t);
10866__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4ekey_u32)))
10867svuint32_t svsm4ekey(svuint32_t, svuint32_t);
10868__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u32)))
10869svuint32_t svld1q_gather_u64base_index_u32(svbool_t, svuint64_t, int64_t);
10870__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u64)))
10871svuint64_t svld1q_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
10872__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u16)))
10873svuint16_t svld1q_gather_u64base_index_u16(svbool_t, svuint64_t, int64_t);
10874__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_bf16)))
10875svbfloat16_t svld1q_gather_u64base_index_bf16(svbool_t, svuint64_t, int64_t);
10876__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f64)))
10877svfloat64_t svld1q_gather_u64base_index_f64(svbool_t, svuint64_t, int64_t);
10878__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f32)))
10879svfloat32_t svld1q_gather_u64base_index_f32(svbool_t, svuint64_t, int64_t);
10880__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f16)))
10881svfloat16_t svld1q_gather_u64base_index_f16(svbool_t, svuint64_t, int64_t);
10882__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s32)))
10883svint32_t svld1q_gather_u64base_index_s32(svbool_t, svuint64_t, int64_t);
10884__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s64)))
10885svint64_t svld1q_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
10886__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s16)))
10887svint16_t svld1q_gather_u64base_index_s16(svbool_t, svuint64_t, int64_t);
10888__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u8)))
10889svuint8_t svld1q_gather_u64base_offset_u8(svbool_t, svuint64_t, int64_t);
10890__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u32)))
10891svuint32_t svld1q_gather_u64base_offset_u32(svbool_t, svuint64_t, int64_t);
10892__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u64)))
10893svuint64_t svld1q_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
10894__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u16)))
10895svuint16_t svld1q_gather_u64base_offset_u16(svbool_t, svuint64_t, int64_t);
10896__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_bf16)))
10897svbfloat16_t svld1q_gather_u64base_offset_bf16(svbool_t, svuint64_t, int64_t);
10898__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s8)))
10899svint8_t svld1q_gather_u64base_offset_s8(svbool_t, svuint64_t, int64_t);
10900__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f64)))
10901svfloat64_t svld1q_gather_u64base_offset_f64(svbool_t, svuint64_t, int64_t);
10902__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f32)))
10903svfloat32_t svld1q_gather_u64base_offset_f32(svbool_t, svuint64_t, int64_t);
10904__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f16)))
10905svfloat16_t svld1q_gather_u64base_offset_f16(svbool_t, svuint64_t, int64_t);
10906__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s32)))
10907svint32_t svld1q_gather_u64base_offset_s32(svbool_t, svuint64_t, int64_t);
10908__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s64)))
10909svint64_t svld1q_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
10910__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_mf8)))
10911svmfloat8_t svld1q_gather_u64base_offset_mf8(svbool_t, svuint64_t, int64_t);
10912__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s16)))
10913svint16_t svld1q_gather_u64base_offset_s16(svbool_t, svuint64_t, int64_t);
10914__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u8)))
10915svuint8_t svld1q_gather_u64base_u8(svbool_t, svuint64_t);
10916__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u32)))
10917svuint32_t svld1q_gather_u64base_u32(svbool_t, svuint64_t);
10918__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u64)))
10919svuint64_t svld1q_gather_u64base_u64(svbool_t, svuint64_t);
10920__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u16)))
10921svuint16_t svld1q_gather_u64base_u16(svbool_t, svuint64_t);
10922__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_bf16)))
10923svbfloat16_t svld1q_gather_u64base_bf16(svbool_t, svuint64_t);
10924__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s8)))
10925svint8_t svld1q_gather_u64base_s8(svbool_t, svuint64_t);
10926__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f64)))
10927svfloat64_t svld1q_gather_u64base_f64(svbool_t, svuint64_t);
10928__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f32)))
10929svfloat32_t svld1q_gather_u64base_f32(svbool_t, svuint64_t);
10930__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f16)))
10931svfloat16_t svld1q_gather_u64base_f16(svbool_t, svuint64_t);
10932__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s32)))
10933svint32_t svld1q_gather_u64base_s32(svbool_t, svuint64_t);
10934__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s64)))
10935svint64_t svld1q_gather_u64base_s64(svbool_t, svuint64_t);
10936__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_mf8)))
10937svmfloat8_t svld1q_gather_u64base_mf8(svbool_t, svuint64_t);
10938__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s16)))
10939svint16_t svld1q_gather_u64base_s16(svbool_t, svuint64_t);
10940__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u32)))
10941svuint32_t svld1q_gather_u64index_u32(svbool_t, uint32_t const *, svuint64_t);
10942__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u64)))
10943svuint64_t svld1q_gather_u64index_u64(svbool_t, uint64_t const *, svuint64_t);
10944__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u16)))
10945svuint16_t svld1q_gather_u64index_u16(svbool_t, uint16_t const *, svuint64_t);
10946__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_bf16)))
10947svbfloat16_t svld1q_gather_u64index_bf16(svbool_t, bfloat16_t const *, svuint64_t);
10948__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f64)))
10949svfloat64_t svld1q_gather_u64index_f64(svbool_t, float64_t const *, svuint64_t);
10950__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f32)))
10951svfloat32_t svld1q_gather_u64index_f32(svbool_t, float32_t const *, svuint64_t);
10952__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f16)))
10953svfloat16_t svld1q_gather_u64index_f16(svbool_t, float16_t const *, svuint64_t);
10954__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s32)))
10955svint32_t svld1q_gather_u64index_s32(svbool_t, int32_t const *, svuint64_t);
10956__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s64)))
10957svint64_t svld1q_gather_u64index_s64(svbool_t, int64_t const *, svuint64_t);
10958__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s16)))
10959svint16_t svld1q_gather_u64index_s16(svbool_t, int16_t const *, svuint64_t);
10960__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u8)))
10961svuint8_t svld1q_gather_u64offset_u8(svbool_t, uint8_t const *, svuint64_t);
10962__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u32)))
10963svuint32_t svld1q_gather_u64offset_u32(svbool_t, uint32_t const *, svuint64_t);
10964__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u64)))
10965svuint64_t svld1q_gather_u64offset_u64(svbool_t, uint64_t const *, svuint64_t);
10966__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u16)))
10967svuint16_t svld1q_gather_u64offset_u16(svbool_t, uint16_t const *, svuint64_t);
10968__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_bf16)))
10969svbfloat16_t svld1q_gather_u64offset_bf16(svbool_t, bfloat16_t const *, svuint64_t);
10970__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s8)))
10971svint8_t svld1q_gather_u64offset_s8(svbool_t, int8_t const *, svuint64_t);
10972__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f64)))
10973svfloat64_t svld1q_gather_u64offset_f64(svbool_t, float64_t const *, svuint64_t);
10974__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f32)))
10975svfloat32_t svld1q_gather_u64offset_f32(svbool_t, float32_t const *, svuint64_t);
10976__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f16)))
10977svfloat16_t svld1q_gather_u64offset_f16(svbool_t, float16_t const *, svuint64_t);
10978__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s32)))
10979svint32_t svld1q_gather_u64offset_s32(svbool_t, int32_t const *, svuint64_t);
10980__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s64)))
10981svint64_t svld1q_gather_u64offset_s64(svbool_t, int64_t const *, svuint64_t);
10982__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_mf8)))
10983svmfloat8_t svld1q_gather_u64offset_mf8(svbool_t, mfloat8_t const *, svuint64_t);
10984__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s16)))
10985svint16_t svld1q_gather_u64offset_s16(svbool_t, int16_t const *, svuint64_t);
10986__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_u64)))
10987svuint64_t svld1udq_u64(svbool_t, uint64_t const *);
10988__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_f64)))
10989svfloat64_t svld1udq_f64(svbool_t, float64_t const *);
10990__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_s64)))
10991svint64_t svld1udq_s64(svbool_t, int64_t const *);
10992__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_u64)))
10993svuint64_t svld1udq_vnum_u64(svbool_t, uint64_t const *, int64_t);
10994__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_f64)))
10995svfloat64_t svld1udq_vnum_f64(svbool_t, float64_t const *, int64_t);
10996__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_s64)))
10997svint64_t svld1udq_vnum_s64(svbool_t, int64_t const *, int64_t);
10998__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_u32)))
10999svuint32_t svld1uwq_u32(svbool_t, uint32_t const *);
11000__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_f32)))
11001svfloat32_t svld1uwq_f32(svbool_t, float32_t const *);
11002__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_s32)))
11003svint32_t svld1uwq_s32(svbool_t, int32_t const *);
11004__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_u32)))
11005svuint32_t svld1uwq_vnum_u32(svbool_t, uint32_t const *, int64_t);
11006__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_f32)))
11007svfloat32_t svld1uwq_vnum_f32(svbool_t, float32_t const *, int64_t);
11008__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_s32)))
11009svint32_t svld1uwq_vnum_s32(svbool_t, int32_t const *, int64_t);
11010__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_u64)))
11011void svst1dq_u64(svbool_t, uint64_t *, svuint64_t);
11012__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_f64)))
11013void svst1dq_f64(svbool_t, float64_t *, svfloat64_t);
11014__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_s64)))
11015void svst1dq_s64(svbool_t, int64_t *, svint64_t);
11016__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_u64)))
11017void svst1dq_vnum_u64(svbool_t, uint64_t *, int64_t, svuint64_t);
11018__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_f64)))
11019void svst1dq_vnum_f64(svbool_t, float64_t *, int64_t, svfloat64_t);
11020__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_s64)))
11021void svst1dq_vnum_s64(svbool_t, int64_t *, int64_t, svint64_t);
11022__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u8)))
11023void svst1q_scatter_u64base_u8(svbool_t, svuint64_t, svuint8_t);
11024__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u32)))
11025void svst1q_scatter_u64base_u32(svbool_t, svuint64_t, svuint32_t);
11026__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u64)))
11027void svst1q_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
11028__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u16)))
11029void svst1q_scatter_u64base_u16(svbool_t, svuint64_t, svuint16_t);
11030__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_bf16)))
11031void svst1q_scatter_u64base_bf16(svbool_t, svuint64_t, svbfloat16_t);
11032__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s8)))
11033void svst1q_scatter_u64base_s8(svbool_t, svuint64_t, svint8_t);
11034__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f64)))
11035void svst1q_scatter_u64base_f64(svbool_t, svuint64_t, svfloat64_t);
11036__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f32)))
11037void svst1q_scatter_u64base_f32(svbool_t, svuint64_t, svfloat32_t);
11038__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f16)))
11039void svst1q_scatter_u64base_f16(svbool_t, svuint64_t, svfloat16_t);
11040__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s32)))
11041void svst1q_scatter_u64base_s32(svbool_t, svuint64_t, svint32_t);
11042__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s64)))
11043void svst1q_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
11044__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_mf8)))
11045void svst1q_scatter_u64base_mf8(svbool_t, svuint64_t, svmfloat8_t);
11046__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s16)))
11047void svst1q_scatter_u64base_s16(svbool_t, svuint64_t, svint16_t);
11048__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u32)))
11049void svst1q_scatter_u64base_index_u32(svbool_t, svuint64_t, int64_t, svuint32_t);
11050__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u64)))
11051void svst1q_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
11052__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u16)))
11053void svst1q_scatter_u64base_index_u16(svbool_t, svuint64_t, int64_t, svuint16_t);
11054__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_bf16)))
11055void svst1q_scatter_u64base_index_bf16(svbool_t, svuint64_t, int64_t, svbfloat16_t);
11056__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f64)))
11057void svst1q_scatter_u64base_index_f64(svbool_t, svuint64_t, int64_t, svfloat64_t);
11058__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f32)))
11059void svst1q_scatter_u64base_index_f32(svbool_t, svuint64_t, int64_t, svfloat32_t);
11060__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f16)))
11061void svst1q_scatter_u64base_index_f16(svbool_t, svuint64_t, int64_t, svfloat16_t);
11062__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s32)))
11063void svst1q_scatter_u64base_index_s32(svbool_t, svuint64_t, int64_t, svint32_t);
11064__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s64)))
11065void svst1q_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t);
11066__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s16)))
11067void svst1q_scatter_u64base_index_s16(svbool_t, svuint64_t, int64_t, svint16_t);
11068__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u8)))
11069void svst1q_scatter_u64base_offset_u8(svbool_t, svuint64_t, int64_t, svuint8_t);
11070__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u32)))
11071void svst1q_scatter_u64base_offset_u32(svbool_t, svuint64_t, int64_t, svuint32_t);
11072__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u64)))
11073void svst1q_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
11074__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u16)))
11075void svst1q_scatter_u64base_offset_u16(svbool_t, svuint64_t, int64_t, svuint16_t);
11076__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_bf16)))
11077void svst1q_scatter_u64base_offset_bf16(svbool_t, svuint64_t, int64_t, svbfloat16_t);
11078__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s8)))
11079void svst1q_scatter_u64base_offset_s8(svbool_t, svuint64_t, int64_t, svint8_t);
11080__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f64)))
11081void svst1q_scatter_u64base_offset_f64(svbool_t, svuint64_t, int64_t, svfloat64_t);
11082__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f32)))
11083void svst1q_scatter_u64base_offset_f32(svbool_t, svuint64_t, int64_t, svfloat32_t);
11084__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f16)))
11085void svst1q_scatter_u64base_offset_f16(svbool_t, svuint64_t, int64_t, svfloat16_t);
11086__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s32)))
11087void svst1q_scatter_u64base_offset_s32(svbool_t, svuint64_t, int64_t, svint32_t);
11088__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s64)))
11089void svst1q_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
11090__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_mf8)))
11091void svst1q_scatter_u64base_offset_mf8(svbool_t, svuint64_t, int64_t, svmfloat8_t);
11092__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s16)))
11093void svst1q_scatter_u64base_offset_s16(svbool_t, svuint64_t, int64_t, svint16_t);
11094__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u32)))
11095void svst1q_scatter_s64index_u32(svbool_t, uint32_t *, svint64_t, svuint32_t);
11096__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u64)))
11097void svst1q_scatter_s64index_u64(svbool_t, uint64_t *, svint64_t, svuint64_t);
11098__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u16)))
11099void svst1q_scatter_s64index_u16(svbool_t, uint16_t *, svint64_t, svuint16_t);
11100__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_bf16)))
11101void svst1q_scatter_s64index_bf16(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t);
11102__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f64)))
11103void svst1q_scatter_s64index_f64(svbool_t, float64_t *, svint64_t, svfloat64_t);
11104__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f32)))
11105void svst1q_scatter_s64index_f32(svbool_t, float32_t *, svint64_t, svfloat32_t);
11106__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f16)))
11107void svst1q_scatter_s64index_f16(svbool_t, float16_t *, svint64_t, svfloat16_t);
11108__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s32)))
11109void svst1q_scatter_s64index_s32(svbool_t, int32_t *, svint64_t, svint32_t);
11110__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s64)))
11111void svst1q_scatter_s64index_s64(svbool_t, int64_t *, svint64_t, svint64_t);
11112__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s16)))
11113void svst1q_scatter_s64index_s16(svbool_t, int16_t *, svint64_t, svint16_t);
11114__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u32)))
11115void svst1q_scatter_u64index_u32(svbool_t, uint32_t *, svuint64_t, svuint32_t);
11116__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u64)))
11117void svst1q_scatter_u64index_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t);
11118__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u16)))
11119void svst1q_scatter_u64index_u16(svbool_t, uint16_t *, svuint64_t, svuint16_t);
11120__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_bf16)))
11121void svst1q_scatter_u64index_bf16(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t);
11122__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f64)))
11123void svst1q_scatter_u64index_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t);
11124__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f32)))
11125void svst1q_scatter_u64index_f32(svbool_t, float32_t *, svuint64_t, svfloat32_t);
11126__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f16)))
11127void svst1q_scatter_u64index_f16(svbool_t, float16_t *, svuint64_t, svfloat16_t);
11128__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s32)))
11129void svst1q_scatter_u64index_s32(svbool_t, int32_t *, svuint64_t, svint32_t);
11130__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s64)))
11131void svst1q_scatter_u64index_s64(svbool_t, int64_t *, svuint64_t, svint64_t);
11132__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s16)))
11133void svst1q_scatter_u64index_s16(svbool_t, int16_t *, svuint64_t, svint16_t);
11134__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u8)))
11135void svst1q_scatter_s64offset_u8(svbool_t, uint8_t *, svint64_t, svuint8_t);
11136__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u32)))
11137void svst1q_scatter_s64offset_u32(svbool_t, uint32_t *, svint64_t, svuint32_t);
11138__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u64)))
11139void svst1q_scatter_s64offset_u64(svbool_t, uint64_t *, svint64_t, svuint64_t);
11140__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u16)))
11141void svst1q_scatter_s64offset_u16(svbool_t, uint16_t *, svint64_t, svuint16_t);
11142__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_bf16)))
11143void svst1q_scatter_s64offset_bf16(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t);
11144__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s8)))
11145void svst1q_scatter_s64offset_s8(svbool_t, int8_t *, svint64_t, svint8_t);
11146__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f64)))
11147void svst1q_scatter_s64offset_f64(svbool_t, float64_t *, svint64_t, svfloat64_t);
11148__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f32)))
11149void svst1q_scatter_s64offset_f32(svbool_t, float32_t *, svint64_t, svfloat32_t);
11150__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f16)))
11151void svst1q_scatter_s64offset_f16(svbool_t, float16_t *, svint64_t, svfloat16_t);
11152__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s32)))
11153void svst1q_scatter_s64offset_s32(svbool_t, int32_t *, svint64_t, svint32_t);
11154__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s64)))
11155void svst1q_scatter_s64offset_s64(svbool_t, int64_t *, svint64_t, svint64_t);
11156__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_mf8)))
11157void svst1q_scatter_s64offset_mf8(svbool_t, mfloat8_t *, svint64_t, svmfloat8_t);
11158__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s16)))
11159void svst1q_scatter_s64offset_s16(svbool_t, int16_t *, svint64_t, svint16_t);
11160__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u8)))
11161void svst1q_scatter_u64offset_u8(svbool_t, uint8_t *, svuint64_t, svuint8_t);
11162__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u32)))
11163void svst1q_scatter_u64offset_u32(svbool_t, uint32_t *, svuint64_t, svuint32_t);
11164__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u64)))
11165void svst1q_scatter_u64offset_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t);
11166__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u16)))
11167void svst1q_scatter_u64offset_u16(svbool_t, uint16_t *, svuint64_t, svuint16_t);
11168__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_bf16)))
11169void svst1q_scatter_u64offset_bf16(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t);
11170__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s8)))
11171void svst1q_scatter_u64offset_s8(svbool_t, int8_t *, svuint64_t, svint8_t);
11172__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f64)))
11173void svst1q_scatter_u64offset_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t);
11174__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f32)))
11175void svst1q_scatter_u64offset_f32(svbool_t, float32_t *, svuint64_t, svfloat32_t);
11176__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f16)))
11177void svst1q_scatter_u64offset_f16(svbool_t, float16_t *, svuint64_t, svfloat16_t);
11178__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s32)))
11179void svst1q_scatter_u64offset_s32(svbool_t, int32_t *, svuint64_t, svint32_t);
11180__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s64)))
11181void svst1q_scatter_u64offset_s64(svbool_t, int64_t *, svuint64_t, svint64_t);
11182__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_mf8)))
11183void svst1q_scatter_u64offset_mf8(svbool_t, mfloat8_t *, svuint64_t, svmfloat8_t);
11184__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s16)))
11185void svst1q_scatter_u64offset_s16(svbool_t, int16_t *, svuint64_t, svint16_t);
11186__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_u32)))
11187void svst1wq_u32(svbool_t, uint32_t *, svuint32_t);
11188__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_f32)))
11189void svst1wq_f32(svbool_t, float32_t *, svfloat32_t);
11190__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_s32)))
11191void svst1wq_s32(svbool_t, int32_t *, svint32_t);
11192__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_u32)))
11193void svst1wq_vnum_u32(svbool_t, uint32_t *, int64_t, svuint32_t);
11194__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_f32)))
11195void svst1wq_vnum_f32(svbool_t, float32_t *, int64_t, svfloat32_t);
11196__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_s32)))
11197void svst1wq_vnum_s32(svbool_t, int32_t *, int64_t, svint32_t);
11198__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u32)))
11199svuint32_t svld1q_gather_index_u32(svbool_t, svuint64_t, int64_t);
11200__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u64)))
11201svuint64_t svld1q_gather_index_u64(svbool_t, svuint64_t, int64_t);
11202__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u16)))
11203svuint16_t svld1q_gather_index_u16(svbool_t, svuint64_t, int64_t);
11204__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_bf16)))
11205svbfloat16_t svld1q_gather_index_bf16(svbool_t, svuint64_t, int64_t);
11206__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f64)))
11207svfloat64_t svld1q_gather_index_f64(svbool_t, svuint64_t, int64_t);
11208__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f32)))
11209svfloat32_t svld1q_gather_index_f32(svbool_t, svuint64_t, int64_t);
11210__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f16)))
11211svfloat16_t svld1q_gather_index_f16(svbool_t, svuint64_t, int64_t);
11212__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s32)))
11213svint32_t svld1q_gather_index_s32(svbool_t, svuint64_t, int64_t);
11214__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s64)))
11215svint64_t svld1q_gather_index_s64(svbool_t, svuint64_t, int64_t);
11216__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s16)))
11217svint16_t svld1q_gather_index_s16(svbool_t, svuint64_t, int64_t);
11218__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u8)))
11219svuint8_t svld1q_gather_offset_u8(svbool_t, svuint64_t, int64_t);
11220__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u32)))
11221svuint32_t svld1q_gather_offset_u32(svbool_t, svuint64_t, int64_t);
11222__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u64)))
11223svuint64_t svld1q_gather_offset_u64(svbool_t, svuint64_t, int64_t);
11224__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u16)))
11225svuint16_t svld1q_gather_offset_u16(svbool_t, svuint64_t, int64_t);
11226__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_bf16)))
11227svbfloat16_t svld1q_gather_offset_bf16(svbool_t, svuint64_t, int64_t);
11228__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s8)))
11229svint8_t svld1q_gather_offset_s8(svbool_t, svuint64_t, int64_t);
11230__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f64)))
11231svfloat64_t svld1q_gather_offset_f64(svbool_t, svuint64_t, int64_t);
11232__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f32)))
11233svfloat32_t svld1q_gather_offset_f32(svbool_t, svuint64_t, int64_t);
11234__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f16)))
11235svfloat16_t svld1q_gather_offset_f16(svbool_t, svuint64_t, int64_t);
11236__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s32)))
11237svint32_t svld1q_gather_offset_s32(svbool_t, svuint64_t, int64_t);
11238__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s64)))
11239svint64_t svld1q_gather_offset_s64(svbool_t, svuint64_t, int64_t);
11240__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_mf8)))
11241svmfloat8_t svld1q_gather_offset_mf8(svbool_t, svuint64_t, int64_t);
11242__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s16)))
11243svint16_t svld1q_gather_offset_s16(svbool_t, svuint64_t, int64_t);
11244__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u8)))
11245svuint8_t svld1q_gather_u8(svbool_t, svuint64_t);
11246__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u32)))
11247svuint32_t svld1q_gather_u32(svbool_t, svuint64_t);
11248__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u64)))
11249svuint64_t svld1q_gather_u64(svbool_t, svuint64_t);
11250__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u16)))
11251svuint16_t svld1q_gather_u16(svbool_t, svuint64_t);
11252__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_bf16)))
11253svbfloat16_t svld1q_gather_bf16(svbool_t, svuint64_t);
11254__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s8)))
11255svint8_t svld1q_gather_s8(svbool_t, svuint64_t);
11256__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f64)))
11257svfloat64_t svld1q_gather_f64(svbool_t, svuint64_t);
11258__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f32)))
11259svfloat32_t svld1q_gather_f32(svbool_t, svuint64_t);
11260__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f16)))
11261svfloat16_t svld1q_gather_f16(svbool_t, svuint64_t);
11262__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s32)))
11263svint32_t svld1q_gather_s32(svbool_t, svuint64_t);
11264__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s64)))
11265svint64_t svld1q_gather_s64(svbool_t, svuint64_t);
11266__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_mf8)))
11267svmfloat8_t svld1q_gather_mf8(svbool_t, svuint64_t);
11268__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s16)))
11269svint16_t svld1q_gather_s16(svbool_t, svuint64_t);
11270__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u32)))
11271svuint32_t svld1q_gather_index(svbool_t, uint32_t const *, svuint64_t);
11272__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u64)))
11273svuint64_t svld1q_gather_index(svbool_t, uint64_t const *, svuint64_t);
11274__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u16)))
11275svuint16_t svld1q_gather_index(svbool_t, uint16_t const *, svuint64_t);
11276__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_bf16)))
11277svbfloat16_t svld1q_gather_index(svbool_t, bfloat16_t const *, svuint64_t);
11278__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f64)))
11279svfloat64_t svld1q_gather_index(svbool_t, float64_t const *, svuint64_t);
11280__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f32)))
11281svfloat32_t svld1q_gather_index(svbool_t, float32_t const *, svuint64_t);
11282__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f16)))
11283svfloat16_t svld1q_gather_index(svbool_t, float16_t const *, svuint64_t);
11284__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s32)))
11285svint32_t svld1q_gather_index(svbool_t, int32_t const *, svuint64_t);
11286__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s64)))
11287svint64_t svld1q_gather_index(svbool_t, int64_t const *, svuint64_t);
11288__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s16)))
11289svint16_t svld1q_gather_index(svbool_t, int16_t const *, svuint64_t);
11290__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u8)))
11291svuint8_t svld1q_gather_offset(svbool_t, uint8_t const *, svuint64_t);
11292__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u32)))
11293svuint32_t svld1q_gather_offset(svbool_t, uint32_t const *, svuint64_t);
11294__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u64)))
11295svuint64_t svld1q_gather_offset(svbool_t, uint64_t const *, svuint64_t);
11296__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u16)))
11297svuint16_t svld1q_gather_offset(svbool_t, uint16_t const *, svuint64_t);
11298__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_bf16)))
11299svbfloat16_t svld1q_gather_offset(svbool_t, bfloat16_t const *, svuint64_t);
11300__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s8)))
11301svint8_t svld1q_gather_offset(svbool_t, int8_t const *, svuint64_t);
11302__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f64)))
11303svfloat64_t svld1q_gather_offset(svbool_t, float64_t const *, svuint64_t);
11304__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f32)))
11305svfloat32_t svld1q_gather_offset(svbool_t, float32_t const *, svuint64_t);
11306__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f16)))
11307svfloat16_t svld1q_gather_offset(svbool_t, float16_t const *, svuint64_t);
11308__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s32)))
11309svint32_t svld1q_gather_offset(svbool_t, int32_t const *, svuint64_t);
11310__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s64)))
11311svint64_t svld1q_gather_offset(svbool_t, int64_t const *, svuint64_t);
11312__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_mf8)))
11313svmfloat8_t svld1q_gather_offset(svbool_t, mfloat8_t const *, svuint64_t);
11314__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s16)))
11315svint16_t svld1q_gather_offset(svbool_t, int16_t const *, svuint64_t);
11316__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_u64)))
11317svuint64_t svld1udq(svbool_t, uint64_t const *);
11318__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_f64)))
11319svfloat64_t svld1udq(svbool_t, float64_t const *);
11320__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_s64)))
11321svint64_t svld1udq(svbool_t, int64_t const *);
11322__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_u64)))
11323svuint64_t svld1udq_vnum(svbool_t, uint64_t const *, int64_t);
11324__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_f64)))
11325svfloat64_t svld1udq_vnum(svbool_t, float64_t const *, int64_t);
11326__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_s64)))
11327svint64_t svld1udq_vnum(svbool_t, int64_t const *, int64_t);
11328__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_u32)))
11329svuint32_t svld1uwq(svbool_t, uint32_t const *);
11330__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_f32)))
11331svfloat32_t svld1uwq(svbool_t, float32_t const *);
11332__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_s32)))
11333svint32_t svld1uwq(svbool_t, int32_t const *);
11334__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_u32)))
11335svuint32_t svld1uwq_vnum(svbool_t, uint32_t const *, int64_t);
11336__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_f32)))
11337svfloat32_t svld1uwq_vnum(svbool_t, float32_t const *, int64_t);
11338__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_s32)))
11339svint32_t svld1uwq_vnum(svbool_t, int32_t const *, int64_t);
11340__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_u64)))
11341void svst1dq(svbool_t, uint64_t *, svuint64_t);
11342__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_f64)))
11343void svst1dq(svbool_t, float64_t *, svfloat64_t);
11344__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_s64)))
11345void svst1dq(svbool_t, int64_t *, svint64_t);
11346__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_u64)))
11347void svst1dq_vnum(svbool_t, uint64_t *, int64_t, svuint64_t);
11348__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_f64)))
11349void svst1dq_vnum(svbool_t, float64_t *, int64_t, svfloat64_t);
11350__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_s64)))
11351void svst1dq_vnum(svbool_t, int64_t *, int64_t, svint64_t);
11352__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u8)))
11353void svst1q_scatter(svbool_t, svuint64_t, svuint8_t);
11354__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u32)))
11355void svst1q_scatter(svbool_t, svuint64_t, svuint32_t);
11356__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u64)))
11357void svst1q_scatter(svbool_t, svuint64_t, svuint64_t);
11358__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u16)))
11359void svst1q_scatter(svbool_t, svuint64_t, svuint16_t);
11360__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_bf16)))
11361void svst1q_scatter(svbool_t, svuint64_t, svbfloat16_t);
11362__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s8)))
11363void svst1q_scatter(svbool_t, svuint64_t, svint8_t);
11364__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f64)))
11365void svst1q_scatter(svbool_t, svuint64_t, svfloat64_t);
11366__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f32)))
11367void svst1q_scatter(svbool_t, svuint64_t, svfloat32_t);
11368__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f16)))
11369void svst1q_scatter(svbool_t, svuint64_t, svfloat16_t);
11370__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s32)))
11371void svst1q_scatter(svbool_t, svuint64_t, svint32_t);
11372__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s64)))
11373void svst1q_scatter(svbool_t, svuint64_t, svint64_t);
11374__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_mf8)))
11375void svst1q_scatter(svbool_t, svuint64_t, svmfloat8_t);
11376__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s16)))
11377void svst1q_scatter(svbool_t, svuint64_t, svint16_t);
11378__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u32)))
11379void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint32_t);
11380__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u64)))
11381void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t);
11382__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u16)))
11383void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint16_t);
11384__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_bf16)))
11385void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svbfloat16_t);
11386__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f64)))
11387void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat64_t);
11388__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f32)))
11389void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat32_t);
11390__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f16)))
11391void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat16_t);
11392__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s32)))
11393void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint32_t);
11394__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s64)))
11395void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t);
11396__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s16)))
11397void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint16_t);
11398__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u8)))
11399void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint8_t);
11400__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u32)))
11401void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint32_t);
11402__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u64)))
11403void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
11404__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u16)))
11405void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint16_t);
11406__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_bf16)))
11407void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svbfloat16_t);
11408__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s8)))
11409void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint8_t);
11410__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f64)))
11411void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat64_t);
11412__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f32)))
11413void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat32_t);
11414__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f16)))
11415void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat16_t);
11416__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s32)))
11417void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint32_t);
11418__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s64)))
11419void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
11420__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_mf8)))
11421void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svmfloat8_t);
11422__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s16)))
11423void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint16_t);
11424__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u32)))
11425void svst1q_scatter_index(svbool_t, uint32_t *, svint64_t, svuint32_t);
11426__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u64)))
11427void svst1q_scatter_index(svbool_t, uint64_t *, svint64_t, svuint64_t);
11428__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u16)))
11429void svst1q_scatter_index(svbool_t, uint16_t *, svint64_t, svuint16_t);
11430__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_bf16)))
11431void svst1q_scatter_index(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t);
11432__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f64)))
11433void svst1q_scatter_index(svbool_t, float64_t *, svint64_t, svfloat64_t);
11434__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f32)))
11435void svst1q_scatter_index(svbool_t, float32_t *, svint64_t, svfloat32_t);
11436__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f16)))
11437void svst1q_scatter_index(svbool_t, float16_t *, svint64_t, svfloat16_t);
11438__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s32)))
11439void svst1q_scatter_index(svbool_t, int32_t *, svint64_t, svint32_t);
11440__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s64)))
11441void svst1q_scatter_index(svbool_t, int64_t *, svint64_t, svint64_t);
11442__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s16)))
11443void svst1q_scatter_index(svbool_t, int16_t *, svint64_t, svint16_t);
11444__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u32)))
11445void svst1q_scatter_index(svbool_t, uint32_t *, svuint64_t, svuint32_t);
11446__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u64)))
11447void svst1q_scatter_index(svbool_t, uint64_t *, svuint64_t, svuint64_t);
11448__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u16)))
11449void svst1q_scatter_index(svbool_t, uint16_t *, svuint64_t, svuint16_t);
11450__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_bf16)))
11451void svst1q_scatter_index(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t);
11452__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f64)))
11453void svst1q_scatter_index(svbool_t, float64_t *, svuint64_t, svfloat64_t);
11454__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f32)))
11455void svst1q_scatter_index(svbool_t, float32_t *, svuint64_t, svfloat32_t);
11456__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f16)))
11457void svst1q_scatter_index(svbool_t, float16_t *, svuint64_t, svfloat16_t);
11458__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s32)))
11459void svst1q_scatter_index(svbool_t, int32_t *, svuint64_t, svint32_t);
11460__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s64)))
11461void svst1q_scatter_index(svbool_t, int64_t *, svuint64_t, svint64_t);
11462__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s16)))
11463void svst1q_scatter_index(svbool_t, int16_t *, svuint64_t, svint16_t);
11464__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u8)))
11465void svst1q_scatter_offset(svbool_t, uint8_t *, svint64_t, svuint8_t);
11466__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u32)))
11467void svst1q_scatter_offset(svbool_t, uint32_t *, svint64_t, svuint32_t);
11468__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u64)))
11469void svst1q_scatter_offset(svbool_t, uint64_t *, svint64_t, svuint64_t);
11470__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u16)))
11471void svst1q_scatter_offset(svbool_t, uint16_t *, svint64_t, svuint16_t);
11472__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_bf16)))
11473void svst1q_scatter_offset(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t);
11474__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s8)))
11475void svst1q_scatter_offset(svbool_t, int8_t *, svint64_t, svint8_t);
11476__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f64)))
11477void svst1q_scatter_offset(svbool_t, float64_t *, svint64_t, svfloat64_t);
11478__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f32)))
11479void svst1q_scatter_offset(svbool_t, float32_t *, svint64_t, svfloat32_t);
11480__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f16)))
11481void svst1q_scatter_offset(svbool_t, float16_t *, svint64_t, svfloat16_t);
11482__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s32)))
11483void svst1q_scatter_offset(svbool_t, int32_t *, svint64_t, svint32_t);
11484__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s64)))
11485void svst1q_scatter_offset(svbool_t, int64_t *, svint64_t, svint64_t);
11486__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_mf8)))
11487void svst1q_scatter_offset(svbool_t, mfloat8_t *, svint64_t, svmfloat8_t);
11488__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s16)))
11489void svst1q_scatter_offset(svbool_t, int16_t *, svint64_t, svint16_t);
11490__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u8)))
11491void svst1q_scatter_offset(svbool_t, uint8_t *, svuint64_t, svuint8_t);
11492__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u32)))
11493void svst1q_scatter_offset(svbool_t, uint32_t *, svuint64_t, svuint32_t);
11494__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u64)))
11495void svst1q_scatter_offset(svbool_t, uint64_t *, svuint64_t, svuint64_t);
11496__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u16)))
11497void svst1q_scatter_offset(svbool_t, uint16_t *, svuint64_t, svuint16_t);
11498__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_bf16)))
11499void svst1q_scatter_offset(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t);
11500__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s8)))
11501void svst1q_scatter_offset(svbool_t, int8_t *, svuint64_t, svint8_t);
11502__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f64)))
11503void svst1q_scatter_offset(svbool_t, float64_t *, svuint64_t, svfloat64_t);
11504__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f32)))
11505void svst1q_scatter_offset(svbool_t, float32_t *, svuint64_t, svfloat32_t);
11506__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f16)))
11507void svst1q_scatter_offset(svbool_t, float16_t *, svuint64_t, svfloat16_t);
11508__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s32)))
11509void svst1q_scatter_offset(svbool_t, int32_t *, svuint64_t, svint32_t);
11510__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s64)))
11511void svst1q_scatter_offset(svbool_t, int64_t *, svuint64_t, svint64_t);
11512__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_mf8)))
11513void svst1q_scatter_offset(svbool_t, mfloat8_t *, svuint64_t, svmfloat8_t);
11514__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s16)))
11515void svst1q_scatter_offset(svbool_t, int16_t *, svuint64_t, svint16_t);
11516__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_u32)))
11517void svst1wq(svbool_t, uint32_t *, svuint32_t);
11518__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_f32)))
11519void svst1wq(svbool_t, float32_t *, svfloat32_t);
11520__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_s32)))
11521void svst1wq(svbool_t, int32_t *, svint32_t);
11522__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_u32)))
11523void svst1wq_vnum(svbool_t, uint32_t *, int64_t, svuint32_t);
11524__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_f32)))
11525void svst1wq_vnum(svbool_t, float32_t *, int64_t, svfloat32_t);
11526__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_s32)))
11527void svst1wq_vnum(svbool_t, int32_t *, int64_t, svint32_t);
11528__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c8)))
11529uint64_t svcntp_c8(svcount_t, uint64_t);
11530__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c32)))
11531uint64_t svcntp_c32(svcount_t, uint64_t);
11532__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c64)))
11533uint64_t svcntp_c64(svcount_t, uint64_t);
11534__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c16)))
11535uint64_t svcntp_c16(svcount_t, uint64_t);
11536__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x2)))
11537svuint8x2_t svld1_u8_x2(svcount_t, uint8_t const *);
11538__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x2)))
11539svint8x2_t svld1_s8_x2(svcount_t, int8_t const *);
11540__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x2)))
11541svmfloat8x2_t svld1_mf8_x2(svcount_t, mfloat8_t const *);
11542__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x2)))
11543svuint64x2_t svld1_u64_x2(svcount_t, uint64_t const *);
11544__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x2)))
11545svfloat64x2_t svld1_f64_x2(svcount_t, float64_t const *);
11546__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x2)))
11547svint64x2_t svld1_s64_x2(svcount_t, int64_t const *);
11548__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x2)))
11549svuint16x2_t svld1_u16_x2(svcount_t, uint16_t const *);
11550__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x2)))
11551svbfloat16x2_t svld1_bf16_x2(svcount_t, bfloat16_t const *);
11552__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x2)))
11553svfloat16x2_t svld1_f16_x2(svcount_t, float16_t const *);
11554__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x2)))
11555svint16x2_t svld1_s16_x2(svcount_t, int16_t const *);
11556__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x2)))
11557svuint32x2_t svld1_u32_x2(svcount_t, uint32_t const *);
11558__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x2)))
11559svfloat32x2_t svld1_f32_x2(svcount_t, float32_t const *);
11560__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x2)))
11561svint32x2_t svld1_s32_x2(svcount_t, int32_t const *);
11562__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x4)))
11563svuint8x4_t svld1_u8_x4(svcount_t, uint8_t const *);
11564__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x4)))
11565svint8x4_t svld1_s8_x4(svcount_t, int8_t const *);
11566__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x4)))
11567svmfloat8x4_t svld1_mf8_x4(svcount_t, mfloat8_t const *);
11568__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x4)))
11569svuint64x4_t svld1_u64_x4(svcount_t, uint64_t const *);
11570__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x4)))
11571svfloat64x4_t svld1_f64_x4(svcount_t, float64_t const *);
11572__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x4)))
11573svint64x4_t svld1_s64_x4(svcount_t, int64_t const *);
11574__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x4)))
11575svuint16x4_t svld1_u16_x4(svcount_t, uint16_t const *);
11576__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x4)))
11577svbfloat16x4_t svld1_bf16_x4(svcount_t, bfloat16_t const *);
11578__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x4)))
11579svfloat16x4_t svld1_f16_x4(svcount_t, float16_t const *);
11580__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x4)))
11581svint16x4_t svld1_s16_x4(svcount_t, int16_t const *);
11582__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x4)))
11583svuint32x4_t svld1_u32_x4(svcount_t, uint32_t const *);
11584__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x4)))
11585svfloat32x4_t svld1_f32_x4(svcount_t, float32_t const *);
11586__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x4)))
11587svint32x4_t svld1_s32_x4(svcount_t, int32_t const *);
11588__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x2)))
11589svuint8x2_t svld1_vnum_u8_x2(svcount_t, uint8_t const *, int64_t);
11590__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x2)))
11591svint8x2_t svld1_vnum_s8_x2(svcount_t, int8_t const *, int64_t);
11592__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x2)))
11593svmfloat8x2_t svld1_vnum_mf8_x2(svcount_t, mfloat8_t const *, int64_t);
11594__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x2)))
11595svuint64x2_t svld1_vnum_u64_x2(svcount_t, uint64_t const *, int64_t);
11596__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x2)))
11597svfloat64x2_t svld1_vnum_f64_x2(svcount_t, float64_t const *, int64_t);
11598__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x2)))
11599svint64x2_t svld1_vnum_s64_x2(svcount_t, int64_t const *, int64_t);
11600__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x2)))
11601svuint16x2_t svld1_vnum_u16_x2(svcount_t, uint16_t const *, int64_t);
11602__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x2)))
11603svbfloat16x2_t svld1_vnum_bf16_x2(svcount_t, bfloat16_t const *, int64_t);
11604__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x2)))
11605svfloat16x2_t svld1_vnum_f16_x2(svcount_t, float16_t const *, int64_t);
11606__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x2)))
11607svint16x2_t svld1_vnum_s16_x2(svcount_t, int16_t const *, int64_t);
11608__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x2)))
11609svuint32x2_t svld1_vnum_u32_x2(svcount_t, uint32_t const *, int64_t);
11610__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x2)))
11611svfloat32x2_t svld1_vnum_f32_x2(svcount_t, float32_t const *, int64_t);
11612__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x2)))
11613svint32x2_t svld1_vnum_s32_x2(svcount_t, int32_t const *, int64_t);
11614__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x4)))
11615svuint8x4_t svld1_vnum_u8_x4(svcount_t, uint8_t const *, int64_t);
11616__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x4)))
11617svint8x4_t svld1_vnum_s8_x4(svcount_t, int8_t const *, int64_t);
11618__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x4)))
11619svmfloat8x4_t svld1_vnum_mf8_x4(svcount_t, mfloat8_t const *, int64_t);
11620__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x4)))
11621svuint64x4_t svld1_vnum_u64_x4(svcount_t, uint64_t const *, int64_t);
11622__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x4)))
11623svfloat64x4_t svld1_vnum_f64_x4(svcount_t, float64_t const *, int64_t);
11624__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x4)))
11625svint64x4_t svld1_vnum_s64_x4(svcount_t, int64_t const *, int64_t);
11626__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x4)))
11627svuint16x4_t svld1_vnum_u16_x4(svcount_t, uint16_t const *, int64_t);
11628__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x4)))
11629svbfloat16x4_t svld1_vnum_bf16_x4(svcount_t, bfloat16_t const *, int64_t);
11630__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x4)))
11631svfloat16x4_t svld1_vnum_f16_x4(svcount_t, float16_t const *, int64_t);
11632__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x4)))
11633svint16x4_t svld1_vnum_s16_x4(svcount_t, int16_t const *, int64_t);
11634__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x4)))
11635svuint32x4_t svld1_vnum_u32_x4(svcount_t, uint32_t const *, int64_t);
11636__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x4)))
11637svfloat32x4_t svld1_vnum_f32_x4(svcount_t, float32_t const *, int64_t);
11638__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x4)))
11639svint32x4_t svld1_vnum_s32_x4(svcount_t, int32_t const *, int64_t);
11640__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x2)))
11641svuint8x2_t svldnt1_u8_x2(svcount_t, uint8_t const *);
11642__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x2)))
11643svint8x2_t svldnt1_s8_x2(svcount_t, int8_t const *);
11644__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x2)))
11645svmfloat8x2_t svldnt1_mf8_x2(svcount_t, mfloat8_t const *);
11646__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x2)))
11647svuint64x2_t svldnt1_u64_x2(svcount_t, uint64_t const *);
11648__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x2)))
11649svfloat64x2_t svldnt1_f64_x2(svcount_t, float64_t const *);
11650__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x2)))
11651svint64x2_t svldnt1_s64_x2(svcount_t, int64_t const *);
11652__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x2)))
11653svuint16x2_t svldnt1_u16_x2(svcount_t, uint16_t const *);
11654__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x2)))
11655svbfloat16x2_t svldnt1_bf16_x2(svcount_t, bfloat16_t const *);
11656__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x2)))
11657svfloat16x2_t svldnt1_f16_x2(svcount_t, float16_t const *);
11658__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x2)))
11659svint16x2_t svldnt1_s16_x2(svcount_t, int16_t const *);
11660__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x2)))
11661svuint32x2_t svldnt1_u32_x2(svcount_t, uint32_t const *);
11662__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x2)))
11663svfloat32x2_t svldnt1_f32_x2(svcount_t, float32_t const *);
11664__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x2)))
11665svint32x2_t svldnt1_s32_x2(svcount_t, int32_t const *);
11666__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x4)))
11667svuint8x4_t svldnt1_u8_x4(svcount_t, uint8_t const *);
11668__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x4)))
11669svint8x4_t svldnt1_s8_x4(svcount_t, int8_t const *);
11670__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x4)))
11671svmfloat8x4_t svldnt1_mf8_x4(svcount_t, mfloat8_t const *);
11672__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x4)))
11673svuint64x4_t svldnt1_u64_x4(svcount_t, uint64_t const *);
11674__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x4)))
11675svfloat64x4_t svldnt1_f64_x4(svcount_t, float64_t const *);
11676__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x4)))
11677svint64x4_t svldnt1_s64_x4(svcount_t, int64_t const *);
11678__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x4)))
11679svuint16x4_t svldnt1_u16_x4(svcount_t, uint16_t const *);
11680__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x4)))
11681svbfloat16x4_t svldnt1_bf16_x4(svcount_t, bfloat16_t const *);
11682__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x4)))
11683svfloat16x4_t svldnt1_f16_x4(svcount_t, float16_t const *);
11684__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x4)))
11685svint16x4_t svldnt1_s16_x4(svcount_t, int16_t const *);
11686__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x4)))
11687svuint32x4_t svldnt1_u32_x4(svcount_t, uint32_t const *);
11688__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x4)))
11689svfloat32x4_t svldnt1_f32_x4(svcount_t, float32_t const *);
11690__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x4)))
11691svint32x4_t svldnt1_s32_x4(svcount_t, int32_t const *);
11692__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x2)))
11693svuint8x2_t svldnt1_vnum_u8_x2(svcount_t, uint8_t const *, int64_t);
11694__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x2)))
11695svint8x2_t svldnt1_vnum_s8_x2(svcount_t, int8_t const *, int64_t);
11696__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x2)))
11697svmfloat8x2_t svldnt1_vnum_mf8_x2(svcount_t, mfloat8_t const *, int64_t);
11698__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x2)))
11699svuint64x2_t svldnt1_vnum_u64_x2(svcount_t, uint64_t const *, int64_t);
11700__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x2)))
11701svfloat64x2_t svldnt1_vnum_f64_x2(svcount_t, float64_t const *, int64_t);
11702__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x2)))
11703svint64x2_t svldnt1_vnum_s64_x2(svcount_t, int64_t const *, int64_t);
11704__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x2)))
11705svuint16x2_t svldnt1_vnum_u16_x2(svcount_t, uint16_t const *, int64_t);
11706__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x2)))
11707svbfloat16x2_t svldnt1_vnum_bf16_x2(svcount_t, bfloat16_t const *, int64_t);
11708__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x2)))
11709svfloat16x2_t svldnt1_vnum_f16_x2(svcount_t, float16_t const *, int64_t);
11710__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x2)))
11711svint16x2_t svldnt1_vnum_s16_x2(svcount_t, int16_t const *, int64_t);
11712__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x2)))
11713svuint32x2_t svldnt1_vnum_u32_x2(svcount_t, uint32_t const *, int64_t);
11714__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x2)))
11715svfloat32x2_t svldnt1_vnum_f32_x2(svcount_t, float32_t const *, int64_t);
11716__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x2)))
11717svint32x2_t svldnt1_vnum_s32_x2(svcount_t, int32_t const *, int64_t);
11718__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x4)))
11719svuint8x4_t svldnt1_vnum_u8_x4(svcount_t, uint8_t const *, int64_t);
11720__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x4)))
11721svint8x4_t svldnt1_vnum_s8_x4(svcount_t, int8_t const *, int64_t);
11722__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x4)))
11723svmfloat8x4_t svldnt1_vnum_mf8_x4(svcount_t, mfloat8_t const *, int64_t);
11724__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x4)))
11725svuint64x4_t svldnt1_vnum_u64_x4(svcount_t, uint64_t const *, int64_t);
11726__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x4)))
11727svfloat64x4_t svldnt1_vnum_f64_x4(svcount_t, float64_t const *, int64_t);
11728__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x4)))
11729svint64x4_t svldnt1_vnum_s64_x4(svcount_t, int64_t const *, int64_t);
11730__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x4)))
11731svuint16x4_t svldnt1_vnum_u16_x4(svcount_t, uint16_t const *, int64_t);
11732__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x4)))
11733svbfloat16x4_t svldnt1_vnum_bf16_x4(svcount_t, bfloat16_t const *, int64_t);
11734__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x4)))
11735svfloat16x4_t svldnt1_vnum_f16_x4(svcount_t, float16_t const *, int64_t);
11736__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x4)))
11737svint16x4_t svldnt1_vnum_s16_x4(svcount_t, int16_t const *, int64_t);
11738__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x4)))
11739svuint32x4_t svldnt1_vnum_u32_x4(svcount_t, uint32_t const *, int64_t);
11740__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x4)))
11741svfloat32x4_t svldnt1_vnum_f32_x4(svcount_t, float32_t const *, int64_t);
11742__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x4)))
11743svint32x4_t svldnt1_vnum_s32_x4(svcount_t, int32_t const *, int64_t);
11744__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c8)))
11745svbool_t svpext_lane_c8(svcount_t, uint64_t);
11746__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c32)))
11747svbool_t svpext_lane_c32(svcount_t, uint64_t);
11748__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c64)))
11749svbool_t svpext_lane_c64(svcount_t, uint64_t);
11750__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c16)))
11751svbool_t svpext_lane_c16(svcount_t, uint64_t);
11752__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c8_x2)))
11753svboolx2_t svpext_lane_c8_x2(svcount_t, uint64_t);
11754__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c32_x2)))
11755svboolx2_t svpext_lane_c32_x2(svcount_t, uint64_t);
11756__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c64_x2)))
11757svboolx2_t svpext_lane_c64_x2(svcount_t, uint64_t);
11758__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c16_x2)))
11759svboolx2_t svpext_lane_c16_x2(svcount_t, uint64_t);
11760__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpfalse_c)))
11761svcount_t svpfalse_c(void);
11762__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c16)))
11763svcount_t svpsel_lane_c16(svcount_t, svbool_t, uint32_t);
11764__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c32)))
11765svcount_t svpsel_lane_c32(svcount_t, svbool_t, uint32_t);
11766__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c64)))
11767svcount_t svpsel_lane_c64(svcount_t, svbool_t, uint32_t);
11768__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c8)))
11769svcount_t svpsel_lane_c8(svcount_t, svbool_t, uint32_t);
11770__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c8)))
11771svcount_t svptrue_c8(void);
11772__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c32)))
11773svcount_t svptrue_c32(void);
11774__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c64)))
11775svcount_t svptrue_c64(void);
11776__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c16)))
11777svcount_t svptrue_c16(void);
11778__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_b)))
11779svbool_t svreinterpret_b(svcount_t);
11780__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_c)))
11781svcount_t svreinterpret_c(svbool_t);
11782__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x2)))
11783void svst1_u8_x2(svcount_t, uint8_t *, svuint8x2_t);
11784__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x2)))
11785void svst1_s8_x2(svcount_t, int8_t *, svint8x2_t);
11786__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x2)))
11787void svst1_mf8_x2(svcount_t, mfloat8_t *, svmfloat8x2_t);
11788__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x2)))
11789void svst1_u64_x2(svcount_t, uint64_t *, svuint64x2_t);
11790__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x2)))
11791void svst1_f64_x2(svcount_t, float64_t *, svfloat64x2_t);
11792__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x2)))
11793void svst1_s64_x2(svcount_t, int64_t *, svint64x2_t);
11794__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x2)))
11795void svst1_u16_x2(svcount_t, uint16_t *, svuint16x2_t);
11796__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x2)))
11797void svst1_bf16_x2(svcount_t, bfloat16_t *, svbfloat16x2_t);
11798__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x2)))
11799void svst1_f16_x2(svcount_t, float16_t *, svfloat16x2_t);
11800__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x2)))
11801void svst1_s16_x2(svcount_t, int16_t *, svint16x2_t);
11802__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x2)))
11803void svst1_u32_x2(svcount_t, uint32_t *, svuint32x2_t);
11804__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x2)))
11805void svst1_f32_x2(svcount_t, float32_t *, svfloat32x2_t);
11806__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x2)))
11807void svst1_s32_x2(svcount_t, int32_t *, svint32x2_t);
11808__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x4)))
11809void svst1_u8_x4(svcount_t, uint8_t *, svuint8x4_t);
11810__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x4)))
11811void svst1_s8_x4(svcount_t, int8_t *, svint8x4_t);
11812__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x4)))
11813void svst1_mf8_x4(svcount_t, mfloat8_t *, svmfloat8x4_t);
11814__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x4)))
11815void svst1_u64_x4(svcount_t, uint64_t *, svuint64x4_t);
11816__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x4)))
11817void svst1_f64_x4(svcount_t, float64_t *, svfloat64x4_t);
11818__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x4)))
11819void svst1_s64_x4(svcount_t, int64_t *, svint64x4_t);
11820__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x4)))
11821void svst1_u16_x4(svcount_t, uint16_t *, svuint16x4_t);
11822__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x4)))
11823void svst1_bf16_x4(svcount_t, bfloat16_t *, svbfloat16x4_t);
11824__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x4)))
11825void svst1_f16_x4(svcount_t, float16_t *, svfloat16x4_t);
11826__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x4)))
11827void svst1_s16_x4(svcount_t, int16_t *, svint16x4_t);
11828__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x4)))
11829void svst1_u32_x4(svcount_t, uint32_t *, svuint32x4_t);
11830__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x4)))
11831void svst1_f32_x4(svcount_t, float32_t *, svfloat32x4_t);
11832__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x4)))
11833void svst1_s32_x4(svcount_t, int32_t *, svint32x4_t);
11834__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x2)))
11835void svst1_vnum_u8_x2(svcount_t, uint8_t *, int64_t, svuint8x2_t);
11836__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x2)))
11837void svst1_vnum_s8_x2(svcount_t, int8_t *, int64_t, svint8x2_t);
11838__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x2)))
11839void svst1_vnum_mf8_x2(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t);
11840__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x2)))
11841void svst1_vnum_u64_x2(svcount_t, uint64_t *, int64_t, svuint64x2_t);
11842__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x2)))
11843void svst1_vnum_f64_x2(svcount_t, float64_t *, int64_t, svfloat64x2_t);
11844__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x2)))
11845void svst1_vnum_s64_x2(svcount_t, int64_t *, int64_t, svint64x2_t);
11846__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x2)))
11847void svst1_vnum_u16_x2(svcount_t, uint16_t *, int64_t, svuint16x2_t);
11848__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x2)))
11849void svst1_vnum_bf16_x2(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t);
11850__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x2)))
11851void svst1_vnum_f16_x2(svcount_t, float16_t *, int64_t, svfloat16x2_t);
11852__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x2)))
11853void svst1_vnum_s16_x2(svcount_t, int16_t *, int64_t, svint16x2_t);
11854__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x2)))
11855void svst1_vnum_u32_x2(svcount_t, uint32_t *, int64_t, svuint32x2_t);
11856__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x2)))
11857void svst1_vnum_f32_x2(svcount_t, float32_t *, int64_t, svfloat32x2_t);
11858__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x2)))
11859void svst1_vnum_s32_x2(svcount_t, int32_t *, int64_t, svint32x2_t);
11860__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x4)))
11861void svst1_vnum_u8_x4(svcount_t, uint8_t *, int64_t, svuint8x4_t);
11862__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x4)))
11863void svst1_vnum_s8_x4(svcount_t, int8_t *, int64_t, svint8x4_t);
11864__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x4)))
11865void svst1_vnum_mf8_x4(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t);
11866__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x4)))
11867void svst1_vnum_u64_x4(svcount_t, uint64_t *, int64_t, svuint64x4_t);
11868__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x4)))
11869void svst1_vnum_f64_x4(svcount_t, float64_t *, int64_t, svfloat64x4_t);
11870__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x4)))
11871void svst1_vnum_s64_x4(svcount_t, int64_t *, int64_t, svint64x4_t);
11872__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x4)))
11873void svst1_vnum_u16_x4(svcount_t, uint16_t *, int64_t, svuint16x4_t);
11874__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x4)))
11875void svst1_vnum_bf16_x4(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t);
11876__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x4)))
11877void svst1_vnum_f16_x4(svcount_t, float16_t *, int64_t, svfloat16x4_t);
11878__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x4)))
11879void svst1_vnum_s16_x4(svcount_t, int16_t *, int64_t, svint16x4_t);
11880__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x4)))
11881void svst1_vnum_u32_x4(svcount_t, uint32_t *, int64_t, svuint32x4_t);
11882__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x4)))
11883void svst1_vnum_f32_x4(svcount_t, float32_t *, int64_t, svfloat32x4_t);
11884__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x4)))
11885void svst1_vnum_s32_x4(svcount_t, int32_t *, int64_t, svint32x4_t);
11886__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x2)))
11887void svstnt1_u8_x2(svcount_t, uint8_t *, svuint8x2_t);
11888__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x2)))
11889void svstnt1_s8_x2(svcount_t, int8_t *, svint8x2_t);
11890__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x2)))
11891void svstnt1_mf8_x2(svcount_t, mfloat8_t *, svmfloat8x2_t);
11892__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x2)))
11893void svstnt1_u64_x2(svcount_t, uint64_t *, svuint64x2_t);
11894__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x2)))
11895void svstnt1_f64_x2(svcount_t, float64_t *, svfloat64x2_t);
11896__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x2)))
11897void svstnt1_s64_x2(svcount_t, int64_t *, svint64x2_t);
11898__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x2)))
11899void svstnt1_u16_x2(svcount_t, uint16_t *, svuint16x2_t);
11900__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x2)))
11901void svstnt1_bf16_x2(svcount_t, bfloat16_t *, svbfloat16x2_t);
11902__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x2)))
11903void svstnt1_f16_x2(svcount_t, float16_t *, svfloat16x2_t);
11904__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x2)))
11905void svstnt1_s16_x2(svcount_t, int16_t *, svint16x2_t);
11906__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x2)))
11907void svstnt1_u32_x2(svcount_t, uint32_t *, svuint32x2_t);
11908__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x2)))
11909void svstnt1_f32_x2(svcount_t, float32_t *, svfloat32x2_t);
11910__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x2)))
11911void svstnt1_s32_x2(svcount_t, int32_t *, svint32x2_t);
11912__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x4)))
11913void svstnt1_u8_x4(svcount_t, uint8_t *, svuint8x4_t);
11914__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x4)))
11915void svstnt1_s8_x4(svcount_t, int8_t *, svint8x4_t);
11916__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x4)))
11917void svstnt1_mf8_x4(svcount_t, mfloat8_t *, svmfloat8x4_t);
11918__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x4)))
11919void svstnt1_u64_x4(svcount_t, uint64_t *, svuint64x4_t);
11920__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x4)))
11921void svstnt1_f64_x4(svcount_t, float64_t *, svfloat64x4_t);
11922__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x4)))
11923void svstnt1_s64_x4(svcount_t, int64_t *, svint64x4_t);
11924__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x4)))
11925void svstnt1_u16_x4(svcount_t, uint16_t *, svuint16x4_t);
11926__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x4)))
11927void svstnt1_bf16_x4(svcount_t, bfloat16_t *, svbfloat16x4_t);
11928__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x4)))
11929void svstnt1_f16_x4(svcount_t, float16_t *, svfloat16x4_t);
11930__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x4)))
11931void svstnt1_s16_x4(svcount_t, int16_t *, svint16x4_t);
11932__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x4)))
11933void svstnt1_u32_x4(svcount_t, uint32_t *, svuint32x4_t);
11934__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x4)))
11935void svstnt1_f32_x4(svcount_t, float32_t *, svfloat32x4_t);
11936__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x4)))
11937void svstnt1_s32_x4(svcount_t, int32_t *, svint32x4_t);
11938__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x2)))
11939void svstnt1_vnum_u8_x2(svcount_t, uint8_t *, int64_t, svuint8x2_t);
11940__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x2)))
11941void svstnt1_vnum_s8_x2(svcount_t, int8_t *, int64_t, svint8x2_t);
11942__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x2)))
11943void svstnt1_vnum_mf8_x2(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t);
11944__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x2)))
11945void svstnt1_vnum_u64_x2(svcount_t, uint64_t *, int64_t, svuint64x2_t);
11946__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x2)))
11947void svstnt1_vnum_f64_x2(svcount_t, float64_t *, int64_t, svfloat64x2_t);
11948__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x2)))
11949void svstnt1_vnum_s64_x2(svcount_t, int64_t *, int64_t, svint64x2_t);
11950__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x2)))
11951void svstnt1_vnum_u16_x2(svcount_t, uint16_t *, int64_t, svuint16x2_t);
11952__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x2)))
11953void svstnt1_vnum_bf16_x2(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t);
11954__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x2)))
11955void svstnt1_vnum_f16_x2(svcount_t, float16_t *, int64_t, svfloat16x2_t);
11956__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x2)))
11957void svstnt1_vnum_s16_x2(svcount_t, int16_t *, int64_t, svint16x2_t);
11958__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x2)))
11959void svstnt1_vnum_u32_x2(svcount_t, uint32_t *, int64_t, svuint32x2_t);
11960__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x2)))
11961void svstnt1_vnum_f32_x2(svcount_t, float32_t *, int64_t, svfloat32x2_t);
11962__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x2)))
11963void svstnt1_vnum_s32_x2(svcount_t, int32_t *, int64_t, svint32x2_t);
11964__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x4)))
11965void svstnt1_vnum_u8_x4(svcount_t, uint8_t *, int64_t, svuint8x4_t);
11966__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x4)))
11967void svstnt1_vnum_s8_x4(svcount_t, int8_t *, int64_t, svint8x4_t);
11968__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x4)))
11969void svstnt1_vnum_mf8_x4(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t);
11970__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x4)))
11971void svstnt1_vnum_u64_x4(svcount_t, uint64_t *, int64_t, svuint64x4_t);
11972__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x4)))
11973void svstnt1_vnum_f64_x4(svcount_t, float64_t *, int64_t, svfloat64x4_t);
11974__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x4)))
11975void svstnt1_vnum_s64_x4(svcount_t, int64_t *, int64_t, svint64x4_t);
11976__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x4)))
11977void svstnt1_vnum_u16_x4(svcount_t, uint16_t *, int64_t, svuint16x4_t);
11978__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x4)))
11979void svstnt1_vnum_bf16_x4(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t);
11980__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x4)))
11981void svstnt1_vnum_f16_x4(svcount_t, float16_t *, int64_t, svfloat16x4_t);
11982__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x4)))
11983void svstnt1_vnum_s16_x4(svcount_t, int16_t *, int64_t, svint16x4_t);
11984__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x4)))
11985void svstnt1_vnum_u32_x4(svcount_t, uint32_t *, int64_t, svuint32x4_t);
11986__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x4)))
11987void svstnt1_vnum_f32_x4(svcount_t, float32_t *, int64_t, svfloat32x4_t);
11988__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x4)))
11989void svstnt1_vnum_s32_x4(svcount_t, int32_t *, int64_t, svint32x4_t);
11990__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_s64)))
11991svcount_t svwhilege_c8_s64(int64_t, int64_t, uint64_t);
11992__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_s64)))
11993svcount_t svwhilege_c32_s64(int64_t, int64_t, uint64_t);
11994__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_s64)))
11995svcount_t svwhilege_c64_s64(int64_t, int64_t, uint64_t);
11996__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_s64)))
11997svcount_t svwhilege_c16_s64(int64_t, int64_t, uint64_t);
11998__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_u64)))
11999svcount_t svwhilege_c8_u64(uint64_t, uint64_t, uint64_t);
12000__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_u64)))
12001svcount_t svwhilege_c32_u64(uint64_t, uint64_t, uint64_t);
12002__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_u64)))
12003svcount_t svwhilege_c64_u64(uint64_t, uint64_t, uint64_t);
12004__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_u64)))
12005svcount_t svwhilege_c16_u64(uint64_t, uint64_t, uint64_t);
12006__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_s64)))
12007svcount_t svwhilegt_c8_s64(int64_t, int64_t, uint64_t);
12008__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_s64)))
12009svcount_t svwhilegt_c32_s64(int64_t, int64_t, uint64_t);
12010__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_s64)))
12011svcount_t svwhilegt_c64_s64(int64_t, int64_t, uint64_t);
12012__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_s64)))
12013svcount_t svwhilegt_c16_s64(int64_t, int64_t, uint64_t);
12014__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_u64)))
12015svcount_t svwhilegt_c8_u64(uint64_t, uint64_t, uint64_t);
12016__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_u64)))
12017svcount_t svwhilegt_c32_u64(uint64_t, uint64_t, uint64_t);
12018__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_u64)))
12019svcount_t svwhilegt_c64_u64(uint64_t, uint64_t, uint64_t);
12020__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_u64)))
12021svcount_t svwhilegt_c16_u64(uint64_t, uint64_t, uint64_t);
12022__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_s64)))
12023svcount_t svwhilele_c8_s64(int64_t, int64_t, uint64_t);
12024__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_s64)))
12025svcount_t svwhilele_c32_s64(int64_t, int64_t, uint64_t);
12026__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_s64)))
12027svcount_t svwhilele_c64_s64(int64_t, int64_t, uint64_t);
12028__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_s64)))
12029svcount_t svwhilele_c16_s64(int64_t, int64_t, uint64_t);
12030__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_u64)))
12031svcount_t svwhilele_c8_u64(uint64_t, uint64_t, uint64_t);
12032__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_u64)))
12033svcount_t svwhilele_c32_u64(uint64_t, uint64_t, uint64_t);
12034__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_u64)))
12035svcount_t svwhilele_c64_u64(uint64_t, uint64_t, uint64_t);
12036__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_u64)))
12037svcount_t svwhilele_c16_u64(uint64_t, uint64_t, uint64_t);
12038__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_u64)))
12039svcount_t svwhilelt_c8_u64(uint64_t, uint64_t, uint64_t);
12040__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_u64)))
12041svcount_t svwhilelt_c32_u64(uint64_t, uint64_t, uint64_t);
12042__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_u64)))
12043svcount_t svwhilelt_c64_u64(uint64_t, uint64_t, uint64_t);
12044__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_u64)))
12045svcount_t svwhilelt_c16_u64(uint64_t, uint64_t, uint64_t);
12046__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_s64)))
12047svcount_t svwhilelt_c8_s64(int64_t, int64_t, uint64_t);
12048__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_s64)))
12049svcount_t svwhilelt_c32_s64(int64_t, int64_t, uint64_t);
12050__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_s64)))
12051svcount_t svwhilelt_c64_s64(int64_t, int64_t, uint64_t);
12052__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_s64)))
12053svcount_t svwhilelt_c16_s64(int64_t, int64_t, uint64_t);
12054__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x2)))
12055svuint8x2_t svld1_x2(svcount_t, uint8_t const *);
12056__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x2)))
12057svint8x2_t svld1_x2(svcount_t, int8_t const *);
12058__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x2)))
12059svmfloat8x2_t svld1_x2(svcount_t, mfloat8_t const *);
12060__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x2)))
12061svuint64x2_t svld1_x2(svcount_t, uint64_t const *);
12062__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x2)))
12063svfloat64x2_t svld1_x2(svcount_t, float64_t const *);
12064__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x2)))
12065svint64x2_t svld1_x2(svcount_t, int64_t const *);
12066__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x2)))
12067svuint16x2_t svld1_x2(svcount_t, uint16_t const *);
12068__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x2)))
12069svbfloat16x2_t svld1_x2(svcount_t, bfloat16_t const *);
12070__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x2)))
12071svfloat16x2_t svld1_x2(svcount_t, float16_t const *);
12072__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x2)))
12073svint16x2_t svld1_x2(svcount_t, int16_t const *);
12074__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x2)))
12075svuint32x2_t svld1_x2(svcount_t, uint32_t const *);
12076__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x2)))
12077svfloat32x2_t svld1_x2(svcount_t, float32_t const *);
12078__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x2)))
12079svint32x2_t svld1_x2(svcount_t, int32_t const *);
12080__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x4)))
12081svuint8x4_t svld1_x4(svcount_t, uint8_t const *);
12082__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x4)))
12083svint8x4_t svld1_x4(svcount_t, int8_t const *);
12084__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x4)))
12085svmfloat8x4_t svld1_x4(svcount_t, mfloat8_t const *);
12086__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x4)))
12087svuint64x4_t svld1_x4(svcount_t, uint64_t const *);
12088__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x4)))
12089svfloat64x4_t svld1_x4(svcount_t, float64_t const *);
12090__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x4)))
12091svint64x4_t svld1_x4(svcount_t, int64_t const *);
12092__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x4)))
12093svuint16x4_t svld1_x4(svcount_t, uint16_t const *);
12094__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x4)))
12095svbfloat16x4_t svld1_x4(svcount_t, bfloat16_t const *);
12096__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x4)))
12097svfloat16x4_t svld1_x4(svcount_t, float16_t const *);
12098__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x4)))
12099svint16x4_t svld1_x4(svcount_t, int16_t const *);
12100__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x4)))
12101svuint32x4_t svld1_x4(svcount_t, uint32_t const *);
12102__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x4)))
12103svfloat32x4_t svld1_x4(svcount_t, float32_t const *);
12104__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x4)))
12105svint32x4_t svld1_x4(svcount_t, int32_t const *);
12106__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x2)))
12107svuint8x2_t svld1_vnum_x2(svcount_t, uint8_t const *, int64_t);
12108__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x2)))
12109svint8x2_t svld1_vnum_x2(svcount_t, int8_t const *, int64_t);
12110__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x2)))
12111svmfloat8x2_t svld1_vnum_x2(svcount_t, mfloat8_t const *, int64_t);
12112__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x2)))
12113svuint64x2_t svld1_vnum_x2(svcount_t, uint64_t const *, int64_t);
12114__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x2)))
12115svfloat64x2_t svld1_vnum_x2(svcount_t, float64_t const *, int64_t);
12116__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x2)))
12117svint64x2_t svld1_vnum_x2(svcount_t, int64_t const *, int64_t);
12118__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x2)))
12119svuint16x2_t svld1_vnum_x2(svcount_t, uint16_t const *, int64_t);
12120__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x2)))
12121svbfloat16x2_t svld1_vnum_x2(svcount_t, bfloat16_t const *, int64_t);
12122__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x2)))
12123svfloat16x2_t svld1_vnum_x2(svcount_t, float16_t const *, int64_t);
12124__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x2)))
12125svint16x2_t svld1_vnum_x2(svcount_t, int16_t const *, int64_t);
12126__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x2)))
12127svuint32x2_t svld1_vnum_x2(svcount_t, uint32_t const *, int64_t);
12128__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x2)))
12129svfloat32x2_t svld1_vnum_x2(svcount_t, float32_t const *, int64_t);
12130__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x2)))
12131svint32x2_t svld1_vnum_x2(svcount_t, int32_t const *, int64_t);
12132__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x4)))
12133svuint8x4_t svld1_vnum_x4(svcount_t, uint8_t const *, int64_t);
12134__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x4)))
12135svint8x4_t svld1_vnum_x4(svcount_t, int8_t const *, int64_t);
12136__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x4)))
12137svmfloat8x4_t svld1_vnum_x4(svcount_t, mfloat8_t const *, int64_t);
12138__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x4)))
12139svuint64x4_t svld1_vnum_x4(svcount_t, uint64_t const *, int64_t);
12140__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x4)))
12141svfloat64x4_t svld1_vnum_x4(svcount_t, float64_t const *, int64_t);
12142__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x4)))
12143svint64x4_t svld1_vnum_x4(svcount_t, int64_t const *, int64_t);
12144__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x4)))
12145svuint16x4_t svld1_vnum_x4(svcount_t, uint16_t const *, int64_t);
12146__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x4)))
12147svbfloat16x4_t svld1_vnum_x4(svcount_t, bfloat16_t const *, int64_t);
12148__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x4)))
12149svfloat16x4_t svld1_vnum_x4(svcount_t, float16_t const *, int64_t);
12150__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x4)))
12151svint16x4_t svld1_vnum_x4(svcount_t, int16_t const *, int64_t);
12152__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x4)))
12153svuint32x4_t svld1_vnum_x4(svcount_t, uint32_t const *, int64_t);
12154__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x4)))
12155svfloat32x4_t svld1_vnum_x4(svcount_t, float32_t const *, int64_t);
12156__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x4)))
12157svint32x4_t svld1_vnum_x4(svcount_t, int32_t const *, int64_t);
12158__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x2)))
12159svuint8x2_t svldnt1_x2(svcount_t, uint8_t const *);
12160__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x2)))
12161svint8x2_t svldnt1_x2(svcount_t, int8_t const *);
12162__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x2)))
12163svmfloat8x2_t svldnt1_x2(svcount_t, mfloat8_t const *);
12164__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x2)))
12165svuint64x2_t svldnt1_x2(svcount_t, uint64_t const *);
12166__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x2)))
12167svfloat64x2_t svldnt1_x2(svcount_t, float64_t const *);
12168__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x2)))
12169svint64x2_t svldnt1_x2(svcount_t, int64_t const *);
12170__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x2)))
12171svuint16x2_t svldnt1_x2(svcount_t, uint16_t const *);
12172__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x2)))
12173svbfloat16x2_t svldnt1_x2(svcount_t, bfloat16_t const *);
12174__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x2)))
12175svfloat16x2_t svldnt1_x2(svcount_t, float16_t const *);
12176__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x2)))
12177svint16x2_t svldnt1_x2(svcount_t, int16_t const *);
12178__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x2)))
12179svuint32x2_t svldnt1_x2(svcount_t, uint32_t const *);
12180__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x2)))
12181svfloat32x2_t svldnt1_x2(svcount_t, float32_t const *);
12182__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x2)))
12183svint32x2_t svldnt1_x2(svcount_t, int32_t const *);
12184__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x4)))
12185svuint8x4_t svldnt1_x4(svcount_t, uint8_t const *);
12186__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x4)))
12187svint8x4_t svldnt1_x4(svcount_t, int8_t const *);
12188__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x4)))
12189svmfloat8x4_t svldnt1_x4(svcount_t, mfloat8_t const *);
12190__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x4)))
12191svuint64x4_t svldnt1_x4(svcount_t, uint64_t const *);
12192__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x4)))
12193svfloat64x4_t svldnt1_x4(svcount_t, float64_t const *);
12194__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x4)))
12195svint64x4_t svldnt1_x4(svcount_t, int64_t const *);
12196__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x4)))
12197svuint16x4_t svldnt1_x4(svcount_t, uint16_t const *);
12198__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x4)))
12199svbfloat16x4_t svldnt1_x4(svcount_t, bfloat16_t const *);
12200__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x4)))
12201svfloat16x4_t svldnt1_x4(svcount_t, float16_t const *);
12202__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x4)))
12203svint16x4_t svldnt1_x4(svcount_t, int16_t const *);
12204__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x4)))
12205svuint32x4_t svldnt1_x4(svcount_t, uint32_t const *);
12206__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x4)))
12207svfloat32x4_t svldnt1_x4(svcount_t, float32_t const *);
12208__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x4)))
12209svint32x4_t svldnt1_x4(svcount_t, int32_t const *);
12210__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x2)))
12211svuint8x2_t svldnt1_vnum_x2(svcount_t, uint8_t const *, int64_t);
12212__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x2)))
12213svint8x2_t svldnt1_vnum_x2(svcount_t, int8_t const *, int64_t);
12214__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x2)))
12215svmfloat8x2_t svldnt1_vnum_x2(svcount_t, mfloat8_t const *, int64_t);
12216__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x2)))
12217svuint64x2_t svldnt1_vnum_x2(svcount_t, uint64_t const *, int64_t);
12218__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x2)))
12219svfloat64x2_t svldnt1_vnum_x2(svcount_t, float64_t const *, int64_t);
12220__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x2)))
12221svint64x2_t svldnt1_vnum_x2(svcount_t, int64_t const *, int64_t);
12222__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x2)))
12223svuint16x2_t svldnt1_vnum_x2(svcount_t, uint16_t const *, int64_t);
12224__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x2)))
12225svbfloat16x2_t svldnt1_vnum_x2(svcount_t, bfloat16_t const *, int64_t);
12226__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x2)))
12227svfloat16x2_t svldnt1_vnum_x2(svcount_t, float16_t const *, int64_t);
12228__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x2)))
12229svint16x2_t svldnt1_vnum_x2(svcount_t, int16_t const *, int64_t);
12230__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x2)))
12231svuint32x2_t svldnt1_vnum_x2(svcount_t, uint32_t const *, int64_t);
12232__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x2)))
12233svfloat32x2_t svldnt1_vnum_x2(svcount_t, float32_t const *, int64_t);
12234__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x2)))
12235svint32x2_t svldnt1_vnum_x2(svcount_t, int32_t const *, int64_t);
12236__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x4)))
12237svuint8x4_t svldnt1_vnum_x4(svcount_t, uint8_t const *, int64_t);
12238__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x4)))
12239svint8x4_t svldnt1_vnum_x4(svcount_t, int8_t const *, int64_t);
12240__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x4)))
12241svmfloat8x4_t svldnt1_vnum_x4(svcount_t, mfloat8_t const *, int64_t);
12242__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x4)))
12243svuint64x4_t svldnt1_vnum_x4(svcount_t, uint64_t const *, int64_t);
12244__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x4)))
12245svfloat64x4_t svldnt1_vnum_x4(svcount_t, float64_t const *, int64_t);
12246__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x4)))
12247svint64x4_t svldnt1_vnum_x4(svcount_t, int64_t const *, int64_t);
12248__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x4)))
12249svuint16x4_t svldnt1_vnum_x4(svcount_t, uint16_t const *, int64_t);
12250__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x4)))
12251svbfloat16x4_t svldnt1_vnum_x4(svcount_t, bfloat16_t const *, int64_t);
12252__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x4)))
12253svfloat16x4_t svldnt1_vnum_x4(svcount_t, float16_t const *, int64_t);
12254__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x4)))
12255svint16x4_t svldnt1_vnum_x4(svcount_t, int16_t const *, int64_t);
12256__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x4)))
12257svuint32x4_t svldnt1_vnum_x4(svcount_t, uint32_t const *, int64_t);
12258__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x4)))
12259svfloat32x4_t svldnt1_vnum_x4(svcount_t, float32_t const *, int64_t);
12260__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x4)))
12261svint32x4_t svldnt1_vnum_x4(svcount_t, int32_t const *, int64_t);
12262__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_b)))
12263svbool_t svreinterpret(svcount_t);
12264__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_c)))
12265svcount_t svreinterpret(svbool_t);
12266__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x2)))
12267void svst1(svcount_t, uint8_t *, svuint8x2_t);
12268__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x2)))
12269void svst1(svcount_t, int8_t *, svint8x2_t);
12270__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x2)))
12271void svst1(svcount_t, mfloat8_t *, svmfloat8x2_t);
12272__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x2)))
12273void svst1(svcount_t, uint64_t *, svuint64x2_t);
12274__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x2)))
12275void svst1(svcount_t, float64_t *, svfloat64x2_t);
12276__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x2)))
12277void svst1(svcount_t, int64_t *, svint64x2_t);
12278__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x2)))
12279void svst1(svcount_t, uint16_t *, svuint16x2_t);
12280__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x2)))
12281void svst1(svcount_t, bfloat16_t *, svbfloat16x2_t);
12282__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x2)))
12283void svst1(svcount_t, float16_t *, svfloat16x2_t);
12284__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x2)))
12285void svst1(svcount_t, int16_t *, svint16x2_t);
12286__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x2)))
12287void svst1(svcount_t, uint32_t *, svuint32x2_t);
12288__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x2)))
12289void svst1(svcount_t, float32_t *, svfloat32x2_t);
12290__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x2)))
12291void svst1(svcount_t, int32_t *, svint32x2_t);
12292__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x4)))
12293void svst1(svcount_t, uint8_t *, svuint8x4_t);
12294__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x4)))
12295void svst1(svcount_t, int8_t *, svint8x4_t);
12296__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x4)))
12297void svst1(svcount_t, mfloat8_t *, svmfloat8x4_t);
12298__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x4)))
12299void svst1(svcount_t, uint64_t *, svuint64x4_t);
12300__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x4)))
12301void svst1(svcount_t, float64_t *, svfloat64x4_t);
12302__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x4)))
12303void svst1(svcount_t, int64_t *, svint64x4_t);
12304__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x4)))
12305void svst1(svcount_t, uint16_t *, svuint16x4_t);
12306__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x4)))
12307void svst1(svcount_t, bfloat16_t *, svbfloat16x4_t);
12308__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x4)))
12309void svst1(svcount_t, float16_t *, svfloat16x4_t);
12310__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x4)))
12311void svst1(svcount_t, int16_t *, svint16x4_t);
12312__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x4)))
12313void svst1(svcount_t, uint32_t *, svuint32x4_t);
12314__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x4)))
12315void svst1(svcount_t, float32_t *, svfloat32x4_t);
12316__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x4)))
12317void svst1(svcount_t, int32_t *, svint32x4_t);
12318__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x2)))
12319void svst1_vnum(svcount_t, uint8_t *, int64_t, svuint8x2_t);
12320__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x2)))
12321void svst1_vnum(svcount_t, int8_t *, int64_t, svint8x2_t);
12322__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x2)))
12323void svst1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t);
12324__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x2)))
12325void svst1_vnum(svcount_t, uint64_t *, int64_t, svuint64x2_t);
12326__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x2)))
12327void svst1_vnum(svcount_t, float64_t *, int64_t, svfloat64x2_t);
12328__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x2)))
12329void svst1_vnum(svcount_t, int64_t *, int64_t, svint64x2_t);
12330__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x2)))
12331void svst1_vnum(svcount_t, uint16_t *, int64_t, svuint16x2_t);
12332__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x2)))
12333void svst1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t);
12334__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x2)))
12335void svst1_vnum(svcount_t, float16_t *, int64_t, svfloat16x2_t);
12336__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x2)))
12337void svst1_vnum(svcount_t, int16_t *, int64_t, svint16x2_t);
12338__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x2)))
12339void svst1_vnum(svcount_t, uint32_t *, int64_t, svuint32x2_t);
12340__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x2)))
12341void svst1_vnum(svcount_t, float32_t *, int64_t, svfloat32x2_t);
12342__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x2)))
12343void svst1_vnum(svcount_t, int32_t *, int64_t, svint32x2_t);
12344__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x4)))
12345void svst1_vnum(svcount_t, uint8_t *, int64_t, svuint8x4_t);
12346__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x4)))
12347void svst1_vnum(svcount_t, int8_t *, int64_t, svint8x4_t);
12348__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x4)))
12349void svst1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t);
12350__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x4)))
12351void svst1_vnum(svcount_t, uint64_t *, int64_t, svuint64x4_t);
12352__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x4)))
12353void svst1_vnum(svcount_t, float64_t *, int64_t, svfloat64x4_t);
12354__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x4)))
12355void svst1_vnum(svcount_t, int64_t *, int64_t, svint64x4_t);
12356__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x4)))
12357void svst1_vnum(svcount_t, uint16_t *, int64_t, svuint16x4_t);
12358__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x4)))
12359void svst1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t);
12360__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x4)))
12361void svst1_vnum(svcount_t, float16_t *, int64_t, svfloat16x4_t);
12362__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x4)))
12363void svst1_vnum(svcount_t, int16_t *, int64_t, svint16x4_t);
12364__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x4)))
12365void svst1_vnum(svcount_t, uint32_t *, int64_t, svuint32x4_t);
12366__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x4)))
12367void svst1_vnum(svcount_t, float32_t *, int64_t, svfloat32x4_t);
12368__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x4)))
12369void svst1_vnum(svcount_t, int32_t *, int64_t, svint32x4_t);
12370__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x2)))
12371void svstnt1(svcount_t, uint8_t *, svuint8x2_t);
12372__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x2)))
12373void svstnt1(svcount_t, int8_t *, svint8x2_t);
12374__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x2)))
12375void svstnt1(svcount_t, mfloat8_t *, svmfloat8x2_t);
12376__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x2)))
12377void svstnt1(svcount_t, uint64_t *, svuint64x2_t);
12378__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x2)))
12379void svstnt1(svcount_t, float64_t *, svfloat64x2_t);
12380__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x2)))
12381void svstnt1(svcount_t, int64_t *, svint64x2_t);
12382__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x2)))
12383void svstnt1(svcount_t, uint16_t *, svuint16x2_t);
12384__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x2)))
12385void svstnt1(svcount_t, bfloat16_t *, svbfloat16x2_t);
12386__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x2)))
12387void svstnt1(svcount_t, float16_t *, svfloat16x2_t);
12388__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x2)))
12389void svstnt1(svcount_t, int16_t *, svint16x2_t);
12390__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x2)))
12391void svstnt1(svcount_t, uint32_t *, svuint32x2_t);
12392__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x2)))
12393void svstnt1(svcount_t, float32_t *, svfloat32x2_t);
12394__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x2)))
12395void svstnt1(svcount_t, int32_t *, svint32x2_t);
12396__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x4)))
12397void svstnt1(svcount_t, uint8_t *, svuint8x4_t);
12398__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x4)))
12399void svstnt1(svcount_t, int8_t *, svint8x4_t);
12400__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x4)))
12401void svstnt1(svcount_t, mfloat8_t *, svmfloat8x4_t);
12402__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x4)))
12403void svstnt1(svcount_t, uint64_t *, svuint64x4_t);
12404__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x4)))
12405void svstnt1(svcount_t, float64_t *, svfloat64x4_t);
12406__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x4)))
12407void svstnt1(svcount_t, int64_t *, svint64x4_t);
12408__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x4)))
12409void svstnt1(svcount_t, uint16_t *, svuint16x4_t);
12410__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x4)))
12411void svstnt1(svcount_t, bfloat16_t *, svbfloat16x4_t);
12412__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x4)))
12413void svstnt1(svcount_t, float16_t *, svfloat16x4_t);
12414__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x4)))
12415void svstnt1(svcount_t, int16_t *, svint16x4_t);
12416__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x4)))
12417void svstnt1(svcount_t, uint32_t *, svuint32x4_t);
12418__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x4)))
12419void svstnt1(svcount_t, float32_t *, svfloat32x4_t);
12420__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x4)))
12421void svstnt1(svcount_t, int32_t *, svint32x4_t);
12422__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x2)))
12423void svstnt1_vnum(svcount_t, uint8_t *, int64_t, svuint8x2_t);
12424__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x2)))
12425void svstnt1_vnum(svcount_t, int8_t *, int64_t, svint8x2_t);
12426__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x2)))
12427void svstnt1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t);
12428__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x2)))
12429void svstnt1_vnum(svcount_t, uint64_t *, int64_t, svuint64x2_t);
12430__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x2)))
12431void svstnt1_vnum(svcount_t, float64_t *, int64_t, svfloat64x2_t);
12432__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x2)))
12433void svstnt1_vnum(svcount_t, int64_t *, int64_t, svint64x2_t);
12434__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x2)))
12435void svstnt1_vnum(svcount_t, uint16_t *, int64_t, svuint16x2_t);
12436__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x2)))
12437void svstnt1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t);
12438__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x2)))
12439void svstnt1_vnum(svcount_t, float16_t *, int64_t, svfloat16x2_t);
12440__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x2)))
12441void svstnt1_vnum(svcount_t, int16_t *, int64_t, svint16x2_t);
12442__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x2)))
12443void svstnt1_vnum(svcount_t, uint32_t *, int64_t, svuint32x2_t);
12444__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x2)))
12445void svstnt1_vnum(svcount_t, float32_t *, int64_t, svfloat32x2_t);
12446__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x2)))
12447void svstnt1_vnum(svcount_t, int32_t *, int64_t, svint32x2_t);
12448__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x4)))
12449void svstnt1_vnum(svcount_t, uint8_t *, int64_t, svuint8x4_t);
12450__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x4)))
12451void svstnt1_vnum(svcount_t, int8_t *, int64_t, svint8x4_t);
12452__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x4)))
12453void svstnt1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t);
12454__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x4)))
12455void svstnt1_vnum(svcount_t, uint64_t *, int64_t, svuint64x4_t);
12456__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x4)))
12457void svstnt1_vnum(svcount_t, float64_t *, int64_t, svfloat64x4_t);
12458__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x4)))
12459void svstnt1_vnum(svcount_t, int64_t *, int64_t, svint64x4_t);
12460__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x4)))
12461void svstnt1_vnum(svcount_t, uint16_t *, int64_t, svuint16x4_t);
12462__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x4)))
12463void svstnt1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t);
12464__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x4)))
12465void svstnt1_vnum(svcount_t, float16_t *, int64_t, svfloat16x4_t);
12466__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x4)))
12467void svstnt1_vnum(svcount_t, int16_t *, int64_t, svint16x4_t);
12468__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x4)))
12469void svstnt1_vnum(svcount_t, uint32_t *, int64_t, svuint32x4_t);
12470__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x4)))
12471void svstnt1_vnum(svcount_t, float32_t *, int64_t, svfloat32x4_t);
12472__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x4)))
12473void svstnt1_vnum(svcount_t, int32_t *, int64_t, svint32x4_t);
12474__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_s64)))
12475svcount_t svwhilege_c8(int64_t, int64_t, uint64_t);
12476__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_s64)))
12477svcount_t svwhilege_c32(int64_t, int64_t, uint64_t);
12478__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_s64)))
12479svcount_t svwhilege_c64(int64_t, int64_t, uint64_t);
12480__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_s64)))
12481svcount_t svwhilege_c16(int64_t, int64_t, uint64_t);
12482__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_u64)))
12483svcount_t svwhilege_c8(uint64_t, uint64_t, uint64_t);
12484__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_u64)))
12485svcount_t svwhilege_c32(uint64_t, uint64_t, uint64_t);
12486__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_u64)))
12487svcount_t svwhilege_c64(uint64_t, uint64_t, uint64_t);
12488__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_u64)))
12489svcount_t svwhilege_c16(uint64_t, uint64_t, uint64_t);
12490__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_s64)))
12491svcount_t svwhilegt_c8(int64_t, int64_t, uint64_t);
12492__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_s64)))
12493svcount_t svwhilegt_c32(int64_t, int64_t, uint64_t);
12494__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_s64)))
12495svcount_t svwhilegt_c64(int64_t, int64_t, uint64_t);
12496__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_s64)))
12497svcount_t svwhilegt_c16(int64_t, int64_t, uint64_t);
12498__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_u64)))
12499svcount_t svwhilegt_c8(uint64_t, uint64_t, uint64_t);
12500__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_u64)))
12501svcount_t svwhilegt_c32(uint64_t, uint64_t, uint64_t);
12502__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_u64)))
12503svcount_t svwhilegt_c64(uint64_t, uint64_t, uint64_t);
12504__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_u64)))
12505svcount_t svwhilegt_c16(uint64_t, uint64_t, uint64_t);
12506__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_s64)))
12507svcount_t svwhilele_c8(int64_t, int64_t, uint64_t);
12508__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_s64)))
12509svcount_t svwhilele_c32(int64_t, int64_t, uint64_t);
12510__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_s64)))
12511svcount_t svwhilele_c64(int64_t, int64_t, uint64_t);
12512__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_s64)))
12513svcount_t svwhilele_c16(int64_t, int64_t, uint64_t);
12514__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_u64)))
12515svcount_t svwhilele_c8(uint64_t, uint64_t, uint64_t);
12516__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_u64)))
12517svcount_t svwhilele_c32(uint64_t, uint64_t, uint64_t);
12518__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_u64)))
12519svcount_t svwhilele_c64(uint64_t, uint64_t, uint64_t);
12520__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_u64)))
12521svcount_t svwhilele_c16(uint64_t, uint64_t, uint64_t);
12522__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_u64)))
12523svcount_t svwhilelt_c8(uint64_t, uint64_t, uint64_t);
12524__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_u64)))
12525svcount_t svwhilelt_c32(uint64_t, uint64_t, uint64_t);
12526__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_u64)))
12527svcount_t svwhilelt_c64(uint64_t, uint64_t, uint64_t);
12528__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_u64)))
12529svcount_t svwhilelt_c16(uint64_t, uint64_t, uint64_t);
12530__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_s64)))
12531svcount_t svwhilelt_c8(int64_t, int64_t, uint64_t);
12532__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_s64)))
12533svcount_t svwhilelt_c32(int64_t, int64_t, uint64_t);
12534__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_s64)))
12535svcount_t svwhilelt_c64(int64_t, int64_t, uint64_t);
12536__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_s64)))
12537svcount_t svwhilelt_c16(int64_t, int64_t, uint64_t);
12538__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaba_n_s8)))9052__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaba_n_s8)))
12539svint8_t svaba_n_s8(svint8_t, svint8_t, int8_t);9053svint8_t svaba_n_s8(svint8_t, svint8_t, int8_t);
12540__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaba_n_s32)))9054__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaba_n_s32)))
...@@ -19059,6 +15573,3848 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svxar_n_s64)))...@@ -19059,6 +15573,3848 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svxar_n_s64)))
19059svint64_t svxar(svint64_t, svint64_t, uint64_t);15573svint64_t svxar(svint64_t, svint64_t, uint64_t);
19060__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svxar_n_s16)))15574__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svxar_n_s16)))
19061svint16_t svxar(svint16_t, svint16_t, uint64_t);15575svint16_t svxar(svint16_t, svint16_t, uint64_t);
15576__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_m)))
15577svfloat64_t svamax_n_f64_m(svbool_t, svfloat64_t, float64_t);
15578__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_m)))
15579svfloat32_t svamax_n_f32_m(svbool_t, svfloat32_t, float32_t);
15580__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_m)))
15581svfloat16_t svamax_n_f16_m(svbool_t, svfloat16_t, float16_t);
15582__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_x)))
15583svfloat64_t svamax_n_f64_x(svbool_t, svfloat64_t, float64_t);
15584__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_x)))
15585svfloat32_t svamax_n_f32_x(svbool_t, svfloat32_t, float32_t);
15586__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_x)))
15587svfloat16_t svamax_n_f16_x(svbool_t, svfloat16_t, float16_t);
15588__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_z)))
15589svfloat64_t svamax_n_f64_z(svbool_t, svfloat64_t, float64_t);
15590__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_z)))
15591svfloat32_t svamax_n_f32_z(svbool_t, svfloat32_t, float32_t);
15592__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_z)))
15593svfloat16_t svamax_n_f16_z(svbool_t, svfloat16_t, float16_t);
15594__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_m)))
15595svfloat64_t svamax_f64_m(svbool_t, svfloat64_t, svfloat64_t);
15596__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_m)))
15597svfloat32_t svamax_f32_m(svbool_t, svfloat32_t, svfloat32_t);
15598__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_m)))
15599svfloat16_t svamax_f16_m(svbool_t, svfloat16_t, svfloat16_t);
15600__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_x)))
15601svfloat64_t svamax_f64_x(svbool_t, svfloat64_t, svfloat64_t);
15602__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_x)))
15603svfloat32_t svamax_f32_x(svbool_t, svfloat32_t, svfloat32_t);
15604__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_x)))
15605svfloat16_t svamax_f16_x(svbool_t, svfloat16_t, svfloat16_t);
15606__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_z)))
15607svfloat64_t svamax_f64_z(svbool_t, svfloat64_t, svfloat64_t);
15608__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_z)))
15609svfloat32_t svamax_f32_z(svbool_t, svfloat32_t, svfloat32_t);
15610__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_z)))
15611svfloat16_t svamax_f16_z(svbool_t, svfloat16_t, svfloat16_t);
15612__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_m)))
15613svfloat64_t svamin_n_f64_m(svbool_t, svfloat64_t, float64_t);
15614__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_m)))
15615svfloat32_t svamin_n_f32_m(svbool_t, svfloat32_t, float32_t);
15616__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_m)))
15617svfloat16_t svamin_n_f16_m(svbool_t, svfloat16_t, float16_t);
15618__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_x)))
15619svfloat64_t svamin_n_f64_x(svbool_t, svfloat64_t, float64_t);
15620__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_x)))
15621svfloat32_t svamin_n_f32_x(svbool_t, svfloat32_t, float32_t);
15622__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_x)))
15623svfloat16_t svamin_n_f16_x(svbool_t, svfloat16_t, float16_t);
15624__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_z)))
15625svfloat64_t svamin_n_f64_z(svbool_t, svfloat64_t, float64_t);
15626__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_z)))
15627svfloat32_t svamin_n_f32_z(svbool_t, svfloat32_t, float32_t);
15628__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_z)))
15629svfloat16_t svamin_n_f16_z(svbool_t, svfloat16_t, float16_t);
15630__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_m)))
15631svfloat64_t svamin_f64_m(svbool_t, svfloat64_t, svfloat64_t);
15632__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_m)))
15633svfloat32_t svamin_f32_m(svbool_t, svfloat32_t, svfloat32_t);
15634__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_m)))
15635svfloat16_t svamin_f16_m(svbool_t, svfloat16_t, svfloat16_t);
15636__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_x)))
15637svfloat64_t svamin_f64_x(svbool_t, svfloat64_t, svfloat64_t);
15638__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_x)))
15639svfloat32_t svamin_f32_x(svbool_t, svfloat32_t, svfloat32_t);
15640__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_x)))
15641svfloat16_t svamin_f16_x(svbool_t, svfloat16_t, svfloat16_t);
15642__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_z)))
15643svfloat64_t svamin_f64_z(svbool_t, svfloat64_t, svfloat64_t);
15644__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_z)))
15645svfloat32_t svamin_f32_z(svbool_t, svfloat32_t, svfloat32_t);
15646__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_z)))
15647svfloat16_t svamin_f16_z(svbool_t, svfloat16_t, svfloat16_t);
15648__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_m)))
15649svfloat64_t svamax_m(svbool_t, svfloat64_t, float64_t);
15650__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_m)))
15651svfloat32_t svamax_m(svbool_t, svfloat32_t, float32_t);
15652__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_m)))
15653svfloat16_t svamax_m(svbool_t, svfloat16_t, float16_t);
15654__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_x)))
15655svfloat64_t svamax_x(svbool_t, svfloat64_t, float64_t);
15656__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_x)))
15657svfloat32_t svamax_x(svbool_t, svfloat32_t, float32_t);
15658__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_x)))
15659svfloat16_t svamax_x(svbool_t, svfloat16_t, float16_t);
15660__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_z)))
15661svfloat64_t svamax_z(svbool_t, svfloat64_t, float64_t);
15662__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_z)))
15663svfloat32_t svamax_z(svbool_t, svfloat32_t, float32_t);
15664__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_z)))
15665svfloat16_t svamax_z(svbool_t, svfloat16_t, float16_t);
15666__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_m)))
15667svfloat64_t svamax_m(svbool_t, svfloat64_t, svfloat64_t);
15668__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_m)))
15669svfloat32_t svamax_m(svbool_t, svfloat32_t, svfloat32_t);
15670__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_m)))
15671svfloat16_t svamax_m(svbool_t, svfloat16_t, svfloat16_t);
15672__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_x)))
15673svfloat64_t svamax_x(svbool_t, svfloat64_t, svfloat64_t);
15674__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_x)))
15675svfloat32_t svamax_x(svbool_t, svfloat32_t, svfloat32_t);
15676__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_x)))
15677svfloat16_t svamax_x(svbool_t, svfloat16_t, svfloat16_t);
15678__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_z)))
15679svfloat64_t svamax_z(svbool_t, svfloat64_t, svfloat64_t);
15680__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_z)))
15681svfloat32_t svamax_z(svbool_t, svfloat32_t, svfloat32_t);
15682__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_z)))
15683svfloat16_t svamax_z(svbool_t, svfloat16_t, svfloat16_t);
15684__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_m)))
15685svfloat64_t svamin_m(svbool_t, svfloat64_t, float64_t);
15686__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_m)))
15687svfloat32_t svamin_m(svbool_t, svfloat32_t, float32_t);
15688__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_m)))
15689svfloat16_t svamin_m(svbool_t, svfloat16_t, float16_t);
15690__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_x)))
15691svfloat64_t svamin_x(svbool_t, svfloat64_t, float64_t);
15692__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_x)))
15693svfloat32_t svamin_x(svbool_t, svfloat32_t, float32_t);
15694__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_x)))
15695svfloat16_t svamin_x(svbool_t, svfloat16_t, float16_t);
15696__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_z)))
15697svfloat64_t svamin_z(svbool_t, svfloat64_t, float64_t);
15698__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_z)))
15699svfloat32_t svamin_z(svbool_t, svfloat32_t, float32_t);
15700__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_z)))
15701svfloat16_t svamin_z(svbool_t, svfloat16_t, float16_t);
15702__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_m)))
15703svfloat64_t svamin_m(svbool_t, svfloat64_t, svfloat64_t);
15704__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_m)))
15705svfloat32_t svamin_m(svbool_t, svfloat32_t, svfloat32_t);
15706__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_m)))
15707svfloat16_t svamin_m(svbool_t, svfloat16_t, svfloat16_t);
15708__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_x)))
15709svfloat64_t svamin_x(svbool_t, svfloat64_t, svfloat64_t);
15710__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_x)))
15711svfloat32_t svamin_x(svbool_t, svfloat32_t, svfloat32_t);
15712__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_x)))
15713svfloat16_t svamin_x(svbool_t, svfloat16_t, svfloat16_t);
15714__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_z)))
15715svfloat64_t svamin_z(svbool_t, svfloat64_t, svfloat64_t);
15716__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_z)))
15717svfloat32_t svamin_z(svbool_t, svfloat32_t, svfloat32_t);
15718__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_z)))
15719svfloat16_t svamin_z(svbool_t, svfloat16_t, svfloat16_t);
15720__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_bf16_mf8_fpm)))
15721svbfloat16_t svcvt1_bf16_mf8_fpm(svmfloat8_t, fpm_t);
15722__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_f16_mf8_fpm)))
15723svfloat16_t svcvt1_f16_mf8_fpm(svmfloat8_t, fpm_t);
15724__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_bf16_mf8_fpm)))
15725svbfloat16_t svcvt2_bf16_mf8_fpm(svmfloat8_t, fpm_t);
15726__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_f16_mf8_fpm)))
15727svfloat16_t svcvt2_f16_mf8_fpm(svmfloat8_t, fpm_t);
15728__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_bf16_mf8_fpm)))
15729svbfloat16_t svcvtlt1_bf16_mf8_fpm(svmfloat8_t, fpm_t);
15730__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_f16_mf8_fpm)))
15731svfloat16_t svcvtlt1_f16_mf8_fpm(svmfloat8_t, fpm_t);
15732__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_bf16_mf8_fpm)))
15733svbfloat16_t svcvtlt2_bf16_mf8_fpm(svmfloat8_t, fpm_t);
15734__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_f16_mf8_fpm)))
15735svfloat16_t svcvtlt2_f16_mf8_fpm(svmfloat8_t, fpm_t);
15736__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_bf16_x2_fpm)))
15737svmfloat8_t svcvtn_mf8_bf16_x2_fpm(svbfloat16x2_t, fpm_t);
15738__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_f16_x2_fpm)))
15739svmfloat8_t svcvtn_mf8_f16_x2_fpm(svfloat16x2_t, fpm_t);
15740__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnb_mf8_f32_x2_fpm)))
15741svmfloat8_t svcvtnb_mf8_f32_x2_fpm(svfloat32x2_t, fpm_t);
15742__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_mf8_f32_x2_fpm)))
15743svmfloat8_t svcvtnt_mf8_f32_x2_fpm(svmfloat8_t, svfloat32x2_t, fpm_t);
15744__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_bf16_mf8_fpm)))
15745svbfloat16_t svcvt1_bf16_fpm(svmfloat8_t, fpm_t);
15746__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_f16_mf8_fpm)))
15747svfloat16_t svcvt1_f16_fpm(svmfloat8_t, fpm_t);
15748__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_bf16_mf8_fpm)))
15749svbfloat16_t svcvt2_bf16_fpm(svmfloat8_t, fpm_t);
15750__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_f16_mf8_fpm)))
15751svfloat16_t svcvt2_f16_fpm(svmfloat8_t, fpm_t);
15752__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_bf16_mf8_fpm)))
15753svbfloat16_t svcvtlt1_bf16_fpm(svmfloat8_t, fpm_t);
15754__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_f16_mf8_fpm)))
15755svfloat16_t svcvtlt1_f16_fpm(svmfloat8_t, fpm_t);
15756__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_bf16_mf8_fpm)))
15757svbfloat16_t svcvtlt2_bf16_fpm(svmfloat8_t, fpm_t);
15758__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_f16_mf8_fpm)))
15759svfloat16_t svcvtlt2_f16_fpm(svmfloat8_t, fpm_t);
15760__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_bf16_x2_fpm)))
15761svmfloat8_t svcvtn_mf8_fpm(svbfloat16x2_t, fpm_t);
15762__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_f16_x2_fpm)))
15763svmfloat8_t svcvtn_mf8_fpm(svfloat16x2_t, fpm_t);
15764__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnb_mf8_f32_x2_fpm)))
15765svmfloat8_t svcvtnb_mf8_fpm(svfloat32x2_t, fpm_t);
15766__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_mf8_f32_x2_fpm)))
15767svmfloat8_t svcvtnt_mf8_fpm(svmfloat8_t, svfloat32x2_t, fpm_t);
15768__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u8)))
15769svuint8_t svluti2_lane_u8(svuint8_t, svuint8_t, uint64_t);
15770__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s8)))
15771svint8_t svluti2_lane_s8(svint8_t, svuint8_t, uint64_t);
15772__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u16)))
15773svuint16_t svluti2_lane_u16(svuint16_t, svuint8_t, uint64_t);
15774__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_bf16)))
15775svbfloat16_t svluti2_lane_bf16(svbfloat16_t, svuint8_t, uint64_t);
15776__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_f16)))
15777svfloat16_t svluti2_lane_f16(svfloat16_t, svuint8_t, uint64_t);
15778__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s16)))
15779svint16_t svluti2_lane_s16(svint16_t, svuint8_t, uint64_t);
15780__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u8)))
15781svuint8_t svluti4_lane_u8(svuint8_t, svuint8_t, uint64_t);
15782__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s8)))
15783svint8_t svluti4_lane_s8(svint8_t, svuint8_t, uint64_t);
15784__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16)))
15785svuint16_t svluti4_lane_u16(svuint16_t, svuint8_t, uint64_t);
15786__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16)))
15787svbfloat16_t svluti4_lane_bf16(svbfloat16_t, svuint8_t, uint64_t);
15788__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16)))
15789svfloat16_t svluti4_lane_f16(svfloat16_t, svuint8_t, uint64_t);
15790__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16)))
15791svint16_t svluti4_lane_s16(svint16_t, svuint8_t, uint64_t);
15792__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16_x2)))
15793svuint16_t svluti4_lane_u16_x2(svuint16x2_t, svuint8_t, uint64_t);
15794__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16_x2)))
15795svbfloat16_t svluti4_lane_bf16_x2(svbfloat16x2_t, svuint8_t, uint64_t);
15796__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16_x2)))
15797svfloat16_t svluti4_lane_f16_x2(svfloat16x2_t, svuint8_t, uint64_t);
15798__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16_x2)))
15799svint16_t svluti4_lane_s16_x2(svint16x2_t, svuint8_t, uint64_t);
15800__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u8)))
15801svuint8_t svluti2_lane(svuint8_t, svuint8_t, uint64_t);
15802__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s8)))
15803svint8_t svluti2_lane(svint8_t, svuint8_t, uint64_t);
15804__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u16)))
15805svuint16_t svluti2_lane(svuint16_t, svuint8_t, uint64_t);
15806__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_bf16)))
15807svbfloat16_t svluti2_lane(svbfloat16_t, svuint8_t, uint64_t);
15808__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_f16)))
15809svfloat16_t svluti2_lane(svfloat16_t, svuint8_t, uint64_t);
15810__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s16)))
15811svint16_t svluti2_lane(svint16_t, svuint8_t, uint64_t);
15812__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u8)))
15813svuint8_t svluti4_lane(svuint8_t, svuint8_t, uint64_t);
15814__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s8)))
15815svint8_t svluti4_lane(svint8_t, svuint8_t, uint64_t);
15816__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16)))
15817svuint16_t svluti4_lane(svuint16_t, svuint8_t, uint64_t);
15818__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16)))
15819svbfloat16_t svluti4_lane(svbfloat16_t, svuint8_t, uint64_t);
15820__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16)))
15821svfloat16_t svluti4_lane(svfloat16_t, svuint8_t, uint64_t);
15822__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16)))
15823svint16_t svluti4_lane(svint16_t, svuint8_t, uint64_t);
15824__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16_x2)))
15825svuint16_t svluti4_lane(svuint16x2_t, svuint8_t, uint64_t);
15826__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16_x2)))
15827svbfloat16_t svluti4_lane(svbfloat16x2_t, svuint8_t, uint64_t);
15828__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16_x2)))
15829svfloat16_t svluti4_lane(svfloat16x2_t, svuint8_t, uint64_t);
15830__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16_x2)))
15831svint16_t svluti4_lane(svint16x2_t, svuint8_t, uint64_t);
15832__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmmla_f32)))
15833svfloat32_t svbfmmla_f32(svfloat32_t, svbfloat16_t, svbfloat16_t);
15834__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmmla_f32)))
15835svfloat32_t svbfmmla(svfloat32_t, svbfloat16_t, svbfloat16_t);
15836__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_n_f32)))
15837svfloat32_t svbfdot_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t);
15838__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_f32)))
15839svfloat32_t svbfdot_f32(svfloat32_t, svbfloat16_t, svbfloat16_t);
15840__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_lane_f32)))
15841svfloat32_t svbfdot_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);
15842__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_n_f32)))
15843svfloat32_t svbfmlalb_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t);
15844__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_f32)))
15845svfloat32_t svbfmlalb_f32(svfloat32_t, svbfloat16_t, svbfloat16_t);
15846__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_lane_f32)))
15847svfloat32_t svbfmlalb_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);
15848__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_n_f32)))
15849svfloat32_t svbfmlalt_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t);
15850__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_f32)))
15851svfloat32_t svbfmlalt_f32(svfloat32_t, svbfloat16_t, svbfloat16_t);
15852__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_lane_f32)))
15853svfloat32_t svbfmlalt_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);
15854__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_m)))
15855svbfloat16_t svcvt_bf16_f32_m(svbfloat16_t, svbool_t, svfloat32_t);
15856__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_x)))
15857svbfloat16_t svcvt_bf16_f32_x(svbool_t, svfloat32_t);
15858__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_z)))
15859svbfloat16_t svcvt_bf16_f32_z(svbool_t, svfloat32_t);
15860__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_m)))
15861svbfloat16_t svcvtnt_bf16_f32_m(svbfloat16_t, svbool_t, svfloat32_t);
15862__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_n_f32)))
15863svfloat32_t svbfdot(svfloat32_t, svbfloat16_t, bfloat16_t);
15864__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_f32)))
15865svfloat32_t svbfdot(svfloat32_t, svbfloat16_t, svbfloat16_t);
15866__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_lane_f32)))
15867svfloat32_t svbfdot_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);
15868__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_n_f32)))
15869svfloat32_t svbfmlalb(svfloat32_t, svbfloat16_t, bfloat16_t);
15870__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_f32)))
15871svfloat32_t svbfmlalb(svfloat32_t, svbfloat16_t, svbfloat16_t);
15872__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_lane_f32)))
15873svfloat32_t svbfmlalb_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);
15874__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_n_f32)))
15875svfloat32_t svbfmlalt(svfloat32_t, svbfloat16_t, bfloat16_t);
15876__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_f32)))
15877svfloat32_t svbfmlalt(svfloat32_t, svbfloat16_t, svbfloat16_t);
15878__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_lane_f32)))
15879svfloat32_t svbfmlalt_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t);
15880__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_m)))
15881svbfloat16_t svcvt_bf16_m(svbfloat16_t, svbool_t, svfloat32_t);
15882__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_x)))
15883svbfloat16_t svcvt_bf16_x(svbool_t, svfloat32_t);
15884__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_z)))
15885svbfloat16_t svcvt_bf16_z(svbool_t, svfloat32_t);
15886__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_m)))
15887svbfloat16_t svcvtnt_bf16_m(svbfloat16_t, svbool_t, svfloat32_t);
15888__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32)))
15889svfloat32_t svmmla_f32(svfloat32_t, svfloat32_t, svfloat32_t);
15890__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32)))
15891svfloat32_t svmmla(svfloat32_t, svfloat32_t, svfloat32_t);
15892__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u8)))
15893svuint8_t svld1ro_u8(svbool_t, uint8_t const *);
15894__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u32)))
15895svuint32_t svld1ro_u32(svbool_t, uint32_t const *);
15896__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u64)))
15897svuint64_t svld1ro_u64(svbool_t, uint64_t const *);
15898__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u16)))
15899svuint16_t svld1ro_u16(svbool_t, uint16_t const *);
15900__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_bf16)))
15901svbfloat16_t svld1ro_bf16(svbool_t, bfloat16_t const *);
15902__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s8)))
15903svint8_t svld1ro_s8(svbool_t, int8_t const *);
15904__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f64)))
15905svfloat64_t svld1ro_f64(svbool_t, float64_t const *);
15906__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f32)))
15907svfloat32_t svld1ro_f32(svbool_t, float32_t const *);
15908__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f16)))
15909svfloat16_t svld1ro_f16(svbool_t, float16_t const *);
15910__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s32)))
15911svint32_t svld1ro_s32(svbool_t, int32_t const *);
15912__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s64)))
15913svint64_t svld1ro_s64(svbool_t, int64_t const *);
15914__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_mf8)))
15915svmfloat8_t svld1ro_mf8(svbool_t, mfloat8_t const *);
15916__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s16)))
15917svint16_t svld1ro_s16(svbool_t, int16_t const *);
15918__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f64)))
15919svfloat64_t svmmla_f64(svfloat64_t, svfloat64_t, svfloat64_t);
15920__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u8)))
15921svuint8_t svtrn1q_u8(svuint8_t, svuint8_t);
15922__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u32)))
15923svuint32_t svtrn1q_u32(svuint32_t, svuint32_t);
15924__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u64)))
15925svuint64_t svtrn1q_u64(svuint64_t, svuint64_t);
15926__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u16)))
15927svuint16_t svtrn1q_u16(svuint16_t, svuint16_t);
15928__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_bf16)))
15929svbfloat16_t svtrn1q_bf16(svbfloat16_t, svbfloat16_t);
15930__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s8)))
15931svint8_t svtrn1q_s8(svint8_t, svint8_t);
15932__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f64)))
15933svfloat64_t svtrn1q_f64(svfloat64_t, svfloat64_t);
15934__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f32)))
15935svfloat32_t svtrn1q_f32(svfloat32_t, svfloat32_t);
15936__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f16)))
15937svfloat16_t svtrn1q_f16(svfloat16_t, svfloat16_t);
15938__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s32)))
15939svint32_t svtrn1q_s32(svint32_t, svint32_t);
15940__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s64)))
15941svint64_t svtrn1q_s64(svint64_t, svint64_t);
15942__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s16)))
15943svint16_t svtrn1q_s16(svint16_t, svint16_t);
15944__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u8)))
15945svuint8_t svtrn2q_u8(svuint8_t, svuint8_t);
15946__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u32)))
15947svuint32_t svtrn2q_u32(svuint32_t, svuint32_t);
15948__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u64)))
15949svuint64_t svtrn2q_u64(svuint64_t, svuint64_t);
15950__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u16)))
15951svuint16_t svtrn2q_u16(svuint16_t, svuint16_t);
15952__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_bf16)))
15953svbfloat16_t svtrn2q_bf16(svbfloat16_t, svbfloat16_t);
15954__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s8)))
15955svint8_t svtrn2q_s8(svint8_t, svint8_t);
15956__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f64)))
15957svfloat64_t svtrn2q_f64(svfloat64_t, svfloat64_t);
15958__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f32)))
15959svfloat32_t svtrn2q_f32(svfloat32_t, svfloat32_t);
15960__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f16)))
15961svfloat16_t svtrn2q_f16(svfloat16_t, svfloat16_t);
15962__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s32)))
15963svint32_t svtrn2q_s32(svint32_t, svint32_t);
15964__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s64)))
15965svint64_t svtrn2q_s64(svint64_t, svint64_t);
15966__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s16)))
15967svint16_t svtrn2q_s16(svint16_t, svint16_t);
15968__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u8)))
15969svuint8_t svuzp1q_u8(svuint8_t, svuint8_t);
15970__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u32)))
15971svuint32_t svuzp1q_u32(svuint32_t, svuint32_t);
15972__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u64)))
15973svuint64_t svuzp1q_u64(svuint64_t, svuint64_t);
15974__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u16)))
15975svuint16_t svuzp1q_u16(svuint16_t, svuint16_t);
15976__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_bf16)))
15977svbfloat16_t svuzp1q_bf16(svbfloat16_t, svbfloat16_t);
15978__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s8)))
15979svint8_t svuzp1q_s8(svint8_t, svint8_t);
15980__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f64)))
15981svfloat64_t svuzp1q_f64(svfloat64_t, svfloat64_t);
15982__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f32)))
15983svfloat32_t svuzp1q_f32(svfloat32_t, svfloat32_t);
15984__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f16)))
15985svfloat16_t svuzp1q_f16(svfloat16_t, svfloat16_t);
15986__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s32)))
15987svint32_t svuzp1q_s32(svint32_t, svint32_t);
15988__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s64)))
15989svint64_t svuzp1q_s64(svint64_t, svint64_t);
15990__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s16)))
15991svint16_t svuzp1q_s16(svint16_t, svint16_t);
15992__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u8)))
15993svuint8_t svuzp2q_u8(svuint8_t, svuint8_t);
15994__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u32)))
15995svuint32_t svuzp2q_u32(svuint32_t, svuint32_t);
15996__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u64)))
15997svuint64_t svuzp2q_u64(svuint64_t, svuint64_t);
15998__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u16)))
15999svuint16_t svuzp2q_u16(svuint16_t, svuint16_t);
16000__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_bf16)))
16001svbfloat16_t svuzp2q_bf16(svbfloat16_t, svbfloat16_t);
16002__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s8)))
16003svint8_t svuzp2q_s8(svint8_t, svint8_t);
16004__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f64)))
16005svfloat64_t svuzp2q_f64(svfloat64_t, svfloat64_t);
16006__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f32)))
16007svfloat32_t svuzp2q_f32(svfloat32_t, svfloat32_t);
16008__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f16)))
16009svfloat16_t svuzp2q_f16(svfloat16_t, svfloat16_t);
16010__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s32)))
16011svint32_t svuzp2q_s32(svint32_t, svint32_t);
16012__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s64)))
16013svint64_t svuzp2q_s64(svint64_t, svint64_t);
16014__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s16)))
16015svint16_t svuzp2q_s16(svint16_t, svint16_t);
16016__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u8)))
16017svuint8_t svzip1q_u8(svuint8_t, svuint8_t);
16018__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u32)))
16019svuint32_t svzip1q_u32(svuint32_t, svuint32_t);
16020__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u64)))
16021svuint64_t svzip1q_u64(svuint64_t, svuint64_t);
16022__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u16)))
16023svuint16_t svzip1q_u16(svuint16_t, svuint16_t);
16024__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_bf16)))
16025svbfloat16_t svzip1q_bf16(svbfloat16_t, svbfloat16_t);
16026__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s8)))
16027svint8_t svzip1q_s8(svint8_t, svint8_t);
16028__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f64)))
16029svfloat64_t svzip1q_f64(svfloat64_t, svfloat64_t);
16030__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f32)))
16031svfloat32_t svzip1q_f32(svfloat32_t, svfloat32_t);
16032__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f16)))
16033svfloat16_t svzip1q_f16(svfloat16_t, svfloat16_t);
16034__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s32)))
16035svint32_t svzip1q_s32(svint32_t, svint32_t);
16036__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s64)))
16037svint64_t svzip1q_s64(svint64_t, svint64_t);
16038__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s16)))
16039svint16_t svzip1q_s16(svint16_t, svint16_t);
16040__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u8)))
16041svuint8_t svzip2q_u8(svuint8_t, svuint8_t);
16042__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u32)))
16043svuint32_t svzip2q_u32(svuint32_t, svuint32_t);
16044__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u64)))
16045svuint64_t svzip2q_u64(svuint64_t, svuint64_t);
16046__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u16)))
16047svuint16_t svzip2q_u16(svuint16_t, svuint16_t);
16048__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_bf16)))
16049svbfloat16_t svzip2q_bf16(svbfloat16_t, svbfloat16_t);
16050__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s8)))
16051svint8_t svzip2q_s8(svint8_t, svint8_t);
16052__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f64)))
16053svfloat64_t svzip2q_f64(svfloat64_t, svfloat64_t);
16054__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f32)))
16055svfloat32_t svzip2q_f32(svfloat32_t, svfloat32_t);
16056__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f16)))
16057svfloat16_t svzip2q_f16(svfloat16_t, svfloat16_t);
16058__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s32)))
16059svint32_t svzip2q_s32(svint32_t, svint32_t);
16060__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s64)))
16061svint64_t svzip2q_s64(svint64_t, svint64_t);
16062__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s16)))
16063svint16_t svzip2q_s16(svint16_t, svint16_t);
16064__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u8)))
16065svuint8_t svld1ro(svbool_t, uint8_t const *);
16066__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u32)))
16067svuint32_t svld1ro(svbool_t, uint32_t const *);
16068__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u64)))
16069svuint64_t svld1ro(svbool_t, uint64_t const *);
16070__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u16)))
16071svuint16_t svld1ro(svbool_t, uint16_t const *);
16072__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_bf16)))
16073svbfloat16_t svld1ro(svbool_t, bfloat16_t const *);
16074__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s8)))
16075svint8_t svld1ro(svbool_t, int8_t const *);
16076__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f64)))
16077svfloat64_t svld1ro(svbool_t, float64_t const *);
16078__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f32)))
16079svfloat32_t svld1ro(svbool_t, float32_t const *);
16080__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f16)))
16081svfloat16_t svld1ro(svbool_t, float16_t const *);
16082__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s32)))
16083svint32_t svld1ro(svbool_t, int32_t const *);
16084__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s64)))
16085svint64_t svld1ro(svbool_t, int64_t const *);
16086__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_mf8)))
16087svmfloat8_t svld1ro(svbool_t, mfloat8_t const *);
16088__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s16)))
16089svint16_t svld1ro(svbool_t, int16_t const *);
16090__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f64)))
16091svfloat64_t svmmla(svfloat64_t, svfloat64_t, svfloat64_t);
16092__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u8)))
16093svuint8_t svtrn1q(svuint8_t, svuint8_t);
16094__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u32)))
16095svuint32_t svtrn1q(svuint32_t, svuint32_t);
16096__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u64)))
16097svuint64_t svtrn1q(svuint64_t, svuint64_t);
16098__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u16)))
16099svuint16_t svtrn1q(svuint16_t, svuint16_t);
16100__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_bf16)))
16101svbfloat16_t svtrn1q(svbfloat16_t, svbfloat16_t);
16102__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s8)))
16103svint8_t svtrn1q(svint8_t, svint8_t);
16104__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f64)))
16105svfloat64_t svtrn1q(svfloat64_t, svfloat64_t);
16106__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f32)))
16107svfloat32_t svtrn1q(svfloat32_t, svfloat32_t);
16108__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f16)))
16109svfloat16_t svtrn1q(svfloat16_t, svfloat16_t);
16110__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s32)))
16111svint32_t svtrn1q(svint32_t, svint32_t);
16112__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s64)))
16113svint64_t svtrn1q(svint64_t, svint64_t);
16114__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s16)))
16115svint16_t svtrn1q(svint16_t, svint16_t);
16116__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u8)))
16117svuint8_t svtrn2q(svuint8_t, svuint8_t);
16118__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u32)))
16119svuint32_t svtrn2q(svuint32_t, svuint32_t);
16120__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u64)))
16121svuint64_t svtrn2q(svuint64_t, svuint64_t);
16122__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u16)))
16123svuint16_t svtrn2q(svuint16_t, svuint16_t);
16124__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_bf16)))
16125svbfloat16_t svtrn2q(svbfloat16_t, svbfloat16_t);
16126__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s8)))
16127svint8_t svtrn2q(svint8_t, svint8_t);
16128__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f64)))
16129svfloat64_t svtrn2q(svfloat64_t, svfloat64_t);
16130__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f32)))
16131svfloat32_t svtrn2q(svfloat32_t, svfloat32_t);
16132__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f16)))
16133svfloat16_t svtrn2q(svfloat16_t, svfloat16_t);
16134__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s32)))
16135svint32_t svtrn2q(svint32_t, svint32_t);
16136__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s64)))
16137svint64_t svtrn2q(svint64_t, svint64_t);
16138__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s16)))
16139svint16_t svtrn2q(svint16_t, svint16_t);
16140__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u8)))
16141svuint8_t svuzp1q(svuint8_t, svuint8_t);
16142__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u32)))
16143svuint32_t svuzp1q(svuint32_t, svuint32_t);
16144__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u64)))
16145svuint64_t svuzp1q(svuint64_t, svuint64_t);
16146__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u16)))
16147svuint16_t svuzp1q(svuint16_t, svuint16_t);
16148__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_bf16)))
16149svbfloat16_t svuzp1q(svbfloat16_t, svbfloat16_t);
16150__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s8)))
16151svint8_t svuzp1q(svint8_t, svint8_t);
16152__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f64)))
16153svfloat64_t svuzp1q(svfloat64_t, svfloat64_t);
16154__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f32)))
16155svfloat32_t svuzp1q(svfloat32_t, svfloat32_t);
16156__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f16)))
16157svfloat16_t svuzp1q(svfloat16_t, svfloat16_t);
16158__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s32)))
16159svint32_t svuzp1q(svint32_t, svint32_t);
16160__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s64)))
16161svint64_t svuzp1q(svint64_t, svint64_t);
16162__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s16)))
16163svint16_t svuzp1q(svint16_t, svint16_t);
16164__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u8)))
16165svuint8_t svuzp2q(svuint8_t, svuint8_t);
16166__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u32)))
16167svuint32_t svuzp2q(svuint32_t, svuint32_t);
16168__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u64)))
16169svuint64_t svuzp2q(svuint64_t, svuint64_t);
16170__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u16)))
16171svuint16_t svuzp2q(svuint16_t, svuint16_t);
16172__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_bf16)))
16173svbfloat16_t svuzp2q(svbfloat16_t, svbfloat16_t);
16174__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s8)))
16175svint8_t svuzp2q(svint8_t, svint8_t);
16176__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f64)))
16177svfloat64_t svuzp2q(svfloat64_t, svfloat64_t);
16178__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f32)))
16179svfloat32_t svuzp2q(svfloat32_t, svfloat32_t);
16180__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f16)))
16181svfloat16_t svuzp2q(svfloat16_t, svfloat16_t);
16182__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s32)))
16183svint32_t svuzp2q(svint32_t, svint32_t);
16184__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s64)))
16185svint64_t svuzp2q(svint64_t, svint64_t);
16186__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s16)))
16187svint16_t svuzp2q(svint16_t, svint16_t);
16188__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u8)))
16189svuint8_t svzip1q(svuint8_t, svuint8_t);
16190__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u32)))
16191svuint32_t svzip1q(svuint32_t, svuint32_t);
16192__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u64)))
16193svuint64_t svzip1q(svuint64_t, svuint64_t);
16194__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u16)))
16195svuint16_t svzip1q(svuint16_t, svuint16_t);
16196__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_bf16)))
16197svbfloat16_t svzip1q(svbfloat16_t, svbfloat16_t);
16198__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s8)))
16199svint8_t svzip1q(svint8_t, svint8_t);
16200__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f64)))
16201svfloat64_t svzip1q(svfloat64_t, svfloat64_t);
16202__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f32)))
16203svfloat32_t svzip1q(svfloat32_t, svfloat32_t);
16204__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f16)))
16205svfloat16_t svzip1q(svfloat16_t, svfloat16_t);
16206__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s32)))
16207svint32_t svzip1q(svint32_t, svint32_t);
16208__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s64)))
16209svint64_t svzip1q(svint64_t, svint64_t);
16210__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s16)))
16211svint16_t svzip1q(svint16_t, svint16_t);
16212__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u8)))
16213svuint8_t svzip2q(svuint8_t, svuint8_t);
16214__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u32)))
16215svuint32_t svzip2q(svuint32_t, svuint32_t);
16216__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u64)))
16217svuint64_t svzip2q(svuint64_t, svuint64_t);
16218__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u16)))
16219svuint16_t svzip2q(svuint16_t, svuint16_t);
16220__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_bf16)))
16221svbfloat16_t svzip2q(svbfloat16_t, svbfloat16_t);
16222__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s8)))
16223svint8_t svzip2q(svint8_t, svint8_t);
16224__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f64)))
16225svfloat64_t svzip2q(svfloat64_t, svfloat64_t);
16226__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f32)))
16227svfloat32_t svzip2q(svfloat32_t, svfloat32_t);
16228__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f16)))
16229svfloat16_t svzip2q(svfloat16_t, svfloat16_t);
16230__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s32)))
16231svint32_t svzip2q(svint32_t, svint32_t);
16232__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s64)))
16233svint64_t svzip2q(svint64_t, svint64_t);
16234__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s16)))
16235svint16_t svzip2q(svint16_t, svint16_t);
16236__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_s32)))
16237svint32_t svmmla_s32(svint32_t, svint8_t, svint8_t);
16238__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_u32)))
16239svuint32_t svmmla_u32(svuint32_t, svuint8_t, svuint8_t);
16240__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusmmla_s32)))
16241svint32_t svusmmla_s32(svint32_t, svuint8_t, svint8_t);
16242__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_s32)))
16243svint32_t svmmla(svint32_t, svint8_t, svint8_t);
16244__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_u32)))
16245svuint32_t svmmla(svuint32_t, svuint8_t, svuint8_t);
16246__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusmmla_s32)))
16247svint32_t svusmmla(svint32_t, svuint8_t, svint8_t);
16248__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_n_s32)))
16249svint32_t svsudot_n_s32(svint32_t, svint8_t, uint8_t);
16250__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_s32)))
16251svint32_t svsudot_s32(svint32_t, svint8_t, svuint8_t);
16252__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_lane_s32)))
16253svint32_t svsudot_lane_s32(svint32_t, svint8_t, svuint8_t, uint64_t);
16254__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_n_s32)))
16255svint32_t svusdot_n_s32(svint32_t, svuint8_t, int8_t);
16256__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_s32)))
16257svint32_t svusdot_s32(svint32_t, svuint8_t, svint8_t);
16258__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_lane_s32)))
16259svint32_t svusdot_lane_s32(svint32_t, svuint8_t, svint8_t, uint64_t);
16260__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_n_s32)))
16261svint32_t svsudot(svint32_t, svint8_t, uint8_t);
16262__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_s32)))
16263svint32_t svsudot(svint32_t, svint8_t, svuint8_t);
16264__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_lane_s32)))
16265svint32_t svsudot_lane(svint32_t, svint8_t, svuint8_t, uint64_t);
16266__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_n_s32)))
16267svint32_t svusdot(svint32_t, svuint8_t, int8_t);
16268__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_s32)))
16269svint32_t svusdot(svint32_t, svuint8_t, svint8_t);
16270__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_lane_s32)))
16271svint32_t svusdot_lane(svint32_t, svuint8_t, svint8_t, uint64_t);
16272__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_lane_u8_x2)))
16273svuint8x2_t svaesd_lane_u8_x2(svuint8x2_t, svuint8_t, uint64_t);
16274__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_lane_u8_x4)))
16275svuint8x4_t svaesd_lane_u8_x4(svuint8x4_t, svuint8_t, uint64_t);
16276__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesdimc_lane_u8_x2)))
16277svuint8x2_t svaesdimc_lane_u8_x2(svuint8x2_t, svuint8_t, uint64_t);
16278__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesdimc_lane_u8_x4)))
16279svuint8x4_t svaesdimc_lane_u8_x4(svuint8x4_t, svuint8_t, uint64_t);
16280__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_lane_u8_x2)))
16281svuint8x2_t svaese_lane_u8_x2(svuint8x2_t, svuint8_t, uint64_t);
16282__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_lane_u8_x4)))
16283svuint8x4_t svaese_lane_u8_x4(svuint8x4_t, svuint8_t, uint64_t);
16284__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesemc_lane_u8_x2)))
16285svuint8x2_t svaesemc_lane_u8_x2(svuint8x2_t, svuint8_t, uint64_t);
16286__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesemc_lane_u8_x4)))
16287svuint8x4_t svaesemc_lane_u8_x4(svuint8x4_t, svuint8_t, uint64_t);
16288__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmlal_pair_n_u64_x2)))
16289svuint64x2_t svpmlal_pair_n_u64_x2(svuint64x2_t, svuint64_t, uint64_t);
16290__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmlal_pair_u64_x2)))
16291svuint64x2_t svpmlal_pair_u64_x2(svuint64x2_t, svuint64_t, svuint64_t);
16292__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmull_pair_n_u64_x2)))
16293svuint64x2_t svpmull_pair_n_u64_x2(svuint64_t, uint64_t);
16294__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmull_pair_u64_x2)))
16295svuint64x2_t svpmull_pair_u64_x2(svuint64_t, svuint64_t);
16296__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_lane_u8_x2)))
16297svuint8x2_t svaesd_lane(svuint8x2_t, svuint8_t, uint64_t);
16298__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_lane_u8_x4)))
16299svuint8x4_t svaesd_lane(svuint8x4_t, svuint8_t, uint64_t);
16300__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesdimc_lane_u8_x2)))
16301svuint8x2_t svaesdimc_lane(svuint8x2_t, svuint8_t, uint64_t);
16302__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesdimc_lane_u8_x4)))
16303svuint8x4_t svaesdimc_lane(svuint8x4_t, svuint8_t, uint64_t);
16304__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_lane_u8_x2)))
16305svuint8x2_t svaese_lane(svuint8x2_t, svuint8_t, uint64_t);
16306__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_lane_u8_x4)))
16307svuint8x4_t svaese_lane(svuint8x4_t, svuint8_t, uint64_t);
16308__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesemc_lane_u8_x2)))
16309svuint8x2_t svaesemc_lane(svuint8x2_t, svuint8_t, uint64_t);
16310__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesemc_lane_u8_x4)))
16311svuint8x4_t svaesemc_lane(svuint8x4_t, svuint8_t, uint64_t);
16312__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmlal_pair_n_u64_x2)))
16313svuint64x2_t svpmlal_pair(svuint64x2_t, svuint64_t, uint64_t);
16314__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmlal_pair_u64_x2)))
16315svuint64x2_t svpmlal_pair(svuint64x2_t, svuint64_t, svuint64_t);
16316__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmull_pair_n_u64_x2)))
16317svuint64x2_t svpmull_pair(svuint64_t, uint64_t);
16318__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmull_pair_u64_x2)))
16319svuint64x2_t svpmull_pair(svuint64_t, svuint64_t);
16320__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_u8)))
16321svuint8_t svaesd_u8(svuint8_t, svuint8_t);
16322__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_u8)))
16323svuint8_t svaese_u8(svuint8_t, svuint8_t);
16324__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesimc_u8)))
16325svuint8_t svaesimc_u8(svuint8_t);
16326__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesmc_u8)))
16327svuint8_t svaesmc_u8(svuint8_t);
16328__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_n_u64)))
16329svuint64_t svpmullb_pair_n_u64(svuint64_t, uint64_t);
16330__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_u64)))
16331svuint64_t svpmullb_pair_u64(svuint64_t, svuint64_t);
16332__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_n_u64)))
16333svuint64_t svpmullt_pair_n_u64(svuint64_t, uint64_t);
16334__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_u64)))
16335svuint64_t svpmullt_pair_u64(svuint64_t, svuint64_t);
16336__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_u8)))
16337svuint8_t svaesd(svuint8_t, svuint8_t);
16338__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_u8)))
16339svuint8_t svaese(svuint8_t, svuint8_t);
16340__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesimc_u8)))
16341svuint8_t svaesimc(svuint8_t);
16342__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesmc_u8)))
16343svuint8_t svaesmc(svuint8_t);
16344__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_n_u64)))
16345svuint64_t svpmullb_pair(svuint64_t, uint64_t);
16346__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_u64)))
16347svuint64_t svpmullb_pair(svuint64_t, svuint64_t);
16348__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_n_u64)))
16349svuint64_t svpmullt_pair(svuint64_t, uint64_t);
16350__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_u64)))
16351svuint64_t svpmullt_pair(svuint64_t, svuint64_t);
16352__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_m)))
16353svbfloat16_t svadd_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
16354__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_x)))
16355svbfloat16_t svadd_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
16356__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_z)))
16357svbfloat16_t svadd_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
16358__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_m)))
16359svbfloat16_t svadd_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
16360__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_x)))
16361svbfloat16_t svadd_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
16362__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_z)))
16363svbfloat16_t svadd_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
16364__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svclamp_bf16)))
16365svbfloat16_t svclamp_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t);
16366__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_m)))
16367svbfloat16_t svmax_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
16368__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_x)))
16369svbfloat16_t svmax_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
16370__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_z)))
16371svbfloat16_t svmax_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
16372__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_m)))
16373svbfloat16_t svmax_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
16374__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_x)))
16375svbfloat16_t svmax_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
16376__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_z)))
16377svbfloat16_t svmax_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
16378__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_m)))
16379svbfloat16_t svmaxnm_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
16380__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_x)))
16381svbfloat16_t svmaxnm_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
16382__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_z)))
16383svbfloat16_t svmaxnm_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
16384__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_m)))
16385svbfloat16_t svmaxnm_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
16386__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_x)))
16387svbfloat16_t svmaxnm_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
16388__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_z)))
16389svbfloat16_t svmaxnm_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
16390__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_m)))
16391svbfloat16_t svmin_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
16392__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_x)))
16393svbfloat16_t svmin_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
16394__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_z)))
16395svbfloat16_t svmin_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
16396__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_m)))
16397svbfloat16_t svmin_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
16398__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_x)))
16399svbfloat16_t svmin_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
16400__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_z)))
16401svbfloat16_t svmin_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
16402__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_m)))
16403svbfloat16_t svminnm_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
16404__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_x)))
16405svbfloat16_t svminnm_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
16406__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_z)))
16407svbfloat16_t svminnm_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
16408__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_m)))
16409svbfloat16_t svminnm_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
16410__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x)))
16411svbfloat16_t svminnm_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
16412__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_z)))
16413svbfloat16_t svminnm_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
16414__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_m)))
16415svbfloat16_t svmla_n_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16416__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_x)))
16417svbfloat16_t svmla_n_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16418__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_z)))
16419svbfloat16_t svmla_n_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16420__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_m)))
16421svbfloat16_t svmla_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16422__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_x)))
16423svbfloat16_t svmla_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16424__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_z)))
16425svbfloat16_t svmla_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16426__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_lane_bf16)))
16427svbfloat16_t svmla_lane_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t);
16428__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_m)))
16429svbfloat16_t svmls_n_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16430__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_x)))
16431svbfloat16_t svmls_n_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16432__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_z)))
16433svbfloat16_t svmls_n_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16434__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_m)))
16435svbfloat16_t svmls_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16436__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_x)))
16437svbfloat16_t svmls_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16438__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_z)))
16439svbfloat16_t svmls_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16440__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_lane_bf16)))
16441svbfloat16_t svmls_lane_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t);
16442__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_m)))
16443svbfloat16_t svmul_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
16444__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_x)))
16445svbfloat16_t svmul_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
16446__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_z)))
16447svbfloat16_t svmul_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
16448__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_m)))
16449svbfloat16_t svmul_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
16450__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x)))
16451svbfloat16_t svmul_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
16452__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_z)))
16453svbfloat16_t svmul_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
16454__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_lane_bf16)))
16455svbfloat16_t svmul_lane_bf16(svbfloat16_t, svbfloat16_t, uint64_t);
16456__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_m)))
16457svbfloat16_t svsub_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t);
16458__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_x)))
16459svbfloat16_t svsub_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t);
16460__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_z)))
16461svbfloat16_t svsub_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t);
16462__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_m)))
16463svbfloat16_t svsub_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t);
16464__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_x)))
16465svbfloat16_t svsub_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t);
16466__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_z)))
16467svbfloat16_t svsub_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t);
16468__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_m)))
16469svbfloat16_t svadd_m(svbool_t, svbfloat16_t, bfloat16_t);
16470__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_x)))
16471svbfloat16_t svadd_x(svbool_t, svbfloat16_t, bfloat16_t);
16472__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_z)))
16473svbfloat16_t svadd_z(svbool_t, svbfloat16_t, bfloat16_t);
16474__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_m)))
16475svbfloat16_t svadd_m(svbool_t, svbfloat16_t, svbfloat16_t);
16476__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_x)))
16477svbfloat16_t svadd_x(svbool_t, svbfloat16_t, svbfloat16_t);
16478__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_z)))
16479svbfloat16_t svadd_z(svbool_t, svbfloat16_t, svbfloat16_t);
16480__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svclamp_bf16)))
16481svbfloat16_t svclamp(svbfloat16_t, svbfloat16_t, svbfloat16_t);
16482__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_m)))
16483svbfloat16_t svmax_m(svbool_t, svbfloat16_t, bfloat16_t);
16484__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_x)))
16485svbfloat16_t svmax_x(svbool_t, svbfloat16_t, bfloat16_t);
16486__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_z)))
16487svbfloat16_t svmax_z(svbool_t, svbfloat16_t, bfloat16_t);
16488__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_m)))
16489svbfloat16_t svmax_m(svbool_t, svbfloat16_t, svbfloat16_t);
16490__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_x)))
16491svbfloat16_t svmax_x(svbool_t, svbfloat16_t, svbfloat16_t);
16492__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_z)))
16493svbfloat16_t svmax_z(svbool_t, svbfloat16_t, svbfloat16_t);
16494__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_m)))
16495svbfloat16_t svmaxnm_m(svbool_t, svbfloat16_t, bfloat16_t);
16496__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_x)))
16497svbfloat16_t svmaxnm_x(svbool_t, svbfloat16_t, bfloat16_t);
16498__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_z)))
16499svbfloat16_t svmaxnm_z(svbool_t, svbfloat16_t, bfloat16_t);
16500__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_m)))
16501svbfloat16_t svmaxnm_m(svbool_t, svbfloat16_t, svbfloat16_t);
16502__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_x)))
16503svbfloat16_t svmaxnm_x(svbool_t, svbfloat16_t, svbfloat16_t);
16504__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_z)))
16505svbfloat16_t svmaxnm_z(svbool_t, svbfloat16_t, svbfloat16_t);
16506__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_m)))
16507svbfloat16_t svmin_m(svbool_t, svbfloat16_t, bfloat16_t);
16508__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_x)))
16509svbfloat16_t svmin_x(svbool_t, svbfloat16_t, bfloat16_t);
16510__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_z)))
16511svbfloat16_t svmin_z(svbool_t, svbfloat16_t, bfloat16_t);
16512__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_m)))
16513svbfloat16_t svmin_m(svbool_t, svbfloat16_t, svbfloat16_t);
16514__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_x)))
16515svbfloat16_t svmin_x(svbool_t, svbfloat16_t, svbfloat16_t);
16516__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_z)))
16517svbfloat16_t svmin_z(svbool_t, svbfloat16_t, svbfloat16_t);
16518__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_m)))
16519svbfloat16_t svminnm_m(svbool_t, svbfloat16_t, bfloat16_t);
16520__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_x)))
16521svbfloat16_t svminnm_x(svbool_t, svbfloat16_t, bfloat16_t);
16522__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_z)))
16523svbfloat16_t svminnm_z(svbool_t, svbfloat16_t, bfloat16_t);
16524__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_m)))
16525svbfloat16_t svminnm_m(svbool_t, svbfloat16_t, svbfloat16_t);
16526__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x)))
16527svbfloat16_t svminnm_x(svbool_t, svbfloat16_t, svbfloat16_t);
16528__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_z)))
16529svbfloat16_t svminnm_z(svbool_t, svbfloat16_t, svbfloat16_t);
16530__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_m)))
16531svbfloat16_t svmla_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16532__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_x)))
16533svbfloat16_t svmla_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16534__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_z)))
16535svbfloat16_t svmla_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16536__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_m)))
16537svbfloat16_t svmla_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16538__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_x)))
16539svbfloat16_t svmla_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16540__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_z)))
16541svbfloat16_t svmla_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16542__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_lane_bf16)))
16543svbfloat16_t svmla_lane(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t);
16544__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_m)))
16545svbfloat16_t svmls_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16546__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_x)))
16547svbfloat16_t svmls_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16548__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_z)))
16549svbfloat16_t svmls_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t);
16550__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_m)))
16551svbfloat16_t svmls_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16552__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_x)))
16553svbfloat16_t svmls_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16554__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_z)))
16555svbfloat16_t svmls_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t);
16556__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_lane_bf16)))
16557svbfloat16_t svmls_lane(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t);
16558__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_m)))
16559svbfloat16_t svmul_m(svbool_t, svbfloat16_t, bfloat16_t);
16560__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_x)))
16561svbfloat16_t svmul_x(svbool_t, svbfloat16_t, bfloat16_t);
16562__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_z)))
16563svbfloat16_t svmul_z(svbool_t, svbfloat16_t, bfloat16_t);
16564__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_m)))
16565svbfloat16_t svmul_m(svbool_t, svbfloat16_t, svbfloat16_t);
16566__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x)))
16567svbfloat16_t svmul_x(svbool_t, svbfloat16_t, svbfloat16_t);
16568__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_z)))
16569svbfloat16_t svmul_z(svbool_t, svbfloat16_t, svbfloat16_t);
16570__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_lane_bf16)))
16571svbfloat16_t svmul_lane(svbfloat16_t, svbfloat16_t, uint64_t);
16572__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_m)))
16573svbfloat16_t svsub_m(svbool_t, svbfloat16_t, bfloat16_t);
16574__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_x)))
16575svbfloat16_t svsub_x(svbool_t, svbfloat16_t, bfloat16_t);
16576__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_z)))
16577svbfloat16_t svsub_z(svbool_t, svbfloat16_t, bfloat16_t);
16578__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_m)))
16579svbfloat16_t svsub_m(svbool_t, svbfloat16_t, svbfloat16_t);
16580__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_x)))
16581svbfloat16_t svsub_x(svbool_t, svbfloat16_t, svbfloat16_t);
16582__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_z)))
16583svbfloat16_t svsub_z(svbool_t, svbfloat16_t, svbfloat16_t);
16584__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_m)))
16585svbfloat16_t svscale_n_bf16_m(svbool_t, svbfloat16_t, int16_t);
16586__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_x)))
16587svbfloat16_t svscale_n_bf16_x(svbool_t, svbfloat16_t, int16_t);
16588__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_z)))
16589svbfloat16_t svscale_n_bf16_z(svbool_t, svbfloat16_t, int16_t);
16590__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_m)))
16591svbfloat16_t svscale_bf16_m(svbool_t, svbfloat16_t, svint16_t);
16592__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x)))
16593svbfloat16_t svscale_bf16_x(svbool_t, svbfloat16_t, svint16_t);
16594__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_z)))
16595svbfloat16_t svscale_bf16_z(svbool_t, svbfloat16_t, svint16_t);
16596__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_m)))
16597svbfloat16_t svscale_m(svbool_t, svbfloat16_t, int16_t);
16598__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_x)))
16599svbfloat16_t svscale_x(svbool_t, svbfloat16_t, int16_t);
16600__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_z)))
16601svbfloat16_t svscale_z(svbool_t, svbfloat16_t, int16_t);
16602__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_m)))
16603svbfloat16_t svscale_m(svbool_t, svbfloat16_t, svint16_t);
16604__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x)))
16605svbfloat16_t svscale_x(svbool_t, svbfloat16_t, svint16_t);
16606__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_z)))
16607svbfloat16_t svscale_z(svbool_t, svbfloat16_t, svint16_t);
16608__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u8)))
16609svuint8_t svbdep_n_u8(svuint8_t, uint8_t);
16610__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u32)))
16611svuint32_t svbdep_n_u32(svuint32_t, uint32_t);
16612__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u64)))
16613svuint64_t svbdep_n_u64(svuint64_t, uint64_t);
16614__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u16)))
16615svuint16_t svbdep_n_u16(svuint16_t, uint16_t);
16616__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u8)))
16617svuint8_t svbdep_u8(svuint8_t, svuint8_t);
16618__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u32)))
16619svuint32_t svbdep_u32(svuint32_t, svuint32_t);
16620__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u64)))
16621svuint64_t svbdep_u64(svuint64_t, svuint64_t);
16622__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u16)))
16623svuint16_t svbdep_u16(svuint16_t, svuint16_t);
16624__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u8)))
16625svuint8_t svbext_n_u8(svuint8_t, uint8_t);
16626__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u32)))
16627svuint32_t svbext_n_u32(svuint32_t, uint32_t);
16628__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u64)))
16629svuint64_t svbext_n_u64(svuint64_t, uint64_t);
16630__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u16)))
16631svuint16_t svbext_n_u16(svuint16_t, uint16_t);
16632__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u8)))
16633svuint8_t svbext_u8(svuint8_t, svuint8_t);
16634__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u32)))
16635svuint32_t svbext_u32(svuint32_t, svuint32_t);
16636__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u64)))
16637svuint64_t svbext_u64(svuint64_t, svuint64_t);
16638__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u16)))
16639svuint16_t svbext_u16(svuint16_t, svuint16_t);
16640__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u8)))
16641svuint8_t svbgrp_n_u8(svuint8_t, uint8_t);
16642__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u32)))
16643svuint32_t svbgrp_n_u32(svuint32_t, uint32_t);
16644__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u64)))
16645svuint64_t svbgrp_n_u64(svuint64_t, uint64_t);
16646__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u16)))
16647svuint16_t svbgrp_n_u16(svuint16_t, uint16_t);
16648__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u8)))
16649svuint8_t svbgrp_u8(svuint8_t, svuint8_t);
16650__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u32)))
16651svuint32_t svbgrp_u32(svuint32_t, svuint32_t);
16652__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u64)))
16653svuint64_t svbgrp_u64(svuint64_t, svuint64_t);
16654__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u16)))
16655svuint16_t svbgrp_u16(svuint16_t, svuint16_t);
16656__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u8)))
16657svuint8_t svbdep(svuint8_t, uint8_t);
16658__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u32)))
16659svuint32_t svbdep(svuint32_t, uint32_t);
16660__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u64)))
16661svuint64_t svbdep(svuint64_t, uint64_t);
16662__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u16)))
16663svuint16_t svbdep(svuint16_t, uint16_t);
16664__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u8)))
16665svuint8_t svbdep(svuint8_t, svuint8_t);
16666__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u32)))
16667svuint32_t svbdep(svuint32_t, svuint32_t);
16668__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u64)))
16669svuint64_t svbdep(svuint64_t, svuint64_t);
16670__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u16)))
16671svuint16_t svbdep(svuint16_t, svuint16_t);
16672__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u8)))
16673svuint8_t svbext(svuint8_t, uint8_t);
16674__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u32)))
16675svuint32_t svbext(svuint32_t, uint32_t);
16676__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u64)))
16677svuint64_t svbext(svuint64_t, uint64_t);
16678__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u16)))
16679svuint16_t svbext(svuint16_t, uint16_t);
16680__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u8)))
16681svuint8_t svbext(svuint8_t, svuint8_t);
16682__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u32)))
16683svuint32_t svbext(svuint32_t, svuint32_t);
16684__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u64)))
16685svuint64_t svbext(svuint64_t, svuint64_t);
16686__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u16)))
16687svuint16_t svbext(svuint16_t, svuint16_t);
16688__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u8)))
16689svuint8_t svbgrp(svuint8_t, uint8_t);
16690__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u32)))
16691svuint32_t svbgrp(svuint32_t, uint32_t);
16692__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u64)))
16693svuint64_t svbgrp(svuint64_t, uint64_t);
16694__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u16)))
16695svuint16_t svbgrp(svuint16_t, uint16_t);
16696__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u8)))
16697svuint8_t svbgrp(svuint8_t, svuint8_t);
16698__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u32)))
16699svuint32_t svbgrp(svuint32_t, svuint32_t);
16700__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u64)))
16701svuint64_t svbgrp(svuint64_t, svuint64_t);
16702__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u16)))
16703svuint16_t svbgrp(svuint16_t, svuint16_t);
16704__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32_f16)))
16705svfloat32_t svmmla_f32_f16(svfloat32_t, svfloat16_t, svfloat16_t);
16706__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32_f16)))
16707svfloat32_t svmmla(svfloat32_t, svfloat16_t, svfloat16_t);
16708__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_u64)))
16709svuint64_t svrax1_u64(svuint64_t, svuint64_t);
16710__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_s64)))
16711svint64_t svrax1_s64(svint64_t, svint64_t);
16712__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_u64)))
16713svuint64_t svrax1(svuint64_t, svuint64_t);
16714__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_s64)))
16715svint64_t svrax1(svint64_t, svint64_t);
16716__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4e_u32)))
16717svuint32_t svsm4e_u32(svuint32_t, svuint32_t);
16718__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4ekey_u32)))
16719svuint32_t svsm4ekey_u32(svuint32_t, svuint32_t);
16720__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4e_u32)))
16721svuint32_t svsm4e(svuint32_t, svuint32_t);
16722__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4ekey_u32)))
16723svuint32_t svsm4ekey(svuint32_t, svuint32_t);
16724__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u32_z)))
16725svuint32_t svhistcnt_u32_z(svbool_t, svuint32_t, svuint32_t);
16726__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u64_z)))
16727svuint64_t svhistcnt_u64_z(svbool_t, svuint64_t, svuint64_t);
16728__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s32_z)))
16729svuint32_t svhistcnt_s32_z(svbool_t, svint32_t, svint32_t);
16730__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s64_z)))
16731svuint64_t svhistcnt_s64_z(svbool_t, svint64_t, svint64_t);
16732__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_u8)))
16733svuint8_t svhistseg_u8(svuint8_t, svuint8_t);
16734__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_s8)))
16735svuint8_t svhistseg_s8(svint8_t, svint8_t);
16736__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_u32)))
16737svuint32_t svldnt1_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t);
16738__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_u64)))
16739svuint64_t svldnt1_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
16740__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_f64)))
16741svfloat64_t svldnt1_gather_u64base_index_f64(svbool_t, svuint64_t, int64_t);
16742__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_f32)))
16743svfloat32_t svldnt1_gather_u32base_index_f32(svbool_t, svuint32_t, int64_t);
16744__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_s32)))
16745svint32_t svldnt1_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t);
16746__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_s64)))
16747svint64_t svldnt1_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
16748__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_u32)))
16749svuint32_t svldnt1_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
16750__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_u64)))
16751svuint64_t svldnt1_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
16752__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_f64)))
16753svfloat64_t svldnt1_gather_u64base_offset_f64(svbool_t, svuint64_t, int64_t);
16754__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_f32)))
16755svfloat32_t svldnt1_gather_u32base_offset_f32(svbool_t, svuint32_t, int64_t);
16756__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_s32)))
16757svint32_t svldnt1_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
16758__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_s64)))
16759svint64_t svldnt1_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
16760__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_u32)))
16761svuint32_t svldnt1_gather_u32base_u32(svbool_t, svuint32_t);
16762__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_u64)))
16763svuint64_t svldnt1_gather_u64base_u64(svbool_t, svuint64_t);
16764__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_f64)))
16765svfloat64_t svldnt1_gather_u64base_f64(svbool_t, svuint64_t);
16766__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_f32)))
16767svfloat32_t svldnt1_gather_u32base_f32(svbool_t, svuint32_t);
16768__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_s32)))
16769svint32_t svldnt1_gather_u32base_s32(svbool_t, svuint32_t);
16770__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_s64)))
16771svint64_t svldnt1_gather_u64base_s64(svbool_t, svuint64_t);
16772__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_u64)))
16773svuint64_t svldnt1_gather_s64index_u64(svbool_t, uint64_t const *, svint64_t);
16774__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_f64)))
16775svfloat64_t svldnt1_gather_s64index_f64(svbool_t, float64_t const *, svint64_t);
16776__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_s64)))
16777svint64_t svldnt1_gather_s64index_s64(svbool_t, int64_t const *, svint64_t);
16778__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_u64)))
16779svuint64_t svldnt1_gather_u64index_u64(svbool_t, uint64_t const *, svuint64_t);
16780__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_f64)))
16781svfloat64_t svldnt1_gather_u64index_f64(svbool_t, float64_t const *, svuint64_t);
16782__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_s64)))
16783svint64_t svldnt1_gather_u64index_s64(svbool_t, int64_t const *, svuint64_t);
16784__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_u32)))
16785svuint32_t svldnt1_gather_u32offset_u32(svbool_t, uint32_t const *, svuint32_t);
16786__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_f32)))
16787svfloat32_t svldnt1_gather_u32offset_f32(svbool_t, float32_t const *, svuint32_t);
16788__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_s32)))
16789svint32_t svldnt1_gather_u32offset_s32(svbool_t, int32_t const *, svuint32_t);
16790__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_u64)))
16791svuint64_t svldnt1_gather_s64offset_u64(svbool_t, uint64_t const *, svint64_t);
16792__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_f64)))
16793svfloat64_t svldnt1_gather_s64offset_f64(svbool_t, float64_t const *, svint64_t);
16794__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_s64)))
16795svint64_t svldnt1_gather_s64offset_s64(svbool_t, int64_t const *, svint64_t);
16796__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_u64)))
16797svuint64_t svldnt1_gather_u64offset_u64(svbool_t, uint64_t const *, svuint64_t);
16798__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_f64)))
16799svfloat64_t svldnt1_gather_u64offset_f64(svbool_t, float64_t const *, svuint64_t);
16800__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_s64)))
16801svint64_t svldnt1_gather_u64offset_s64(svbool_t, int64_t const *, svuint64_t);
16802__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_u32)))
16803svuint32_t svldnt1sb_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
16804__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_u64)))
16805svuint64_t svldnt1sb_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
16806__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_s32)))
16807svint32_t svldnt1sb_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
16808__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_s64)))
16809svint64_t svldnt1sb_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
16810__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_u32)))
16811svuint32_t svldnt1sb_gather_u32base_u32(svbool_t, svuint32_t);
16812__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_u64)))
16813svuint64_t svldnt1sb_gather_u64base_u64(svbool_t, svuint64_t);
16814__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_s32)))
16815svint32_t svldnt1sb_gather_u32base_s32(svbool_t, svuint32_t);
16816__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_s64)))
16817svint64_t svldnt1sb_gather_u64base_s64(svbool_t, svuint64_t);
16818__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_u32)))
16819svuint32_t svldnt1sb_gather_u32offset_u32(svbool_t, int8_t const *, svuint32_t);
16820__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_s32)))
16821svint32_t svldnt1sb_gather_u32offset_s32(svbool_t, int8_t const *, svuint32_t);
16822__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_u64)))
16823svuint64_t svldnt1sb_gather_s64offset_u64(svbool_t, int8_t const *, svint64_t);
16824__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_s64)))
16825svint64_t svldnt1sb_gather_s64offset_s64(svbool_t, int8_t const *, svint64_t);
16826__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_u64)))
16827svuint64_t svldnt1sb_gather_u64offset_u64(svbool_t, int8_t const *, svuint64_t);
16828__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_s64)))
16829svint64_t svldnt1sb_gather_u64offset_s64(svbool_t, int8_t const *, svuint64_t);
16830__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_u32)))
16831svuint32_t svldnt1sh_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t);
16832__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_u64)))
16833svuint64_t svldnt1sh_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
16834__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_s32)))
16835svint32_t svldnt1sh_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t);
16836__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_s64)))
16837svint64_t svldnt1sh_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
16838__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_u32)))
16839svuint32_t svldnt1sh_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
16840__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_u64)))
16841svuint64_t svldnt1sh_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
16842__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_s32)))
16843svint32_t svldnt1sh_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
16844__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_s64)))
16845svint64_t svldnt1sh_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
16846__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_u32)))
16847svuint32_t svldnt1sh_gather_u32base_u32(svbool_t, svuint32_t);
16848__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_u64)))
16849svuint64_t svldnt1sh_gather_u64base_u64(svbool_t, svuint64_t);
16850__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_s32)))
16851svint32_t svldnt1sh_gather_u32base_s32(svbool_t, svuint32_t);
16852__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_s64)))
16853svint64_t svldnt1sh_gather_u64base_s64(svbool_t, svuint64_t);
16854__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_u64)))
16855svuint64_t svldnt1sh_gather_s64index_u64(svbool_t, int16_t const *, svint64_t);
16856__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_s64)))
16857svint64_t svldnt1sh_gather_s64index_s64(svbool_t, int16_t const *, svint64_t);
16858__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_u64)))
16859svuint64_t svldnt1sh_gather_u64index_u64(svbool_t, int16_t const *, svuint64_t);
16860__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_s64)))
16861svint64_t svldnt1sh_gather_u64index_s64(svbool_t, int16_t const *, svuint64_t);
16862__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_u32)))
16863svuint32_t svldnt1sh_gather_u32offset_u32(svbool_t, int16_t const *, svuint32_t);
16864__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_s32)))
16865svint32_t svldnt1sh_gather_u32offset_s32(svbool_t, int16_t const *, svuint32_t);
16866__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_u64)))
16867svuint64_t svldnt1sh_gather_s64offset_u64(svbool_t, int16_t const *, svint64_t);
16868__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_s64)))
16869svint64_t svldnt1sh_gather_s64offset_s64(svbool_t, int16_t const *, svint64_t);
16870__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_u64)))
16871svuint64_t svldnt1sh_gather_u64offset_u64(svbool_t, int16_t const *, svuint64_t);
16872__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_s64)))
16873svint64_t svldnt1sh_gather_u64offset_s64(svbool_t, int16_t const *, svuint64_t);
16874__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_u64)))
16875svuint64_t svldnt1sw_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
16876__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_s64)))
16877svint64_t svldnt1sw_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
16878__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_u64)))
16879svuint64_t svldnt1sw_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
16880__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_s64)))
16881svint64_t svldnt1sw_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
16882__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_u64)))
16883svuint64_t svldnt1sw_gather_u64base_u64(svbool_t, svuint64_t);
16884__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_s64)))
16885svint64_t svldnt1sw_gather_u64base_s64(svbool_t, svuint64_t);
16886__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_u64)))
16887svuint64_t svldnt1sw_gather_s64index_u64(svbool_t, int32_t const *, svint64_t);
16888__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_s64)))
16889svint64_t svldnt1sw_gather_s64index_s64(svbool_t, int32_t const *, svint64_t);
16890__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_u64)))
16891svuint64_t svldnt1sw_gather_u64index_u64(svbool_t, int32_t const *, svuint64_t);
16892__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_s64)))
16893svint64_t svldnt1sw_gather_u64index_s64(svbool_t, int32_t const *, svuint64_t);
16894__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_u64)))
16895svuint64_t svldnt1sw_gather_s64offset_u64(svbool_t, int32_t const *, svint64_t);
16896__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_s64)))
16897svint64_t svldnt1sw_gather_s64offset_s64(svbool_t, int32_t const *, svint64_t);
16898__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_u64)))
16899svuint64_t svldnt1sw_gather_u64offset_u64(svbool_t, int32_t const *, svuint64_t);
16900__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_s64)))
16901svint64_t svldnt1sw_gather_u64offset_s64(svbool_t, int32_t const *, svuint64_t);
16902__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_u32)))
16903svuint32_t svldnt1ub_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
16904__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_u64)))
16905svuint64_t svldnt1ub_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
16906__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_s32)))
16907svint32_t svldnt1ub_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
16908__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_s64)))
16909svint64_t svldnt1ub_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
16910__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_u32)))
16911svuint32_t svldnt1ub_gather_u32base_u32(svbool_t, svuint32_t);
16912__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_u64)))
16913svuint64_t svldnt1ub_gather_u64base_u64(svbool_t, svuint64_t);
16914__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_s32)))
16915svint32_t svldnt1ub_gather_u32base_s32(svbool_t, svuint32_t);
16916__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_s64)))
16917svint64_t svldnt1ub_gather_u64base_s64(svbool_t, svuint64_t);
16918__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_u32)))
16919svuint32_t svldnt1ub_gather_u32offset_u32(svbool_t, uint8_t const *, svuint32_t);
16920__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_s32)))
16921svint32_t svldnt1ub_gather_u32offset_s32(svbool_t, uint8_t const *, svuint32_t);
16922__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_u64)))
16923svuint64_t svldnt1ub_gather_s64offset_u64(svbool_t, uint8_t const *, svint64_t);
16924__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_s64)))
16925svint64_t svldnt1ub_gather_s64offset_s64(svbool_t, uint8_t const *, svint64_t);
16926__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_u64)))
16927svuint64_t svldnt1ub_gather_u64offset_u64(svbool_t, uint8_t const *, svuint64_t);
16928__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_s64)))
16929svint64_t svldnt1ub_gather_u64offset_s64(svbool_t, uint8_t const *, svuint64_t);
16930__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_u32)))
16931svuint32_t svldnt1uh_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t);
16932__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_u64)))
16933svuint64_t svldnt1uh_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
16934__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_s32)))
16935svint32_t svldnt1uh_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t);
16936__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_s64)))
16937svint64_t svldnt1uh_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
16938__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_u32)))
16939svuint32_t svldnt1uh_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t);
16940__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_u64)))
16941svuint64_t svldnt1uh_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
16942__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_s32)))
16943svint32_t svldnt1uh_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t);
16944__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_s64)))
16945svint64_t svldnt1uh_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
16946__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_u32)))
16947svuint32_t svldnt1uh_gather_u32base_u32(svbool_t, svuint32_t);
16948__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_u64)))
16949svuint64_t svldnt1uh_gather_u64base_u64(svbool_t, svuint64_t);
16950__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_s32)))
16951svint32_t svldnt1uh_gather_u32base_s32(svbool_t, svuint32_t);
16952__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_s64)))
16953svint64_t svldnt1uh_gather_u64base_s64(svbool_t, svuint64_t);
16954__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_u64)))
16955svuint64_t svldnt1uh_gather_s64index_u64(svbool_t, uint16_t const *, svint64_t);
16956__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_s64)))
16957svint64_t svldnt1uh_gather_s64index_s64(svbool_t, uint16_t const *, svint64_t);
16958__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_u64)))
16959svuint64_t svldnt1uh_gather_u64index_u64(svbool_t, uint16_t const *, svuint64_t);
16960__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_s64)))
16961svint64_t svldnt1uh_gather_u64index_s64(svbool_t, uint16_t const *, svuint64_t);
16962__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_u32)))
16963svuint32_t svldnt1uh_gather_u32offset_u32(svbool_t, uint16_t const *, svuint32_t);
16964__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_s32)))
16965svint32_t svldnt1uh_gather_u32offset_s32(svbool_t, uint16_t const *, svuint32_t);
16966__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_u64)))
16967svuint64_t svldnt1uh_gather_s64offset_u64(svbool_t, uint16_t const *, svint64_t);
16968__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_s64)))
16969svint64_t svldnt1uh_gather_s64offset_s64(svbool_t, uint16_t const *, svint64_t);
16970__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_u64)))
16971svuint64_t svldnt1uh_gather_u64offset_u64(svbool_t, uint16_t const *, svuint64_t);
16972__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_s64)))
16973svint64_t svldnt1uh_gather_u64offset_s64(svbool_t, uint16_t const *, svuint64_t);
16974__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_u64)))
16975svuint64_t svldnt1uw_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
16976__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_s64)))
16977svint64_t svldnt1uw_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
16978__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_u64)))
16979svuint64_t svldnt1uw_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
16980__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_s64)))
16981svint64_t svldnt1uw_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
16982__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_u64)))
16983svuint64_t svldnt1uw_gather_u64base_u64(svbool_t, svuint64_t);
16984__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_s64)))
16985svint64_t svldnt1uw_gather_u64base_s64(svbool_t, svuint64_t);
16986__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_u64)))
16987svuint64_t svldnt1uw_gather_s64index_u64(svbool_t, uint32_t const *, svint64_t);
16988__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_s64)))
16989svint64_t svldnt1uw_gather_s64index_s64(svbool_t, uint32_t const *, svint64_t);
16990__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_u64)))
16991svuint64_t svldnt1uw_gather_u64index_u64(svbool_t, uint32_t const *, svuint64_t);
16992__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_s64)))
16993svint64_t svldnt1uw_gather_u64index_s64(svbool_t, uint32_t const *, svuint64_t);
16994__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_u64)))
16995svuint64_t svldnt1uw_gather_s64offset_u64(svbool_t, uint32_t const *, svint64_t);
16996__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_s64)))
16997svint64_t svldnt1uw_gather_s64offset_s64(svbool_t, uint32_t const *, svint64_t);
16998__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_u64)))
16999svuint64_t svldnt1uw_gather_u64offset_u64(svbool_t, uint32_t const *, svuint64_t);
17000__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_s64)))
17001svint64_t svldnt1uw_gather_u64offset_s64(svbool_t, uint32_t const *, svuint64_t);
17002__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u8)))
17003svbool_t svmatch_u8(svbool_t, svuint8_t, svuint8_t);
17004__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u16)))
17005svbool_t svmatch_u16(svbool_t, svuint16_t, svuint16_t);
17006__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s8)))
17007svbool_t svmatch_s8(svbool_t, svint8_t, svint8_t);
17008__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s16)))
17009svbool_t svmatch_s16(svbool_t, svint16_t, svint16_t);
17010__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u8)))
17011svbool_t svnmatch_u8(svbool_t, svuint8_t, svuint8_t);
17012__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u16)))
17013svbool_t svnmatch_u16(svbool_t, svuint16_t, svuint16_t);
17014__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s8)))
17015svbool_t svnmatch_s8(svbool_t, svint8_t, svint8_t);
17016__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s16)))
17017svbool_t svnmatch_s16(svbool_t, svint16_t, svint16_t);
17018__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_u32)))
17019void svstnt1_scatter_u32base_index_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
17020__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_u64)))
17021void svstnt1_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17022__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_f64)))
17023void svstnt1_scatter_u64base_index_f64(svbool_t, svuint64_t, int64_t, svfloat64_t);
17024__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_f32)))
17025void svstnt1_scatter_u32base_index_f32(svbool_t, svuint32_t, int64_t, svfloat32_t);
17026__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_s32)))
17027void svstnt1_scatter_u32base_index_s32(svbool_t, svuint32_t, int64_t, svint32_t);
17028__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_s64)))
17029void svstnt1_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17030__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_u32)))
17031void svstnt1_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
17032__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_u64)))
17033void svstnt1_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17034__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_f64)))
17035void svstnt1_scatter_u64base_offset_f64(svbool_t, svuint64_t, int64_t, svfloat64_t);
17036__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_f32)))
17037void svstnt1_scatter_u32base_offset_f32(svbool_t, svuint32_t, int64_t, svfloat32_t);
17038__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_s32)))
17039void svstnt1_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t);
17040__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_s64)))
17041void svstnt1_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17042__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_u32)))
17043void svstnt1_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t);
17044__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_u64)))
17045void svstnt1_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
17046__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_f64)))
17047void svstnt1_scatter_u64base_f64(svbool_t, svuint64_t, svfloat64_t);
17048__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_f32)))
17049void svstnt1_scatter_u32base_f32(svbool_t, svuint32_t, svfloat32_t);
17050__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_s32)))
17051void svstnt1_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t);
17052__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_s64)))
17053void svstnt1_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
17054__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_u64)))
17055void svstnt1_scatter_s64index_u64(svbool_t, uint64_t *, svint64_t, svuint64_t);
17056__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_f64)))
17057void svstnt1_scatter_s64index_f64(svbool_t, float64_t *, svint64_t, svfloat64_t);
17058__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_s64)))
17059void svstnt1_scatter_s64index_s64(svbool_t, int64_t *, svint64_t, svint64_t);
17060__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_u64)))
17061void svstnt1_scatter_u64index_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t);
17062__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_f64)))
17063void svstnt1_scatter_u64index_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t);
17064__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_s64)))
17065void svstnt1_scatter_u64index_s64(svbool_t, int64_t *, svuint64_t, svint64_t);
17066__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_u32)))
17067void svstnt1_scatter_u32offset_u32(svbool_t, uint32_t *, svuint32_t, svuint32_t);
17068__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_f32)))
17069void svstnt1_scatter_u32offset_f32(svbool_t, float32_t *, svuint32_t, svfloat32_t);
17070__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_s32)))
17071void svstnt1_scatter_u32offset_s32(svbool_t, int32_t *, svuint32_t, svint32_t);
17072__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_u64)))
17073void svstnt1_scatter_s64offset_u64(svbool_t, uint64_t *, svint64_t, svuint64_t);
17074__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_f64)))
17075void svstnt1_scatter_s64offset_f64(svbool_t, float64_t *, svint64_t, svfloat64_t);
17076__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_s64)))
17077void svstnt1_scatter_s64offset_s64(svbool_t, int64_t *, svint64_t, svint64_t);
17078__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_u64)))
17079void svstnt1_scatter_u64offset_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t);
17080__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_f64)))
17081void svstnt1_scatter_u64offset_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t);
17082__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_s64)))
17083void svstnt1_scatter_u64offset_s64(svbool_t, int64_t *, svuint64_t, svint64_t);
17084__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_u32)))
17085void svstnt1b_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
17086__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_u64)))
17087void svstnt1b_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17088__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_s32)))
17089void svstnt1b_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t);
17090__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_s64)))
17091void svstnt1b_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17092__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_u32)))
17093void svstnt1b_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t);
17094__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_u64)))
17095void svstnt1b_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
17096__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_s32)))
17097void svstnt1b_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t);
17098__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_s64)))
17099void svstnt1b_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
17100__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_s32)))
17101void svstnt1b_scatter_u32offset_s32(svbool_t, int8_t *, svuint32_t, svint32_t);
17102__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_u32)))
17103void svstnt1b_scatter_u32offset_u32(svbool_t, uint8_t *, svuint32_t, svuint32_t);
17104__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_s64)))
17105void svstnt1b_scatter_s64offset_s64(svbool_t, int8_t *, svint64_t, svint64_t);
17106__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_u64)))
17107void svstnt1b_scatter_s64offset_u64(svbool_t, uint8_t *, svint64_t, svuint64_t);
17108__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_s64)))
17109void svstnt1b_scatter_u64offset_s64(svbool_t, int8_t *, svuint64_t, svint64_t);
17110__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_u64)))
17111void svstnt1b_scatter_u64offset_u64(svbool_t, uint8_t *, svuint64_t, svuint64_t);
17112__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_u32)))
17113void svstnt1h_scatter_u32base_index_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
17114__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_u64)))
17115void svstnt1h_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17116__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_s32)))
17117void svstnt1h_scatter_u32base_index_s32(svbool_t, svuint32_t, int64_t, svint32_t);
17118__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_s64)))
17119void svstnt1h_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17120__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_u32)))
17121void svstnt1h_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t);
17122__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_u64)))
17123void svstnt1h_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17124__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_s32)))
17125void svstnt1h_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t);
17126__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_s64)))
17127void svstnt1h_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17128__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_u32)))
17129void svstnt1h_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t);
17130__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_u64)))
17131void svstnt1h_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
17132__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_s32)))
17133void svstnt1h_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t);
17134__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_s64)))
17135void svstnt1h_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
17136__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_s64)))
17137void svstnt1h_scatter_s64index_s64(svbool_t, int16_t *, svint64_t, svint64_t);
17138__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_u64)))
17139void svstnt1h_scatter_s64index_u64(svbool_t, uint16_t *, svint64_t, svuint64_t);
17140__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_s64)))
17141void svstnt1h_scatter_u64index_s64(svbool_t, int16_t *, svuint64_t, svint64_t);
17142__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_u64)))
17143void svstnt1h_scatter_u64index_u64(svbool_t, uint16_t *, svuint64_t, svuint64_t);
17144__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_s32)))
17145void svstnt1h_scatter_u32offset_s32(svbool_t, int16_t *, svuint32_t, svint32_t);
17146__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_u32)))
17147void svstnt1h_scatter_u32offset_u32(svbool_t, uint16_t *, svuint32_t, svuint32_t);
17148__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_s64)))
17149void svstnt1h_scatter_s64offset_s64(svbool_t, int16_t *, svint64_t, svint64_t);
17150__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_u64)))
17151void svstnt1h_scatter_s64offset_u64(svbool_t, uint16_t *, svint64_t, svuint64_t);
17152__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_s64)))
17153void svstnt1h_scatter_u64offset_s64(svbool_t, int16_t *, svuint64_t, svint64_t);
17154__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_u64)))
17155void svstnt1h_scatter_u64offset_u64(svbool_t, uint16_t *, svuint64_t, svuint64_t);
17156__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_u64)))
17157void svstnt1w_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17158__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_s64)))
17159void svstnt1w_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17160__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_u64)))
17161void svstnt1w_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17162__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_s64)))
17163void svstnt1w_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17164__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_u64)))
17165void svstnt1w_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
17166__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_s64)))
17167void svstnt1w_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
17168__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_s64)))
17169void svstnt1w_scatter_s64index_s64(svbool_t, int32_t *, svint64_t, svint64_t);
17170__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_u64)))
17171void svstnt1w_scatter_s64index_u64(svbool_t, uint32_t *, svint64_t, svuint64_t);
17172__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_s64)))
17173void svstnt1w_scatter_u64index_s64(svbool_t, int32_t *, svuint64_t, svint64_t);
17174__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_u64)))
17175void svstnt1w_scatter_u64index_u64(svbool_t, uint32_t *, svuint64_t, svuint64_t);
17176__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_s64)))
17177void svstnt1w_scatter_s64offset_s64(svbool_t, int32_t *, svint64_t, svint64_t);
17178__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_u64)))
17179void svstnt1w_scatter_s64offset_u64(svbool_t, uint32_t *, svint64_t, svuint64_t);
17180__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_s64)))
17181void svstnt1w_scatter_u64offset_s64(svbool_t, int32_t *, svuint64_t, svint64_t);
17182__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_u64)))
17183void svstnt1w_scatter_u64offset_u64(svbool_t, uint32_t *, svuint64_t, svuint64_t);
17184__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u32_z)))
17185svuint32_t svhistcnt_z(svbool_t, svuint32_t, svuint32_t);
17186__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u64_z)))
17187svuint64_t svhistcnt_z(svbool_t, svuint64_t, svuint64_t);
17188__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s32_z)))
17189svuint32_t svhistcnt_z(svbool_t, svint32_t, svint32_t);
17190__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s64_z)))
17191svuint64_t svhistcnt_z(svbool_t, svint64_t, svint64_t);
17192__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_u8)))
17193svuint8_t svhistseg(svuint8_t, svuint8_t);
17194__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_s8)))
17195svuint8_t svhistseg(svint8_t, svint8_t);
17196__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_u32)))
17197svuint32_t svldnt1_gather_index_u32(svbool_t, svuint32_t, int64_t);
17198__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_u64)))
17199svuint64_t svldnt1_gather_index_u64(svbool_t, svuint64_t, int64_t);
17200__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_f64)))
17201svfloat64_t svldnt1_gather_index_f64(svbool_t, svuint64_t, int64_t);
17202__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_f32)))
17203svfloat32_t svldnt1_gather_index_f32(svbool_t, svuint32_t, int64_t);
17204__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_s32)))
17205svint32_t svldnt1_gather_index_s32(svbool_t, svuint32_t, int64_t);
17206__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_s64)))
17207svint64_t svldnt1_gather_index_s64(svbool_t, svuint64_t, int64_t);
17208__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_u32)))
17209svuint32_t svldnt1_gather_offset_u32(svbool_t, svuint32_t, int64_t);
17210__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_u64)))
17211svuint64_t svldnt1_gather_offset_u64(svbool_t, svuint64_t, int64_t);
17212__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_f64)))
17213svfloat64_t svldnt1_gather_offset_f64(svbool_t, svuint64_t, int64_t);
17214__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_f32)))
17215svfloat32_t svldnt1_gather_offset_f32(svbool_t, svuint32_t, int64_t);
17216__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_s32)))
17217svint32_t svldnt1_gather_offset_s32(svbool_t, svuint32_t, int64_t);
17218__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_s64)))
17219svint64_t svldnt1_gather_offset_s64(svbool_t, svuint64_t, int64_t);
17220__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_u32)))
17221svuint32_t svldnt1_gather_u32(svbool_t, svuint32_t);
17222__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_u64)))
17223svuint64_t svldnt1_gather_u64(svbool_t, svuint64_t);
17224__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_f64)))
17225svfloat64_t svldnt1_gather_f64(svbool_t, svuint64_t);
17226__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_f32)))
17227svfloat32_t svldnt1_gather_f32(svbool_t, svuint32_t);
17228__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_s32)))
17229svint32_t svldnt1_gather_s32(svbool_t, svuint32_t);
17230__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_s64)))
17231svint64_t svldnt1_gather_s64(svbool_t, svuint64_t);
17232__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_u64)))
17233svuint64_t svldnt1_gather_index(svbool_t, uint64_t const *, svint64_t);
17234__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_f64)))
17235svfloat64_t svldnt1_gather_index(svbool_t, float64_t const *, svint64_t);
17236__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_s64)))
17237svint64_t svldnt1_gather_index(svbool_t, int64_t const *, svint64_t);
17238__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_u64)))
17239svuint64_t svldnt1_gather_index(svbool_t, uint64_t const *, svuint64_t);
17240__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_f64)))
17241svfloat64_t svldnt1_gather_index(svbool_t, float64_t const *, svuint64_t);
17242__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_s64)))
17243svint64_t svldnt1_gather_index(svbool_t, int64_t const *, svuint64_t);
17244__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_u32)))
17245svuint32_t svldnt1_gather_offset(svbool_t, uint32_t const *, svuint32_t);
17246__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_f32)))
17247svfloat32_t svldnt1_gather_offset(svbool_t, float32_t const *, svuint32_t);
17248__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_s32)))
17249svint32_t svldnt1_gather_offset(svbool_t, int32_t const *, svuint32_t);
17250__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_u64)))
17251svuint64_t svldnt1_gather_offset(svbool_t, uint64_t const *, svint64_t);
17252__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_f64)))
17253svfloat64_t svldnt1_gather_offset(svbool_t, float64_t const *, svint64_t);
17254__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_s64)))
17255svint64_t svldnt1_gather_offset(svbool_t, int64_t const *, svint64_t);
17256__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_u64)))
17257svuint64_t svldnt1_gather_offset(svbool_t, uint64_t const *, svuint64_t);
17258__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_f64)))
17259svfloat64_t svldnt1_gather_offset(svbool_t, float64_t const *, svuint64_t);
17260__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_s64)))
17261svint64_t svldnt1_gather_offset(svbool_t, int64_t const *, svuint64_t);
17262__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_u32)))
17263svuint32_t svldnt1sb_gather_offset_u32(svbool_t, svuint32_t, int64_t);
17264__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_u64)))
17265svuint64_t svldnt1sb_gather_offset_u64(svbool_t, svuint64_t, int64_t);
17266__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_s32)))
17267svint32_t svldnt1sb_gather_offset_s32(svbool_t, svuint32_t, int64_t);
17268__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_s64)))
17269svint64_t svldnt1sb_gather_offset_s64(svbool_t, svuint64_t, int64_t);
17270__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_u32)))
17271svuint32_t svldnt1sb_gather_u32(svbool_t, svuint32_t);
17272__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_u64)))
17273svuint64_t svldnt1sb_gather_u64(svbool_t, svuint64_t);
17274__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_s32)))
17275svint32_t svldnt1sb_gather_s32(svbool_t, svuint32_t);
17276__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_s64)))
17277svint64_t svldnt1sb_gather_s64(svbool_t, svuint64_t);
17278__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_u32)))
17279svuint32_t svldnt1sb_gather_offset_u32(svbool_t, int8_t const *, svuint32_t);
17280__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_s32)))
17281svint32_t svldnt1sb_gather_offset_s32(svbool_t, int8_t const *, svuint32_t);
17282__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_u64)))
17283svuint64_t svldnt1sb_gather_offset_u64(svbool_t, int8_t const *, svint64_t);
17284__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_s64)))
17285svint64_t svldnt1sb_gather_offset_s64(svbool_t, int8_t const *, svint64_t);
17286__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_u64)))
17287svuint64_t svldnt1sb_gather_offset_u64(svbool_t, int8_t const *, svuint64_t);
17288__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_s64)))
17289svint64_t svldnt1sb_gather_offset_s64(svbool_t, int8_t const *, svuint64_t);
17290__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_u32)))
17291svuint32_t svldnt1sh_gather_index_u32(svbool_t, svuint32_t, int64_t);
17292__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_u64)))
17293svuint64_t svldnt1sh_gather_index_u64(svbool_t, svuint64_t, int64_t);
17294__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_s32)))
17295svint32_t svldnt1sh_gather_index_s32(svbool_t, svuint32_t, int64_t);
17296__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_s64)))
17297svint64_t svldnt1sh_gather_index_s64(svbool_t, svuint64_t, int64_t);
17298__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_u32)))
17299svuint32_t svldnt1sh_gather_offset_u32(svbool_t, svuint32_t, int64_t);
17300__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_u64)))
17301svuint64_t svldnt1sh_gather_offset_u64(svbool_t, svuint64_t, int64_t);
17302__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_s32)))
17303svint32_t svldnt1sh_gather_offset_s32(svbool_t, svuint32_t, int64_t);
17304__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_s64)))
17305svint64_t svldnt1sh_gather_offset_s64(svbool_t, svuint64_t, int64_t);
17306__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_u32)))
17307svuint32_t svldnt1sh_gather_u32(svbool_t, svuint32_t);
17308__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_u64)))
17309svuint64_t svldnt1sh_gather_u64(svbool_t, svuint64_t);
17310__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_s32)))
17311svint32_t svldnt1sh_gather_s32(svbool_t, svuint32_t);
17312__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_s64)))
17313svint64_t svldnt1sh_gather_s64(svbool_t, svuint64_t);
17314__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_u64)))
17315svuint64_t svldnt1sh_gather_index_u64(svbool_t, int16_t const *, svint64_t);
17316__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_s64)))
17317svint64_t svldnt1sh_gather_index_s64(svbool_t, int16_t const *, svint64_t);
17318__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_u64)))
17319svuint64_t svldnt1sh_gather_index_u64(svbool_t, int16_t const *, svuint64_t);
17320__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_s64)))
17321svint64_t svldnt1sh_gather_index_s64(svbool_t, int16_t const *, svuint64_t);
17322__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_u32)))
17323svuint32_t svldnt1sh_gather_offset_u32(svbool_t, int16_t const *, svuint32_t);
17324__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_s32)))
17325svint32_t svldnt1sh_gather_offset_s32(svbool_t, int16_t const *, svuint32_t);
17326__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_u64)))
17327svuint64_t svldnt1sh_gather_offset_u64(svbool_t, int16_t const *, svint64_t);
17328__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_s64)))
17329svint64_t svldnt1sh_gather_offset_s64(svbool_t, int16_t const *, svint64_t);
17330__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_u64)))
17331svuint64_t svldnt1sh_gather_offset_u64(svbool_t, int16_t const *, svuint64_t);
17332__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_s64)))
17333svint64_t svldnt1sh_gather_offset_s64(svbool_t, int16_t const *, svuint64_t);
17334__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_u64)))
17335svuint64_t svldnt1sw_gather_index_u64(svbool_t, svuint64_t, int64_t);
17336__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_s64)))
17337svint64_t svldnt1sw_gather_index_s64(svbool_t, svuint64_t, int64_t);
17338__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_u64)))
17339svuint64_t svldnt1sw_gather_offset_u64(svbool_t, svuint64_t, int64_t);
17340__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_s64)))
17341svint64_t svldnt1sw_gather_offset_s64(svbool_t, svuint64_t, int64_t);
17342__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_u64)))
17343svuint64_t svldnt1sw_gather_u64(svbool_t, svuint64_t);
17344__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_s64)))
17345svint64_t svldnt1sw_gather_s64(svbool_t, svuint64_t);
17346__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_u64)))
17347svuint64_t svldnt1sw_gather_index_u64(svbool_t, int32_t const *, svint64_t);
17348__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_s64)))
17349svint64_t svldnt1sw_gather_index_s64(svbool_t, int32_t const *, svint64_t);
17350__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_u64)))
17351svuint64_t svldnt1sw_gather_index_u64(svbool_t, int32_t const *, svuint64_t);
17352__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_s64)))
17353svint64_t svldnt1sw_gather_index_s64(svbool_t, int32_t const *, svuint64_t);
17354__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_u64)))
17355svuint64_t svldnt1sw_gather_offset_u64(svbool_t, int32_t const *, svint64_t);
17356__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_s64)))
17357svint64_t svldnt1sw_gather_offset_s64(svbool_t, int32_t const *, svint64_t);
17358__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_u64)))
17359svuint64_t svldnt1sw_gather_offset_u64(svbool_t, int32_t const *, svuint64_t);
17360__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_s64)))
17361svint64_t svldnt1sw_gather_offset_s64(svbool_t, int32_t const *, svuint64_t);
17362__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_u32)))
17363svuint32_t svldnt1ub_gather_offset_u32(svbool_t, svuint32_t, int64_t);
17364__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_u64)))
17365svuint64_t svldnt1ub_gather_offset_u64(svbool_t, svuint64_t, int64_t);
17366__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_s32)))
17367svint32_t svldnt1ub_gather_offset_s32(svbool_t, svuint32_t, int64_t);
17368__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_s64)))
17369svint64_t svldnt1ub_gather_offset_s64(svbool_t, svuint64_t, int64_t);
17370__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_u32)))
17371svuint32_t svldnt1ub_gather_u32(svbool_t, svuint32_t);
17372__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_u64)))
17373svuint64_t svldnt1ub_gather_u64(svbool_t, svuint64_t);
17374__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_s32)))
17375svint32_t svldnt1ub_gather_s32(svbool_t, svuint32_t);
17376__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_s64)))
17377svint64_t svldnt1ub_gather_s64(svbool_t, svuint64_t);
17378__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_u32)))
17379svuint32_t svldnt1ub_gather_offset_u32(svbool_t, uint8_t const *, svuint32_t);
17380__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_s32)))
17381svint32_t svldnt1ub_gather_offset_s32(svbool_t, uint8_t const *, svuint32_t);
17382__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_u64)))
17383svuint64_t svldnt1ub_gather_offset_u64(svbool_t, uint8_t const *, svint64_t);
17384__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_s64)))
17385svint64_t svldnt1ub_gather_offset_s64(svbool_t, uint8_t const *, svint64_t);
17386__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_u64)))
17387svuint64_t svldnt1ub_gather_offset_u64(svbool_t, uint8_t const *, svuint64_t);
17388__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_s64)))
17389svint64_t svldnt1ub_gather_offset_s64(svbool_t, uint8_t const *, svuint64_t);
17390__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_u32)))
17391svuint32_t svldnt1uh_gather_index_u32(svbool_t, svuint32_t, int64_t);
17392__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_u64)))
17393svuint64_t svldnt1uh_gather_index_u64(svbool_t, svuint64_t, int64_t);
17394__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_s32)))
17395svint32_t svldnt1uh_gather_index_s32(svbool_t, svuint32_t, int64_t);
17396__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_s64)))
17397svint64_t svldnt1uh_gather_index_s64(svbool_t, svuint64_t, int64_t);
17398__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_u32)))
17399svuint32_t svldnt1uh_gather_offset_u32(svbool_t, svuint32_t, int64_t);
17400__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_u64)))
17401svuint64_t svldnt1uh_gather_offset_u64(svbool_t, svuint64_t, int64_t);
17402__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_s32)))
17403svint32_t svldnt1uh_gather_offset_s32(svbool_t, svuint32_t, int64_t);
17404__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_s64)))
17405svint64_t svldnt1uh_gather_offset_s64(svbool_t, svuint64_t, int64_t);
17406__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_u32)))
17407svuint32_t svldnt1uh_gather_u32(svbool_t, svuint32_t);
17408__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_u64)))
17409svuint64_t svldnt1uh_gather_u64(svbool_t, svuint64_t);
17410__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_s32)))
17411svint32_t svldnt1uh_gather_s32(svbool_t, svuint32_t);
17412__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_s64)))
17413svint64_t svldnt1uh_gather_s64(svbool_t, svuint64_t);
17414__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_u64)))
17415svuint64_t svldnt1uh_gather_index_u64(svbool_t, uint16_t const *, svint64_t);
17416__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_s64)))
17417svint64_t svldnt1uh_gather_index_s64(svbool_t, uint16_t const *, svint64_t);
17418__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_u64)))
17419svuint64_t svldnt1uh_gather_index_u64(svbool_t, uint16_t const *, svuint64_t);
17420__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_s64)))
17421svint64_t svldnt1uh_gather_index_s64(svbool_t, uint16_t const *, svuint64_t);
17422__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_u32)))
17423svuint32_t svldnt1uh_gather_offset_u32(svbool_t, uint16_t const *, svuint32_t);
17424__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_s32)))
17425svint32_t svldnt1uh_gather_offset_s32(svbool_t, uint16_t const *, svuint32_t);
17426__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_u64)))
17427svuint64_t svldnt1uh_gather_offset_u64(svbool_t, uint16_t const *, svint64_t);
17428__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_s64)))
17429svint64_t svldnt1uh_gather_offset_s64(svbool_t, uint16_t const *, svint64_t);
17430__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_u64)))
17431svuint64_t svldnt1uh_gather_offset_u64(svbool_t, uint16_t const *, svuint64_t);
17432__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_s64)))
17433svint64_t svldnt1uh_gather_offset_s64(svbool_t, uint16_t const *, svuint64_t);
17434__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_u64)))
17435svuint64_t svldnt1uw_gather_index_u64(svbool_t, svuint64_t, int64_t);
17436__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_s64)))
17437svint64_t svldnt1uw_gather_index_s64(svbool_t, svuint64_t, int64_t);
17438__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_u64)))
17439svuint64_t svldnt1uw_gather_offset_u64(svbool_t, svuint64_t, int64_t);
17440__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_s64)))
17441svint64_t svldnt1uw_gather_offset_s64(svbool_t, svuint64_t, int64_t);
17442__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_u64)))
17443svuint64_t svldnt1uw_gather_u64(svbool_t, svuint64_t);
17444__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_s64)))
17445svint64_t svldnt1uw_gather_s64(svbool_t, svuint64_t);
17446__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_u64)))
17447svuint64_t svldnt1uw_gather_index_u64(svbool_t, uint32_t const *, svint64_t);
17448__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_s64)))
17449svint64_t svldnt1uw_gather_index_s64(svbool_t, uint32_t const *, svint64_t);
17450__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_u64)))
17451svuint64_t svldnt1uw_gather_index_u64(svbool_t, uint32_t const *, svuint64_t);
17452__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_s64)))
17453svint64_t svldnt1uw_gather_index_s64(svbool_t, uint32_t const *, svuint64_t);
17454__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_u64)))
17455svuint64_t svldnt1uw_gather_offset_u64(svbool_t, uint32_t const *, svint64_t);
17456__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_s64)))
17457svint64_t svldnt1uw_gather_offset_s64(svbool_t, uint32_t const *, svint64_t);
17458__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_u64)))
17459svuint64_t svldnt1uw_gather_offset_u64(svbool_t, uint32_t const *, svuint64_t);
17460__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_s64)))
17461svint64_t svldnt1uw_gather_offset_s64(svbool_t, uint32_t const *, svuint64_t);
17462__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u8)))
17463svbool_t svmatch(svbool_t, svuint8_t, svuint8_t);
17464__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u16)))
17465svbool_t svmatch(svbool_t, svuint16_t, svuint16_t);
17466__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s8)))
17467svbool_t svmatch(svbool_t, svint8_t, svint8_t);
17468__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s16)))
17469svbool_t svmatch(svbool_t, svint16_t, svint16_t);
17470__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u8)))
17471svbool_t svnmatch(svbool_t, svuint8_t, svuint8_t);
17472__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u16)))
17473svbool_t svnmatch(svbool_t, svuint16_t, svuint16_t);
17474__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s8)))
17475svbool_t svnmatch(svbool_t, svint8_t, svint8_t);
17476__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s16)))
17477svbool_t svnmatch(svbool_t, svint16_t, svint16_t);
17478__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_u32)))
17479void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svuint32_t);
17480__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_u64)))
17481void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t);
17482__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_f64)))
17483void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svfloat64_t);
17484__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_f32)))
17485void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svfloat32_t);
17486__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_s32)))
17487void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svint32_t);
17488__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_s64)))
17489void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t);
17490__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_u32)))
17491void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t);
17492__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_u64)))
17493void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
17494__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_f64)))
17495void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat64_t);
17496__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_f32)))
17497void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svfloat32_t);
17498__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_s32)))
17499void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t);
17500__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_s64)))
17501void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
17502__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_u32)))
17503void svstnt1_scatter(svbool_t, svuint32_t, svuint32_t);
17504__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_u64)))
17505void svstnt1_scatter(svbool_t, svuint64_t, svuint64_t);
17506__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_f64)))
17507void svstnt1_scatter(svbool_t, svuint64_t, svfloat64_t);
17508__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_f32)))
17509void svstnt1_scatter(svbool_t, svuint32_t, svfloat32_t);
17510__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_s32)))
17511void svstnt1_scatter(svbool_t, svuint32_t, svint32_t);
17512__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_s64)))
17513void svstnt1_scatter(svbool_t, svuint64_t, svint64_t);
17514__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_u64)))
17515void svstnt1_scatter_index(svbool_t, uint64_t *, svint64_t, svuint64_t);
17516__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_f64)))
17517void svstnt1_scatter_index(svbool_t, float64_t *, svint64_t, svfloat64_t);
17518__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_s64)))
17519void svstnt1_scatter_index(svbool_t, int64_t *, svint64_t, svint64_t);
17520__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_u64)))
17521void svstnt1_scatter_index(svbool_t, uint64_t *, svuint64_t, svuint64_t);
17522__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_f64)))
17523void svstnt1_scatter_index(svbool_t, float64_t *, svuint64_t, svfloat64_t);
17524__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_s64)))
17525void svstnt1_scatter_index(svbool_t, int64_t *, svuint64_t, svint64_t);
17526__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_u32)))
17527void svstnt1_scatter_offset(svbool_t, uint32_t *, svuint32_t, svuint32_t);
17528__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_f32)))
17529void svstnt1_scatter_offset(svbool_t, float32_t *, svuint32_t, svfloat32_t);
17530__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_s32)))
17531void svstnt1_scatter_offset(svbool_t, int32_t *, svuint32_t, svint32_t);
17532__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_u64)))
17533void svstnt1_scatter_offset(svbool_t, uint64_t *, svint64_t, svuint64_t);
17534__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_f64)))
17535void svstnt1_scatter_offset(svbool_t, float64_t *, svint64_t, svfloat64_t);
17536__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_s64)))
17537void svstnt1_scatter_offset(svbool_t, int64_t *, svint64_t, svint64_t);
17538__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_u64)))
17539void svstnt1_scatter_offset(svbool_t, uint64_t *, svuint64_t, svuint64_t);
17540__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_f64)))
17541void svstnt1_scatter_offset(svbool_t, float64_t *, svuint64_t, svfloat64_t);
17542__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_s64)))
17543void svstnt1_scatter_offset(svbool_t, int64_t *, svuint64_t, svint64_t);
17544__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_u32)))
17545void svstnt1b_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t);
17546__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_u64)))
17547void svstnt1b_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
17548__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_s32)))
17549void svstnt1b_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t);
17550__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_s64)))
17551void svstnt1b_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
17552__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_u32)))
17553void svstnt1b_scatter(svbool_t, svuint32_t, svuint32_t);
17554__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_u64)))
17555void svstnt1b_scatter(svbool_t, svuint64_t, svuint64_t);
17556__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_s32)))
17557void svstnt1b_scatter(svbool_t, svuint32_t, svint32_t);
17558__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_s64)))
17559void svstnt1b_scatter(svbool_t, svuint64_t, svint64_t);
17560__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_s32)))
17561void svstnt1b_scatter_offset(svbool_t, int8_t *, svuint32_t, svint32_t);
17562__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_u32)))
17563void svstnt1b_scatter_offset(svbool_t, uint8_t *, svuint32_t, svuint32_t);
17564__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_s64)))
17565void svstnt1b_scatter_offset(svbool_t, int8_t *, svint64_t, svint64_t);
17566__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_u64)))
17567void svstnt1b_scatter_offset(svbool_t, uint8_t *, svint64_t, svuint64_t);
17568__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_s64)))
17569void svstnt1b_scatter_offset(svbool_t, int8_t *, svuint64_t, svint64_t);
17570__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_u64)))
17571void svstnt1b_scatter_offset(svbool_t, uint8_t *, svuint64_t, svuint64_t);
17572__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_u32)))
17573void svstnt1h_scatter_index(svbool_t, svuint32_t, int64_t, svuint32_t);
17574__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_u64)))
17575void svstnt1h_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t);
17576__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_s32)))
17577void svstnt1h_scatter_index(svbool_t, svuint32_t, int64_t, svint32_t);
17578__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_s64)))
17579void svstnt1h_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t);
17580__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_u32)))
17581void svstnt1h_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t);
17582__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_u64)))
17583void svstnt1h_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
17584__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_s32)))
17585void svstnt1h_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t);
17586__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_s64)))
17587void svstnt1h_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
17588__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_u32)))
17589void svstnt1h_scatter(svbool_t, svuint32_t, svuint32_t);
17590__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_u64)))
17591void svstnt1h_scatter(svbool_t, svuint64_t, svuint64_t);
17592__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_s32)))
17593void svstnt1h_scatter(svbool_t, svuint32_t, svint32_t);
17594__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_s64)))
17595void svstnt1h_scatter(svbool_t, svuint64_t, svint64_t);
17596__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_s64)))
17597void svstnt1h_scatter_index(svbool_t, int16_t *, svint64_t, svint64_t);
17598__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_u64)))
17599void svstnt1h_scatter_index(svbool_t, uint16_t *, svint64_t, svuint64_t);
17600__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_s64)))
17601void svstnt1h_scatter_index(svbool_t, int16_t *, svuint64_t, svint64_t);
17602__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_u64)))
17603void svstnt1h_scatter_index(svbool_t, uint16_t *, svuint64_t, svuint64_t);
17604__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_s32)))
17605void svstnt1h_scatter_offset(svbool_t, int16_t *, svuint32_t, svint32_t);
17606__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_u32)))
17607void svstnt1h_scatter_offset(svbool_t, uint16_t *, svuint32_t, svuint32_t);
17608__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_s64)))
17609void svstnt1h_scatter_offset(svbool_t, int16_t *, svint64_t, svint64_t);
17610__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_u64)))
17611void svstnt1h_scatter_offset(svbool_t, uint16_t *, svint64_t, svuint64_t);
17612__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_s64)))
17613void svstnt1h_scatter_offset(svbool_t, int16_t *, svuint64_t, svint64_t);
17614__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_u64)))
17615void svstnt1h_scatter_offset(svbool_t, uint16_t *, svuint64_t, svuint64_t);
17616__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_u64)))
17617void svstnt1w_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t);
17618__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_s64)))
17619void svstnt1w_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t);
17620__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_u64)))
17621void svstnt1w_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
17622__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_s64)))
17623void svstnt1w_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
17624__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_u64)))
17625void svstnt1w_scatter(svbool_t, svuint64_t, svuint64_t);
17626__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_s64)))
17627void svstnt1w_scatter(svbool_t, svuint64_t, svint64_t);
17628__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_s64)))
17629void svstnt1w_scatter_index(svbool_t, int32_t *, svint64_t, svint64_t);
17630__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_u64)))
17631void svstnt1w_scatter_index(svbool_t, uint32_t *, svint64_t, svuint64_t);
17632__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_s64)))
17633void svstnt1w_scatter_index(svbool_t, int32_t *, svuint64_t, svint64_t);
17634__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_u64)))
17635void svstnt1w_scatter_index(svbool_t, uint32_t *, svuint64_t, svuint64_t);
17636__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_s64)))
17637void svstnt1w_scatter_offset(svbool_t, int32_t *, svint64_t, svint64_t);
17638__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_u64)))
17639void svstnt1w_scatter_offset(svbool_t, uint32_t *, svint64_t, svuint64_t);
17640__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_s64)))
17641void svstnt1w_scatter_offset(svbool_t, int32_t *, svuint64_t, svint64_t);
17642__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_u64)))
17643void svstnt1w_scatter_offset(svbool_t, uint32_t *, svuint64_t, svuint64_t);
17644__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f16_mf8_fpm)))
17645svfloat16_t svmmla_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
17646__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f16_mf8_fpm)))
17647svfloat16_t svmmla_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
17648__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32_mf8_fpm)))
17649svfloat32_t svmmla_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17650__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32_mf8_fpm)))
17651svfloat32_t svmmla_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17652__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f16_mf8_fpm)))
17653svfloat16_t svdot_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
17654__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f16_mf8_fpm)))
17655svfloat16_t svdot_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
17656__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f16_mf8_fpm)))
17657svfloat16_t svdot_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17658__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f16_mf8_fpm)))
17659svfloat16_t svdot_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
17660__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f16_mf8_fpm)))
17661svfloat16_t svdot_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
17662__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f16_mf8_fpm)))
17663svfloat16_t svdot_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17664__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f32_mf8_fpm)))
17665svfloat32_t svdot_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17666__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f32_mf8_fpm)))
17667svfloat32_t svdot_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17668__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f32_mf8_fpm)))
17669svfloat32_t svdot_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17670__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f32_mf8_fpm)))
17671svfloat32_t svdot_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17672__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f32_mf8_fpm)))
17673svfloat32_t svdot_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17674__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f32_mf8_fpm)))
17675svfloat32_t svdot_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17676__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_f16_mf8_fpm)))
17677svfloat16_t svmlalb_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
17678__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_n_f16_mf8_fpm)))
17679svfloat16_t svmlalb_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
17680__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_lane_f16_mf8_fpm)))
17681svfloat16_t svmlalb_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17682__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_f32_mf8_fpm)))
17683svfloat32_t svmlallbb_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17684__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_n_f32_mf8_fpm)))
17685svfloat32_t svmlallbb_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17686__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_lane_f32_mf8_fpm)))
17687svfloat32_t svmlallbb_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17688__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_f32_mf8_fpm)))
17689svfloat32_t svmlallbt_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17690__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_n_f32_mf8_fpm)))
17691svfloat32_t svmlallbt_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17692__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_lane_f32_mf8_fpm)))
17693svfloat32_t svmlallbt_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17694__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_f32_mf8_fpm)))
17695svfloat32_t svmlalltb_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17696__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_n_f32_mf8_fpm)))
17697svfloat32_t svmlalltb_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17698__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_lane_f32_mf8_fpm)))
17699svfloat32_t svmlalltb_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17700__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_f32_mf8_fpm)))
17701svfloat32_t svmlalltt_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17702__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_n_f32_mf8_fpm)))
17703svfloat32_t svmlalltt_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17704__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_lane_f32_mf8_fpm)))
17705svfloat32_t svmlalltt_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17706__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_f16_mf8_fpm)))
17707svfloat16_t svmlalt_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
17708__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_n_f16_mf8_fpm)))
17709svfloat16_t svmlalt_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
17710__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_lane_f16_mf8_fpm)))
17711svfloat16_t svmlalt_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17712__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_f16_mf8_fpm)))
17713svfloat16_t svmlalb_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
17714__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_n_f16_mf8_fpm)))
17715svfloat16_t svmlalb_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
17716__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_lane_f16_mf8_fpm)))
17717svfloat16_t svmlalb_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17718__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_f32_mf8_fpm)))
17719svfloat32_t svmlallbb_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17720__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_n_f32_mf8_fpm)))
17721svfloat32_t svmlallbb_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17722__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_lane_f32_mf8_fpm)))
17723svfloat32_t svmlallbb_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17724__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_f32_mf8_fpm)))
17725svfloat32_t svmlallbt_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17726__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_n_f32_mf8_fpm)))
17727svfloat32_t svmlallbt_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17728__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_lane_f32_mf8_fpm)))
17729svfloat32_t svmlallbt_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17730__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_f32_mf8_fpm)))
17731svfloat32_t svmlalltb_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17732__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_n_f32_mf8_fpm)))
17733svfloat32_t svmlalltb_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17734__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_lane_f32_mf8_fpm)))
17735svfloat32_t svmlalltb_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17736__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_f32_mf8_fpm)))
17737svfloat32_t svmlalltt_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t);
17738__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_n_f32_mf8_fpm)))
17739svfloat32_t svmlalltt_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t);
17740__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_lane_f32_mf8_fpm)))
17741svfloat32_t svmlalltt_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17742__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_f16_mf8_fpm)))
17743svfloat16_t svmlalt_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t);
17744__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_n_f16_mf8_fpm)))
17745svfloat16_t svmlalt_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t);
17746__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_lane_f16_mf8_fpm)))
17747svfloat16_t svmlalt_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t);
17748__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u32)))
17749svuint32_t svld1q_gather_u64base_index_u32(svbool_t, svuint64_t, int64_t);
17750__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u64)))
17751svuint64_t svld1q_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t);
17752__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u16)))
17753svuint16_t svld1q_gather_u64base_index_u16(svbool_t, svuint64_t, int64_t);
17754__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_bf16)))
17755svbfloat16_t svld1q_gather_u64base_index_bf16(svbool_t, svuint64_t, int64_t);
17756__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f64)))
17757svfloat64_t svld1q_gather_u64base_index_f64(svbool_t, svuint64_t, int64_t);
17758__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f32)))
17759svfloat32_t svld1q_gather_u64base_index_f32(svbool_t, svuint64_t, int64_t);
17760__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f16)))
17761svfloat16_t svld1q_gather_u64base_index_f16(svbool_t, svuint64_t, int64_t);
17762__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s32)))
17763svint32_t svld1q_gather_u64base_index_s32(svbool_t, svuint64_t, int64_t);
17764__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s64)))
17765svint64_t svld1q_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t);
17766__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s16)))
17767svint16_t svld1q_gather_u64base_index_s16(svbool_t, svuint64_t, int64_t);
17768__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u8)))
17769svuint8_t svld1q_gather_u64base_offset_u8(svbool_t, svuint64_t, int64_t);
17770__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u32)))
17771svuint32_t svld1q_gather_u64base_offset_u32(svbool_t, svuint64_t, int64_t);
17772__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u64)))
17773svuint64_t svld1q_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t);
17774__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u16)))
17775svuint16_t svld1q_gather_u64base_offset_u16(svbool_t, svuint64_t, int64_t);
17776__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_bf16)))
17777svbfloat16_t svld1q_gather_u64base_offset_bf16(svbool_t, svuint64_t, int64_t);
17778__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s8)))
17779svint8_t svld1q_gather_u64base_offset_s8(svbool_t, svuint64_t, int64_t);
17780__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f64)))
17781svfloat64_t svld1q_gather_u64base_offset_f64(svbool_t, svuint64_t, int64_t);
17782__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f32)))
17783svfloat32_t svld1q_gather_u64base_offset_f32(svbool_t, svuint64_t, int64_t);
17784__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f16)))
17785svfloat16_t svld1q_gather_u64base_offset_f16(svbool_t, svuint64_t, int64_t);
17786__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s32)))
17787svint32_t svld1q_gather_u64base_offset_s32(svbool_t, svuint64_t, int64_t);
17788__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s64)))
17789svint64_t svld1q_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t);
17790__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_mf8)))
17791svmfloat8_t svld1q_gather_u64base_offset_mf8(svbool_t, svuint64_t, int64_t);
17792__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s16)))
17793svint16_t svld1q_gather_u64base_offset_s16(svbool_t, svuint64_t, int64_t);
17794__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u8)))
17795svuint8_t svld1q_gather_u64base_u8(svbool_t, svuint64_t);
17796__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u32)))
17797svuint32_t svld1q_gather_u64base_u32(svbool_t, svuint64_t);
17798__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u64)))
17799svuint64_t svld1q_gather_u64base_u64(svbool_t, svuint64_t);
17800__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u16)))
17801svuint16_t svld1q_gather_u64base_u16(svbool_t, svuint64_t);
17802__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_bf16)))
17803svbfloat16_t svld1q_gather_u64base_bf16(svbool_t, svuint64_t);
17804__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s8)))
17805svint8_t svld1q_gather_u64base_s8(svbool_t, svuint64_t);
17806__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f64)))
17807svfloat64_t svld1q_gather_u64base_f64(svbool_t, svuint64_t);
17808__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f32)))
17809svfloat32_t svld1q_gather_u64base_f32(svbool_t, svuint64_t);
17810__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f16)))
17811svfloat16_t svld1q_gather_u64base_f16(svbool_t, svuint64_t);
17812__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s32)))
17813svint32_t svld1q_gather_u64base_s32(svbool_t, svuint64_t);
17814__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s64)))
17815svint64_t svld1q_gather_u64base_s64(svbool_t, svuint64_t);
17816__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_mf8)))
17817svmfloat8_t svld1q_gather_u64base_mf8(svbool_t, svuint64_t);
17818__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s16)))
17819svint16_t svld1q_gather_u64base_s16(svbool_t, svuint64_t);
17820__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u32)))
17821svuint32_t svld1q_gather_u64index_u32(svbool_t, uint32_t const *, svuint64_t);
17822__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u64)))
17823svuint64_t svld1q_gather_u64index_u64(svbool_t, uint64_t const *, svuint64_t);
17824__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u16)))
17825svuint16_t svld1q_gather_u64index_u16(svbool_t, uint16_t const *, svuint64_t);
17826__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_bf16)))
17827svbfloat16_t svld1q_gather_u64index_bf16(svbool_t, bfloat16_t const *, svuint64_t);
17828__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f64)))
17829svfloat64_t svld1q_gather_u64index_f64(svbool_t, float64_t const *, svuint64_t);
17830__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f32)))
17831svfloat32_t svld1q_gather_u64index_f32(svbool_t, float32_t const *, svuint64_t);
17832__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f16)))
17833svfloat16_t svld1q_gather_u64index_f16(svbool_t, float16_t const *, svuint64_t);
17834__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s32)))
17835svint32_t svld1q_gather_u64index_s32(svbool_t, int32_t const *, svuint64_t);
17836__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s64)))
17837svint64_t svld1q_gather_u64index_s64(svbool_t, int64_t const *, svuint64_t);
17838__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s16)))
17839svint16_t svld1q_gather_u64index_s16(svbool_t, int16_t const *, svuint64_t);
17840__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u8)))
17841svuint8_t svld1q_gather_u64offset_u8(svbool_t, uint8_t const *, svuint64_t);
17842__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u32)))
17843svuint32_t svld1q_gather_u64offset_u32(svbool_t, uint32_t const *, svuint64_t);
17844__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u64)))
17845svuint64_t svld1q_gather_u64offset_u64(svbool_t, uint64_t const *, svuint64_t);
17846__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u16)))
17847svuint16_t svld1q_gather_u64offset_u16(svbool_t, uint16_t const *, svuint64_t);
17848__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_bf16)))
17849svbfloat16_t svld1q_gather_u64offset_bf16(svbool_t, bfloat16_t const *, svuint64_t);
17850__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s8)))
17851svint8_t svld1q_gather_u64offset_s8(svbool_t, int8_t const *, svuint64_t);
17852__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f64)))
17853svfloat64_t svld1q_gather_u64offset_f64(svbool_t, float64_t const *, svuint64_t);
17854__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f32)))
17855svfloat32_t svld1q_gather_u64offset_f32(svbool_t, float32_t const *, svuint64_t);
17856__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f16)))
17857svfloat16_t svld1q_gather_u64offset_f16(svbool_t, float16_t const *, svuint64_t);
17858__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s32)))
17859svint32_t svld1q_gather_u64offset_s32(svbool_t, int32_t const *, svuint64_t);
17860__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s64)))
17861svint64_t svld1q_gather_u64offset_s64(svbool_t, int64_t const *, svuint64_t);
17862__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_mf8)))
17863svmfloat8_t svld1q_gather_u64offset_mf8(svbool_t, mfloat8_t const *, svuint64_t);
17864__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s16)))
17865svint16_t svld1q_gather_u64offset_s16(svbool_t, int16_t const *, svuint64_t);
17866__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_u64)))
17867svuint64_t svld1udq_u64(svbool_t, uint64_t const *);
17868__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_f64)))
17869svfloat64_t svld1udq_f64(svbool_t, float64_t const *);
17870__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_s64)))
17871svint64_t svld1udq_s64(svbool_t, int64_t const *);
17872__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_u64)))
17873svuint64_t svld1udq_vnum_u64(svbool_t, uint64_t const *, int64_t);
17874__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_f64)))
17875svfloat64_t svld1udq_vnum_f64(svbool_t, float64_t const *, int64_t);
17876__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_s64)))
17877svint64_t svld1udq_vnum_s64(svbool_t, int64_t const *, int64_t);
17878__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_u32)))
17879svuint32_t svld1uwq_u32(svbool_t, uint32_t const *);
17880__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_f32)))
17881svfloat32_t svld1uwq_f32(svbool_t, float32_t const *);
17882__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_s32)))
17883svint32_t svld1uwq_s32(svbool_t, int32_t const *);
17884__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_u32)))
17885svuint32_t svld1uwq_vnum_u32(svbool_t, uint32_t const *, int64_t);
17886__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_f32)))
17887svfloat32_t svld1uwq_vnum_f32(svbool_t, float32_t const *, int64_t);
17888__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_s32)))
17889svint32_t svld1uwq_vnum_s32(svbool_t, int32_t const *, int64_t);
17890__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_u64)))
17891void svst1dq_u64(svbool_t, uint64_t *, svuint64_t);
17892__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_f64)))
17893void svst1dq_f64(svbool_t, float64_t *, svfloat64_t);
17894__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_s64)))
17895void svst1dq_s64(svbool_t, int64_t *, svint64_t);
17896__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_u64)))
17897void svst1dq_vnum_u64(svbool_t, uint64_t *, int64_t, svuint64_t);
17898__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_f64)))
17899void svst1dq_vnum_f64(svbool_t, float64_t *, int64_t, svfloat64_t);
17900__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_s64)))
17901void svst1dq_vnum_s64(svbool_t, int64_t *, int64_t, svint64_t);
17902__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u8)))
17903void svst1q_scatter_u64base_u8(svbool_t, svuint64_t, svuint8_t);
17904__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u32)))
17905void svst1q_scatter_u64base_u32(svbool_t, svuint64_t, svuint32_t);
17906__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u64)))
17907void svst1q_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t);
17908__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u16)))
17909void svst1q_scatter_u64base_u16(svbool_t, svuint64_t, svuint16_t);
17910__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_bf16)))
17911void svst1q_scatter_u64base_bf16(svbool_t, svuint64_t, svbfloat16_t);
17912__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s8)))
17913void svst1q_scatter_u64base_s8(svbool_t, svuint64_t, svint8_t);
17914__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f64)))
17915void svst1q_scatter_u64base_f64(svbool_t, svuint64_t, svfloat64_t);
17916__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f32)))
17917void svst1q_scatter_u64base_f32(svbool_t, svuint64_t, svfloat32_t);
17918__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f16)))
17919void svst1q_scatter_u64base_f16(svbool_t, svuint64_t, svfloat16_t);
17920__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s32)))
17921void svst1q_scatter_u64base_s32(svbool_t, svuint64_t, svint32_t);
17922__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s64)))
17923void svst1q_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t);
17924__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_mf8)))
17925void svst1q_scatter_u64base_mf8(svbool_t, svuint64_t, svmfloat8_t);
17926__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s16)))
17927void svst1q_scatter_u64base_s16(svbool_t, svuint64_t, svint16_t);
17928__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u32)))
17929void svst1q_scatter_u64base_index_u32(svbool_t, svuint64_t, int64_t, svuint32_t);
17930__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u64)))
17931void svst1q_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17932__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u16)))
17933void svst1q_scatter_u64base_index_u16(svbool_t, svuint64_t, int64_t, svuint16_t);
17934__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_bf16)))
17935void svst1q_scatter_u64base_index_bf16(svbool_t, svuint64_t, int64_t, svbfloat16_t);
17936__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f64)))
17937void svst1q_scatter_u64base_index_f64(svbool_t, svuint64_t, int64_t, svfloat64_t);
17938__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f32)))
17939void svst1q_scatter_u64base_index_f32(svbool_t, svuint64_t, int64_t, svfloat32_t);
17940__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f16)))
17941void svst1q_scatter_u64base_index_f16(svbool_t, svuint64_t, int64_t, svfloat16_t);
17942__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s32)))
17943void svst1q_scatter_u64base_index_s32(svbool_t, svuint64_t, int64_t, svint32_t);
17944__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s64)))
17945void svst1q_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17946__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s16)))
17947void svst1q_scatter_u64base_index_s16(svbool_t, svuint64_t, int64_t, svint16_t);
17948__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u8)))
17949void svst1q_scatter_u64base_offset_u8(svbool_t, svuint64_t, int64_t, svuint8_t);
17950__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u32)))
17951void svst1q_scatter_u64base_offset_u32(svbool_t, svuint64_t, int64_t, svuint32_t);
17952__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u64)))
17953void svst1q_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t);
17954__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u16)))
17955void svst1q_scatter_u64base_offset_u16(svbool_t, svuint64_t, int64_t, svuint16_t);
17956__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_bf16)))
17957void svst1q_scatter_u64base_offset_bf16(svbool_t, svuint64_t, int64_t, svbfloat16_t);
17958__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s8)))
17959void svst1q_scatter_u64base_offset_s8(svbool_t, svuint64_t, int64_t, svint8_t);
17960__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f64)))
17961void svst1q_scatter_u64base_offset_f64(svbool_t, svuint64_t, int64_t, svfloat64_t);
17962__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f32)))
17963void svst1q_scatter_u64base_offset_f32(svbool_t, svuint64_t, int64_t, svfloat32_t);
17964__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f16)))
17965void svst1q_scatter_u64base_offset_f16(svbool_t, svuint64_t, int64_t, svfloat16_t);
17966__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s32)))
17967void svst1q_scatter_u64base_offset_s32(svbool_t, svuint64_t, int64_t, svint32_t);
17968__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s64)))
17969void svst1q_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t);
17970__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_mf8)))
17971void svst1q_scatter_u64base_offset_mf8(svbool_t, svuint64_t, int64_t, svmfloat8_t);
17972__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s16)))
17973void svst1q_scatter_u64base_offset_s16(svbool_t, svuint64_t, int64_t, svint16_t);
17974__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u32)))
17975void svst1q_scatter_s64index_u32(svbool_t, uint32_t *, svint64_t, svuint32_t);
17976__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u64)))
17977void svst1q_scatter_s64index_u64(svbool_t, uint64_t *, svint64_t, svuint64_t);
17978__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u16)))
17979void svst1q_scatter_s64index_u16(svbool_t, uint16_t *, svint64_t, svuint16_t);
17980__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_bf16)))
17981void svst1q_scatter_s64index_bf16(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t);
17982__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f64)))
17983void svst1q_scatter_s64index_f64(svbool_t, float64_t *, svint64_t, svfloat64_t);
17984__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f32)))
17985void svst1q_scatter_s64index_f32(svbool_t, float32_t *, svint64_t, svfloat32_t);
17986__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f16)))
17987void svst1q_scatter_s64index_f16(svbool_t, float16_t *, svint64_t, svfloat16_t);
17988__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s32)))
17989void svst1q_scatter_s64index_s32(svbool_t, int32_t *, svint64_t, svint32_t);
17990__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s64)))
17991void svst1q_scatter_s64index_s64(svbool_t, int64_t *, svint64_t, svint64_t);
17992__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s16)))
17993void svst1q_scatter_s64index_s16(svbool_t, int16_t *, svint64_t, svint16_t);
17994__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u32)))
17995void svst1q_scatter_u64index_u32(svbool_t, uint32_t *, svuint64_t, svuint32_t);
17996__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u64)))
17997void svst1q_scatter_u64index_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t);
17998__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u16)))
17999void svst1q_scatter_u64index_u16(svbool_t, uint16_t *, svuint64_t, svuint16_t);
18000__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_bf16)))
18001void svst1q_scatter_u64index_bf16(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t);
18002__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f64)))
18003void svst1q_scatter_u64index_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t);
18004__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f32)))
18005void svst1q_scatter_u64index_f32(svbool_t, float32_t *, svuint64_t, svfloat32_t);
18006__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f16)))
18007void svst1q_scatter_u64index_f16(svbool_t, float16_t *, svuint64_t, svfloat16_t);
18008__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s32)))
18009void svst1q_scatter_u64index_s32(svbool_t, int32_t *, svuint64_t, svint32_t);
18010__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s64)))
18011void svst1q_scatter_u64index_s64(svbool_t, int64_t *, svuint64_t, svint64_t);
18012__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s16)))
18013void svst1q_scatter_u64index_s16(svbool_t, int16_t *, svuint64_t, svint16_t);
18014__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u8)))
18015void svst1q_scatter_s64offset_u8(svbool_t, uint8_t *, svint64_t, svuint8_t);
18016__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u32)))
18017void svst1q_scatter_s64offset_u32(svbool_t, uint32_t *, svint64_t, svuint32_t);
18018__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u64)))
18019void svst1q_scatter_s64offset_u64(svbool_t, uint64_t *, svint64_t, svuint64_t);
18020__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u16)))
18021void svst1q_scatter_s64offset_u16(svbool_t, uint16_t *, svint64_t, svuint16_t);
18022__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_bf16)))
18023void svst1q_scatter_s64offset_bf16(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t);
18024__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s8)))
18025void svst1q_scatter_s64offset_s8(svbool_t, int8_t *, svint64_t, svint8_t);
18026__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f64)))
18027void svst1q_scatter_s64offset_f64(svbool_t, float64_t *, svint64_t, svfloat64_t);
18028__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f32)))
18029void svst1q_scatter_s64offset_f32(svbool_t, float32_t *, svint64_t, svfloat32_t);
18030__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f16)))
18031void svst1q_scatter_s64offset_f16(svbool_t, float16_t *, svint64_t, svfloat16_t);
18032__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s32)))
18033void svst1q_scatter_s64offset_s32(svbool_t, int32_t *, svint64_t, svint32_t);
18034__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s64)))
18035void svst1q_scatter_s64offset_s64(svbool_t, int64_t *, svint64_t, svint64_t);
18036__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_mf8)))
18037void svst1q_scatter_s64offset_mf8(svbool_t, mfloat8_t *, svint64_t, svmfloat8_t);
18038__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s16)))
18039void svst1q_scatter_s64offset_s16(svbool_t, int16_t *, svint64_t, svint16_t);
18040__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u8)))
18041void svst1q_scatter_u64offset_u8(svbool_t, uint8_t *, svuint64_t, svuint8_t);
18042__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u32)))
18043void svst1q_scatter_u64offset_u32(svbool_t, uint32_t *, svuint64_t, svuint32_t);
18044__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u64)))
18045void svst1q_scatter_u64offset_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t);
18046__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u16)))
18047void svst1q_scatter_u64offset_u16(svbool_t, uint16_t *, svuint64_t, svuint16_t);
18048__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_bf16)))
18049void svst1q_scatter_u64offset_bf16(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t);
18050__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s8)))
18051void svst1q_scatter_u64offset_s8(svbool_t, int8_t *, svuint64_t, svint8_t);
18052__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f64)))
18053void svst1q_scatter_u64offset_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t);
18054__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f32)))
18055void svst1q_scatter_u64offset_f32(svbool_t, float32_t *, svuint64_t, svfloat32_t);
18056__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f16)))
18057void svst1q_scatter_u64offset_f16(svbool_t, float16_t *, svuint64_t, svfloat16_t);
18058__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s32)))
18059void svst1q_scatter_u64offset_s32(svbool_t, int32_t *, svuint64_t, svint32_t);
18060__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s64)))
18061void svst1q_scatter_u64offset_s64(svbool_t, int64_t *, svuint64_t, svint64_t);
18062__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_mf8)))
18063void svst1q_scatter_u64offset_mf8(svbool_t, mfloat8_t *, svuint64_t, svmfloat8_t);
18064__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s16)))
18065void svst1q_scatter_u64offset_s16(svbool_t, int16_t *, svuint64_t, svint16_t);
18066__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_u32)))
18067void svst1wq_u32(svbool_t, uint32_t *, svuint32_t);
18068__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_f32)))
18069void svst1wq_f32(svbool_t, float32_t *, svfloat32_t);
18070__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_s32)))
18071void svst1wq_s32(svbool_t, int32_t *, svint32_t);
18072__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_u32)))
18073void svst1wq_vnum_u32(svbool_t, uint32_t *, int64_t, svuint32_t);
18074__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_f32)))
18075void svst1wq_vnum_f32(svbool_t, float32_t *, int64_t, svfloat32_t);
18076__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_s32)))
18077void svst1wq_vnum_s32(svbool_t, int32_t *, int64_t, svint32_t);
18078__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u32)))
18079svuint32_t svld1q_gather_index_u32(svbool_t, svuint64_t, int64_t);
18080__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u64)))
18081svuint64_t svld1q_gather_index_u64(svbool_t, svuint64_t, int64_t);
18082__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u16)))
18083svuint16_t svld1q_gather_index_u16(svbool_t, svuint64_t, int64_t);
18084__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_bf16)))
18085svbfloat16_t svld1q_gather_index_bf16(svbool_t, svuint64_t, int64_t);
18086__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f64)))
18087svfloat64_t svld1q_gather_index_f64(svbool_t, svuint64_t, int64_t);
18088__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f32)))
18089svfloat32_t svld1q_gather_index_f32(svbool_t, svuint64_t, int64_t);
18090__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f16)))
18091svfloat16_t svld1q_gather_index_f16(svbool_t, svuint64_t, int64_t);
18092__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s32)))
18093svint32_t svld1q_gather_index_s32(svbool_t, svuint64_t, int64_t);
18094__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s64)))
18095svint64_t svld1q_gather_index_s64(svbool_t, svuint64_t, int64_t);
18096__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s16)))
18097svint16_t svld1q_gather_index_s16(svbool_t, svuint64_t, int64_t);
18098__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u8)))
18099svuint8_t svld1q_gather_offset_u8(svbool_t, svuint64_t, int64_t);
18100__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u32)))
18101svuint32_t svld1q_gather_offset_u32(svbool_t, svuint64_t, int64_t);
18102__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u64)))
18103svuint64_t svld1q_gather_offset_u64(svbool_t, svuint64_t, int64_t);
18104__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u16)))
18105svuint16_t svld1q_gather_offset_u16(svbool_t, svuint64_t, int64_t);
18106__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_bf16)))
18107svbfloat16_t svld1q_gather_offset_bf16(svbool_t, svuint64_t, int64_t);
18108__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s8)))
18109svint8_t svld1q_gather_offset_s8(svbool_t, svuint64_t, int64_t);
18110__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f64)))
18111svfloat64_t svld1q_gather_offset_f64(svbool_t, svuint64_t, int64_t);
18112__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f32)))
18113svfloat32_t svld1q_gather_offset_f32(svbool_t, svuint64_t, int64_t);
18114__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f16)))
18115svfloat16_t svld1q_gather_offset_f16(svbool_t, svuint64_t, int64_t);
18116__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s32)))
18117svint32_t svld1q_gather_offset_s32(svbool_t, svuint64_t, int64_t);
18118__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s64)))
18119svint64_t svld1q_gather_offset_s64(svbool_t, svuint64_t, int64_t);
18120__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_mf8)))
18121svmfloat8_t svld1q_gather_offset_mf8(svbool_t, svuint64_t, int64_t);
18122__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s16)))
18123svint16_t svld1q_gather_offset_s16(svbool_t, svuint64_t, int64_t);
18124__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u8)))
18125svuint8_t svld1q_gather_u8(svbool_t, svuint64_t);
18126__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u32)))
18127svuint32_t svld1q_gather_u32(svbool_t, svuint64_t);
18128__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u64)))
18129svuint64_t svld1q_gather_u64(svbool_t, svuint64_t);
18130__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u16)))
18131svuint16_t svld1q_gather_u16(svbool_t, svuint64_t);
18132__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_bf16)))
18133svbfloat16_t svld1q_gather_bf16(svbool_t, svuint64_t);
18134__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s8)))
18135svint8_t svld1q_gather_s8(svbool_t, svuint64_t);
18136__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f64)))
18137svfloat64_t svld1q_gather_f64(svbool_t, svuint64_t);
18138__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f32)))
18139svfloat32_t svld1q_gather_f32(svbool_t, svuint64_t);
18140__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f16)))
18141svfloat16_t svld1q_gather_f16(svbool_t, svuint64_t);
18142__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s32)))
18143svint32_t svld1q_gather_s32(svbool_t, svuint64_t);
18144__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s64)))
18145svint64_t svld1q_gather_s64(svbool_t, svuint64_t);
18146__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_mf8)))
18147svmfloat8_t svld1q_gather_mf8(svbool_t, svuint64_t);
18148__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s16)))
18149svint16_t svld1q_gather_s16(svbool_t, svuint64_t);
18150__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u32)))
18151svuint32_t svld1q_gather_index(svbool_t, uint32_t const *, svuint64_t);
18152__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u64)))
18153svuint64_t svld1q_gather_index(svbool_t, uint64_t const *, svuint64_t);
18154__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u16)))
18155svuint16_t svld1q_gather_index(svbool_t, uint16_t const *, svuint64_t);
18156__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_bf16)))
18157svbfloat16_t svld1q_gather_index(svbool_t, bfloat16_t const *, svuint64_t);
18158__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f64)))
18159svfloat64_t svld1q_gather_index(svbool_t, float64_t const *, svuint64_t);
18160__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f32)))
18161svfloat32_t svld1q_gather_index(svbool_t, float32_t const *, svuint64_t);
18162__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f16)))
18163svfloat16_t svld1q_gather_index(svbool_t, float16_t const *, svuint64_t);
18164__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s32)))
18165svint32_t svld1q_gather_index(svbool_t, int32_t const *, svuint64_t);
18166__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s64)))
18167svint64_t svld1q_gather_index(svbool_t, int64_t const *, svuint64_t);
18168__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s16)))
18169svint16_t svld1q_gather_index(svbool_t, int16_t const *, svuint64_t);
18170__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u8)))
18171svuint8_t svld1q_gather_offset(svbool_t, uint8_t const *, svuint64_t);
18172__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u32)))
18173svuint32_t svld1q_gather_offset(svbool_t, uint32_t const *, svuint64_t);
18174__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u64)))
18175svuint64_t svld1q_gather_offset(svbool_t, uint64_t const *, svuint64_t);
18176__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u16)))
18177svuint16_t svld1q_gather_offset(svbool_t, uint16_t const *, svuint64_t);
18178__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_bf16)))
18179svbfloat16_t svld1q_gather_offset(svbool_t, bfloat16_t const *, svuint64_t);
18180__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s8)))
18181svint8_t svld1q_gather_offset(svbool_t, int8_t const *, svuint64_t);
18182__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f64)))
18183svfloat64_t svld1q_gather_offset(svbool_t, float64_t const *, svuint64_t);
18184__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f32)))
18185svfloat32_t svld1q_gather_offset(svbool_t, float32_t const *, svuint64_t);
18186__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f16)))
18187svfloat16_t svld1q_gather_offset(svbool_t, float16_t const *, svuint64_t);
18188__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s32)))
18189svint32_t svld1q_gather_offset(svbool_t, int32_t const *, svuint64_t);
18190__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s64)))
18191svint64_t svld1q_gather_offset(svbool_t, int64_t const *, svuint64_t);
18192__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_mf8)))
18193svmfloat8_t svld1q_gather_offset(svbool_t, mfloat8_t const *, svuint64_t);
18194__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s16)))
18195svint16_t svld1q_gather_offset(svbool_t, int16_t const *, svuint64_t);
18196__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_u64)))
18197svuint64_t svld1udq(svbool_t, uint64_t const *);
18198__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_f64)))
18199svfloat64_t svld1udq(svbool_t, float64_t const *);
18200__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_s64)))
18201svint64_t svld1udq(svbool_t, int64_t const *);
18202__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_u64)))
18203svuint64_t svld1udq_vnum(svbool_t, uint64_t const *, int64_t);
18204__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_f64)))
18205svfloat64_t svld1udq_vnum(svbool_t, float64_t const *, int64_t);
18206__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_s64)))
18207svint64_t svld1udq_vnum(svbool_t, int64_t const *, int64_t);
18208__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_u32)))
18209svuint32_t svld1uwq(svbool_t, uint32_t const *);
18210__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_f32)))
18211svfloat32_t svld1uwq(svbool_t, float32_t const *);
18212__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_s32)))
18213svint32_t svld1uwq(svbool_t, int32_t const *);
18214__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_u32)))
18215svuint32_t svld1uwq_vnum(svbool_t, uint32_t const *, int64_t);
18216__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_f32)))
18217svfloat32_t svld1uwq_vnum(svbool_t, float32_t const *, int64_t);
18218__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_s32)))
18219svint32_t svld1uwq_vnum(svbool_t, int32_t const *, int64_t);
18220__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_u64)))
18221void svst1dq(svbool_t, uint64_t *, svuint64_t);
18222__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_f64)))
18223void svst1dq(svbool_t, float64_t *, svfloat64_t);
18224__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_s64)))
18225void svst1dq(svbool_t, int64_t *, svint64_t);
18226__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_u64)))
18227void svst1dq_vnum(svbool_t, uint64_t *, int64_t, svuint64_t);
18228__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_f64)))
18229void svst1dq_vnum(svbool_t, float64_t *, int64_t, svfloat64_t);
18230__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_s64)))
18231void svst1dq_vnum(svbool_t, int64_t *, int64_t, svint64_t);
18232__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u8)))
18233void svst1q_scatter(svbool_t, svuint64_t, svuint8_t);
18234__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u32)))
18235void svst1q_scatter(svbool_t, svuint64_t, svuint32_t);
18236__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u64)))
18237void svst1q_scatter(svbool_t, svuint64_t, svuint64_t);
18238__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u16)))
18239void svst1q_scatter(svbool_t, svuint64_t, svuint16_t);
18240__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_bf16)))
18241void svst1q_scatter(svbool_t, svuint64_t, svbfloat16_t);
18242__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s8)))
18243void svst1q_scatter(svbool_t, svuint64_t, svint8_t);
18244__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f64)))
18245void svst1q_scatter(svbool_t, svuint64_t, svfloat64_t);
18246__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f32)))
18247void svst1q_scatter(svbool_t, svuint64_t, svfloat32_t);
18248__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f16)))
18249void svst1q_scatter(svbool_t, svuint64_t, svfloat16_t);
18250__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s32)))
18251void svst1q_scatter(svbool_t, svuint64_t, svint32_t);
18252__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s64)))
18253void svst1q_scatter(svbool_t, svuint64_t, svint64_t);
18254__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_mf8)))
18255void svst1q_scatter(svbool_t, svuint64_t, svmfloat8_t);
18256__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s16)))
18257void svst1q_scatter(svbool_t, svuint64_t, svint16_t);
18258__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u32)))
18259void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint32_t);
18260__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u64)))
18261void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t);
18262__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u16)))
18263void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint16_t);
18264__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_bf16)))
18265void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svbfloat16_t);
18266__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f64)))
18267void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat64_t);
18268__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f32)))
18269void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat32_t);
18270__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f16)))
18271void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat16_t);
18272__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s32)))
18273void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint32_t);
18274__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s64)))
18275void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t);
18276__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s16)))
18277void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint16_t);
18278__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u8)))
18279void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint8_t);
18280__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u32)))
18281void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint32_t);
18282__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u64)))
18283void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t);
18284__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u16)))
18285void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint16_t);
18286__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_bf16)))
18287void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svbfloat16_t);
18288__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s8)))
18289void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint8_t);
18290__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f64)))
18291void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat64_t);
18292__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f32)))
18293void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat32_t);
18294__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f16)))
18295void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat16_t);
18296__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s32)))
18297void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint32_t);
18298__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s64)))
18299void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t);
18300__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_mf8)))
18301void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svmfloat8_t);
18302__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s16)))
18303void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint16_t);
18304__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u32)))
18305void svst1q_scatter_index(svbool_t, uint32_t *, svint64_t, svuint32_t);
18306__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u64)))
18307void svst1q_scatter_index(svbool_t, uint64_t *, svint64_t, svuint64_t);
18308__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u16)))
18309void svst1q_scatter_index(svbool_t, uint16_t *, svint64_t, svuint16_t);
18310__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_bf16)))
18311void svst1q_scatter_index(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t);
18312__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f64)))
18313void svst1q_scatter_index(svbool_t, float64_t *, svint64_t, svfloat64_t);
18314__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f32)))
18315void svst1q_scatter_index(svbool_t, float32_t *, svint64_t, svfloat32_t);
18316__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f16)))
18317void svst1q_scatter_index(svbool_t, float16_t *, svint64_t, svfloat16_t);
18318__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s32)))
18319void svst1q_scatter_index(svbool_t, int32_t *, svint64_t, svint32_t);
18320__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s64)))
18321void svst1q_scatter_index(svbool_t, int64_t *, svint64_t, svint64_t);
18322__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s16)))
18323void svst1q_scatter_index(svbool_t, int16_t *, svint64_t, svint16_t);
18324__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u32)))
18325void svst1q_scatter_index(svbool_t, uint32_t *, svuint64_t, svuint32_t);
18326__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u64)))
18327void svst1q_scatter_index(svbool_t, uint64_t *, svuint64_t, svuint64_t);
18328__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u16)))
18329void svst1q_scatter_index(svbool_t, uint16_t *, svuint64_t, svuint16_t);
18330__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_bf16)))
18331void svst1q_scatter_index(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t);
18332__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f64)))
18333void svst1q_scatter_index(svbool_t, float64_t *, svuint64_t, svfloat64_t);
18334__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f32)))
18335void svst1q_scatter_index(svbool_t, float32_t *, svuint64_t, svfloat32_t);
18336__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f16)))
18337void svst1q_scatter_index(svbool_t, float16_t *, svuint64_t, svfloat16_t);
18338__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s32)))
18339void svst1q_scatter_index(svbool_t, int32_t *, svuint64_t, svint32_t);
18340__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s64)))
18341void svst1q_scatter_index(svbool_t, int64_t *, svuint64_t, svint64_t);
18342__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s16)))
18343void svst1q_scatter_index(svbool_t, int16_t *, svuint64_t, svint16_t);
18344__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u8)))
18345void svst1q_scatter_offset(svbool_t, uint8_t *, svint64_t, svuint8_t);
18346__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u32)))
18347void svst1q_scatter_offset(svbool_t, uint32_t *, svint64_t, svuint32_t);
18348__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u64)))
18349void svst1q_scatter_offset(svbool_t, uint64_t *, svint64_t, svuint64_t);
18350__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u16)))
18351void svst1q_scatter_offset(svbool_t, uint16_t *, svint64_t, svuint16_t);
18352__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_bf16)))
18353void svst1q_scatter_offset(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t);
18354__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s8)))
18355void svst1q_scatter_offset(svbool_t, int8_t *, svint64_t, svint8_t);
18356__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f64)))
18357void svst1q_scatter_offset(svbool_t, float64_t *, svint64_t, svfloat64_t);
18358__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f32)))
18359void svst1q_scatter_offset(svbool_t, float32_t *, svint64_t, svfloat32_t);
18360__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f16)))
18361void svst1q_scatter_offset(svbool_t, float16_t *, svint64_t, svfloat16_t);
18362__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s32)))
18363void svst1q_scatter_offset(svbool_t, int32_t *, svint64_t, svint32_t);
18364__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s64)))
18365void svst1q_scatter_offset(svbool_t, int64_t *, svint64_t, svint64_t);
18366__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_mf8)))
18367void svst1q_scatter_offset(svbool_t, mfloat8_t *, svint64_t, svmfloat8_t);
18368__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s16)))
18369void svst1q_scatter_offset(svbool_t, int16_t *, svint64_t, svint16_t);
18370__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u8)))
18371void svst1q_scatter_offset(svbool_t, uint8_t *, svuint64_t, svuint8_t);
18372__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u32)))
18373void svst1q_scatter_offset(svbool_t, uint32_t *, svuint64_t, svuint32_t);
18374__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u64)))
18375void svst1q_scatter_offset(svbool_t, uint64_t *, svuint64_t, svuint64_t);
18376__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u16)))
18377void svst1q_scatter_offset(svbool_t, uint16_t *, svuint64_t, svuint16_t);
18378__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_bf16)))
18379void svst1q_scatter_offset(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t);
18380__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s8)))
18381void svst1q_scatter_offset(svbool_t, int8_t *, svuint64_t, svint8_t);
18382__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f64)))
18383void svst1q_scatter_offset(svbool_t, float64_t *, svuint64_t, svfloat64_t);
18384__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f32)))
18385void svst1q_scatter_offset(svbool_t, float32_t *, svuint64_t, svfloat32_t);
18386__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f16)))
18387void svst1q_scatter_offset(svbool_t, float16_t *, svuint64_t, svfloat16_t);
18388__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s32)))
18389void svst1q_scatter_offset(svbool_t, int32_t *, svuint64_t, svint32_t);
18390__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s64)))
18391void svst1q_scatter_offset(svbool_t, int64_t *, svuint64_t, svint64_t);
18392__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_mf8)))
18393void svst1q_scatter_offset(svbool_t, mfloat8_t *, svuint64_t, svmfloat8_t);
18394__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s16)))
18395void svst1q_scatter_offset(svbool_t, int16_t *, svuint64_t, svint16_t);
18396__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_u32)))
18397void svst1wq(svbool_t, uint32_t *, svuint32_t);
18398__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_f32)))
18399void svst1wq(svbool_t, float32_t *, svfloat32_t);
18400__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_s32)))
18401void svst1wq(svbool_t, int32_t *, svint32_t);
18402__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_u32)))
18403void svst1wq_vnum(svbool_t, uint32_t *, int64_t, svuint32_t);
18404__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_f32)))
18405void svst1wq_vnum(svbool_t, float32_t *, int64_t, svfloat32_t);
18406__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_s32)))
18407void svst1wq_vnum(svbool_t, int32_t *, int64_t, svint32_t);
18408__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c8)))
18409uint64_t svcntp_c8(svcount_t, uint64_t);
18410__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c32)))
18411uint64_t svcntp_c32(svcount_t, uint64_t);
18412__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c64)))
18413uint64_t svcntp_c64(svcount_t, uint64_t);
18414__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c16)))
18415uint64_t svcntp_c16(svcount_t, uint64_t);
18416__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x2)))
18417svuint8x2_t svld1_u8_x2(svcount_t, uint8_t const *);
18418__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x2)))
18419svint8x2_t svld1_s8_x2(svcount_t, int8_t const *);
18420__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x2)))
18421svmfloat8x2_t svld1_mf8_x2(svcount_t, mfloat8_t const *);
18422__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x2)))
18423svuint64x2_t svld1_u64_x2(svcount_t, uint64_t const *);
18424__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x2)))
18425svfloat64x2_t svld1_f64_x2(svcount_t, float64_t const *);
18426__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x2)))
18427svint64x2_t svld1_s64_x2(svcount_t, int64_t const *);
18428__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x2)))
18429svuint16x2_t svld1_u16_x2(svcount_t, uint16_t const *);
18430__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x2)))
18431svbfloat16x2_t svld1_bf16_x2(svcount_t, bfloat16_t const *);
18432__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x2)))
18433svfloat16x2_t svld1_f16_x2(svcount_t, float16_t const *);
18434__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x2)))
18435svint16x2_t svld1_s16_x2(svcount_t, int16_t const *);
18436__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x2)))
18437svuint32x2_t svld1_u32_x2(svcount_t, uint32_t const *);
18438__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x2)))
18439svfloat32x2_t svld1_f32_x2(svcount_t, float32_t const *);
18440__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x2)))
18441svint32x2_t svld1_s32_x2(svcount_t, int32_t const *);
18442__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x4)))
18443svuint8x4_t svld1_u8_x4(svcount_t, uint8_t const *);
18444__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x4)))
18445svint8x4_t svld1_s8_x4(svcount_t, int8_t const *);
18446__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x4)))
18447svmfloat8x4_t svld1_mf8_x4(svcount_t, mfloat8_t const *);
18448__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x4)))
18449svuint64x4_t svld1_u64_x4(svcount_t, uint64_t const *);
18450__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x4)))
18451svfloat64x4_t svld1_f64_x4(svcount_t, float64_t const *);
18452__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x4)))
18453svint64x4_t svld1_s64_x4(svcount_t, int64_t const *);
18454__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x4)))
18455svuint16x4_t svld1_u16_x4(svcount_t, uint16_t const *);
18456__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x4)))
18457svbfloat16x4_t svld1_bf16_x4(svcount_t, bfloat16_t const *);
18458__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x4)))
18459svfloat16x4_t svld1_f16_x4(svcount_t, float16_t const *);
18460__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x4)))
18461svint16x4_t svld1_s16_x4(svcount_t, int16_t const *);
18462__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x4)))
18463svuint32x4_t svld1_u32_x4(svcount_t, uint32_t const *);
18464__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x4)))
18465svfloat32x4_t svld1_f32_x4(svcount_t, float32_t const *);
18466__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x4)))
18467svint32x4_t svld1_s32_x4(svcount_t, int32_t const *);
18468__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x2)))
18469svuint8x2_t svld1_vnum_u8_x2(svcount_t, uint8_t const *, int64_t);
18470__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x2)))
18471svint8x2_t svld1_vnum_s8_x2(svcount_t, int8_t const *, int64_t);
18472__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x2)))
18473svmfloat8x2_t svld1_vnum_mf8_x2(svcount_t, mfloat8_t const *, int64_t);
18474__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x2)))
18475svuint64x2_t svld1_vnum_u64_x2(svcount_t, uint64_t const *, int64_t);
18476__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x2)))
18477svfloat64x2_t svld1_vnum_f64_x2(svcount_t, float64_t const *, int64_t);
18478__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x2)))
18479svint64x2_t svld1_vnum_s64_x2(svcount_t, int64_t const *, int64_t);
18480__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x2)))
18481svuint16x2_t svld1_vnum_u16_x2(svcount_t, uint16_t const *, int64_t);
18482__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x2)))
18483svbfloat16x2_t svld1_vnum_bf16_x2(svcount_t, bfloat16_t const *, int64_t);
18484__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x2)))
18485svfloat16x2_t svld1_vnum_f16_x2(svcount_t, float16_t const *, int64_t);
18486__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x2)))
18487svint16x2_t svld1_vnum_s16_x2(svcount_t, int16_t const *, int64_t);
18488__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x2)))
18489svuint32x2_t svld1_vnum_u32_x2(svcount_t, uint32_t const *, int64_t);
18490__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x2)))
18491svfloat32x2_t svld1_vnum_f32_x2(svcount_t, float32_t const *, int64_t);
18492__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x2)))
18493svint32x2_t svld1_vnum_s32_x2(svcount_t, int32_t const *, int64_t);
18494__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x4)))
18495svuint8x4_t svld1_vnum_u8_x4(svcount_t, uint8_t const *, int64_t);
18496__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x4)))
18497svint8x4_t svld1_vnum_s8_x4(svcount_t, int8_t const *, int64_t);
18498__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x4)))
18499svmfloat8x4_t svld1_vnum_mf8_x4(svcount_t, mfloat8_t const *, int64_t);
18500__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x4)))
18501svuint64x4_t svld1_vnum_u64_x4(svcount_t, uint64_t const *, int64_t);
18502__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x4)))
18503svfloat64x4_t svld1_vnum_f64_x4(svcount_t, float64_t const *, int64_t);
18504__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x4)))
18505svint64x4_t svld1_vnum_s64_x4(svcount_t, int64_t const *, int64_t);
18506__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x4)))
18507svuint16x4_t svld1_vnum_u16_x4(svcount_t, uint16_t const *, int64_t);
18508__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x4)))
18509svbfloat16x4_t svld1_vnum_bf16_x4(svcount_t, bfloat16_t const *, int64_t);
18510__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x4)))
18511svfloat16x4_t svld1_vnum_f16_x4(svcount_t, float16_t const *, int64_t);
18512__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x4)))
18513svint16x4_t svld1_vnum_s16_x4(svcount_t, int16_t const *, int64_t);
18514__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x4)))
18515svuint32x4_t svld1_vnum_u32_x4(svcount_t, uint32_t const *, int64_t);
18516__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x4)))
18517svfloat32x4_t svld1_vnum_f32_x4(svcount_t, float32_t const *, int64_t);
18518__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x4)))
18519svint32x4_t svld1_vnum_s32_x4(svcount_t, int32_t const *, int64_t);
18520__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x2)))
18521svuint8x2_t svldnt1_u8_x2(svcount_t, uint8_t const *);
18522__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x2)))
18523svint8x2_t svldnt1_s8_x2(svcount_t, int8_t const *);
18524__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x2)))
18525svmfloat8x2_t svldnt1_mf8_x2(svcount_t, mfloat8_t const *);
18526__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x2)))
18527svuint64x2_t svldnt1_u64_x2(svcount_t, uint64_t const *);
18528__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x2)))
18529svfloat64x2_t svldnt1_f64_x2(svcount_t, float64_t const *);
18530__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x2)))
18531svint64x2_t svldnt1_s64_x2(svcount_t, int64_t const *);
18532__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x2)))
18533svuint16x2_t svldnt1_u16_x2(svcount_t, uint16_t const *);
18534__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x2)))
18535svbfloat16x2_t svldnt1_bf16_x2(svcount_t, bfloat16_t const *);
18536__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x2)))
18537svfloat16x2_t svldnt1_f16_x2(svcount_t, float16_t const *);
18538__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x2)))
18539svint16x2_t svldnt1_s16_x2(svcount_t, int16_t const *);
18540__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x2)))
18541svuint32x2_t svldnt1_u32_x2(svcount_t, uint32_t const *);
18542__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x2)))
18543svfloat32x2_t svldnt1_f32_x2(svcount_t, float32_t const *);
18544__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x2)))
18545svint32x2_t svldnt1_s32_x2(svcount_t, int32_t const *);
18546__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x4)))
18547svuint8x4_t svldnt1_u8_x4(svcount_t, uint8_t const *);
18548__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x4)))
18549svint8x4_t svldnt1_s8_x4(svcount_t, int8_t const *);
18550__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x4)))
18551svmfloat8x4_t svldnt1_mf8_x4(svcount_t, mfloat8_t const *);
18552__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x4)))
18553svuint64x4_t svldnt1_u64_x4(svcount_t, uint64_t const *);
18554__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x4)))
18555svfloat64x4_t svldnt1_f64_x4(svcount_t, float64_t const *);
18556__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x4)))
18557svint64x4_t svldnt1_s64_x4(svcount_t, int64_t const *);
18558__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x4)))
18559svuint16x4_t svldnt1_u16_x4(svcount_t, uint16_t const *);
18560__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x4)))
18561svbfloat16x4_t svldnt1_bf16_x4(svcount_t, bfloat16_t const *);
18562__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x4)))
18563svfloat16x4_t svldnt1_f16_x4(svcount_t, float16_t const *);
18564__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x4)))
18565svint16x4_t svldnt1_s16_x4(svcount_t, int16_t const *);
18566__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x4)))
18567svuint32x4_t svldnt1_u32_x4(svcount_t, uint32_t const *);
18568__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x4)))
18569svfloat32x4_t svldnt1_f32_x4(svcount_t, float32_t const *);
18570__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x4)))
18571svint32x4_t svldnt1_s32_x4(svcount_t, int32_t const *);
18572__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x2)))
18573svuint8x2_t svldnt1_vnum_u8_x2(svcount_t, uint8_t const *, int64_t);
18574__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x2)))
18575svint8x2_t svldnt1_vnum_s8_x2(svcount_t, int8_t const *, int64_t);
18576__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x2)))
18577svmfloat8x2_t svldnt1_vnum_mf8_x2(svcount_t, mfloat8_t const *, int64_t);
18578__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x2)))
18579svuint64x2_t svldnt1_vnum_u64_x2(svcount_t, uint64_t const *, int64_t);
18580__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x2)))
18581svfloat64x2_t svldnt1_vnum_f64_x2(svcount_t, float64_t const *, int64_t);
18582__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x2)))
18583svint64x2_t svldnt1_vnum_s64_x2(svcount_t, int64_t const *, int64_t);
18584__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x2)))
18585svuint16x2_t svldnt1_vnum_u16_x2(svcount_t, uint16_t const *, int64_t);
18586__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x2)))
18587svbfloat16x2_t svldnt1_vnum_bf16_x2(svcount_t, bfloat16_t const *, int64_t);
18588__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x2)))
18589svfloat16x2_t svldnt1_vnum_f16_x2(svcount_t, float16_t const *, int64_t);
18590__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x2)))
18591svint16x2_t svldnt1_vnum_s16_x2(svcount_t, int16_t const *, int64_t);
18592__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x2)))
18593svuint32x2_t svldnt1_vnum_u32_x2(svcount_t, uint32_t const *, int64_t);
18594__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x2)))
18595svfloat32x2_t svldnt1_vnum_f32_x2(svcount_t, float32_t const *, int64_t);
18596__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x2)))
18597svint32x2_t svldnt1_vnum_s32_x2(svcount_t, int32_t const *, int64_t);
18598__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x4)))
18599svuint8x4_t svldnt1_vnum_u8_x4(svcount_t, uint8_t const *, int64_t);
18600__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x4)))
18601svint8x4_t svldnt1_vnum_s8_x4(svcount_t, int8_t const *, int64_t);
18602__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x4)))
18603svmfloat8x4_t svldnt1_vnum_mf8_x4(svcount_t, mfloat8_t const *, int64_t);
18604__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x4)))
18605svuint64x4_t svldnt1_vnum_u64_x4(svcount_t, uint64_t const *, int64_t);
18606__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x4)))
18607svfloat64x4_t svldnt1_vnum_f64_x4(svcount_t, float64_t const *, int64_t);
18608__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x4)))
18609svint64x4_t svldnt1_vnum_s64_x4(svcount_t, int64_t const *, int64_t);
18610__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x4)))
18611svuint16x4_t svldnt1_vnum_u16_x4(svcount_t, uint16_t const *, int64_t);
18612__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x4)))
18613svbfloat16x4_t svldnt1_vnum_bf16_x4(svcount_t, bfloat16_t const *, int64_t);
18614__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x4)))
18615svfloat16x4_t svldnt1_vnum_f16_x4(svcount_t, float16_t const *, int64_t);
18616__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x4)))
18617svint16x4_t svldnt1_vnum_s16_x4(svcount_t, int16_t const *, int64_t);
18618__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x4)))
18619svuint32x4_t svldnt1_vnum_u32_x4(svcount_t, uint32_t const *, int64_t);
18620__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x4)))
18621svfloat32x4_t svldnt1_vnum_f32_x4(svcount_t, float32_t const *, int64_t);
18622__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x4)))
18623svint32x4_t svldnt1_vnum_s32_x4(svcount_t, int32_t const *, int64_t);
18624__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c8)))
18625svbool_t svpext_lane_c8(svcount_t, uint64_t);
18626__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c32)))
18627svbool_t svpext_lane_c32(svcount_t, uint64_t);
18628__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c64)))
18629svbool_t svpext_lane_c64(svcount_t, uint64_t);
18630__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c16)))
18631svbool_t svpext_lane_c16(svcount_t, uint64_t);
18632__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c8_x2)))
18633svboolx2_t svpext_lane_c8_x2(svcount_t, uint64_t);
18634__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c32_x2)))
18635svboolx2_t svpext_lane_c32_x2(svcount_t, uint64_t);
18636__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c64_x2)))
18637svboolx2_t svpext_lane_c64_x2(svcount_t, uint64_t);
18638__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c16_x2)))
18639svboolx2_t svpext_lane_c16_x2(svcount_t, uint64_t);
18640__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpfalse_c)))
18641svcount_t svpfalse_c(void);
18642__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c16)))
18643svcount_t svpsel_lane_c16(svcount_t, svbool_t, uint32_t);
18644__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c32)))
18645svcount_t svpsel_lane_c32(svcount_t, svbool_t, uint32_t);
18646__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c64)))
18647svcount_t svpsel_lane_c64(svcount_t, svbool_t, uint32_t);
18648__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c8)))
18649svcount_t svpsel_lane_c8(svcount_t, svbool_t, uint32_t);
18650__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c8)))
18651svcount_t svptrue_c8(void);
18652__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c32)))
18653svcount_t svptrue_c32(void);
18654__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c64)))
18655svcount_t svptrue_c64(void);
18656__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c16)))
18657svcount_t svptrue_c16(void);
18658__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_b)))
18659svbool_t svreinterpret_b(svcount_t);
18660__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_c)))
18661svcount_t svreinterpret_c(svbool_t);
18662__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x2)))
18663void svst1_u8_x2(svcount_t, uint8_t *, svuint8x2_t);
18664__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x2)))
18665void svst1_s8_x2(svcount_t, int8_t *, svint8x2_t);
18666__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x2)))
18667void svst1_mf8_x2(svcount_t, mfloat8_t *, svmfloat8x2_t);
18668__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x2)))
18669void svst1_u64_x2(svcount_t, uint64_t *, svuint64x2_t);
18670__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x2)))
18671void svst1_f64_x2(svcount_t, float64_t *, svfloat64x2_t);
18672__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x2)))
18673void svst1_s64_x2(svcount_t, int64_t *, svint64x2_t);
18674__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x2)))
18675void svst1_u16_x2(svcount_t, uint16_t *, svuint16x2_t);
18676__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x2)))
18677void svst1_bf16_x2(svcount_t, bfloat16_t *, svbfloat16x2_t);
18678__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x2)))
18679void svst1_f16_x2(svcount_t, float16_t *, svfloat16x2_t);
18680__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x2)))
18681void svst1_s16_x2(svcount_t, int16_t *, svint16x2_t);
18682__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x2)))
18683void svst1_u32_x2(svcount_t, uint32_t *, svuint32x2_t);
18684__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x2)))
18685void svst1_f32_x2(svcount_t, float32_t *, svfloat32x2_t);
18686__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x2)))
18687void svst1_s32_x2(svcount_t, int32_t *, svint32x2_t);
18688__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x4)))
18689void svst1_u8_x4(svcount_t, uint8_t *, svuint8x4_t);
18690__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x4)))
18691void svst1_s8_x4(svcount_t, int8_t *, svint8x4_t);
18692__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x4)))
18693void svst1_mf8_x4(svcount_t, mfloat8_t *, svmfloat8x4_t);
18694__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x4)))
18695void svst1_u64_x4(svcount_t, uint64_t *, svuint64x4_t);
18696__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x4)))
18697void svst1_f64_x4(svcount_t, float64_t *, svfloat64x4_t);
18698__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x4)))
18699void svst1_s64_x4(svcount_t, int64_t *, svint64x4_t);
18700__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x4)))
18701void svst1_u16_x4(svcount_t, uint16_t *, svuint16x4_t);
18702__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x4)))
18703void svst1_bf16_x4(svcount_t, bfloat16_t *, svbfloat16x4_t);
18704__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x4)))
18705void svst1_f16_x4(svcount_t, float16_t *, svfloat16x4_t);
18706__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x4)))
18707void svst1_s16_x4(svcount_t, int16_t *, svint16x4_t);
18708__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x4)))
18709void svst1_u32_x4(svcount_t, uint32_t *, svuint32x4_t);
18710__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x4)))
18711void svst1_f32_x4(svcount_t, float32_t *, svfloat32x4_t);
18712__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x4)))
18713void svst1_s32_x4(svcount_t, int32_t *, svint32x4_t);
18714__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x2)))
18715void svst1_vnum_u8_x2(svcount_t, uint8_t *, int64_t, svuint8x2_t);
18716__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x2)))
18717void svst1_vnum_s8_x2(svcount_t, int8_t *, int64_t, svint8x2_t);
18718__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x2)))
18719void svst1_vnum_mf8_x2(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t);
18720__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x2)))
18721void svst1_vnum_u64_x2(svcount_t, uint64_t *, int64_t, svuint64x2_t);
18722__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x2)))
18723void svst1_vnum_f64_x2(svcount_t, float64_t *, int64_t, svfloat64x2_t);
18724__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x2)))
18725void svst1_vnum_s64_x2(svcount_t, int64_t *, int64_t, svint64x2_t);
18726__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x2)))
18727void svst1_vnum_u16_x2(svcount_t, uint16_t *, int64_t, svuint16x2_t);
18728__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x2)))
18729void svst1_vnum_bf16_x2(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t);
18730__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x2)))
18731void svst1_vnum_f16_x2(svcount_t, float16_t *, int64_t, svfloat16x2_t);
18732__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x2)))
18733void svst1_vnum_s16_x2(svcount_t, int16_t *, int64_t, svint16x2_t);
18734__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x2)))
18735void svst1_vnum_u32_x2(svcount_t, uint32_t *, int64_t, svuint32x2_t);
18736__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x2)))
18737void svst1_vnum_f32_x2(svcount_t, float32_t *, int64_t, svfloat32x2_t);
18738__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x2)))
18739void svst1_vnum_s32_x2(svcount_t, int32_t *, int64_t, svint32x2_t);
18740__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x4)))
18741void svst1_vnum_u8_x4(svcount_t, uint8_t *, int64_t, svuint8x4_t);
18742__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x4)))
18743void svst1_vnum_s8_x4(svcount_t, int8_t *, int64_t, svint8x4_t);
18744__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x4)))
18745void svst1_vnum_mf8_x4(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t);
18746__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x4)))
18747void svst1_vnum_u64_x4(svcount_t, uint64_t *, int64_t, svuint64x4_t);
18748__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x4)))
18749void svst1_vnum_f64_x4(svcount_t, float64_t *, int64_t, svfloat64x4_t);
18750__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x4)))
18751void svst1_vnum_s64_x4(svcount_t, int64_t *, int64_t, svint64x4_t);
18752__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x4)))
18753void svst1_vnum_u16_x4(svcount_t, uint16_t *, int64_t, svuint16x4_t);
18754__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x4)))
18755void svst1_vnum_bf16_x4(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t);
18756__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x4)))
18757void svst1_vnum_f16_x4(svcount_t, float16_t *, int64_t, svfloat16x4_t);
18758__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x4)))
18759void svst1_vnum_s16_x4(svcount_t, int16_t *, int64_t, svint16x4_t);
18760__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x4)))
18761void svst1_vnum_u32_x4(svcount_t, uint32_t *, int64_t, svuint32x4_t);
18762__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x4)))
18763void svst1_vnum_f32_x4(svcount_t, float32_t *, int64_t, svfloat32x4_t);
18764__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x4)))
18765void svst1_vnum_s32_x4(svcount_t, int32_t *, int64_t, svint32x4_t);
18766__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x2)))
18767void svstnt1_u8_x2(svcount_t, uint8_t *, svuint8x2_t);
18768__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x2)))
18769void svstnt1_s8_x2(svcount_t, int8_t *, svint8x2_t);
18770__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x2)))
18771void svstnt1_mf8_x2(svcount_t, mfloat8_t *, svmfloat8x2_t);
18772__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x2)))
18773void svstnt1_u64_x2(svcount_t, uint64_t *, svuint64x2_t);
18774__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x2)))
18775void svstnt1_f64_x2(svcount_t, float64_t *, svfloat64x2_t);
18776__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x2)))
18777void svstnt1_s64_x2(svcount_t, int64_t *, svint64x2_t);
18778__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x2)))
18779void svstnt1_u16_x2(svcount_t, uint16_t *, svuint16x2_t);
18780__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x2)))
18781void svstnt1_bf16_x2(svcount_t, bfloat16_t *, svbfloat16x2_t);
18782__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x2)))
18783void svstnt1_f16_x2(svcount_t, float16_t *, svfloat16x2_t);
18784__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x2)))
18785void svstnt1_s16_x2(svcount_t, int16_t *, svint16x2_t);
18786__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x2)))
18787void svstnt1_u32_x2(svcount_t, uint32_t *, svuint32x2_t);
18788__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x2)))
18789void svstnt1_f32_x2(svcount_t, float32_t *, svfloat32x2_t);
18790__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x2)))
18791void svstnt1_s32_x2(svcount_t, int32_t *, svint32x2_t);
18792__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x4)))
18793void svstnt1_u8_x4(svcount_t, uint8_t *, svuint8x4_t);
18794__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x4)))
18795void svstnt1_s8_x4(svcount_t, int8_t *, svint8x4_t);
18796__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x4)))
18797void svstnt1_mf8_x4(svcount_t, mfloat8_t *, svmfloat8x4_t);
18798__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x4)))
18799void svstnt1_u64_x4(svcount_t, uint64_t *, svuint64x4_t);
18800__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x4)))
18801void svstnt1_f64_x4(svcount_t, float64_t *, svfloat64x4_t);
18802__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x4)))
18803void svstnt1_s64_x4(svcount_t, int64_t *, svint64x4_t);
18804__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x4)))
18805void svstnt1_u16_x4(svcount_t, uint16_t *, svuint16x4_t);
18806__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x4)))
18807void svstnt1_bf16_x4(svcount_t, bfloat16_t *, svbfloat16x4_t);
18808__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x4)))
18809void svstnt1_f16_x4(svcount_t, float16_t *, svfloat16x4_t);
18810__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x4)))
18811void svstnt1_s16_x4(svcount_t, int16_t *, svint16x4_t);
18812__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x4)))
18813void svstnt1_u32_x4(svcount_t, uint32_t *, svuint32x4_t);
18814__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x4)))
18815void svstnt1_f32_x4(svcount_t, float32_t *, svfloat32x4_t);
18816__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x4)))
18817void svstnt1_s32_x4(svcount_t, int32_t *, svint32x4_t);
18818__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x2)))
18819void svstnt1_vnum_u8_x2(svcount_t, uint8_t *, int64_t, svuint8x2_t);
18820__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x2)))
18821void svstnt1_vnum_s8_x2(svcount_t, int8_t *, int64_t, svint8x2_t);
18822__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x2)))
18823void svstnt1_vnum_mf8_x2(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t);
18824__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x2)))
18825void svstnt1_vnum_u64_x2(svcount_t, uint64_t *, int64_t, svuint64x2_t);
18826__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x2)))
18827void svstnt1_vnum_f64_x2(svcount_t, float64_t *, int64_t, svfloat64x2_t);
18828__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x2)))
18829void svstnt1_vnum_s64_x2(svcount_t, int64_t *, int64_t, svint64x2_t);
18830__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x2)))
18831void svstnt1_vnum_u16_x2(svcount_t, uint16_t *, int64_t, svuint16x2_t);
18832__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x2)))
18833void svstnt1_vnum_bf16_x2(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t);
18834__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x2)))
18835void svstnt1_vnum_f16_x2(svcount_t, float16_t *, int64_t, svfloat16x2_t);
18836__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x2)))
18837void svstnt1_vnum_s16_x2(svcount_t, int16_t *, int64_t, svint16x2_t);
18838__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x2)))
18839void svstnt1_vnum_u32_x2(svcount_t, uint32_t *, int64_t, svuint32x2_t);
18840__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x2)))
18841void svstnt1_vnum_f32_x2(svcount_t, float32_t *, int64_t, svfloat32x2_t);
18842__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x2)))
18843void svstnt1_vnum_s32_x2(svcount_t, int32_t *, int64_t, svint32x2_t);
18844__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x4)))
18845void svstnt1_vnum_u8_x4(svcount_t, uint8_t *, int64_t, svuint8x4_t);
18846__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x4)))
18847void svstnt1_vnum_s8_x4(svcount_t, int8_t *, int64_t, svint8x4_t);
18848__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x4)))
18849void svstnt1_vnum_mf8_x4(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t);
18850__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x4)))
18851void svstnt1_vnum_u64_x4(svcount_t, uint64_t *, int64_t, svuint64x4_t);
18852__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x4)))
18853void svstnt1_vnum_f64_x4(svcount_t, float64_t *, int64_t, svfloat64x4_t);
18854__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x4)))
18855void svstnt1_vnum_s64_x4(svcount_t, int64_t *, int64_t, svint64x4_t);
18856__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x4)))
18857void svstnt1_vnum_u16_x4(svcount_t, uint16_t *, int64_t, svuint16x4_t);
18858__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x4)))
18859void svstnt1_vnum_bf16_x4(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t);
18860__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x4)))
18861void svstnt1_vnum_f16_x4(svcount_t, float16_t *, int64_t, svfloat16x4_t);
18862__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x4)))
18863void svstnt1_vnum_s16_x4(svcount_t, int16_t *, int64_t, svint16x4_t);
18864__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x4)))
18865void svstnt1_vnum_u32_x4(svcount_t, uint32_t *, int64_t, svuint32x4_t);
18866__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x4)))
18867void svstnt1_vnum_f32_x4(svcount_t, float32_t *, int64_t, svfloat32x4_t);
18868__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x4)))
18869void svstnt1_vnum_s32_x4(svcount_t, int32_t *, int64_t, svint32x4_t);
18870__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_s64)))
18871svcount_t svwhilege_c8_s64(int64_t, int64_t, uint64_t);
18872__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_s64)))
18873svcount_t svwhilege_c32_s64(int64_t, int64_t, uint64_t);
18874__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_s64)))
18875svcount_t svwhilege_c64_s64(int64_t, int64_t, uint64_t);
18876__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_s64)))
18877svcount_t svwhilege_c16_s64(int64_t, int64_t, uint64_t);
18878__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_u64)))
18879svcount_t svwhilege_c8_u64(uint64_t, uint64_t, uint64_t);
18880__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_u64)))
18881svcount_t svwhilege_c32_u64(uint64_t, uint64_t, uint64_t);
18882__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_u64)))
18883svcount_t svwhilege_c64_u64(uint64_t, uint64_t, uint64_t);
18884__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_u64)))
18885svcount_t svwhilege_c16_u64(uint64_t, uint64_t, uint64_t);
18886__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_s64)))
18887svcount_t svwhilegt_c8_s64(int64_t, int64_t, uint64_t);
18888__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_s64)))
18889svcount_t svwhilegt_c32_s64(int64_t, int64_t, uint64_t);
18890__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_s64)))
18891svcount_t svwhilegt_c64_s64(int64_t, int64_t, uint64_t);
18892__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_s64)))
18893svcount_t svwhilegt_c16_s64(int64_t, int64_t, uint64_t);
18894__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_u64)))
18895svcount_t svwhilegt_c8_u64(uint64_t, uint64_t, uint64_t);
18896__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_u64)))
18897svcount_t svwhilegt_c32_u64(uint64_t, uint64_t, uint64_t);
18898__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_u64)))
18899svcount_t svwhilegt_c64_u64(uint64_t, uint64_t, uint64_t);
18900__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_u64)))
18901svcount_t svwhilegt_c16_u64(uint64_t, uint64_t, uint64_t);
18902__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_s64)))
18903svcount_t svwhilele_c8_s64(int64_t, int64_t, uint64_t);
18904__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_s64)))
18905svcount_t svwhilele_c32_s64(int64_t, int64_t, uint64_t);
18906__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_s64)))
18907svcount_t svwhilele_c64_s64(int64_t, int64_t, uint64_t);
18908__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_s64)))
18909svcount_t svwhilele_c16_s64(int64_t, int64_t, uint64_t);
18910__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_u64)))
18911svcount_t svwhilele_c8_u64(uint64_t, uint64_t, uint64_t);
18912__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_u64)))
18913svcount_t svwhilele_c32_u64(uint64_t, uint64_t, uint64_t);
18914__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_u64)))
18915svcount_t svwhilele_c64_u64(uint64_t, uint64_t, uint64_t);
18916__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_u64)))
18917svcount_t svwhilele_c16_u64(uint64_t, uint64_t, uint64_t);
18918__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_u64)))
18919svcount_t svwhilelt_c8_u64(uint64_t, uint64_t, uint64_t);
18920__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_u64)))
18921svcount_t svwhilelt_c32_u64(uint64_t, uint64_t, uint64_t);
18922__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_u64)))
18923svcount_t svwhilelt_c64_u64(uint64_t, uint64_t, uint64_t);
18924__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_u64)))
18925svcount_t svwhilelt_c16_u64(uint64_t, uint64_t, uint64_t);
18926__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_s64)))
18927svcount_t svwhilelt_c8_s64(int64_t, int64_t, uint64_t);
18928__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_s64)))
18929svcount_t svwhilelt_c32_s64(int64_t, int64_t, uint64_t);
18930__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_s64)))
18931svcount_t svwhilelt_c64_s64(int64_t, int64_t, uint64_t);
18932__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_s64)))
18933svcount_t svwhilelt_c16_s64(int64_t, int64_t, uint64_t);
18934__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x2)))
18935svuint8x2_t svld1_x2(svcount_t, uint8_t const *);
18936__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x2)))
18937svint8x2_t svld1_x2(svcount_t, int8_t const *);
18938__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x2)))
18939svmfloat8x2_t svld1_x2(svcount_t, mfloat8_t const *);
18940__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x2)))
18941svuint64x2_t svld1_x2(svcount_t, uint64_t const *);
18942__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x2)))
18943svfloat64x2_t svld1_x2(svcount_t, float64_t const *);
18944__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x2)))
18945svint64x2_t svld1_x2(svcount_t, int64_t const *);
18946__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x2)))
18947svuint16x2_t svld1_x2(svcount_t, uint16_t const *);
18948__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x2)))
18949svbfloat16x2_t svld1_x2(svcount_t, bfloat16_t const *);
18950__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x2)))
18951svfloat16x2_t svld1_x2(svcount_t, float16_t const *);
18952__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x2)))
18953svint16x2_t svld1_x2(svcount_t, int16_t const *);
18954__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x2)))
18955svuint32x2_t svld1_x2(svcount_t, uint32_t const *);
18956__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x2)))
18957svfloat32x2_t svld1_x2(svcount_t, float32_t const *);
18958__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x2)))
18959svint32x2_t svld1_x2(svcount_t, int32_t const *);
18960__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x4)))
18961svuint8x4_t svld1_x4(svcount_t, uint8_t const *);
18962__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x4)))
18963svint8x4_t svld1_x4(svcount_t, int8_t const *);
18964__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x4)))
18965svmfloat8x4_t svld1_x4(svcount_t, mfloat8_t const *);
18966__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x4)))
18967svuint64x4_t svld1_x4(svcount_t, uint64_t const *);
18968__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x4)))
18969svfloat64x4_t svld1_x4(svcount_t, float64_t const *);
18970__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x4)))
18971svint64x4_t svld1_x4(svcount_t, int64_t const *);
18972__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x4)))
18973svuint16x4_t svld1_x4(svcount_t, uint16_t const *);
18974__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x4)))
18975svbfloat16x4_t svld1_x4(svcount_t, bfloat16_t const *);
18976__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x4)))
18977svfloat16x4_t svld1_x4(svcount_t, float16_t const *);
18978__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x4)))
18979svint16x4_t svld1_x4(svcount_t, int16_t const *);
18980__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x4)))
18981svuint32x4_t svld1_x4(svcount_t, uint32_t const *);
18982__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x4)))
18983svfloat32x4_t svld1_x4(svcount_t, float32_t const *);
18984__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x4)))
18985svint32x4_t svld1_x4(svcount_t, int32_t const *);
18986__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x2)))
18987svuint8x2_t svld1_vnum_x2(svcount_t, uint8_t const *, int64_t);
18988__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x2)))
18989svint8x2_t svld1_vnum_x2(svcount_t, int8_t const *, int64_t);
18990__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x2)))
18991svmfloat8x2_t svld1_vnum_x2(svcount_t, mfloat8_t const *, int64_t);
18992__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x2)))
18993svuint64x2_t svld1_vnum_x2(svcount_t, uint64_t const *, int64_t);
18994__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x2)))
18995svfloat64x2_t svld1_vnum_x2(svcount_t, float64_t const *, int64_t);
18996__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x2)))
18997svint64x2_t svld1_vnum_x2(svcount_t, int64_t const *, int64_t);
18998__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x2)))
18999svuint16x2_t svld1_vnum_x2(svcount_t, uint16_t const *, int64_t);
19000__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x2)))
19001svbfloat16x2_t svld1_vnum_x2(svcount_t, bfloat16_t const *, int64_t);
19002__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x2)))
19003svfloat16x2_t svld1_vnum_x2(svcount_t, float16_t const *, int64_t);
19004__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x2)))
19005svint16x2_t svld1_vnum_x2(svcount_t, int16_t const *, int64_t);
19006__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x2)))
19007svuint32x2_t svld1_vnum_x2(svcount_t, uint32_t const *, int64_t);
19008__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x2)))
19009svfloat32x2_t svld1_vnum_x2(svcount_t, float32_t const *, int64_t);
19010__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x2)))
19011svint32x2_t svld1_vnum_x2(svcount_t, int32_t const *, int64_t);
19012__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x4)))
19013svuint8x4_t svld1_vnum_x4(svcount_t, uint8_t const *, int64_t);
19014__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x4)))
19015svint8x4_t svld1_vnum_x4(svcount_t, int8_t const *, int64_t);
19016__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x4)))
19017svmfloat8x4_t svld1_vnum_x4(svcount_t, mfloat8_t const *, int64_t);
19018__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x4)))
19019svuint64x4_t svld1_vnum_x4(svcount_t, uint64_t const *, int64_t);
19020__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x4)))
19021svfloat64x4_t svld1_vnum_x4(svcount_t, float64_t const *, int64_t);
19022__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x4)))
19023svint64x4_t svld1_vnum_x4(svcount_t, int64_t const *, int64_t);
19024__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x4)))
19025svuint16x4_t svld1_vnum_x4(svcount_t, uint16_t const *, int64_t);
19026__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x4)))
19027svbfloat16x4_t svld1_vnum_x4(svcount_t, bfloat16_t const *, int64_t);
19028__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x4)))
19029svfloat16x4_t svld1_vnum_x4(svcount_t, float16_t const *, int64_t);
19030__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x4)))
19031svint16x4_t svld1_vnum_x4(svcount_t, int16_t const *, int64_t);
19032__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x4)))
19033svuint32x4_t svld1_vnum_x4(svcount_t, uint32_t const *, int64_t);
19034__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x4)))
19035svfloat32x4_t svld1_vnum_x4(svcount_t, float32_t const *, int64_t);
19036__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x4)))
19037svint32x4_t svld1_vnum_x4(svcount_t, int32_t const *, int64_t);
19038__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x2)))
19039svuint8x2_t svldnt1_x2(svcount_t, uint8_t const *);
19040__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x2)))
19041svint8x2_t svldnt1_x2(svcount_t, int8_t const *);
19042__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x2)))
19043svmfloat8x2_t svldnt1_x2(svcount_t, mfloat8_t const *);
19044__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x2)))
19045svuint64x2_t svldnt1_x2(svcount_t, uint64_t const *);
19046__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x2)))
19047svfloat64x2_t svldnt1_x2(svcount_t, float64_t const *);
19048__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x2)))
19049svint64x2_t svldnt1_x2(svcount_t, int64_t const *);
19050__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x2)))
19051svuint16x2_t svldnt1_x2(svcount_t, uint16_t const *);
19052__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x2)))
19053svbfloat16x2_t svldnt1_x2(svcount_t, bfloat16_t const *);
19054__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x2)))
19055svfloat16x2_t svldnt1_x2(svcount_t, float16_t const *);
19056__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x2)))
19057svint16x2_t svldnt1_x2(svcount_t, int16_t const *);
19058__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x2)))
19059svuint32x2_t svldnt1_x2(svcount_t, uint32_t const *);
19060__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x2)))
19061svfloat32x2_t svldnt1_x2(svcount_t, float32_t const *);
19062__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x2)))
19063svint32x2_t svldnt1_x2(svcount_t, int32_t const *);
19064__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x4)))
19065svuint8x4_t svldnt1_x4(svcount_t, uint8_t const *);
19066__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x4)))
19067svint8x4_t svldnt1_x4(svcount_t, int8_t const *);
19068__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x4)))
19069svmfloat8x4_t svldnt1_x4(svcount_t, mfloat8_t const *);
19070__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x4)))
19071svuint64x4_t svldnt1_x4(svcount_t, uint64_t const *);
19072__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x4)))
19073svfloat64x4_t svldnt1_x4(svcount_t, float64_t const *);
19074__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x4)))
19075svint64x4_t svldnt1_x4(svcount_t, int64_t const *);
19076__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x4)))
19077svuint16x4_t svldnt1_x4(svcount_t, uint16_t const *);
19078__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x4)))
19079svbfloat16x4_t svldnt1_x4(svcount_t, bfloat16_t const *);
19080__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x4)))
19081svfloat16x4_t svldnt1_x4(svcount_t, float16_t const *);
19082__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x4)))
19083svint16x4_t svldnt1_x4(svcount_t, int16_t const *);
19084__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x4)))
19085svuint32x4_t svldnt1_x4(svcount_t, uint32_t const *);
19086__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x4)))
19087svfloat32x4_t svldnt1_x4(svcount_t, float32_t const *);
19088__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x4)))
19089svint32x4_t svldnt1_x4(svcount_t, int32_t const *);
19090__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x2)))
19091svuint8x2_t svldnt1_vnum_x2(svcount_t, uint8_t const *, int64_t);
19092__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x2)))
19093svint8x2_t svldnt1_vnum_x2(svcount_t, int8_t const *, int64_t);
19094__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x2)))
19095svmfloat8x2_t svldnt1_vnum_x2(svcount_t, mfloat8_t const *, int64_t);
19096__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x2)))
19097svuint64x2_t svldnt1_vnum_x2(svcount_t, uint64_t const *, int64_t);
19098__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x2)))
19099svfloat64x2_t svldnt1_vnum_x2(svcount_t, float64_t const *, int64_t);
19100__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x2)))
19101svint64x2_t svldnt1_vnum_x2(svcount_t, int64_t const *, int64_t);
19102__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x2)))
19103svuint16x2_t svldnt1_vnum_x2(svcount_t, uint16_t const *, int64_t);
19104__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x2)))
19105svbfloat16x2_t svldnt1_vnum_x2(svcount_t, bfloat16_t const *, int64_t);
19106__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x2)))
19107svfloat16x2_t svldnt1_vnum_x2(svcount_t, float16_t const *, int64_t);
19108__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x2)))
19109svint16x2_t svldnt1_vnum_x2(svcount_t, int16_t const *, int64_t);
19110__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x2)))
19111svuint32x2_t svldnt1_vnum_x2(svcount_t, uint32_t const *, int64_t);
19112__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x2)))
19113svfloat32x2_t svldnt1_vnum_x2(svcount_t, float32_t const *, int64_t);
19114__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x2)))
19115svint32x2_t svldnt1_vnum_x2(svcount_t, int32_t const *, int64_t);
19116__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x4)))
19117svuint8x4_t svldnt1_vnum_x4(svcount_t, uint8_t const *, int64_t);
19118__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x4)))
19119svint8x4_t svldnt1_vnum_x4(svcount_t, int8_t const *, int64_t);
19120__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x4)))
19121svmfloat8x4_t svldnt1_vnum_x4(svcount_t, mfloat8_t const *, int64_t);
19122__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x4)))
19123svuint64x4_t svldnt1_vnum_x4(svcount_t, uint64_t const *, int64_t);
19124__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x4)))
19125svfloat64x4_t svldnt1_vnum_x4(svcount_t, float64_t const *, int64_t);
19126__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x4)))
19127svint64x4_t svldnt1_vnum_x4(svcount_t, int64_t const *, int64_t);
19128__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x4)))
19129svuint16x4_t svldnt1_vnum_x4(svcount_t, uint16_t const *, int64_t);
19130__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x4)))
19131svbfloat16x4_t svldnt1_vnum_x4(svcount_t, bfloat16_t const *, int64_t);
19132__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x4)))
19133svfloat16x4_t svldnt1_vnum_x4(svcount_t, float16_t const *, int64_t);
19134__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x4)))
19135svint16x4_t svldnt1_vnum_x4(svcount_t, int16_t const *, int64_t);
19136__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x4)))
19137svuint32x4_t svldnt1_vnum_x4(svcount_t, uint32_t const *, int64_t);
19138__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x4)))
19139svfloat32x4_t svldnt1_vnum_x4(svcount_t, float32_t const *, int64_t);
19140__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x4)))
19141svint32x4_t svldnt1_vnum_x4(svcount_t, int32_t const *, int64_t);
19142__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_b)))
19143svbool_t svreinterpret(svcount_t);
19144__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_c)))
19145svcount_t svreinterpret(svbool_t);
19146__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x2)))
19147void svst1(svcount_t, uint8_t *, svuint8x2_t);
19148__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x2)))
19149void svst1(svcount_t, int8_t *, svint8x2_t);
19150__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x2)))
19151void svst1(svcount_t, mfloat8_t *, svmfloat8x2_t);
19152__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x2)))
19153void svst1(svcount_t, uint64_t *, svuint64x2_t);
19154__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x2)))
19155void svst1(svcount_t, float64_t *, svfloat64x2_t);
19156__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x2)))
19157void svst1(svcount_t, int64_t *, svint64x2_t);
19158__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x2)))
19159void svst1(svcount_t, uint16_t *, svuint16x2_t);
19160__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x2)))
19161void svst1(svcount_t, bfloat16_t *, svbfloat16x2_t);
19162__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x2)))
19163void svst1(svcount_t, float16_t *, svfloat16x2_t);
19164__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x2)))
19165void svst1(svcount_t, int16_t *, svint16x2_t);
19166__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x2)))
19167void svst1(svcount_t, uint32_t *, svuint32x2_t);
19168__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x2)))
19169void svst1(svcount_t, float32_t *, svfloat32x2_t);
19170__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x2)))
19171void svst1(svcount_t, int32_t *, svint32x2_t);
19172__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x4)))
19173void svst1(svcount_t, uint8_t *, svuint8x4_t);
19174__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x4)))
19175void svst1(svcount_t, int8_t *, svint8x4_t);
19176__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x4)))
19177void svst1(svcount_t, mfloat8_t *, svmfloat8x4_t);
19178__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x4)))
19179void svst1(svcount_t, uint64_t *, svuint64x4_t);
19180__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x4)))
19181void svst1(svcount_t, float64_t *, svfloat64x4_t);
19182__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x4)))
19183void svst1(svcount_t, int64_t *, svint64x4_t);
19184__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x4)))
19185void svst1(svcount_t, uint16_t *, svuint16x4_t);
19186__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x4)))
19187void svst1(svcount_t, bfloat16_t *, svbfloat16x4_t);
19188__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x4)))
19189void svst1(svcount_t, float16_t *, svfloat16x4_t);
19190__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x4)))
19191void svst1(svcount_t, int16_t *, svint16x4_t);
19192__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x4)))
19193void svst1(svcount_t, uint32_t *, svuint32x4_t);
19194__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x4)))
19195void svst1(svcount_t, float32_t *, svfloat32x4_t);
19196__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x4)))
19197void svst1(svcount_t, int32_t *, svint32x4_t);
19198__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x2)))
19199void svst1_vnum(svcount_t, uint8_t *, int64_t, svuint8x2_t);
19200__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x2)))
19201void svst1_vnum(svcount_t, int8_t *, int64_t, svint8x2_t);
19202__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x2)))
19203void svst1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t);
19204__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x2)))
19205void svst1_vnum(svcount_t, uint64_t *, int64_t, svuint64x2_t);
19206__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x2)))
19207void svst1_vnum(svcount_t, float64_t *, int64_t, svfloat64x2_t);
19208__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x2)))
19209void svst1_vnum(svcount_t, int64_t *, int64_t, svint64x2_t);
19210__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x2)))
19211void svst1_vnum(svcount_t, uint16_t *, int64_t, svuint16x2_t);
19212__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x2)))
19213void svst1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t);
19214__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x2)))
19215void svst1_vnum(svcount_t, float16_t *, int64_t, svfloat16x2_t);
19216__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x2)))
19217void svst1_vnum(svcount_t, int16_t *, int64_t, svint16x2_t);
19218__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x2)))
19219void svst1_vnum(svcount_t, uint32_t *, int64_t, svuint32x2_t);
19220__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x2)))
19221void svst1_vnum(svcount_t, float32_t *, int64_t, svfloat32x2_t);
19222__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x2)))
19223void svst1_vnum(svcount_t, int32_t *, int64_t, svint32x2_t);
19224__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x4)))
19225void svst1_vnum(svcount_t, uint8_t *, int64_t, svuint8x4_t);
19226__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x4)))
19227void svst1_vnum(svcount_t, int8_t *, int64_t, svint8x4_t);
19228__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x4)))
19229void svst1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t);
19230__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x4)))
19231void svst1_vnum(svcount_t, uint64_t *, int64_t, svuint64x4_t);
19232__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x4)))
19233void svst1_vnum(svcount_t, float64_t *, int64_t, svfloat64x4_t);
19234__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x4)))
19235void svst1_vnum(svcount_t, int64_t *, int64_t, svint64x4_t);
19236__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x4)))
19237void svst1_vnum(svcount_t, uint16_t *, int64_t, svuint16x4_t);
19238__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x4)))
19239void svst1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t);
19240__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x4)))
19241void svst1_vnum(svcount_t, float16_t *, int64_t, svfloat16x4_t);
19242__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x4)))
19243void svst1_vnum(svcount_t, int16_t *, int64_t, svint16x4_t);
19244__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x4)))
19245void svst1_vnum(svcount_t, uint32_t *, int64_t, svuint32x4_t);
19246__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x4)))
19247void svst1_vnum(svcount_t, float32_t *, int64_t, svfloat32x4_t);
19248__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x4)))
19249void svst1_vnum(svcount_t, int32_t *, int64_t, svint32x4_t);
19250__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x2)))
19251void svstnt1(svcount_t, uint8_t *, svuint8x2_t);
19252__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x2)))
19253void svstnt1(svcount_t, int8_t *, svint8x2_t);
19254__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x2)))
19255void svstnt1(svcount_t, mfloat8_t *, svmfloat8x2_t);
19256__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x2)))
19257void svstnt1(svcount_t, uint64_t *, svuint64x2_t);
19258__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x2)))
19259void svstnt1(svcount_t, float64_t *, svfloat64x2_t);
19260__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x2)))
19261void svstnt1(svcount_t, int64_t *, svint64x2_t);
19262__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x2)))
19263void svstnt1(svcount_t, uint16_t *, svuint16x2_t);
19264__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x2)))
19265void svstnt1(svcount_t, bfloat16_t *, svbfloat16x2_t);
19266__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x2)))
19267void svstnt1(svcount_t, float16_t *, svfloat16x2_t);
19268__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x2)))
19269void svstnt1(svcount_t, int16_t *, svint16x2_t);
19270__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x2)))
19271void svstnt1(svcount_t, uint32_t *, svuint32x2_t);
19272__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x2)))
19273void svstnt1(svcount_t, float32_t *, svfloat32x2_t);
19274__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x2)))
19275void svstnt1(svcount_t, int32_t *, svint32x2_t);
19276__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x4)))
19277void svstnt1(svcount_t, uint8_t *, svuint8x4_t);
19278__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x4)))
19279void svstnt1(svcount_t, int8_t *, svint8x4_t);
19280__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x4)))
19281void svstnt1(svcount_t, mfloat8_t *, svmfloat8x4_t);
19282__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x4)))
19283void svstnt1(svcount_t, uint64_t *, svuint64x4_t);
19284__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x4)))
19285void svstnt1(svcount_t, float64_t *, svfloat64x4_t);
19286__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x4)))
19287void svstnt1(svcount_t, int64_t *, svint64x4_t);
19288__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x4)))
19289void svstnt1(svcount_t, uint16_t *, svuint16x4_t);
19290__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x4)))
19291void svstnt1(svcount_t, bfloat16_t *, svbfloat16x4_t);
19292__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x4)))
19293void svstnt1(svcount_t, float16_t *, svfloat16x4_t);
19294__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x4)))
19295void svstnt1(svcount_t, int16_t *, svint16x4_t);
19296__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x4)))
19297void svstnt1(svcount_t, uint32_t *, svuint32x4_t);
19298__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x4)))
19299void svstnt1(svcount_t, float32_t *, svfloat32x4_t);
19300__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x4)))
19301void svstnt1(svcount_t, int32_t *, svint32x4_t);
19302__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x2)))
19303void svstnt1_vnum(svcount_t, uint8_t *, int64_t, svuint8x2_t);
19304__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x2)))
19305void svstnt1_vnum(svcount_t, int8_t *, int64_t, svint8x2_t);
19306__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x2)))
19307void svstnt1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t);
19308__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x2)))
19309void svstnt1_vnum(svcount_t, uint64_t *, int64_t, svuint64x2_t);
19310__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x2)))
19311void svstnt1_vnum(svcount_t, float64_t *, int64_t, svfloat64x2_t);
19312__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x2)))
19313void svstnt1_vnum(svcount_t, int64_t *, int64_t, svint64x2_t);
19314__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x2)))
19315void svstnt1_vnum(svcount_t, uint16_t *, int64_t, svuint16x2_t);
19316__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x2)))
19317void svstnt1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t);
19318__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x2)))
19319void svstnt1_vnum(svcount_t, float16_t *, int64_t, svfloat16x2_t);
19320__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x2)))
19321void svstnt1_vnum(svcount_t, int16_t *, int64_t, svint16x2_t);
19322__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x2)))
19323void svstnt1_vnum(svcount_t, uint32_t *, int64_t, svuint32x2_t);
19324__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x2)))
19325void svstnt1_vnum(svcount_t, float32_t *, int64_t, svfloat32x2_t);
19326__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x2)))
19327void svstnt1_vnum(svcount_t, int32_t *, int64_t, svint32x2_t);
19328__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x4)))
19329void svstnt1_vnum(svcount_t, uint8_t *, int64_t, svuint8x4_t);
19330__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x4)))
19331void svstnt1_vnum(svcount_t, int8_t *, int64_t, svint8x4_t);
19332__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x4)))
19333void svstnt1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t);
19334__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x4)))
19335void svstnt1_vnum(svcount_t, uint64_t *, int64_t, svuint64x4_t);
19336__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x4)))
19337void svstnt1_vnum(svcount_t, float64_t *, int64_t, svfloat64x4_t);
19338__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x4)))
19339void svstnt1_vnum(svcount_t, int64_t *, int64_t, svint64x4_t);
19340__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x4)))
19341void svstnt1_vnum(svcount_t, uint16_t *, int64_t, svuint16x4_t);
19342__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x4)))
19343void svstnt1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t);
19344__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x4)))
19345void svstnt1_vnum(svcount_t, float16_t *, int64_t, svfloat16x4_t);
19346__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x4)))
19347void svstnt1_vnum(svcount_t, int16_t *, int64_t, svint16x4_t);
19348__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x4)))
19349void svstnt1_vnum(svcount_t, uint32_t *, int64_t, svuint32x4_t);
19350__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x4)))
19351void svstnt1_vnum(svcount_t, float32_t *, int64_t, svfloat32x4_t);
19352__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x4)))
19353void svstnt1_vnum(svcount_t, int32_t *, int64_t, svint32x4_t);
19354__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_s64)))
19355svcount_t svwhilege_c8(int64_t, int64_t, uint64_t);
19356__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_s64)))
19357svcount_t svwhilege_c32(int64_t, int64_t, uint64_t);
19358__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_s64)))
19359svcount_t svwhilege_c64(int64_t, int64_t, uint64_t);
19360__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_s64)))
19361svcount_t svwhilege_c16(int64_t, int64_t, uint64_t);
19362__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_u64)))
19363svcount_t svwhilege_c8(uint64_t, uint64_t, uint64_t);
19364__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_u64)))
19365svcount_t svwhilege_c32(uint64_t, uint64_t, uint64_t);
19366__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_u64)))
19367svcount_t svwhilege_c64(uint64_t, uint64_t, uint64_t);
19368__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_u64)))
19369svcount_t svwhilege_c16(uint64_t, uint64_t, uint64_t);
19370__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_s64)))
19371svcount_t svwhilegt_c8(int64_t, int64_t, uint64_t);
19372__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_s64)))
19373svcount_t svwhilegt_c32(int64_t, int64_t, uint64_t);
19374__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_s64)))
19375svcount_t svwhilegt_c64(int64_t, int64_t, uint64_t);
19376__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_s64)))
19377svcount_t svwhilegt_c16(int64_t, int64_t, uint64_t);
19378__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_u64)))
19379svcount_t svwhilegt_c8(uint64_t, uint64_t, uint64_t);
19380__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_u64)))
19381svcount_t svwhilegt_c32(uint64_t, uint64_t, uint64_t);
19382__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_u64)))
19383svcount_t svwhilegt_c64(uint64_t, uint64_t, uint64_t);
19384__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_u64)))
19385svcount_t svwhilegt_c16(uint64_t, uint64_t, uint64_t);
19386__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_s64)))
19387svcount_t svwhilele_c8(int64_t, int64_t, uint64_t);
19388__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_s64)))
19389svcount_t svwhilele_c32(int64_t, int64_t, uint64_t);
19390__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_s64)))
19391svcount_t svwhilele_c64(int64_t, int64_t, uint64_t);
19392__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_s64)))
19393svcount_t svwhilele_c16(int64_t, int64_t, uint64_t);
19394__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_u64)))
19395svcount_t svwhilele_c8(uint64_t, uint64_t, uint64_t);
19396__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_u64)))
19397svcount_t svwhilele_c32(uint64_t, uint64_t, uint64_t);
19398__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_u64)))
19399svcount_t svwhilele_c64(uint64_t, uint64_t, uint64_t);
19400__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_u64)))
19401svcount_t svwhilele_c16(uint64_t, uint64_t, uint64_t);
19402__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_u64)))
19403svcount_t svwhilelt_c8(uint64_t, uint64_t, uint64_t);
19404__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_u64)))
19405svcount_t svwhilelt_c32(uint64_t, uint64_t, uint64_t);
19406__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_u64)))
19407svcount_t svwhilelt_c64(uint64_t, uint64_t, uint64_t);
19408__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_u64)))
19409svcount_t svwhilelt_c16(uint64_t, uint64_t, uint64_t);
19410__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_s64)))
19411svcount_t svwhilelt_c8(int64_t, int64_t, uint64_t);
19412__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_s64)))
19413svcount_t svwhilelt_c32(int64_t, int64_t, uint64_t);
19414__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_s64)))
19415svcount_t svwhilelt_c64(int64_t, int64_t, uint64_t);
19416__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_s64)))
19417svcount_t svwhilelt_c16(int64_t, int64_t, uint64_t);
19062__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svabd_n_f64_m)))19418__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svabd_n_f64_m)))
19063svfloat64_t svabd_n_f64_m(svbool_t, svfloat64_t, float64_t);19419svfloat64_t svabd_n_f64_m(svbool_t, svfloat64_t, float64_t);
19064__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svabd_n_f32_m)))19420__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svabd_n_f32_m)))
...@@ -31877,6 +32233,30 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpa_f32)))...@@ -31877,6 +32233,30 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpa_f32)))
31877svfloat32_t svexpa(svuint32_t);32233svfloat32_t svexpa(svuint32_t);
31878__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpa_f16)))32234__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpa_f16)))
31879svfloat16_t svexpa(svuint16_t);32235svfloat16_t svexpa(svuint16_t);
32236__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u32)))
32237svuint32_t svcompact_u32(svbool_t, svuint32_t);
32238__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u64)))
32239svuint64_t svcompact_u64(svbool_t, svuint64_t);
32240__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f64)))
32241svfloat64_t svcompact_f64(svbool_t, svfloat64_t);
32242__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f32)))
32243svfloat32_t svcompact_f32(svbool_t, svfloat32_t);
32244__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s32)))
32245svint32_t svcompact_s32(svbool_t, svint32_t);
32246__ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s64)))
32247svint64_t svcompact_s64(svbool_t, svint64_t);
32248__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u32)))
32249svuint32_t svcompact(svbool_t, svuint32_t);
32250__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u64)))
32251svuint64_t svcompact(svbool_t, svuint64_t);
32252__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f64)))
32253svfloat64_t svcompact(svbool_t, svfloat64_t);
32254__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f32)))
32255svfloat32_t svcompact(svbool_t, svfloat32_t);
32256__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s32)))
32257svint32_t svcompact(svbool_t, svint32_t);
32258__aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s64)))
32259svint64_t svcompact(svbool_t, svint64_t);
31880#define svcvtnt_bf16_x svcvtnt_bf16_m32260#define svcvtnt_bf16_x svcvtnt_bf16_m
31881#define svcvtnt_bf16_f32_x svcvtnt_bf16_f32_m32261#define svcvtnt_bf16_f32_x svcvtnt_bf16_f32_m
31882#define svcvtnt_f16_x svcvtnt_f16_m32262#define svcvtnt_f16_x svcvtnt_f16_m
lib/include/avx10_2_512bf16intrin.h+19-12
...@@ -21,9 +21,15 @@ typedef __bf16 __m512bh_u __attribute__((__vector_size__(64), __aligned__(1)));...@@ -21,9 +21,15 @@ typedef __bf16 __m512bh_u __attribute__((__vector_size__(64), __aligned__(1)));
2121
22/* Define the default attributes for the functions in this file. */22/* Define the default attributes for the functions in this file. */
23#define __DEFAULT_FN_ATTRS512 \23#define __DEFAULT_FN_ATTRS512 \
24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
25 __min_vector_width__(512)))25 __min_vector_width__(512)))
2626
27#if defined(__cplusplus) && (__cplusplus >= 201103L)
28#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr
29#else
30#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512
31#endif
32
27static __inline __m512bh __DEFAULT_FN_ATTRS512 _mm512_setzero_pbh(void) {33static __inline __m512bh __DEFAULT_FN_ATTRS512 _mm512_setzero_pbh(void) {
28 return __builtin_bit_cast(__m512bh, _mm512_setzero_ps());34 return __builtin_bit_cast(__m512bh, _mm512_setzero_ps());
29}35}
...@@ -167,13 +173,13 @@ _mm512_mask_blend_pbh(__mmask32 __U, __m512bh __A, __m512bh __W) {...@@ -167,13 +173,13 @@ _mm512_mask_blend_pbh(__mmask32 __U, __m512bh __A, __m512bh __W) {
167 (__v32bf)__A);173 (__v32bf)__A);
168}174}
169175
170static __inline__ __m512bh __DEFAULT_FN_ATTRS512176static __inline__ __m512bh __DEFAULT_FN_ATTRS512_CONSTEXPR
171_mm512_permutex2var_pbh(__m512bh __A, __m512i __I, __m512bh __B) {177_mm512_permutex2var_pbh(__m512bh __A, __m512i __I, __m512bh __B) {
172 return (__m512bh)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I,178 return (__m512bh)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I,
173 (__v32hi)__B);179 (__v32hi)__B);
174}180}
175181
176static __inline__ __m512bh __DEFAULT_FN_ATTRS512182static __inline__ __m512bh __DEFAULT_FN_ATTRS512_CONSTEXPR
177_mm512_permutexvar_pbh(__m512i __A, __m512bh __B) {183_mm512_permutexvar_pbh(__m512i __A, __m512bh __B) {
178 return (__m512bh)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A);184 return (__m512bh)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A);
179}185}
...@@ -423,7 +429,7 @@ _mm512_maskz_rsqrt_pbh(__mmask32 __U, __m512bh __A) {...@@ -423,7 +429,7 @@ _mm512_maskz_rsqrt_pbh(__mmask32 __U, __m512bh __A) {
423 (__v32bf)_mm512_setzero_pbh(), (__mmask32)(__U)))429 (__v32bf)_mm512_setzero_pbh(), (__mmask32)(__U)))
424430
425static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_sqrt_pbh(__m512bh __A) {431static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_sqrt_pbh(__m512bh __A) {
426 return (__m512bh)__builtin_ia32_vsqrtbf16512((__v32bf)__A);432 return __builtin_elementwise_sqrt(__A);
427}433}
428434
429static __inline__ __m512bh __DEFAULT_FN_ATTRS512435static __inline__ __m512bh __DEFAULT_FN_ATTRS512
...@@ -441,8 +447,8 @@ _mm512_maskz_sqrt_pbh(__mmask32 __U, __m512bh __A) {...@@ -441,8 +447,8 @@ _mm512_maskz_sqrt_pbh(__mmask32 __U, __m512bh __A) {
441447
442static __inline__ __m512bh __DEFAULT_FN_ATTRS512448static __inline__ __m512bh __DEFAULT_FN_ATTRS512
443_mm512_fmadd_pbh(__m512bh __A, __m512bh __B, __m512bh __C) {449_mm512_fmadd_pbh(__m512bh __A, __m512bh __B, __m512bh __C) {
444 return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, (__v32bf)__B,450 return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, (__v32bf)__B,
445 (__v32bf)__C);451 (__v32bf)__C);
446}452}
447453
448static __inline__ __m512bh __DEFAULT_FN_ATTRS512454static __inline__ __m512bh __DEFAULT_FN_ATTRS512
...@@ -469,8 +475,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fmadd_pbh(...@@ -469,8 +475,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fmadd_pbh(
469475
470static __inline__ __m512bh __DEFAULT_FN_ATTRS512476static __inline__ __m512bh __DEFAULT_FN_ATTRS512
471_mm512_fmsub_pbh(__m512bh __A, __m512bh __B, __m512bh __C) {477_mm512_fmsub_pbh(__m512bh __A, __m512bh __B, __m512bh __C) {
472 return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, (__v32bf)__B,478 return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, (__v32bf)__B,
473 -(__v32bf)__C);479 -(__v32bf)__C);
474}480}
475481
476static __inline__ __m512bh __DEFAULT_FN_ATTRS512482static __inline__ __m512bh __DEFAULT_FN_ATTRS512
...@@ -497,8 +503,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fmsub_pbh(...@@ -497,8 +503,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fmsub_pbh(
497503
498static __inline__ __m512bh __DEFAULT_FN_ATTRS512504static __inline__ __m512bh __DEFAULT_FN_ATTRS512
499_mm512_fnmadd_pbh(__m512bh __A, __m512bh __B, __m512bh __C) {505_mm512_fnmadd_pbh(__m512bh __A, __m512bh __B, __m512bh __C) {
500 return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, -(__v32bf)__B,506 return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, -(__v32bf)__B,
501 (__v32bf)__C);507 (__v32bf)__C);
502}508}
503509
504static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_mask_fnmadd_pbh(510static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_mask_fnmadd_pbh(
...@@ -527,8 +533,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fnmadd_pbh(...@@ -527,8 +533,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fnmadd_pbh(
527533
528static __inline__ __m512bh __DEFAULT_FN_ATTRS512534static __inline__ __m512bh __DEFAULT_FN_ATTRS512
529_mm512_fnmsub_pbh(__m512bh __A, __m512bh __B, __m512bh __C) {535_mm512_fnmsub_pbh(__m512bh __A, __m512bh __B, __m512bh __C) {
530 return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, -(__v32bf)__B,536 return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, -(__v32bf)__B,
531 -(__v32bf)__C);537 -(__v32bf)__C);
532}538}
533539
534static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_mask_fnmsub_pbh(540static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_mask_fnmsub_pbh(
...@@ -555,6 +561,7 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fnmsub_pbh(...@@ -555,6 +561,7 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fnmsub_pbh(
555 (__v32bf)_mm512_setzero_pbh());561 (__v32bf)_mm512_setzero_pbh());
556}562}
557563
564#undef __DEFAULT_FN_ATTRS512_CONSTEXPR
558#undef __DEFAULT_FN_ATTRS512565#undef __DEFAULT_FN_ATTRS512
559566
560#endif567#endif
lib/include/avx10_2_512convertintrin.h+1-1
...@@ -18,7 +18,7 @@...@@ -18,7 +18,7 @@
1818
19/* Define the default attributes for the functions in this file. */19/* Define the default attributes for the functions in this file. */
20#define __DEFAULT_FN_ATTRS512 \20#define __DEFAULT_FN_ATTRS512 \
21 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \21 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
22 __min_vector_width__(512)))22 __min_vector_width__(512)))
2323
24static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_cvtx2ps_ph(__m512 __A,24static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_cvtx2ps_ph(__m512 __A,
lib/include/avx10_2_512niintrin.h+31-31
...@@ -17,7 +17,7 @@...@@ -17,7 +17,7 @@
17#define __AVX10_2_512NIINTRIN_H17#define __AVX10_2_512NIINTRIN_H
1818
19#define __DEFAULT_FN_ATTRS \19#define __DEFAULT_FN_ATTRS \
20 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \20 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
21 __min_vector_width__(512)))21 __min_vector_width__(512)))
2222
23/* VNNI FP16 */23/* VNNI FP16 */
...@@ -64,8 +64,8 @@ static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_dpph_ps(__mmask16 __U,...@@ -64,8 +64,8 @@ static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_dpph_ps(__mmask16 __U,
64static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbssd_epi32(__m512i __W,64static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbssd_epi32(__m512i __W,
65 __m512i __A,65 __m512i __A,
66 __m512i __B) {66 __m512i __B) {
67 return (__m512i)__builtin_ia32_vpdpbssd512((__v16si)__W, (__v16si)__A,67 return (__m512i)__builtin_ia32_vpdpbssd512((__v16si)__W, (__v64qi)__A,
68 (__v16si)__B);68 (__v64qi)__B);
69}69}
7070
71static __inline__ __m512i __DEFAULT_FN_ATTRS71static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -84,8 +84,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbssd_epi32(...@@ -84,8 +84,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbssd_epi32(
84static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbssds_epi32(__m512i __W,84static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbssds_epi32(__m512i __W,
85 __m512i __A,85 __m512i __A,
86 __m512i __B) {86 __m512i __B) {
87 return (__m512i)__builtin_ia32_vpdpbssds512((__v16si)__W, (__v16si)__A,87 return (__m512i)__builtin_ia32_vpdpbssds512((__v16si)__W, (__v64qi)__A,
88 (__v16si)__B);88 (__v64qi)__B);
89}89}
9090
91static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbssds_epi32(91static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbssds_epi32(
...@@ -104,8 +104,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbssds_epi32(...@@ -104,8 +104,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbssds_epi32(
104static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbsud_epi32(__m512i __W,104static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbsud_epi32(__m512i __W,
105 __m512i __A,105 __m512i __A,
106 __m512i __B) {106 __m512i __B) {
107 return (__m512i)__builtin_ia32_vpdpbsud512((__v16si)__W, (__v16si)__A,107 return (__m512i)__builtin_ia32_vpdpbsud512((__v16si)__W, (__v64qi)__A,
108 (__v16si)__B);108 (__v64qu)__B);
109}109}
110110
111static __inline__ __m512i __DEFAULT_FN_ATTRS111static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -124,8 +124,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbsud_epi32(...@@ -124,8 +124,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbsud_epi32(
124static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbsuds_epi32(__m512i __W,124static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbsuds_epi32(__m512i __W,
125 __m512i __A,125 __m512i __A,
126 __m512i __B) {126 __m512i __B) {
127 return (__m512i)__builtin_ia32_vpdpbsuds512((__v16si)__W, (__v16si)__A,127 return (__m512i)__builtin_ia32_vpdpbsuds512((__v16si)__W, (__v64qi)__A,
128 (__v16si)__B);128 (__v64qu)__B);
129}129}
130130
131static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbsuds_epi32(131static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbsuds_epi32(
...@@ -144,8 +144,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbsuds_epi32(...@@ -144,8 +144,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbsuds_epi32(
144static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbuud_epi32(__m512i __W,144static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbuud_epi32(__m512i __W,
145 __m512i __A,145 __m512i __A,
146 __m512i __B) {146 __m512i __B) {
147 return (__m512i)__builtin_ia32_vpdpbuud512((__v16si)__W, (__v16si)__A,147 return (__m512i)__builtin_ia32_vpdpbuud512((__v16si)__W, (__v64qu)__A,
148 (__v16si)__B);148 (__v64qu)__B);
149}149}
150150
151static __inline__ __m512i __DEFAULT_FN_ATTRS151static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -164,8 +164,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbuud_epi32(...@@ -164,8 +164,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbuud_epi32(
164static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbuuds_epi32(__m512i __W,164static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbuuds_epi32(__m512i __W,
165 __m512i __A,165 __m512i __A,
166 __m512i __B) {166 __m512i __B) {
167 return (__m512i)__builtin_ia32_vpdpbuuds512((__v16si)__W, (__v16si)__A,167 return (__m512i)__builtin_ia32_vpdpbuuds512((__v16si)__W, (__v64qu)__A,
168 (__v16si)__B);168 (__v64qu)__B);
169}169}
170170
171static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbuuds_epi32(171static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbuuds_epi32(
...@@ -185,8 +185,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbuuds_epi32(...@@ -185,8 +185,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbuuds_epi32(
185static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwsud_epi32(__m512i __A,185static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwsud_epi32(__m512i __A,
186 __m512i __B,186 __m512i __B,
187 __m512i __C) {187 __m512i __C) {
188 return (__m512i)__builtin_ia32_vpdpwsud512((__v16si)__A, (__v16si)__B,188 return (__m512i)__builtin_ia32_vpdpwsud512((__v16si)__A, (__v32hi)__B,
189 (__v16si)__C);189 (__v32hu)__C);
190}190}
191191
192static __inline__ __m512i __DEFAULT_FN_ATTRS192static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -197,7 +197,7 @@ _mm512_mask_dpwsud_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {...@@ -197,7 +197,7 @@ _mm512_mask_dpwsud_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {
197}197}
198198
199static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsud_epi32(199static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsud_epi32(
200 __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {200 __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) {
201 return (__m512i)__builtin_ia32_selectd_512(201 return (__m512i)__builtin_ia32_selectd_512(
202 (__mmask16)__U, (__v16si)_mm512_dpwsud_epi32(__A, __B, __C),202 (__mmask16)__U, (__v16si)_mm512_dpwsud_epi32(__A, __B, __C),
203 (__v16si)_mm512_setzero_si512());203 (__v16si)_mm512_setzero_si512());
...@@ -206,8 +206,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsud_epi32(...@@ -206,8 +206,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsud_epi32(
206static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwsuds_epi32(__m512i __A,206static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwsuds_epi32(__m512i __A,
207 __m512i __B,207 __m512i __B,
208 __m512i __C) {208 __m512i __C) {
209 return (__m512i)__builtin_ia32_vpdpwsuds512((__v16si)__A, (__v16si)__B,209 return (__m512i)__builtin_ia32_vpdpwsuds512((__v16si)__A, (__v32hi)__B,
210 (__v16si)__C);210 (__v32hu)__C);
211}211}
212212
213static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwsuds_epi32(213static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwsuds_epi32(
...@@ -218,7 +218,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwsuds_epi32(...@@ -218,7 +218,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwsuds_epi32(
218}218}
219219
220static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsuds_epi32(220static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsuds_epi32(
221 __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {221 __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) {
222 return (__m512i)__builtin_ia32_selectd_512(222 return (__m512i)__builtin_ia32_selectd_512(
223 (__mmask16)__U, (__v16si)_mm512_dpwsuds_epi32(__A, __B, __C),223 (__mmask16)__U, (__v16si)_mm512_dpwsuds_epi32(__A, __B, __C),
224 (__v16si)_mm512_setzero_si512());224 (__v16si)_mm512_setzero_si512());
...@@ -227,8 +227,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsuds_epi32(...@@ -227,8 +227,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsuds_epi32(
227static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwusd_epi32(__m512i __A,227static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwusd_epi32(__m512i __A,
228 __m512i __B,228 __m512i __B,
229 __m512i __C) {229 __m512i __C) {
230 return (__m512i)__builtin_ia32_vpdpwusd512((__v16si)__A, (__v16si)__B,230 return (__m512i)__builtin_ia32_vpdpwusd512((__v16si)__A, (__v32hu)__B,
231 (__v16si)__C);231 (__v32hi)__C);
232}232}
233233
234static __inline__ __m512i __DEFAULT_FN_ATTRS234static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -239,7 +239,7 @@ _mm512_mask_dpwusd_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {...@@ -239,7 +239,7 @@ _mm512_mask_dpwusd_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {
239}239}
240240
241static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusd_epi32(241static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusd_epi32(
242 __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {242 __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) {
243 return (__m512i)__builtin_ia32_selectd_512(243 return (__m512i)__builtin_ia32_selectd_512(
244 (__mmask16)__U, (__v16si)_mm512_dpwusd_epi32(__A, __B, __C),244 (__mmask16)__U, (__v16si)_mm512_dpwusd_epi32(__A, __B, __C),
245 (__v16si)_mm512_setzero_si512());245 (__v16si)_mm512_setzero_si512());
...@@ -248,8 +248,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusd_epi32(...@@ -248,8 +248,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusd_epi32(
248static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwusds_epi32(__m512i __A,248static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwusds_epi32(__m512i __A,
249 __m512i __B,249 __m512i __B,
250 __m512i __C) {250 __m512i __C) {
251 return (__m512i)__builtin_ia32_vpdpwusds512((__v16si)__A, (__v16si)__B,251 return (__m512i)__builtin_ia32_vpdpwusds512((__v16si)__A, (__v32hu)__B,
252 (__v16si)__C);252 (__v32hi)__C);
253}253}
254254
255static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwusds_epi32(255static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwusds_epi32(
...@@ -260,7 +260,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwusds_epi32(...@@ -260,7 +260,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwusds_epi32(
260}260}
261261
262static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusds_epi32(262static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusds_epi32(
263 __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {263 __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) {
264 return (__m512i)__builtin_ia32_selectd_512(264 return (__m512i)__builtin_ia32_selectd_512(
265 (__mmask16)__U, (__v16si)_mm512_dpwusds_epi32(__A, __B, __C),265 (__mmask16)__U, (__v16si)_mm512_dpwusds_epi32(__A, __B, __C),
266 (__v16si)_mm512_setzero_si512());266 (__v16si)_mm512_setzero_si512());
...@@ -269,8 +269,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusds_epi32(...@@ -269,8 +269,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusds_epi32(
269static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwuud_epi32(__m512i __A,269static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwuud_epi32(__m512i __A,
270 __m512i __B,270 __m512i __B,
271 __m512i __C) {271 __m512i __C) {
272 return (__m512i)__builtin_ia32_vpdpwuud512((__v16si)__A, (__v16si)__B,272 return (__m512i)__builtin_ia32_vpdpwuud512((__v16si)__A, (__v32hu)__B,
273 (__v16si)__C);273 (__v32hu)__C);
274}274}
275275
276static __inline__ __m512i __DEFAULT_FN_ATTRS276static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -281,7 +281,7 @@ _mm512_mask_dpwuud_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {...@@ -281,7 +281,7 @@ _mm512_mask_dpwuud_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {
281}281}
282282
283static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuud_epi32(283static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuud_epi32(
284 __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {284 __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) {
285 return (__m512i)__builtin_ia32_selectd_512(285 return (__m512i)__builtin_ia32_selectd_512(
286 (__mmask16)__U, (__v16si)_mm512_dpwuud_epi32(__A, __B, __C),286 (__mmask16)__U, (__v16si)_mm512_dpwuud_epi32(__A, __B, __C),
287 (__v16si)_mm512_setzero_si512());287 (__v16si)_mm512_setzero_si512());
...@@ -290,8 +290,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuud_epi32(...@@ -290,8 +290,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuud_epi32(
290static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwuuds_epi32(__m512i __A,290static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwuuds_epi32(__m512i __A,
291 __m512i __B,291 __m512i __B,
292 __m512i __C) {292 __m512i __C) {
293 return (__m512i)__builtin_ia32_vpdpwuuds512((__v16si)__A, (__v16si)__B,293 return (__m512i)__builtin_ia32_vpdpwuuds512((__v16si)__A, (__v32hu)__B,
294 (__v16si)__C);294 (__v32hu)__C);
295}295}
296296
297static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwuuds_epi32(297static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwuuds_epi32(
...@@ -302,7 +302,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwuuds_epi32(...@@ -302,7 +302,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwuuds_epi32(
302}302}
303303
304static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuuds_epi32(304static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuuds_epi32(
305 __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) {305 __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) {
306 return (__m512i)__builtin_ia32_selectd_512(306 return (__m512i)__builtin_ia32_selectd_512(
307 (__mmask16)__U, (__v16si)_mm512_dpwuuds_epi32(__A, __B, __C),307 (__mmask16)__U, (__v16si)_mm512_dpwuuds_epi32(__A, __B, __C),
308 (__v16si)_mm512_setzero_si512());308 (__v16si)_mm512_setzero_si512());
lib/include/avx10_2_512satcvtdsintrin.h+1-1
...@@ -16,7 +16,7 @@...@@ -16,7 +16,7 @@
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS \18#define __DEFAULT_FN_ATTRS \
19 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \19 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
20 __min_vector_width__(512)))20 __min_vector_width__(512)))
2121
22// 512 bit : Double -> Int22// 512 bit : Double -> Int
lib/include/avx10_2bf16intrin.h+54-45
...@@ -21,12 +21,20 @@ typedef __bf16 __m256bh_u __attribute__((__vector_size__(32), __aligned__(1)));...@@ -21,12 +21,20 @@ typedef __bf16 __m256bh_u __attribute__((__vector_size__(32), __aligned__(1)));
2121
22/* Define the default attributes for the functions in this file. */22/* Define the default attributes for the functions in this file. */
23#define __DEFAULT_FN_ATTRS256 \23#define __DEFAULT_FN_ATTRS256 \
24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
25 __min_vector_width__(256)))25 __min_vector_width__(256)))
26#define __DEFAULT_FN_ATTRS128 \26#define __DEFAULT_FN_ATTRS128 \
27 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \27 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
28 __min_vector_width__(128)))28 __min_vector_width__(128)))
2929
30#if defined(__cplusplus) && (__cplusplus >= 201103L)
31#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
32#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
33#else
34#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
35#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
36#endif
37
30static __inline __m256bh __DEFAULT_FN_ATTRS256 _mm256_setzero_pbh(void) {38static __inline __m256bh __DEFAULT_FN_ATTRS256 _mm256_setzero_pbh(void) {
31 return __builtin_bit_cast(__m256bh, _mm256_setzero_ps());39 return __builtin_bit_cast(__m256bh, _mm256_setzero_ps());
32}40}
...@@ -213,12 +221,12 @@ static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_move_sbh(__m128bh __a,...@@ -213,12 +221,12 @@ static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_move_sbh(__m128bh __a,
213 return __a;221 return __a;
214}222}
215223
216static __inline__ __m128bh __DEFAULT_FN_ATTRS128224static __inline__ __m128bh __DEFAULT_FN_ATTRS128_CONSTEXPR
217_mm_mask_move_sbh(__m128bh __W, __mmask8 __U, __m128bh __A, __m128bh __B) {225_mm_mask_move_sbh(__m128bh __W, __mmask8 __U, __m128bh __A, __m128bh __B) {
218 return __builtin_ia32_selectsbf_128(__U, _mm_move_sbh(__A, __B), __W);226 return __builtin_ia32_selectsbf_128(__U, _mm_move_sbh(__A, __B), __W);
219}227}
220228
221static __inline__ __m128bh __DEFAULT_FN_ATTRS128229static __inline__ __m128bh __DEFAULT_FN_ATTRS128_CONSTEXPR
222_mm_maskz_move_sbh(__mmask8 __U, __m128bh __A, __m128bh __B) {230_mm_maskz_move_sbh(__mmask8 __U, __m128bh __A, __m128bh __B) {
223 return __builtin_ia32_selectsbf_128(__U, _mm_move_sbh(__A, __B),231 return __builtin_ia32_selectsbf_128(__U, _mm_move_sbh(__A, __B),
224 _mm_setzero_pbh());232 _mm_setzero_pbh());
...@@ -287,24 +295,24 @@ _mm256_mask_blend_pbh(__mmask16 __U, __m256bh __A, __m256bh __W) {...@@ -287,24 +295,24 @@ _mm256_mask_blend_pbh(__mmask16 __U, __m256bh __A, __m256bh __W) {
287 (__v16bf)__A);295 (__v16bf)__A);
288}296}
289297
290static __inline__ __m128bh __DEFAULT_FN_ATTRS128298static __inline__ __m128bh __DEFAULT_FN_ATTRS128_CONSTEXPR
291_mm_permutex2var_pbh(__m128bh __A, __m128i __I, __m128bh __B) {299_mm_permutex2var_pbh(__m128bh __A, __m128i __I, __m128bh __B) {
292 return (__m128bh)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I,300 return (__m128bh)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I,
293 (__v8hi)__B);301 (__v8hi)__B);
294}302}
295303
296static __inline__ __m256bh __DEFAULT_FN_ATTRS256304static __inline__ __m256bh __DEFAULT_FN_ATTRS256_CONSTEXPR
297_mm256_permutex2var_pbh(__m256bh __A, __m256i __I, __m256bh __B) {305_mm256_permutex2var_pbh(__m256bh __A, __m256i __I, __m256bh __B) {
298 return (__m256bh)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I,306 return (__m256bh)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I,
299 (__v16hi)__B);307 (__v16hi)__B);
300}308}
301309
302static __inline__ __m128bh __DEFAULT_FN_ATTRS128310static __inline__ __m128bh __DEFAULT_FN_ATTRS128_CONSTEXPR
303_mm_permutexvar_pbh(__m128i __A, __m128bh __B) {311_mm_permutexvar_pbh(__m128i __A, __m128bh __B) {
304 return (__m128bh)__builtin_ia32_permvarhi128((__v8hi)__B, (__v8hi)__A);312 return (__m128bh)__builtin_ia32_permvarhi128((__v8hi)__B, (__v8hi)__A);
305}313}
306314
307static __inline__ __m256bh __DEFAULT_FN_ATTRS256315static __inline__ __m256bh __DEFAULT_FN_ATTRS256_CONSTEXPR
308_mm256_permutexvar_pbh(__m256i __A, __m256bh __B) {316_mm256_permutexvar_pbh(__m256i __A, __m256bh __B) {
309 return (__m256bh)__builtin_ia32_permvarhi256((__v16hi)__B, (__v16hi)__A);317 return (__m256bh)__builtin_ia32_permvarhi256((__v16hi)__B, (__v16hi)__A);
310}318}
...@@ -519,34 +527,34 @@ _mm_maskz_min_pbh(__mmask8 __U, __m128bh __A, __m128bh __B) {...@@ -519,34 +527,34 @@ _mm_maskz_min_pbh(__mmask8 __U, __m128bh __A, __m128bh __B) {
519 (__mmask8)__U, (__v8bf)_mm_min_pbh(__A, __B), (__v8bf)_mm_setzero_pbh());527 (__mmask8)__U, (__v8bf)_mm_min_pbh(__A, __B), (__v8bf)_mm_setzero_pbh());
520}528}
521529
522static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comieq_sbh(__m128bh A,530static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comieq_sbh(__m128bh __A,
523 __m128bh B) {531 __m128bh __B) {
524 return __builtin_ia32_vcomisbf16eq((__v8bf)A, (__v8bf)B);532 return __builtin_ia32_vcomisbf16eq((__v8bf)__A, (__v8bf)__B);
525}533}
526534
527static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comilt_sbh(__m128bh A,535static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comilt_sbh(__m128bh __A,
528 __m128bh B) {536 __m128bh __B) {
529 return __builtin_ia32_vcomisbf16lt((__v8bf)A, (__v8bf)B);537 return __builtin_ia32_vcomisbf16lt((__v8bf)__A, (__v8bf)__B);
530}538}
531539
532static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comile_sbh(__m128bh A,540static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comile_sbh(__m128bh __A,
533 __m128bh B) {541 __m128bh __B) {
534 return __builtin_ia32_vcomisbf16le((__v8bf)A, (__v8bf)B);542 return __builtin_ia32_vcomisbf16le((__v8bf)__A, (__v8bf)__B);
535}543}
536544
537static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comigt_sbh(__m128bh A,545static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comigt_sbh(__m128bh __A,
538 __m128bh B) {546 __m128bh __B) {
539 return __builtin_ia32_vcomisbf16gt((__v8bf)A, (__v8bf)B);547 return __builtin_ia32_vcomisbf16gt((__v8bf)__A, (__v8bf)__B);
540}548}
541549
542static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comige_sbh(__m128bh A,550static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comige_sbh(__m128bh __A,
543 __m128bh B) {551 __m128bh __B) {
544 return __builtin_ia32_vcomisbf16ge((__v8bf)A, (__v8bf)B);552 return __builtin_ia32_vcomisbf16ge((__v8bf)__A, (__v8bf)__B);
545}553}
546554
547static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comineq_sbh(__m128bh A,555static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comineq_sbh(__m128bh __A,
548 __m128bh B) {556 __m128bh __B) {
549 return __builtin_ia32_vcomisbf16neq((__v8bf)A, (__v8bf)B);557 return __builtin_ia32_vcomisbf16neq((__v8bf)__A, (__v8bf)__B);
550}558}
551559
552#define _mm256_cmp_pbh_mask(__A, __B, __P) \560#define _mm256_cmp_pbh_mask(__A, __B, __P) \
...@@ -818,7 +826,7 @@ _mm_maskz_rsqrt_pbh(__mmask8 __U, __m128bh __A) {...@@ -818,7 +826,7 @@ _mm_maskz_rsqrt_pbh(__mmask8 __U, __m128bh __A) {
818 (__v8bf)_mm_setzero_pbh(), (__mmask8)(__U)))826 (__v8bf)_mm_setzero_pbh(), (__mmask8)(__U)))
819827
820static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_sqrt_pbh(__m256bh __A) {828static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_sqrt_pbh(__m256bh __A) {
821 return (__m256bh)__builtin_ia32_vsqrtbf16256((__v16bf)__A);829 return __builtin_elementwise_sqrt(__A);
822}830}
823831
824static __inline__ __m256bh __DEFAULT_FN_ATTRS256832static __inline__ __m256bh __DEFAULT_FN_ATTRS256
...@@ -835,7 +843,7 @@ _mm256_maskz_sqrt_pbh(__mmask16 __U, __m256bh __A) {...@@ -835,7 +843,7 @@ _mm256_maskz_sqrt_pbh(__mmask16 __U, __m256bh __A) {
835}843}
836844
837static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_sqrt_pbh(__m128bh __A) {845static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_sqrt_pbh(__m128bh __A) {
838 return (__m128bh)__builtin_ia32_vsqrtbf16((__v8bf)__A);846 return __builtin_elementwise_sqrt(__A);
839}847}
840848
841static __inline__ __m128bh __DEFAULT_FN_ATTRS128849static __inline__ __m128bh __DEFAULT_FN_ATTRS128
...@@ -852,8 +860,8 @@ _mm_maskz_sqrt_pbh(__mmask8 __U, __m128bh __A) {...@@ -852,8 +860,8 @@ _mm_maskz_sqrt_pbh(__mmask8 __U, __m128bh __A) {
852860
853static __inline__ __m256bh __DEFAULT_FN_ATTRS256861static __inline__ __m256bh __DEFAULT_FN_ATTRS256
854_mm256_fmadd_pbh(__m256bh __A, __m256bh __B, __m256bh __C) {862_mm256_fmadd_pbh(__m256bh __A, __m256bh __B, __m256bh __C) {
855 return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, (__v16bf)__B,863 return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, (__v16bf)__B,
856 (__v16bf)__C);864 (__v16bf)__C);
857}865}
858866
859static __inline__ __m256bh __DEFAULT_FN_ATTRS256867static __inline__ __m256bh __DEFAULT_FN_ATTRS256
...@@ -880,8 +888,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fmadd_pbh(...@@ -880,8 +888,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fmadd_pbh(
880888
881static __inline__ __m256bh __DEFAULT_FN_ATTRS256889static __inline__ __m256bh __DEFAULT_FN_ATTRS256
882_mm256_fmsub_pbh(__m256bh __A, __m256bh __B, __m256bh __C) {890_mm256_fmsub_pbh(__m256bh __A, __m256bh __B, __m256bh __C) {
883 return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, (__v16bf)__B,891 return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, (__v16bf)__B,
884 -(__v16bf)__C);892 -(__v16bf)__C);
885}893}
886894
887static __inline__ __m256bh __DEFAULT_FN_ATTRS256895static __inline__ __m256bh __DEFAULT_FN_ATTRS256
...@@ -908,8 +916,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsub_pbh(...@@ -908,8 +916,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsub_pbh(
908916
909static __inline__ __m256bh __DEFAULT_FN_ATTRS256917static __inline__ __m256bh __DEFAULT_FN_ATTRS256
910_mm256_fnmadd_pbh(__m256bh __A, __m256bh __B, __m256bh __C) {918_mm256_fnmadd_pbh(__m256bh __A, __m256bh __B, __m256bh __C) {
911 return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, -(__v16bf)__B,919 return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, -(__v16bf)__B,
912 (__v16bf)__C);920 (__v16bf)__C);
913}921}
914922
915static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_mask_fnmadd_pbh(923static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_mask_fnmadd_pbh(
...@@ -938,8 +946,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmadd_pbh(...@@ -938,8 +946,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmadd_pbh(
938946
939static __inline__ __m256bh __DEFAULT_FN_ATTRS256947static __inline__ __m256bh __DEFAULT_FN_ATTRS256
940_mm256_fnmsub_pbh(__m256bh __A, __m256bh __B, __m256bh __C) {948_mm256_fnmsub_pbh(__m256bh __A, __m256bh __B, __m256bh __C) {
941 return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, -(__v16bf)__B,949 return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, -(__v16bf)__B,
942 -(__v16bf)__C);950 -(__v16bf)__C);
943}951}
944952
945static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_mask_fnmsub_pbh(953static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_mask_fnmsub_pbh(
...@@ -969,8 +977,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmsub_pbh(...@@ -969,8 +977,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmsub_pbh(
969static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fmadd_pbh(__m128bh __A,977static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fmadd_pbh(__m128bh __A,
970 __m128bh __B,978 __m128bh __B,
971 __m128bh __C) {979 __m128bh __C) {
972 return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, (__v8bf)__B,980 return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, (__v8bf)__B,
973 (__v8bf)__C);981 (__v8bf)__C);
974}982}
975983
976static __inline__ __m128bh __DEFAULT_FN_ATTRS128984static __inline__ __m128bh __DEFAULT_FN_ATTRS128
...@@ -997,8 +1005,8 @@ _mm_maskz_fmadd_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) {...@@ -997,8 +1005,8 @@ _mm_maskz_fmadd_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) {
997static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fmsub_pbh(__m128bh __A,1005static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fmsub_pbh(__m128bh __A,
998 __m128bh __B,1006 __m128bh __B,
999 __m128bh __C) {1007 __m128bh __C) {
1000 return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, (__v8bf)__B,1008 return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, (__v8bf)__B,
1001 -(__v8bf)__C);1009 -(__v8bf)__C);
1002}1010}
10031011
1004static __inline__ __m128bh __DEFAULT_FN_ATTRS1281012static __inline__ __m128bh __DEFAULT_FN_ATTRS128
...@@ -1025,8 +1033,8 @@ _mm_maskz_fmsub_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) {...@@ -1025,8 +1033,8 @@ _mm_maskz_fmsub_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) {
1025static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fnmadd_pbh(__m128bh __A,1033static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fnmadd_pbh(__m128bh __A,
1026 __m128bh __B,1034 __m128bh __B,
1027 __m128bh __C) {1035 __m128bh __C) {
1028 return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, -(__v8bf)__B,1036 return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, -(__v8bf)__B,
1029 (__v8bf)__C);1037 (__v8bf)__C);
1030}1038}
10311039
1032static __inline__ __m128bh __DEFAULT_FN_ATTRS1281040static __inline__ __m128bh __DEFAULT_FN_ATTRS128
...@@ -1053,8 +1061,8 @@ _mm_maskz_fnmadd_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) {...@@ -1053,8 +1061,8 @@ _mm_maskz_fnmadd_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) {
1053static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fnmsub_pbh(__m128bh __A,1061static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fnmsub_pbh(__m128bh __A,
1054 __m128bh __B,1062 __m128bh __B,
1055 __m128bh __C) {1063 __m128bh __C) {
1056 return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, -(__v8bf)__B,1064 return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, -(__v8bf)__B,
1057 -(__v8bf)__C);1065 -(__v8bf)__C);
1058}1066}
10591067
1060static __inline__ __m128bh __DEFAULT_FN_ATTRS1281068static __inline__ __m128bh __DEFAULT_FN_ATTRS128
...@@ -1080,6 +1088,7 @@ _mm_maskz_fnmsub_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) {...@@ -1080,6 +1088,7 @@ _mm_maskz_fnmsub_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) {
10801088
1081#undef __DEFAULT_FN_ATTRS1281089#undef __DEFAULT_FN_ATTRS128
1082#undef __DEFAULT_FN_ATTRS2561090#undef __DEFAULT_FN_ATTRS256
10831091#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
1092#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
1084#endif1093#endif
1085#endif1094#endif
lib/include/avx10_2convertintrin.h+2-2
...@@ -18,10 +18,10 @@...@@ -18,10 +18,10 @@
1818
19/* Define the default attributes for the functions in this file. */19/* Define the default attributes for the functions in this file. */
20#define __DEFAULT_FN_ATTRS128 \20#define __DEFAULT_FN_ATTRS128 \
21 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \21 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
22 __min_vector_width__(128)))22 __min_vector_width__(128)))
23#define __DEFAULT_FN_ATTRS256 \23#define __DEFAULT_FN_ATTRS256 \
24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
25 __min_vector_width__(256)))25 __min_vector_width__(256)))
2626
27// clang-format off27// clang-format off
lib/include/avx10_2copyintrin.h+1-1
...@@ -16,7 +16,7 @@...@@ -16,7 +16,7 @@
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS128 \18#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \19 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
20 __min_vector_width__(128)))20 __min_vector_width__(128)))
2121
22/// Constructs a 128-bit integer vector, setting the lower 32 bits to the22/// Constructs a 128-bit integer vector, setting the lower 32 bits to the
lib/include/avx10_2niintrin.h+14-14
...@@ -16,10 +16,10 @@...@@ -16,10 +16,10 @@
16#define __AVX10_2NIINTRIN_H16#define __AVX10_2NIINTRIN_H
1717
18#define __DEFAULT_FN_ATTRS128 \18#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \19 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
20 __min_vector_width__(128)))20 __min_vector_width__(128)))
21#define __DEFAULT_FN_ATTRS256 \21#define __DEFAULT_FN_ATTRS256 \
22 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \22 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
23 __min_vector_width__(256)))23 __min_vector_width__(256)))
2424
25/* VNNI FP16 */25/* VNNI FP16 */
...@@ -253,7 +253,7 @@ _mm_mask_dpwsud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {...@@ -253,7 +253,7 @@ _mm_mask_dpwsud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {
253}253}
254254
255static __inline__ __m128i __DEFAULT_FN_ATTRS128255static __inline__ __m128i __DEFAULT_FN_ATTRS128
256_mm_maskz_dpwsud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {256_mm_maskz_dpwsud_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) {
257 return (__m128i)__builtin_ia32_selectd_128(257 return (__m128i)__builtin_ia32_selectd_128(
258 (__mmask8)__U, (__v4si)_mm_dpwsud_epi32(__A, __B, __C),258 (__mmask8)__U, (__v4si)_mm_dpwsud_epi32(__A, __B, __C),
259 (__v4si)_mm_setzero_si128());259 (__v4si)_mm_setzero_si128());
...@@ -266,7 +266,7 @@ _mm256_mask_dpwsud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {...@@ -266,7 +266,7 @@ _mm256_mask_dpwsud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {
266}266}
267267
268static __inline__ __m256i __DEFAULT_FN_ATTRS256268static __inline__ __m256i __DEFAULT_FN_ATTRS256
269_mm256_maskz_dpwsud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {269_mm256_maskz_dpwsud_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) {
270 return (__m256i)__builtin_ia32_selectd_256(270 return (__m256i)__builtin_ia32_selectd_256(
271 (__mmask8)__U, (__v8si)_mm256_dpwsud_epi32(__A, __B, __C),271 (__mmask8)__U, (__v8si)_mm256_dpwsud_epi32(__A, __B, __C),
272 (__v8si)_mm256_setzero_si256());272 (__v8si)_mm256_setzero_si256());
...@@ -279,7 +279,7 @@ _mm_mask_dpwsuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {...@@ -279,7 +279,7 @@ _mm_mask_dpwsuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {
279}279}
280280
281static __inline__ __m128i __DEFAULT_FN_ATTRS128281static __inline__ __m128i __DEFAULT_FN_ATTRS128
282_mm_maskz_dpwsuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {282_mm_maskz_dpwsuds_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) {
283 return (__m128i)__builtin_ia32_selectd_128(283 return (__m128i)__builtin_ia32_selectd_128(
284 (__mmask8)__U, (__v4si)_mm_dpwsuds_epi32(__A, __B, __C),284 (__mmask8)__U, (__v4si)_mm_dpwsuds_epi32(__A, __B, __C),
285 (__v4si)_mm_setzero_si128());285 (__v4si)_mm_setzero_si128());
...@@ -292,7 +292,7 @@ _mm256_mask_dpwsuds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {...@@ -292,7 +292,7 @@ _mm256_mask_dpwsuds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {
292}292}
293293
294static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwsuds_epi32(294static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwsuds_epi32(
295 __m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {295 __mmask8 __U, __m256i __A, __m256i __B, __m256i __C) {
296 return (__m256i)__builtin_ia32_selectd_256(296 return (__m256i)__builtin_ia32_selectd_256(
297 (__mmask8)__U, (__v8si)_mm256_dpwsuds_epi32(__A, __B, __C),297 (__mmask8)__U, (__v8si)_mm256_dpwsuds_epi32(__A, __B, __C),
298 (__v8si)_mm256_setzero_si256());298 (__v8si)_mm256_setzero_si256());
...@@ -305,7 +305,7 @@ _mm_mask_dpwusd_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {...@@ -305,7 +305,7 @@ _mm_mask_dpwusd_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {
305}305}
306306
307static __inline__ __m128i __DEFAULT_FN_ATTRS128307static __inline__ __m128i __DEFAULT_FN_ATTRS128
308_mm_maskz_dpwusd_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {308_mm_maskz_dpwusd_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) {
309 return (__m128i)__builtin_ia32_selectd_128(309 return (__m128i)__builtin_ia32_selectd_128(
310 (__mmask8)__U, (__v4si)_mm_dpwusd_epi32(__A, __B, __C),310 (__mmask8)__U, (__v4si)_mm_dpwusd_epi32(__A, __B, __C),
311 (__v4si)_mm_setzero_si128());311 (__v4si)_mm_setzero_si128());
...@@ -318,7 +318,7 @@ _mm256_mask_dpwusd_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {...@@ -318,7 +318,7 @@ _mm256_mask_dpwusd_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {
318}318}
319319
320static __inline__ __m256i __DEFAULT_FN_ATTRS256320static __inline__ __m256i __DEFAULT_FN_ATTRS256
321_mm256_maskz_dpwusd_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {321_mm256_maskz_dpwusd_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) {
322 return (__m256i)__builtin_ia32_selectd_256(322 return (__m256i)__builtin_ia32_selectd_256(
323 (__mmask8)__U, (__v8si)_mm256_dpwusd_epi32(__A, __B, __C),323 (__mmask8)__U, (__v8si)_mm256_dpwusd_epi32(__A, __B, __C),
324 (__v8si)_mm256_setzero_si256());324 (__v8si)_mm256_setzero_si256());
...@@ -331,7 +331,7 @@ _mm_mask_dpwusds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {...@@ -331,7 +331,7 @@ _mm_mask_dpwusds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {
331}331}
332332
333static __inline__ __m128i __DEFAULT_FN_ATTRS128333static __inline__ __m128i __DEFAULT_FN_ATTRS128
334_mm_maskz_dpwusds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {334_mm_maskz_dpwusds_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) {
335 return (__m128i)__builtin_ia32_selectd_128(335 return (__m128i)__builtin_ia32_selectd_128(
336 (__mmask8)__U, (__v4si)_mm_dpwusds_epi32(__A, __B, __C),336 (__mmask8)__U, (__v4si)_mm_dpwusds_epi32(__A, __B, __C),
337 (__v4si)_mm_setzero_si128());337 (__v4si)_mm_setzero_si128());
...@@ -344,7 +344,7 @@ _mm256_mask_dpwusds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {...@@ -344,7 +344,7 @@ _mm256_mask_dpwusds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {
344}344}
345345
346static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwusds_epi32(346static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwusds_epi32(
347 __m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {347 __mmask8 __U, __m256i __A, __m256i __B, __m256i __C) {
348 return (__m256i)__builtin_ia32_selectd_256(348 return (__m256i)__builtin_ia32_selectd_256(
349 (__mmask8)__U, (__v8si)_mm256_dpwusds_epi32(__A, __B, __C),349 (__mmask8)__U, (__v8si)_mm256_dpwusds_epi32(__A, __B, __C),
350 (__v8si)_mm256_setzero_si256());350 (__v8si)_mm256_setzero_si256());
...@@ -357,7 +357,7 @@ _mm_mask_dpwuud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {...@@ -357,7 +357,7 @@ _mm_mask_dpwuud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {
357}357}
358358
359static __inline__ __m128i __DEFAULT_FN_ATTRS128359static __inline__ __m128i __DEFAULT_FN_ATTRS128
360_mm_maskz_dpwuud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {360_mm_maskz_dpwuud_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) {
361 return (__m128i)__builtin_ia32_selectd_128(361 return (__m128i)__builtin_ia32_selectd_128(
362 (__mmask8)__U, (__v4si)_mm_dpwuud_epi32(__A, __B, __C),362 (__mmask8)__U, (__v4si)_mm_dpwuud_epi32(__A, __B, __C),
363 (__v4si)_mm_setzero_si128());363 (__v4si)_mm_setzero_si128());
...@@ -370,7 +370,7 @@ _mm256_mask_dpwuud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {...@@ -370,7 +370,7 @@ _mm256_mask_dpwuud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {
370}370}
371371
372static __inline__ __m256i __DEFAULT_FN_ATTRS256372static __inline__ __m256i __DEFAULT_FN_ATTRS256
373_mm256_maskz_dpwuud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {373_mm256_maskz_dpwuud_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) {
374 return (__m256i)__builtin_ia32_selectd_256(374 return (__m256i)__builtin_ia32_selectd_256(
375 (__mmask8)__U, (__v8si)_mm256_dpwuud_epi32(__A, __B, __C),375 (__mmask8)__U, (__v8si)_mm256_dpwuud_epi32(__A, __B, __C),
376 (__v8si)_mm256_setzero_si256());376 (__v8si)_mm256_setzero_si256());
...@@ -383,7 +383,7 @@ _mm_mask_dpwuuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {...@@ -383,7 +383,7 @@ _mm_mask_dpwuuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {
383}383}
384384
385static __inline__ __m128i __DEFAULT_FN_ATTRS128385static __inline__ __m128i __DEFAULT_FN_ATTRS128
386_mm_maskz_dpwuuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) {386_mm_maskz_dpwuuds_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) {
387 return (__m128i)__builtin_ia32_selectd_128(387 return (__m128i)__builtin_ia32_selectd_128(
388 (__mmask8)__U, (__v4si)_mm_dpwuuds_epi32(__A, __B, __C),388 (__mmask8)__U, (__v4si)_mm_dpwuuds_epi32(__A, __B, __C),
389 (__v4si)_mm_setzero_si128());389 (__v4si)_mm_setzero_si128());
...@@ -396,7 +396,7 @@ _mm256_mask_dpwuuds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {...@@ -396,7 +396,7 @@ _mm256_mask_dpwuuds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {
396}396}
397397
398static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwuuds_epi32(398static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwuuds_epi32(
399 __m256i __A, __mmask8 __U, __m256i __B, __m256i __C) {399 __mmask8 __U, __m256i __A, __m256i __B, __m256i __C) {
400 return (__m256i)__builtin_ia32_selectd_256(400 return (__m256i)__builtin_ia32_selectd_256(
401 (__mmask8)__U, (__v8si)_mm256_dpwuuds_epi32(__A, __B, __C),401 (__mmask8)__U, (__v8si)_mm256_dpwuuds_epi32(__A, __B, __C),
402 (__v8si)_mm256_setzero_si256());402 (__v8si)_mm256_setzero_si256());
lib/include/avx10_2satcvtdsintrin.h+2-2
...@@ -17,11 +17,11 @@...@@ -17,11 +17,11 @@
1717
18/* Define the default attributes for the functions in this file. */18/* Define the default attributes for the functions in this file. */
19#define __DEFAULT_FN_ATTRS256 \19#define __DEFAULT_FN_ATTRS256 \
20 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \20 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
21 __min_vector_width__(256)))21 __min_vector_width__(256)))
2222
23#define __DEFAULT_FN_ATTRS128 \23#define __DEFAULT_FN_ATTRS128 \
24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \24 __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \
25 __min_vector_width__(128)))25 __min_vector_width__(128)))
2626
27#define _mm_cvtts_roundsd_i32(__A, __R) \27#define _mm_cvtts_roundsd_i32(__A, __R) \
lib/include/avx2intrin.h+275-377
...@@ -15,20 +15,19 @@...@@ -15,20 +15,19 @@
15#define __AVX2INTRIN_H15#define __AVX2INTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#if defined(__EVEX512__) && !defined(__AVX10_1_512__)
19#define __DEFAULT_FN_ATTRS256 \
20 __attribute__((__always_inline__, __nodebug__, \
21 __target__("avx2,no-evex512"), __min_vector_width__(256)))
22#define __DEFAULT_FN_ATTRS128 \
23 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx2,no-evex512"), __min_vector_width__(128)))
25#else
26#define __DEFAULT_FN_ATTRS256 \18#define __DEFAULT_FN_ATTRS256 \
27 __attribute__((__always_inline__, __nodebug__, __target__("avx2"), \19 __attribute__((__always_inline__, __nodebug__, __target__("avx2"), \
28 __min_vector_width__(256)))20 __min_vector_width__(256)))
29#define __DEFAULT_FN_ATTRS128 \21#define __DEFAULT_FN_ATTRS128 \
30 __attribute__((__always_inline__, __nodebug__, __target__("avx2"), \22 __attribute__((__always_inline__, __nodebug__, __target__("avx2"), \
31 __min_vector_width__(128)))23 __min_vector_width__(128)))
24
25#if defined(__cplusplus) && (__cplusplus >= 201103L)
26#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
27#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
28#else
29#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
30#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
32#endif31#endif
3332
34/* SSE4 Multiple Packed Sums of Absolute Difference. */33/* SSE4 Multiple Packed Sums of Absolute Difference. */
...@@ -104,10 +103,9 @@...@@ -104,10 +103,9 @@
104/// \param __a103/// \param __a
105/// A 256-bit integer vector.104/// A 256-bit integer vector.
106/// \returns A 256-bit integer vector containing the result.105/// \returns A 256-bit integer vector containing the result.
107static __inline__ __m256i __DEFAULT_FN_ATTRS256106static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
108_mm256_abs_epi8(__m256i __a)107_mm256_abs_epi8(__m256i __a) {
109{108 return (__m256i)__builtin_elementwise_abs((__v32qs)__a);
110 return (__m256i)__builtin_elementwise_abs((__v32qs)__a);
111}109}
112110
113/// Computes the absolute value of each signed 16-bit element in the 256-bit111/// Computes the absolute value of each signed 16-bit element in the 256-bit
...@@ -121,10 +119,9 @@ _mm256_abs_epi8(__m256i __a)...@@ -121,10 +119,9 @@ _mm256_abs_epi8(__m256i __a)
121/// \param __a119/// \param __a
122/// A 256-bit vector of [16 x i16].120/// A 256-bit vector of [16 x i16].
123/// \returns A 256-bit vector of [16 x i16] containing the result.121/// \returns A 256-bit vector of [16 x i16] containing the result.
124static __inline__ __m256i __DEFAULT_FN_ATTRS256122static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
125_mm256_abs_epi16(__m256i __a)123_mm256_abs_epi16(__m256i __a) {
126{124 return (__m256i)__builtin_elementwise_abs((__v16hi)__a);
127 return (__m256i)__builtin_elementwise_abs((__v16hi)__a);
128}125}
129126
130/// Computes the absolute value of each signed 32-bit element in the 256-bit127/// Computes the absolute value of each signed 32-bit element in the 256-bit
...@@ -138,10 +135,9 @@ _mm256_abs_epi16(__m256i __a)...@@ -138,10 +135,9 @@ _mm256_abs_epi16(__m256i __a)
138/// \param __a135/// \param __a
139/// A 256-bit vector of [8 x i32].136/// A 256-bit vector of [8 x i32].
140/// \returns A 256-bit vector of [8 x i32] containing the result.137/// \returns A 256-bit vector of [8 x i32] containing the result.
141static __inline__ __m256i __DEFAULT_FN_ATTRS256138static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
142_mm256_abs_epi32(__m256i __a)139_mm256_abs_epi32(__m256i __a) {
143{140 return (__m256i)__builtin_elementwise_abs((__v8si)__a);
144 return (__m256i)__builtin_elementwise_abs((__v8si)__a);
145}141}
146142
147/// Converts the elements of two 256-bit vectors of [16 x i16] to 8-bit143/// Converts the elements of two 256-bit vectors of [16 x i16] to 8-bit
...@@ -169,9 +165,8 @@ _mm256_abs_epi32(__m256i __a)...@@ -169,9 +165,8 @@ _mm256_abs_epi32(__m256i __a)
169/// A 256-bit vector of [16 x i16] used to generate result[127:64] and165/// A 256-bit vector of [16 x i16] used to generate result[127:64] and
170/// result[255:192].166/// result[255:192].
171/// \returns A 256-bit integer vector containing the result.167/// \returns A 256-bit integer vector containing the result.
172static __inline__ __m256i __DEFAULT_FN_ATTRS256168static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
173_mm256_packs_epi16(__m256i __a, __m256i __b)169_mm256_packs_epi16(__m256i __a, __m256i __b) {
174{
175 return (__m256i)__builtin_ia32_packsswb256((__v16hi)__a, (__v16hi)__b);170 return (__m256i)__builtin_ia32_packsswb256((__v16hi)__a, (__v16hi)__b);
176}171}
177172
...@@ -201,9 +196,8 @@ _mm256_packs_epi16(__m256i __a, __m256i __b)...@@ -201,9 +196,8 @@ _mm256_packs_epi16(__m256i __a, __m256i __b)
201/// A 256-bit vector of [8 x i32] used to generate result[127:64] and196/// A 256-bit vector of [8 x i32] used to generate result[127:64] and
202/// result[255:192].197/// result[255:192].
203/// \returns A 256-bit vector of [16 x i16] containing the result.198/// \returns A 256-bit vector of [16 x i16] containing the result.
204static __inline__ __m256i __DEFAULT_FN_ATTRS256199static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
205_mm256_packs_epi32(__m256i __a, __m256i __b)200_mm256_packs_epi32(__m256i __a, __m256i __b) {
206{
207 return (__m256i)__builtin_ia32_packssdw256((__v8si)__a, (__v8si)__b);201 return (__m256i)__builtin_ia32_packssdw256((__v8si)__a, (__v8si)__b);
208}202}
209203
...@@ -232,9 +226,8 @@ _mm256_packs_epi32(__m256i __a, __m256i __b)...@@ -232,9 +226,8 @@ _mm256_packs_epi32(__m256i __a, __m256i __b)
232/// A 256-bit vector of [16 x i16] used to generate result[127:64] and226/// A 256-bit vector of [16 x i16] used to generate result[127:64] and
233/// result[255:192].227/// result[255:192].
234/// \returns A 256-bit integer vector containing the result.228/// \returns A 256-bit integer vector containing the result.
235static __inline__ __m256i __DEFAULT_FN_ATTRS256229static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
236_mm256_packus_epi16(__m256i __a, __m256i __b)230_mm256_packus_epi16(__m256i __a, __m256i __b) {
237{
238 return (__m256i)__builtin_ia32_packuswb256((__v16hi)__a, (__v16hi)__b);231 return (__m256i)__builtin_ia32_packuswb256((__v16hi)__a, (__v16hi)__b);
239}232}
240233
...@@ -264,9 +257,8 @@ _mm256_packus_epi16(__m256i __a, __m256i __b)...@@ -264,9 +257,8 @@ _mm256_packus_epi16(__m256i __a, __m256i __b)
264/// A 256-bit vector of [8 x i32] used to generate result[127:64] and257/// A 256-bit vector of [8 x i32] used to generate result[127:64] and
265/// result[255:192].258/// result[255:192].
266/// \returns A 256-bit vector of [16 x i16] containing the result.259/// \returns A 256-bit vector of [16 x i16] containing the result.
267static __inline__ __m256i __DEFAULT_FN_ATTRS256260static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
268_mm256_packus_epi32(__m256i __V1, __m256i __V2)261_mm256_packus_epi32(__m256i __V1, __m256i __V2) {
269{
270 return (__m256i) __builtin_ia32_packusdw256((__v8si)__V1, (__v8si)__V2);262 return (__m256i) __builtin_ia32_packusdw256((__v8si)__V1, (__v8si)__V2);
271}263}
272264
...@@ -283,9 +275,8 @@ _mm256_packus_epi32(__m256i __V1, __m256i __V2)...@@ -283,9 +275,8 @@ _mm256_packus_epi32(__m256i __V1, __m256i __V2)
283/// \param __b275/// \param __b
284/// A 256-bit integer vector containing one of the source operands.276/// A 256-bit integer vector containing one of the source operands.
285/// \returns A 256-bit integer vector containing the sums.277/// \returns A 256-bit integer vector containing the sums.
286static __inline__ __m256i __DEFAULT_FN_ATTRS256278static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
287_mm256_add_epi8(__m256i __a, __m256i __b)279_mm256_add_epi8(__m256i __a, __m256i __b) {
288{
289 return (__m256i)((__v32qu)__a + (__v32qu)__b);280 return (__m256i)((__v32qu)__a + (__v32qu)__b);
290}281}
291282
...@@ -302,9 +293,8 @@ _mm256_add_epi8(__m256i __a, __m256i __b)...@@ -302,9 +293,8 @@ _mm256_add_epi8(__m256i __a, __m256i __b)
302/// \param __b293/// \param __b
303/// A 256-bit vector of [16 x i16] containing one of the source operands.294/// A 256-bit vector of [16 x i16] containing one of the source operands.
304/// \returns A 256-bit vector of [16 x i16] containing the sums.295/// \returns A 256-bit vector of [16 x i16] containing the sums.
305static __inline__ __m256i __DEFAULT_FN_ATTRS256296static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
306_mm256_add_epi16(__m256i __a, __m256i __b)297_mm256_add_epi16(__m256i __a, __m256i __b) {
307{
308 return (__m256i)((__v16hu)__a + (__v16hu)__b);298 return (__m256i)((__v16hu)__a + (__v16hu)__b);
309}299}
310300
...@@ -321,9 +311,8 @@ _mm256_add_epi16(__m256i __a, __m256i __b)...@@ -321,9 +311,8 @@ _mm256_add_epi16(__m256i __a, __m256i __b)
321/// \param __b311/// \param __b
322/// A 256-bit vector of [8 x i32] containing one of the source operands.312/// A 256-bit vector of [8 x i32] containing one of the source operands.
323/// \returns A 256-bit vector of [8 x i32] containing the sums.313/// \returns A 256-bit vector of [8 x i32] containing the sums.
324static __inline__ __m256i __DEFAULT_FN_ATTRS256314static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
325_mm256_add_epi32(__m256i __a, __m256i __b)315_mm256_add_epi32(__m256i __a, __m256i __b) {
326{
327 return (__m256i)((__v8su)__a + (__v8su)__b);316 return (__m256i)((__v8su)__a + (__v8su)__b);
328}317}
329318
...@@ -340,9 +329,8 @@ _mm256_add_epi32(__m256i __a, __m256i __b)...@@ -340,9 +329,8 @@ _mm256_add_epi32(__m256i __a, __m256i __b)
340/// \param __b329/// \param __b
341/// A 256-bit vector of [4 x i64] containing one of the source operands.330/// A 256-bit vector of [4 x i64] containing one of the source operands.
342/// \returns A 256-bit vector of [4 x i64] containing the sums.331/// \returns A 256-bit vector of [4 x i64] containing the sums.
343static __inline__ __m256i __DEFAULT_FN_ATTRS256332static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
344_mm256_add_epi64(__m256i __a, __m256i __b)333_mm256_add_epi64(__m256i __a, __m256i __b) {
345{
346 return (__m256i)((__v4du)__a + (__v4du)__b);334 return (__m256i)((__v4du)__a + (__v4du)__b);
347}335}
348336
...@@ -359,9 +347,8 @@ _mm256_add_epi64(__m256i __a, __m256i __b)...@@ -359,9 +347,8 @@ _mm256_add_epi64(__m256i __a, __m256i __b)
359/// \param __b347/// \param __b
360/// A 256-bit integer vector containing one of the source operands.348/// A 256-bit integer vector containing one of the source operands.
361/// \returns A 256-bit integer vector containing the sums.349/// \returns A 256-bit integer vector containing the sums.
362static __inline__ __m256i __DEFAULT_FN_ATTRS256350static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
363_mm256_adds_epi8(__m256i __a, __m256i __b)351_mm256_adds_epi8(__m256i __a, __m256i __b) {
364{
365 return (__m256i)__builtin_elementwise_add_sat((__v32qs)__a, (__v32qs)__b);352 return (__m256i)__builtin_elementwise_add_sat((__v32qs)__a, (__v32qs)__b);
366}353}
367354
...@@ -377,9 +364,8 @@ _mm256_adds_epi8(__m256i __a, __m256i __b)...@@ -377,9 +364,8 @@ _mm256_adds_epi8(__m256i __a, __m256i __b)
377/// \param __b364/// \param __b
378/// A 256-bit vector of [16 x i16] containing one of the source operands.365/// A 256-bit vector of [16 x i16] containing one of the source operands.
379/// \returns A 256-bit vector of [16 x i16] containing the sums.366/// \returns A 256-bit vector of [16 x i16] containing the sums.
380static __inline__ __m256i __DEFAULT_FN_ATTRS256367static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
381_mm256_adds_epi16(__m256i __a, __m256i __b)368_mm256_adds_epi16(__m256i __a, __m256i __b) {
382{
383 return (__m256i)__builtin_elementwise_add_sat((__v16hi)__a, (__v16hi)__b);369 return (__m256i)__builtin_elementwise_add_sat((__v16hi)__a, (__v16hi)__b);
384}370}
385371
...@@ -396,9 +382,8 @@ _mm256_adds_epi16(__m256i __a, __m256i __b)...@@ -396,9 +382,8 @@ _mm256_adds_epi16(__m256i __a, __m256i __b)
396/// \param __b382/// \param __b
397/// A 256-bit integer vector containing one of the source operands.383/// A 256-bit integer vector containing one of the source operands.
398/// \returns A 256-bit integer vector containing the sums.384/// \returns A 256-bit integer vector containing the sums.
399static __inline__ __m256i __DEFAULT_FN_ATTRS256385static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
400_mm256_adds_epu8(__m256i __a, __m256i __b)386_mm256_adds_epu8(__m256i __a, __m256i __b) {
401{
402 return (__m256i)__builtin_elementwise_add_sat((__v32qu)__a, (__v32qu)__b);387 return (__m256i)__builtin_elementwise_add_sat((__v32qu)__a, (__v32qu)__b);
403}388}
404389
...@@ -414,9 +399,8 @@ _mm256_adds_epu8(__m256i __a, __m256i __b)...@@ -414,9 +399,8 @@ _mm256_adds_epu8(__m256i __a, __m256i __b)
414/// \param __b399/// \param __b
415/// A 256-bit vector of [16 x i16] containing one of the source operands.400/// A 256-bit vector of [16 x i16] containing one of the source operands.
416/// \returns A 256-bit vector of [16 x i16] containing the sums.401/// \returns A 256-bit vector of [16 x i16] containing the sums.
417static __inline__ __m256i __DEFAULT_FN_ATTRS256402static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
418_mm256_adds_epu16(__m256i __a, __m256i __b)403_mm256_adds_epu16(__m256i __a, __m256i __b) {
419{
420 return (__m256i)__builtin_elementwise_add_sat((__v16hu)__a, (__v16hu)__b);404 return (__m256i)__builtin_elementwise_add_sat((__v16hu)__a, (__v16hu)__b);
421}405}
422406
...@@ -460,7 +444,7 @@ _mm256_adds_epu16(__m256i __a, __m256i __b)...@@ -460,7 +444,7 @@ _mm256_adds_epu16(__m256i __a, __m256i __b)
460/// \param __b444/// \param __b
461/// A 256-bit integer vector.445/// A 256-bit integer vector.
462/// \returns A 256-bit integer vector containing the result.446/// \returns A 256-bit integer vector containing the result.
463static __inline__ __m256i __DEFAULT_FN_ATTRS256447static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
464_mm256_and_si256(__m256i __a, __m256i __b)448_mm256_and_si256(__m256i __a, __m256i __b)
465{449{
466 return (__m256i)((__v4du)__a & (__v4du)__b);450 return (__m256i)((__v4du)__a & (__v4du)__b);
...@@ -478,7 +462,7 @@ _mm256_and_si256(__m256i __a, __m256i __b)...@@ -478,7 +462,7 @@ _mm256_and_si256(__m256i __a, __m256i __b)
478/// \param __b462/// \param __b
479/// A 256-bit integer vector.463/// A 256-bit integer vector.
480/// \returns A 256-bit integer vector containing the result.464/// \returns A 256-bit integer vector containing the result.
481static __inline__ __m256i __DEFAULT_FN_ATTRS256465static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
482_mm256_andnot_si256(__m256i __a, __m256i __b)466_mm256_andnot_si256(__m256i __a, __m256i __b)
483{467{
484 return (__m256i)(~(__v4du)__a & (__v4du)__b);468 return (__m256i)(~(__v4du)__a & (__v4du)__b);
...@@ -504,10 +488,9 @@ _mm256_andnot_si256(__m256i __a, __m256i __b)...@@ -504,10 +488,9 @@ _mm256_andnot_si256(__m256i __a, __m256i __b)
504/// \param __b488/// \param __b
505/// A 256-bit integer vector.489/// A 256-bit integer vector.
506/// \returns A 256-bit integer vector containing the result.490/// \returns A 256-bit integer vector containing the result.
507static __inline__ __m256i __DEFAULT_FN_ATTRS256491static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
508_mm256_avg_epu8(__m256i __a, __m256i __b)492_mm256_avg_epu8(__m256i __a, __m256i __b) {
509{493 return (__m256i)__builtin_ia32_pavgb256((__v32qu)__a, (__v32qu)__b);
510 return (__m256i)__builtin_ia32_pavgb256((__v32qi)__a, (__v32qi)__b);
511}494}
512495
513/// Computes the averages of the corresponding unsigned 16-bit integers in496/// Computes the averages of the corresponding unsigned 16-bit integers in
...@@ -530,10 +513,9 @@ _mm256_avg_epu8(__m256i __a, __m256i __b)...@@ -530,10 +513,9 @@ _mm256_avg_epu8(__m256i __a, __m256i __b)
530/// \param __b513/// \param __b
531/// A 256-bit vector of [16 x i16].514/// A 256-bit vector of [16 x i16].
532/// \returns A 256-bit vector of [16 x i16] containing the result.515/// \returns A 256-bit vector of [16 x i16] containing the result.
533static __inline__ __m256i __DEFAULT_FN_ATTRS256516static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
534_mm256_avg_epu16(__m256i __a, __m256i __b)517_mm256_avg_epu16(__m256i __a, __m256i __b) {
535{518 return (__m256i)__builtin_ia32_pavgw256((__v16hu)__a, (__v16hu)__b);
536 return (__m256i)__builtin_ia32_pavgw256((__v16hi)__a, (__v16hi)__b);
537}519}
538520
539/// Merges 8-bit integer values from either of the two 256-bit vectors521/// Merges 8-bit integer values from either of the two 256-bit vectors
...@@ -565,9 +547,8 @@ _mm256_avg_epu16(__m256i __a, __m256i __b)...@@ -565,9 +547,8 @@ _mm256_avg_epu16(__m256i __a, __m256i __b)
565/// is 0, the byte is copied from \a __V1; otherwise, it is copied from547/// is 0, the byte is copied from \a __V1; otherwise, it is copied from
566/// \a __V2.548/// \a __V2.
567/// \returns A 256-bit integer vector containing the result.549/// \returns A 256-bit integer vector containing the result.
568static __inline__ __m256i __DEFAULT_FN_ATTRS256550static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
569_mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M)551_mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M) {
570{
571 return (__m256i)__builtin_ia32_pblendvb256((__v32qi)__V1, (__v32qi)__V2,552 return (__m256i)__builtin_ia32_pblendvb256((__v32qi)__V1, (__v32qi)__V2,
572 (__v32qi)__M);553 (__v32qi)__M);
573}554}
...@@ -633,7 +614,7 @@ _mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M)...@@ -633,7 +614,7 @@ _mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M)
633/// \param __b614/// \param __b
634/// A 256-bit integer vector containing one of the inputs.615/// A 256-bit integer vector containing one of the inputs.
635/// \returns A 256-bit integer vector containing the result.616/// \returns A 256-bit integer vector containing the result.
636static __inline__ __m256i __DEFAULT_FN_ATTRS256617static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
637_mm256_cmpeq_epi8(__m256i __a, __m256i __b)618_mm256_cmpeq_epi8(__m256i __a, __m256i __b)
638{619{
639 return (__m256i)((__v32qi)__a == (__v32qi)__b);620 return (__m256i)((__v32qi)__a == (__v32qi)__b);
...@@ -659,7 +640,7 @@ _mm256_cmpeq_epi8(__m256i __a, __m256i __b)...@@ -659,7 +640,7 @@ _mm256_cmpeq_epi8(__m256i __a, __m256i __b)
659/// \param __b640/// \param __b
660/// A 256-bit vector of [16 x i16] containing one of the inputs.641/// A 256-bit vector of [16 x i16] containing one of the inputs.
661/// \returns A 256-bit vector of [16 x i16] containing the result.642/// \returns A 256-bit vector of [16 x i16] containing the result.
662static __inline__ __m256i __DEFAULT_FN_ATTRS256643static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
663_mm256_cmpeq_epi16(__m256i __a, __m256i __b)644_mm256_cmpeq_epi16(__m256i __a, __m256i __b)
664{645{
665 return (__m256i)((__v16hi)__a == (__v16hi)__b);646 return (__m256i)((__v16hi)__a == (__v16hi)__b);
...@@ -685,7 +666,7 @@ _mm256_cmpeq_epi16(__m256i __a, __m256i __b)...@@ -685,7 +666,7 @@ _mm256_cmpeq_epi16(__m256i __a, __m256i __b)
685/// \param __b666/// \param __b
686/// A 256-bit vector of [8 x i32] containing one of the inputs.667/// A 256-bit vector of [8 x i32] containing one of the inputs.
687/// \returns A 256-bit vector of [8 x i32] containing the result.668/// \returns A 256-bit vector of [8 x i32] containing the result.
688static __inline__ __m256i __DEFAULT_FN_ATTRS256669static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
689_mm256_cmpeq_epi32(__m256i __a, __m256i __b)670_mm256_cmpeq_epi32(__m256i __a, __m256i __b)
690{671{
691 return (__m256i)((__v8si)__a == (__v8si)__b);672 return (__m256i)((__v8si)__a == (__v8si)__b);
...@@ -711,7 +692,7 @@ _mm256_cmpeq_epi32(__m256i __a, __m256i __b)...@@ -711,7 +692,7 @@ _mm256_cmpeq_epi32(__m256i __a, __m256i __b)
711/// \param __b692/// \param __b
712/// A 256-bit vector of [4 x i64] containing one of the inputs.693/// A 256-bit vector of [4 x i64] containing one of the inputs.
713/// \returns A 256-bit vector of [4 x i64] containing the result.694/// \returns A 256-bit vector of [4 x i64] containing the result.
714static __inline__ __m256i __DEFAULT_FN_ATTRS256695static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
715_mm256_cmpeq_epi64(__m256i __a, __m256i __b)696_mm256_cmpeq_epi64(__m256i __a, __m256i __b)
716{697{
717 return (__m256i)((__v4di)__a == (__v4di)__b);698 return (__m256i)((__v4di)__a == (__v4di)__b);
...@@ -737,7 +718,7 @@ _mm256_cmpeq_epi64(__m256i __a, __m256i __b)...@@ -737,7 +718,7 @@ _mm256_cmpeq_epi64(__m256i __a, __m256i __b)
737/// \param __b718/// \param __b
738/// A 256-bit integer vector containing one of the inputs.719/// A 256-bit integer vector containing one of the inputs.
739/// \returns A 256-bit integer vector containing the result.720/// \returns A 256-bit integer vector containing the result.
740static __inline__ __m256i __DEFAULT_FN_ATTRS256721static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
741_mm256_cmpgt_epi8(__m256i __a, __m256i __b)722_mm256_cmpgt_epi8(__m256i __a, __m256i __b)
742{723{
743 /* This function always performs a signed comparison, but __v32qi is a char724 /* This function always performs a signed comparison, but __v32qi is a char
...@@ -765,7 +746,7 @@ _mm256_cmpgt_epi8(__m256i __a, __m256i __b)...@@ -765,7 +746,7 @@ _mm256_cmpgt_epi8(__m256i __a, __m256i __b)
765/// \param __b746/// \param __b
766/// A 256-bit vector of [16 x i16] containing one of the inputs.747/// A 256-bit vector of [16 x i16] containing one of the inputs.
767/// \returns A 256-bit vector of [16 x i16] containing the result.748/// \returns A 256-bit vector of [16 x i16] containing the result.
768static __inline__ __m256i __DEFAULT_FN_ATTRS256749static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
769_mm256_cmpgt_epi16(__m256i __a, __m256i __b)750_mm256_cmpgt_epi16(__m256i __a, __m256i __b)
770{751{
771 return (__m256i)((__v16hi)__a > (__v16hi)__b);752 return (__m256i)((__v16hi)__a > (__v16hi)__b);
...@@ -791,7 +772,7 @@ _mm256_cmpgt_epi16(__m256i __a, __m256i __b)...@@ -791,7 +772,7 @@ _mm256_cmpgt_epi16(__m256i __a, __m256i __b)
791/// \param __b772/// \param __b
792/// A 256-bit vector of [8 x i32] containing one of the inputs.773/// A 256-bit vector of [8 x i32] containing one of the inputs.
793/// \returns A 256-bit vector of [8 x i32] containing the result.774/// \returns A 256-bit vector of [8 x i32] containing the result.
794static __inline__ __m256i __DEFAULT_FN_ATTRS256775static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
795_mm256_cmpgt_epi32(__m256i __a, __m256i __b)776_mm256_cmpgt_epi32(__m256i __a, __m256i __b)
796{777{
797 return (__m256i)((__v8si)__a > (__v8si)__b);778 return (__m256i)((__v8si)__a > (__v8si)__b);
...@@ -817,7 +798,7 @@ _mm256_cmpgt_epi32(__m256i __a, __m256i __b)...@@ -817,7 +798,7 @@ _mm256_cmpgt_epi32(__m256i __a, __m256i __b)
817/// \param __b798/// \param __b
818/// A 256-bit vector of [4 x i64] containing one of the inputs.799/// A 256-bit vector of [4 x i64] containing one of the inputs.
819/// \returns A 256-bit vector of [4 x i64] containing the result.800/// \returns A 256-bit vector of [4 x i64] containing the result.
820static __inline__ __m256i __DEFAULT_FN_ATTRS256801static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
821_mm256_cmpgt_epi64(__m256i __a, __m256i __b)802_mm256_cmpgt_epi64(__m256i __a, __m256i __b)
822{803{
823 return (__m256i)((__v4di)__a > (__v4di)__b);804 return (__m256i)((__v4di)__a > (__v4di)__b);
...@@ -853,10 +834,9 @@ _mm256_cmpgt_epi64(__m256i __a, __m256i __b)...@@ -853,10 +834,9 @@ _mm256_cmpgt_epi64(__m256i __a, __m256i __b)
853/// \param __b834/// \param __b
854/// A 256-bit vector of [16 x i16] containing one of the source operands.835/// A 256-bit vector of [16 x i16] containing one of the source operands.
855/// \returns A 256-bit vector of [16 x i16] containing the sums.836/// \returns A 256-bit vector of [16 x i16] containing the sums.
856static __inline__ __m256i __DEFAULT_FN_ATTRS256837static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
857_mm256_hadd_epi16(__m256i __a, __m256i __b)838_mm256_hadd_epi16(__m256i __a, __m256i __b) {
858{839 return (__m256i)__builtin_ia32_phaddw256((__v16hi)__a, (__v16hi)__b);
859 return (__m256i)__builtin_ia32_phaddw256((__v16hi)__a, (__v16hi)__b);
860}840}
861841
862/// Horizontally adds the adjacent pairs of 32-bit integers from two 256-bit842/// Horizontally adds the adjacent pairs of 32-bit integers from two 256-bit
...@@ -885,10 +865,9 @@ _mm256_hadd_epi16(__m256i __a, __m256i __b)...@@ -885,10 +865,9 @@ _mm256_hadd_epi16(__m256i __a, __m256i __b)
885/// \param __b865/// \param __b
886/// A 256-bit vector of [8 x i32] containing one of the source operands.866/// A 256-bit vector of [8 x i32] containing one of the source operands.
887/// \returns A 256-bit vector of [8 x i32] containing the sums.867/// \returns A 256-bit vector of [8 x i32] containing the sums.
888static __inline__ __m256i __DEFAULT_FN_ATTRS256868static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
889_mm256_hadd_epi32(__m256i __a, __m256i __b)869_mm256_hadd_epi32(__m256i __a, __m256i __b) {
890{870 return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b);
891 return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b);
892}871}
893872
894/// Horizontally adds the adjacent pairs of 16-bit integers from two 256-bit873/// Horizontally adds the adjacent pairs of 16-bit integers from two 256-bit
...@@ -920,10 +899,9 @@ _mm256_hadd_epi32(__m256i __a, __m256i __b)...@@ -920,10 +899,9 @@ _mm256_hadd_epi32(__m256i __a, __m256i __b)
920/// \param __b899/// \param __b
921/// A 256-bit vector of [16 x i16] containing one of the source operands.900/// A 256-bit vector of [16 x i16] containing one of the source operands.
922/// \returns A 256-bit vector of [16 x i16] containing the sums.901/// \returns A 256-bit vector of [16 x i16] containing the sums.
923static __inline__ __m256i __DEFAULT_FN_ATTRS256902static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
924_mm256_hadds_epi16(__m256i __a, __m256i __b)903_mm256_hadds_epi16(__m256i __a, __m256i __b) {
925{904 return (__m256i)__builtin_ia32_phaddsw256((__v16hi)__a, (__v16hi)__b);
926 return (__m256i)__builtin_ia32_phaddsw256((__v16hi)__a, (__v16hi)__b);
927}905}
928906
929/// Horizontally subtracts adjacent pairs of 16-bit integers from two 256-bit907/// Horizontally subtracts adjacent pairs of 16-bit integers from two 256-bit
...@@ -956,10 +934,9 @@ _mm256_hadds_epi16(__m256i __a, __m256i __b)...@@ -956,10 +934,9 @@ _mm256_hadds_epi16(__m256i __a, __m256i __b)
956/// \param __b934/// \param __b
957/// A 256-bit vector of [16 x i16] containing one of the source operands.935/// A 256-bit vector of [16 x i16] containing one of the source operands.
958/// \returns A 256-bit vector of [16 x i16] containing the differences.936/// \returns A 256-bit vector of [16 x i16] containing the differences.
959static __inline__ __m256i __DEFAULT_FN_ATTRS256937static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
960_mm256_hsub_epi16(__m256i __a, __m256i __b)938_mm256_hsub_epi16(__m256i __a, __m256i __b) {
961{939 return (__m256i)__builtin_ia32_phsubw256((__v16hi)__a, (__v16hi)__b);
962 return (__m256i)__builtin_ia32_phsubw256((__v16hi)__a, (__v16hi)__b);
963}940}
964941
965/// Horizontally subtracts adjacent pairs of 32-bit integers from two 256-bit942/// Horizontally subtracts adjacent pairs of 32-bit integers from two 256-bit
...@@ -988,10 +965,9 @@ _mm256_hsub_epi16(__m256i __a, __m256i __b)...@@ -988,10 +965,9 @@ _mm256_hsub_epi16(__m256i __a, __m256i __b)
988/// \param __b965/// \param __b
989/// A 256-bit vector of [8 x i32] containing one of the source operands.966/// A 256-bit vector of [8 x i32] containing one of the source operands.
990/// \returns A 256-bit vector of [8 x i32] containing the differences.967/// \returns A 256-bit vector of [8 x i32] containing the differences.
991static __inline__ __m256i __DEFAULT_FN_ATTRS256968static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
992_mm256_hsub_epi32(__m256i __a, __m256i __b)969_mm256_hsub_epi32(__m256i __a, __m256i __b) {
993{970 return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b);
994 return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b);
995}971}
996972
997/// Horizontally subtracts adjacent pairs of 16-bit integers from two 256-bit973/// Horizontally subtracts adjacent pairs of 16-bit integers from two 256-bit
...@@ -1024,10 +1000,9 @@ _mm256_hsub_epi32(__m256i __a, __m256i __b)...@@ -1024,10 +1000,9 @@ _mm256_hsub_epi32(__m256i __a, __m256i __b)
1024/// \param __b1000/// \param __b
1025/// A 256-bit vector of [16 x i16] containing one of the source operands.1001/// A 256-bit vector of [16 x i16] containing one of the source operands.
1026/// \returns A 256-bit vector of [16 x i16] containing the differences.1002/// \returns A 256-bit vector of [16 x i16] containing the differences.
1027static __inline__ __m256i __DEFAULT_FN_ATTRS2561003static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1028_mm256_hsubs_epi16(__m256i __a, __m256i __b)1004_mm256_hsubs_epi16(__m256i __a, __m256i __b) {
1029{1005 return (__m256i)__builtin_ia32_phsubsw256((__v16hi)__a, (__v16hi)__b);
1030 return (__m256i)__builtin_ia32_phsubsw256((__v16hi)__a, (__v16hi)__b);
1031}1006}
10321007
1033/// Multiplies each unsigned byte from the 256-bit integer vector in \a __a1008/// Multiplies each unsigned byte from the 256-bit integer vector in \a __a
...@@ -1054,10 +1029,9 @@ _mm256_hsubs_epi16(__m256i __a, __m256i __b)...@@ -1054,10 +1029,9 @@ _mm256_hsubs_epi16(__m256i __a, __m256i __b)
1054/// \param __b1029/// \param __b
1055/// A 256-bit vector containing one of the source operands.1030/// A 256-bit vector containing one of the source operands.
1056/// \returns A 256-bit vector of [16 x i16] containing the result.1031/// \returns A 256-bit vector of [16 x i16] containing the result.
1057static __inline__ __m256i __DEFAULT_FN_ATTRS2561032static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1058_mm256_maddubs_epi16(__m256i __a, __m256i __b)1033_mm256_maddubs_epi16(__m256i __a, __m256i __b) {
1059{1034 return (__m256i)__builtin_ia32_pmaddubsw256((__v32qi)__a, (__v32qi)__b);
1060 return (__m256i)__builtin_ia32_pmaddubsw256((__v32qi)__a, (__v32qi)__b);
1061}1035}
10621036
1063/// Multiplies corresponding 16-bit elements of two 256-bit vectors of1037/// Multiplies corresponding 16-bit elements of two 256-bit vectors of
...@@ -1086,9 +1060,8 @@ _mm256_maddubs_epi16(__m256i __a, __m256i __b)...@@ -1086,9 +1060,8 @@ _mm256_maddubs_epi16(__m256i __a, __m256i __b)
1086/// \param __b1060/// \param __b
1087/// A 256-bit vector of [16 x i16] containing one of the source operands.1061/// A 256-bit vector of [16 x i16] containing one of the source operands.
1088/// \returns A 256-bit vector of [8 x i32] containing the result.1062/// \returns A 256-bit vector of [8 x i32] containing the result.
1089static __inline__ __m256i __DEFAULT_FN_ATTRS2561063static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1090_mm256_madd_epi16(__m256i __a, __m256i __b)1064_mm256_madd_epi16(__m256i __a, __m256i __b) {
1091{
1092 return (__m256i)__builtin_ia32_pmaddwd256((__v16hi)__a, (__v16hi)__b);1065 return (__m256i)__builtin_ia32_pmaddwd256((__v16hi)__a, (__v16hi)__b);
1093}1066}
10941067
...@@ -1105,9 +1078,8 @@ _mm256_madd_epi16(__m256i __a, __m256i __b)...@@ -1105,9 +1078,8 @@ _mm256_madd_epi16(__m256i __a, __m256i __b)
1105/// \param __b1078/// \param __b
1106/// A 256-bit integer vector.1079/// A 256-bit integer vector.
1107/// \returns A 256-bit integer vector containing the result.1080/// \returns A 256-bit integer vector containing the result.
1108static __inline__ __m256i __DEFAULT_FN_ATTRS2561081static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1109_mm256_max_epi8(__m256i __a, __m256i __b)1082_mm256_max_epi8(__m256i __a, __m256i __b) {
1110{
1111 return (__m256i)__builtin_elementwise_max((__v32qs)__a, (__v32qs)__b);1083 return (__m256i)__builtin_elementwise_max((__v32qs)__a, (__v32qs)__b);
1112}1084}
11131085
...@@ -1124,9 +1096,8 @@ _mm256_max_epi8(__m256i __a, __m256i __b)...@@ -1124,9 +1096,8 @@ _mm256_max_epi8(__m256i __a, __m256i __b)
1124/// \param __b1096/// \param __b
1125/// A 256-bit vector of [16 x i16].1097/// A 256-bit vector of [16 x i16].
1126/// \returns A 256-bit vector of [16 x i16] containing the result.1098/// \returns A 256-bit vector of [16 x i16] containing the result.
1127static __inline__ __m256i __DEFAULT_FN_ATTRS2561099static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1128_mm256_max_epi16(__m256i __a, __m256i __b)1100_mm256_max_epi16(__m256i __a, __m256i __b) {
1129{
1130 return (__m256i)__builtin_elementwise_max((__v16hi)__a, (__v16hi)__b);1101 return (__m256i)__builtin_elementwise_max((__v16hi)__a, (__v16hi)__b);
1131}1102}
11321103
...@@ -1143,9 +1114,8 @@ _mm256_max_epi16(__m256i __a, __m256i __b)...@@ -1143,9 +1114,8 @@ _mm256_max_epi16(__m256i __a, __m256i __b)
1143/// \param __b1114/// \param __b
1144/// A 256-bit vector of [8 x i32].1115/// A 256-bit vector of [8 x i32].
1145/// \returns A 256-bit vector of [8 x i32] containing the result.1116/// \returns A 256-bit vector of [8 x i32] containing the result.
1146static __inline__ __m256i __DEFAULT_FN_ATTRS2561117static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1147_mm256_max_epi32(__m256i __a, __m256i __b)1118_mm256_max_epi32(__m256i __a, __m256i __b) {
1148{
1149 return (__m256i)__builtin_elementwise_max((__v8si)__a, (__v8si)__b);1119 return (__m256i)__builtin_elementwise_max((__v8si)__a, (__v8si)__b);
1150}1120}
11511121
...@@ -1162,9 +1132,8 @@ _mm256_max_epi32(__m256i __a, __m256i __b)...@@ -1162,9 +1132,8 @@ _mm256_max_epi32(__m256i __a, __m256i __b)
1162/// \param __b1132/// \param __b
1163/// A 256-bit integer vector.1133/// A 256-bit integer vector.
1164/// \returns A 256-bit integer vector containing the result.1134/// \returns A 256-bit integer vector containing the result.
1165static __inline__ __m256i __DEFAULT_FN_ATTRS2561135static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1166_mm256_max_epu8(__m256i __a, __m256i __b)1136_mm256_max_epu8(__m256i __a, __m256i __b) {
1167{
1168 return (__m256i)__builtin_elementwise_max((__v32qu)__a, (__v32qu)__b);1137 return (__m256i)__builtin_elementwise_max((__v32qu)__a, (__v32qu)__b);
1169}1138}
11701139
...@@ -1181,9 +1150,8 @@ _mm256_max_epu8(__m256i __a, __m256i __b)...@@ -1181,9 +1150,8 @@ _mm256_max_epu8(__m256i __a, __m256i __b)
1181/// \param __b1150/// \param __b
1182/// A 256-bit vector of [16 x i16].1151/// A 256-bit vector of [16 x i16].
1183/// \returns A 256-bit vector of [16 x i16] containing the result.1152/// \returns A 256-bit vector of [16 x i16] containing the result.
1184static __inline__ __m256i __DEFAULT_FN_ATTRS2561153static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1185_mm256_max_epu16(__m256i __a, __m256i __b)1154_mm256_max_epu16(__m256i __a, __m256i __b) {
1186{
1187 return (__m256i)__builtin_elementwise_max((__v16hu)__a, (__v16hu)__b);1155 return (__m256i)__builtin_elementwise_max((__v16hu)__a, (__v16hu)__b);
1188}1156}
11891157
...@@ -1200,9 +1168,8 @@ _mm256_max_epu16(__m256i __a, __m256i __b)...@@ -1200,9 +1168,8 @@ _mm256_max_epu16(__m256i __a, __m256i __b)
1200/// \param __b1168/// \param __b
1201/// A 256-bit vector of [8 x i32].1169/// A 256-bit vector of [8 x i32].
1202/// \returns A 256-bit vector of [8 x i32] containing the result.1170/// \returns A 256-bit vector of [8 x i32] containing the result.
1203static __inline__ __m256i __DEFAULT_FN_ATTRS2561171static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1204_mm256_max_epu32(__m256i __a, __m256i __b)1172_mm256_max_epu32(__m256i __a, __m256i __b) {
1205{
1206 return (__m256i)__builtin_elementwise_max((__v8su)__a, (__v8su)__b);1173 return (__m256i)__builtin_elementwise_max((__v8su)__a, (__v8su)__b);
1207}1174}
12081175
...@@ -1219,9 +1186,8 @@ _mm256_max_epu32(__m256i __a, __m256i __b)...@@ -1219,9 +1186,8 @@ _mm256_max_epu32(__m256i __a, __m256i __b)
1219/// \param __b1186/// \param __b
1220/// A 256-bit integer vector.1187/// A 256-bit integer vector.
1221/// \returns A 256-bit integer vector containing the result.1188/// \returns A 256-bit integer vector containing the result.
1222static __inline__ __m256i __DEFAULT_FN_ATTRS2561189static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1223_mm256_min_epi8(__m256i __a, __m256i __b)1190_mm256_min_epi8(__m256i __a, __m256i __b) {
1224{
1225 return (__m256i)__builtin_elementwise_min((__v32qs)__a, (__v32qs)__b);1191 return (__m256i)__builtin_elementwise_min((__v32qs)__a, (__v32qs)__b);
1226}1192}
12271193
...@@ -1238,9 +1204,8 @@ _mm256_min_epi8(__m256i __a, __m256i __b)...@@ -1238,9 +1204,8 @@ _mm256_min_epi8(__m256i __a, __m256i __b)
1238/// \param __b1204/// \param __b
1239/// A 256-bit vector of [16 x i16].1205/// A 256-bit vector of [16 x i16].
1240/// \returns A 256-bit vector of [16 x i16] containing the result.1206/// \returns A 256-bit vector of [16 x i16] containing the result.
1241static __inline__ __m256i __DEFAULT_FN_ATTRS2561207static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1242_mm256_min_epi16(__m256i __a, __m256i __b)1208_mm256_min_epi16(__m256i __a, __m256i __b) {
1243{
1244 return (__m256i)__builtin_elementwise_min((__v16hi)__a, (__v16hi)__b);1209 return (__m256i)__builtin_elementwise_min((__v16hi)__a, (__v16hi)__b);
1245}1210}
12461211
...@@ -1257,9 +1222,8 @@ _mm256_min_epi16(__m256i __a, __m256i __b)...@@ -1257,9 +1222,8 @@ _mm256_min_epi16(__m256i __a, __m256i __b)
1257/// \param __b1222/// \param __b
1258/// A 256-bit vector of [8 x i32].1223/// A 256-bit vector of [8 x i32].
1259/// \returns A 256-bit vector of [8 x i32] containing the result.1224/// \returns A 256-bit vector of [8 x i32] containing the result.
1260static __inline__ __m256i __DEFAULT_FN_ATTRS2561225static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1261_mm256_min_epi32(__m256i __a, __m256i __b)1226_mm256_min_epi32(__m256i __a, __m256i __b) {
1262{
1263 return (__m256i)__builtin_elementwise_min((__v8si)__a, (__v8si)__b);1227 return (__m256i)__builtin_elementwise_min((__v8si)__a, (__v8si)__b);
1264}1228}
12651229
...@@ -1276,9 +1240,8 @@ _mm256_min_epi32(__m256i __a, __m256i __b)...@@ -1276,9 +1240,8 @@ _mm256_min_epi32(__m256i __a, __m256i __b)
1276/// \param __b1240/// \param __b
1277/// A 256-bit integer vector.1241/// A 256-bit integer vector.
1278/// \returns A 256-bit integer vector containing the result.1242/// \returns A 256-bit integer vector containing the result.
1279static __inline__ __m256i __DEFAULT_FN_ATTRS2561243static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1280_mm256_min_epu8(__m256i __a, __m256i __b)1244_mm256_min_epu8(__m256i __a, __m256i __b) {
1281{
1282 return (__m256i)__builtin_elementwise_min((__v32qu)__a, (__v32qu)__b);1245 return (__m256i)__builtin_elementwise_min((__v32qu)__a, (__v32qu)__b);
1283}1246}
12841247
...@@ -1295,9 +1258,8 @@ _mm256_min_epu8(__m256i __a, __m256i __b)...@@ -1295,9 +1258,8 @@ _mm256_min_epu8(__m256i __a, __m256i __b)
1295/// \param __b1258/// \param __b
1296/// A 256-bit vector of [16 x i16].1259/// A 256-bit vector of [16 x i16].
1297/// \returns A 256-bit vector of [16 x i16] containing the result.1260/// \returns A 256-bit vector of [16 x i16] containing the result.
1298static __inline__ __m256i __DEFAULT_FN_ATTRS2561261static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1299_mm256_min_epu16(__m256i __a, __m256i __b)1262_mm256_min_epu16(__m256i __a, __m256i __b) {
1300{
1301 return (__m256i)__builtin_elementwise_min((__v16hu)__a, (__v16hu)__b);1263 return (__m256i)__builtin_elementwise_min((__v16hu)__a, (__v16hu)__b);
1302}1264}
13031265
...@@ -1314,9 +1276,8 @@ _mm256_min_epu16(__m256i __a, __m256i __b)...@@ -1314,9 +1276,8 @@ _mm256_min_epu16(__m256i __a, __m256i __b)
1314/// \param __b1276/// \param __b
1315/// A 256-bit vector of [8 x i32].1277/// A 256-bit vector of [8 x i32].
1316/// \returns A 256-bit vector of [8 x i32] containing the result.1278/// \returns A 256-bit vector of [8 x i32] containing the result.
1317static __inline__ __m256i __DEFAULT_FN_ATTRS2561279static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1318_mm256_min_epu32(__m256i __a, __m256i __b)1280_mm256_min_epu32(__m256i __a, __m256i __b) {
1319{
1320 return (__m256i)__builtin_elementwise_min((__v8su)__a, (__v8su)__b);1281 return (__m256i)__builtin_elementwise_min((__v8su)__a, (__v8su)__b);
1321}1282}
13221283
...@@ -1337,9 +1298,8 @@ _mm256_min_epu32(__m256i __a, __m256i __b)...@@ -1337,9 +1298,8 @@ _mm256_min_epu32(__m256i __a, __m256i __b)
1337/// \param __a1298/// \param __a
1338/// A 256-bit integer vector containing the source bytes.1299/// A 256-bit integer vector containing the source bytes.
1339/// \returns The 32-bit integer mask.1300/// \returns The 32-bit integer mask.
1340static __inline__ int __DEFAULT_FN_ATTRS2561301static __inline__ int __DEFAULT_FN_ATTRS256_CONSTEXPR
1341_mm256_movemask_epi8(__m256i __a)1302_mm256_movemask_epi8(__m256i __a) {
1342{
1343 return __builtin_ia32_pmovmskb256((__v32qi)__a);1303 return __builtin_ia32_pmovmskb256((__v32qi)__a);
1344}1304}
13451305
...@@ -1363,9 +1323,8 @@ _mm256_movemask_epi8(__m256i __a)...@@ -1363,9 +1323,8 @@ _mm256_movemask_epi8(__m256i __a)
1363/// A 128-bit integer vector containing the source bytes.1323/// A 128-bit integer vector containing the source bytes.
1364/// \returns A 256-bit vector of [16 x i16] containing the sign-extended1324/// \returns A 256-bit vector of [16 x i16] containing the sign-extended
1365/// values.1325/// values.
1366static __inline__ __m256i __DEFAULT_FN_ATTRS2561326static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1367_mm256_cvtepi8_epi16(__m128i __V)1327_mm256_cvtepi8_epi16(__m128i __V) {
1368{
1369 /* This function always performs a signed extension, but __v16qi is a char1328 /* This function always performs a signed extension, but __v16qi is a char
1370 which may be signed or unsigned, so use __v16qs. */1329 which may be signed or unsigned, so use __v16qs. */
1371 return (__m256i)__builtin_convertvector((__v16qs)__V, __v16hi);1330 return (__m256i)__builtin_convertvector((__v16qs)__V, __v16hi);
...@@ -1391,9 +1350,8 @@ _mm256_cvtepi8_epi16(__m128i __V)...@@ -1391,9 +1350,8 @@ _mm256_cvtepi8_epi16(__m128i __V)
1391/// A 128-bit integer vector containing the source bytes.1350/// A 128-bit integer vector containing the source bytes.
1392/// \returns A 256-bit vector of [8 x i32] containing the sign-extended1351/// \returns A 256-bit vector of [8 x i32] containing the sign-extended
1393/// values.1352/// values.
1394static __inline__ __m256i __DEFAULT_FN_ATTRS2561353static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1395_mm256_cvtepi8_epi32(__m128i __V)1354_mm256_cvtepi8_epi32(__m128i __V) {
1396{
1397 /* This function always performs a signed extension, but __v16qi is a char1355 /* This function always performs a signed extension, but __v16qi is a char
1398 which may be signed or unsigned, so use __v16qs. */1356 which may be signed or unsigned, so use __v16qs. */
1399 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3, 4, 5, 6, 7), __v8si);1357 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3, 4, 5, 6, 7), __v8si);
...@@ -1418,9 +1376,8 @@ _mm256_cvtepi8_epi32(__m128i __V)...@@ -1418,9 +1376,8 @@ _mm256_cvtepi8_epi32(__m128i __V)
1418/// A 128-bit integer vector containing the source bytes.1376/// A 128-bit integer vector containing the source bytes.
1419/// \returns A 256-bit vector of [4 x i64] containing the sign-extended1377/// \returns A 256-bit vector of [4 x i64] containing the sign-extended
1420/// values.1378/// values.
1421static __inline__ __m256i __DEFAULT_FN_ATTRS2561379static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1422_mm256_cvtepi8_epi64(__m128i __V)1380_mm256_cvtepi8_epi64(__m128i __V) {
1423{
1424 /* This function always performs a signed extension, but __v16qi is a char1381 /* This function always performs a signed extension, but __v16qi is a char
1425 which may be signed or unsigned, so use __v16qs. */1382 which may be signed or unsigned, so use __v16qs. */
1426 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3), __v4di);1383 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3), __v4di);
...@@ -1446,9 +1403,8 @@ _mm256_cvtepi8_epi64(__m128i __V)...@@ -1446,9 +1403,8 @@ _mm256_cvtepi8_epi64(__m128i __V)
1446/// A 128-bit vector of [8 x i16] containing the source values.1403/// A 128-bit vector of [8 x i16] containing the source values.
1447/// \returns A 256-bit vector of [8 x i32] containing the sign-extended1404/// \returns A 256-bit vector of [8 x i32] containing the sign-extended
1448/// values.1405/// values.
1449static __inline__ __m256i __DEFAULT_FN_ATTRS2561406static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1450_mm256_cvtepi16_epi32(__m128i __V)1407_mm256_cvtepi16_epi32(__m128i __V) {
1451{
1452 return (__m256i)__builtin_convertvector((__v8hi)__V, __v8si);1408 return (__m256i)__builtin_convertvector((__v8hi)__V, __v8si);
1453}1409}
14541410
...@@ -1471,9 +1427,8 @@ _mm256_cvtepi16_epi32(__m128i __V)...@@ -1471,9 +1427,8 @@ _mm256_cvtepi16_epi32(__m128i __V)
1471/// A 128-bit vector of [8 x i16] containing the source values.1427/// A 128-bit vector of [8 x i16] containing the source values.
1472/// \returns A 256-bit vector of [4 x i64] containing the sign-extended1428/// \returns A 256-bit vector of [4 x i64] containing the sign-extended
1473/// values.1429/// values.
1474static __inline__ __m256i __DEFAULT_FN_ATTRS2561430static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1475_mm256_cvtepi16_epi64(__m128i __V)1431_mm256_cvtepi16_epi64(__m128i __V) {
1476{
1477 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4di);1432 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4di);
1478}1433}
14791434
...@@ -1496,9 +1451,8 @@ _mm256_cvtepi16_epi64(__m128i __V)...@@ -1496,9 +1451,8 @@ _mm256_cvtepi16_epi64(__m128i __V)
1496/// A 128-bit vector of [4 x i32] containing the source values.1451/// A 128-bit vector of [4 x i32] containing the source values.
1497/// \returns A 256-bit vector of [4 x i64] containing the sign-extended1452/// \returns A 256-bit vector of [4 x i64] containing the sign-extended
1498/// values.1453/// values.
1499static __inline__ __m256i __DEFAULT_FN_ATTRS2561454static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1500_mm256_cvtepi32_epi64(__m128i __V)1455_mm256_cvtepi32_epi64(__m128i __V) {
1501{
1502 return (__m256i)__builtin_convertvector((__v4si)__V, __v4di);1456 return (__m256i)__builtin_convertvector((__v4si)__V, __v4di);
1503}1457}
15041458
...@@ -1522,9 +1476,8 @@ _mm256_cvtepi32_epi64(__m128i __V)...@@ -1522,9 +1476,8 @@ _mm256_cvtepi32_epi64(__m128i __V)
1522/// A 128-bit integer vector containing the source bytes.1476/// A 128-bit integer vector containing the source bytes.
1523/// \returns A 256-bit vector of [16 x i16] containing the zero-extended1477/// \returns A 256-bit vector of [16 x i16] containing the zero-extended
1524/// values.1478/// values.
1525static __inline__ __m256i __DEFAULT_FN_ATTRS2561479static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1526_mm256_cvtepu8_epi16(__m128i __V)1480_mm256_cvtepu8_epi16(__m128i __V) {
1527{
1528 return (__m256i)__builtin_convertvector((__v16qu)__V, __v16hi);1481 return (__m256i)__builtin_convertvector((__v16qu)__V, __v16hi);
1529}1482}
15301483
...@@ -1548,9 +1501,8 @@ _mm256_cvtepu8_epi16(__m128i __V)...@@ -1548,9 +1501,8 @@ _mm256_cvtepu8_epi16(__m128i __V)
1548/// A 128-bit integer vector containing the source bytes.1501/// A 128-bit integer vector containing the source bytes.
1549/// \returns A 256-bit vector of [8 x i32] containing the zero-extended1502/// \returns A 256-bit vector of [8 x i32] containing the zero-extended
1550/// values.1503/// values.
1551static __inline__ __m256i __DEFAULT_FN_ATTRS2561504static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1552_mm256_cvtepu8_epi32(__m128i __V)1505_mm256_cvtepu8_epi32(__m128i __V) {
1553{
1554 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6, 7), __v8si);1506 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6, 7), __v8si);
1555}1507}
15561508
...@@ -1573,9 +1525,8 @@ _mm256_cvtepu8_epi32(__m128i __V)...@@ -1573,9 +1525,8 @@ _mm256_cvtepu8_epi32(__m128i __V)
1573/// A 128-bit integer vector containing the source bytes.1525/// A 128-bit integer vector containing the source bytes.
1574/// \returns A 256-bit vector of [4 x i64] containing the zero-extended1526/// \returns A 256-bit vector of [4 x i64] containing the zero-extended
1575/// values.1527/// values.
1576static __inline__ __m256i __DEFAULT_FN_ATTRS2561528static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1577_mm256_cvtepu8_epi64(__m128i __V)1529_mm256_cvtepu8_epi64(__m128i __V) {
1578{
1579 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4di);1530 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4di);
1580}1531}
15811532
...@@ -1599,9 +1550,8 @@ _mm256_cvtepu8_epi64(__m128i __V)...@@ -1599,9 +1550,8 @@ _mm256_cvtepu8_epi64(__m128i __V)
1599/// A 128-bit vector of [8 x i16] containing the source values.1550/// A 128-bit vector of [8 x i16] containing the source values.
1600/// \returns A 256-bit vector of [8 x i32] containing the zero-extended1551/// \returns A 256-bit vector of [8 x i32] containing the zero-extended
1601/// values.1552/// values.
1602static __inline__ __m256i __DEFAULT_FN_ATTRS2561553static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1603_mm256_cvtepu16_epi32(__m128i __V)1554_mm256_cvtepu16_epi32(__m128i __V) {
1604{
1605 return (__m256i)__builtin_convertvector((__v8hu)__V, __v8si);1555 return (__m256i)__builtin_convertvector((__v8hu)__V, __v8si);
1606}1556}
16071557
...@@ -1624,9 +1574,8 @@ _mm256_cvtepu16_epi32(__m128i __V)...@@ -1624,9 +1574,8 @@ _mm256_cvtepu16_epi32(__m128i __V)
1624/// A 128-bit vector of [8 x i16] containing the source values.1574/// A 128-bit vector of [8 x i16] containing the source values.
1625/// \returns A 256-bit vector of [4 x i64] containing the zero-extended1575/// \returns A 256-bit vector of [4 x i64] containing the zero-extended
1626/// values.1576/// values.
1627static __inline__ __m256i __DEFAULT_FN_ATTRS2561577static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1628_mm256_cvtepu16_epi64(__m128i __V)1578_mm256_cvtepu16_epi64(__m128i __V) {
1629{
1630 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4di);1579 return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4di);
1631}1580}
16321581
...@@ -1649,9 +1598,8 @@ _mm256_cvtepu16_epi64(__m128i __V)...@@ -1649,9 +1598,8 @@ _mm256_cvtepu16_epi64(__m128i __V)
1649/// A 128-bit vector of [4 x i32] containing the source values.1598/// A 128-bit vector of [4 x i32] containing the source values.
1650/// \returns A 256-bit vector of [4 x i64] containing the zero-extended1599/// \returns A 256-bit vector of [4 x i64] containing the zero-extended
1651/// values.1600/// values.
1652static __inline__ __m256i __DEFAULT_FN_ATTRS2561601static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1653_mm256_cvtepu32_epi64(__m128i __V)1602_mm256_cvtepu32_epi64(__m128i __V) {
1654{
1655 return (__m256i)__builtin_convertvector((__v4su)__V, __v4di);1603 return (__m256i)__builtin_convertvector((__v4su)__V, __v4di);
1656}1604}
16571605
...@@ -1675,9 +1623,8 @@ _mm256_cvtepu32_epi64(__m128i __V)...@@ -1675,9 +1623,8 @@ _mm256_cvtepu32_epi64(__m128i __V)
1675/// \param __b1623/// \param __b
1676/// A 256-bit vector of [8 x i32] containing one of the source operands.1624/// A 256-bit vector of [8 x i32] containing one of the source operands.
1677/// \returns A 256-bit vector of [4 x i64] containing the products.1625/// \returns A 256-bit vector of [4 x i64] containing the products.
1678static __inline__ __m256i __DEFAULT_FN_ATTRS2561626static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1679_mm256_mul_epi32(__m256i __a, __m256i __b)1627_mm256_mul_epi32(__m256i __a, __m256i __b) {
1680{
1681 return (__m256i)__builtin_ia32_pmuldq256((__v8si)__a, (__v8si)__b);1628 return (__m256i)__builtin_ia32_pmuldq256((__v8si)__a, (__v8si)__b);
1682}1629}
16831630
...@@ -1702,9 +1649,8 @@ _mm256_mul_epi32(__m256i __a, __m256i __b)...@@ -1702,9 +1649,8 @@ _mm256_mul_epi32(__m256i __a, __m256i __b)
1702/// \param __b1649/// \param __b
1703/// A 256-bit vector of [16 x i16] containing one of the source operands.1650/// A 256-bit vector of [16 x i16] containing one of the source operands.
1704/// \returns A 256-bit vector of [16 x i16] containing the rounded products.1651/// \returns A 256-bit vector of [16 x i16] containing the rounded products.
1705static __inline__ __m256i __DEFAULT_FN_ATTRS2561652static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1706_mm256_mulhrs_epi16(__m256i __a, __m256i __b)1653_mm256_mulhrs_epi16(__m256i __a, __m256i __b) {
1707{
1708 return (__m256i)__builtin_ia32_pmulhrsw256((__v16hi)__a, (__v16hi)__b);1654 return (__m256i)__builtin_ia32_pmulhrsw256((__v16hi)__a, (__v16hi)__b);
1709}1655}
17101656
...@@ -1721,10 +1667,9 @@ _mm256_mulhrs_epi16(__m256i __a, __m256i __b)...@@ -1721,10 +1667,9 @@ _mm256_mulhrs_epi16(__m256i __a, __m256i __b)
1721/// \param __b1667/// \param __b
1722/// A 256-bit vector of [16 x i16] containing one of the source operands.1668/// A 256-bit vector of [16 x i16] containing one of the source operands.
1723/// \returns A 256-bit vector of [16 x i16] containing the products.1669/// \returns A 256-bit vector of [16 x i16] containing the products.
1724static __inline__ __m256i __DEFAULT_FN_ATTRS2561670static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1725_mm256_mulhi_epu16(__m256i __a, __m256i __b)1671_mm256_mulhi_epu16(__m256i __a, __m256i __b) {
1726{1672 return (__m256i)__builtin_ia32_pmulhuw256((__v16hu)__a, (__v16hu)__b);
1727 return (__m256i)__builtin_ia32_pmulhuw256((__v16hi)__a, (__v16hi)__b);
1728}1673}
17291674
1730/// Multiplies signed 16-bit integer elements of two 256-bit vectors of1675/// Multiplies signed 16-bit integer elements of two 256-bit vectors of
...@@ -1740,7 +1685,7 @@ _mm256_mulhi_epu16(__m256i __a, __m256i __b)...@@ -1740,7 +1685,7 @@ _mm256_mulhi_epu16(__m256i __a, __m256i __b)
1740/// \param __b1685/// \param __b
1741/// A 256-bit vector of [16 x i16] containing one of the source operands.1686/// A 256-bit vector of [16 x i16] containing one of the source operands.
1742/// \returns A 256-bit vector of [16 x i16] containing the products.1687/// \returns A 256-bit vector of [16 x i16] containing the products.
1743static __inline__ __m256i __DEFAULT_FN_ATTRS2561688static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1744_mm256_mulhi_epi16(__m256i __a, __m256i __b)1689_mm256_mulhi_epi16(__m256i __a, __m256i __b)
1745{1690{
1746 return (__m256i)__builtin_ia32_pmulhw256((__v16hi)__a, (__v16hi)__b);1691 return (__m256i)__builtin_ia32_pmulhw256((__v16hi)__a, (__v16hi)__b);
...@@ -1759,7 +1704,7 @@ _mm256_mulhi_epi16(__m256i __a, __m256i __b)...@@ -1759,7 +1704,7 @@ _mm256_mulhi_epi16(__m256i __a, __m256i __b)
1759/// \param __b1704/// \param __b
1760/// A 256-bit vector of [16 x i16] containing one of the source operands.1705/// A 256-bit vector of [16 x i16] containing one of the source operands.
1761/// \returns A 256-bit vector of [16 x i16] containing the products.1706/// \returns A 256-bit vector of [16 x i16] containing the products.
1762static __inline__ __m256i __DEFAULT_FN_ATTRS2561707static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1763_mm256_mullo_epi16(__m256i __a, __m256i __b)1708_mm256_mullo_epi16(__m256i __a, __m256i __b)
1764{1709{
1765 return (__m256i)((__v16hu)__a * (__v16hu)__b);1710 return (__m256i)((__v16hu)__a * (__v16hu)__b);
...@@ -1778,9 +1723,8 @@ _mm256_mullo_epi16(__m256i __a, __m256i __b)...@@ -1778,9 +1723,8 @@ _mm256_mullo_epi16(__m256i __a, __m256i __b)
1778/// \param __b1723/// \param __b
1779/// A 256-bit vector of [8 x i32] containing one of the source operands.1724/// A 256-bit vector of [8 x i32] containing one of the source operands.
1780/// \returns A 256-bit vector of [8 x i32] containing the products.1725/// \returns A 256-bit vector of [8 x i32] containing the products.
1781static __inline__ __m256i __DEFAULT_FN_ATTRS2561726static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1782_mm256_mullo_epi32 (__m256i __a, __m256i __b)1727_mm256_mullo_epi32(__m256i __a, __m256i __b) {
1783{
1784 return (__m256i)((__v8su)__a * (__v8su)__b);1728 return (__m256i)((__v8su)__a * (__v8su)__b);
1785}1729}
17861730
...@@ -1804,9 +1748,8 @@ _mm256_mullo_epi32 (__m256i __a, __m256i __b)...@@ -1804,9 +1748,8 @@ _mm256_mullo_epi32 (__m256i __a, __m256i __b)
1804/// \param __b1748/// \param __b
1805/// A 256-bit vector of [8 x i32] containing one of the source operands.1749/// A 256-bit vector of [8 x i32] containing one of the source operands.
1806/// \returns A 256-bit vector of [4 x i64] containing the products.1750/// \returns A 256-bit vector of [4 x i64] containing the products.
1807static __inline__ __m256i __DEFAULT_FN_ATTRS2561751static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1808_mm256_mul_epu32(__m256i __a, __m256i __b)1752_mm256_mul_epu32(__m256i __a, __m256i __b) {
1809{
1810 return __builtin_ia32_pmuludq256((__v8si)__a, (__v8si)__b);1753 return __builtin_ia32_pmuludq256((__v8si)__a, (__v8si)__b);
1811}1754}
18121755
...@@ -1822,7 +1765,7 @@ _mm256_mul_epu32(__m256i __a, __m256i __b)...@@ -1822,7 +1765,7 @@ _mm256_mul_epu32(__m256i __a, __m256i __b)
1822/// \param __b1765/// \param __b
1823/// A 256-bit integer vector.1766/// A 256-bit integer vector.
1824/// \returns A 256-bit integer vector containing the result.1767/// \returns A 256-bit integer vector containing the result.
1825static __inline__ __m256i __DEFAULT_FN_ATTRS2561768static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1826_mm256_or_si256(__m256i __a, __m256i __b)1769_mm256_or_si256(__m256i __a, __m256i __b)
1827{1770{
1828 return (__m256i)((__v4du)__a | (__v4du)__b);1771 return (__m256i)((__v4du)__a | (__v4du)__b);
...@@ -1906,9 +1849,8 @@ _mm256_sad_epu8(__m256i __a, __m256i __b)...@@ -1906,9 +1849,8 @@ _mm256_sad_epu8(__m256i __a, __m256i __b)
1906/// control byte specify the index (within the same 128-bit half) of \a __a1849/// control byte specify the index (within the same 128-bit half) of \a __a
1907/// to copy to the result byte.1850/// to copy to the result byte.
1908/// \returns A 256-bit integer vector containing the result.1851/// \returns A 256-bit integer vector containing the result.
1909static __inline__ __m256i __DEFAULT_FN_ATTRS2561852static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1910_mm256_shuffle_epi8(__m256i __a, __m256i __b)1853_mm256_shuffle_epi8(__m256i __a, __m256i __b) {
1911{
1912 return (__m256i)__builtin_ia32_pshufb256((__v32qi)__a, (__v32qi)__b);1854 return (__m256i)__builtin_ia32_pshufb256((__v32qi)__a, (__v32qi)__b);
1913}1855}
19141856
...@@ -2033,10 +1975,9 @@ _mm256_shuffle_epi8(__m256i __a, __m256i __b)...@@ -2033,10 +1975,9 @@ _mm256_shuffle_epi8(__m256i __a, __m256i __b)
2033/// \param __b1975/// \param __b
2034/// A 256-bit integer vector].1976/// A 256-bit integer vector].
2035/// \returns A 256-bit integer vector containing the result.1977/// \returns A 256-bit integer vector containing the result.
2036static __inline__ __m256i __DEFAULT_FN_ATTRS2561978static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2037_mm256_sign_epi8(__m256i __a, __m256i __b)1979_mm256_sign_epi8(__m256i __a, __m256i __b) {
2038{1980 return (__m256i)__builtin_ia32_psignb256((__v32qi)__a, (__v32qi)__b);
2039 return (__m256i)__builtin_ia32_psignb256((__v32qi)__a, (__v32qi)__b);
2040}1981}
20411982
2042/// Sets each element of the result to the corresponding element of the1983/// Sets each element of the result to the corresponding element of the
...@@ -2054,10 +1995,9 @@ _mm256_sign_epi8(__m256i __a, __m256i __b)...@@ -2054,10 +1995,9 @@ _mm256_sign_epi8(__m256i __a, __m256i __b)
2054/// \param __b1995/// \param __b
2055/// A 256-bit vector of [16 x i16].1996/// A 256-bit vector of [16 x i16].
2056/// \returns A 256-bit vector of [16 x i16] containing the result.1997/// \returns A 256-bit vector of [16 x i16] containing the result.
2057static __inline__ __m256i __DEFAULT_FN_ATTRS2561998static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2058_mm256_sign_epi16(__m256i __a, __m256i __b)1999_mm256_sign_epi16(__m256i __a, __m256i __b) {
2059{2000 return (__m256i)__builtin_ia32_psignw256((__v16hi)__a, (__v16hi)__b);
2060 return (__m256i)__builtin_ia32_psignw256((__v16hi)__a, (__v16hi)__b);
2061}2001}
20622002
2063/// Sets each element of the result to the corresponding element of the2003/// Sets each element of the result to the corresponding element of the
...@@ -2075,10 +2015,9 @@ _mm256_sign_epi16(__m256i __a, __m256i __b)...@@ -2075,10 +2015,9 @@ _mm256_sign_epi16(__m256i __a, __m256i __b)
2075/// \param __b2015/// \param __b
2076/// A 256-bit vector of [8 x i32].2016/// A 256-bit vector of [8 x i32].
2077/// \returns A 256-bit vector of [8 x i32] containing the result.2017/// \returns A 256-bit vector of [8 x i32] containing the result.
2078static __inline__ __m256i __DEFAULT_FN_ATTRS2562018static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2079_mm256_sign_epi32(__m256i __a, __m256i __b)2019_mm256_sign_epi32(__m256i __a, __m256i __b) {
2080{2020 return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b);
2081 return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b);
2082}2021}
20832022
2084/// Shifts each 128-bit half of the 256-bit integer vector \a a left by2023/// Shifts each 128-bit half of the 256-bit integer vector \a a left by
...@@ -2098,8 +2037,9 @@ _mm256_sign_epi32(__m256i __a, __m256i __b)...@@ -2098,8 +2037,9 @@ _mm256_sign_epi32(__m256i __a, __m256i __b)
2098/// \param imm2037/// \param imm
2099/// An unsigned immediate value specifying the shift count (in bytes).2038/// An unsigned immediate value specifying the shift count (in bytes).
2100/// \returns A 256-bit integer vector containing the result.2039/// \returns A 256-bit integer vector containing the result.
2101#define _mm256_slli_si256(a, imm) \2040#define _mm256_slli_si256(a, imm) \
2102 ((__m256i)__builtin_ia32_pslldqi256_byteshift((__v4di)(__m256i)(a), (int)(imm)))2041 ((__m256i)__builtin_ia32_pslldqi256_byteshift((__v32qi)(__m256i)(a), \
2042 (int)(imm)))
21032043
2104/// Shifts each 128-bit half of the 256-bit integer vector \a a left by2044/// Shifts each 128-bit half of the 256-bit integer vector \a a left by
2105/// \a imm bytes, shifting in zero bytes, and returns the result. If \a imm2045/// \a imm bytes, shifting in zero bytes, and returns the result. If \a imm
...@@ -2118,8 +2058,9 @@ _mm256_sign_epi32(__m256i __a, __m256i __b)...@@ -2118,8 +2058,9 @@ _mm256_sign_epi32(__m256i __a, __m256i __b)
2118/// \param imm2058/// \param imm
2119/// An unsigned immediate value specifying the shift count (in bytes).2059/// An unsigned immediate value specifying the shift count (in bytes).
2120/// \returns A 256-bit integer vector containing the result.2060/// \returns A 256-bit integer vector containing the result.
2121#define _mm256_bslli_epi128(a, imm) \2061#define _mm256_bslli_epi128(a, imm) \
2122 ((__m256i)__builtin_ia32_pslldqi256_byteshift((__v4di)(__m256i)(a), (int)(imm)))2062 ((__m256i)__builtin_ia32_pslldqi256_byteshift((__v32qi)(__m256i)(a), \
2063 (int)(imm)))
21232064
2124/// Shifts each 16-bit element of the 256-bit vector of [16 x i16] in \a __a2065/// Shifts each 16-bit element of the 256-bit vector of [16 x i16] in \a __a
2125/// left by \a __count bits, shifting in zero bits, and returns the result.2066/// left by \a __count bits, shifting in zero bits, and returns the result.
...@@ -2134,9 +2075,8 @@ _mm256_sign_epi32(__m256i __a, __m256i __b)...@@ -2134,9 +2075,8 @@ _mm256_sign_epi32(__m256i __a, __m256i __b)
2134/// \param __count2075/// \param __count
2135/// An unsigned integer value specifying the shift count (in bits).2076/// An unsigned integer value specifying the shift count (in bits).
2136/// \returns A 256-bit vector of [16 x i16] containing the result.2077/// \returns A 256-bit vector of [16 x i16] containing the result.
2137static __inline__ __m256i __DEFAULT_FN_ATTRS2562078static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2138_mm256_slli_epi16(__m256i __a, int __count)2079_mm256_slli_epi16(__m256i __a, int __count) {
2139{
2140 return (__m256i)__builtin_ia32_psllwi256((__v16hi)__a, __count);2080 return (__m256i)__builtin_ia32_psllwi256((__v16hi)__a, __count);
2141}2081}
21422082
...@@ -2155,9 +2095,8 @@ _mm256_slli_epi16(__m256i __a, int __count)...@@ -2155,9 +2095,8 @@ _mm256_slli_epi16(__m256i __a, int __count)
2155/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned2095/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned
2156/// shift count (in bits). The upper element is ignored.2096/// shift count (in bits). The upper element is ignored.
2157/// \returns A 256-bit vector of [16 x i16] containing the result.2097/// \returns A 256-bit vector of [16 x i16] containing the result.
2158static __inline__ __m256i __DEFAULT_FN_ATTRS2562098static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2159_mm256_sll_epi16(__m256i __a, __m128i __count)2099_mm256_sll_epi16(__m256i __a, __m128i __count) {
2160{
2161 return (__m256i)__builtin_ia32_psllw256((__v16hi)__a, (__v8hi)__count);2100 return (__m256i)__builtin_ia32_psllw256((__v16hi)__a, (__v8hi)__count);
2162}2101}
21632102
...@@ -2174,9 +2113,8 @@ _mm256_sll_epi16(__m256i __a, __m128i __count)...@@ -2174,9 +2113,8 @@ _mm256_sll_epi16(__m256i __a, __m128i __count)
2174/// \param __count2113/// \param __count
2175/// An unsigned integer value specifying the shift count (in bits).2114/// An unsigned integer value specifying the shift count (in bits).
2176/// \returns A 256-bit vector of [8 x i32] containing the result.2115/// \returns A 256-bit vector of [8 x i32] containing the result.
2177static __inline__ __m256i __DEFAULT_FN_ATTRS2562116static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2178_mm256_slli_epi32(__m256i __a, int __count)2117_mm256_slli_epi32(__m256i __a, int __count) {
2179{
2180 return (__m256i)__builtin_ia32_pslldi256((__v8si)__a, __count);2118 return (__m256i)__builtin_ia32_pslldi256((__v8si)__a, __count);
2181}2119}
21822120
...@@ -2195,9 +2133,8 @@ _mm256_slli_epi32(__m256i __a, int __count)...@@ -2195,9 +2133,8 @@ _mm256_slli_epi32(__m256i __a, int __count)
2195/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned2133/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned
2196/// shift count (in bits). The upper element is ignored.2134/// shift count (in bits). The upper element is ignored.
2197/// \returns A 256-bit vector of [8 x i32] containing the result.2135/// \returns A 256-bit vector of [8 x i32] containing the result.
2198static __inline__ __m256i __DEFAULT_FN_ATTRS2562136static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2199_mm256_sll_epi32(__m256i __a, __m128i __count)2137_mm256_sll_epi32(__m256i __a, __m128i __count) {
2200{
2201 return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count);2138 return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count);
2202}2139}
22032140
...@@ -2214,9 +2151,8 @@ _mm256_sll_epi32(__m256i __a, __m128i __count)...@@ -2214,9 +2151,8 @@ _mm256_sll_epi32(__m256i __a, __m128i __count)
2214/// \param __count2151/// \param __count
2215/// An unsigned integer value specifying the shift count (in bits).2152/// An unsigned integer value specifying the shift count (in bits).
2216/// \returns A 256-bit vector of [4 x i64] containing the result.2153/// \returns A 256-bit vector of [4 x i64] containing the result.
2217static __inline__ __m256i __DEFAULT_FN_ATTRS2562154static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2218_mm256_slli_epi64(__m256i __a, int __count)2155_mm256_slli_epi64(__m256i __a, int __count) {
2219{
2220 return __builtin_ia32_psllqi256((__v4di)__a, __count);2156 return __builtin_ia32_psllqi256((__v4di)__a, __count);
2221}2157}
22222158
...@@ -2235,9 +2171,8 @@ _mm256_slli_epi64(__m256i __a, int __count)...@@ -2235,9 +2171,8 @@ _mm256_slli_epi64(__m256i __a, int __count)
2235/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned2171/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned
2236/// shift count (in bits). The upper element is ignored.2172/// shift count (in bits). The upper element is ignored.
2237/// \returns A 256-bit vector of [4 x i64] containing the result.2173/// \returns A 256-bit vector of [4 x i64] containing the result.
2238static __inline__ __m256i __DEFAULT_FN_ATTRS2562174static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2239_mm256_sll_epi64(__m256i __a, __m128i __count)2175_mm256_sll_epi64(__m256i __a, __m128i __count) {
2240{
2241 return __builtin_ia32_psllq256((__v4di)__a, __count);2176 return __builtin_ia32_psllq256((__v4di)__a, __count);
2242}2177}
22432178
...@@ -2255,9 +2190,8 @@ _mm256_sll_epi64(__m256i __a, __m128i __count)...@@ -2255,9 +2190,8 @@ _mm256_sll_epi64(__m256i __a, __m128i __count)
2255/// \param __count2190/// \param __count
2256/// An unsigned integer value specifying the shift count (in bits).2191/// An unsigned integer value specifying the shift count (in bits).
2257/// \returns A 256-bit vector of [16 x i16] containing the result.2192/// \returns A 256-bit vector of [16 x i16] containing the result.
2258static __inline__ __m256i __DEFAULT_FN_ATTRS2562193static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2259_mm256_srai_epi16(__m256i __a, int __count)2194_mm256_srai_epi16(__m256i __a, int __count) {
2260{
2261 return (__m256i)__builtin_ia32_psrawi256((__v16hi)__a, __count);2195 return (__m256i)__builtin_ia32_psrawi256((__v16hi)__a, __count);
2262}2196}
22632197
...@@ -2277,9 +2211,8 @@ _mm256_srai_epi16(__m256i __a, int __count)...@@ -2277,9 +2211,8 @@ _mm256_srai_epi16(__m256i __a, int __count)
2277/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned2211/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned
2278/// shift count (in bits). The upper element is ignored.2212/// shift count (in bits). The upper element is ignored.
2279/// \returns A 256-bit vector of [16 x i16] containing the result.2213/// \returns A 256-bit vector of [16 x i16] containing the result.
2280static __inline__ __m256i __DEFAULT_FN_ATTRS2562214static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2281_mm256_sra_epi16(__m256i __a, __m128i __count)2215_mm256_sra_epi16(__m256i __a, __m128i __count) {
2282{
2283 return (__m256i)__builtin_ia32_psraw256((__v16hi)__a, (__v8hi)__count);2216 return (__m256i)__builtin_ia32_psraw256((__v16hi)__a, (__v8hi)__count);
2284}2217}
22852218
...@@ -2297,9 +2230,8 @@ _mm256_sra_epi16(__m256i __a, __m128i __count)...@@ -2297,9 +2230,8 @@ _mm256_sra_epi16(__m256i __a, __m128i __count)
2297/// \param __count2230/// \param __count
2298/// An unsigned integer value specifying the shift count (in bits).2231/// An unsigned integer value specifying the shift count (in bits).
2299/// \returns A 256-bit vector of [8 x i32] containing the result.2232/// \returns A 256-bit vector of [8 x i32] containing the result.
2300static __inline__ __m256i __DEFAULT_FN_ATTRS2562233static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2301_mm256_srai_epi32(__m256i __a, int __count)2234_mm256_srai_epi32(__m256i __a, int __count) {
2302{
2303 return (__m256i)__builtin_ia32_psradi256((__v8si)__a, __count);2235 return (__m256i)__builtin_ia32_psradi256((__v8si)__a, __count);
2304}2236}
23052237
...@@ -2319,9 +2251,8 @@ _mm256_srai_epi32(__m256i __a, int __count)...@@ -2319,9 +2251,8 @@ _mm256_srai_epi32(__m256i __a, int __count)
2319/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned2251/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned
2320/// shift count (in bits). The upper element is ignored.2252/// shift count (in bits). The upper element is ignored.
2321/// \returns A 256-bit vector of [8 x i32] containing the result.2253/// \returns A 256-bit vector of [8 x i32] containing the result.
2322static __inline__ __m256i __DEFAULT_FN_ATTRS2562254static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2323_mm256_sra_epi32(__m256i __a, __m128i __count)2255_mm256_sra_epi32(__m256i __a, __m128i __count) {
2324{
2325 return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count);2256 return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count);
2326}2257}
23272258
...@@ -2342,8 +2273,9 @@ _mm256_sra_epi32(__m256i __a, __m128i __count)...@@ -2342,8 +2273,9 @@ _mm256_sra_epi32(__m256i __a, __m128i __count)
2342/// \param imm2273/// \param imm
2343/// An unsigned immediate value specifying the shift count (in bytes).2274/// An unsigned immediate value specifying the shift count (in bytes).
2344/// \returns A 256-bit integer vector containing the result.2275/// \returns A 256-bit integer vector containing the result.
2345#define _mm256_srli_si256(a, imm) \2276#define _mm256_srli_si256(a, imm) \
2346 ((__m256i)__builtin_ia32_psrldqi256_byteshift((__m256i)(a), (int)(imm)))2277 ((__m256i)__builtin_ia32_psrldqi256_byteshift((__v32qi)(__m256i)(a), \
2278 (int)(imm)))
23472279
2348/// Shifts each 128-bit half of the 256-bit integer vector in \a a right by2280/// Shifts each 128-bit half of the 256-bit integer vector in \a a right by
2349/// \a imm bytes, shifting in zero bytes, and returns the result. If2281/// \a imm bytes, shifting in zero bytes, and returns the result. If
...@@ -2362,8 +2294,9 @@ _mm256_sra_epi32(__m256i __a, __m128i __count)...@@ -2362,8 +2294,9 @@ _mm256_sra_epi32(__m256i __a, __m128i __count)
2362/// \param imm2294/// \param imm
2363/// An unsigned immediate value specifying the shift count (in bytes).2295/// An unsigned immediate value specifying the shift count (in bytes).
2364/// \returns A 256-bit integer vector containing the result.2296/// \returns A 256-bit integer vector containing the result.
2365#define _mm256_bsrli_epi128(a, imm) \2297#define _mm256_bsrli_epi128(a, imm) \
2366 ((__m256i)__builtin_ia32_psrldqi256_byteshift((__m256i)(a), (int)(imm)))2298 ((__m256i)__builtin_ia32_psrldqi256_byteshift((__v32qi)(__m256i)(a), \
2299 (int)(imm)))
23672300
2368/// Shifts each 16-bit element of the 256-bit vector of [16 x i16] in \a __a2301/// Shifts each 16-bit element of the 256-bit vector of [16 x i16] in \a __a
2369/// right by \a __count bits, shifting in zero bits, and returns the result.2302/// right by \a __count bits, shifting in zero bits, and returns the result.
...@@ -2378,9 +2311,8 @@ _mm256_sra_epi32(__m256i __a, __m128i __count)...@@ -2378,9 +2311,8 @@ _mm256_sra_epi32(__m256i __a, __m128i __count)
2378/// \param __count2311/// \param __count
2379/// An unsigned integer value specifying the shift count (in bits).2312/// An unsigned integer value specifying the shift count (in bits).
2380/// \returns A 256-bit vector of [16 x i16] containing the result.2313/// \returns A 256-bit vector of [16 x i16] containing the result.
2381static __inline__ __m256i __DEFAULT_FN_ATTRS2562314static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2382_mm256_srli_epi16(__m256i __a, int __count)2315_mm256_srli_epi16(__m256i __a, int __count) {
2383{
2384 return (__m256i)__builtin_ia32_psrlwi256((__v16hi)__a, __count);2316 return (__m256i)__builtin_ia32_psrlwi256((__v16hi)__a, __count);
2385}2317}
23862318
...@@ -2399,9 +2331,8 @@ _mm256_srli_epi16(__m256i __a, int __count)...@@ -2399,9 +2331,8 @@ _mm256_srli_epi16(__m256i __a, int __count)
2399/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned2331/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned
2400/// shift count (in bits). The upper element is ignored.2332/// shift count (in bits). The upper element is ignored.
2401/// \returns A 256-bit vector of [16 x i16] containing the result.2333/// \returns A 256-bit vector of [16 x i16] containing the result.
2402static __inline__ __m256i __DEFAULT_FN_ATTRS2562334static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2403_mm256_srl_epi16(__m256i __a, __m128i __count)2335_mm256_srl_epi16(__m256i __a, __m128i __count) {
2404{
2405 return (__m256i)__builtin_ia32_psrlw256((__v16hi)__a, (__v8hi)__count);2336 return (__m256i)__builtin_ia32_psrlw256((__v16hi)__a, (__v8hi)__count);
2406}2337}
24072338
...@@ -2418,9 +2349,8 @@ _mm256_srl_epi16(__m256i __a, __m128i __count)...@@ -2418,9 +2349,8 @@ _mm256_srl_epi16(__m256i __a, __m128i __count)
2418/// \param __count2349/// \param __count
2419/// An unsigned integer value specifying the shift count (in bits).2350/// An unsigned integer value specifying the shift count (in bits).
2420/// \returns A 256-bit vector of [8 x i32] containing the result.2351/// \returns A 256-bit vector of [8 x i32] containing the result.
2421static __inline__ __m256i __DEFAULT_FN_ATTRS2562352static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2422_mm256_srli_epi32(__m256i __a, int __count)2353_mm256_srli_epi32(__m256i __a, int __count) {
2423{
2424 return (__m256i)__builtin_ia32_psrldi256((__v8si)__a, __count);2354 return (__m256i)__builtin_ia32_psrldi256((__v8si)__a, __count);
2425}2355}
24262356
...@@ -2439,9 +2369,8 @@ _mm256_srli_epi32(__m256i __a, int __count)...@@ -2439,9 +2369,8 @@ _mm256_srli_epi32(__m256i __a, int __count)
2439/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned2369/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned
2440/// shift count (in bits). The upper element is ignored.2370/// shift count (in bits). The upper element is ignored.
2441/// \returns A 256-bit vector of [8 x i32] containing the result.2371/// \returns A 256-bit vector of [8 x i32] containing the result.
2442static __inline__ __m256i __DEFAULT_FN_ATTRS2562372static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2443_mm256_srl_epi32(__m256i __a, __m128i __count)2373_mm256_srl_epi32(__m256i __a, __m128i __count) {
2444{
2445 return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count);2374 return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count);
2446}2375}
24472376
...@@ -2458,9 +2387,8 @@ _mm256_srl_epi32(__m256i __a, __m128i __count)...@@ -2458,9 +2387,8 @@ _mm256_srl_epi32(__m256i __a, __m128i __count)
2458/// \param __count2387/// \param __count
2459/// An unsigned integer value specifying the shift count (in bits).2388/// An unsigned integer value specifying the shift count (in bits).
2460/// \returns A 256-bit vector of [4 x i64] containing the result.2389/// \returns A 256-bit vector of [4 x i64] containing the result.
2461static __inline__ __m256i __DEFAULT_FN_ATTRS2562390static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2462_mm256_srli_epi64(__m256i __a, int __count)2391_mm256_srli_epi64(__m256i __a, int __count) {
2463{
2464 return __builtin_ia32_psrlqi256((__v4di)__a, __count);2392 return __builtin_ia32_psrlqi256((__v4di)__a, __count);
2465}2393}
24662394
...@@ -2479,9 +2407,8 @@ _mm256_srli_epi64(__m256i __a, int __count)...@@ -2479,9 +2407,8 @@ _mm256_srli_epi64(__m256i __a, int __count)
2479/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned2407/// A 128-bit vector of [2 x i64] whose lower element gives the unsigned
2480/// shift count (in bits). The upper element is ignored.2408/// shift count (in bits). The upper element is ignored.
2481/// \returns A 256-bit vector of [4 x i64] containing the result.2409/// \returns A 256-bit vector of [4 x i64] containing the result.
2482static __inline__ __m256i __DEFAULT_FN_ATTRS2562410static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2483_mm256_srl_epi64(__m256i __a, __m128i __count)2411_mm256_srl_epi64(__m256i __a, __m128i __count) {
2484{
2485 return __builtin_ia32_psrlq256((__v4di)__a, __count);2412 return __builtin_ia32_psrlq256((__v4di)__a, __count);
2486}2413}
24872414
...@@ -2506,9 +2433,8 @@ _mm256_srl_epi64(__m256i __a, __m128i __count)...@@ -2506,9 +2433,8 @@ _mm256_srl_epi64(__m256i __a, __m128i __count)
2506/// \param __b2433/// \param __b
2507/// A 256-bit integer vector containing the subtrahends.2434/// A 256-bit integer vector containing the subtrahends.
2508/// \returns A 256-bit integer vector containing the differences.2435/// \returns A 256-bit integer vector containing the differences.
2509static __inline__ __m256i __DEFAULT_FN_ATTRS2562436static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2510_mm256_sub_epi8(__m256i __a, __m256i __b)2437_mm256_sub_epi8(__m256i __a, __m256i __b) {
2511{
2512 return (__m256i)((__v32qu)__a - (__v32qu)__b);2438 return (__m256i)((__v32qu)__a - (__v32qu)__b);
2513}2439}
25142440
...@@ -2533,9 +2459,8 @@ _mm256_sub_epi8(__m256i __a, __m256i __b)...@@ -2533,9 +2459,8 @@ _mm256_sub_epi8(__m256i __a, __m256i __b)
2533/// \param __b2459/// \param __b
2534/// A 256-bit vector of [16 x i16] containing the subtrahends.2460/// A 256-bit vector of [16 x i16] containing the subtrahends.
2535/// \returns A 256-bit vector of [16 x i16] containing the differences.2461/// \returns A 256-bit vector of [16 x i16] containing the differences.
2536static __inline__ __m256i __DEFAULT_FN_ATTRS2562462static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2537_mm256_sub_epi16(__m256i __a, __m256i __b)2463_mm256_sub_epi16(__m256i __a, __m256i __b) {
2538{
2539 return (__m256i)((__v16hu)__a - (__v16hu)__b);2464 return (__m256i)((__v16hu)__a - (__v16hu)__b);
2540}2465}
25412466
...@@ -2559,9 +2484,8 @@ _mm256_sub_epi16(__m256i __a, __m256i __b)...@@ -2559,9 +2484,8 @@ _mm256_sub_epi16(__m256i __a, __m256i __b)
2559/// \param __b2484/// \param __b
2560/// A 256-bit vector of [8 x i32] containing the subtrahends.2485/// A 256-bit vector of [8 x i32] containing the subtrahends.
2561/// \returns A 256-bit vector of [8 x i32] containing the differences.2486/// \returns A 256-bit vector of [8 x i32] containing the differences.
2562static __inline__ __m256i __DEFAULT_FN_ATTRS2562487static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2563_mm256_sub_epi32(__m256i __a, __m256i __b)2488_mm256_sub_epi32(__m256i __a, __m256i __b) {
2564{
2565 return (__m256i)((__v8su)__a - (__v8su)__b);2489 return (__m256i)((__v8su)__a - (__v8su)__b);
2566}2490}
25672491
...@@ -2585,9 +2509,8 @@ _mm256_sub_epi32(__m256i __a, __m256i __b)...@@ -2585,9 +2509,8 @@ _mm256_sub_epi32(__m256i __a, __m256i __b)
2585/// \param __b2509/// \param __b
2586/// A 256-bit vector of [4 x i64] containing the subtrahends.2510/// A 256-bit vector of [4 x i64] containing the subtrahends.
2587/// \returns A 256-bit vector of [4 x i64] containing the differences.2511/// \returns A 256-bit vector of [4 x i64] containing the differences.
2588static __inline__ __m256i __DEFAULT_FN_ATTRS2562512static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2589_mm256_sub_epi64(__m256i __a, __m256i __b)2513_mm256_sub_epi64(__m256i __a, __m256i __b) {
2590{
2591 return (__m256i)((__v4du)__a - (__v4du)__b);2514 return (__m256i)((__v4du)__a - (__v4du)__b);
2592}2515}
25932516
...@@ -2611,9 +2534,8 @@ _mm256_sub_epi64(__m256i __a, __m256i __b)...@@ -2611,9 +2534,8 @@ _mm256_sub_epi64(__m256i __a, __m256i __b)
2611/// \param __b2534/// \param __b
2612/// A 256-bit integer vector containing the subtrahends.2535/// A 256-bit integer vector containing the subtrahends.
2613/// \returns A 256-bit integer vector containing the differences.2536/// \returns A 256-bit integer vector containing the differences.
2614static __inline__ __m256i __DEFAULT_FN_ATTRS2562537static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2615_mm256_subs_epi8(__m256i __a, __m256i __b)2538_mm256_subs_epi8(__m256i __a, __m256i __b) {
2616{
2617 return (__m256i)__builtin_elementwise_sub_sat((__v32qs)__a, (__v32qs)__b);2539 return (__m256i)__builtin_elementwise_sub_sat((__v32qs)__a, (__v32qs)__b);
2618}2540}
26192541
...@@ -2637,9 +2559,8 @@ _mm256_subs_epi8(__m256i __a, __m256i __b)...@@ -2637,9 +2559,8 @@ _mm256_subs_epi8(__m256i __a, __m256i __b)
2637/// \param __b2559/// \param __b
2638/// A 256-bit vector of [16 x i16] containing the subtrahends.2560/// A 256-bit vector of [16 x i16] containing the subtrahends.
2639/// \returns A 256-bit vector of [16 x i16] containing the differences.2561/// \returns A 256-bit vector of [16 x i16] containing the differences.
2640static __inline__ __m256i __DEFAULT_FN_ATTRS2562562static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2641_mm256_subs_epi16(__m256i __a, __m256i __b)2563_mm256_subs_epi16(__m256i __a, __m256i __b) {
2642{
2643 return (__m256i)__builtin_elementwise_sub_sat((__v16hi)__a, (__v16hi)__b);2564 return (__m256i)__builtin_elementwise_sub_sat((__v16hi)__a, (__v16hi)__b);
2644}2565}
26452566
...@@ -2664,9 +2585,8 @@ _mm256_subs_epi16(__m256i __a, __m256i __b)...@@ -2664,9 +2585,8 @@ _mm256_subs_epi16(__m256i __a, __m256i __b)
2664/// \param __b2585/// \param __b
2665/// A 256-bit integer vector containing the subtrahends.2586/// A 256-bit integer vector containing the subtrahends.
2666/// \returns A 256-bit integer vector containing the differences.2587/// \returns A 256-bit integer vector containing the differences.
2667static __inline__ __m256i __DEFAULT_FN_ATTRS2562588static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2668_mm256_subs_epu8(__m256i __a, __m256i __b)2589_mm256_subs_epu8(__m256i __a, __m256i __b) {
2669{
2670 return (__m256i)__builtin_elementwise_sub_sat((__v32qu)__a, (__v32qu)__b);2590 return (__m256i)__builtin_elementwise_sub_sat((__v32qu)__a, (__v32qu)__b);
2671}2591}
26722592
...@@ -2690,9 +2610,8 @@ _mm256_subs_epu8(__m256i __a, __m256i __b)...@@ -2690,9 +2610,8 @@ _mm256_subs_epu8(__m256i __a, __m256i __b)
2690/// \param __b2610/// \param __b
2691/// A 256-bit vector of [16 x i16] containing the subtrahends.2611/// A 256-bit vector of [16 x i16] containing the subtrahends.
2692/// \returns A 256-bit vector of [16 x i16] containing the differences.2612/// \returns A 256-bit vector of [16 x i16] containing the differences.
2693static __inline__ __m256i __DEFAULT_FN_ATTRS2562613static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2694_mm256_subs_epu16(__m256i __a, __m256i __b)2614_mm256_subs_epu16(__m256i __a, __m256i __b) {
2695{
2696 return (__m256i)__builtin_elementwise_sub_sat((__v16hu)__a, (__v16hu)__b);2615 return (__m256i)__builtin_elementwise_sub_sat((__v16hu)__a, (__v16hu)__b);
2697}2616}
26982617
...@@ -2724,9 +2643,8 @@ _mm256_subs_epu16(__m256i __a, __m256i __b)...@@ -2724,9 +2643,8 @@ _mm256_subs_epu16(__m256i __a, __m256i __b)
2724/// A 256-bit integer vector used as the source for the odd-numbered bytes2643/// A 256-bit integer vector used as the source for the odd-numbered bytes
2725/// of the result.2644/// of the result.
2726/// \returns A 256-bit integer vector containing the result.2645/// \returns A 256-bit integer vector containing the result.
2727static __inline__ __m256i __DEFAULT_FN_ATTRS2562646static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2728_mm256_unpackhi_epi8(__m256i __a, __m256i __b)2647_mm256_unpackhi_epi8(__m256i __a, __m256i __b) {
2729{
2730 return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 8, 32+8, 9, 32+9, 10, 32+10, 11, 32+11, 12, 32+12, 13, 32+13, 14, 32+14, 15, 32+15, 24, 32+24, 25, 32+25, 26, 32+26, 27, 32+27, 28, 32+28, 29, 32+29, 30, 32+30, 31, 32+31);2648 return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 8, 32+8, 9, 32+9, 10, 32+10, 11, 32+11, 12, 32+12, 13, 32+13, 14, 32+14, 15, 32+15, 24, 32+24, 25, 32+25, 26, 32+26, 27, 32+27, 28, 32+28, 29, 32+29, 30, 32+30, 31, 32+31);
2731}2649}
27322650
...@@ -2759,9 +2677,8 @@ _mm256_unpackhi_epi8(__m256i __a, __m256i __b)...@@ -2759,9 +2677,8 @@ _mm256_unpackhi_epi8(__m256i __a, __m256i __b)
2759/// A 256-bit vector of [16 x i16] used as the source for the odd-numbered2677/// A 256-bit vector of [16 x i16] used as the source for the odd-numbered
2760/// elements of the result.2678/// elements of the result.
2761/// \returns A 256-bit vector of [16 x i16] containing the result.2679/// \returns A 256-bit vector of [16 x i16] containing the result.
2762static __inline__ __m256i __DEFAULT_FN_ATTRS2562680static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2763_mm256_unpackhi_epi16(__m256i __a, __m256i __b)2681_mm256_unpackhi_epi16(__m256i __a, __m256i __b) {
2764{
2765 return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15);2682 return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15);
2766}2683}
27672684
...@@ -2793,9 +2710,8 @@ _mm256_unpackhi_epi16(__m256i __a, __m256i __b)...@@ -2793,9 +2710,8 @@ _mm256_unpackhi_epi16(__m256i __a, __m256i __b)
2793/// A 256-bit vector of [8 x i32] used as the source for the odd-numbered2710/// A 256-bit vector of [8 x i32] used as the source for the odd-numbered
2794/// elements of the result.2711/// elements of the result.
2795/// \returns A 256-bit vector of [8 x i32] containing the result.2712/// \returns A 256-bit vector of [8 x i32] containing the result.
2796static __inline__ __m256i __DEFAULT_FN_ATTRS2562713static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2797_mm256_unpackhi_epi32(__m256i __a, __m256i __b)2714_mm256_unpackhi_epi32(__m256i __a, __m256i __b) {
2798{
2799 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7);2715 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7);
2800}2716}
28012717
...@@ -2823,9 +2739,8 @@ _mm256_unpackhi_epi32(__m256i __a, __m256i __b)...@@ -2823,9 +2739,8 @@ _mm256_unpackhi_epi32(__m256i __a, __m256i __b)
2823/// A 256-bit vector of [4 x i64] used as the source for the odd-numbered2739/// A 256-bit vector of [4 x i64] used as the source for the odd-numbered
2824/// elements of the result.2740/// elements of the result.
2825/// \returns A 256-bit vector of [4 x i64] containing the result.2741/// \returns A 256-bit vector of [4 x i64] containing the result.
2826static __inline__ __m256i __DEFAULT_FN_ATTRS2562742static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2827_mm256_unpackhi_epi64(__m256i __a, __m256i __b)2743_mm256_unpackhi_epi64(__m256i __a, __m256i __b) {
2828{
2829 return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 1, 4+1, 3, 4+3);2744 return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 1, 4+1, 3, 4+3);
2830}2745}
28312746
...@@ -2857,9 +2772,8 @@ _mm256_unpackhi_epi64(__m256i __a, __m256i __b)...@@ -2857,9 +2772,8 @@ _mm256_unpackhi_epi64(__m256i __a, __m256i __b)
2857/// A 256-bit integer vector used as the source for the odd-numbered bytes2772/// A 256-bit integer vector used as the source for the odd-numbered bytes
2858/// of the result.2773/// of the result.
2859/// \returns A 256-bit integer vector containing the result.2774/// \returns A 256-bit integer vector containing the result.
2860static __inline__ __m256i __DEFAULT_FN_ATTRS2562775static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2861_mm256_unpacklo_epi8(__m256i __a, __m256i __b)2776_mm256_unpacklo_epi8(__m256i __a, __m256i __b) {
2862{
2863 return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 0, 32+0, 1, 32+1, 2, 32+2, 3, 32+3, 4, 32+4, 5, 32+5, 6, 32+6, 7, 32+7, 16, 32+16, 17, 32+17, 18, 32+18, 19, 32+19, 20, 32+20, 21, 32+21, 22, 32+22, 23, 32+23);2777 return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 0, 32+0, 1, 32+1, 2, 32+2, 3, 32+3, 4, 32+4, 5, 32+5, 6, 32+6, 7, 32+7, 16, 32+16, 17, 32+17, 18, 32+18, 19, 32+19, 20, 32+20, 21, 32+21, 22, 32+22, 23, 32+23);
2864}2778}
28652779
...@@ -2892,9 +2806,8 @@ _mm256_unpacklo_epi8(__m256i __a, __m256i __b)...@@ -2892,9 +2806,8 @@ _mm256_unpacklo_epi8(__m256i __a, __m256i __b)
2892/// A 256-bit vector of [16 x i16] used as the source for the odd-numbered2806/// A 256-bit vector of [16 x i16] used as the source for the odd-numbered
2893/// elements of the result.2807/// elements of the result.
2894/// \returns A 256-bit vector of [16 x i16] containing the result.2808/// \returns A 256-bit vector of [16 x i16] containing the result.
2895static __inline__ __m256i __DEFAULT_FN_ATTRS2562809static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2896_mm256_unpacklo_epi16(__m256i __a, __m256i __b)2810_mm256_unpacklo_epi16(__m256i __a, __m256i __b) {
2897{
2898 return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11);2811 return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11);
2899}2812}
29002813
...@@ -2926,9 +2839,8 @@ _mm256_unpacklo_epi16(__m256i __a, __m256i __b)...@@ -2926,9 +2839,8 @@ _mm256_unpacklo_epi16(__m256i __a, __m256i __b)
2926/// A 256-bit vector of [8 x i32] used as the source for the odd-numbered2839/// A 256-bit vector of [8 x i32] used as the source for the odd-numbered
2927/// elements of the result.2840/// elements of the result.
2928/// \returns A 256-bit vector of [8 x i32] containing the result.2841/// \returns A 256-bit vector of [8 x i32] containing the result.
2929static __inline__ __m256i __DEFAULT_FN_ATTRS2562842static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2930_mm256_unpacklo_epi32(__m256i __a, __m256i __b)2843_mm256_unpacklo_epi32(__m256i __a, __m256i __b) {
2931{
2932 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5);2844 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5);
2933}2845}
29342846
...@@ -2956,9 +2868,8 @@ _mm256_unpacklo_epi32(__m256i __a, __m256i __b)...@@ -2956,9 +2868,8 @@ _mm256_unpacklo_epi32(__m256i __a, __m256i __b)
2956/// A 256-bit vector of [4 x i64] used as the source for the odd-numbered2868/// A 256-bit vector of [4 x i64] used as the source for the odd-numbered
2957/// elements of the result.2869/// elements of the result.
2958/// \returns A 256-bit vector of [4 x i64] containing the result.2870/// \returns A 256-bit vector of [4 x i64] containing the result.
2959static __inline__ __m256i __DEFAULT_FN_ATTRS2562871static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2960_mm256_unpacklo_epi64(__m256i __a, __m256i __b)2872_mm256_unpacklo_epi64(__m256i __a, __m256i __b) {
2961{
2962 return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 0, 4+0, 2, 4+2);2873 return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 0, 4+0, 2, 4+2);
2963}2874}
29642875
...@@ -2974,7 +2885,7 @@ _mm256_unpacklo_epi64(__m256i __a, __m256i __b)...@@ -2974,7 +2885,7 @@ _mm256_unpacklo_epi64(__m256i __a, __m256i __b)
2974/// \param __b2885/// \param __b
2975/// A 256-bit integer vector.2886/// A 256-bit integer vector.
2976/// \returns A 256-bit integer vector containing the result.2887/// \returns A 256-bit integer vector containing the result.
2977static __inline__ __m256i __DEFAULT_FN_ATTRS2562888static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2978_mm256_xor_si256(__m256i __a, __m256i __b)2889_mm256_xor_si256(__m256i __a, __m256i __b)
2979{2890{
2980 return (__m256i)((__v4du)__a ^ (__v4du)__b);2891 return (__m256i)((__v4du)__a ^ (__v4du)__b);
...@@ -3009,9 +2920,8 @@ _mm256_stream_load_si256(const void *__V)...@@ -3009,9 +2920,8 @@ _mm256_stream_load_si256(const void *__V)
3009/// \param __X2920/// \param __X
3010/// A 128-bit vector of [4 x float] whose low element will be broadcast.2921/// A 128-bit vector of [4 x float] whose low element will be broadcast.
3011/// \returns A 128-bit vector of [4 x float] containing the result.2922/// \returns A 128-bit vector of [4 x float] containing the result.
3012static __inline__ __m128 __DEFAULT_FN_ATTRS1282923static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3013_mm_broadcastss_ps(__m128 __X)2924_mm_broadcastss_ps(__m128 __X) {
3014{
3015 return (__m128)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0);2925 return (__m128)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0);
3016}2926}
30172927
...@@ -3026,9 +2936,8 @@ _mm_broadcastss_ps(__m128 __X)...@@ -3026,9 +2936,8 @@ _mm_broadcastss_ps(__m128 __X)
3026/// \param __a2936/// \param __a
3027/// A 128-bit vector of [2 x double] whose low element will be broadcast.2937/// A 128-bit vector of [2 x double] whose low element will be broadcast.
3028/// \returns A 128-bit vector of [2 x double] containing the result.2938/// \returns A 128-bit vector of [2 x double] containing the result.
3029static __inline__ __m128d __DEFAULT_FN_ATTRS1282939static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3030_mm_broadcastsd_pd(__m128d __a)2940_mm_broadcastsd_pd(__m128d __a) {
3031{
3032 return __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);2941 return __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
3033}2942}
30342943
...@@ -3043,9 +2952,8 @@ _mm_broadcastsd_pd(__m128d __a)...@@ -3043,9 +2952,8 @@ _mm_broadcastsd_pd(__m128d __a)
3043/// \param __X2952/// \param __X
3044/// A 128-bit vector of [4 x float] whose low element will be broadcast.2953/// A 128-bit vector of [4 x float] whose low element will be broadcast.
3045/// \returns A 256-bit vector of [8 x float] containing the result.2954/// \returns A 256-bit vector of [8 x float] containing the result.
3046static __inline__ __m256 __DEFAULT_FN_ATTRS2562955static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3047_mm256_broadcastss_ps(__m128 __X)2956_mm256_broadcastss_ps(__m128 __X) {
3048{
3049 return (__m256)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0, 0, 0, 0, 0);2957 return (__m256)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0, 0, 0, 0, 0);
3050}2958}
30512959
...@@ -3060,9 +2968,8 @@ _mm256_broadcastss_ps(__m128 __X)...@@ -3060,9 +2968,8 @@ _mm256_broadcastss_ps(__m128 __X)
3060/// \param __X2968/// \param __X
3061/// A 128-bit vector of [2 x double] whose low element will be broadcast.2969/// A 128-bit vector of [2 x double] whose low element will be broadcast.
3062/// \returns A 256-bit vector of [4 x double] containing the result.2970/// \returns A 256-bit vector of [4 x double] containing the result.
3063static __inline__ __m256d __DEFAULT_FN_ATTRS2562971static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3064_mm256_broadcastsd_pd(__m128d __X)2972_mm256_broadcastsd_pd(__m128d __X) {
3065{
3066 return (__m256d)__builtin_shufflevector((__v2df)__X, (__v2df)__X, 0, 0, 0, 0);2973 return (__m256d)__builtin_shufflevector((__v2df)__X, (__v2df)__X, 0, 0, 0, 0);
3067}2974}
30682975
...@@ -3076,9 +2983,8 @@ _mm256_broadcastsd_pd(__m128d __X)...@@ -3076,9 +2983,8 @@ _mm256_broadcastsd_pd(__m128d __X)
3076/// \param __X2983/// \param __X
3077/// A 128-bit integer vector to be broadcast.2984/// A 128-bit integer vector to be broadcast.
3078/// \returns A 256-bit integer vector containing the result.2985/// \returns A 256-bit integer vector containing the result.
3079static __inline__ __m256i __DEFAULT_FN_ATTRS2562986static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3080_mm256_broadcastsi128_si256(__m128i __X)2987_mm256_broadcastsi128_si256(__m128i __X) {
3081{
3082 return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 1, 0, 1);2988 return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 1, 0, 1);
3083}2989}
30842990
...@@ -3168,9 +3074,8 @@ _mm256_broadcastsi128_si256(__m128i __X)...@@ -3168,9 +3074,8 @@ _mm256_broadcastsi128_si256(__m128i __X)
3168/// \param __X3074/// \param __X
3169/// A 128-bit integer vector whose low byte will be broadcast.3075/// A 128-bit integer vector whose low byte will be broadcast.
3170/// \returns A 256-bit integer vector containing the result.3076/// \returns A 256-bit integer vector containing the result.
3171static __inline__ __m256i __DEFAULT_FN_ATTRS2563077static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3172_mm256_broadcastb_epi8(__m128i __X)3078_mm256_broadcastb_epi8(__m128i __X) {
3173{
3174 return (__m256i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);3079 return (__m256i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
3175}3080}
31763081
...@@ -3184,9 +3089,8 @@ _mm256_broadcastb_epi8(__m128i __X)...@@ -3184,9 +3089,8 @@ _mm256_broadcastb_epi8(__m128i __X)
3184/// \param __X3089/// \param __X
3185/// A 128-bit vector of [8 x i16] whose low element will be broadcast.3090/// A 128-bit vector of [8 x i16] whose low element will be broadcast.
3186/// \returns A 256-bit vector of [16 x i16] containing the result.3091/// \returns A 256-bit vector of [16 x i16] containing the result.
3187static __inline__ __m256i __DEFAULT_FN_ATTRS2563092static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3188_mm256_broadcastw_epi16(__m128i __X)3093_mm256_broadcastw_epi16(__m128i __X) {
3189{
3190 return (__m256i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);3094 return (__m256i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
3191}3095}
31923096
...@@ -3200,9 +3104,8 @@ _mm256_broadcastw_epi16(__m128i __X)...@@ -3200,9 +3104,8 @@ _mm256_broadcastw_epi16(__m128i __X)
3200/// \param __X3104/// \param __X
3201/// A 128-bit vector of [4 x i32] whose low element will be broadcast.3105/// A 128-bit vector of [4 x i32] whose low element will be broadcast.
3202/// \returns A 256-bit vector of [8 x i32] containing the result.3106/// \returns A 256-bit vector of [8 x i32] containing the result.
3203static __inline__ __m256i __DEFAULT_FN_ATTRS2563107static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3204_mm256_broadcastd_epi32(__m128i __X)3108_mm256_broadcastd_epi32(__m128i __X) {
3205{
3206 return (__m256i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0, 0, 0, 0, 0);3109 return (__m256i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0, 0, 0, 0, 0);
3207}3110}
32083111
...@@ -3216,9 +3119,8 @@ _mm256_broadcastd_epi32(__m128i __X)...@@ -3216,9 +3119,8 @@ _mm256_broadcastd_epi32(__m128i __X)
3216/// \param __X3119/// \param __X
3217/// A 128-bit vector of [2 x i64] whose low element will be broadcast.3120/// A 128-bit vector of [2 x i64] whose low element will be broadcast.
3218/// \returns A 256-bit vector of [4 x i64] containing the result.3121/// \returns A 256-bit vector of [4 x i64] containing the result.
3219static __inline__ __m256i __DEFAULT_FN_ATTRS2563122static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3220_mm256_broadcastq_epi64(__m128i __X)3123_mm256_broadcastq_epi64(__m128i __X) {
3221{
3222 return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0, 0, 0);3124 return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0, 0, 0);
3223}3125}
32243126
...@@ -3232,9 +3134,8 @@ _mm256_broadcastq_epi64(__m128i __X)...@@ -3232,9 +3134,8 @@ _mm256_broadcastq_epi64(__m128i __X)
3232/// \param __X3134/// \param __X
3233/// A 128-bit integer vector whose low byte will be broadcast.3135/// A 128-bit integer vector whose low byte will be broadcast.
3234/// \returns A 128-bit integer vector containing the result.3136/// \returns A 128-bit integer vector containing the result.
3235static __inline__ __m128i __DEFAULT_FN_ATTRS1283137static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3236_mm_broadcastb_epi8(__m128i __X)3138_mm_broadcastb_epi8(__m128i __X) {
3237{
3238 return (__m128i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);3139 return (__m128i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
3239}3140}
32403141
...@@ -3248,9 +3149,8 @@ _mm_broadcastb_epi8(__m128i __X)...@@ -3248,9 +3149,8 @@ _mm_broadcastb_epi8(__m128i __X)
3248/// \param __X3149/// \param __X
3249/// A 128-bit vector of [8 x i16] whose low element will be broadcast.3150/// A 128-bit vector of [8 x i16] whose low element will be broadcast.
3250/// \returns A 128-bit vector of [8 x i16] containing the result.3151/// \returns A 128-bit vector of [8 x i16] containing the result.
3251static __inline__ __m128i __DEFAULT_FN_ATTRS1283152static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3252_mm_broadcastw_epi16(__m128i __X)3153_mm_broadcastw_epi16(__m128i __X) {
3253{
3254 return (__m128i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0);3154 return (__m128i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0);
3255}3155}
32563156
...@@ -3264,9 +3164,8 @@ _mm_broadcastw_epi16(__m128i __X)...@@ -3264,9 +3164,8 @@ _mm_broadcastw_epi16(__m128i __X)
3264/// \param __X3164/// \param __X
3265/// A 128-bit vector of [4 x i32] whose low element will be broadcast.3165/// A 128-bit vector of [4 x i32] whose low element will be broadcast.
3266/// \returns A 128-bit vector of [4 x i32] containing the result.3166/// \returns A 128-bit vector of [4 x i32] containing the result.
3267static __inline__ __m128i __DEFAULT_FN_ATTRS1283167static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3268_mm_broadcastd_epi32(__m128i __X)3168_mm_broadcastd_epi32(__m128i __X) {
3269{
3270 return (__m128i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0);3169 return (__m128i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0);
3271}3170}
32723171
...@@ -3280,9 +3179,8 @@ _mm_broadcastd_epi32(__m128i __X)...@@ -3280,9 +3179,8 @@ _mm_broadcastd_epi32(__m128i __X)
3280/// \param __X3179/// \param __X
3281/// A 128-bit vector of [2 x i64] whose low element will be broadcast.3180/// A 128-bit vector of [2 x i64] whose low element will be broadcast.
3282/// \returns A 128-bit vector of [2 x i64] containing the result.3181/// \returns A 128-bit vector of [2 x i64] containing the result.
3283static __inline__ __m128i __DEFAULT_FN_ATTRS1283182static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3284_mm_broadcastq_epi64(__m128i __X)3183_mm_broadcastq_epi64(__m128i __X) {
3285{
3286 return (__m128i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0);3184 return (__m128i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0);
3287}3185}
32883186
...@@ -3308,9 +3206,8 @@ _mm_broadcastq_epi64(__m128i __X)...@@ -3308,9 +3206,8 @@ _mm_broadcastq_epi64(__m128i __X)
3308/// A 256-bit vector of [8 x i32] containing indexes of values to use from3206/// A 256-bit vector of [8 x i32] containing indexes of values to use from
3309/// \a __a.3207/// \a __a.
3310/// \returns A 256-bit vector of [8 x i32] containing the result.3208/// \returns A 256-bit vector of [8 x i32] containing the result.
3311static __inline__ __m256i __DEFAULT_FN_ATTRS2563209static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3312_mm256_permutevar8x32_epi32(__m256i __a, __m256i __b)3210_mm256_permutevar8x32_epi32(__m256i __a, __m256i __b) {
3313{
3314 return (__m256i)__builtin_ia32_permvarsi256((__v8si)__a, (__v8si)__b);3211 return (__m256i)__builtin_ia32_permvarsi256((__v8si)__a, (__v8si)__b);
3315}3212}
33163213
...@@ -3366,9 +3263,8 @@ _mm256_permutevar8x32_epi32(__m256i __a, __m256i __b)...@@ -3366,9 +3263,8 @@ _mm256_permutevar8x32_epi32(__m256i __a, __m256i __b)
3366/// A 256-bit vector of [8 x i32] containing indexes of values to use from3263/// A 256-bit vector of [8 x i32] containing indexes of values to use from
3367/// \a __a.3264/// \a __a.
3368/// \returns A 256-bit vector of [8 x float] containing the result.3265/// \returns A 256-bit vector of [8 x float] containing the result.
3369static __inline__ __m256 __DEFAULT_FN_ATTRS2563266static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3370_mm256_permutevar8x32_ps(__m256 __a, __m256i __b)3267_mm256_permutevar8x32_ps(__m256 __a, __m256i __b) {
3371{
3372 return (__m256)__builtin_ia32_permvarsf256((__v8sf)__a, (__v8si)__b);3268 return (__m256)__builtin_ia32_permvarsf256((__v8sf)__a, (__v8si)__b);
3373}3269}
33743270
...@@ -3756,7 +3652,7 @@ _mm_maskstore_epi64(long long *__X, __m128i __M, __m128i __Y)...@@ -3756,7 +3652,7 @@ _mm_maskstore_epi64(long long *__X, __m128i __M, __m128i __Y)
3756/// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in3652/// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in
3757/// bits).3653/// bits).
3758/// \returns A 256-bit vector of [8 x i32] containing the result.3654/// \returns A 256-bit vector of [8 x i32] containing the result.
3759static __inline__ __m256i __DEFAULT_FN_ATTRS2563655static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3760_mm256_sllv_epi32(__m256i __X, __m256i __Y)3656_mm256_sllv_epi32(__m256i __X, __m256i __Y)
3761{3657{
3762 return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y);3658 return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y);
...@@ -3778,7 +3674,7 @@ _mm256_sllv_epi32(__m256i __X, __m256i __Y)...@@ -3778,7 +3674,7 @@ _mm256_sllv_epi32(__m256i __X, __m256i __Y)
3778/// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in3674/// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in
3779/// bits).3675/// bits).
3780/// \returns A 128-bit vector of [4 x i32] containing the result.3676/// \returns A 128-bit vector of [4 x i32] containing the result.
3781static __inline__ __m128i __DEFAULT_FN_ATTRS1283677static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3782_mm_sllv_epi32(__m128i __X, __m128i __Y)3678_mm_sllv_epi32(__m128i __X, __m128i __Y)
3783{3679{
3784 return (__m128i)__builtin_ia32_psllv4si((__v4si)__X, (__v4si)__Y);3680 return (__m128i)__builtin_ia32_psllv4si((__v4si)__X, (__v4si)__Y);
...@@ -3800,7 +3696,7 @@ _mm_sllv_epi32(__m128i __X, __m128i __Y)...@@ -3800,7 +3696,7 @@ _mm_sllv_epi32(__m128i __X, __m128i __Y)
3800/// A 256-bit vector of [4 x i64] containing the unsigned shift counts (in3696/// A 256-bit vector of [4 x i64] containing the unsigned shift counts (in
3801/// bits).3697/// bits).
3802/// \returns A 256-bit vector of [4 x i64] containing the result.3698/// \returns A 256-bit vector of [4 x i64] containing the result.
3803static __inline__ __m256i __DEFAULT_FN_ATTRS2563699static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3804_mm256_sllv_epi64(__m256i __X, __m256i __Y)3700_mm256_sllv_epi64(__m256i __X, __m256i __Y)
3805{3701{
3806 return (__m256i)__builtin_ia32_psllv4di((__v4di)__X, (__v4di)__Y);3702 return (__m256i)__builtin_ia32_psllv4di((__v4di)__X, (__v4di)__Y);
...@@ -3822,7 +3718,7 @@ _mm256_sllv_epi64(__m256i __X, __m256i __Y)...@@ -3822,7 +3718,7 @@ _mm256_sllv_epi64(__m256i __X, __m256i __Y)
3822/// A 128-bit vector of [2 x i64] containing the unsigned shift counts (in3718/// A 128-bit vector of [2 x i64] containing the unsigned shift counts (in
3823/// bits).3719/// bits).
3824/// \returns A 128-bit vector of [2 x i64] containing the result.3720/// \returns A 128-bit vector of [2 x i64] containing the result.
3825static __inline__ __m128i __DEFAULT_FN_ATTRS1283721static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3826_mm_sllv_epi64(__m128i __X, __m128i __Y)3722_mm_sllv_epi64(__m128i __X, __m128i __Y)
3827{3723{
3828 return (__m128i)__builtin_ia32_psllv2di((__v2di)__X, (__v2di)__Y);3724 return (__m128i)__builtin_ia32_psllv2di((__v2di)__X, (__v2di)__Y);
...@@ -3845,7 +3741,7 @@ _mm_sllv_epi64(__m128i __X, __m128i __Y)...@@ -3845,7 +3741,7 @@ _mm_sllv_epi64(__m128i __X, __m128i __Y)
3845/// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in3741/// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in
3846/// bits).3742/// bits).
3847/// \returns A 256-bit vector of [8 x i32] containing the result.3743/// \returns A 256-bit vector of [8 x i32] containing the result.
3848static __inline__ __m256i __DEFAULT_FN_ATTRS2563744static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3849_mm256_srav_epi32(__m256i __X, __m256i __Y)3745_mm256_srav_epi32(__m256i __X, __m256i __Y)
3850{3746{
3851 return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y);3747 return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y);
...@@ -3868,7 +3764,7 @@ _mm256_srav_epi32(__m256i __X, __m256i __Y)...@@ -3868,7 +3764,7 @@ _mm256_srav_epi32(__m256i __X, __m256i __Y)
3868/// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in3764/// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in
3869/// bits).3765/// bits).
3870/// \returns A 128-bit vector of [4 x i32] containing the result.3766/// \returns A 128-bit vector of [4 x i32] containing the result.
3871static __inline__ __m128i __DEFAULT_FN_ATTRS1283767static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3872_mm_srav_epi32(__m128i __X, __m128i __Y)3768_mm_srav_epi32(__m128i __X, __m128i __Y)
3873{3769{
3874 return (__m128i)__builtin_ia32_psrav4si((__v4si)__X, (__v4si)__Y);3770 return (__m128i)__builtin_ia32_psrav4si((__v4si)__X, (__v4si)__Y);
...@@ -3890,7 +3786,7 @@ _mm_srav_epi32(__m128i __X, __m128i __Y)...@@ -3890,7 +3786,7 @@ _mm_srav_epi32(__m128i __X, __m128i __Y)
3890/// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in3786/// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in
3891/// bits).3787/// bits).
3892/// \returns A 256-bit vector of [8 x i32] containing the result.3788/// \returns A 256-bit vector of [8 x i32] containing the result.
3893static __inline__ __m256i __DEFAULT_FN_ATTRS2563789static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3894_mm256_srlv_epi32(__m256i __X, __m256i __Y)3790_mm256_srlv_epi32(__m256i __X, __m256i __Y)
3895{3791{
3896 return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y);3792 return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y);
...@@ -3912,7 +3808,7 @@ _mm256_srlv_epi32(__m256i __X, __m256i __Y)...@@ -3912,7 +3808,7 @@ _mm256_srlv_epi32(__m256i __X, __m256i __Y)
3912/// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in3808/// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in
3913/// bits).3809/// bits).
3914/// \returns A 128-bit vector of [4 x i32] containing the result.3810/// \returns A 128-bit vector of [4 x i32] containing the result.
3915static __inline__ __m128i __DEFAULT_FN_ATTRS1283811static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3916_mm_srlv_epi32(__m128i __X, __m128i __Y)3812_mm_srlv_epi32(__m128i __X, __m128i __Y)
3917{3813{
3918 return (__m128i)__builtin_ia32_psrlv4si((__v4si)__X, (__v4si)__Y);3814 return (__m128i)__builtin_ia32_psrlv4si((__v4si)__X, (__v4si)__Y);
...@@ -3934,7 +3830,7 @@ _mm_srlv_epi32(__m128i __X, __m128i __Y)...@@ -3934,7 +3830,7 @@ _mm_srlv_epi32(__m128i __X, __m128i __Y)
3934/// A 256-bit vector of [4 x i64] containing the unsigned shift counts (in3830/// A 256-bit vector of [4 x i64] containing the unsigned shift counts (in
3935/// bits).3831/// bits).
3936/// \returns A 256-bit vector of [4 x i64] containing the result.3832/// \returns A 256-bit vector of [4 x i64] containing the result.
3937static __inline__ __m256i __DEFAULT_FN_ATTRS2563833static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3938_mm256_srlv_epi64(__m256i __X, __m256i __Y)3834_mm256_srlv_epi64(__m256i __X, __m256i __Y)
3939{3835{
3940 return (__m256i)__builtin_ia32_psrlv4di((__v4di)__X, (__v4di)__Y);3836 return (__m256i)__builtin_ia32_psrlv4di((__v4di)__X, (__v4di)__Y);
...@@ -3956,7 +3852,7 @@ _mm256_srlv_epi64(__m256i __X, __m256i __Y)...@@ -3956,7 +3852,7 @@ _mm256_srlv_epi64(__m256i __X, __m256i __Y)
3956/// A 128-bit vector of [2 x i64] containing the unsigned shift counts (in3852/// A 128-bit vector of [2 x i64] containing the unsigned shift counts (in
3957/// bits).3853/// bits).
3958/// \returns A 128-bit vector of [2 x i64] containing the result.3854/// \returns A 128-bit vector of [2 x i64] containing the result.
3959static __inline__ __m128i __DEFAULT_FN_ATTRS1283855static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3960_mm_srlv_epi64(__m128i __X, __m128i __Y)3856_mm_srlv_epi64(__m128i __X, __m128i __Y)
3961{3857{
3962 return (__m128i)__builtin_ia32_psrlv2di((__v2di)__X, (__v2di)__Y);3858 return (__m128i)__builtin_ia32_psrlv2di((__v2di)__X, (__v2di)__Y);
...@@ -5289,5 +5185,7 @@ _mm_srlv_epi64(__m128i __X, __m128i __Y)...@@ -5289,5 +5185,7 @@ _mm_srlv_epi64(__m128i __X, __m128i __Y)
52895185
5290#undef __DEFAULT_FN_ATTRS2565186#undef __DEFAULT_FN_ATTRS256
5291#undef __DEFAULT_FN_ATTRS1285187#undef __DEFAULT_FN_ATTRS128
5188#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
5189#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
52925190
5293#endif /* __AVX2INTRIN_H */5191#endif /* __AVX2INTRIN_H */
lib/include/avx512bf16intrin.h+25-16
...@@ -19,12 +19,19 @@ typedef __bf16 __v32bf __attribute__((__vector_size__(64), __aligned__(64)));...@@ -19,12 +19,19 @@ typedef __bf16 __v32bf __attribute__((__vector_size__(64), __aligned__(64)));
19typedef __bf16 __m512bh __attribute__((__vector_size__(64), __aligned__(64)));19typedef __bf16 __m512bh __attribute__((__vector_size__(64), __aligned__(64)));
20typedef __bf16 __bfloat16 __attribute__((deprecated("use __bf16 instead")));20typedef __bf16 __bfloat16 __attribute__((deprecated("use __bf16 instead")));
2121
22#define __DEFAULT_FN_ATTRS512 \22#define __DEFAULT_FN_ATTRS512 \
23 __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16,evex512"), \23 __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16"), \
24 __min_vector_width__(512)))24 __min_vector_width__(512)))
25#define __DEFAULT_FN_ATTRS \25#define __DEFAULT_FN_ATTRS \
26 __attribute__((__always_inline__, __nodebug__, \26 __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16")))
27 __target__("avx512bf16,no-evex512")))27
28#if defined(__cplusplus) && (__cplusplus >= 201103L)
29#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr
30#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
31#else
32#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512
33#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
34#endif
2835
29/// Convert One BF16 Data to One Single Float Data.36/// Convert One BF16 Data to One Single Float Data.
30///37///
...@@ -36,8 +43,8 @@ typedef __bf16 __bfloat16 __attribute__((deprecated("use __bf16 instead")));...@@ -36,8 +43,8 @@ typedef __bf16 __bfloat16 __attribute__((deprecated("use __bf16 instead")));
36/// A bfloat data.43/// A bfloat data.
37/// \returns A float data whose sign field and exponent field keep unchanged,44/// \returns A float data whose sign field and exponent field keep unchanged,
38/// and fraction field is extended to 23 bits.45/// and fraction field is extended to 23 bits.
39static __inline__ float __DEFAULT_FN_ATTRS _mm_cvtsbh_ss(__bf16 __A) {46static __inline__ float __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtsbh_ss(__bf16 __A) {
40 return __builtin_ia32_cvtsbf162ss_32(__A);47 return (float)(__A);
41}48}
4249
43/// Convert Two Packed Single Data to One Packed BF16 Data.50/// Convert Two Packed Single Data to One Packed BF16 Data.
...@@ -236,9 +243,9 @@ _mm512_maskz_dpbf16_ps(__mmask16 __U, __m512 __D, __m512bh __A, __m512bh __B) {...@@ -236,9 +243,9 @@ _mm512_maskz_dpbf16_ps(__mmask16 __U, __m512 __D, __m512bh __A, __m512bh __B) {
236/// \param __A243/// \param __A
237/// A 256-bit vector of [16 x bfloat].244/// A 256-bit vector of [16 x bfloat].
238/// \returns A 512-bit vector of [16 x float] come from conversion of __A245/// \returns A 512-bit vector of [16 x float] come from conversion of __A
239static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_cvtpbh_ps(__m256bh __A) {246static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
240 return _mm512_castsi512_ps((__m512i)_mm512_slli_epi32(247_mm512_cvtpbh_ps(__m256bh __A) {
241 (__m512i)_mm512_cvtepi16_epi32((__m256i)__A), 16));248 return (__m512) __builtin_convertvector(__A, __v16sf);
242}249}
243250
244/// Convert Packed BF16 Data to Packed float Data using zeroing mask.251/// Convert Packed BF16 Data to Packed float Data using zeroing mask.
...@@ -251,10 +258,11 @@ static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_cvtpbh_ps(__m256bh __A) {...@@ -251,10 +258,11 @@ static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_cvtpbh_ps(__m256bh __A) {
251/// \param __A258/// \param __A
252/// A 256-bit vector of [16 x bfloat].259/// A 256-bit vector of [16 x bfloat].
253/// \returns A 512-bit vector of [16 x float] come from conversion of __A260/// \returns A 512-bit vector of [16 x float] come from conversion of __A
254static __inline__ __m512 __DEFAULT_FN_ATTRS512261static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
255_mm512_maskz_cvtpbh_ps(__mmask16 __U, __m256bh __A) {262_mm512_maskz_cvtpbh_ps(__mmask16 __U, __m256bh __A) {
256 return _mm512_castsi512_ps((__m512i)_mm512_slli_epi32(263 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
257 (__m512i)_mm512_maskz_cvtepi16_epi32((__mmask16)__U, (__m256i)__A), 16));264 (__v16sf)_mm512_cvtpbh_ps(__A),
265 (__v16sf)_mm512_setzero_ps());
258}266}
259267
260/// Convert Packed BF16 Data to Packed float Data using merging mask.268/// Convert Packed BF16 Data to Packed float Data using merging mask.
...@@ -269,15 +277,16 @@ _mm512_maskz_cvtpbh_ps(__mmask16 __U, __m256bh __A) {...@@ -269,15 +277,16 @@ _mm512_maskz_cvtpbh_ps(__mmask16 __U, __m256bh __A) {
269/// \param __A277/// \param __A
270/// A 256-bit vector of [16 x bfloat].278/// A 256-bit vector of [16 x bfloat].
271/// \returns A 512-bit vector of [16 x float] come from conversion of __A279/// \returns A 512-bit vector of [16 x float] come from conversion of __A
272static __inline__ __m512 __DEFAULT_FN_ATTRS512280static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
273_mm512_mask_cvtpbh_ps(__m512 __S, __mmask16 __U, __m256bh __A) {281_mm512_mask_cvtpbh_ps(__m512 __S, __mmask16 __U, __m256bh __A) {
274 return _mm512_castsi512_ps((__m512i)_mm512_mask_slli_epi32(282 return (__m512)__builtin_ia32_selectps_512(
275 (__m512i)__S, (__mmask16)__U,283 (__mmask16)__U, (__v16sf)_mm512_cvtpbh_ps(__A), (__v16sf)__S);
276 (__m512i)_mm512_cvtepi16_epi32((__m256i)__A), 16));
277}284}
278285
279#undef __DEFAULT_FN_ATTRS286#undef __DEFAULT_FN_ATTRS
287#undef __DEFAULT_FN_ATTRS_CONSTEXPR
280#undef __DEFAULT_FN_ATTRS512288#undef __DEFAULT_FN_ATTRS512
289#undef __DEFAULT_FN_ATTRS512_CONSTEXPR
281290
282#endif291#endif
283#endif292#endif
lib/include/avx512bitalgintrin.h+19-30
...@@ -15,53 +15,44 @@...@@ -15,53 +15,44 @@
15#define __AVX512BITALGINTRIN_H15#define __AVX512BITALGINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#if defined(__cplusplus) && (__cplusplus >= 201103L)
18#define __DEFAULT_FN_ATTRS \19#define __DEFAULT_FN_ATTRS \
19 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, __target__("avx512bitalg"), \
20 __target__("avx512bitalg,evex512"), \21 __min_vector_width__(512))) constexpr
22#else
23#define __DEFAULT_FN_ATTRS \
24 __attribute__((__always_inline__, __nodebug__, __target__("avx512bitalg"), \
21 __min_vector_width__(512)))25 __min_vector_width__(512)))
26#endif
2227
23static __inline__ __m512i __DEFAULT_FN_ATTRS28static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi16(__m512i __A) {
24_mm512_popcnt_epi16(__m512i __A)
25{
26 return (__m512i)__builtin_elementwise_popcount((__v32hu)__A);29 return (__m512i)__builtin_elementwise_popcount((__v32hu)__A);
27}30}
2831
29static __inline__ __m512i __DEFAULT_FN_ATTRS32static __inline__ __m512i __DEFAULT_FN_ATTRS
30_mm512_mask_popcnt_epi16(__m512i __A, __mmask32 __U, __m512i __B)33_mm512_mask_popcnt_epi16(__m512i __A, __mmask32 __U, __m512i __B) {
31{34 return (__m512i)__builtin_ia32_selectw_512(
32 return (__m512i) __builtin_ia32_selectw_512((__mmask32) __U,35 (__mmask32)__U, (__v32hi)_mm512_popcnt_epi16(__B), (__v32hi)__A);
33 (__v32hi) _mm512_popcnt_epi16(__B),
34 (__v32hi) __A);
35}36}
3637
37static __inline__ __m512i __DEFAULT_FN_ATTRS38static __inline__ __m512i __DEFAULT_FN_ATTRS
38_mm512_maskz_popcnt_epi16(__mmask32 __U, __m512i __B)39_mm512_maskz_popcnt_epi16(__mmask32 __U, __m512i __B) {
39{40 return _mm512_mask_popcnt_epi16((__m512i)_mm512_setzero_si512(), __U, __B);
40 return _mm512_mask_popcnt_epi16((__m512i) _mm512_setzero_si512(),
41 __U,
42 __B);
43}41}
4442
45static __inline__ __m512i __DEFAULT_FN_ATTRS43static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi8(__m512i __A) {
46_mm512_popcnt_epi8(__m512i __A)
47{
48 return (__m512i)__builtin_elementwise_popcount((__v64qu)__A);44 return (__m512i)__builtin_elementwise_popcount((__v64qu)__A);
49}45}
5046
51static __inline__ __m512i __DEFAULT_FN_ATTRS47static __inline__ __m512i __DEFAULT_FN_ATTRS
52_mm512_mask_popcnt_epi8(__m512i __A, __mmask64 __U, __m512i __B)48_mm512_mask_popcnt_epi8(__m512i __A, __mmask64 __U, __m512i __B) {
53{49 return (__m512i)__builtin_ia32_selectb_512(
54 return (__m512i) __builtin_ia32_selectb_512((__mmask64) __U,50 (__mmask64)__U, (__v64qi)_mm512_popcnt_epi8(__B), (__v64qi)__A);
55 (__v64qi) _mm512_popcnt_epi8(__B),
56 (__v64qi) __A);
57}51}
5852
59static __inline__ __m512i __DEFAULT_FN_ATTRS53static __inline__ __m512i __DEFAULT_FN_ATTRS
60_mm512_maskz_popcnt_epi8(__mmask64 __U, __m512i __B)54_mm512_maskz_popcnt_epi8(__mmask64 __U, __m512i __B) {
61{55 return _mm512_mask_popcnt_epi8((__m512i)_mm512_setzero_si512(), __U, __B);
62 return _mm512_mask_popcnt_epi8((__m512i) _mm512_setzero_si512(),
63 __U,
64 __B);
65}56}
6657
67static __inline__ __mmask64 __DEFAULT_FN_ATTRS58static __inline__ __mmask64 __DEFAULT_FN_ATTRS
...@@ -80,7 +71,5 @@ _mm512_bitshuffle_epi64_mask(__m512i __A, __m512i __B)...@@ -80,7 +71,5 @@ _mm512_bitshuffle_epi64_mask(__m512i __A, __m512i __B)
80 __B);71 __B);
81}72}
8273
83
84#undef __DEFAULT_FN_ATTRS74#undef __DEFAULT_FN_ATTRS
85
86#endif75#endif
lib/include/avx512bwintrin.h+386-505
...@@ -19,153 +19,150 @@ typedef unsigned long long __mmask64;...@@ -19,153 +19,150 @@ typedef unsigned long long __mmask64;
1919
20/* Define the default attributes for the functions in this file. */20/* Define the default attributes for the functions in this file. */
21#define __DEFAULT_FN_ATTRS512 \21#define __DEFAULT_FN_ATTRS512 \
22 __attribute__((__always_inline__, __nodebug__, \22 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw"), \
23 __target__("avx512bw,evex512"), __min_vector_width__(512)))23 __min_vector_width__(512)))
24#define __DEFAULT_FN_ATTRS \24#define __DEFAULT_FN_ATTRS \
25 __attribute__((__always_inline__, __nodebug__, \25 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw")))
26 __target__("avx512bw,no-evex512")))26
27#if defined(__cplusplus) && (__cplusplus >= 201103L)
28#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr
29#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
30#else
31#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512
32#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
33#endif
2734
28static __inline __mmask32 __DEFAULT_FN_ATTRS35static __inline __mmask32
29_knot_mask32(__mmask32 __M)36 __DEFAULT_FN_ATTRS_CONSTEXPR _knot_mask32(__mmask32 __M) {
30{
31 return __builtin_ia32_knotsi(__M);37 return __builtin_ia32_knotsi(__M);
32}38}
3339
34static __inline __mmask64 __DEFAULT_FN_ATTRS _knot_mask64(__mmask64 __M) {40static __inline __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
41_knot_mask64(__mmask64 __M) {
35 return __builtin_ia32_knotdi(__M);42 return __builtin_ia32_knotdi(__M);
36}43}
3744
38static __inline__ __mmask32 __DEFAULT_FN_ATTRS45static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
39_kand_mask32(__mmask32 __A, __mmask32 __B)46_kand_mask32(__mmask32 __A, __mmask32 __B) {
40{
41 return (__mmask32)__builtin_ia32_kandsi((__mmask32)__A, (__mmask32)__B);47 return (__mmask32)__builtin_ia32_kandsi((__mmask32)__A, (__mmask32)__B);
42}48}
4349
44static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kand_mask64(__mmask64 __A,50static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
45 __mmask64 __B) {51_kand_mask64(__mmask64 __A, __mmask64 __B) {
46 return (__mmask64)__builtin_ia32_kanddi((__mmask64)__A, (__mmask64)__B);52 return (__mmask64)__builtin_ia32_kanddi((__mmask64)__A, (__mmask64)__B);
47}53}
4854
49static __inline__ __mmask32 __DEFAULT_FN_ATTRS55static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
50_kandn_mask32(__mmask32 __A, __mmask32 __B)56_kandn_mask32(__mmask32 __A, __mmask32 __B) {
51{
52 return (__mmask32)__builtin_ia32_kandnsi((__mmask32)__A, (__mmask32)__B);57 return (__mmask32)__builtin_ia32_kandnsi((__mmask32)__A, (__mmask32)__B);
53}58}
5459
55static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kandn_mask64(__mmask64 __A,60static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
56 __mmask64 __B) {61_kandn_mask64(__mmask64 __A, __mmask64 __B) {
57 return (__mmask64)__builtin_ia32_kandndi((__mmask64)__A, (__mmask64)__B);62 return (__mmask64)__builtin_ia32_kandndi((__mmask64)__A, (__mmask64)__B);
58}63}
5964
60static __inline__ __mmask32 __DEFAULT_FN_ATTRS65static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
61_kor_mask32(__mmask32 __A, __mmask32 __B)66_kor_mask32(__mmask32 __A, __mmask32 __B) {
62{
63 return (__mmask32)__builtin_ia32_korsi((__mmask32)__A, (__mmask32)__B);67 return (__mmask32)__builtin_ia32_korsi((__mmask32)__A, (__mmask32)__B);
64}68}
6569
66static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kor_mask64(__mmask64 __A,70static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
67 __mmask64 __B) {71_kor_mask64(__mmask64 __A, __mmask64 __B) {
68 return (__mmask64)__builtin_ia32_kordi((__mmask64)__A, (__mmask64)__B);72 return (__mmask64)__builtin_ia32_kordi((__mmask64)__A, (__mmask64)__B);
69}73}
7074
71static __inline__ __mmask32 __DEFAULT_FN_ATTRS75static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
72_kxnor_mask32(__mmask32 __A, __mmask32 __B)76_kxnor_mask32(__mmask32 __A, __mmask32 __B) {
73{
74 return (__mmask32)__builtin_ia32_kxnorsi((__mmask32)__A, (__mmask32)__B);77 return (__mmask32)__builtin_ia32_kxnorsi((__mmask32)__A, (__mmask32)__B);
75}78}
7679
77static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kxnor_mask64(__mmask64 __A,80static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
78 __mmask64 __B) {81_kxnor_mask64(__mmask64 __A, __mmask64 __B) {
79 return (__mmask64)__builtin_ia32_kxnordi((__mmask64)__A, (__mmask64)__B);82 return (__mmask64)__builtin_ia32_kxnordi((__mmask64)__A, (__mmask64)__B);
80}83}
8184
82static __inline__ __mmask32 __DEFAULT_FN_ATTRS85static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
83_kxor_mask32(__mmask32 __A, __mmask32 __B)86_kxor_mask32(__mmask32 __A, __mmask32 __B) {
84{
85 return (__mmask32)__builtin_ia32_kxorsi((__mmask32)__A, (__mmask32)__B);87 return (__mmask32)__builtin_ia32_kxorsi((__mmask32)__A, (__mmask32)__B);
86}88}
8789
88static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kxor_mask64(__mmask64 __A,90static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
89 __mmask64 __B) {91_kxor_mask64(__mmask64 __A, __mmask64 __B) {
90 return (__mmask64)__builtin_ia32_kxordi((__mmask64)__A, (__mmask64)__B);92 return (__mmask64)__builtin_ia32_kxordi((__mmask64)__A, (__mmask64)__B);
91}93}
9294
93static __inline__ unsigned char __DEFAULT_FN_ATTRS95static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
94_kortestc_mask32_u8(__mmask32 __A, __mmask32 __B)96_kortestc_mask32_u8(__mmask32 __A, __mmask32 __B) {
95{
96 return (unsigned char)__builtin_ia32_kortestcsi(__A, __B);97 return (unsigned char)__builtin_ia32_kortestcsi(__A, __B);
97}98}
9899
99static __inline__ unsigned char __DEFAULT_FN_ATTRS100static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
100_kortestz_mask32_u8(__mmask32 __A, __mmask32 __B)101_kortestz_mask32_u8(__mmask32 __A, __mmask32 __B) {
101{
102 return (unsigned char)__builtin_ia32_kortestzsi(__A, __B);102 return (unsigned char)__builtin_ia32_kortestzsi(__A, __B);
103}103}
104104
105static __inline__ unsigned char __DEFAULT_FN_ATTRS105static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
106_kortest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) {106_kortest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) {
107 *__C = (unsigned char)__builtin_ia32_kortestcsi(__A, __B);107 *__C = (unsigned char)__builtin_ia32_kortestcsi(__A, __B);
108 return (unsigned char)__builtin_ia32_kortestzsi(__A, __B);108 return (unsigned char)__builtin_ia32_kortestzsi(__A, __B);
109}109}
110110
111static __inline__ unsigned char __DEFAULT_FN_ATTRS111static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
112_kortestc_mask64_u8(__mmask64 __A, __mmask64 __B) {112_kortestc_mask64_u8(__mmask64 __A, __mmask64 __B) {
113 return (unsigned char)__builtin_ia32_kortestcdi(__A, __B);113 return (unsigned char)__builtin_ia32_kortestcdi(__A, __B);
114}114}
115115
116static __inline__ unsigned char __DEFAULT_FN_ATTRS116static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
117_kortestz_mask64_u8(__mmask64 __A, __mmask64 __B) {117_kortestz_mask64_u8(__mmask64 __A, __mmask64 __B) {
118 return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);118 return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);
119}119}
120120
121static __inline__ unsigned char __DEFAULT_FN_ATTRS121static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
122_kortest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) {122_kortest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) {
123 *__C = (unsigned char)__builtin_ia32_kortestcdi(__A, __B);123 *__C = (unsigned char)__builtin_ia32_kortestcdi(__A, __B);
124 return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);124 return (unsigned char)__builtin_ia32_kortestzdi(__A, __B);
125}125}
126126
127static __inline__ unsigned char __DEFAULT_FN_ATTRS127static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
128_ktestc_mask32_u8(__mmask32 __A, __mmask32 __B)128_ktestc_mask32_u8(__mmask32 __A, __mmask32 __B) {
129{
130 return (unsigned char)__builtin_ia32_ktestcsi(__A, __B);129 return (unsigned char)__builtin_ia32_ktestcsi(__A, __B);
131}130}
132131
133static __inline__ unsigned char __DEFAULT_FN_ATTRS132static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
134_ktestz_mask32_u8(__mmask32 __A, __mmask32 __B)133_ktestz_mask32_u8(__mmask32 __A, __mmask32 __B) {
135{
136 return (unsigned char)__builtin_ia32_ktestzsi(__A, __B);134 return (unsigned char)__builtin_ia32_ktestzsi(__A, __B);
137}135}
138136
139static __inline__ unsigned char __DEFAULT_FN_ATTRS137static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
140_ktest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) {138_ktest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) {
141 *__C = (unsigned char)__builtin_ia32_ktestcsi(__A, __B);139 *__C = (unsigned char)__builtin_ia32_ktestcsi(__A, __B);
142 return (unsigned char)__builtin_ia32_ktestzsi(__A, __B);140 return (unsigned char)__builtin_ia32_ktestzsi(__A, __B);
143}141}
144142
145static __inline__ unsigned char __DEFAULT_FN_ATTRS143static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
146_ktestc_mask64_u8(__mmask64 __A, __mmask64 __B) {144_ktestc_mask64_u8(__mmask64 __A, __mmask64 __B) {
147 return (unsigned char)__builtin_ia32_ktestcdi(__A, __B);145 return (unsigned char)__builtin_ia32_ktestcdi(__A, __B);
148}146}
149147
150static __inline__ unsigned char __DEFAULT_FN_ATTRS148static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
151_ktestz_mask64_u8(__mmask64 __A, __mmask64 __B) {149_ktestz_mask64_u8(__mmask64 __A, __mmask64 __B) {
152 return (unsigned char)__builtin_ia32_ktestzdi(__A, __B);150 return (unsigned char)__builtin_ia32_ktestzdi(__A, __B);
153}151}
154152
155static __inline__ unsigned char __DEFAULT_FN_ATTRS153static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
156_ktest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) {154_ktest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) {
157 *__C = (unsigned char)__builtin_ia32_ktestcdi(__A, __B);155 *__C = (unsigned char)__builtin_ia32_ktestcdi(__A, __B);
158 return (unsigned char)__builtin_ia32_ktestzdi(__A, __B);156 return (unsigned char)__builtin_ia32_ktestzdi(__A, __B);
159}157}
160158
161static __inline__ __mmask32 __DEFAULT_FN_ATTRS159static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
162_kadd_mask32(__mmask32 __A, __mmask32 __B)160_kadd_mask32(__mmask32 __A, __mmask32 __B) {
163{
164 return (__mmask32)__builtin_ia32_kaddsi((__mmask32)__A, (__mmask32)__B);161 return (__mmask32)__builtin_ia32_kaddsi((__mmask32)__A, (__mmask32)__B);
165}162}
166163
167static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kadd_mask64(__mmask64 __A,164static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
168 __mmask64 __B) {165_kadd_mask64(__mmask64 __A, __mmask64 __B) {
169 return (__mmask64)__builtin_ia32_kadddi((__mmask64)__A, (__mmask64)__B);166 return (__mmask64)__builtin_ia32_kadddi((__mmask64)__A, (__mmask64)__B);
170}167}
171168
...@@ -181,22 +178,22 @@ static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kadd_mask64(__mmask64 __A,...@@ -181,22 +178,22 @@ static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kadd_mask64(__mmask64 __A,
181#define _kshiftri_mask64(A, I) \178#define _kshiftri_mask64(A, I) \
182 ((__mmask64)__builtin_ia32_kshiftridi((__mmask64)(A), (unsigned int)(I)))179 ((__mmask64)__builtin_ia32_kshiftridi((__mmask64)(A), (unsigned int)(I)))
183180
184static __inline__ unsigned int __DEFAULT_FN_ATTRS181static __inline__ unsigned int
185_cvtmask32_u32(__mmask32 __A) {182 __DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask32_u32(__mmask32 __A) {
186 return (unsigned int)__builtin_ia32_kmovd((__mmask32)__A);183 return (unsigned int)__builtin_ia32_kmovd((__mmask32)__A);
187}184}
188185
189static __inline__ unsigned long long __DEFAULT_FN_ATTRS186static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR
190_cvtmask64_u64(__mmask64 __A) {187_cvtmask64_u64(__mmask64 __A) {
191 return (unsigned long long)__builtin_ia32_kmovq((__mmask64)__A);188 return (unsigned long long)__builtin_ia32_kmovq((__mmask64)__A);
192}189}
193190
194static __inline__ __mmask32 __DEFAULT_FN_ATTRS191static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
195_cvtu32_mask32(unsigned int __A) {192_cvtu32_mask32(unsigned int __A) {
196 return (__mmask32)__builtin_ia32_kmovd((__mmask32)__A);193 return (__mmask32)__builtin_ia32_kmovd((__mmask32)__A);
197}194}
198195
199static __inline__ __mmask64 __DEFAULT_FN_ATTRS196static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
200_cvtu64_mask64(unsigned long long __A) {197_cvtu64_mask64(unsigned long long __A) {
201 return (__mmask64)__builtin_ia32_kmovq((__mmask64)__A);198 return (__mmask64)__builtin_ia32_kmovq((__mmask64)__A);
202}199}
...@@ -362,168 +359,159 @@ static __inline__ void __DEFAULT_FN_ATTRS _store_mask64(__mmask64 *__A,...@@ -362,168 +359,159 @@ static __inline__ void __DEFAULT_FN_ATTRS _store_mask64(__mmask64 *__A,
362#define _mm512_mask_cmpneq_epu16_mask(k, A, B) \359#define _mm512_mask_cmpneq_epu16_mask(k, A, B) \
363 _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)360 _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)
364361
365static __inline__ __m512i __DEFAULT_FN_ATTRS512362static __inline__ __m512i
366_mm512_add_epi8 (__m512i __A, __m512i __B) {363 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_add_epi8(__m512i __A, __m512i __B) {
367 return (__m512i) ((__v64qu) __A + (__v64qu) __B);364 return (__m512i) ((__v64qu) __A + (__v64qu) __B);
368}365}
369366
370static __inline__ __m512i __DEFAULT_FN_ATTRS512367static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
371_mm512_mask_add_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {368_mm512_mask_add_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {
372 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,369 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
373 (__v64qi)_mm512_add_epi8(__A, __B),370 (__v64qi)_mm512_add_epi8(__A, __B),
374 (__v64qi)__W);371 (__v64qi)__W);
375}372}
376373
377static __inline__ __m512i __DEFAULT_FN_ATTRS512374static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
378_mm512_maskz_add_epi8(__mmask64 __U, __m512i __A, __m512i __B) {375_mm512_maskz_add_epi8(__mmask64 __U, __m512i __A, __m512i __B) {
379 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,376 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
380 (__v64qi)_mm512_add_epi8(__A, __B),377 (__v64qi)_mm512_add_epi8(__A, __B),
381 (__v64qi)_mm512_setzero_si512());378 (__v64qi)_mm512_setzero_si512());
382}379}
383380
384static __inline__ __m512i __DEFAULT_FN_ATTRS512381static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
385_mm512_sub_epi8 (__m512i __A, __m512i __B) {382_mm512_sub_epi8(__m512i __A, __m512i __B) {
386 return (__m512i) ((__v64qu) __A - (__v64qu) __B);383 return (__m512i) ((__v64qu) __A - (__v64qu) __B);
387}384}
388385
389static __inline__ __m512i __DEFAULT_FN_ATTRS512386static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
390_mm512_mask_sub_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {387_mm512_mask_sub_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {
391 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,388 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
392 (__v64qi)_mm512_sub_epi8(__A, __B),389 (__v64qi)_mm512_sub_epi8(__A, __B),
393 (__v64qi)__W);390 (__v64qi)__W);
394}391}
395392
396static __inline__ __m512i __DEFAULT_FN_ATTRS512393static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
397_mm512_maskz_sub_epi8(__mmask64 __U, __m512i __A, __m512i __B) {394_mm512_maskz_sub_epi8(__mmask64 __U, __m512i __A, __m512i __B) {
398 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,395 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
399 (__v64qi)_mm512_sub_epi8(__A, __B),396 (__v64qi)_mm512_sub_epi8(__A, __B),
400 (__v64qi)_mm512_setzero_si512());397 (__v64qi)_mm512_setzero_si512());
401}398}
402399
403static __inline__ __m512i __DEFAULT_FN_ATTRS512400static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
404_mm512_add_epi16 (__m512i __A, __m512i __B) {401_mm512_add_epi16(__m512i __A, __m512i __B) {
405 return (__m512i) ((__v32hu) __A + (__v32hu) __B);402 return (__m512i) ((__v32hu) __A + (__v32hu) __B);
406}403}
407404
408static __inline__ __m512i __DEFAULT_FN_ATTRS512405static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
409_mm512_mask_add_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {406_mm512_mask_add_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
410 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,407 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
411 (__v32hi)_mm512_add_epi16(__A, __B),408 (__v32hi)_mm512_add_epi16(__A, __B),
412 (__v32hi)__W);409 (__v32hi)__W);
413}410}
414411
415static __inline__ __m512i __DEFAULT_FN_ATTRS512412static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
416_mm512_maskz_add_epi16(__mmask32 __U, __m512i __A, __m512i __B) {413_mm512_maskz_add_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
417 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,414 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
418 (__v32hi)_mm512_add_epi16(__A, __B),415 (__v32hi)_mm512_add_epi16(__A, __B),
419 (__v32hi)_mm512_setzero_si512());416 (__v32hi)_mm512_setzero_si512());
420}417}
421418
422static __inline__ __m512i __DEFAULT_FN_ATTRS512419static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
423_mm512_sub_epi16 (__m512i __A, __m512i __B) {420_mm512_sub_epi16(__m512i __A, __m512i __B) {
424 return (__m512i) ((__v32hu) __A - (__v32hu) __B);421 return (__m512i) ((__v32hu) __A - (__v32hu) __B);
425}422}
426423
427static __inline__ __m512i __DEFAULT_FN_ATTRS512424static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
428_mm512_mask_sub_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {425_mm512_mask_sub_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
429 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,426 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
430 (__v32hi)_mm512_sub_epi16(__A, __B),427 (__v32hi)_mm512_sub_epi16(__A, __B),
431 (__v32hi)__W);428 (__v32hi)__W);
432}429}
433430
434static __inline__ __m512i __DEFAULT_FN_ATTRS512431static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
435_mm512_maskz_sub_epi16(__mmask32 __U, __m512i __A, __m512i __B) {432_mm512_maskz_sub_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
436 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,433 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
437 (__v32hi)_mm512_sub_epi16(__A, __B),434 (__v32hi)_mm512_sub_epi16(__A, __B),
438 (__v32hi)_mm512_setzero_si512());435 (__v32hi)_mm512_setzero_si512());
439}436}
440437
441static __inline__ __m512i __DEFAULT_FN_ATTRS512438static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
442_mm512_mullo_epi16 (__m512i __A, __m512i __B) {439_mm512_mullo_epi16 (__m512i __A, __m512i __B) {
443 return (__m512i) ((__v32hu) __A * (__v32hu) __B);440 return (__m512i) ((__v32hu) __A * (__v32hu) __B);
444}441}
445442
446static __inline__ __m512i __DEFAULT_FN_ATTRS512443static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
447_mm512_mask_mullo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {444_mm512_mask_mullo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
448 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,445 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
449 (__v32hi)_mm512_mullo_epi16(__A, __B),446 (__v32hi)_mm512_mullo_epi16(__A, __B),
450 (__v32hi)__W);447 (__v32hi)__W);
451}448}
452449
453static __inline__ __m512i __DEFAULT_FN_ATTRS512450static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
454_mm512_maskz_mullo_epi16(__mmask32 __U, __m512i __A, __m512i __B) {451_mm512_maskz_mullo_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
455 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,452 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
456 (__v32hi)_mm512_mullo_epi16(__A, __B),453 (__v32hi)_mm512_mullo_epi16(__A, __B),
457 (__v32hi)_mm512_setzero_si512());454 (__v32hi)_mm512_setzero_si512());
458}455}
459456
460static __inline__ __m512i __DEFAULT_FN_ATTRS512457static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
461_mm512_mask_blend_epi8 (__mmask64 __U, __m512i __A, __m512i __W)458_mm512_mask_blend_epi8(__mmask64 __U, __m512i __A, __m512i __W) {
462{
463 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,459 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,
464 (__v64qi) __W,460 (__v64qi) __W,
465 (__v64qi) __A);461 (__v64qi) __A);
466}462}
467463
468static __inline__ __m512i __DEFAULT_FN_ATTRS512464static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
469_mm512_mask_blend_epi16 (__mmask32 __U, __m512i __A, __m512i __W)465_mm512_mask_blend_epi16(__mmask32 __U, __m512i __A, __m512i __W) {
470{
471 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,466 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,
472 (__v32hi) __W,467 (__v32hi) __W,
473 (__v32hi) __A);468 (__v32hi) __A);
474}469}
475470
476static __inline__ __m512i __DEFAULT_FN_ATTRS512471static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
477_mm512_abs_epi8 (__m512i __A)472_mm512_abs_epi8(__m512i __A) {
478{
479 return (__m512i)__builtin_elementwise_abs((__v64qs)__A);473 return (__m512i)__builtin_elementwise_abs((__v64qs)__A);
480}474}
481475
482static __inline__ __m512i __DEFAULT_FN_ATTRS512476static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
483_mm512_mask_abs_epi8 (__m512i __W, __mmask64 __U, __m512i __A)477_mm512_mask_abs_epi8(__m512i __W, __mmask64 __U, __m512i __A) {
484{
485 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,478 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
486 (__v64qi)_mm512_abs_epi8(__A),479 (__v64qi)_mm512_abs_epi8(__A),
487 (__v64qi)__W);480 (__v64qi)__W);
488}481}
489482
490static __inline__ __m512i __DEFAULT_FN_ATTRS512483static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
491_mm512_maskz_abs_epi8 (__mmask64 __U, __m512i __A)484_mm512_maskz_abs_epi8(__mmask64 __U, __m512i __A) {
492{
493 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,485 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
494 (__v64qi)_mm512_abs_epi8(__A),486 (__v64qi)_mm512_abs_epi8(__A),
495 (__v64qi)_mm512_setzero_si512());487 (__v64qi)_mm512_setzero_si512());
496}488}
497489
498static __inline__ __m512i __DEFAULT_FN_ATTRS512490static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
499_mm512_abs_epi16 (__m512i __A)491_mm512_abs_epi16(__m512i __A) {
500{
501 return (__m512i)__builtin_elementwise_abs((__v32hi)__A);492 return (__m512i)__builtin_elementwise_abs((__v32hi)__A);
502}493}
503494
504static __inline__ __m512i __DEFAULT_FN_ATTRS512495static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
505_mm512_mask_abs_epi16 (__m512i __W, __mmask32 __U, __m512i __A)496_mm512_mask_abs_epi16(__m512i __W, __mmask32 __U, __m512i __A) {
506{
507 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,497 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
508 (__v32hi)_mm512_abs_epi16(__A),498 (__v32hi)_mm512_abs_epi16(__A),
509 (__v32hi)__W);499 (__v32hi)__W);
510}500}
511501
512static __inline__ __m512i __DEFAULT_FN_ATTRS512502static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
513_mm512_maskz_abs_epi16 (__mmask32 __U, __m512i __A)503_mm512_maskz_abs_epi16(__mmask32 __U, __m512i __A) {
514{
515 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,504 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
516 (__v32hi)_mm512_abs_epi16(__A),505 (__v32hi)_mm512_abs_epi16(__A),
517 (__v32hi)_mm512_setzero_si512());506 (__v32hi)_mm512_setzero_si512());
518}507}
519508
520static __inline__ __m512i __DEFAULT_FN_ATTRS512509static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
521_mm512_packs_epi32(__m512i __A, __m512i __B)510_mm512_packs_epi32(__m512i __A, __m512i __B) {
522{
523 return (__m512i)__builtin_ia32_packssdw512((__v16si)__A, (__v16si)__B);511 return (__m512i)__builtin_ia32_packssdw512((__v16si)__A, (__v16si)__B);
524}512}
525513
526static __inline__ __m512i __DEFAULT_FN_ATTRS512514static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
527_mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B)515_mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B)
528{516{
529 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,517 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
...@@ -531,21 +519,19 @@ _mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B)...@@ -531,21 +519,19 @@ _mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B)
531 (__v32hi)_mm512_setzero_si512());519 (__v32hi)_mm512_setzero_si512());
532}520}
533521
534static __inline__ __m512i __DEFAULT_FN_ATTRS512522static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
535_mm512_mask_packs_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)523_mm512_mask_packs_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
536{
537 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,524 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
538 (__v32hi)_mm512_packs_epi32(__A, __B),525 (__v32hi)_mm512_packs_epi32(__A, __B),
539 (__v32hi)__W);526 (__v32hi)__W);
540}527}
541528
542static __inline__ __m512i __DEFAULT_FN_ATTRS512529static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
543_mm512_packs_epi16(__m512i __A, __m512i __B)530_mm512_packs_epi16(__m512i __A, __m512i __B) {
544{
545 return (__m512i)__builtin_ia32_packsswb512((__v32hi)__A, (__v32hi) __B);531 return (__m512i)__builtin_ia32_packsswb512((__v32hi)__A, (__v32hi) __B);
546}532}
547533
548static __inline__ __m512i __DEFAULT_FN_ATTRS512534static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
549_mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)535_mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)
550{536{
551 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,537 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
...@@ -553,7 +539,7 @@ _mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)...@@ -553,7 +539,7 @@ _mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)
553 (__v64qi)__W);539 (__v64qi)__W);
554}540}
555541
556static __inline__ __m512i __DEFAULT_FN_ATTRS512542static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
557_mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B)543_mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B)
558{544{
559 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,545 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
...@@ -561,13 +547,12 @@ _mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B)...@@ -561,13 +547,12 @@ _mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B)
561 (__v64qi)_mm512_setzero_si512());547 (__v64qi)_mm512_setzero_si512());
562}548}
563549
564static __inline__ __m512i __DEFAULT_FN_ATTRS512550static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
565_mm512_packus_epi32(__m512i __A, __m512i __B)551_mm512_packus_epi32(__m512i __A, __m512i __B) {
566{
567 return (__m512i)__builtin_ia32_packusdw512((__v16si) __A, (__v16si) __B);552 return (__m512i)__builtin_ia32_packusdw512((__v16si) __A, (__v16si) __B);
568}553}
569554
570static __inline__ __m512i __DEFAULT_FN_ATTRS512555static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
571_mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B)556_mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B)
572{557{
573 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,558 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
...@@ -575,7 +560,7 @@ _mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B)...@@ -575,7 +560,7 @@ _mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B)
575 (__v32hi)_mm512_setzero_si512());560 (__v32hi)_mm512_setzero_si512());
576}561}
577562
578static __inline__ __m512i __DEFAULT_FN_ATTRS512563static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
579_mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)564_mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)
580{565{
581 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,566 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
...@@ -583,13 +568,12 @@ _mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)...@@ -583,13 +568,12 @@ _mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)
583 (__v32hi)__W);568 (__v32hi)__W);
584}569}
585570
586static __inline__ __m512i __DEFAULT_FN_ATTRS512571static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
587_mm512_packus_epi16(__m512i __A, __m512i __B)572_mm512_packus_epi16(__m512i __A, __m512i __B) {
588{
589 return (__m512i)__builtin_ia32_packuswb512((__v32hi) __A, (__v32hi) __B);573 return (__m512i)__builtin_ia32_packuswb512((__v32hi) __A, (__v32hi) __B);
590}574}
591575
592static __inline__ __m512i __DEFAULT_FN_ATTRS512576static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
593_mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)577_mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)
594{578{
595 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,579 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
...@@ -597,7 +581,7 @@ _mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)...@@ -597,7 +581,7 @@ _mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)
597 (__v64qi)__W);581 (__v64qi)__W);
598}582}
599583
600static __inline__ __m512i __DEFAULT_FN_ATTRS512584static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
601_mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B)585_mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B)
602{586{
603 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,587 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
...@@ -605,35 +589,31 @@ _mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B)...@@ -605,35 +589,31 @@ _mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B)
605 (__v64qi)_mm512_setzero_si512());589 (__v64qi)_mm512_setzero_si512());
606}590}
607591
608static __inline__ __m512i __DEFAULT_FN_ATTRS512592static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
609_mm512_adds_epi8 (__m512i __A, __m512i __B)593_mm512_adds_epi8(__m512i __A, __m512i __B) {
610{
611 return (__m512i)__builtin_elementwise_add_sat((__v64qs)__A, (__v64qs)__B);594 return (__m512i)__builtin_elementwise_add_sat((__v64qs)__A, (__v64qs)__B);
612}595}
613596
614static __inline__ __m512i __DEFAULT_FN_ATTRS512597static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
615_mm512_mask_adds_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)598_mm512_mask_adds_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {
616{
617 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,599 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
618 (__v64qi)_mm512_adds_epi8(__A, __B),600 (__v64qi)_mm512_adds_epi8(__A, __B),
619 (__v64qi)__W);601 (__v64qi)__W);
620}602}
621603
622static __inline__ __m512i __DEFAULT_FN_ATTRS512604static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
623_mm512_maskz_adds_epi8 (__mmask64 __U, __m512i __A, __m512i __B)605_mm512_maskz_adds_epi8(__mmask64 __U, __m512i __A, __m512i __B) {
624{
625 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,606 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
626 (__v64qi)_mm512_adds_epi8(__A, __B),607 (__v64qi)_mm512_adds_epi8(__A, __B),
627 (__v64qi)_mm512_setzero_si512());608 (__v64qi)_mm512_setzero_si512());
628}609}
629610
630static __inline__ __m512i __DEFAULT_FN_ATTRS512611static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
631_mm512_adds_epi16 (__m512i __A, __m512i __B)612_mm512_adds_epi16(__m512i __A, __m512i __B) {
632{
633 return (__m512i)__builtin_elementwise_add_sat((__v32hi)__A, (__v32hi)__B);613 return (__m512i)__builtin_elementwise_add_sat((__v32hi)__A, (__v32hi)__B);
634}614}
635615
636static __inline__ __m512i __DEFAULT_FN_ATTRS512616static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
637_mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)617_mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
638{618{
639 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,619 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -641,7 +621,7 @@ _mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)...@@ -641,7 +621,7 @@ _mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
641 (__v32hi)__W);621 (__v32hi)__W);
642}622}
643623
644static __inline__ __m512i __DEFAULT_FN_ATTRS512624static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
645_mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B)625_mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B)
646{626{
647 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,627 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -649,13 +629,12 @@ _mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B)...@@ -649,13 +629,12 @@ _mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B)
649 (__v32hi)_mm512_setzero_si512());629 (__v32hi)_mm512_setzero_si512());
650}630}
651631
652static __inline__ __m512i __DEFAULT_FN_ATTRS512632static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
653_mm512_adds_epu8 (__m512i __A, __m512i __B)633_mm512_adds_epu8(__m512i __A, __m512i __B) {
654{
655 return (__m512i)__builtin_elementwise_add_sat((__v64qu) __A, (__v64qu) __B);634 return (__m512i)__builtin_elementwise_add_sat((__v64qu) __A, (__v64qu) __B);
656}635}
657636
658static __inline__ __m512i __DEFAULT_FN_ATTRS512637static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
659_mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)638_mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)
660{639{
661 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,640 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
...@@ -663,7 +642,7 @@ _mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)...@@ -663,7 +642,7 @@ _mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)
663 (__v64qi)__W);642 (__v64qi)__W);
664}643}
665644
666static __inline__ __m512i __DEFAULT_FN_ATTRS512645static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
667_mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B)646_mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B)
668{647{
669 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,648 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
...@@ -671,280 +650,238 @@ _mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B)...@@ -671,280 +650,238 @@ _mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B)
671 (__v64qi)_mm512_setzero_si512());650 (__v64qi)_mm512_setzero_si512());
672}651}
673652
674static __inline__ __m512i __DEFAULT_FN_ATTRS512653static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
675_mm512_adds_epu16 (__m512i __A, __m512i __B)654_mm512_adds_epu16(__m512i __A, __m512i __B) {
676{
677 return (__m512i)__builtin_elementwise_add_sat((__v32hu) __A, (__v32hu) __B);655 return (__m512i)__builtin_elementwise_add_sat((__v32hu) __A, (__v32hu) __B);
678}656}
679657
680static __inline__ __m512i __DEFAULT_FN_ATTRS512658static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
681_mm512_mask_adds_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)659_mm512_mask_adds_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
682{
683 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,660 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
684 (__v32hi)_mm512_adds_epu16(__A, __B),661 (__v32hi)_mm512_adds_epu16(__A, __B),
685 (__v32hi)__W);662 (__v32hi)__W);
686}663}
687664
688static __inline__ __m512i __DEFAULT_FN_ATTRS512665static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
689_mm512_maskz_adds_epu16 (__mmask32 __U, __m512i __A, __m512i __B)666_mm512_maskz_adds_epu16(__mmask32 __U, __m512i __A, __m512i __B) {
690{
691 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,667 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
692 (__v32hi)_mm512_adds_epu16(__A, __B),668 (__v32hi)_mm512_adds_epu16(__A, __B),
693 (__v32hi)_mm512_setzero_si512());669 (__v32hi)_mm512_setzero_si512());
694}670}
695671
696static __inline__ __m512i __DEFAULT_FN_ATTRS512672static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
697_mm512_avg_epu8 (__m512i __A, __m512i __B)673_mm512_avg_epu8(__m512i __A, __m512i __B) {
698{674 return (__m512i)__builtin_ia32_pavgb512((__v64qu)__A, (__v64qu)__B);
699 return (__m512i)__builtin_ia32_pavgb512((__v64qi)__A, (__v64qi)__B);
700}675}
701676
702static __inline__ __m512i __DEFAULT_FN_ATTRS512677static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
703_mm512_mask_avg_epu8 (__m512i __W, __mmask64 __U, __m512i __A,678_mm512_mask_avg_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {
704 __m512i __B)679 return (__m512i)__builtin_ia32_selectb_512(
705{680 (__mmask64)__U, (__v64qi)_mm512_avg_epu8(__A, __B), (__v64qi)__W);
706 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
707 (__v64qi)_mm512_avg_epu8(__A, __B),
708 (__v64qi)__W);
709}681}
710682
711static __inline__ __m512i __DEFAULT_FN_ATTRS512683static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
712_mm512_maskz_avg_epu8 (__mmask64 __U, __m512i __A, __m512i __B)684_mm512_maskz_avg_epu8(__mmask64 __U, __m512i __A, __m512i __B) {
713{
714 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,685 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
715 (__v64qi)_mm512_avg_epu8(__A, __B),686 (__v64qi)_mm512_avg_epu8(__A, __B),
716 (__v64qi)_mm512_setzero_si512());687 (__v64qi)_mm512_setzero_si512());
717}688}
718689
719static __inline__ __m512i __DEFAULT_FN_ATTRS512690static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
720_mm512_avg_epu16 (__m512i __A, __m512i __B)691_mm512_avg_epu16(__m512i __A, __m512i __B) {
721{692 return (__m512i)__builtin_ia32_pavgw512((__v32hu)__A, (__v32hu)__B);
722 return (__m512i)__builtin_ia32_pavgw512((__v32hi)__A, (__v32hi)__B);
723}693}
724694
725static __inline__ __m512i __DEFAULT_FN_ATTRS512695static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
726_mm512_mask_avg_epu16 (__m512i __W, __mmask32 __U, __m512i __A,696_mm512_mask_avg_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
727 __m512i __B)697 return (__m512i)__builtin_ia32_selectw_512(
728{698 (__mmask32)__U, (__v32hi)_mm512_avg_epu16(__A, __B), (__v32hi)__W);
729 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
730 (__v32hi)_mm512_avg_epu16(__A, __B),
731 (__v32hi)__W);
732}699}
733700
734static __inline__ __m512i __DEFAULT_FN_ATTRS512701static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
735_mm512_maskz_avg_epu16 (__mmask32 __U, __m512i __A, __m512i __B)702_mm512_maskz_avg_epu16(__mmask32 __U, __m512i __A, __m512i __B) {
736{703 return (__m512i)__builtin_ia32_selectw_512(
737 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,704 (__mmask32)__U, (__v32hi)_mm512_avg_epu16(__A, __B),
738 (__v32hi)_mm512_avg_epu16(__A, __B),705 (__v32hi)_mm512_setzero_si512());
739 (__v32hi) _mm512_setzero_si512());
740}706}
741707
742static __inline__ __m512i __DEFAULT_FN_ATTRS512708static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
743_mm512_max_epi8 (__m512i __A, __m512i __B)709_mm512_max_epi8(__m512i __A, __m512i __B) {
744{
745 return (__m512i)__builtin_elementwise_max((__v64qs) __A, (__v64qs) __B);710 return (__m512i)__builtin_elementwise_max((__v64qs) __A, (__v64qs) __B);
746}711}
747712
748static __inline__ __m512i __DEFAULT_FN_ATTRS512713static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
749_mm512_maskz_max_epi8 (__mmask64 __M, __m512i __A, __m512i __B)714_mm512_maskz_max_epi8(__mmask64 __M, __m512i __A, __m512i __B) {
750{
751 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,715 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
752 (__v64qi)_mm512_max_epi8(__A, __B),716 (__v64qi)_mm512_max_epi8(__A, __B),
753 (__v64qi)_mm512_setzero_si512());717 (__v64qi)_mm512_setzero_si512());
754}718}
755719
756static __inline__ __m512i __DEFAULT_FN_ATTRS512720static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
757_mm512_mask_max_epi8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)721_mm512_mask_max_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
758{
759 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,722 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
760 (__v64qi)_mm512_max_epi8(__A, __B),723 (__v64qi)_mm512_max_epi8(__A, __B),
761 (__v64qi)__W);724 (__v64qi)__W);
762}725}
763726
764static __inline__ __m512i __DEFAULT_FN_ATTRS512727static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
765_mm512_max_epi16 (__m512i __A, __m512i __B)728_mm512_max_epi16(__m512i __A, __m512i __B) {
766{
767 return (__m512i)__builtin_elementwise_max((__v32hi) __A, (__v32hi) __B);729 return (__m512i)__builtin_elementwise_max((__v32hi) __A, (__v32hi) __B);
768}730}
769731
770static __inline__ __m512i __DEFAULT_FN_ATTRS512732static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
771_mm512_maskz_max_epi16 (__mmask32 __M, __m512i __A, __m512i __B)733_mm512_maskz_max_epi16(__mmask32 __M, __m512i __A, __m512i __B) {
772{
773 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,734 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
774 (__v32hi)_mm512_max_epi16(__A, __B),735 (__v32hi)_mm512_max_epi16(__A, __B),
775 (__v32hi)_mm512_setzero_si512());736 (__v32hi)_mm512_setzero_si512());
776}737}
777738
778static __inline__ __m512i __DEFAULT_FN_ATTRS512739static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
779_mm512_mask_max_epi16 (__m512i __W, __mmask32 __M, __m512i __A,740_mm512_mask_max_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
780 __m512i __B)
781{
782 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,741 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
783 (__v32hi)_mm512_max_epi16(__A, __B),742 (__v32hi)_mm512_max_epi16(__A, __B),
784 (__v32hi)__W);743 (__v32hi)__W);
785}744}
786745
787static __inline__ __m512i __DEFAULT_FN_ATTRS512746static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
788_mm512_max_epu8 (__m512i __A, __m512i __B)747_mm512_max_epu8(__m512i __A, __m512i __B) {
789{
790 return (__m512i)__builtin_elementwise_max((__v64qu)__A, (__v64qu)__B);748 return (__m512i)__builtin_elementwise_max((__v64qu)__A, (__v64qu)__B);
791}749}
792750
793static __inline__ __m512i __DEFAULT_FN_ATTRS512751static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
794_mm512_maskz_max_epu8 (__mmask64 __M, __m512i __A, __m512i __B)752_mm512_maskz_max_epu8(__mmask64 __M, __m512i __A, __m512i __B) {
795{
796 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,753 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
797 (__v64qi)_mm512_max_epu8(__A, __B),754 (__v64qi)_mm512_max_epu8(__A, __B),
798 (__v64qi)_mm512_setzero_si512());755 (__v64qi)_mm512_setzero_si512());
799}756}
800757
801static __inline__ __m512i __DEFAULT_FN_ATTRS512758static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
802_mm512_mask_max_epu8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)759_mm512_mask_max_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
803{
804 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,760 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
805 (__v64qi)_mm512_max_epu8(__A, __B),761 (__v64qi)_mm512_max_epu8(__A, __B),
806 (__v64qi)__W);762 (__v64qi)__W);
807}763}
808764
809static __inline__ __m512i __DEFAULT_FN_ATTRS512765static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
810_mm512_max_epu16 (__m512i __A, __m512i __B)766_mm512_max_epu16(__m512i __A, __m512i __B) {
811{
812 return (__m512i)__builtin_elementwise_max((__v32hu)__A, (__v32hu)__B);767 return (__m512i)__builtin_elementwise_max((__v32hu)__A, (__v32hu)__B);
813}768}
814769
815static __inline__ __m512i __DEFAULT_FN_ATTRS512770static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
816_mm512_maskz_max_epu16 (__mmask32 __M, __m512i __A, __m512i __B)771_mm512_maskz_max_epu16(__mmask32 __M, __m512i __A, __m512i __B) {
817{
818 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,772 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
819 (__v32hi)_mm512_max_epu16(__A, __B),773 (__v32hi)_mm512_max_epu16(__A, __B),
820 (__v32hi)_mm512_setzero_si512());774 (__v32hi)_mm512_setzero_si512());
821}775}
822776
823static __inline__ __m512i __DEFAULT_FN_ATTRS512777static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
824_mm512_mask_max_epu16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)778_mm512_mask_max_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
825{
826 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,779 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
827 (__v32hi)_mm512_max_epu16(__A, __B),780 (__v32hi)_mm512_max_epu16(__A, __B),
828 (__v32hi)__W);781 (__v32hi)__W);
829}782}
830783
831static __inline__ __m512i __DEFAULT_FN_ATTRS512784static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
832_mm512_min_epi8 (__m512i __A, __m512i __B)785_mm512_min_epi8(__m512i __A, __m512i __B) {
833{
834 return (__m512i)__builtin_elementwise_min((__v64qs) __A, (__v64qs) __B);786 return (__m512i)__builtin_elementwise_min((__v64qs) __A, (__v64qs) __B);
835}787}
836788
837static __inline__ __m512i __DEFAULT_FN_ATTRS512789static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
838_mm512_maskz_min_epi8 (__mmask64 __M, __m512i __A, __m512i __B)790_mm512_maskz_min_epi8(__mmask64 __M, __m512i __A, __m512i __B) {
839{
840 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,791 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
841 (__v64qi)_mm512_min_epi8(__A, __B),792 (__v64qi)_mm512_min_epi8(__A, __B),
842 (__v64qi)_mm512_setzero_si512());793 (__v64qi)_mm512_setzero_si512());
843}794}
844795
845static __inline__ __m512i __DEFAULT_FN_ATTRS512796static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
846_mm512_mask_min_epi8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)797_mm512_mask_min_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
847{
848 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,798 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
849 (__v64qi)_mm512_min_epi8(__A, __B),799 (__v64qi)_mm512_min_epi8(__A, __B),
850 (__v64qi)__W);800 (__v64qi)__W);
851}801}
852802
853static __inline__ __m512i __DEFAULT_FN_ATTRS512803static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
854_mm512_min_epi16 (__m512i __A, __m512i __B)804_mm512_min_epi16(__m512i __A, __m512i __B) {
855{
856 return (__m512i)__builtin_elementwise_min((__v32hi) __A, (__v32hi) __B);805 return (__m512i)__builtin_elementwise_min((__v32hi) __A, (__v32hi) __B);
857}806}
858807
859static __inline__ __m512i __DEFAULT_FN_ATTRS512808static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
860_mm512_maskz_min_epi16 (__mmask32 __M, __m512i __A, __m512i __B)809_mm512_maskz_min_epi16(__mmask32 __M, __m512i __A, __m512i __B) {
861{
862 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,810 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
863 (__v32hi)_mm512_min_epi16(__A, __B),811 (__v32hi)_mm512_min_epi16(__A, __B),
864 (__v32hi)_mm512_setzero_si512());812 (__v32hi)_mm512_setzero_si512());
865}813}
866814
867static __inline__ __m512i __DEFAULT_FN_ATTRS512815static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
868_mm512_mask_min_epi16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)816_mm512_mask_min_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
869{
870 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,817 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
871 (__v32hi)_mm512_min_epi16(__A, __B),818 (__v32hi)_mm512_min_epi16(__A, __B),
872 (__v32hi)__W);819 (__v32hi)__W);
873}820}
874821
875static __inline__ __m512i __DEFAULT_FN_ATTRS512822static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
876_mm512_min_epu8 (__m512i __A, __m512i __B)823_mm512_min_epu8(__m512i __A, __m512i __B) {
877{
878 return (__m512i)__builtin_elementwise_min((__v64qu)__A, (__v64qu)__B);824 return (__m512i)__builtin_elementwise_min((__v64qu)__A, (__v64qu)__B);
879}825}
880826
881static __inline__ __m512i __DEFAULT_FN_ATTRS512827static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
882_mm512_maskz_min_epu8 (__mmask64 __M, __m512i __A, __m512i __B)828_mm512_maskz_min_epu8(__mmask64 __M, __m512i __A, __m512i __B) {
883{
884 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,829 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
885 (__v64qi)_mm512_min_epu8(__A, __B),830 (__v64qi)_mm512_min_epu8(__A, __B),
886 (__v64qi)_mm512_setzero_si512());831 (__v64qi)_mm512_setzero_si512());
887}832}
888833
889static __inline__ __m512i __DEFAULT_FN_ATTRS512834static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
890_mm512_mask_min_epu8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B)835_mm512_mask_min_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
891{
892 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,836 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
893 (__v64qi)_mm512_min_epu8(__A, __B),837 (__v64qi)_mm512_min_epu8(__A, __B),
894 (__v64qi)__W);838 (__v64qi)__W);
895}839}
896840
897static __inline__ __m512i __DEFAULT_FN_ATTRS512841static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
898_mm512_min_epu16 (__m512i __A, __m512i __B)842_mm512_min_epu16(__m512i __A, __m512i __B) {
899{
900 return (__m512i)__builtin_elementwise_min((__v32hu)__A, (__v32hu)__B);843 return (__m512i)__builtin_elementwise_min((__v32hu)__A, (__v32hu)__B);
901}844}
902845
903static __inline__ __m512i __DEFAULT_FN_ATTRS512846static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
904_mm512_maskz_min_epu16 (__mmask32 __M, __m512i __A, __m512i __B)847_mm512_maskz_min_epu16(__mmask32 __M, __m512i __A, __m512i __B) {
905{
906 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,848 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
907 (__v32hi)_mm512_min_epu16(__A, __B),849 (__v32hi)_mm512_min_epu16(__A, __B),
908 (__v32hi)_mm512_setzero_si512());850 (__v32hi)_mm512_setzero_si512());
909}851}
910852
911static __inline__ __m512i __DEFAULT_FN_ATTRS512853static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
912_mm512_mask_min_epu16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B)854_mm512_mask_min_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) {
913{
914 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,855 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
915 (__v32hi)_mm512_min_epu16(__A, __B),856 (__v32hi)_mm512_min_epu16(__A, __B),
916 (__v32hi)__W);857 (__v32hi)__W);
917}858}
918859
919static __inline__ __m512i __DEFAULT_FN_ATTRS512860static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
920_mm512_shuffle_epi8(__m512i __A, __m512i __B)861_mm512_shuffle_epi8(__m512i __A, __m512i __B) {
921{
922 return (__m512i)__builtin_ia32_pshufb512((__v64qi)__A,(__v64qi)__B);862 return (__m512i)__builtin_ia32_pshufb512((__v64qi)__A,(__v64qi)__B);
923}863}
924864
925static __inline__ __m512i __DEFAULT_FN_ATTRS512865static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
926_mm512_mask_shuffle_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)866_mm512_mask_shuffle_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {
927{
928 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,867 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
929 (__v64qi)_mm512_shuffle_epi8(__A, __B),868 (__v64qi)_mm512_shuffle_epi8(__A, __B),
930 (__v64qi)__W);869 (__v64qi)__W);
931}870}
932871
933static __inline__ __m512i __DEFAULT_FN_ATTRS512872static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
934_mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B)873_mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B) {
935{
936 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,874 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
937 (__v64qi)_mm512_shuffle_epi8(__A, __B),875 (__v64qi)_mm512_shuffle_epi8(__A, __B),
938 (__v64qi)_mm512_setzero_si512());876 (__v64qi)_mm512_setzero_si512());
939}877}
940878
941static __inline__ __m512i __DEFAULT_FN_ATTRS512879static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
942_mm512_subs_epi8 (__m512i __A, __m512i __B)880_mm512_subs_epi8(__m512i __A, __m512i __B) {
943{
944 return (__m512i)__builtin_elementwise_sub_sat((__v64qs)__A, (__v64qs)__B);881 return (__m512i)__builtin_elementwise_sub_sat((__v64qs)__A, (__v64qs)__B);
945}882}
946883
947static __inline__ __m512i __DEFAULT_FN_ATTRS512884static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
948_mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)885_mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)
949{886{
950 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,887 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
...@@ -952,7 +889,7 @@ _mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)...@@ -952,7 +889,7 @@ _mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)
952 (__v64qi)__W);889 (__v64qi)__W);
953}890}
954891
955static __inline__ __m512i __DEFAULT_FN_ATTRS512892static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
956_mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B)893_mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B)
957{894{
958 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,895 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
...@@ -960,13 +897,12 @@ _mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B)...@@ -960,13 +897,12 @@ _mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B)
960 (__v64qi)_mm512_setzero_si512());897 (__v64qi)_mm512_setzero_si512());
961}898}
962899
963static __inline__ __m512i __DEFAULT_FN_ATTRS512900static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
964_mm512_subs_epi16 (__m512i __A, __m512i __B)901_mm512_subs_epi16(__m512i __A, __m512i __B) {
965{
966 return (__m512i)__builtin_elementwise_sub_sat((__v32hi)__A, (__v32hi)__B);902 return (__m512i)__builtin_elementwise_sub_sat((__v32hi)__A, (__v32hi)__B);
967}903}
968904
969static __inline__ __m512i __DEFAULT_FN_ATTRS512905static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
970_mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)906_mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
971{907{
972 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,908 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -974,7 +910,7 @@ _mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)...@@ -974,7 +910,7 @@ _mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
974 (__v32hi)__W);910 (__v32hi)__W);
975}911}
976912
977static __inline__ __m512i __DEFAULT_FN_ATTRS512913static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
978_mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B)914_mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B)
979{915{
980 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,916 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -982,13 +918,12 @@ _mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B)...@@ -982,13 +918,12 @@ _mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B)
982 (__v32hi)_mm512_setzero_si512());918 (__v32hi)_mm512_setzero_si512());
983}919}
984920
985static __inline__ __m512i __DEFAULT_FN_ATTRS512921static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
986_mm512_subs_epu8 (__m512i __A, __m512i __B)922_mm512_subs_epu8(__m512i __A, __m512i __B) {
987{
988 return (__m512i)__builtin_elementwise_sub_sat((__v64qu) __A, (__v64qu) __B);923 return (__m512i)__builtin_elementwise_sub_sat((__v64qu) __A, (__v64qu) __B);
989}924}
990925
991static __inline__ __m512i __DEFAULT_FN_ATTRS512926static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
992_mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)927_mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)
993{928{
994 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,929 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
...@@ -996,7 +931,7 @@ _mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)...@@ -996,7 +931,7 @@ _mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B)
996 (__v64qi)__W);931 (__v64qi)__W);
997}932}
998933
999static __inline__ __m512i __DEFAULT_FN_ATTRS512934static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1000_mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B)935_mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B)
1001{936{
1002 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,937 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
...@@ -1004,13 +939,12 @@ _mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B)...@@ -1004,13 +939,12 @@ _mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B)
1004 (__v64qi)_mm512_setzero_si512());939 (__v64qi)_mm512_setzero_si512());
1005}940}
1006941
1007static __inline__ __m512i __DEFAULT_FN_ATTRS512942static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1008_mm512_subs_epu16 (__m512i __A, __m512i __B)943_mm512_subs_epu16(__m512i __A, __m512i __B) {
1009{
1010 return (__m512i)__builtin_elementwise_sub_sat((__v32hu) __A, (__v32hu) __B);944 return (__m512i)__builtin_elementwise_sub_sat((__v32hu) __A, (__v32hu) __B);
1011}945}
1012946
1013static __inline__ __m512i __DEFAULT_FN_ATTRS512947static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1014_mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)948_mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1015{949{
1016 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,950 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -1018,7 +952,7 @@ _mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)...@@ -1018,7 +952,7 @@ _mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1018 (__v32hi)__W);952 (__v32hi)__W);
1019}953}
1020954
1021static __inline__ __m512i __DEFAULT_FN_ATTRS512955static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1022_mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B)956_mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B)
1023{957{
1024 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,958 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -1026,113 +960,97 @@ _mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B)...@@ -1026,113 +960,97 @@ _mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B)
1026 (__v32hi)_mm512_setzero_si512());960 (__v32hi)_mm512_setzero_si512());
1027}961}
1028962
1029static __inline__ __m512i __DEFAULT_FN_ATTRS512963static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1030_mm512_permutex2var_epi16(__m512i __A, __m512i __I, __m512i __B)964_mm512_permutex2var_epi16(__m512i __A, __m512i __I, __m512i __B) {
1031{
1032 return (__m512i)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I,965 return (__m512i)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I,
1033 (__v32hi)__B);966 (__v32hi)__B);
1034}967}
1035968
1036static __inline__ __m512i __DEFAULT_FN_ATTRS512969static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1037_mm512_mask_permutex2var_epi16(__m512i __A, __mmask32 __U, __m512i __I,970_mm512_mask_permutex2var_epi16(__m512i __A, __mmask32 __U, __m512i __I,
1038 __m512i __B)971 __m512i __B) {
1039{
1040 return (__m512i)__builtin_ia32_selectw_512(__U,972 return (__m512i)__builtin_ia32_selectw_512(__U,
1041 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),973 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),
1042 (__v32hi)__A);974 (__v32hi)__A);
1043}975}
1044976
1045static __inline__ __m512i __DEFAULT_FN_ATTRS512977static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1046_mm512_mask2_permutex2var_epi16(__m512i __A, __m512i __I, __mmask32 __U,978_mm512_mask2_permutex2var_epi16(__m512i __A, __m512i __I, __mmask32 __U,
1047 __m512i __B)979 __m512i __B) {
1048{
1049 return (__m512i)__builtin_ia32_selectw_512(__U,980 return (__m512i)__builtin_ia32_selectw_512(__U,
1050 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),981 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),
1051 (__v32hi)__I);982 (__v32hi)__I);
1052}983}
1053984
1054static __inline__ __m512i __DEFAULT_FN_ATTRS512985static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1055_mm512_maskz_permutex2var_epi16(__mmask32 __U, __m512i __A, __m512i __I,986_mm512_maskz_permutex2var_epi16(__mmask32 __U, __m512i __A, __m512i __I,
1056 __m512i __B)987 __m512i __B) {
1057{
1058 return (__m512i)__builtin_ia32_selectw_512(__U,988 return (__m512i)__builtin_ia32_selectw_512(__U,
1059 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),989 (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B),
1060 (__v32hi)_mm512_setzero_si512());990 (__v32hi)_mm512_setzero_si512());
1061}991}
1062992
1063static __inline__ __m512i __DEFAULT_FN_ATTRS512993static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1064_mm512_mulhrs_epi16(__m512i __A, __m512i __B)994_mm512_mulhrs_epi16(__m512i __A, __m512i __B) {
1065{
1066 return (__m512i)__builtin_ia32_pmulhrsw512((__v32hi)__A, (__v32hi)__B);995 return (__m512i)__builtin_ia32_pmulhrsw512((__v32hi)__A, (__v32hi)__B);
1067}996}
1068997
1069static __inline__ __m512i __DEFAULT_FN_ATTRS512998static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1070_mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)999_mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
1071{
1072 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1000 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1073 (__v32hi)_mm512_mulhrs_epi16(__A, __B),1001 (__v32hi)_mm512_mulhrs_epi16(__A, __B),
1074 (__v32hi)__W);1002 (__v32hi)__W);
1075}1003}
10761004
1077static __inline__ __m512i __DEFAULT_FN_ATTRS5121005static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1078_mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B)1006_mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
1079{
1080 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1007 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1081 (__v32hi)_mm512_mulhrs_epi16(__A, __B),1008 (__v32hi)_mm512_mulhrs_epi16(__A, __B),
1082 (__v32hi)_mm512_setzero_si512());1009 (__v32hi)_mm512_setzero_si512());
1083}1010}
10841011
1085static __inline__ __m512i __DEFAULT_FN_ATTRS5121012static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1086_mm512_mulhi_epi16(__m512i __A, __m512i __B)1013_mm512_mulhi_epi16(__m512i __A, __m512i __B) {
1087{1014 return (__m512i)__builtin_ia32_pmulhw512((__v32hi)__A, (__v32hi)__B);
1088 return (__m512i)__builtin_ia32_pmulhw512((__v32hi) __A, (__v32hi) __B);
1089}1015}
10901016
1091static __inline__ __m512i __DEFAULT_FN_ATTRS5121017static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1092_mm512_mask_mulhi_epi16(__m512i __W, __mmask32 __U, __m512i __A,1018_mm512_mask_mulhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
1093 __m512i __B)1019 return (__m512i)__builtin_ia32_selectw_512(
1094{1020 (__mmask32)__U, (__v32hi)_mm512_mulhi_epi16(__A, __B), (__v32hi)__W);
1095 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1096 (__v32hi)_mm512_mulhi_epi16(__A, __B),
1097 (__v32hi)__W);
1098}1021}
10991022
1100static __inline__ __m512i __DEFAULT_FN_ATTRS5121023static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1101_mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B)1024_mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
1102{1025 return (__m512i)__builtin_ia32_selectw_512(
1103 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1026 (__mmask32)__U, (__v32hi)_mm512_mulhi_epi16(__A, __B),
1104 (__v32hi)_mm512_mulhi_epi16(__A, __B),1027 (__v32hi)_mm512_setzero_si512());
1105 (__v32hi)_mm512_setzero_si512());
1106}1028}
11071029
1108static __inline__ __m512i __DEFAULT_FN_ATTRS5121030static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1109_mm512_mulhi_epu16(__m512i __A, __m512i __B)1031_mm512_mulhi_epu16(__m512i __A, __m512i __B) {
1110{1032 return (__m512i)__builtin_ia32_pmulhuw512((__v32hu)__A, (__v32hu)__B);
1111 return (__m512i)__builtin_ia32_pmulhuw512((__v32hi) __A, (__v32hi) __B);
1112}1033}
11131034
1114static __inline__ __m512i __DEFAULT_FN_ATTRS5121035static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1115_mm512_mask_mulhi_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1036_mm512_mask_mulhi_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
1116{1037 return (__m512i)__builtin_ia32_selectw_512(
1117 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1038 (__mmask32)__U, (__v32hi)_mm512_mulhi_epu16(__A, __B), (__v32hi)__W);
1118 (__v32hi)_mm512_mulhi_epu16(__A, __B),
1119 (__v32hi)__W);
1120}1039}
11211040
1122static __inline__ __m512i __DEFAULT_FN_ATTRS5121041static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1123_mm512_maskz_mulhi_epu16 (__mmask32 __U, __m512i __A, __m512i __B)1042_mm512_maskz_mulhi_epu16(__mmask32 __U, __m512i __A, __m512i __B) {
1124{1043 return (__m512i)__builtin_ia32_selectw_512(
1125 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1044 (__mmask32)__U, (__v32hi)_mm512_mulhi_epu16(__A, __B),
1126 (__v32hi)_mm512_mulhi_epu16(__A, __B),1045 (__v32hi)_mm512_setzero_si512());
1127 (__v32hi)_mm512_setzero_si512());
1128}1046}
11291047
1130static __inline__ __m512i __DEFAULT_FN_ATTRS5121048static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1131_mm512_maddubs_epi16(__m512i __X, __m512i __Y) {1049_mm512_maddubs_epi16(__m512i __X, __m512i __Y) {
1132 return (__m512i)__builtin_ia32_pmaddubsw512((__v64qi)__X, (__v64qi)__Y);1050 return (__m512i)__builtin_ia32_pmaddubsw512((__v64qi)__X, (__v64qi)__Y);
1133}1051}
11341052
1135static __inline__ __m512i __DEFAULT_FN_ATTRS5121053static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1136_mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X,1054_mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X,
1137 __m512i __Y) {1055 __m512i __Y) {
1138 return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U,1056 return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U,
...@@ -1140,26 +1058,26 @@ _mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X,...@@ -1140,26 +1058,26 @@ _mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X,
1140 (__v32hi)__W);1058 (__v32hi)__W);
1141}1059}
11421060
1143static __inline__ __m512i __DEFAULT_FN_ATTRS5121061static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1144_mm512_maskz_maddubs_epi16(__mmask32 __U, __m512i __X, __m512i __Y) {1062_mm512_maskz_maddubs_epi16(__mmask32 __U, __m512i __X, __m512i __Y) {
1145 return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U,1063 return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U,
1146 (__v32hi)_mm512_maddubs_epi16(__X, __Y),1064 (__v32hi)_mm512_maddubs_epi16(__X, __Y),
1147 (__v32hi)_mm512_setzero_si512());1065 (__v32hi)_mm512_setzero_si512());
1148}1066}
11491067
1150static __inline__ __m512i __DEFAULT_FN_ATTRS5121068static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1151_mm512_madd_epi16(__m512i __A, __m512i __B) {1069_mm512_madd_epi16(__m512i __A, __m512i __B) {
1152 return (__m512i)__builtin_ia32_pmaddwd512((__v32hi)__A, (__v32hi)__B);1070 return (__m512i)__builtin_ia32_pmaddwd512((__v32hi)__A, (__v32hi)__B);
1153}1071}
11541072
1155static __inline__ __m512i __DEFAULT_FN_ATTRS5121073static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1156_mm512_mask_madd_epi16(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {1074_mm512_mask_madd_epi16(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {
1157 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,1075 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
1158 (__v16si)_mm512_madd_epi16(__A, __B),1076 (__v16si)_mm512_madd_epi16(__A, __B),
1159 (__v16si)__W);1077 (__v16si)__W);
1160}1078}
11611079
1162static __inline__ __m512i __DEFAULT_FN_ATTRS5121080static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1163_mm512_maskz_madd_epi16(__mmask16 __U, __m512i __A, __m512i __B) {1081_mm512_maskz_madd_epi16(__mmask16 __U, __m512i __A, __m512i __B) {
1164 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,1082 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
1165 (__v16si)_mm512_madd_epi16(__A, __B),1083 (__v16si)_mm512_madd_epi16(__A, __B),
...@@ -1247,7 +1165,7 @@ _mm512_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A)...@@ -1247,7 +1165,7 @@ _mm512_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A)
1247 __builtin_ia32_pmovuswb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M);1165 __builtin_ia32_pmovuswb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M);
1248}1166}
12491167
1250static __inline__ __m512i __DEFAULT_FN_ATTRS5121168static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1251_mm512_unpackhi_epi8(__m512i __A, __m512i __B) {1169_mm512_unpackhi_epi8(__m512i __A, __m512i __B) {
1252 return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,1170 return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,
1253 8, 64+8, 9, 64+9,1171 8, 64+8, 9, 64+9,
...@@ -1268,21 +1186,21 @@ _mm512_unpackhi_epi8(__m512i __A, __m512i __B) {...@@ -1268,21 +1186,21 @@ _mm512_unpackhi_epi8(__m512i __A, __m512i __B) {
1268 62, 64+62, 63, 64+63);1186 62, 64+62, 63, 64+63);
1269}1187}
12701188
1271static __inline__ __m512i __DEFAULT_FN_ATTRS5121189static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1272_mm512_mask_unpackhi_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {1190_mm512_mask_unpackhi_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {
1273 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1191 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
1274 (__v64qi)_mm512_unpackhi_epi8(__A, __B),1192 (__v64qi)_mm512_unpackhi_epi8(__A, __B),
1275 (__v64qi)__W);1193 (__v64qi)__W);
1276}1194}
12771195
1278static __inline__ __m512i __DEFAULT_FN_ATTRS5121196static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1279_mm512_maskz_unpackhi_epi8(__mmask64 __U, __m512i __A, __m512i __B) {1197_mm512_maskz_unpackhi_epi8(__mmask64 __U, __m512i __A, __m512i __B) {
1280 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1198 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
1281 (__v64qi)_mm512_unpackhi_epi8(__A, __B),1199 (__v64qi)_mm512_unpackhi_epi8(__A, __B),
1282 (__v64qi)_mm512_setzero_si512());1200 (__v64qi)_mm512_setzero_si512());
1283}1201}
12841202
1285static __inline__ __m512i __DEFAULT_FN_ATTRS5121203static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1286_mm512_unpackhi_epi16(__m512i __A, __m512i __B) {1204_mm512_unpackhi_epi16(__m512i __A, __m512i __B) {
1287 return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B,1205 return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B,
1288 4, 32+4, 5, 32+5,1206 4, 32+4, 5, 32+5,
...@@ -1295,21 +1213,21 @@ _mm512_unpackhi_epi16(__m512i __A, __m512i __B) {...@@ -1295,21 +1213,21 @@ _mm512_unpackhi_epi16(__m512i __A, __m512i __B) {
1295 30, 32+30, 31, 32+31);1213 30, 32+30, 31, 32+31);
1296}1214}
12971215
1298static __inline__ __m512i __DEFAULT_FN_ATTRS5121216static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1299_mm512_mask_unpackhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1217_mm512_mask_unpackhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
1300 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1218 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1301 (__v32hi)_mm512_unpackhi_epi16(__A, __B),1219 (__v32hi)_mm512_unpackhi_epi16(__A, __B),
1302 (__v32hi)__W);1220 (__v32hi)__W);
1303}1221}
13041222
1305static __inline__ __m512i __DEFAULT_FN_ATTRS5121223static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1306_mm512_maskz_unpackhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) {1224_mm512_maskz_unpackhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
1307 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1225 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1308 (__v32hi)_mm512_unpackhi_epi16(__A, __B),1226 (__v32hi)_mm512_unpackhi_epi16(__A, __B),
1309 (__v32hi)_mm512_setzero_si512());1227 (__v32hi)_mm512_setzero_si512());
1310}1228}
13111229
1312static __inline__ __m512i __DEFAULT_FN_ATTRS5121230static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1313_mm512_unpacklo_epi8(__m512i __A, __m512i __B) {1231_mm512_unpacklo_epi8(__m512i __A, __m512i __B) {
1314 return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,1232 return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B,
1315 0, 64+0, 1, 64+1,1233 0, 64+0, 1, 64+1,
...@@ -1330,21 +1248,21 @@ _mm512_unpacklo_epi8(__m512i __A, __m512i __B) {...@@ -1330,21 +1248,21 @@ _mm512_unpacklo_epi8(__m512i __A, __m512i __B) {
1330 54, 64+54, 55, 64+55);1248 54, 64+54, 55, 64+55);
1331}1249}
13321250
1333static __inline__ __m512i __DEFAULT_FN_ATTRS5121251static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1334_mm512_mask_unpacklo_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {1252_mm512_mask_unpacklo_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) {
1335 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1253 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
1336 (__v64qi)_mm512_unpacklo_epi8(__A, __B),1254 (__v64qi)_mm512_unpacklo_epi8(__A, __B),
1337 (__v64qi)__W);1255 (__v64qi)__W);
1338}1256}
13391257
1340static __inline__ __m512i __DEFAULT_FN_ATTRS5121258static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1341_mm512_maskz_unpacklo_epi8(__mmask64 __U, __m512i __A, __m512i __B) {1259_mm512_maskz_unpacklo_epi8(__mmask64 __U, __m512i __A, __m512i __B) {
1342 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,1260 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U,
1343 (__v64qi)_mm512_unpacklo_epi8(__A, __B),1261 (__v64qi)_mm512_unpacklo_epi8(__A, __B),
1344 (__v64qi)_mm512_setzero_si512());1262 (__v64qi)_mm512_setzero_si512());
1345}1263}
13461264
1347static __inline__ __m512i __DEFAULT_FN_ATTRS5121265static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1348_mm512_unpacklo_epi16(__m512i __A, __m512i __B) {1266_mm512_unpacklo_epi16(__m512i __A, __m512i __B) {
1349 return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B,1267 return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B,
1350 0, 32+0, 1, 32+1,1268 0, 32+0, 1, 32+1,
...@@ -1357,67 +1275,60 @@ _mm512_unpacklo_epi16(__m512i __A, __m512i __B) {...@@ -1357,67 +1275,60 @@ _mm512_unpacklo_epi16(__m512i __A, __m512i __B) {
1357 26, 32+26, 27, 32+27);1275 26, 32+26, 27, 32+27);
1358}1276}
13591277
1360static __inline__ __m512i __DEFAULT_FN_ATTRS5121278static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1361_mm512_mask_unpacklo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {1279_mm512_mask_unpacklo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) {
1362 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1280 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1363 (__v32hi)_mm512_unpacklo_epi16(__A, __B),1281 (__v32hi)_mm512_unpacklo_epi16(__A, __B),
1364 (__v32hi)__W);1282 (__v32hi)__W);
1365}1283}
13661284
1367static __inline__ __m512i __DEFAULT_FN_ATTRS5121285static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1368_mm512_maskz_unpacklo_epi16(__mmask32 __U, __m512i __A, __m512i __B) {1286_mm512_maskz_unpacklo_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
1369 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1287 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1370 (__v32hi)_mm512_unpacklo_epi16(__A, __B),1288 (__v32hi)_mm512_unpacklo_epi16(__A, __B),
1371 (__v32hi)_mm512_setzero_si512());1289 (__v32hi)_mm512_setzero_si512());
1372}1290}
13731291
1374static __inline__ __m512i __DEFAULT_FN_ATTRS5121292static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1375_mm512_cvtepi8_epi16(__m256i __A)1293_mm512_cvtepi8_epi16(__m256i __A) {
1376{
1377 /* This function always performs a signed extension, but __v32qi is a char1294 /* This function always performs a signed extension, but __v32qi is a char
1378 which may be signed or unsigned, so use __v32qs. */1295 which may be signed or unsigned, so use __v32qs. */
1379 return (__m512i)__builtin_convertvector((__v32qs)__A, __v32hi);1296 return (__m512i)__builtin_convertvector((__v32qs)__A, __v32hi);
1380}1297}
13811298
1382static __inline__ __m512i __DEFAULT_FN_ATTRS5121299static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1383_mm512_mask_cvtepi8_epi16(__m512i __W, __mmask32 __U, __m256i __A)1300_mm512_mask_cvtepi8_epi16(__m512i __W, __mmask32 __U, __m256i __A) {
1384{
1385 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1301 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1386 (__v32hi)_mm512_cvtepi8_epi16(__A),1302 (__v32hi)_mm512_cvtepi8_epi16(__A),
1387 (__v32hi)__W);1303 (__v32hi)__W);
1388}1304}
13891305
1390static __inline__ __m512i __DEFAULT_FN_ATTRS5121306static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1391_mm512_maskz_cvtepi8_epi16(__mmask32 __U, __m256i __A)1307_mm512_maskz_cvtepi8_epi16(__mmask32 __U, __m256i __A) {
1392{
1393 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1308 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1394 (__v32hi)_mm512_cvtepi8_epi16(__A),1309 (__v32hi)_mm512_cvtepi8_epi16(__A),
1395 (__v32hi)_mm512_setzero_si512());1310 (__v32hi)_mm512_setzero_si512());
1396}1311}
13971312
1398static __inline__ __m512i __DEFAULT_FN_ATTRS5121313static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1399_mm512_cvtepu8_epi16(__m256i __A)1314_mm512_cvtepu8_epi16(__m256i __A) {
1400{
1401 return (__m512i)__builtin_convertvector((__v32qu)__A, __v32hi);1315 return (__m512i)__builtin_convertvector((__v32qu)__A, __v32hi);
1402}1316}
14031317
1404static __inline__ __m512i __DEFAULT_FN_ATTRS5121318static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1405_mm512_mask_cvtepu8_epi16(__m512i __W, __mmask32 __U, __m256i __A)1319_mm512_mask_cvtepu8_epi16(__m512i __W, __mmask32 __U, __m256i __A) {
1406{
1407 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1320 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1408 (__v32hi)_mm512_cvtepu8_epi16(__A),1321 (__v32hi)_mm512_cvtepu8_epi16(__A),
1409 (__v32hi)__W);1322 (__v32hi)__W);
1410}1323}
14111324
1412static __inline__ __m512i __DEFAULT_FN_ATTRS5121325static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1413_mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A)1326_mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A) {
1414{
1415 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1327 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1416 (__v32hi)_mm512_cvtepu8_epi16(__A),1328 (__v32hi)_mm512_cvtepu8_epi16(__A),
1417 (__v32hi)_mm512_setzero_si512());1329 (__v32hi)_mm512_setzero_si512());
1418}1330}
14191331
1420
1421#define _mm512_shufflehi_epi16(A, imm) \1332#define _mm512_shufflehi_epi16(A, imm) \
1422 ((__m512i)__builtin_ia32_pshufhw512((__v32hi)(__m512i)(A), (int)(imm)))1333 ((__m512i)__builtin_ia32_pshufhw512((__v32hi)(__m512i)(A), (int)(imm)))
14231334
...@@ -1450,13 +1361,13 @@ _mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A)...@@ -1450,13 +1361,13 @@ _mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A)
1450 (imm)), \1361 (imm)), \
1451 (__v32hi)_mm512_setzero_si512()))1362 (__v32hi)_mm512_setzero_si512()))
14521363
1453static __inline__ __m512i __DEFAULT_FN_ATTRS5121364static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1454_mm512_sllv_epi16(__m512i __A, __m512i __B)1365_mm512_sllv_epi16(__m512i __A, __m512i __B)
1455{1366{
1456 return (__m512i)__builtin_ia32_psllv32hi((__v32hi) __A, (__v32hi) __B);1367 return (__m512i)__builtin_ia32_psllv32hi((__v32hi) __A, (__v32hi) __B);
1457}1368}
14581369
1459static __inline__ __m512i __DEFAULT_FN_ATTRS5121370static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1460_mm512_mask_sllv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1371_mm512_mask_sllv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1461{1372{
1462 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1373 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -1464,7 +1375,7 @@ _mm512_mask_sllv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)...@@ -1464,7 +1375,7 @@ _mm512_mask_sllv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1464 (__v32hi)__W);1375 (__v32hi)__W);
1465}1376}
14661377
1467static __inline__ __m512i __DEFAULT_FN_ATTRS5121378static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1468_mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B)1379_mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B)
1469{1380{
1470 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1381 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -1472,61 +1383,56 @@ _mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B)...@@ -1472,61 +1383,56 @@ _mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B)
1472 (__v32hi)_mm512_setzero_si512());1383 (__v32hi)_mm512_setzero_si512());
1473}1384}
14741385
1475static __inline__ __m512i __DEFAULT_FN_ATTRS5121386static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1476_mm512_sll_epi16(__m512i __A, __m128i __B)1387_mm512_sll_epi16(__m512i __A, __m128i __B) {
1477{
1478 return (__m512i)__builtin_ia32_psllw512((__v32hi) __A, (__v8hi) __B);1388 return (__m512i)__builtin_ia32_psllw512((__v32hi) __A, (__v8hi) __B);
1479}1389}
14801390
1481static __inline__ __m512i __DEFAULT_FN_ATTRS5121391static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1482_mm512_mask_sll_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B)1392_mm512_mask_sll_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) {
1483{
1484 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1393 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1485 (__v32hi)_mm512_sll_epi16(__A, __B),1394 (__v32hi)_mm512_sll_epi16(__A, __B),
1486 (__v32hi)__W);1395 (__v32hi)__W);
1487}1396}
14881397
1489static __inline__ __m512i __DEFAULT_FN_ATTRS5121398static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1490_mm512_maskz_sll_epi16(__mmask32 __U, __m512i __A, __m128i __B)1399_mm512_maskz_sll_epi16(__mmask32 __U, __m512i __A, __m128i __B) {
1491{
1492 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1400 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1493 (__v32hi)_mm512_sll_epi16(__A, __B),1401 (__v32hi)_mm512_sll_epi16(__A, __B),
1494 (__v32hi)_mm512_setzero_si512());1402 (__v32hi)_mm512_setzero_si512());
1495}1403}
14961404
1497static __inline__ __m512i __DEFAULT_FN_ATTRS5121405static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1498_mm512_slli_epi16(__m512i __A, unsigned int __B)1406_mm512_slli_epi16(__m512i __A, unsigned int __B) {
1499{
1500 return (__m512i)__builtin_ia32_psllwi512((__v32hi)__A, (int)__B);1407 return (__m512i)__builtin_ia32_psllwi512((__v32hi)__A, (int)__B);
1501}1408}
15021409
1503static __inline__ __m512i __DEFAULT_FN_ATTRS5121410static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1504_mm512_mask_slli_epi16(__m512i __W, __mmask32 __U, __m512i __A,1411_mm512_mask_slli_epi16(__m512i __W, __mmask32 __U, __m512i __A,
1505 unsigned int __B)1412 unsigned int __B) {
1506{
1507 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1413 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1508 (__v32hi)_mm512_slli_epi16(__A, __B),1414 (__v32hi)_mm512_slli_epi16(__A, __B),
1509 (__v32hi)__W);1415 (__v32hi)__W);
1510}1416}
15111417
1512static __inline__ __m512i __DEFAULT_FN_ATTRS5121418static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1513_mm512_maskz_slli_epi16(__mmask32 __U, __m512i __A, unsigned int __B)1419_mm512_maskz_slli_epi16(__mmask32 __U, __m512i __A, unsigned int __B) {
1514{
1515 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1420 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1516 (__v32hi)_mm512_slli_epi16(__A, __B),1421 (__v32hi)_mm512_slli_epi16(__A, __B),
1517 (__v32hi)_mm512_setzero_si512());1422 (__v32hi)_mm512_setzero_si512());
1518}1423}
15191424
1520#define _mm512_bslli_epi128(a, imm) \1425#define _mm512_bslli_epi128(a, imm) \
1521 ((__m512i)__builtin_ia32_pslldqi512_byteshift((__v8di)(__m512i)(a), (int)(imm)))1426 ((__m512i)__builtin_ia32_pslldqi512_byteshift((__v64qi)(__m512i)(a), \
1427 (int)(imm)))
15221428
1523static __inline__ __m512i __DEFAULT_FN_ATTRS5121429static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1524_mm512_srlv_epi16(__m512i __A, __m512i __B)1430_mm512_srlv_epi16(__m512i __A, __m512i __B)
1525{1431{
1526 return (__m512i)__builtin_ia32_psrlv32hi((__v32hi)__A, (__v32hi)__B);1432 return (__m512i)__builtin_ia32_psrlv32hi((__v32hi)__A, (__v32hi)__B);
1527}1433}
15281434
1529static __inline__ __m512i __DEFAULT_FN_ATTRS5121435static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1530_mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1436_mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1531{1437{
1532 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1438 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -1534,7 +1440,7 @@ _mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)...@@ -1534,7 +1440,7 @@ _mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1534 (__v32hi)__W);1440 (__v32hi)__W);
1535}1441}
15361442
1537static __inline__ __m512i __DEFAULT_FN_ATTRS5121443static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1538_mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B)1444_mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B)
1539{1445{
1540 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1446 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -1542,13 +1448,13 @@ _mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B)...@@ -1542,13 +1448,13 @@ _mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B)
1542 (__v32hi)_mm512_setzero_si512());1448 (__v32hi)_mm512_setzero_si512());
1543}1449}
15441450
1545static __inline__ __m512i __DEFAULT_FN_ATTRS5121451static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1546_mm512_srav_epi16(__m512i __A, __m512i __B)1452_mm512_srav_epi16(__m512i __A, __m512i __B)
1547{1453{
1548 return (__m512i)__builtin_ia32_psrav32hi((__v32hi)__A, (__v32hi)__B);1454 return (__m512i)__builtin_ia32_psrav32hi((__v32hi)__A, (__v32hi)__B);
1549}1455}
15501456
1551static __inline__ __m512i __DEFAULT_FN_ATTRS5121457static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1552_mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)1458_mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1553{1459{
1554 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1460 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -1556,7 +1462,7 @@ _mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)...@@ -1556,7 +1462,7 @@ _mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B)
1556 (__v32hi)__W);1462 (__v32hi)__W);
1557}1463}
15581464
1559static __inline__ __m512i __DEFAULT_FN_ATTRS5121465static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1560_mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B)1466_mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B)
1561{1467{
1562 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1468 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
...@@ -1564,100 +1470,89 @@ _mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B)...@@ -1564,100 +1470,89 @@ _mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B)
1564 (__v32hi)_mm512_setzero_si512());1470 (__v32hi)_mm512_setzero_si512());
1565}1471}
15661472
1567static __inline__ __m512i __DEFAULT_FN_ATTRS5121473static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1568_mm512_sra_epi16(__m512i __A, __m128i __B)1474_mm512_sra_epi16(__m512i __A, __m128i __B) {
1569{
1570 return (__m512i)__builtin_ia32_psraw512((__v32hi) __A, (__v8hi) __B);1475 return (__m512i)__builtin_ia32_psraw512((__v32hi) __A, (__v8hi) __B);
1571}1476}
15721477
1573static __inline__ __m512i __DEFAULT_FN_ATTRS5121478static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1574_mm512_mask_sra_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B)1479_mm512_mask_sra_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) {
1575{
1576 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1480 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1577 (__v32hi)_mm512_sra_epi16(__A, __B),1481 (__v32hi)_mm512_sra_epi16(__A, __B),
1578 (__v32hi)__W);1482 (__v32hi)__W);
1579}1483}
15801484
1581static __inline__ __m512i __DEFAULT_FN_ATTRS5121485static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1582_mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B)1486_mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B) {
1583{
1584 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1487 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1585 (__v32hi)_mm512_sra_epi16(__A, __B),1488 (__v32hi)_mm512_sra_epi16(__A, __B),
1586 (__v32hi)_mm512_setzero_si512());1489 (__v32hi)_mm512_setzero_si512());
1587}1490}
15881491
1589static __inline__ __m512i __DEFAULT_FN_ATTRS5121492static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1590_mm512_srai_epi16(__m512i __A, unsigned int __B)1493_mm512_srai_epi16(__m512i __A, unsigned int __B) {
1591{
1592 return (__m512i)__builtin_ia32_psrawi512((__v32hi)__A, (int)__B);1494 return (__m512i)__builtin_ia32_psrawi512((__v32hi)__A, (int)__B);
1593}1495}
15941496
1595static __inline__ __m512i __DEFAULT_FN_ATTRS5121497static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1596_mm512_mask_srai_epi16(__m512i __W, __mmask32 __U, __m512i __A,1498_mm512_mask_srai_epi16(__m512i __W, __mmask32 __U, __m512i __A,
1597 unsigned int __B)1499 unsigned int __B) {
1598{
1599 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1500 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1600 (__v32hi)_mm512_srai_epi16(__A, __B),1501 (__v32hi)_mm512_srai_epi16(__A, __B),
1601 (__v32hi)__W);1502 (__v32hi)__W);
1602}1503}
16031504
1604static __inline__ __m512i __DEFAULT_FN_ATTRS5121505static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1605_mm512_maskz_srai_epi16(__mmask32 __U, __m512i __A, unsigned int __B)1506_mm512_maskz_srai_epi16(__mmask32 __U, __m512i __A, unsigned int __B) {
1606{
1607 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1507 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1608 (__v32hi)_mm512_srai_epi16(__A, __B),1508 (__v32hi)_mm512_srai_epi16(__A, __B),
1609 (__v32hi)_mm512_setzero_si512());1509 (__v32hi)_mm512_setzero_si512());
1610}1510}
16111511
1612static __inline__ __m512i __DEFAULT_FN_ATTRS5121512static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1613_mm512_srl_epi16(__m512i __A, __m128i __B)1513_mm512_srl_epi16(__m512i __A, __m128i __B) {
1614{
1615 return (__m512i)__builtin_ia32_psrlw512((__v32hi) __A, (__v8hi) __B);1514 return (__m512i)__builtin_ia32_psrlw512((__v32hi) __A, (__v8hi) __B);
1616}1515}
16171516
1618static __inline__ __m512i __DEFAULT_FN_ATTRS5121517static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1619_mm512_mask_srl_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B)1518_mm512_mask_srl_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) {
1620{
1621 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1519 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1622 (__v32hi)_mm512_srl_epi16(__A, __B),1520 (__v32hi)_mm512_srl_epi16(__A, __B),
1623 (__v32hi)__W);1521 (__v32hi)__W);
1624}1522}
16251523
1626static __inline__ __m512i __DEFAULT_FN_ATTRS5121524static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1627_mm512_maskz_srl_epi16(__mmask32 __U, __m512i __A, __m128i __B)1525_mm512_maskz_srl_epi16(__mmask32 __U, __m512i __A, __m128i __B) {
1628{
1629 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1526 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1630 (__v32hi)_mm512_srl_epi16(__A, __B),1527 (__v32hi)_mm512_srl_epi16(__A, __B),
1631 (__v32hi)_mm512_setzero_si512());1528 (__v32hi)_mm512_setzero_si512());
1632}1529}
16331530
1634static __inline__ __m512i __DEFAULT_FN_ATTRS5121531static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1635_mm512_srli_epi16(__m512i __A, unsigned int __B)1532_mm512_srli_epi16(__m512i __A, unsigned int __B) {
1636{
1637 return (__m512i)__builtin_ia32_psrlwi512((__v32hi)__A, (int)__B);1533 return (__m512i)__builtin_ia32_psrlwi512((__v32hi)__A, (int)__B);
1638}1534}
16391535
1640static __inline__ __m512i __DEFAULT_FN_ATTRS5121536static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1641_mm512_mask_srli_epi16(__m512i __W, __mmask32 __U, __m512i __A,1537_mm512_mask_srli_epi16(__m512i __W, __mmask32 __U, __m512i __A,
1642 unsigned int __B)1538 unsigned int __B) {
1643{
1644 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1539 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1645 (__v32hi)_mm512_srli_epi16(__A, __B),1540 (__v32hi)_mm512_srli_epi16(__A, __B),
1646 (__v32hi)__W);1541 (__v32hi)__W);
1647}1542}
16481543
1649static __inline__ __m512i __DEFAULT_FN_ATTRS5121544static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1650_mm512_maskz_srli_epi16(__mmask32 __U, __m512i __A, int __B)1545_mm512_maskz_srli_epi16(__mmask32 __U, __m512i __A, int __B) {
1651{
1652 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,1546 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1653 (__v32hi)_mm512_srli_epi16(__A, (unsigned int)__B),1547 (__v32hi)_mm512_srli_epi16(__A, (unsigned int)__B),
1654 (__v32hi)_mm512_setzero_si512());1548 (__v32hi)_mm512_setzero_si512());
1655}1549}
16561550
1657#define _mm512_bsrli_epi128(a, imm) \1551#define _mm512_bsrli_epi128(a, imm) \
1658 ((__m512i)__builtin_ia32_psrldqi512_byteshift((__v8di)(__m512i)(a), (int)(imm)))1552 ((__m512i)__builtin_ia32_psrldqi512_byteshift((__v64qi)(__m512i)(a), \
1553 (int)(imm)))
16591554
1660static __inline__ __m512i __DEFAULT_FN_ATTRS5121555static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1661_mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A)1556_mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A)
1662{1557{
1663 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,1558 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,
...@@ -1665,23 +1560,21 @@ _mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A)...@@ -1665,23 +1560,21 @@ _mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A)
1665 (__v32hi) __W);1560 (__v32hi) __W);
1666}1561}
16671562
1668static __inline__ __m512i __DEFAULT_FN_ATTRS5121563static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1669_mm512_maskz_mov_epi16 (__mmask32 __U, __m512i __A)1564_mm512_maskz_mov_epi16(__mmask32 __U, __m512i __A) {
1670{
1671 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,1565 return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U,
1672 (__v32hi) __A,1566 (__v32hi) __A,
1673 (__v32hi) _mm512_setzero_si512 ());1567 (__v32hi) _mm512_setzero_si512 ());
1674}1568}
16751569
1676static __inline__ __m512i __DEFAULT_FN_ATTRS5121570static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1677_mm512_mask_mov_epi8 (__m512i __W, __mmask64 __U, __m512i __A)1571_mm512_mask_mov_epi8(__m512i __W, __mmask64 __U, __m512i __A) {
1678{
1679 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,1572 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,
1680 (__v64qi) __A,1573 (__v64qi) __A,
1681 (__v64qi) __W);1574 (__v64qi) __W);
1682}1575}
16831576
1684static __inline__ __m512i __DEFAULT_FN_ATTRS5121577static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1685_mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A)1578_mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A)
1686{1579{
1687 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,1580 return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U,
...@@ -1689,7 +1582,7 @@ _mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A)...@@ -1689,7 +1582,7 @@ _mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A)
1689 (__v64qi) _mm512_setzero_si512 ());1582 (__v64qi) _mm512_setzero_si512 ());
1690}1583}
16911584
1692static __inline__ __m512i __DEFAULT_FN_ATTRS5121585static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1693_mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A)1586_mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A)
1694{1587{
1695 return (__m512i) __builtin_ia32_selectb_512(__M,1588 return (__m512i) __builtin_ia32_selectb_512(__M,
...@@ -1697,23 +1590,21 @@ _mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A)...@@ -1697,23 +1590,21 @@ _mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A)
1697 (__v64qi) __O);1590 (__v64qi) __O);
1698}1591}
16991592
1700static __inline__ __m512i __DEFAULT_FN_ATTRS5121593static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1701_mm512_maskz_set1_epi8 (__mmask64 __M, char __A)1594_mm512_maskz_set1_epi8(__mmask64 __M, char __A) {
1702{
1703 return (__m512i) __builtin_ia32_selectb_512(__M,1595 return (__m512i) __builtin_ia32_selectb_512(__M,
1704 (__v64qi) _mm512_set1_epi8(__A),1596 (__v64qi) _mm512_set1_epi8(__A),
1705 (__v64qi) _mm512_setzero_si512());1597 (__v64qi) _mm512_setzero_si512());
1706}1598}
17071599
1708static __inline__ __mmask64 __DEFAULT_FN_ATTRS _mm512_kunpackd(__mmask64 __A,1600static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR
1709 __mmask64 __B) {1601_mm512_kunpackd(__mmask64 __A, __mmask64 __B) {
1710 return (__mmask64) __builtin_ia32_kunpckdi ((__mmask64) __A,1602 return (__mmask64) __builtin_ia32_kunpckdi ((__mmask64) __A,
1711 (__mmask64) __B);1603 (__mmask64) __B);
1712}1604}
17131605
1714static __inline__ __mmask32 __DEFAULT_FN_ATTRS1606static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR
1715_mm512_kunpackw (__mmask32 __A, __mmask32 __B)1607_mm512_kunpackw(__mmask32 __A, __mmask32 __B) {
1716{
1717 return (__mmask32) __builtin_ia32_kunpcksi ((__mmask32) __A,1608 return (__mmask32) __builtin_ia32_kunpcksi ((__mmask32) __A,
1718 (__mmask32) __B);1609 (__mmask32) __B);
1719}1610}
...@@ -1859,33 +1750,28 @@ _mm512_mask_testn_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B)...@@ -1859,33 +1750,28 @@ _mm512_mask_testn_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B)
1859 _mm512_setzero_si512());1750 _mm512_setzero_si512());
1860}1751}
18611752
1862static __inline__ __mmask64 __DEFAULT_FN_ATTRS5121753static __inline__ __mmask64 __DEFAULT_FN_ATTRS512_CONSTEXPR
1863_mm512_movepi8_mask (__m512i __A)1754_mm512_movepi8_mask(__m512i __A) {
1864{
1865 return (__mmask64) __builtin_ia32_cvtb2mask512 ((__v64qi) __A);1755 return (__mmask64) __builtin_ia32_cvtb2mask512 ((__v64qi) __A);
1866}1756}
18671757
1868static __inline__ __mmask32 __DEFAULT_FN_ATTRS5121758static __inline__ __mmask32 __DEFAULT_FN_ATTRS512_CONSTEXPR
1869_mm512_movepi16_mask (__m512i __A)1759_mm512_movepi16_mask(__m512i __A) {
1870{
1871 return (__mmask32) __builtin_ia32_cvtw2mask512 ((__v32hi) __A);1760 return (__mmask32) __builtin_ia32_cvtw2mask512 ((__v32hi) __A);
1872}1761}
18731762
1874static __inline__ __m512i __DEFAULT_FN_ATTRS5121763static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1875_mm512_movm_epi8 (__mmask64 __A)1764_mm512_movm_epi8(__mmask64 __A) {
1876{
1877 return (__m512i) __builtin_ia32_cvtmask2b512 (__A);1765 return (__m512i) __builtin_ia32_cvtmask2b512 (__A);
1878}1766}
18791767
1880static __inline__ __m512i __DEFAULT_FN_ATTRS5121768static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1881_mm512_movm_epi16 (__mmask32 __A)1769_mm512_movm_epi16(__mmask32 __A) {
1882{
1883 return (__m512i) __builtin_ia32_cvtmask2w512 (__A);1770 return (__m512i) __builtin_ia32_cvtmask2w512 (__A);
1884}1771}
18851772
1886static __inline__ __m512i __DEFAULT_FN_ATTRS5121773static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1887_mm512_broadcastb_epi8 (__m128i __A)1774_mm512_broadcastb_epi8(__m128i __A) {
1888{
1889 return (__m512i)__builtin_shufflevector((__v16qi) __A, (__v16qi) __A,1775 return (__m512i)__builtin_shufflevector((__v16qi) __A, (__v16qi) __A,
1890 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,1776 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1891 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,1777 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
...@@ -1893,7 +1779,7 @@ _mm512_broadcastb_epi8 (__m128i __A)...@@ -1893,7 +1779,7 @@ _mm512_broadcastb_epi8 (__m128i __A)
1893 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);1779 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
1894}1780}
18951781
1896static __inline__ __m512i __DEFAULT_FN_ATTRS5121782static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1897_mm512_mask_broadcastb_epi8 (__m512i __O, __mmask64 __M, __m128i __A)1783_mm512_mask_broadcastb_epi8 (__m512i __O, __mmask64 __M, __m128i __A)
1898{1784{
1899 return (__m512i)__builtin_ia32_selectb_512(__M,1785 return (__m512i)__builtin_ia32_selectb_512(__M,
...@@ -1901,15 +1787,14 @@ _mm512_mask_broadcastb_epi8 (__m512i __O, __mmask64 __M, __m128i __A)...@@ -1901,15 +1787,14 @@ _mm512_mask_broadcastb_epi8 (__m512i __O, __mmask64 __M, __m128i __A)
1901 (__v64qi) __O);1787 (__v64qi) __O);
1902}1788}
19031789
1904static __inline__ __m512i __DEFAULT_FN_ATTRS5121790static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1905_mm512_maskz_broadcastb_epi8 (__mmask64 __M, __m128i __A)1791_mm512_maskz_broadcastb_epi8(__mmask64 __M, __m128i __A) {
1906{
1907 return (__m512i)__builtin_ia32_selectb_512(__M,1792 return (__m512i)__builtin_ia32_selectb_512(__M,
1908 (__v64qi) _mm512_broadcastb_epi8(__A),1793 (__v64qi) _mm512_broadcastb_epi8(__A),
1909 (__v64qi) _mm512_setzero_si512());1794 (__v64qi) _mm512_setzero_si512());
1910}1795}
19111796
1912static __inline__ __m512i __DEFAULT_FN_ATTRS5121797static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1913_mm512_mask_set1_epi16 (__m512i __O, __mmask32 __M, short __A)1798_mm512_mask_set1_epi16 (__m512i __O, __mmask32 __M, short __A)
1914{1799{
1915 return (__m512i) __builtin_ia32_selectw_512(__M,1800 return (__m512i) __builtin_ia32_selectw_512(__M,
...@@ -1917,23 +1802,21 @@ _mm512_mask_set1_epi16 (__m512i __O, __mmask32 __M, short __A)...@@ -1917,23 +1802,21 @@ _mm512_mask_set1_epi16 (__m512i __O, __mmask32 __M, short __A)
1917 (__v32hi) __O);1802 (__v32hi) __O);
1918}1803}
19191804
1920static __inline__ __m512i __DEFAULT_FN_ATTRS5121805static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1921_mm512_maskz_set1_epi16 (__mmask32 __M, short __A)1806_mm512_maskz_set1_epi16(__mmask32 __M, short __A) {
1922{
1923 return (__m512i) __builtin_ia32_selectw_512(__M,1807 return (__m512i) __builtin_ia32_selectw_512(__M,
1924 (__v32hi) _mm512_set1_epi16(__A),1808 (__v32hi) _mm512_set1_epi16(__A),
1925 (__v32hi) _mm512_setzero_si512());1809 (__v32hi) _mm512_setzero_si512());
1926}1810}
19271811
1928static __inline__ __m512i __DEFAULT_FN_ATTRS5121812static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1929_mm512_broadcastw_epi16 (__m128i __A)1813_mm512_broadcastw_epi16(__m128i __A) {
1930{
1931 return (__m512i)__builtin_shufflevector((__v8hi) __A, (__v8hi) __A,1814 return (__m512i)__builtin_shufflevector((__v8hi) __A, (__v8hi) __A,
1932 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,1815 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1933 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);1816 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
1934}1817}
19351818
1936static __inline__ __m512i __DEFAULT_FN_ATTRS5121819static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1937_mm512_mask_broadcastw_epi16 (__m512i __O, __mmask32 __M, __m128i __A)1820_mm512_mask_broadcastw_epi16 (__m512i __O, __mmask32 __M, __m128i __A)
1938{1821{
1939 return (__m512i)__builtin_ia32_selectw_512(__M,1822 return (__m512i)__builtin_ia32_selectw_512(__M,
...@@ -1941,7 +1824,7 @@ _mm512_mask_broadcastw_epi16 (__m512i __O, __mmask32 __M, __m128i __A)...@@ -1941,7 +1824,7 @@ _mm512_mask_broadcastw_epi16 (__m512i __O, __mmask32 __M, __m128i __A)
1941 (__v32hi) __O);1824 (__v32hi) __O);
1942}1825}
19431826
1944static __inline__ __m512i __DEFAULT_FN_ATTRS5121827static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1945_mm512_maskz_broadcastw_epi16 (__mmask32 __M, __m128i __A)1828_mm512_maskz_broadcastw_epi16 (__mmask32 __M, __m128i __A)
1946{1829{
1947 return (__m512i)__builtin_ia32_selectw_512(__M,1830 return (__m512i)__builtin_ia32_selectw_512(__M,
...@@ -1949,25 +1832,21 @@ _mm512_maskz_broadcastw_epi16 (__mmask32 __M, __m128i __A)...@@ -1949,25 +1832,21 @@ _mm512_maskz_broadcastw_epi16 (__mmask32 __M, __m128i __A)
1949 (__v32hi) _mm512_setzero_si512());1832 (__v32hi) _mm512_setzero_si512());
1950}1833}
19511834
1952static __inline__ __m512i __DEFAULT_FN_ATTRS5121835static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1953_mm512_permutexvar_epi16 (__m512i __A, __m512i __B)1836_mm512_permutexvar_epi16(__m512i __A, __m512i __B) {
1954{
1955 return (__m512i)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A);1837 return (__m512i)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A);
1956}1838}
19571839
1958static __inline__ __m512i __DEFAULT_FN_ATTRS5121840static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1959_mm512_maskz_permutexvar_epi16 (__mmask32 __M, __m512i __A,1841_mm512_maskz_permutexvar_epi16(__mmask32 __M, __m512i __A, __m512i __B) {
1960 __m512i __B)
1961{
1962 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,1842 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
1963 (__v32hi)_mm512_permutexvar_epi16(__A, __B),1843 (__v32hi)_mm512_permutexvar_epi16(__A, __B),
1964 (__v32hi)_mm512_setzero_si512());1844 (__v32hi)_mm512_setzero_si512());
1965}1845}
19661846
1967static __inline__ __m512i __DEFAULT_FN_ATTRS5121847static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1968_mm512_mask_permutexvar_epi16 (__m512i __W, __mmask32 __M, __m512i __A,1848_mm512_mask_permutexvar_epi16(__m512i __W, __mmask32 __M, __m512i __A,
1969 __m512i __B)1849 __m512i __B) {
1970{
1971 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,1850 return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M,
1972 (__v32hi)_mm512_permutexvar_epi16(__A, __B),1851 (__v32hi)_mm512_permutexvar_epi16(__A, __B),
1973 (__v32hi)__W);1852 (__v32hi)__W);
...@@ -2010,5 +1889,7 @@ _mm512_sad_epu8 (__m512i __A, __m512i __B)...@@ -2010,5 +1889,7 @@ _mm512_sad_epu8 (__m512i __A, __m512i __B)
20101889
2011#undef __DEFAULT_FN_ATTRS5121890#undef __DEFAULT_FN_ATTRS512
2012#undef __DEFAULT_FN_ATTRS1891#undef __DEFAULT_FN_ATTRS
1892#undef __DEFAULT_FN_ATTRS512_CONSTEXPR
1893#undef __DEFAULT_FN_ATTRS_CONSTEXPR
20131894
2014#endif1895#endif
lib/include/avx512cdintrin.h+42-55
...@@ -15,109 +15,96 @@...@@ -15,109 +15,96 @@
15#define __AVX512CDINTRIN_H15#define __AVX512CDINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#if defined(__cplusplus) && (__cplusplus >= 201103L)
18#define __DEFAULT_FN_ATTRS \19#define __DEFAULT_FN_ATTRS \
19 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, __target__("avx512cd"), \
20 __target__("avx512cd,evex512"), __min_vector_width__(512)))21 __min_vector_width__(512))) constexpr
22#else
23#define __DEFAULT_FN_ATTRS \
24 __attribute__((__always_inline__, __nodebug__, __target__("avx512cd"), \
25 __min_vector_width__(512)))
26#endif
2127
22static __inline__ __m512i __DEFAULT_FN_ATTRS28static __inline__ __m512i __DEFAULT_FN_ATTRS
23_mm512_conflict_epi64 (__m512i __A)29_mm512_conflict_epi64(__m512i __A) {
24{30 return (__m512i)__builtin_ia32_vpconflictdi_512((__v8di)__A);
25 return (__m512i) __builtin_ia32_vpconflictdi_512 ((__v8di) __A);
26}31}
2732
28static __inline__ __m512i __DEFAULT_FN_ATTRS33static __inline__ __m512i __DEFAULT_FN_ATTRS
29_mm512_mask_conflict_epi64 (__m512i __W, __mmask8 __U, __m512i __A)34_mm512_mask_conflict_epi64(__m512i __W, __mmask8 __U, __m512i __A) {
30{35 return (__m512i)__builtin_ia32_selectq_512(
31 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,36 (__mmask8)__U, (__v8di)_mm512_conflict_epi64(__A), (__v8di)__W);
32 (__v8di)_mm512_conflict_epi64(__A),
33 (__v8di)__W);
34}37}
3538
36static __inline__ __m512i __DEFAULT_FN_ATTRS39static __inline__ __m512i __DEFAULT_FN_ATTRS
37_mm512_maskz_conflict_epi64 (__mmask8 __U, __m512i __A)40_mm512_maskz_conflict_epi64(__mmask8 __U, __m512i __A) {
38{
39 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,41 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
40 (__v8di)_mm512_conflict_epi64(__A),42 (__v8di)_mm512_conflict_epi64(__A),
41 (__v8di)_mm512_setzero_si512 ());43 (__v8di)_mm512_setzero_si512());
42}44}
4345
44static __inline__ __m512i __DEFAULT_FN_ATTRS46static __inline__ __m512i __DEFAULT_FN_ATTRS
45_mm512_conflict_epi32 (__m512i __A)47_mm512_conflict_epi32(__m512i __A) {
46{48 return (__m512i)__builtin_ia32_vpconflictsi_512((__v16si)__A);
47 return (__m512i) __builtin_ia32_vpconflictsi_512 ((__v16si) __A);
48}49}
4950
50static __inline__ __m512i __DEFAULT_FN_ATTRS51static __inline__ __m512i __DEFAULT_FN_ATTRS
51_mm512_mask_conflict_epi32 (__m512i __W, __mmask16 __U, __m512i __A)52_mm512_mask_conflict_epi32(__m512i __W, __mmask16 __U, __m512i __A) {
52{53 return (__m512i)__builtin_ia32_selectd_512(
53 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,54 (__mmask16)__U, (__v16si)_mm512_conflict_epi32(__A), (__v16si)__W);
54 (__v16si)_mm512_conflict_epi32(__A),
55 (__v16si)__W);
56}55}
5756
58static __inline__ __m512i __DEFAULT_FN_ATTRS57static __inline__ __m512i __DEFAULT_FN_ATTRS
59_mm512_maskz_conflict_epi32 (__mmask16 __U, __m512i __A)58_mm512_maskz_conflict_epi32(__mmask16 __U, __m512i __A) {
60{59 return (__m512i)__builtin_ia32_selectd_512(
61 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,60 (__mmask16)__U, (__v16si)_mm512_conflict_epi32(__A),
62 (__v16si)_mm512_conflict_epi32(__A),61 (__v16si)_mm512_setzero_si512());
63 (__v16si)_mm512_setzero_si512());
64}62}
6563
66static __inline__ __m512i __DEFAULT_FN_ATTRS64static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_lzcnt_epi32(__m512i __A) {
67_mm512_lzcnt_epi32 (__m512i __A)65 return (__m512i)__builtin_elementwise_clzg((__v16si)__A,
68{66 (__v16si)_mm512_set1_epi32(32));
69 return (__m512i) __builtin_ia32_vplzcntd_512 ((__v16si) __A);
70}67}
7168
72static __inline__ __m512i __DEFAULT_FN_ATTRS69static __inline__ __m512i __DEFAULT_FN_ATTRS
73_mm512_mask_lzcnt_epi32 (__m512i __W, __mmask16 __U, __m512i __A)70_mm512_mask_lzcnt_epi32(__m512i __W, __mmask16 __U, __m512i __A) {
74{71 return (__m512i)__builtin_ia32_selectd_512(
75 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,72 (__mmask16)__U, (__v16si)_mm512_lzcnt_epi32(__A), (__v16si)__W);
76 (__v16si)_mm512_lzcnt_epi32(__A),
77 (__v16si)__W);
78}73}
7974
80static __inline__ __m512i __DEFAULT_FN_ATTRS75static __inline__ __m512i __DEFAULT_FN_ATTRS
81_mm512_maskz_lzcnt_epi32 (__mmask16 __U, __m512i __A)76_mm512_maskz_lzcnt_epi32(__mmask16 __U, __m512i __A) {
82{
83 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,77 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
84 (__v16si)_mm512_lzcnt_epi32(__A),78 (__v16si)_mm512_lzcnt_epi32(__A),
85 (__v16si)_mm512_setzero_si512());79 (__v16si)_mm512_setzero_si512());
86}80}
8781
88static __inline__ __m512i __DEFAULT_FN_ATTRS82static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_lzcnt_epi64(__m512i __A) {
89_mm512_lzcnt_epi64 (__m512i __A)83 return (__m512i)__builtin_elementwise_clzg(
90{84 (__v8di)__A, (__v8di)_mm512_set1_epi64((long long)64));
91 return (__m512i) __builtin_ia32_vplzcntq_512 ((__v8di) __A);
92}85}
9386
94static __inline__ __m512i __DEFAULT_FN_ATTRS87static __inline__ __m512i __DEFAULT_FN_ATTRS
95_mm512_mask_lzcnt_epi64 (__m512i __W, __mmask8 __U, __m512i __A)88_mm512_mask_lzcnt_epi64(__m512i __W, __mmask8 __U, __m512i __A) {
96{89 return (__m512i)__builtin_ia32_selectq_512(
97 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,90 (__mmask8)__U, (__v8di)_mm512_lzcnt_epi64(__A), (__v8di)__W);
98 (__v8di)_mm512_lzcnt_epi64(__A),
99 (__v8di)__W);
100}91}
10192
102static __inline__ __m512i __DEFAULT_FN_ATTRS93static __inline__ __m512i __DEFAULT_FN_ATTRS
103_mm512_maskz_lzcnt_epi64 (__mmask8 __U, __m512i __A)94_mm512_maskz_lzcnt_epi64(__mmask8 __U, __m512i __A) {
104{
105 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,95 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
106 (__v8di)_mm512_lzcnt_epi64(__A),96 (__v8di)_mm512_lzcnt_epi64(__A),
107 (__v8di)_mm512_setzero_si512());97 (__v8di)_mm512_setzero_si512());
108}98}
10999
110static __inline__ __m512i __DEFAULT_FN_ATTRS100static __inline__ __m512i __DEFAULT_FN_ATTRS
111_mm512_broadcastmb_epi64 (__mmask8 __A)101_mm512_broadcastmb_epi64(__mmask8 __A) {
112{102 return (__m512i)_mm512_set1_epi64((long long)__A);
113 return (__m512i) _mm512_set1_epi64((long long) __A);
114}103}
115104
116static __inline__ __m512i __DEFAULT_FN_ATTRS105static __inline__ __m512i __DEFAULT_FN_ATTRS
117_mm512_broadcastmw_epi32 (__mmask16 __A)106_mm512_broadcastmw_epi32(__mmask16 __A) {
118{107 return (__m512i)_mm512_set1_epi32((int)__A);
119 return (__m512i) _mm512_set1_epi32((int) __A);
120
121}108}
122109
123#undef __DEFAULT_FN_ATTRS110#undef __DEFAULT_FN_ATTRS
lib/include/avx512dqintrin.h+132-161
...@@ -15,110 +15,105 @@...@@ -15,110 +15,105 @@
15#define __AVX512DQINTRIN_H15#define __AVX512DQINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS512 __attribute__((__always_inline__, __nodebug__, __target__("avx512dq,evex512"), __min_vector_width__(512)))18#define __DEFAULT_FN_ATTRS512 \
19 __attribute__((__always_inline__, __nodebug__, __target__("avx512dq"), \
20 __min_vector_width__(512)))
19#define __DEFAULT_FN_ATTRS \21#define __DEFAULT_FN_ATTRS \
20 __attribute__((__always_inline__, __nodebug__, \22 __attribute__((__always_inline__, __nodebug__, __target__("avx512dq")))
21 __target__("avx512dq,no-evex512")))23
24#if defined(__cplusplus) && (__cplusplus >= 201103L)
25#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr
26#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
27#else
28#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512
29#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
30#endif
2231
23static __inline __mmask8 __DEFAULT_FN_ATTRS32static __inline __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
24_knot_mask8(__mmask8 __M)33_knot_mask8(__mmask8 __M) {
25{
26 return __builtin_ia32_knotqi(__M);34 return __builtin_ia32_knotqi(__M);
27}35}
2836
29static __inline__ __mmask8 __DEFAULT_FN_ATTRS37static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
30_kand_mask8(__mmask8 __A, __mmask8 __B)38_kand_mask8(__mmask8 __A, __mmask8 __B) {
31{
32 return (__mmask8)__builtin_ia32_kandqi((__mmask8)__A, (__mmask8)__B);39 return (__mmask8)__builtin_ia32_kandqi((__mmask8)__A, (__mmask8)__B);
33}40}
3441
35static __inline__ __mmask8 __DEFAULT_FN_ATTRS42static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
36_kandn_mask8(__mmask8 __A, __mmask8 __B)43_kandn_mask8(__mmask8 __A, __mmask8 __B) {
37{
38 return (__mmask8)__builtin_ia32_kandnqi((__mmask8)__A, (__mmask8)__B);44 return (__mmask8)__builtin_ia32_kandnqi((__mmask8)__A, (__mmask8)__B);
39}45}
4046
41static __inline__ __mmask8 __DEFAULT_FN_ATTRS47static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
42_kor_mask8(__mmask8 __A, __mmask8 __B)48_kor_mask8(__mmask8 __A, __mmask8 __B) {
43{
44 return (__mmask8)__builtin_ia32_korqi((__mmask8)__A, (__mmask8)__B);49 return (__mmask8)__builtin_ia32_korqi((__mmask8)__A, (__mmask8)__B);
45}50}
4651
47static __inline__ __mmask8 __DEFAULT_FN_ATTRS52static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
48_kxnor_mask8(__mmask8 __A, __mmask8 __B)53_kxnor_mask8(__mmask8 __A, __mmask8 __B) {
49{
50 return (__mmask8)__builtin_ia32_kxnorqi((__mmask8)__A, (__mmask8)__B);54 return (__mmask8)__builtin_ia32_kxnorqi((__mmask8)__A, (__mmask8)__B);
51}55}
5256
53static __inline__ __mmask8 __DEFAULT_FN_ATTRS57static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
54_kxor_mask8(__mmask8 __A, __mmask8 __B)58_kxor_mask8(__mmask8 __A, __mmask8 __B) {
55{
56 return (__mmask8)__builtin_ia32_kxorqi((__mmask8)__A, (__mmask8)__B);59 return (__mmask8)__builtin_ia32_kxorqi((__mmask8)__A, (__mmask8)__B);
57}60}
5861
59static __inline__ unsigned char __DEFAULT_FN_ATTRS62static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
60_kortestc_mask8_u8(__mmask8 __A, __mmask8 __B)63_kortestc_mask8_u8(__mmask8 __A, __mmask8 __B) {
61{
62 return (unsigned char)__builtin_ia32_kortestcqi(__A, __B);64 return (unsigned char)__builtin_ia32_kortestcqi(__A, __B);
63}65}
6466
65static __inline__ unsigned char __DEFAULT_FN_ATTRS67static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
66_kortestz_mask8_u8(__mmask8 __A, __mmask8 __B)68_kortestz_mask8_u8(__mmask8 __A, __mmask8 __B) {
67{
68 return (unsigned char)__builtin_ia32_kortestzqi(__A, __B);69 return (unsigned char)__builtin_ia32_kortestzqi(__A, __B);
69}70}
7071
71static __inline__ unsigned char __DEFAULT_FN_ATTRS72static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
72_kortest_mask8_u8(__mmask8 __A, __mmask8 __B, unsigned char *__C) {73_kortest_mask8_u8(__mmask8 __A, __mmask8 __B, unsigned char *__C) {
73 *__C = (unsigned char)__builtin_ia32_kortestcqi(__A, __B);74 *__C = (unsigned char)__builtin_ia32_kortestcqi(__A, __B);
74 return (unsigned char)__builtin_ia32_kortestzqi(__A, __B);75 return (unsigned char)__builtin_ia32_kortestzqi(__A, __B);
75}76}
7677
77static __inline__ unsigned char __DEFAULT_FN_ATTRS78static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
78_ktestc_mask8_u8(__mmask8 __A, __mmask8 __B)79_ktestc_mask8_u8(__mmask8 __A, __mmask8 __B) {
79{
80 return (unsigned char)__builtin_ia32_ktestcqi(__A, __B);80 return (unsigned char)__builtin_ia32_ktestcqi(__A, __B);
81}81}
8282
83static __inline__ unsigned char __DEFAULT_FN_ATTRS83static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
84_ktestz_mask8_u8(__mmask8 __A, __mmask8 __B)84_ktestz_mask8_u8(__mmask8 __A, __mmask8 __B) {
85{
86 return (unsigned char)__builtin_ia32_ktestzqi(__A, __B);85 return (unsigned char)__builtin_ia32_ktestzqi(__A, __B);
87}86}
8887
89static __inline__ unsigned char __DEFAULT_FN_ATTRS88static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
90_ktest_mask8_u8(__mmask8 __A, __mmask8 __B, unsigned char *__C) {89_ktest_mask8_u8(__mmask8 __A, __mmask8 __B, unsigned char *__C) {
91 *__C = (unsigned char)__builtin_ia32_ktestcqi(__A, __B);90 *__C = (unsigned char)__builtin_ia32_ktestcqi(__A, __B);
92 return (unsigned char)__builtin_ia32_ktestzqi(__A, __B);91 return (unsigned char)__builtin_ia32_ktestzqi(__A, __B);
93}92}
9493
95static __inline__ unsigned char __DEFAULT_FN_ATTRS94static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
96_ktestc_mask16_u8(__mmask16 __A, __mmask16 __B)95_ktestc_mask16_u8(__mmask16 __A, __mmask16 __B) {
97{
98 return (unsigned char)__builtin_ia32_ktestchi(__A, __B);96 return (unsigned char)__builtin_ia32_ktestchi(__A, __B);
99}97}
10098
101static __inline__ unsigned char __DEFAULT_FN_ATTRS99static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
102_ktestz_mask16_u8(__mmask16 __A, __mmask16 __B)100_ktestz_mask16_u8(__mmask16 __A, __mmask16 __B) {
103{
104 return (unsigned char)__builtin_ia32_ktestzhi(__A, __B);101 return (unsigned char)__builtin_ia32_ktestzhi(__A, __B);
105}102}
106103
107static __inline__ unsigned char __DEFAULT_FN_ATTRS104static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
108_ktest_mask16_u8(__mmask16 __A, __mmask16 __B, unsigned char *__C) {105_ktest_mask16_u8(__mmask16 __A, __mmask16 __B, unsigned char *__C) {
109 *__C = (unsigned char)__builtin_ia32_ktestchi(__A, __B);106 *__C = (unsigned char)__builtin_ia32_ktestchi(__A, __B);
110 return (unsigned char)__builtin_ia32_ktestzhi(__A, __B);107 return (unsigned char)__builtin_ia32_ktestzhi(__A, __B);
111}108}
112109
113static __inline__ __mmask8 __DEFAULT_FN_ATTRS110static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
114_kadd_mask8(__mmask8 __A, __mmask8 __B)111_kadd_mask8(__mmask8 __A, __mmask8 __B) {
115{
116 return (__mmask8)__builtin_ia32_kaddqi((__mmask8)__A, (__mmask8)__B);112 return (__mmask8)__builtin_ia32_kaddqi((__mmask8)__A, (__mmask8)__B);
117}113}
118114
119static __inline__ __mmask16 __DEFAULT_FN_ATTRS115static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
120_kadd_mask16(__mmask16 __A, __mmask16 __B)116_kadd_mask16(__mmask16 __A, __mmask16 __B) {
121{
122 return (__mmask16)__builtin_ia32_kaddhi((__mmask16)__A, (__mmask16)__B);117 return (__mmask16)__builtin_ia32_kaddhi((__mmask16)__A, (__mmask16)__B);
123}118}
124119
...@@ -128,12 +123,12 @@ _kadd_mask16(__mmask16 __A, __mmask16 __B)...@@ -128,12 +123,12 @@ _kadd_mask16(__mmask16 __A, __mmask16 __B)
128#define _kshiftri_mask8(A, I) \123#define _kshiftri_mask8(A, I) \
129 ((__mmask8)__builtin_ia32_kshiftriqi((__mmask8)(A), (unsigned int)(I)))124 ((__mmask8)__builtin_ia32_kshiftriqi((__mmask8)(A), (unsigned int)(I)))
130125
131static __inline__ unsigned int __DEFAULT_FN_ATTRS126static __inline__ unsigned int
132_cvtmask8_u32(__mmask8 __A) {127 __DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask8_u32(__mmask8 __A) {
133 return (unsigned int)__builtin_ia32_kmovb((__mmask8)__A);128 return (unsigned int)__builtin_ia32_kmovb((__mmask8)__A);
134}129}
135130
136static __inline__ __mmask8 __DEFAULT_FN_ATTRS131static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR
137_cvtu32_mask8(unsigned int __A) {132_cvtu32_mask8(unsigned int __A) {
138 return (__mmask8)__builtin_ia32_kmovb((__mmask8)__A);133 return (__mmask8)__builtin_ia32_kmovb((__mmask8)__A);
139}134}
...@@ -148,26 +143,26 @@ _store_mask8(__mmask8 *__A, __mmask8 __B) {...@@ -148,26 +143,26 @@ _store_mask8(__mmask8 *__A, __mmask8 __B) {
148 *(__mmask8 *)__A = __builtin_ia32_kmovb((__mmask8)__B);143 *(__mmask8 *)__A = __builtin_ia32_kmovb((__mmask8)__B);
149}144}
150145
151static __inline__ __m512i __DEFAULT_FN_ATTRS512146static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
152_mm512_mullo_epi64 (__m512i __A, __m512i __B) {147_mm512_mullo_epi64(__m512i __A, __m512i __B) {
153 return (__m512i) ((__v8du) __A * (__v8du) __B);148 return (__m512i) ((__v8du) __A * (__v8du) __B);
154}149}
155150
156static __inline__ __m512i __DEFAULT_FN_ATTRS512151static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
157_mm512_mask_mullo_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {152_mm512_mask_mullo_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
158 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,153 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
159 (__v8di)_mm512_mullo_epi64(__A, __B),154 (__v8di)_mm512_mullo_epi64(__A, __B),
160 (__v8di)__W);155 (__v8di)__W);
161}156}
162157
163static __inline__ __m512i __DEFAULT_FN_ATTRS512158static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
164_mm512_maskz_mullo_epi64(__mmask8 __U, __m512i __A, __m512i __B) {159_mm512_maskz_mullo_epi64(__mmask8 __U, __m512i __A, __m512i __B) {
165 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,160 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
166 (__v8di)_mm512_mullo_epi64(__A, __B),161 (__v8di)_mm512_mullo_epi64(__A, __B),
167 (__v8di)_mm512_setzero_si512());162 (__v8di)_mm512_setzero_si512());
168}163}
169164
170static __inline__ __m512d __DEFAULT_FN_ATTRS512165static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
171_mm512_xor_pd(__m512d __A, __m512d __B) {166_mm512_xor_pd(__m512d __A, __m512d __B) {
172 return (__m512d)((__v8du)__A ^ (__v8du)__B);167 return (__m512d)((__v8du)__A ^ (__v8du)__B);
173}168}
...@@ -186,7 +181,7 @@ _mm512_maskz_xor_pd(__mmask8 __U, __m512d __A, __m512d __B) {...@@ -186,7 +181,7 @@ _mm512_maskz_xor_pd(__mmask8 __U, __m512d __A, __m512d __B) {
186 (__v8df)_mm512_setzero_pd());181 (__v8df)_mm512_setzero_pd());
187}182}
188183
189static __inline__ __m512 __DEFAULT_FN_ATTRS512184static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
190_mm512_xor_ps (__m512 __A, __m512 __B) {185_mm512_xor_ps (__m512 __A, __m512 __B) {
191 return (__m512)((__v16su)__A ^ (__v16su)__B);186 return (__m512)((__v16su)__A ^ (__v16su)__B);
192}187}
...@@ -205,7 +200,7 @@ _mm512_maskz_xor_ps(__mmask16 __U, __m512 __A, __m512 __B) {...@@ -205,7 +200,7 @@ _mm512_maskz_xor_ps(__mmask16 __U, __m512 __A, __m512 __B) {
205 (__v16sf)_mm512_setzero_ps());200 (__v16sf)_mm512_setzero_ps());
206}201}
207202
208static __inline__ __m512d __DEFAULT_FN_ATTRS512203static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
209_mm512_or_pd(__m512d __A, __m512d __B) {204_mm512_or_pd(__m512d __A, __m512d __B) {
210 return (__m512d)((__v8du)__A | (__v8du)__B);205 return (__m512d)((__v8du)__A | (__v8du)__B);
211}206}
...@@ -224,7 +219,7 @@ _mm512_maskz_or_pd(__mmask8 __U, __m512d __A, __m512d __B) {...@@ -224,7 +219,7 @@ _mm512_maskz_or_pd(__mmask8 __U, __m512d __A, __m512d __B) {
224 (__v8df)_mm512_setzero_pd());219 (__v8df)_mm512_setzero_pd());
225}220}
226221
227static __inline__ __m512 __DEFAULT_FN_ATTRS512222static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
228_mm512_or_ps(__m512 __A, __m512 __B) {223_mm512_or_ps(__m512 __A, __m512 __B) {
229 return (__m512)((__v16su)__A | (__v16su)__B);224 return (__m512)((__v16su)__A | (__v16su)__B);
230}225}
...@@ -243,7 +238,7 @@ _mm512_maskz_or_ps(__mmask16 __U, __m512 __A, __m512 __B) {...@@ -243,7 +238,7 @@ _mm512_maskz_or_ps(__mmask16 __U, __m512 __A, __m512 __B) {
243 (__v16sf)_mm512_setzero_ps());238 (__v16sf)_mm512_setzero_ps());
244}239}
245240
246static __inline__ __m512d __DEFAULT_FN_ATTRS512241static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
247_mm512_and_pd(__m512d __A, __m512d __B) {242_mm512_and_pd(__m512d __A, __m512d __B) {
248 return (__m512d)((__v8du)__A & (__v8du)__B);243 return (__m512d)((__v8du)__A & (__v8du)__B);
249}244}
...@@ -262,7 +257,7 @@ _mm512_maskz_and_pd(__mmask8 __U, __m512d __A, __m512d __B) {...@@ -262,7 +257,7 @@ _mm512_maskz_and_pd(__mmask8 __U, __m512d __A, __m512d __B) {
262 (__v8df)_mm512_setzero_pd());257 (__v8df)_mm512_setzero_pd());
263}258}
264259
265static __inline__ __m512 __DEFAULT_FN_ATTRS512260static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
266_mm512_and_ps(__m512 __A, __m512 __B) {261_mm512_and_ps(__m512 __A, __m512 __B) {
267 return (__m512)((__v16su)__A & (__v16su)__B);262 return (__m512)((__v16su)__A & (__v16su)__B);
268}263}
...@@ -281,7 +276,7 @@ _mm512_maskz_and_ps(__mmask16 __U, __m512 __A, __m512 __B) {...@@ -281,7 +276,7 @@ _mm512_maskz_and_ps(__mmask16 __U, __m512 __A, __m512 __B) {
281 (__v16sf)_mm512_setzero_ps());276 (__v16sf)_mm512_setzero_ps());
282}277}
283278
284static __inline__ __m512d __DEFAULT_FN_ATTRS512279static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
285_mm512_andnot_pd(__m512d __A, __m512d __B) {280_mm512_andnot_pd(__m512d __A, __m512d __B) {
286 return (__m512d)(~(__v8du)__A & (__v8du)__B);281 return (__m512d)(~(__v8du)__A & (__v8du)__B);
287}282}
...@@ -300,7 +295,7 @@ _mm512_maskz_andnot_pd(__mmask8 __U, __m512d __A, __m512d __B) {...@@ -300,7 +295,7 @@ _mm512_maskz_andnot_pd(__mmask8 __U, __m512d __A, __m512d __B) {
300 (__v8df)_mm512_setzero_pd());295 (__v8df)_mm512_setzero_pd());
301}296}
302297
303static __inline__ __m512 __DEFAULT_FN_ATTRS512298static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
304_mm512_andnot_ps(__m512 __A, __m512 __B) {299_mm512_andnot_ps(__m512 __A, __m512 __B) {
305 return (__m512)(~(__v16su)__A & (__v16su)__B);300 return (__m512)(~(__v16su)__A & (__v16su)__B);
306}301}
...@@ -475,21 +470,20 @@ _mm512_maskz_cvtps_epu64 (__mmask8 __U, __m256 __A) {...@@ -475,21 +470,20 @@ _mm512_maskz_cvtps_epu64 (__mmask8 __U, __m256 __A) {
475 (__v8di)_mm512_setzero_si512(), \470 (__v8di)_mm512_setzero_si512(), \
476 (__mmask8)(U), (int)(R)))471 (__mmask8)(U), (int)(R)))
477472
478473static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
479static __inline__ __m512d __DEFAULT_FN_ATTRS512474_mm512_cvtepi64_pd(__m512i __A) {
480_mm512_cvtepi64_pd (__m512i __A) {
481 return (__m512d)__builtin_convertvector((__v8di)__A, __v8df);475 return (__m512d)__builtin_convertvector((__v8di)__A, __v8df);
482}476}
483477
484static __inline__ __m512d __DEFAULT_FN_ATTRS512478static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
485_mm512_mask_cvtepi64_pd (__m512d __W, __mmask8 __U, __m512i __A) {479_mm512_mask_cvtepi64_pd(__m512d __W, __mmask8 __U, __m512i __A) {
486 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,480 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
487 (__v8df)_mm512_cvtepi64_pd(__A),481 (__v8df)_mm512_cvtepi64_pd(__A),
488 (__v8df)__W);482 (__v8df)__W);
489}483}
490484
491static __inline__ __m512d __DEFAULT_FN_ATTRS512485static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
492_mm512_maskz_cvtepi64_pd (__mmask8 __U, __m512i __A) {486_mm512_maskz_cvtepi64_pd(__mmask8 __U, __m512i __A) {
493 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,487 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
494 (__v8df)_mm512_cvtepi64_pd(__A),488 (__v8df)_mm512_cvtepi64_pd(__A),
495 (__v8df)_mm512_setzero_pd());489 (__v8df)_mm512_setzero_pd());
...@@ -706,20 +700,20 @@ _mm512_maskz_cvttps_epu64 (__mmask8 __U, __m256 __A) {...@@ -706,20 +700,20 @@ _mm512_maskz_cvttps_epu64 (__mmask8 __U, __m256 __A) {
706 (__v8di)_mm512_setzero_si512(), \700 (__v8di)_mm512_setzero_si512(), \
707 (__mmask8)(U), (int)(R)))701 (__mmask8)(U), (int)(R)))
708702
709static __inline__ __m512d __DEFAULT_FN_ATTRS512703static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
710_mm512_cvtepu64_pd (__m512i __A) {704_mm512_cvtepu64_pd(__m512i __A) {
711 return (__m512d)__builtin_convertvector((__v8du)__A, __v8df);705 return (__m512d)__builtin_convertvector((__v8du)__A, __v8df);
712}706}
713707
714static __inline__ __m512d __DEFAULT_FN_ATTRS512708static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
715_mm512_mask_cvtepu64_pd (__m512d __W, __mmask8 __U, __m512i __A) {709_mm512_mask_cvtepu64_pd(__m512d __W, __mmask8 __U, __m512i __A) {
716 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,710 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
717 (__v8df)_mm512_cvtepu64_pd(__A),711 (__v8df)_mm512_cvtepu64_pd(__A),
718 (__v8df)__W);712 (__v8df)__W);
719}713}
720714
721static __inline__ __m512d __DEFAULT_FN_ATTRS512715static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
722_mm512_maskz_cvtepu64_pd (__mmask8 __U, __m512i __A) {716_mm512_maskz_cvtepu64_pd(__mmask8 __U, __m512i __A) {
723 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,717 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
724 (__v8df)_mm512_cvtepu64_pd(__A),718 (__v8df)_mm512_cvtepu64_pd(__A),
725 (__v8df)_mm512_setzero_pd());719 (__v8df)_mm512_setzero_pd());
...@@ -1052,177 +1046,154 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {...@@ -1052,177 +1046,154 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
1052 (__v2df)_mm_setzero_pd(), \1046 (__v2df)_mm_setzero_pd(), \
1053 (__mmask8)(U), (int)(C), (int)(R)))1047 (__mmask8)(U), (int)(C), (int)(R)))
10541048
1055static __inline__ __mmask16 __DEFAULT_FN_ATTRS5121049static __inline__ __mmask16
1056_mm512_movepi32_mask (__m512i __A)1050 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_movepi32_mask(__m512i __A) {
1057{
1058 return (__mmask16) __builtin_ia32_cvtd2mask512 ((__v16si) __A);1051 return (__mmask16) __builtin_ia32_cvtd2mask512 ((__v16si) __A);
1059}1052}
10601053
1061static __inline__ __m512i __DEFAULT_FN_ATTRS5121054static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1062_mm512_movm_epi32 (__mmask16 __A)1055_mm512_movm_epi32(__mmask16 __A) {
1063{
1064 return (__m512i) __builtin_ia32_cvtmask2d512 (__A);1056 return (__m512i) __builtin_ia32_cvtmask2d512 (__A);
1065}1057}
10661058
1067static __inline__ __m512i __DEFAULT_FN_ATTRS5121059static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1068_mm512_movm_epi64 (__mmask8 __A)1060_mm512_movm_epi64(__mmask8 __A) {
1069{
1070 return (__m512i) __builtin_ia32_cvtmask2q512 (__A);1061 return (__m512i) __builtin_ia32_cvtmask2q512 (__A);
1071}1062}
10721063
1073static __inline__ __mmask8 __DEFAULT_FN_ATTRS5121064static __inline__ __mmask8 __DEFAULT_FN_ATTRS512_CONSTEXPR
1074_mm512_movepi64_mask (__m512i __A)1065_mm512_movepi64_mask(__m512i __A) {
1075{
1076 return (__mmask8) __builtin_ia32_cvtq2mask512 ((__v8di) __A);1066 return (__mmask8) __builtin_ia32_cvtq2mask512 ((__v8di) __A);
1077}1067}
10781068
10791069static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1080static __inline__ __m512 __DEFAULT_FN_ATTRS5121070_mm512_broadcast_f32x2(__m128 __A) {
1081_mm512_broadcast_f32x2 (__m128 __A)
1082{
1083 return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,1071 return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,
1084 0, 1, 0, 1, 0, 1, 0, 1,1072 0, 1, 0, 1, 0, 1, 0, 1,
1085 0, 1, 0, 1, 0, 1, 0, 1);1073 0, 1, 0, 1, 0, 1, 0, 1);
1086}1074}
10871075
1088static __inline__ __m512 __DEFAULT_FN_ATTRS5121076static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1089_mm512_mask_broadcast_f32x2 (__m512 __O, __mmask16 __M, __m128 __A)1077_mm512_mask_broadcast_f32x2(__m512 __O, __mmask16 __M, __m128 __A) {
1090{
1091 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,1078 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
1092 (__v16sf)_mm512_broadcast_f32x2(__A),1079 (__v16sf)_mm512_broadcast_f32x2(__A),
1093 (__v16sf)__O);1080 (__v16sf)__O);
1094}1081}
10951082
1096static __inline__ __m512 __DEFAULT_FN_ATTRS5121083static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1097_mm512_maskz_broadcast_f32x2 (__mmask16 __M, __m128 __A)1084_mm512_maskz_broadcast_f32x2(__mmask16 __M, __m128 __A) {
1098{
1099 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,1085 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
1100 (__v16sf)_mm512_broadcast_f32x2(__A),1086 (__v16sf)_mm512_broadcast_f32x2(__A),
1101 (__v16sf)_mm512_setzero_ps());1087 (__v16sf)_mm512_setzero_ps());
1102}1088}
11031089
1104static __inline__ __m512 __DEFAULT_FN_ATTRS5121090static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1105_mm512_broadcast_f32x8(__m256 __A)1091_mm512_broadcast_f32x8(__m256 __A) {
1106{
1107 return (__m512)__builtin_shufflevector((__v8sf)__A, (__v8sf)__A,1092 return (__m512)__builtin_shufflevector((__v8sf)__A, (__v8sf)__A,
1108 0, 1, 2, 3, 4, 5, 6, 7,1093 0, 1, 2, 3, 4, 5, 6, 7,
1109 0, 1, 2, 3, 4, 5, 6, 7);1094 0, 1, 2, 3, 4, 5, 6, 7);
1110}1095}
11111096
1112static __inline__ __m512 __DEFAULT_FN_ATTRS5121097static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1113_mm512_mask_broadcast_f32x8(__m512 __O, __mmask16 __M, __m256 __A)1098_mm512_mask_broadcast_f32x8(__m512 __O, __mmask16 __M, __m256 __A) {
1114{
1115 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,1099 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
1116 (__v16sf)_mm512_broadcast_f32x8(__A),1100 (__v16sf)_mm512_broadcast_f32x8(__A),
1117 (__v16sf)__O);1101 (__v16sf)__O);
1118}1102}
11191103
1120static __inline__ __m512 __DEFAULT_FN_ATTRS5121104static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1121_mm512_maskz_broadcast_f32x8(__mmask16 __M, __m256 __A)1105_mm512_maskz_broadcast_f32x8(__mmask16 __M, __m256 __A) {
1122{
1123 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,1106 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
1124 (__v16sf)_mm512_broadcast_f32x8(__A),1107 (__v16sf)_mm512_broadcast_f32x8(__A),
1125 (__v16sf)_mm512_setzero_ps());1108 (__v16sf)_mm512_setzero_ps());
1126}1109}
11271110
1128static __inline__ __m512d __DEFAULT_FN_ATTRS5121111static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
1129_mm512_broadcast_f64x2(__m128d __A)1112_mm512_broadcast_f64x2(__m128d __A) {
1130{
1131 return (__m512d)__builtin_shufflevector((__v2df)__A, (__v2df)__A,1113 return (__m512d)__builtin_shufflevector((__v2df)__A, (__v2df)__A,
1132 0, 1, 0, 1, 0, 1, 0, 1);1114 0, 1, 0, 1, 0, 1, 0, 1);
1133}1115}
11341116
1135static __inline__ __m512d __DEFAULT_FN_ATTRS5121117static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
1136_mm512_mask_broadcast_f64x2(__m512d __O, __mmask8 __M, __m128d __A)1118_mm512_mask_broadcast_f64x2(__m512d __O, __mmask8 __M, __m128d __A) {
1137{
1138 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M,1119 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M,
1139 (__v8df)_mm512_broadcast_f64x2(__A),1120 (__v8df)_mm512_broadcast_f64x2(__A),
1140 (__v8df)__O);1121 (__v8df)__O);
1141}1122}
11421123
1143static __inline__ __m512d __DEFAULT_FN_ATTRS5121124static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
1144_mm512_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A)1125_mm512_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A) {
1145{
1146 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M,1126 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M,
1147 (__v8df)_mm512_broadcast_f64x2(__A),1127 (__v8df)_mm512_broadcast_f64x2(__A),
1148 (__v8df)_mm512_setzero_pd());1128 (__v8df)_mm512_setzero_pd());
1149}1129}
11501130
1151static __inline__ __m512i __DEFAULT_FN_ATTRS5121131static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1152_mm512_broadcast_i32x2 (__m128i __A)1132_mm512_broadcast_i32x2(__m128i __A) {
1153{
1154 return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,1133 return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,
1155 0, 1, 0, 1, 0, 1, 0, 1,1134 0, 1, 0, 1, 0, 1, 0, 1,
1156 0, 1, 0, 1, 0, 1, 0, 1);1135 0, 1, 0, 1, 0, 1, 0, 1);
1157}1136}
11581137
1159static __inline__ __m512i __DEFAULT_FN_ATTRS5121138static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1160_mm512_mask_broadcast_i32x2 (__m512i __O, __mmask16 __M, __m128i __A)1139_mm512_mask_broadcast_i32x2(__m512i __O, __mmask16 __M, __m128i __A) {
1161{
1162 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1140 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1163 (__v16si)_mm512_broadcast_i32x2(__A),1141 (__v16si)_mm512_broadcast_i32x2(__A),
1164 (__v16si)__O);1142 (__v16si)__O);
1165}1143}
11661144
1167static __inline__ __m512i __DEFAULT_FN_ATTRS5121145static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1168_mm512_maskz_broadcast_i32x2 (__mmask16 __M, __m128i __A)1146_mm512_maskz_broadcast_i32x2(__mmask16 __M, __m128i __A) {
1169{
1170 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1147 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1171 (__v16si)_mm512_broadcast_i32x2(__A),1148 (__v16si)_mm512_broadcast_i32x2(__A),
1172 (__v16si)_mm512_setzero_si512());1149 (__v16si)_mm512_setzero_si512());
1173}1150}
11741151
1175static __inline__ __m512i __DEFAULT_FN_ATTRS5121152static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1176_mm512_broadcast_i32x8(__m256i __A)1153_mm512_broadcast_i32x8(__m256i __A) {
1177{
1178 return (__m512i)__builtin_shufflevector((__v8si)__A, (__v8si)__A,1154 return (__m512i)__builtin_shufflevector((__v8si)__A, (__v8si)__A,
1179 0, 1, 2, 3, 4, 5, 6, 7,1155 0, 1, 2, 3, 4, 5, 6, 7,
1180 0, 1, 2, 3, 4, 5, 6, 7);1156 0, 1, 2, 3, 4, 5, 6, 7);
1181}1157}
11821158
1183static __inline__ __m512i __DEFAULT_FN_ATTRS5121159static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1184_mm512_mask_broadcast_i32x8(__m512i __O, __mmask16 __M, __m256i __A)1160_mm512_mask_broadcast_i32x8(__m512i __O, __mmask16 __M, __m256i __A) {
1185{
1186 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1161 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1187 (__v16si)_mm512_broadcast_i32x8(__A),1162 (__v16si)_mm512_broadcast_i32x8(__A),
1188 (__v16si)__O);1163 (__v16si)__O);
1189}1164}
11901165
1191static __inline__ __m512i __DEFAULT_FN_ATTRS5121166static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1192_mm512_maskz_broadcast_i32x8(__mmask16 __M, __m256i __A)1167_mm512_maskz_broadcast_i32x8(__mmask16 __M, __m256i __A) {
1193{
1194 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1168 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1195 (__v16si)_mm512_broadcast_i32x8(__A),1169 (__v16si)_mm512_broadcast_i32x8(__A),
1196 (__v16si)_mm512_setzero_si512());1170 (__v16si)_mm512_setzero_si512());
1197}1171}
11981172
1199static __inline__ __m512i __DEFAULT_FN_ATTRS5121173static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1200_mm512_broadcast_i64x2(__m128i __A)1174_mm512_broadcast_i64x2(__m128i __A) {
1201{
1202 return (__m512i)__builtin_shufflevector((__v2di)__A, (__v2di)__A,1175 return (__m512i)__builtin_shufflevector((__v2di)__A, (__v2di)__A,
1203 0, 1, 0, 1, 0, 1, 0, 1);1176 0, 1, 0, 1, 0, 1, 0, 1);
1204}1177}
12051178
1206static __inline__ __m512i __DEFAULT_FN_ATTRS5121179static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1207_mm512_mask_broadcast_i64x2(__m512i __O, __mmask8 __M, __m128i __A)1180_mm512_mask_broadcast_i64x2(__m512i __O, __mmask8 __M, __m128i __A) {
1208{
1209 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1181 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1210 (__v8di)_mm512_broadcast_i64x2(__A),1182 (__v8di)_mm512_broadcast_i64x2(__A),
1211 (__v8di)__O);1183 (__v8di)__O);
1212}1184}
12131185
1214static __inline__ __m512i __DEFAULT_FN_ATTRS5121186static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1215_mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)1187_mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) {
1216{
1217 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1188 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1218 (__v8di)_mm512_broadcast_i64x2(__A),1189 (__v8di)_mm512_broadcast_i64x2(__A),
1219 (__v8di)_mm512_setzero_si512());1190 (__v8di)_mm512_setzero_si512());
1220}1191}
12211192
1222#define _mm512_extractf32x8_ps(A, imm) \1193#define _mm512_extractf32x8_ps(A, imm) \
1223 ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \1194 ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \
1224 (__v8sf)_mm256_undefined_ps(), \1195 (__v8sf)_mm256_setzero_ps(), \
1225 (__mmask8)-1))1196 (__mmask8) - 1))
12261197
1227#define _mm512_mask_extractf32x8_ps(W, U, A, imm) \1198#define _mm512_mask_extractf32x8_ps(W, U, A, imm) \
1228 ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \1199 ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \
...@@ -1234,11 +1205,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)...@@ -1234,11 +1205,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)
1234 (__v8sf)_mm256_setzero_ps(), \1205 (__v8sf)_mm256_setzero_ps(), \
1235 (__mmask8)(U)))1206 (__mmask8)(U)))
12361207
1237#define _mm512_extractf64x2_pd(A, imm) \1208#define _mm512_extractf64x2_pd(A, imm) \
1238 ((__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \1209 ((__m128d)__builtin_ia32_extractf64x2_512_mask( \
1239 (int)(imm), \1210 (__v8df)(__m512d)(A), (int)(imm), (__v2df)_mm_setzero_pd(), \
1240 (__v2df)_mm_undefined_pd(), \1211 (__mmask8) - 1))
1241 (__mmask8)-1))
12421212
1243#define _mm512_mask_extractf64x2_pd(W, U, A, imm) \1213#define _mm512_mask_extractf64x2_pd(W, U, A, imm) \
1244 ((__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \1214 ((__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \
...@@ -1252,10 +1222,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)...@@ -1252,10 +1222,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)
1252 (__v2df)_mm_setzero_pd(), \1222 (__v2df)_mm_setzero_pd(), \
1253 (__mmask8)(U)))1223 (__mmask8)(U)))
12541224
1255#define _mm512_extracti32x8_epi32(A, imm) \1225#define _mm512_extracti32x8_epi32(A, imm) \
1256 ((__m256i)__builtin_ia32_extracti32x8_mask((__v16si)(__m512i)(A), (int)(imm), \1226 ((__m256i)__builtin_ia32_extracti32x8_mask( \
1257 (__v8si)_mm256_undefined_si256(), \1227 (__v16si)(__m512i)(A), (int)(imm), (__v8si)_mm256_setzero_si256(), \
1258 (__mmask8)-1))1228 (__mmask8) - 1))
12591229
1260#define _mm512_mask_extracti32x8_epi32(W, U, A, imm) \1230#define _mm512_mask_extracti32x8_epi32(W, U, A, imm) \
1261 ((__m256i)__builtin_ia32_extracti32x8_mask((__v16si)(__m512i)(A), (int)(imm), \1231 ((__m256i)__builtin_ia32_extracti32x8_mask((__v16si)(__m512i)(A), (int)(imm), \
...@@ -1267,11 +1237,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)...@@ -1267,11 +1237,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)
1267 (__v8si)_mm256_setzero_si256(), \1237 (__v8si)_mm256_setzero_si256(), \
1268 (__mmask8)(U)))1238 (__mmask8)(U)))
12691239
1270#define _mm512_extracti64x2_epi64(A, imm) \1240#define _mm512_extracti64x2_epi64(A, imm) \
1271 ((__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \1241 ((__m128i)__builtin_ia32_extracti64x2_512_mask( \
1272 (int)(imm), \1242 (__v8di)(__m512i)(A), (int)(imm), (__v2di)_mm_setzero_si128(), \
1273 (__v2di)_mm_undefined_si128(), \1243 (__mmask8) - 1))
1274 (__mmask8)-1))
12751244
1276#define _mm512_mask_extracti64x2_epi64(W, U, A, imm) \1245#define _mm512_mask_extracti64x2_epi64(W, U, A, imm) \
1277 ((__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \1246 ((__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \
...@@ -1375,5 +1344,7 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)...@@ -1375,5 +1344,7 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)
13751344
1376#undef __DEFAULT_FN_ATTRS5121345#undef __DEFAULT_FN_ATTRS512
1377#undef __DEFAULT_FN_ATTRS1346#undef __DEFAULT_FN_ATTRS
1347#undef __DEFAULT_FN_ATTRS512_CONSTEXPR
1348#undef __DEFAULT_FN_ATTRS_CONSTEXPR
13781349
1379#endif1350#endif
lib/include/avx512fintrin.h+1015-1424
...@@ -167,22 +167,23 @@ typedef enum...@@ -167,22 +167,23 @@ typedef enum
167} _MM_MANTISSA_SIGN_ENUM;167} _MM_MANTISSA_SIGN_ENUM;
168168
169/* Define the default attributes for the functions in this file. */169/* Define the default attributes for the functions in this file. */
170#define __DEFAULT_FN_ATTRS512 __attribute__((__always_inline__, __nodebug__, __target__("avx512f,evex512"), __min_vector_width__(512)))170#define __DEFAULT_FN_ATTRS512 \
171 __attribute__((__always_inline__, __nodebug__, __target__("avx512f"), \
172 __min_vector_width__(512)))
171#define __DEFAULT_FN_ATTRS128 \173#define __DEFAULT_FN_ATTRS128 \
172 __attribute__((__always_inline__, __nodebug__, \174 __attribute__((__always_inline__, __nodebug__, __target__("avx512f"), \
173 __target__("avx512f,no-evex512"), __min_vector_width__(128)))175 __min_vector_width__(128)))
174#define __DEFAULT_FN_ATTRS \176#define __DEFAULT_FN_ATTRS \
175 __attribute__((__always_inline__, __nodebug__, \177 __attribute__((__always_inline__, __nodebug__, __target__("avx512f")))
176 __target__("avx512f,no-evex512")))
177178
178#if defined(__cplusplus) && (__cplusplus >= 201103L)179#if defined(__cplusplus) && (__cplusplus >= 201103L)
179#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr180#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
180#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr181#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr
181#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr182#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
182#else183#else
183#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS128184#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
184#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512185#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512
185#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS186#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
186#endif187#endif
187188
188/* Create vectors with repeated elements */189/* Create vectors with repeated elements */
...@@ -206,9 +207,7 @@ _mm512_undefined(void)...@@ -206,9 +207,7 @@ _mm512_undefined(void)
206 return (__m512)__builtin_ia32_undef512();207 return (__m512)__builtin_ia32_undef512();
207}208}
208209
209static __inline__ __m512 __DEFAULT_FN_ATTRS512210static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_undefined_ps(void) {
210_mm512_undefined_ps(void)
211{
212 return (__m512)__builtin_ia32_undef512();211 return (__m512)__builtin_ia32_undef512();
213}212}
214213
...@@ -218,48 +217,40 @@ _mm512_undefined_epi32(void)...@@ -218,48 +217,40 @@ _mm512_undefined_epi32(void)
218 return (__m512i)__builtin_ia32_undef512();217 return (__m512i)__builtin_ia32_undef512();
219}218}
220219
221static __inline__ __m512i __DEFAULT_FN_ATTRS512220static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
222_mm512_broadcastd_epi32 (__m128i __A)221_mm512_broadcastd_epi32(__m128i __A) {
223{
224 return (__m512i)__builtin_shufflevector((__v4si) __A, (__v4si) __A,222 return (__m512i)__builtin_shufflevector((__v4si) __A, (__v4si) __A,
225 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);223 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
226}224}
227225
228static __inline__ __m512i __DEFAULT_FN_ATTRS512226static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
229_mm512_mask_broadcastd_epi32 (__m512i __O, __mmask16 __M, __m128i __A)227_mm512_mask_broadcastd_epi32(__m512i __O, __mmask16 __M, __m128i __A) {
230{
231 return (__m512i)__builtin_ia32_selectd_512(__M,228 return (__m512i)__builtin_ia32_selectd_512(__M,
232 (__v16si) _mm512_broadcastd_epi32(__A),229 (__v16si) _mm512_broadcastd_epi32(__A),
233 (__v16si) __O);230 (__v16si) __O);
234}231}
235232
236static __inline__ __m512i __DEFAULT_FN_ATTRS512233static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
237_mm512_maskz_broadcastd_epi32 (__mmask16 __M, __m128i __A)234_mm512_maskz_broadcastd_epi32(__mmask16 __M, __m128i __A) {
238{
239 return (__m512i)__builtin_ia32_selectd_512(__M,235 return (__m512i)__builtin_ia32_selectd_512(__M,
240 (__v16si) _mm512_broadcastd_epi32(__A),236 (__v16si) _mm512_broadcastd_epi32(__A),
241 (__v16si) _mm512_setzero_si512());237 (__v16si) _mm512_setzero_si512());
242}238}
243239
244static __inline__ __m512i __DEFAULT_FN_ATTRS512240static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
245_mm512_broadcastq_epi64 (__m128i __A)241_mm512_broadcastq_epi64(__m128i __A) {
246{
247 return (__m512i)__builtin_shufflevector((__v2di) __A, (__v2di) __A,242 return (__m512i)__builtin_shufflevector((__v2di) __A, (__v2di) __A,
248 0, 0, 0, 0, 0, 0, 0, 0);243 0, 0, 0, 0, 0, 0, 0, 0);
249}244}
250245
251static __inline__ __m512i __DEFAULT_FN_ATTRS512246static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
252_mm512_mask_broadcastq_epi64 (__m512i __O, __mmask8 __M, __m128i __A)247_mm512_mask_broadcastq_epi64(__m512i __O, __mmask8 __M, __m128i __A) {
253{248 return (__m512i)__builtin_ia32_selectq_512(
254 return (__m512i)__builtin_ia32_selectq_512(__M,249 __M, (__v8di)_mm512_broadcastq_epi64(__A), (__v8di)__O);
255 (__v8di) _mm512_broadcastq_epi64(__A),
256 (__v8di) __O);
257
258}250}
259251
260static __inline__ __m512i __DEFAULT_FN_ATTRS512252static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
261_mm512_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A)253_mm512_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) {
262{
263 return (__m512i)__builtin_ia32_selectq_512(__M,254 return (__m512i)__builtin_ia32_selectq_512(__M,
264 (__v8di) _mm512_broadcastq_epi64(__A),255 (__v8di) _mm512_broadcastq_epi64(__A),
265 (__v8di) _mm512_setzero_si512());256 (__v8di) _mm512_setzero_si512());
...@@ -277,20 +268,20 @@ _mm512_setzero_pd(void) {...@@ -277,20 +268,20 @@ _mm512_setzero_pd(void) {
277 return __extension__(__m512d){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};268 return __extension__(__m512d){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};
278}269}
279270
280static __inline __m512 __DEFAULT_FN_ATTRS512271static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
281_mm512_set1_ps(float __w)272_mm512_set1_ps(float __w)
282{273{
283 return __extension__ (__m512){ __w, __w, __w, __w, __w, __w, __w, __w,274 return __extension__ (__m512){ __w, __w, __w, __w, __w, __w, __w, __w,
284 __w, __w, __w, __w, __w, __w, __w, __w };275 __w, __w, __w, __w, __w, __w, __w, __w };
285}276}
286277
287static __inline __m512d __DEFAULT_FN_ATTRS512278static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
288_mm512_set1_pd(double __w)279_mm512_set1_pd(double __w)
289{280{
290 return __extension__ (__m512d){ __w, __w, __w, __w, __w, __w, __w, __w };281 return __extension__ (__m512d){ __w, __w, __w, __w, __w, __w, __w, __w };
291}282}
292283
293static __inline __m512i __DEFAULT_FN_ATTRS512284static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
294_mm512_set1_epi8(char __w)285_mm512_set1_epi8(char __w)
295{286{
296 return __extension__ (__m512i)(__v64qi){287 return __extension__ (__m512i)(__v64qi){
...@@ -304,7 +295,7 @@ _mm512_set1_epi8(char __w)...@@ -304,7 +295,7 @@ _mm512_set1_epi8(char __w)
304 __w, __w, __w, __w, __w, __w, __w, __w };295 __w, __w, __w, __w, __w, __w, __w, __w };
305}296}
306297
307static __inline __m512i __DEFAULT_FN_ATTRS512298static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
308_mm512_set1_epi16(short __w)299_mm512_set1_epi16(short __w)
309{300{
310 return __extension__ (__m512i)(__v32hi){301 return __extension__ (__m512i)(__v32hi){
...@@ -314,7 +305,7 @@ _mm512_set1_epi16(short __w)...@@ -314,7 +305,7 @@ _mm512_set1_epi16(short __w)
314 __w, __w, __w, __w, __w, __w, __w, __w };305 __w, __w, __w, __w, __w, __w, __w, __w };
315}306}
316307
317static __inline __m512i __DEFAULT_FN_ATTRS512308static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
318_mm512_set1_epi32(int __s)309_mm512_set1_epi32(int __s)
319{310{
320 return __extension__ (__m512i)(__v16si){311 return __extension__ (__m512i)(__v16si){
...@@ -322,81 +313,80 @@ _mm512_set1_epi32(int __s)...@@ -322,81 +313,80 @@ _mm512_set1_epi32(int __s)
322 __s, __s, __s, __s, __s, __s, __s, __s };313 __s, __s, __s, __s, __s, __s, __s, __s };
323}314}
324315
325static __inline __m512i __DEFAULT_FN_ATTRS512316static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
326_mm512_maskz_set1_epi32(__mmask16 __M, int __A)317_mm512_maskz_set1_epi32(__mmask16 __M, int __A) {
327{
328 return (__m512i)__builtin_ia32_selectd_512(__M,318 return (__m512i)__builtin_ia32_selectd_512(__M,
329 (__v16si)_mm512_set1_epi32(__A),319 (__v16si)_mm512_set1_epi32(__A),
330 (__v16si)_mm512_setzero_si512());320 (__v16si)_mm512_setzero_si512());
331}321}
332322
333static __inline __m512i __DEFAULT_FN_ATTRS512323static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
334_mm512_set1_epi64(long long __d)324_mm512_set1_epi64(long long __d)
335{325{
336 return __extension__(__m512i)(__v8di){ __d, __d, __d, __d, __d, __d, __d, __d };326 return __extension__(__m512i)(__v8di){ __d, __d, __d, __d, __d, __d, __d, __d };
337}327}
338328
339static __inline __m512i __DEFAULT_FN_ATTRS512329static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
340_mm512_maskz_set1_epi64(__mmask8 __M, long long __A)330_mm512_maskz_set1_epi64(__mmask8 __M, long long __A) {
341{
342 return (__m512i)__builtin_ia32_selectq_512(__M,331 return (__m512i)__builtin_ia32_selectq_512(__M,
343 (__v8di)_mm512_set1_epi64(__A),332 (__v8di)_mm512_set1_epi64(__A),
344 (__v8di)_mm512_setzero_si512());333 (__v8di)_mm512_setzero_si512());
345}334}
346335
347static __inline__ __m512 __DEFAULT_FN_ATTRS512336static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
348_mm512_broadcastss_ps(__m128 __A)337_mm512_broadcastss_ps(__m128 __A) {
349{
350 return (__m512)__builtin_shufflevector((__v4sf) __A, (__v4sf) __A,338 return (__m512)__builtin_shufflevector((__v4sf) __A, (__v4sf) __A,
351 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);339 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
352}340}
353341
354static __inline __m512i __DEFAULT_FN_ATTRS512342static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
355_mm512_set4_epi32 (int __A, int __B, int __C, int __D)343_mm512_set4_epi32(int __A, int __B, int __C, int __D) {
356{
357 return __extension__ (__m512i)(__v16si)344 return __extension__ (__m512i)(__v16si)
358 { __D, __C, __B, __A, __D, __C, __B, __A,345 { __D, __C, __B, __A, __D, __C, __B, __A,
359 __D, __C, __B, __A, __D, __C, __B, __A };346 __D, __C, __B, __A, __D, __C, __B, __A };
360}347}
361348
362static __inline __m512i __DEFAULT_FN_ATTRS512349static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
363_mm512_set4_epi64 (long long __A, long long __B, long long __C,350_mm512_set4_epi64(long long __A, long long __B, long long __C, long long __D) {
364 long long __D)
365{
366 return __extension__ (__m512i) (__v8di)351 return __extension__ (__m512i) (__v8di)
367 { __D, __C, __B, __A, __D, __C, __B, __A };352 { __D, __C, __B, __A, __D, __C, __B, __A };
368}353}
369354
370static __inline __m512d __DEFAULT_FN_ATTRS512355static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
371_mm512_set4_pd (double __A, double __B, double __C, double __D)356_mm512_set4_pd(double __A, double __B, double __C, double __D) {
372{
373 return __extension__ (__m512d)357 return __extension__ (__m512d)
374 { __D, __C, __B, __A, __D, __C, __B, __A };358 { __D, __C, __B, __A, __D, __C, __B, __A };
375}359}
376360
377static __inline __m512 __DEFAULT_FN_ATTRS512361static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
378_mm512_set4_ps (float __A, float __B, float __C, float __D)362_mm512_set4_ps(float __A, float __B, float __C, float __D) {
379{
380 return __extension__ (__m512)363 return __extension__ (__m512)
381 { __D, __C, __B, __A, __D, __C, __B, __A,364 { __D, __C, __B, __A, __D, __C, __B, __A,
382 __D, __C, __B, __A, __D, __C, __B, __A };365 __D, __C, __B, __A, __D, __C, __B, __A };
383}366}
384367
385#define _mm512_setr4_epi32(e0,e1,e2,e3) \368static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
386 _mm512_set4_epi32((e3),(e2),(e1),(e0))369_mm512_setr4_epi32(int e0, int e1, int e2, int e3) {
370 return _mm512_set4_epi32(e3, e2, e1, e0);
371}
387372
388#define _mm512_setr4_epi64(e0,e1,e2,e3) \373static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
389 _mm512_set4_epi64((e3),(e2),(e1),(e0))374_mm512_setr4_epi64(long long e0, long long e1, long long e2, long long e3) {
375 return _mm512_set4_epi64(e3, e2, e1, e0);
376}
390377
391#define _mm512_setr4_pd(e0,e1,e2,e3) \378static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
392 _mm512_set4_pd((e3),(e2),(e1),(e0))379_mm512_setr4_pd(double e0, double e1, double e2, double e3) {
380 return _mm512_set4_pd(e3, e2, e1, e0);
381}
393382
394#define _mm512_setr4_ps(e0,e1,e2,e3) \383static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
395 _mm512_set4_ps((e3),(e2),(e1),(e0))384_mm512_setr4_ps(float e0, float e1, float e2, float e3) {
385 return _mm512_set4_ps(e3, e2, e1, e0);
386}
396387
397static __inline__ __m512d __DEFAULT_FN_ATTRS512388static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
398_mm512_broadcastsd_pd(__m128d __A)389_mm512_broadcastsd_pd(__m128d __A) {
399{
400 return (__m512d)__builtin_shufflevector((__v2df) __A, (__v2df) __A,390 return (__m512d)__builtin_shufflevector((__v2df) __A, (__v2df) __A,
401 0, 0, 0, 0, 0, 0, 0, 0);391 0, 0, 0, 0, 0, 0, 0, 0);
402}392}
...@@ -417,37 +407,36 @@ _mm512_castps256_ps512(__m256 __a)...@@ -417,37 +407,36 @@ _mm512_castps256_ps512(__m256 __a)
417 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);407 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
418}408}
419409
420static __inline __m128d __DEFAULT_FN_ATTRS512410static __inline __m128d __DEFAULT_FN_ATTRS512_CONSTEXPR
421_mm512_castpd512_pd128(__m512d __a)411_mm512_castpd512_pd128(__m512d __a)
422{412{
423 return __builtin_shufflevector(__a, __a, 0, 1);413 return __builtin_shufflevector(__a, __a, 0, 1);
424}414}
425415
426static __inline __m256d __DEFAULT_FN_ATTRS512416static __inline __m256d __DEFAULT_FN_ATTRS512_CONSTEXPR
427_mm512_castpd512_pd256 (__m512d __A)417_mm512_castpd512_pd256 (__m512d __A)
428{418{
429 return __builtin_shufflevector(__A, __A, 0, 1, 2, 3);419 return __builtin_shufflevector(__A, __A, 0, 1, 2, 3);
430}420}
431421
432static __inline __m128 __DEFAULT_FN_ATTRS512422static __inline __m128 __DEFAULT_FN_ATTRS512_CONSTEXPR
433_mm512_castps512_ps128(__m512 __a)423_mm512_castps512_ps128(__m512 __a)
434{424{
435 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3);425 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3);
436}426}
437427
438static __inline __m256 __DEFAULT_FN_ATTRS512428static __inline __m256 __DEFAULT_FN_ATTRS512_CONSTEXPR
439_mm512_castps512_ps256 (__m512 __A)429_mm512_castps512_ps256(__m512 __A) {
440{
441 return __builtin_shufflevector(__A, __A, 0, 1, 2, 3, 4, 5, 6, 7);430 return __builtin_shufflevector(__A, __A, 0, 1, 2, 3, 4, 5, 6, 7);
442}431}
443432
444static __inline __m512 __DEFAULT_FN_ATTRS512433static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
445_mm512_castpd_ps (__m512d __A)434_mm512_castpd_ps (__m512d __A)
446{435{
447 return (__m512) (__A);436 return (__m512) (__A);
448}437}
449438
450static __inline __m512i __DEFAULT_FN_ATTRS512439static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
451_mm512_castpd_si512 (__m512d __A)440_mm512_castpd_si512 (__m512d __A)
452{441{
453 return (__m512i) (__A);442 return (__m512i) (__A);
...@@ -462,13 +451,13 @@ _mm512_castpd128_pd512 (__m128d __A)...@@ -462,13 +451,13 @@ _mm512_castpd128_pd512 (__m128d __A)
462 __B, 0, 1, 2, 3, 4, 5, 6, 7);451 __B, 0, 1, 2, 3, 4, 5, 6, 7);
463}452}
464453
465static __inline __m512d __DEFAULT_FN_ATTRS512454static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
466_mm512_castps_pd (__m512 __A)455_mm512_castps_pd (__m512 __A)
467{456{
468 return (__m512d) (__A);457 return (__m512d) (__A);
469}458}
470459
471static __inline __m512i __DEFAULT_FN_ATTRS512460static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
472_mm512_castps_si512 (__m512 __A)461_mm512_castps_si512 (__m512 __A)
473{462{
474 return (__m512i) (__A);463 return (__m512i) (__A);
...@@ -498,39 +487,36 @@ _mm512_castsi256_si512 (__m256i __A)...@@ -498,39 +487,36 @@ _mm512_castsi256_si512 (__m256i __A)
498 return __builtin_shufflevector( __A, __builtin_nondeterministic_value(__A), 0, 1, 2, 3, 4, 5, 6, 7);487 return __builtin_shufflevector( __A, __builtin_nondeterministic_value(__A), 0, 1, 2, 3, 4, 5, 6, 7);
499}488}
500489
501static __inline __m512 __DEFAULT_FN_ATTRS512490static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
502_mm512_castsi512_ps (__m512i __A)491_mm512_castsi512_ps (__m512i __A)
503{492{
504 return (__m512) (__A);493 return (__m512) (__A);
505}494}
506495
507static __inline __m512d __DEFAULT_FN_ATTRS512496static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
508_mm512_castsi512_pd (__m512i __A)497_mm512_castsi512_pd (__m512i __A)
509{498{
510 return (__m512d) (__A);499 return (__m512d) (__A);
511}500}
512501
513static __inline __m128i __DEFAULT_FN_ATTRS512502static __inline __m128i __DEFAULT_FN_ATTRS512_CONSTEXPR
514_mm512_castsi512_si128 (__m512i __A)503_mm512_castsi512_si128 (__m512i __A)
515{504{
516 return (__m128i)__builtin_shufflevector(__A, __A , 0, 1);505 return (__m128i)__builtin_shufflevector(__A, __A , 0, 1);
517}506}
518507
519static __inline __m256i __DEFAULT_FN_ATTRS512508static __inline __m256i __DEFAULT_FN_ATTRS512_CONSTEXPR
520_mm512_castsi512_si256 (__m512i __A)509_mm512_castsi512_si256(__m512i __A) {
521{
522 return (__m256i)__builtin_shufflevector(__A, __A , 0, 1, 2, 3);510 return (__m256i)__builtin_shufflevector(__A, __A , 0, 1, 2, 3);
523}511}
524512
525static __inline__ __mmask16 __DEFAULT_FN_ATTRS513static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
526_mm512_int2mask(int __a)514_mm512_int2mask(int __a) {
527{
528 return (__mmask16)__a;515 return (__mmask16)__a;
529}516}
530517
531static __inline__ int __DEFAULT_FN_ATTRS518static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
532_mm512_mask2int(__mmask16 __a)519_mm512_mask2int(__mmask16 __a) {
533{
534 return (int)__a;520 return (int)__a;
535}521}
536522
...@@ -547,9 +533,8 @@ _mm512_mask2int(__mmask16 __a)...@@ -547,9 +533,8 @@ _mm512_mask2int(__mmask16 __a)
547/// A 128-bit vector of [2 x double].533/// A 128-bit vector of [2 x double].
548/// \returns A 512-bit floating-point vector of [8 x double]. The lower 128 bits534/// \returns A 512-bit floating-point vector of [8 x double]. The lower 128 bits
549/// contain the value of the parameter. The upper 384 bits are set to zero.535/// contain the value of the parameter. The upper 384 bits are set to zero.
550static __inline __m512d __DEFAULT_FN_ATTRS512536static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
551_mm512_zextpd128_pd512(__m128d __a)537_mm512_zextpd128_pd512(__m128d __a) {
552{
553 return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3, 2, 3, 2, 3);538 return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3, 2, 3, 2, 3);
554}539}
555540
...@@ -566,9 +551,8 @@ _mm512_zextpd128_pd512(__m128d __a)...@@ -566,9 +551,8 @@ _mm512_zextpd128_pd512(__m128d __a)
566/// A 256-bit vector of [4 x double].551/// A 256-bit vector of [4 x double].
567/// \returns A 512-bit floating-point vector of [8 x double]. The lower 256 bits552/// \returns A 512-bit floating-point vector of [8 x double]. The lower 256 bits
568/// contain the value of the parameter. The upper 256 bits are set to zero.553/// contain the value of the parameter. The upper 256 bits are set to zero.
569static __inline __m512d __DEFAULT_FN_ATTRS512554static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
570_mm512_zextpd256_pd512(__m256d __a)555_mm512_zextpd256_pd512(__m256d __a) {
571{
572 return __builtin_shufflevector((__v4df)__a, (__v4df)_mm256_setzero_pd(), 0, 1, 2, 3, 4, 5, 6, 7);556 return __builtin_shufflevector((__v4df)__a, (__v4df)_mm256_setzero_pd(), 0, 1, 2, 3, 4, 5, 6, 7);
573}557}
574558
...@@ -584,9 +568,8 @@ _mm512_zextpd256_pd512(__m256d __a)...@@ -584,9 +568,8 @@ _mm512_zextpd256_pd512(__m256d __a)
584/// A 128-bit vector of [4 x float].568/// A 128-bit vector of [4 x float].
585/// \returns A 512-bit floating-point vector of [16 x float]. The lower 128 bits569/// \returns A 512-bit floating-point vector of [16 x float]. The lower 128 bits
586/// contain the value of the parameter. The upper 384 bits are set to zero.570/// contain the value of the parameter. The upper 384 bits are set to zero.
587static __inline __m512 __DEFAULT_FN_ATTRS512571static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
588_mm512_zextps128_ps512(__m128 __a)572_mm512_zextps128_ps512(__m128 __a) {
589{
590 return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 4, 5, 6, 7, 4, 5, 6, 7);573 return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 4, 5, 6, 7, 4, 5, 6, 7);
591}574}
592575
...@@ -602,9 +585,8 @@ _mm512_zextps128_ps512(__m128 __a)...@@ -602,9 +585,8 @@ _mm512_zextps128_ps512(__m128 __a)
602/// A 256-bit vector of [8 x float].585/// A 256-bit vector of [8 x float].
603/// \returns A 512-bit floating-point vector of [16 x float]. The lower 256 bits586/// \returns A 512-bit floating-point vector of [16 x float]. The lower 256 bits
604/// contain the value of the parameter. The upper 256 bits are set to zero.587/// contain the value of the parameter. The upper 256 bits are set to zero.
605static __inline __m512 __DEFAULT_FN_ATTRS512588static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
606_mm512_zextps256_ps512(__m256 __a)589_mm512_zextps256_ps512(__m256 __a) {
607{
608 return __builtin_shufflevector((__v8sf)__a, (__v8sf)_mm256_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);590 return __builtin_shufflevector((__v8sf)__a, (__v8sf)_mm256_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
609}591}
610592
...@@ -620,9 +602,8 @@ _mm512_zextps256_ps512(__m256 __a)...@@ -620,9 +602,8 @@ _mm512_zextps256_ps512(__m256 __a)
620/// A 128-bit integer vector.602/// A 128-bit integer vector.
621/// \returns A 512-bit integer vector. The lower 128 bits contain the value of603/// \returns A 512-bit integer vector. The lower 128 bits contain the value of
622/// the parameter. The upper 384 bits are set to zero.604/// the parameter. The upper 384 bits are set to zero.
623static __inline __m512i __DEFAULT_FN_ATTRS512605static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
624_mm512_zextsi128_si512(__m128i __a)606_mm512_zextsi128_si512(__m128i __a) {
625{
626 return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3, 2, 3, 2, 3);607 return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3, 2, 3, 2, 3);
627}608}
628609
...@@ -638,22 +619,20 @@ _mm512_zextsi128_si512(__m128i __a)...@@ -638,22 +619,20 @@ _mm512_zextsi128_si512(__m128i __a)
638/// A 256-bit integer vector.619/// A 256-bit integer vector.
639/// \returns A 512-bit integer vector. The lower 256 bits contain the value of620/// \returns A 512-bit integer vector. The lower 256 bits contain the value of
640/// the parameter. The upper 256 bits are set to zero.621/// the parameter. The upper 256 bits are set to zero.
641static __inline __m512i __DEFAULT_FN_ATTRS512622static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
642_mm512_zextsi256_si512(__m256i __a)623_mm512_zextsi256_si512(__m256i __a) {
643{
644 return __builtin_shufflevector((__v4di)__a, (__v4di)_mm256_setzero_si256(), 0, 1, 2, 3, 4, 5, 6, 7);624 return __builtin_shufflevector((__v4di)__a, (__v4di)_mm256_setzero_si256(), 0, 1, 2, 3, 4, 5, 6, 7);
645}625}
646626
647/* Bitwise operators */627/* Bitwise operators */
648static __inline__ __m512i __DEFAULT_FN_ATTRS512628static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
649_mm512_and_epi32(__m512i __a, __m512i __b)629_mm512_and_epi32(__m512i __a, __m512i __b)
650{630{
651 return (__m512i)((__v16su)__a & (__v16su)__b);631 return (__m512i)((__v16su)__a & (__v16su)__b);
652}632}
653633
654static __inline__ __m512i __DEFAULT_FN_ATTRS512634static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
655_mm512_mask_and_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b)635_mm512_mask_and_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b) {
656{
657 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k,636 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k,
658 (__v16si) _mm512_and_epi32(__a, __b),637 (__v16si) _mm512_and_epi32(__a, __b),
659 (__v16si) __src);638 (__v16si) __src);
...@@ -666,18 +645,16 @@ _mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b)...@@ -666,18 +645,16 @@ _mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b)
666 __k, __a, __b);645 __k, __a, __b);
667}646}
668647
669static __inline__ __m512i __DEFAULT_FN_ATTRS512648static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
670_mm512_and_epi64(__m512i __a, __m512i __b)649_mm512_and_epi64(__m512i __a, __m512i __b)
671{650{
672 return (__m512i)((__v8du)__a & (__v8du)__b);651 return (__m512i)((__v8du)__a & (__v8du)__b);
673}652}
674653
675static __inline__ __m512i __DEFAULT_FN_ATTRS512654static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
676_mm512_mask_and_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b)655_mm512_mask_and_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b) {
677{656 return (__m512i)__builtin_ia32_selectq_512(
678 return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __k,657 (__mmask8)__k, (__v8di)_mm512_and_epi64(__a, __b), (__v8di)__src);
679 (__v8di) _mm512_and_epi64(__a, __b),
680 (__v8di) __src);
681}658}
682659
683static __inline__ __m512i __DEFAULT_FN_ATTRS512660static __inline__ __m512i __DEFAULT_FN_ATTRS512
...@@ -687,13 +664,13 @@ _mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b)...@@ -687,13 +664,13 @@ _mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b)
687 __k, __a, __b);664 __k, __a, __b);
688}665}
689666
690static __inline__ __m512i __DEFAULT_FN_ATTRS512667static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
691_mm512_andnot_si512 (__m512i __A, __m512i __B)668_mm512_andnot_si512 (__m512i __A, __m512i __B)
692{669{
693 return (__m512i)(~(__v8du)__A & (__v8du)__B);670 return (__m512i)(~(__v8du)__A & (__v8du)__B);
694}671}
695672
696static __inline__ __m512i __DEFAULT_FN_ATTRS512673static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
697_mm512_andnot_epi32 (__m512i __A, __m512i __B)674_mm512_andnot_epi32 (__m512i __A, __m512i __B)
698{675{
699 return (__m512i)(~(__v16su)__A & (__v16su)__B);676 return (__m512i)(~(__v16su)__A & (__v16su)__B);
...@@ -714,7 +691,7 @@ _mm512_maskz_andnot_epi32(__mmask16 __U, __m512i __A, __m512i __B)...@@ -714,7 +691,7 @@ _mm512_maskz_andnot_epi32(__mmask16 __U, __m512i __A, __m512i __B)
714 __U, __A, __B);691 __U, __A, __B);
715}692}
716693
717static __inline__ __m512i __DEFAULT_FN_ATTRS512694static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
718_mm512_andnot_epi64(__m512i __A, __m512i __B)695_mm512_andnot_epi64(__m512i __A, __m512i __B)
719{696{
720 return (__m512i)(~(__v8du)__A & (__v8du)__B);697 return (__m512i)(~(__v8du)__A & (__v8du)__B);
...@@ -735,7 +712,7 @@ _mm512_maskz_andnot_epi64(__mmask8 __U, __m512i __A, __m512i __B)...@@ -735,7 +712,7 @@ _mm512_maskz_andnot_epi64(__mmask8 __U, __m512i __A, __m512i __B)
735 __U, __A, __B);712 __U, __A, __B);
736}713}
737714
738static __inline__ __m512i __DEFAULT_FN_ATTRS512715static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
739_mm512_or_epi32(__m512i __a, __m512i __b)716_mm512_or_epi32(__m512i __a, __m512i __b)
740{717{
741 return (__m512i)((__v16su)__a | (__v16su)__b);718 return (__m512i)((__v16su)__a | (__v16su)__b);
...@@ -755,7 +732,7 @@ _mm512_maskz_or_epi32(__mmask16 __k, __m512i __a, __m512i __b)...@@ -755,7 +732,7 @@ _mm512_maskz_or_epi32(__mmask16 __k, __m512i __a, __m512i __b)
755 return (__m512i)_mm512_mask_or_epi32(_mm512_setzero_si512(), __k, __a, __b);732 return (__m512i)_mm512_mask_or_epi32(_mm512_setzero_si512(), __k, __a, __b);
756}733}
757734
758static __inline__ __m512i __DEFAULT_FN_ATTRS512735static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
759_mm512_or_epi64(__m512i __a, __m512i __b)736_mm512_or_epi64(__m512i __a, __m512i __b)
760{737{
761 return (__m512i)((__v8du)__a | (__v8du)__b);738 return (__m512i)((__v8du)__a | (__v8du)__b);
...@@ -775,7 +752,7 @@ _mm512_maskz_or_epi64(__mmask8 __k, __m512i __a, __m512i __b)...@@ -775,7 +752,7 @@ _mm512_maskz_or_epi64(__mmask8 __k, __m512i __a, __m512i __b)
775 return (__m512i)_mm512_mask_or_epi64(_mm512_setzero_si512(), __k, __a, __b);752 return (__m512i)_mm512_mask_or_epi64(_mm512_setzero_si512(), __k, __a, __b);
776}753}
777754
778static __inline__ __m512i __DEFAULT_FN_ATTRS512755static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
779_mm512_xor_epi32(__m512i __a, __m512i __b)756_mm512_xor_epi32(__m512i __a, __m512i __b)
780{757{
781 return (__m512i)((__v16su)__a ^ (__v16su)__b);758 return (__m512i)((__v16su)__a ^ (__v16su)__b);
...@@ -795,7 +772,7 @@ _mm512_maskz_xor_epi32(__mmask16 __k, __m512i __a, __m512i __b)...@@ -795,7 +772,7 @@ _mm512_maskz_xor_epi32(__mmask16 __k, __m512i __a, __m512i __b)
795 return (__m512i)_mm512_mask_xor_epi32(_mm512_setzero_si512(), __k, __a, __b);772 return (__m512i)_mm512_mask_xor_epi32(_mm512_setzero_si512(), __k, __a, __b);
796}773}
797774
798static __inline__ __m512i __DEFAULT_FN_ATTRS512775static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
799_mm512_xor_epi64(__m512i __a, __m512i __b)776_mm512_xor_epi64(__m512i __a, __m512i __b)
800{777{
801 return (__m512i)((__v8du)__a ^ (__v8du)__b);778 return (__m512i)((__v8du)__a ^ (__v8du)__b);
...@@ -815,19 +792,19 @@ _mm512_maskz_xor_epi64(__mmask8 __k, __m512i __a, __m512i __b)...@@ -815,19 +792,19 @@ _mm512_maskz_xor_epi64(__mmask8 __k, __m512i __a, __m512i __b)
815 return (__m512i)_mm512_mask_xor_epi64(_mm512_setzero_si512(), __k, __a, __b);792 return (__m512i)_mm512_mask_xor_epi64(_mm512_setzero_si512(), __k, __a, __b);
816}793}
817794
818static __inline__ __m512i __DEFAULT_FN_ATTRS512795static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
819_mm512_and_si512(__m512i __a, __m512i __b)796_mm512_and_si512(__m512i __a, __m512i __b)
820{797{
821 return (__m512i)((__v8du)__a & (__v8du)__b);798 return (__m512i)((__v8du)__a & (__v8du)__b);
822}799}
823800
824static __inline__ __m512i __DEFAULT_FN_ATTRS512801static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
825_mm512_or_si512(__m512i __a, __m512i __b)802_mm512_or_si512(__m512i __a, __m512i __b)
826{803{
827 return (__m512i)((__v8du)__a | (__v8du)__b);804 return (__m512i)((__v8du)__a | (__v8du)__b);
828}805}
829806
830static __inline__ __m512i __DEFAULT_FN_ATTRS512807static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
831_mm512_xor_si512(__m512i __a, __m512i __b)808_mm512_xor_si512(__m512i __a, __m512i __b)
832{809{
833 return (__m512i)((__v8du)__a ^ (__v8du)__b);810 return (__m512i)((__v8du)__a ^ (__v8du)__b);
...@@ -835,125 +812,107 @@ _mm512_xor_si512(__m512i __a, __m512i __b)...@@ -835,125 +812,107 @@ _mm512_xor_si512(__m512i __a, __m512i __b)
835812
836/* Arithmetic */813/* Arithmetic */
837814
838static __inline __m512d __DEFAULT_FN_ATTRS512815static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
839_mm512_add_pd(__m512d __a, __m512d __b)816_mm512_add_pd(__m512d __a, __m512d __b) {
840{
841 return (__m512d)((__v8df)__a + (__v8df)__b);817 return (__m512d)((__v8df)__a + (__v8df)__b);
842}818}
843819
844static __inline __m512 __DEFAULT_FN_ATTRS512820static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
845_mm512_add_ps(__m512 __a, __m512 __b)821_mm512_add_ps(__m512 __a, __m512 __b) {
846{
847 return (__m512)((__v16sf)__a + (__v16sf)__b);822 return (__m512)((__v16sf)__a + (__v16sf)__b);
848}823}
849824
850static __inline __m512d __DEFAULT_FN_ATTRS512825static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
851_mm512_mul_pd(__m512d __a, __m512d __b)826_mm512_mul_pd(__m512d __a, __m512d __b) {
852{
853 return (__m512d)((__v8df)__a * (__v8df)__b);827 return (__m512d)((__v8df)__a * (__v8df)__b);
854}828}
855829
856static __inline __m512 __DEFAULT_FN_ATTRS512830static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
857_mm512_mul_ps(__m512 __a, __m512 __b)831_mm512_mul_ps(__m512 __a, __m512 __b) {
858{
859 return (__m512)((__v16sf)__a * (__v16sf)__b);832 return (__m512)((__v16sf)__a * (__v16sf)__b);
860}833}
861834
862static __inline __m512d __DEFAULT_FN_ATTRS512835static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
863_mm512_sub_pd(__m512d __a, __m512d __b)836_mm512_sub_pd(__m512d __a, __m512d __b) {
864{
865 return (__m512d)((__v8df)__a - (__v8df)__b);837 return (__m512d)((__v8df)__a - (__v8df)__b);
866}838}
867839
868static __inline __m512 __DEFAULT_FN_ATTRS512840static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
869_mm512_sub_ps(__m512 __a, __m512 __b)841_mm512_sub_ps(__m512 __a, __m512 __b) {
870{
871 return (__m512)((__v16sf)__a - (__v16sf)__b);842 return (__m512)((__v16sf)__a - (__v16sf)__b);
872}843}
873844
874static __inline__ __m512i __DEFAULT_FN_ATTRS512845static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
875_mm512_add_epi64 (__m512i __A, __m512i __B)846_mm512_add_epi64(__m512i __A, __m512i __B) {
876{
877 return (__m512i) ((__v8du) __A + (__v8du) __B);847 return (__m512i) ((__v8du) __A + (__v8du) __B);
878}848}
879849
880static __inline__ __m512i __DEFAULT_FN_ATTRS512850static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
881_mm512_mask_add_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)851_mm512_mask_add_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
882{
883 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,852 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
884 (__v8di)_mm512_add_epi64(__A, __B),853 (__v8di)_mm512_add_epi64(__A, __B),
885 (__v8di)__W);854 (__v8di)__W);
886}855}
887856
888static __inline__ __m512i __DEFAULT_FN_ATTRS512857static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
889_mm512_maskz_add_epi64(__mmask8 __U, __m512i __A, __m512i __B)858_mm512_maskz_add_epi64(__mmask8 __U, __m512i __A, __m512i __B) {
890{
891 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,859 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
892 (__v8di)_mm512_add_epi64(__A, __B),860 (__v8di)_mm512_add_epi64(__A, __B),
893 (__v8di)_mm512_setzero_si512());861 (__v8di)_mm512_setzero_si512());
894}862}
895863
896static __inline__ __m512i __DEFAULT_FN_ATTRS512864static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
897_mm512_sub_epi64 (__m512i __A, __m512i __B)865_mm512_sub_epi64(__m512i __A, __m512i __B) {
898{
899 return (__m512i) ((__v8du) __A - (__v8du) __B);866 return (__m512i) ((__v8du) __A - (__v8du) __B);
900}867}
901868
902static __inline__ __m512i __DEFAULT_FN_ATTRS512869static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
903_mm512_mask_sub_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)870_mm512_mask_sub_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
904{
905 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,871 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
906 (__v8di)_mm512_sub_epi64(__A, __B),872 (__v8di)_mm512_sub_epi64(__A, __B),
907 (__v8di)__W);873 (__v8di)__W);
908}874}
909875
910static __inline__ __m512i __DEFAULT_FN_ATTRS512876static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
911_mm512_maskz_sub_epi64(__mmask8 __U, __m512i __A, __m512i __B)877_mm512_maskz_sub_epi64(__mmask8 __U, __m512i __A, __m512i __B) {
912{
913 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,878 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
914 (__v8di)_mm512_sub_epi64(__A, __B),879 (__v8di)_mm512_sub_epi64(__A, __B),
915 (__v8di)_mm512_setzero_si512());880 (__v8di)_mm512_setzero_si512());
916}881}
917882
918static __inline__ __m512i __DEFAULT_FN_ATTRS512883static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
919_mm512_add_epi32 (__m512i __A, __m512i __B)884_mm512_add_epi32(__m512i __A, __m512i __B) {
920{
921 return (__m512i) ((__v16su) __A + (__v16su) __B);885 return (__m512i) ((__v16su) __A + (__v16su) __B);
922}886}
923887
924static __inline__ __m512i __DEFAULT_FN_ATTRS512888static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
925_mm512_mask_add_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)889_mm512_mask_add_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {
926{
927 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,890 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
928 (__v16si)_mm512_add_epi32(__A, __B),891 (__v16si)_mm512_add_epi32(__A, __B),
929 (__v16si)__W);892 (__v16si)__W);
930}893}
931894
932static __inline__ __m512i __DEFAULT_FN_ATTRS512895static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
933_mm512_maskz_add_epi32 (__mmask16 __U, __m512i __A, __m512i __B)896_mm512_maskz_add_epi32(__mmask16 __U, __m512i __A, __m512i __B) {
934{
935 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,897 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
936 (__v16si)_mm512_add_epi32(__A, __B),898 (__v16si)_mm512_add_epi32(__A, __B),
937 (__v16si)_mm512_setzero_si512());899 (__v16si)_mm512_setzero_si512());
938}900}
939901
940static __inline__ __m512i __DEFAULT_FN_ATTRS512902static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
941_mm512_sub_epi32 (__m512i __A, __m512i __B)903_mm512_sub_epi32(__m512i __A, __m512i __B) {
942{
943 return (__m512i) ((__v16su) __A - (__v16su) __B);904 return (__m512i) ((__v16su) __A - (__v16su) __B);
944}905}
945906
946static __inline__ __m512i __DEFAULT_FN_ATTRS512907static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
947_mm512_mask_sub_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)908_mm512_mask_sub_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) {
948{
949 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,909 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
950 (__v16si)_mm512_sub_epi32(__A, __B),910 (__v16si)_mm512_sub_epi32(__A, __B),
951 (__v16si)__W);911 (__v16si)__W);
952}912}
953913
954static __inline__ __m512i __DEFAULT_FN_ATTRS512914static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
955_mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B)915_mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B) {
956{
957 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,916 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
958 (__v16si)_mm512_sub_epi32(__A, __B),917 (__v16si)_mm512_sub_epi32(__A, __B),
959 (__v16si)_mm512_setzero_si512());918 (__v16si)_mm512_setzero_si512());
...@@ -973,24 +932,21 @@ _mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B)...@@ -973,24 +932,21 @@ _mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B)
973 (__v8df)_mm512_max_round_pd((A), (B), (R)), \932 (__v8df)_mm512_max_round_pd((A), (B), (R)), \
974 (__v8df)_mm512_setzero_pd()))933 (__v8df)_mm512_setzero_pd()))
975934
976static __inline__ __m512d __DEFAULT_FN_ATTRS512935static __inline__ __m512d
977_mm512_max_pd(__m512d __A, __m512d __B)936 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_pd(__m512d __A, __m512d __B) {
978{
979 return (__m512d) __builtin_ia32_maxpd512((__v8df) __A, (__v8df) __B,937 return (__m512d) __builtin_ia32_maxpd512((__v8df) __A, (__v8df) __B,
980 _MM_FROUND_CUR_DIRECTION);938 _MM_FROUND_CUR_DIRECTION);
981}939}
982940
983static __inline__ __m512d __DEFAULT_FN_ATTRS512941static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
984_mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)942_mm512_mask_max_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
985{
986 return (__m512d)__builtin_ia32_selectpd_512(__U,943 return (__m512d)__builtin_ia32_selectpd_512(__U,
987 (__v8df)_mm512_max_pd(__A, __B),944 (__v8df)_mm512_max_pd(__A, __B),
988 (__v8df)__W);945 (__v8df)__W);
989}946}
990947
991static __inline__ __m512d __DEFAULT_FN_ATTRS512948static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
992_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B)949_mm512_maskz_max_pd(__mmask8 __U, __m512d __A, __m512d __B) {
993{
994 return (__m512d)__builtin_ia32_selectpd_512(__U,950 return (__m512d)__builtin_ia32_selectpd_512(__U,
995 (__v8df)_mm512_max_pd(__A, __B),951 (__v8df)_mm512_max_pd(__A, __B),
996 (__v8df)_mm512_setzero_pd());952 (__v8df)_mm512_setzero_pd());
...@@ -1010,31 +966,30 @@ _mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B)...@@ -1010,31 +966,30 @@ _mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B)
1010 (__v16sf)_mm512_max_round_ps((A), (B), (R)), \966 (__v16sf)_mm512_max_round_ps((A), (B), (R)), \
1011 (__v16sf)_mm512_setzero_ps()))967 (__v16sf)_mm512_setzero_ps()))
1012968
1013static __inline__ __m512 __DEFAULT_FN_ATTRS512969static __inline__ __m512
1014_mm512_max_ps(__m512 __A, __m512 __B)970 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_ps(__m512 __A, __m512 __B) {
1015{
1016 return (__m512) __builtin_ia32_maxps512((__v16sf) __A, (__v16sf) __B,971 return (__m512) __builtin_ia32_maxps512((__v16sf) __A, (__v16sf) __B,
1017 _MM_FROUND_CUR_DIRECTION);972 _MM_FROUND_CUR_DIRECTION);
1018}973}
1019974
1020static __inline__ __m512 __DEFAULT_FN_ATTRS512975static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1021_mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)976_mm512_mask_max_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
1022{
1023 return (__m512)__builtin_ia32_selectps_512(__U,977 return (__m512)__builtin_ia32_selectps_512(__U,
1024 (__v16sf)_mm512_max_ps(__A, __B),978 (__v16sf)_mm512_max_ps(__A, __B),
1025 (__v16sf)__W);979 (__v16sf)__W);
1026}980}
1027981
1028static __inline__ __m512 __DEFAULT_FN_ATTRS512982static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1029_mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B)983_mm512_maskz_max_ps(__mmask16 __U, __m512 __A, __m512 __B) {
1030{
1031 return (__m512)__builtin_ia32_selectps_512(__U,984 return (__m512)__builtin_ia32_selectps_512(__U,
1032 (__v16sf)_mm512_max_ps(__A, __B),985 (__v16sf)_mm512_max_ps(__A, __B),
1033 (__v16sf)_mm512_setzero_ps());986 (__v16sf)_mm512_setzero_ps());
1034}987}
1035988
1036static __inline__ __m128 __DEFAULT_FN_ATTRS128989static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_max_ss(__m128 __W,
1037_mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {990 __mmask8 __U,
991 __m128 __A,
992 __m128 __B) {
1038 return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A,993 return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A,
1039 (__v4sf) __B,994 (__v4sf) __B,
1040 (__v4sf) __W,995 (__v4sf) __W,
...@@ -1042,8 +997,9 @@ _mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {...@@ -1042,8 +997,9 @@ _mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
1042 _MM_FROUND_CUR_DIRECTION);997 _MM_FROUND_CUR_DIRECTION);
1043}998}
1044999
1045static __inline__ __m128 __DEFAULT_FN_ATTRS1281000static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_max_ss(__mmask8 __U,
1046_mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) {1001 __m128 __A,
1002 __m128 __B) {
1047 return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A,1003 return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A,
1048 (__v4sf) __B,1004 (__v4sf) __B,
1049 (__v4sf) _mm_setzero_ps (),1005 (__v4sf) _mm_setzero_ps (),
...@@ -1069,8 +1025,10 @@ _mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) {...@@ -1069,8 +1025,10 @@ _mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) {
1069 (__v4sf)_mm_setzero_ps(), \1025 (__v4sf)_mm_setzero_ps(), \
1070 (__mmask8)(U), (int)(R)))1026 (__mmask8)(U), (int)(R)))
10711027
1072static __inline__ __m128d __DEFAULT_FN_ATTRS1281028static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_max_sd(__m128d __W,
1073_mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {1029 __mmask8 __U,
1030 __m128d __A,
1031 __m128d __B) {
1074 return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A,1032 return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A,
1075 (__v2df) __B,1033 (__v2df) __B,
1076 (__v2df) __W,1034 (__v2df) __W,
...@@ -1078,8 +1036,9 @@ _mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {...@@ -1078,8 +1036,9 @@ _mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {
1078 _MM_FROUND_CUR_DIRECTION);1036 _MM_FROUND_CUR_DIRECTION);
1079}1037}
10801038
1081static __inline__ __m128d __DEFAULT_FN_ATTRS1281039static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_max_sd(__mmask8 __U,
1082_mm_maskz_max_sd(__mmask8 __U,__m128d __A, __m128d __B) {1040 __m128d __A,
1041 __m128d __B) {
1083 return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A,1042 return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A,
1084 (__v2df) __B,1043 (__v2df) __B,
1085 (__v2df) _mm_setzero_pd (),1044 (__v2df) _mm_setzero_pd (),
...@@ -1106,89 +1065,76 @@ _mm_maskz_max_sd(__mmask8 __U,__m128d __A, __m128d __B) {...@@ -1106,89 +1065,76 @@ _mm_maskz_max_sd(__mmask8 __U,__m128d __A, __m128d __B) {
1106 (__mmask8)(U), (int)(R)))1065 (__mmask8)(U), (int)(R)))
11071066
1108static __inline __m512i1067static __inline __m512i
1109__DEFAULT_FN_ATTRS5121068 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_epi32(__m512i __A, __m512i __B) {
1110_mm512_max_epi32(__m512i __A, __m512i __B)
1111{
1112 return (__m512i)__builtin_elementwise_max((__v16si)__A, (__v16si)__B);1069 return (__m512i)__builtin_elementwise_max((__v16si)__A, (__v16si)__B);
1113}1070}
11141071
1115static __inline__ __m512i __DEFAULT_FN_ATTRS5121072static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1116_mm512_mask_max_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)1073_mm512_mask_max_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
1117{
1118 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1074 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1119 (__v16si)_mm512_max_epi32(__A, __B),1075 (__v16si)_mm512_max_epi32(__A, __B),
1120 (__v16si)__W);1076 (__v16si)__W);
1121}1077}
11221078
1123static __inline__ __m512i __DEFAULT_FN_ATTRS5121079static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1124_mm512_maskz_max_epi32 (__mmask16 __M, __m512i __A, __m512i __B)1080_mm512_maskz_max_epi32(__mmask16 __M, __m512i __A, __m512i __B) {
1125{
1126 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1081 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1127 (__v16si)_mm512_max_epi32(__A, __B),1082 (__v16si)_mm512_max_epi32(__A, __B),
1128 (__v16si)_mm512_setzero_si512());1083 (__v16si)_mm512_setzero_si512());
1129}1084}
11301085
1131static __inline __m512i __DEFAULT_FN_ATTRS5121086static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1132_mm512_max_epu32(__m512i __A, __m512i __B)1087_mm512_max_epu32(__m512i __A, __m512i __B) {
1133{
1134 return (__m512i)__builtin_elementwise_max((__v16su)__A, (__v16su)__B);1088 return (__m512i)__builtin_elementwise_max((__v16su)__A, (__v16su)__B);
1135}1089}
11361090
1137static __inline__ __m512i __DEFAULT_FN_ATTRS5121091static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1138_mm512_mask_max_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)1092_mm512_mask_max_epu32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
1139{
1140 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1093 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1141 (__v16si)_mm512_max_epu32(__A, __B),1094 (__v16si)_mm512_max_epu32(__A, __B),
1142 (__v16si)__W);1095 (__v16si)__W);
1143}1096}
11441097
1145static __inline__ __m512i __DEFAULT_FN_ATTRS5121098static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1146_mm512_maskz_max_epu32 (__mmask16 __M, __m512i __A, __m512i __B)1099_mm512_maskz_max_epu32(__mmask16 __M, __m512i __A, __m512i __B) {
1147{
1148 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1100 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1149 (__v16si)_mm512_max_epu32(__A, __B),1101 (__v16si)_mm512_max_epu32(__A, __B),
1150 (__v16si)_mm512_setzero_si512());1102 (__v16si)_mm512_setzero_si512());
1151}1103}
11521104
1153static __inline __m512i __DEFAULT_FN_ATTRS5121105static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1154_mm512_max_epi64(__m512i __A, __m512i __B)1106_mm512_max_epi64(__m512i __A, __m512i __B) {
1155{
1156 return (__m512i)__builtin_elementwise_max((__v8di)__A, (__v8di)__B);1107 return (__m512i)__builtin_elementwise_max((__v8di)__A, (__v8di)__B);
1157}1108}
11581109
1159static __inline__ __m512i __DEFAULT_FN_ATTRS5121110static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1160_mm512_mask_max_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)1111_mm512_mask_max_epi64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) {
1161{
1162 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1112 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1163 (__v8di)_mm512_max_epi64(__A, __B),1113 (__v8di)_mm512_max_epi64(__A, __B),
1164 (__v8di)__W);1114 (__v8di)__W);
1165}1115}
11661116
1167static __inline__ __m512i __DEFAULT_FN_ATTRS5121117static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1168_mm512_maskz_max_epi64 (__mmask8 __M, __m512i __A, __m512i __B)1118_mm512_maskz_max_epi64(__mmask8 __M, __m512i __A, __m512i __B) {
1169{
1170 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1119 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1171 (__v8di)_mm512_max_epi64(__A, __B),1120 (__v8di)_mm512_max_epi64(__A, __B),
1172 (__v8di)_mm512_setzero_si512());1121 (__v8di)_mm512_setzero_si512());
1173}1122}
11741123
1175static __inline __m512i __DEFAULT_FN_ATTRS5121124static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1176_mm512_max_epu64(__m512i __A, __m512i __B)1125_mm512_max_epu64(__m512i __A, __m512i __B) {
1177{
1178 return (__m512i)__builtin_elementwise_max((__v8du)__A, (__v8du)__B);1126 return (__m512i)__builtin_elementwise_max((__v8du)__A, (__v8du)__B);
1179}1127}
11801128
1181static __inline__ __m512i __DEFAULT_FN_ATTRS5121129static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1182_mm512_mask_max_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)1130_mm512_mask_max_epu64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) {
1183{
1184 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1131 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1185 (__v8di)_mm512_max_epu64(__A, __B),1132 (__v8di)_mm512_max_epu64(__A, __B),
1186 (__v8di)__W);1133 (__v8di)__W);
1187}1134}
11881135
1189static __inline__ __m512i __DEFAULT_FN_ATTRS5121136static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1190_mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B)1137_mm512_maskz_max_epu64(__mmask8 __M, __m512i __A, __m512i __B) {
1191{
1192 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1138 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1193 (__v8di)_mm512_max_epu64(__A, __B),1139 (__v8di)_mm512_max_epu64(__A, __B),
1194 (__v8di)_mm512_setzero_si512());1140 (__v8di)_mm512_setzero_si512());
...@@ -1208,24 +1154,21 @@ _mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B)...@@ -1208,24 +1154,21 @@ _mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B)
1208 (__v8df)_mm512_min_round_pd((A), (B), (R)), \1154 (__v8df)_mm512_min_round_pd((A), (B), (R)), \
1209 (__v8df)_mm512_setzero_pd()))1155 (__v8df)_mm512_setzero_pd()))
12101156
1211static __inline__ __m512d __DEFAULT_FN_ATTRS5121157static __inline__ __m512d
1212_mm512_min_pd(__m512d __A, __m512d __B)1158 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_pd(__m512d __A, __m512d __B) {
1213{
1214 return (__m512d) __builtin_ia32_minpd512((__v8df) __A, (__v8df) __B,1159 return (__m512d) __builtin_ia32_minpd512((__v8df) __A, (__v8df) __B,
1215 _MM_FROUND_CUR_DIRECTION);1160 _MM_FROUND_CUR_DIRECTION);
1216}1161}
12171162
1218static __inline__ __m512d __DEFAULT_FN_ATTRS5121163static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
1219_mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)1164_mm512_mask_min_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
1220{
1221 return (__m512d)__builtin_ia32_selectpd_512(__U,1165 return (__m512d)__builtin_ia32_selectpd_512(__U,
1222 (__v8df)_mm512_min_pd(__A, __B),1166 (__v8df)_mm512_min_pd(__A, __B),
1223 (__v8df)__W);1167 (__v8df)__W);
1224}1168}
12251169
1226static __inline__ __m512d __DEFAULT_FN_ATTRS5121170static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
1227_mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B)1171_mm512_maskz_min_pd(__mmask8 __U, __m512d __A, __m512d __B) {
1228{
1229 return (__m512d)__builtin_ia32_selectpd_512(__U,1172 return (__m512d)__builtin_ia32_selectpd_512(__U,
1230 (__v8df)_mm512_min_pd(__A, __B),1173 (__v8df)_mm512_min_pd(__A, __B),
1231 (__v8df)_mm512_setzero_pd());1174 (__v8df)_mm512_setzero_pd());
...@@ -1245,31 +1188,30 @@ _mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B)...@@ -1245,31 +1188,30 @@ _mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B)
1245 (__v16sf)_mm512_min_round_ps((A), (B), (R)), \1188 (__v16sf)_mm512_min_round_ps((A), (B), (R)), \
1246 (__v16sf)_mm512_setzero_ps()))1189 (__v16sf)_mm512_setzero_ps()))
12471190
1248static __inline__ __m512 __DEFAULT_FN_ATTRS5121191static __inline__ __m512
1249_mm512_min_ps(__m512 __A, __m512 __B)1192 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_ps(__m512 __A, __m512 __B) {
1250{
1251 return (__m512) __builtin_ia32_minps512((__v16sf) __A, (__v16sf) __B,1193 return (__m512) __builtin_ia32_minps512((__v16sf) __A, (__v16sf) __B,
1252 _MM_FROUND_CUR_DIRECTION);1194 _MM_FROUND_CUR_DIRECTION);
1253}1195}
12541196
1255static __inline__ __m512 __DEFAULT_FN_ATTRS5121197static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1256_mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B)1198_mm512_mask_min_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
1257{
1258 return (__m512)__builtin_ia32_selectps_512(__U,1199 return (__m512)__builtin_ia32_selectps_512(__U,
1259 (__v16sf)_mm512_min_ps(__A, __B),1200 (__v16sf)_mm512_min_ps(__A, __B),
1260 (__v16sf)__W);1201 (__v16sf)__W);
1261}1202}
12621203
1263static __inline__ __m512 __DEFAULT_FN_ATTRS5121204static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1264_mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B)1205_mm512_maskz_min_ps(__mmask16 __U, __m512 __A, __m512 __B) {
1265{
1266 return (__m512)__builtin_ia32_selectps_512(__U,1206 return (__m512)__builtin_ia32_selectps_512(__U,
1267 (__v16sf)_mm512_min_ps(__A, __B),1207 (__v16sf)_mm512_min_ps(__A, __B),
1268 (__v16sf)_mm512_setzero_ps());1208 (__v16sf)_mm512_setzero_ps());
1269}1209}
12701210
1271static __inline__ __m128 __DEFAULT_FN_ATTRS1281211static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_min_ss(__m128 __W,
1272_mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {1212 __mmask8 __U,
1213 __m128 __A,
1214 __m128 __B) {
1273 return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A,1215 return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A,
1274 (__v4sf) __B,1216 (__v4sf) __B,
1275 (__v4sf) __W,1217 (__v4sf) __W,
...@@ -1277,8 +1219,9 @@ _mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {...@@ -1277,8 +1219,9 @@ _mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {
1277 _MM_FROUND_CUR_DIRECTION);1219 _MM_FROUND_CUR_DIRECTION);
1278}1220}
12791221
1280static __inline__ __m128 __DEFAULT_FN_ATTRS1281222static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_min_ss(__mmask8 __U,
1281_mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) {1223 __m128 __A,
1224 __m128 __B) {
1282 return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A,1225 return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A,
1283 (__v4sf) __B,1226 (__v4sf) __B,
1284 (__v4sf) _mm_setzero_ps (),1227 (__v4sf) _mm_setzero_ps (),
...@@ -1304,8 +1247,10 @@ _mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) {...@@ -1304,8 +1247,10 @@ _mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) {
1304 (__v4sf)_mm_setzero_ps(), \1247 (__v4sf)_mm_setzero_ps(), \
1305 (__mmask8)(U), (int)(R)))1248 (__mmask8)(U), (int)(R)))
13061249
1307static __inline__ __m128d __DEFAULT_FN_ATTRS1281250static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_min_sd(__m128d __W,
1308_mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {1251 __mmask8 __U,
1252 __m128d __A,
1253 __m128d __B) {
1309 return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A,1254 return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A,
1310 (__v2df) __B,1255 (__v2df) __B,
1311 (__v2df) __W,1256 (__v2df) __W,
...@@ -1313,8 +1258,9 @@ _mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {...@@ -1313,8 +1258,9 @@ _mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {
1313 _MM_FROUND_CUR_DIRECTION);1258 _MM_FROUND_CUR_DIRECTION);
1314}1259}
13151260
1316static __inline__ __m128d __DEFAULT_FN_ATTRS1281261static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_min_sd(__mmask8 __U,
1317_mm_maskz_min_sd(__mmask8 __U,__m128d __A, __m128d __B) {1262 __m128d __A,
1263 __m128d __B) {
1318 return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A,1264 return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A,
1319 (__v2df) __B,1265 (__v2df) __B,
1320 (__v2df) _mm_setzero_pd (),1266 (__v2df) _mm_setzero_pd (),
...@@ -1341,166 +1287,144 @@ _mm_maskz_min_sd(__mmask8 __U,__m128d __A, __m128d __B) {...@@ -1341,166 +1287,144 @@ _mm_maskz_min_sd(__mmask8 __U,__m128d __A, __m128d __B) {
1341 (__mmask8)(U), (int)(R)))1287 (__mmask8)(U), (int)(R)))
13421288
1343static __inline __m512i1289static __inline __m512i
1344__DEFAULT_FN_ATTRS5121290 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_epi32(__m512i __A, __m512i __B) {
1345_mm512_min_epi32(__m512i __A, __m512i __B)
1346{
1347 return (__m512i)__builtin_elementwise_min((__v16si)__A, (__v16si)__B);1291 return (__m512i)__builtin_elementwise_min((__v16si)__A, (__v16si)__B);
1348}1292}
13491293
1350static __inline__ __m512i __DEFAULT_FN_ATTRS5121294static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1351_mm512_mask_min_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)1295_mm512_mask_min_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
1352{
1353 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1296 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1354 (__v16si)_mm512_min_epi32(__A, __B),1297 (__v16si)_mm512_min_epi32(__A, __B),
1355 (__v16si)__W);1298 (__v16si)__W);
1356}1299}
13571300
1358static __inline__ __m512i __DEFAULT_FN_ATTRS5121301static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1359_mm512_maskz_min_epi32 (__mmask16 __M, __m512i __A, __m512i __B)1302_mm512_maskz_min_epi32(__mmask16 __M, __m512i __A, __m512i __B) {
1360{
1361 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1303 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1362 (__v16si)_mm512_min_epi32(__A, __B),1304 (__v16si)_mm512_min_epi32(__A, __B),
1363 (__v16si)_mm512_setzero_si512());1305 (__v16si)_mm512_setzero_si512());
1364}1306}
13651307
1366static __inline __m512i __DEFAULT_FN_ATTRS5121308static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1367_mm512_min_epu32(__m512i __A, __m512i __B)1309_mm512_min_epu32(__m512i __A, __m512i __B) {
1368{
1369 return (__m512i)__builtin_elementwise_min((__v16su)__A, (__v16su)__B);1310 return (__m512i)__builtin_elementwise_min((__v16su)__A, (__v16su)__B);
1370}1311}
13711312
1372static __inline__ __m512i __DEFAULT_FN_ATTRS5121313static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1373_mm512_mask_min_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)1314_mm512_mask_min_epu32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
1374{
1375 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1315 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1376 (__v16si)_mm512_min_epu32(__A, __B),1316 (__v16si)_mm512_min_epu32(__A, __B),
1377 (__v16si)__W);1317 (__v16si)__W);
1378}1318}
13791319
1380static __inline__ __m512i __DEFAULT_FN_ATTRS5121320static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1381_mm512_maskz_min_epu32 (__mmask16 __M, __m512i __A, __m512i __B)1321_mm512_maskz_min_epu32(__mmask16 __M, __m512i __A, __m512i __B) {
1382{
1383 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1322 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1384 (__v16si)_mm512_min_epu32(__A, __B),1323 (__v16si)_mm512_min_epu32(__A, __B),
1385 (__v16si)_mm512_setzero_si512());1324 (__v16si)_mm512_setzero_si512());
1386}1325}
13871326
1388static __inline __m512i __DEFAULT_FN_ATTRS5121327static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1389_mm512_min_epi64(__m512i __A, __m512i __B)1328_mm512_min_epi64(__m512i __A, __m512i __B) {
1390{
1391 return (__m512i)__builtin_elementwise_min((__v8di)__A, (__v8di)__B);1329 return (__m512i)__builtin_elementwise_min((__v8di)__A, (__v8di)__B);
1392}1330}
13931331
1394static __inline__ __m512i __DEFAULT_FN_ATTRS5121332static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1395_mm512_mask_min_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)1333_mm512_mask_min_epi64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) {
1396{
1397 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1334 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1398 (__v8di)_mm512_min_epi64(__A, __B),1335 (__v8di)_mm512_min_epi64(__A, __B),
1399 (__v8di)__W);1336 (__v8di)__W);
1400}1337}
14011338
1402static __inline__ __m512i __DEFAULT_FN_ATTRS5121339static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1403_mm512_maskz_min_epi64 (__mmask8 __M, __m512i __A, __m512i __B)1340_mm512_maskz_min_epi64(__mmask8 __M, __m512i __A, __m512i __B) {
1404{
1405 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1341 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1406 (__v8di)_mm512_min_epi64(__A, __B),1342 (__v8di)_mm512_min_epi64(__A, __B),
1407 (__v8di)_mm512_setzero_si512());1343 (__v8di)_mm512_setzero_si512());
1408}1344}
14091345
1410static __inline __m512i __DEFAULT_FN_ATTRS5121346static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1411_mm512_min_epu64(__m512i __A, __m512i __B)1347_mm512_min_epu64(__m512i __A, __m512i __B) {
1412{
1413 return (__m512i)__builtin_elementwise_min((__v8du)__A, (__v8du)__B);1348 return (__m512i)__builtin_elementwise_min((__v8du)__A, (__v8du)__B);
1414}1349}
14151350
1416static __inline__ __m512i __DEFAULT_FN_ATTRS5121351static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1417_mm512_mask_min_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B)1352_mm512_mask_min_epu64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) {
1418{
1419 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1353 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1420 (__v8di)_mm512_min_epu64(__A, __B),1354 (__v8di)_mm512_min_epu64(__A, __B),
1421 (__v8di)__W);1355 (__v8di)__W);
1422}1356}
14231357
1424static __inline__ __m512i __DEFAULT_FN_ATTRS5121358static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1425_mm512_maskz_min_epu64 (__mmask8 __M, __m512i __A, __m512i __B)1359_mm512_maskz_min_epu64(__mmask8 __M, __m512i __A, __m512i __B) {
1426{
1427 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1360 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1428 (__v8di)_mm512_min_epu64(__A, __B),1361 (__v8di)_mm512_min_epu64(__A, __B),
1429 (__v8di)_mm512_setzero_si512());1362 (__v8di)_mm512_setzero_si512());
1430}1363}
14311364
1432static __inline __m512i __DEFAULT_FN_ATTRS5121365static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1433_mm512_mul_epi32(__m512i __X, __m512i __Y)1366_mm512_mul_epi32(__m512i __X, __m512i __Y) {
1434{
1435 return (__m512i)__builtin_ia32_pmuldq512((__v16si)__X, (__v16si) __Y);1367 return (__m512i)__builtin_ia32_pmuldq512((__v16si)__X, (__v16si) __Y);
1436}1368}
14371369
1438static __inline __m512i __DEFAULT_FN_ATTRS5121370static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1439_mm512_mask_mul_epi32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y)1371_mm512_mask_mul_epi32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) {
1440{
1441 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1372 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1442 (__v8di)_mm512_mul_epi32(__X, __Y),1373 (__v8di)_mm512_mul_epi32(__X, __Y),
1443 (__v8di)__W);1374 (__v8di)__W);
1444}1375}
14451376
1446static __inline __m512i __DEFAULT_FN_ATTRS5121377static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1447_mm512_maskz_mul_epi32(__mmask8 __M, __m512i __X, __m512i __Y)1378_mm512_maskz_mul_epi32(__mmask8 __M, __m512i __X, __m512i __Y) {
1448{
1449 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1379 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1450 (__v8di)_mm512_mul_epi32(__X, __Y),1380 (__v8di)_mm512_mul_epi32(__X, __Y),
1451 (__v8di)_mm512_setzero_si512 ());1381 (__v8di)_mm512_setzero_si512 ());
1452}1382}
14531383
1454static __inline __m512i __DEFAULT_FN_ATTRS5121384static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1455_mm512_mul_epu32(__m512i __X, __m512i __Y)1385_mm512_mul_epu32(__m512i __X, __m512i __Y) {
1456{
1457 return (__m512i)__builtin_ia32_pmuludq512((__v16si)__X, (__v16si)__Y);1386 return (__m512i)__builtin_ia32_pmuludq512((__v16si)__X, (__v16si)__Y);
1458}1387}
14591388
1460static __inline __m512i __DEFAULT_FN_ATTRS5121389static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1461_mm512_mask_mul_epu32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y)1390_mm512_mask_mul_epu32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) {
1462{
1463 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1391 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1464 (__v8di)_mm512_mul_epu32(__X, __Y),1392 (__v8di)_mm512_mul_epu32(__X, __Y),
1465 (__v8di)__W);1393 (__v8di)__W);
1466}1394}
14671395
1468static __inline __m512i __DEFAULT_FN_ATTRS5121396static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1469_mm512_maskz_mul_epu32(__mmask8 __M, __m512i __X, __m512i __Y)1397_mm512_maskz_mul_epu32(__mmask8 __M, __m512i __X, __m512i __Y) {
1470{
1471 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,1398 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
1472 (__v8di)_mm512_mul_epu32(__X, __Y),1399 (__v8di)_mm512_mul_epu32(__X, __Y),
1473 (__v8di)_mm512_setzero_si512 ());1400 (__v8di)_mm512_setzero_si512 ());
1474}1401}
14751402
1476static __inline __m512i __DEFAULT_FN_ATTRS5121403static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1477_mm512_mullo_epi32 (__m512i __A, __m512i __B)1404_mm512_mullo_epi32(__m512i __A, __m512i __B) {
1478{
1479 return (__m512i) ((__v16su) __A * (__v16su) __B);1405 return (__m512i) ((__v16su) __A * (__v16su) __B);
1480}1406}
14811407
1482static __inline __m512i __DEFAULT_FN_ATTRS5121408static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1483_mm512_maskz_mullo_epi32(__mmask16 __M, __m512i __A, __m512i __B)1409_mm512_maskz_mullo_epi32(__mmask16 __M, __m512i __A, __m512i __B) {
1484{
1485 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1410 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1486 (__v16si)_mm512_mullo_epi32(__A, __B),1411 (__v16si)_mm512_mullo_epi32(__A, __B),
1487 (__v16si)_mm512_setzero_si512());1412 (__v16si)_mm512_setzero_si512());
1488}1413}
14891414
1490static __inline __m512i __DEFAULT_FN_ATTRS5121415static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1491_mm512_mask_mullo_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B)1416_mm512_mask_mullo_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) {
1492{
1493 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,1417 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
1494 (__v16si)_mm512_mullo_epi32(__A, __B),1418 (__v16si)_mm512_mullo_epi32(__A, __B),
1495 (__v16si)__W);1419 (__v16si)__W);
1496}1420}
14971421
1498static __inline__ __m512i __DEFAULT_FN_ATTRS5121422static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1499_mm512_mullox_epi64 (__m512i __A, __m512i __B) {1423_mm512_mullox_epi64(__m512i __A, __m512i __B) {
1500 return (__m512i) ((__v8du) __A * (__v8du) __B);1424 return (__m512i) ((__v8du) __A * (__v8du) __B);
1501}1425}
15021426
1503static __inline__ __m512i __DEFAULT_FN_ATTRS5121427static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1504_mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {1428_mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
1505 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,1429 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
1506 (__v8di)_mm512_mullox_epi64(__A, __B),1430 (__v8di)_mm512_mullox_epi64(__A, __B),
...@@ -1520,26 +1444,19 @@ _mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {...@@ -1520,26 +1444,19 @@ _mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) {
1520 (__v8df)_mm512_sqrt_round_pd((A), (R)), \1444 (__v8df)_mm512_sqrt_round_pd((A), (R)), \
1521 (__v8df)_mm512_setzero_pd()))1445 (__v8df)_mm512_setzero_pd()))
15221446
1523static __inline__ __m512d __DEFAULT_FN_ATTRS5121447static __inline__ __m512d __DEFAULT_FN_ATTRS512 _mm512_sqrt_pd(__m512d __A) {
1524_mm512_sqrt_pd(__m512d __A)1448 return (__m512d)__builtin_elementwise_sqrt((__v8df)__A);
1525{
1526 return (__m512d)__builtin_ia32_sqrtpd512((__v8df)__A,
1527 _MM_FROUND_CUR_DIRECTION);
1528}1449}
15291450
1530static __inline__ __m512d __DEFAULT_FN_ATTRS5121451static __inline__ __m512d __DEFAULT_FN_ATTRS512
1531_mm512_mask_sqrt_pd (__m512d __W, __mmask8 __U, __m512d __A)1452_mm512_mask_sqrt_pd(__m512d __W, __mmask8 __U, __m512d __A) {
1532{1453 return (__m512d)__builtin_ia32_selectpd_512(__U, (__v8df)_mm512_sqrt_pd(__A),
1533 return (__m512d)__builtin_ia32_selectpd_512(__U,
1534 (__v8df)_mm512_sqrt_pd(__A),
1535 (__v8df)__W);1454 (__v8df)__W);
1536}1455}
15371456
1538static __inline__ __m512d __DEFAULT_FN_ATTRS5121457static __inline__ __m512d __DEFAULT_FN_ATTRS512
1539_mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A)1458_mm512_maskz_sqrt_pd(__mmask8 __U, __m512d __A) {
1540{1459 return (__m512d)__builtin_ia32_selectpd_512(__U, (__v8df)_mm512_sqrt_pd(__A),
1541 return (__m512d)__builtin_ia32_selectpd_512(__U,
1542 (__v8df)_mm512_sqrt_pd(__A),
1543 (__v8df)_mm512_setzero_pd());1460 (__v8df)_mm512_setzero_pd());
1544}1461}
15451462
...@@ -1556,26 +1473,19 @@ _mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A)...@@ -1556,26 +1473,19 @@ _mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A)
1556 (__v16sf)_mm512_sqrt_round_ps((A), (R)), \1473 (__v16sf)_mm512_sqrt_round_ps((A), (R)), \
1557 (__v16sf)_mm512_setzero_ps()))1474 (__v16sf)_mm512_setzero_ps()))
15581475
1559static __inline__ __m512 __DEFAULT_FN_ATTRS5121476static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_sqrt_ps(__m512 __A) {
1560_mm512_sqrt_ps(__m512 __A)1477 return (__m512)__builtin_elementwise_sqrt((__v16sf)__A);
1561{
1562 return (__m512)__builtin_ia32_sqrtps512((__v16sf)__A,
1563 _MM_FROUND_CUR_DIRECTION);
1564}1478}
15651479
1566static __inline__ __m512 __DEFAULT_FN_ATTRS5121480static __inline__ __m512 __DEFAULT_FN_ATTRS512
1567_mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A)1481_mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A) {
1568{1482 return (__m512)__builtin_ia32_selectps_512(__U, (__v16sf)_mm512_sqrt_ps(__A),
1569 return (__m512)__builtin_ia32_selectps_512(__U,
1570 (__v16sf)_mm512_sqrt_ps(__A),
1571 (__v16sf)__W);1483 (__v16sf)__W);
1572}1484}
15731485
1574static __inline__ __m512 __DEFAULT_FN_ATTRS5121486static __inline__ __m512 __DEFAULT_FN_ATTRS512
1575_mm512_maskz_sqrt_ps( __mmask16 __U, __m512 __A)1487_mm512_maskz_sqrt_ps(__mmask16 __U, __m512 __A) {
1576{1488 return (__m512)__builtin_ia32_selectps_512(__U, (__v16sf)_mm512_sqrt_ps(__A),
1577 return (__m512)__builtin_ia32_selectps_512(__U,
1578 (__v16sf)_mm512_sqrt_ps(__A),
1579 (__v16sf)_mm512_setzero_ps());1489 (__v16sf)_mm512_setzero_ps());
1580}1490}
15811491
...@@ -1866,58 +1776,52 @@ _mm512_mask_ceil_pd (__m512d __W, __mmask8 __U, __m512d __A)...@@ -1866,58 +1776,52 @@ _mm512_mask_ceil_pd (__m512d __W, __mmask8 __U, __m512d __A)
1866 _MM_FROUND_CUR_DIRECTION);1776 _MM_FROUND_CUR_DIRECTION);
1867}1777}
18681778
1869static __inline __m512i __DEFAULT_FN_ATTRS5121779static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1870_mm512_abs_epi64(__m512i __A)1780_mm512_abs_epi64(__m512i __A) {
1871{
1872 return (__m512i)__builtin_elementwise_abs((__v8di)__A);1781 return (__m512i)__builtin_elementwise_abs((__v8di)__A);
1873}1782}
18741783
1875static __inline__ __m512i __DEFAULT_FN_ATTRS5121784static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1876_mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A)1785_mm512_mask_abs_epi64(__m512i __W, __mmask8 __U, __m512i __A) {
1877{
1878 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,1786 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
1879 (__v8di)_mm512_abs_epi64(__A),1787 (__v8di)_mm512_abs_epi64(__A),
1880 (__v8di)__W);1788 (__v8di)__W);
1881}1789}
18821790
1883static __inline__ __m512i __DEFAULT_FN_ATTRS5121791static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1884_mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A)1792_mm512_maskz_abs_epi64(__mmask8 __U, __m512i __A) {
1885{
1886 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,1793 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
1887 (__v8di)_mm512_abs_epi64(__A),1794 (__v8di)_mm512_abs_epi64(__A),
1888 (__v8di)_mm512_setzero_si512());1795 (__v8di)_mm512_setzero_si512());
1889}1796}
18901797
1891static __inline __m512i __DEFAULT_FN_ATTRS5121798static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1892_mm512_abs_epi32(__m512i __A)1799_mm512_abs_epi32(__m512i __A) {
1893{
1894 return (__m512i)__builtin_elementwise_abs((__v16si) __A);1800 return (__m512i)__builtin_elementwise_abs((__v16si) __A);
1895}1801}
18961802
1897static __inline__ __m512i __DEFAULT_FN_ATTRS5121803static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1898_mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A)1804_mm512_mask_abs_epi32(__m512i __W, __mmask16 __U, __m512i __A) {
1899{
1900 return (__m512i)__builtin_ia32_selectd_512(__U,1805 return (__m512i)__builtin_ia32_selectd_512(__U,
1901 (__v16si)_mm512_abs_epi32(__A),1806 (__v16si)_mm512_abs_epi32(__A),
1902 (__v16si)__W);1807 (__v16si)__W);
1903}1808}
19041809
1905static __inline__ __m512i __DEFAULT_FN_ATTRS5121810static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
1906_mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A)1811_mm512_maskz_abs_epi32(__mmask16 __U, __m512i __A) {
1907{
1908 return (__m512i)__builtin_ia32_selectd_512(__U,1812 return (__m512i)__builtin_ia32_selectd_512(__U,
1909 (__v16si)_mm512_abs_epi32(__A),1813 (__v16si)_mm512_abs_epi32(__A),
1910 (__v16si)_mm512_setzero_si512());1814 (__v16si)_mm512_setzero_si512());
1911}1815}
19121816
1913static __inline__ __m128 __DEFAULT_FN_ATTRS1281817static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1914_mm_mask_add_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {1818_mm_mask_add_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
1915 __A = _mm_add_ss(__A, __B);1819 __A = _mm_add_ss(__A, __B);
1916 return __builtin_ia32_selectss_128(__U, __A, __W);1820 return __builtin_ia32_selectss_128(__U, __A, __W);
1917}1821}
19181822
1919static __inline__ __m128 __DEFAULT_FN_ATTRS1281823static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1920_mm_maskz_add_ss(__mmask8 __U,__m128 __A, __m128 __B) {1824_mm_maskz_add_ss(__mmask8 __U, __m128 __A, __m128 __B) {
1921 __A = _mm_add_ss(__A, __B);1825 __A = _mm_add_ss(__A, __B);
1922 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());1826 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());
1923}1827}
...@@ -1940,14 +1844,14 @@ _mm_maskz_add_ss(__mmask8 __U,__m128 __A, __m128 __B) {...@@ -1940,14 +1844,14 @@ _mm_maskz_add_ss(__mmask8 __U,__m128 __A, __m128 __B) {
1940 (__v4sf)_mm_setzero_ps(), \1844 (__v4sf)_mm_setzero_ps(), \
1941 (__mmask8)(U), (int)(R)))1845 (__mmask8)(U), (int)(R)))
19421846
1943static __inline__ __m128d __DEFAULT_FN_ATTRS1281847static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1944_mm_mask_add_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {1848_mm_mask_add_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
1945 __A = _mm_add_sd(__A, __B);1849 __A = _mm_add_sd(__A, __B);
1946 return __builtin_ia32_selectsd_128(__U, __A, __W);1850 return __builtin_ia32_selectsd_128(__U, __A, __W);
1947}1851}
19481852
1949static __inline__ __m128d __DEFAULT_FN_ATTRS1281853static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1950_mm_maskz_add_sd(__mmask8 __U,__m128d __A, __m128d __B) {1854_mm_maskz_add_sd(__mmask8 __U, __m128d __A, __m128d __B) {
1951 __A = _mm_add_sd(__A, __B);1855 __A = _mm_add_sd(__A, __B);
1952 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());1856 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());
1953}1857}
...@@ -1969,28 +1873,28 @@ _mm_maskz_add_sd(__mmask8 __U,__m128d __A, __m128d __B) {...@@ -1969,28 +1873,28 @@ _mm_maskz_add_sd(__mmask8 __U,__m128d __A, __m128d __B) {
1969 (__v2df)_mm_setzero_pd(), \1873 (__v2df)_mm_setzero_pd(), \
1970 (__mmask8)(U), (int)(R)))1874 (__mmask8)(U), (int)(R)))
19711875
1972static __inline__ __m512d __DEFAULT_FN_ATTRS5121876static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
1973_mm512_mask_add_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {1877_mm512_mask_add_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
1974 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,1878 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
1975 (__v8df)_mm512_add_pd(__A, __B),1879 (__v8df)_mm512_add_pd(__A, __B),
1976 (__v8df)__W);1880 (__v8df)__W);
1977}1881}
19781882
1979static __inline__ __m512d __DEFAULT_FN_ATTRS5121883static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
1980_mm512_maskz_add_pd(__mmask8 __U, __m512d __A, __m512d __B) {1884_mm512_maskz_add_pd(__mmask8 __U, __m512d __A, __m512d __B) {
1981 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,1885 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
1982 (__v8df)_mm512_add_pd(__A, __B),1886 (__v8df)_mm512_add_pd(__A, __B),
1983 (__v8df)_mm512_setzero_pd());1887 (__v8df)_mm512_setzero_pd());
1984}1888}
19851889
1986static __inline__ __m512 __DEFAULT_FN_ATTRS5121890static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1987_mm512_mask_add_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {1891_mm512_mask_add_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
1988 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,1892 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
1989 (__v16sf)_mm512_add_ps(__A, __B),1893 (__v16sf)_mm512_add_ps(__A, __B),
1990 (__v16sf)__W);1894 (__v16sf)__W);
1991}1895}
19921896
1993static __inline__ __m512 __DEFAULT_FN_ATTRS5121897static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
1994_mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) {1898_mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) {
1995 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,1899 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
1996 (__v16sf)_mm512_add_ps(__A, __B),1900 (__v16sf)_mm512_add_ps(__A, __B),
...@@ -2025,14 +1929,14 @@ _mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) {...@@ -2025,14 +1929,14 @@ _mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2025 (__v16sf)_mm512_add_round_ps((A), (B), (R)), \1929 (__v16sf)_mm512_add_round_ps((A), (B), (R)), \
2026 (__v16sf)_mm512_setzero_ps()))1930 (__v16sf)_mm512_setzero_ps()))
20271931
2028static __inline__ __m128 __DEFAULT_FN_ATTRS1281932static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2029_mm_mask_sub_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {1933_mm_mask_sub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2030 __A = _mm_sub_ss(__A, __B);1934 __A = _mm_sub_ss(__A, __B);
2031 return __builtin_ia32_selectss_128(__U, __A, __W);1935 return __builtin_ia32_selectss_128(__U, __A, __W);
2032}1936}
20331937
2034static __inline__ __m128 __DEFAULT_FN_ATTRS1281938static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2035_mm_maskz_sub_ss(__mmask8 __U,__m128 __A, __m128 __B) {1939_mm_maskz_sub_ss(__mmask8 __U, __m128 __A, __m128 __B) {
2036 __A = _mm_sub_ss(__A, __B);1940 __A = _mm_sub_ss(__A, __B);
2037 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());1941 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());
2038}1942}
...@@ -2054,14 +1958,14 @@ _mm_maskz_sub_ss(__mmask8 __U,__m128 __A, __m128 __B) {...@@ -2054,14 +1958,14 @@ _mm_maskz_sub_ss(__mmask8 __U,__m128 __A, __m128 __B) {
2054 (__v4sf)_mm_setzero_ps(), \1958 (__v4sf)_mm_setzero_ps(), \
2055 (__mmask8)(U), (int)(R)))1959 (__mmask8)(U), (int)(R)))
20561960
2057static __inline__ __m128d __DEFAULT_FN_ATTRS1281961static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2058_mm_mask_sub_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {1962_mm_mask_sub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2059 __A = _mm_sub_sd(__A, __B);1963 __A = _mm_sub_sd(__A, __B);
2060 return __builtin_ia32_selectsd_128(__U, __A, __W);1964 return __builtin_ia32_selectsd_128(__U, __A, __W);
2061}1965}
20621966
2063static __inline__ __m128d __DEFAULT_FN_ATTRS1281967static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2064_mm_maskz_sub_sd(__mmask8 __U,__m128d __A, __m128d __B) {1968_mm_maskz_sub_sd(__mmask8 __U, __m128d __A, __m128d __B) {
2065 __A = _mm_sub_sd(__A, __B);1969 __A = _mm_sub_sd(__A, __B);
2066 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());1970 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());
2067}1971}
...@@ -2084,28 +1988,28 @@ _mm_maskz_sub_sd(__mmask8 __U,__m128d __A, __m128d __B) {...@@ -2084,28 +1988,28 @@ _mm_maskz_sub_sd(__mmask8 __U,__m128d __A, __m128d __B) {
2084 (__v2df)_mm_setzero_pd(), \1988 (__v2df)_mm_setzero_pd(), \
2085 (__mmask8)(U), (int)(R)))1989 (__mmask8)(U), (int)(R)))
20861990
2087static __inline__ __m512d __DEFAULT_FN_ATTRS5121991static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2088_mm512_mask_sub_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {1992_mm512_mask_sub_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
2089 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,1993 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2090 (__v8df)_mm512_sub_pd(__A, __B),1994 (__v8df)_mm512_sub_pd(__A, __B),
2091 (__v8df)__W);1995 (__v8df)__W);
2092}1996}
20931997
2094static __inline__ __m512d __DEFAULT_FN_ATTRS5121998static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2095_mm512_maskz_sub_pd(__mmask8 __U, __m512d __A, __m512d __B) {1999_mm512_maskz_sub_pd(__mmask8 __U, __m512d __A, __m512d __B) {
2096 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,2000 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2097 (__v8df)_mm512_sub_pd(__A, __B),2001 (__v8df)_mm512_sub_pd(__A, __B),
2098 (__v8df)_mm512_setzero_pd());2002 (__v8df)_mm512_setzero_pd());
2099}2003}
21002004
2101static __inline__ __m512 __DEFAULT_FN_ATTRS5122005static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2102_mm512_mask_sub_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {2006_mm512_mask_sub_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
2103 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,2007 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2104 (__v16sf)_mm512_sub_ps(__A, __B),2008 (__v16sf)_mm512_sub_ps(__A, __B),
2105 (__v16sf)__W);2009 (__v16sf)__W);
2106}2010}
21072011
2108static __inline__ __m512 __DEFAULT_FN_ATTRS5122012static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2109_mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) {2013_mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2110 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,2014 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2111 (__v16sf)_mm512_sub_ps(__A, __B),2015 (__v16sf)_mm512_sub_ps(__A, __B),
...@@ -2140,14 +2044,14 @@ _mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) {...@@ -2140,14 +2044,14 @@ _mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2140 (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \2044 (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \
2141 (__v16sf)_mm512_setzero_ps()))2045 (__v16sf)_mm512_setzero_ps()))
21422046
2143static __inline__ __m128 __DEFAULT_FN_ATTRS1282047static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2144_mm_mask_mul_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {2048_mm_mask_mul_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2145 __A = _mm_mul_ss(__A, __B);2049 __A = _mm_mul_ss(__A, __B);
2146 return __builtin_ia32_selectss_128(__U, __A, __W);2050 return __builtin_ia32_selectss_128(__U, __A, __W);
2147}2051}
21482052
2149static __inline__ __m128 __DEFAULT_FN_ATTRS1282053static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2150_mm_maskz_mul_ss(__mmask8 __U,__m128 __A, __m128 __B) {2054_mm_maskz_mul_ss(__mmask8 __U, __m128 __A, __m128 __B) {
2151 __A = _mm_mul_ss(__A, __B);2055 __A = _mm_mul_ss(__A, __B);
2152 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());2056 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());
2153}2057}
...@@ -2169,14 +2073,14 @@ _mm_maskz_mul_ss(__mmask8 __U,__m128 __A, __m128 __B) {...@@ -2169,14 +2073,14 @@ _mm_maskz_mul_ss(__mmask8 __U,__m128 __A, __m128 __B) {
2169 (__v4sf)_mm_setzero_ps(), \2073 (__v4sf)_mm_setzero_ps(), \
2170 (__mmask8)(U), (int)(R)))2074 (__mmask8)(U), (int)(R)))
21712075
2172static __inline__ __m128d __DEFAULT_FN_ATTRS1282076static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2173_mm_mask_mul_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {2077_mm_mask_mul_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2174 __A = _mm_mul_sd(__A, __B);2078 __A = _mm_mul_sd(__A, __B);
2175 return __builtin_ia32_selectsd_128(__U, __A, __W);2079 return __builtin_ia32_selectsd_128(__U, __A, __W);
2176}2080}
21772081
2178static __inline__ __m128d __DEFAULT_FN_ATTRS1282082static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2179_mm_maskz_mul_sd(__mmask8 __U,__m128d __A, __m128d __B) {2083_mm_maskz_mul_sd(__mmask8 __U, __m128d __A, __m128d __B) {
2180 __A = _mm_mul_sd(__A, __B);2084 __A = _mm_mul_sd(__A, __B);
2181 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());2085 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());
2182}2086}
...@@ -2199,28 +2103,28 @@ _mm_maskz_mul_sd(__mmask8 __U,__m128d __A, __m128d __B) {...@@ -2199,28 +2103,28 @@ _mm_maskz_mul_sd(__mmask8 __U,__m128d __A, __m128d __B) {
2199 (__v2df)_mm_setzero_pd(), \2103 (__v2df)_mm_setzero_pd(), \
2200 (__mmask8)(U), (int)(R)))2104 (__mmask8)(U), (int)(R)))
22012105
2202static __inline__ __m512d __DEFAULT_FN_ATTRS5122106static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2203_mm512_mask_mul_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {2107_mm512_mask_mul_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
2204 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,2108 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2205 (__v8df)_mm512_mul_pd(__A, __B),2109 (__v8df)_mm512_mul_pd(__A, __B),
2206 (__v8df)__W);2110 (__v8df)__W);
2207}2111}
22082112
2209static __inline__ __m512d __DEFAULT_FN_ATTRS5122113static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2210_mm512_maskz_mul_pd(__mmask8 __U, __m512d __A, __m512d __B) {2114_mm512_maskz_mul_pd(__mmask8 __U, __m512d __A, __m512d __B) {
2211 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,2115 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2212 (__v8df)_mm512_mul_pd(__A, __B),2116 (__v8df)_mm512_mul_pd(__A, __B),
2213 (__v8df)_mm512_setzero_pd());2117 (__v8df)_mm512_setzero_pd());
2214}2118}
22152119
2216static __inline__ __m512 __DEFAULT_FN_ATTRS5122120static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2217_mm512_mask_mul_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {2121_mm512_mask_mul_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
2218 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,2122 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2219 (__v16sf)_mm512_mul_ps(__A, __B),2123 (__v16sf)_mm512_mul_ps(__A, __B),
2220 (__v16sf)__W);2124 (__v16sf)__W);
2221}2125}
22222126
2223static __inline__ __m512 __DEFAULT_FN_ATTRS5122127static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2224_mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) {2128_mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2225 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,2129 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2226 (__v16sf)_mm512_mul_ps(__A, __B),2130 (__v16sf)_mm512_mul_ps(__A, __B),
...@@ -2255,14 +2159,14 @@ _mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) {...@@ -2255,14 +2159,14 @@ _mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2255 (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \2159 (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \
2256 (__v16sf)_mm512_setzero_ps()))2160 (__v16sf)_mm512_setzero_ps()))
22572161
2258static __inline__ __m128 __DEFAULT_FN_ATTRS1282162static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2259_mm_mask_div_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) {2163_mm_mask_div_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2260 __A = _mm_div_ss(__A, __B);2164 __A = _mm_div_ss(__A, __B);
2261 return __builtin_ia32_selectss_128(__U, __A, __W);2165 return __builtin_ia32_selectss_128(__U, __A, __W);
2262}2166}
22632167
2264static __inline__ __m128 __DEFAULT_FN_ATTRS1282168static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2265_mm_maskz_div_ss(__mmask8 __U,__m128 __A, __m128 __B) {2169_mm_maskz_div_ss(__mmask8 __U, __m128 __A, __m128 __B) {
2266 __A = _mm_div_ss(__A, __B);2170 __A = _mm_div_ss(__A, __B);
2267 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());2171 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps());
2268}2172}
...@@ -2285,14 +2189,14 @@ _mm_maskz_div_ss(__mmask8 __U,__m128 __A, __m128 __B) {...@@ -2285,14 +2189,14 @@ _mm_maskz_div_ss(__mmask8 __U,__m128 __A, __m128 __B) {
2285 (__v4sf)_mm_setzero_ps(), \2189 (__v4sf)_mm_setzero_ps(), \
2286 (__mmask8)(U), (int)(R)))2190 (__mmask8)(U), (int)(R)))
22872191
2288static __inline__ __m128d __DEFAULT_FN_ATTRS1282192static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2289_mm_mask_div_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) {2193_mm_mask_div_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2290 __A = _mm_div_sd(__A, __B);2194 __A = _mm_div_sd(__A, __B);
2291 return __builtin_ia32_selectsd_128(__U, __A, __W);2195 return __builtin_ia32_selectsd_128(__U, __A, __W);
2292}2196}
22932197
2294static __inline__ __m128d __DEFAULT_FN_ATTRS1282198static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2295_mm_maskz_div_sd(__mmask8 __U,__m128d __A, __m128d __B) {2199_mm_maskz_div_sd(__mmask8 __U, __m128d __A, __m128d __B) {
2296 __A = _mm_div_sd(__A, __B);2200 __A = _mm_div_sd(__A, __B);
2297 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());2201 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd());
2298}2202}
...@@ -2315,40 +2219,38 @@ _mm_maskz_div_sd(__mmask8 __U,__m128d __A, __m128d __B) {...@@ -2315,40 +2219,38 @@ _mm_maskz_div_sd(__mmask8 __U,__m128d __A, __m128d __B) {
2315 (__v2df)_mm_setzero_pd(), \2219 (__v2df)_mm_setzero_pd(), \
2316 (__mmask8)(U), (int)(R)))2220 (__mmask8)(U), (int)(R)))
23172221
2318static __inline __m512d __DEFAULT_FN_ATTRS5122222static __inline __m512d
2319_mm512_div_pd(__m512d __a, __m512d __b)2223 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_div_pd(__m512d __a, __m512d __b) {
2320{
2321 return (__m512d)((__v8df)__a/(__v8df)__b);2224 return (__m512d)((__v8df)__a/(__v8df)__b);
2322}2225}
23232226
2324static __inline__ __m512d __DEFAULT_FN_ATTRS5122227static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2325_mm512_mask_div_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {2228_mm512_mask_div_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) {
2326 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,2229 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2327 (__v8df)_mm512_div_pd(__A, __B),2230 (__v8df)_mm512_div_pd(__A, __B),
2328 (__v8df)__W);2231 (__v8df)__W);
2329}2232}
23302233
2331static __inline__ __m512d __DEFAULT_FN_ATTRS5122234static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2332_mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) {2235_mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) {
2333 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,2236 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
2334 (__v8df)_mm512_div_pd(__A, __B),2237 (__v8df)_mm512_div_pd(__A, __B),
2335 (__v8df)_mm512_setzero_pd());2238 (__v8df)_mm512_setzero_pd());
2336}2239}
23372240
2338static __inline __m512 __DEFAULT_FN_ATTRS5122241static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2339_mm512_div_ps(__m512 __a, __m512 __b)2242_mm512_div_ps(__m512 __a, __m512 __b) {
2340{
2341 return (__m512)((__v16sf)__a/(__v16sf)__b);2243 return (__m512)((__v16sf)__a/(__v16sf)__b);
2342}2244}
23432245
2344static __inline__ __m512 __DEFAULT_FN_ATTRS5122246static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2345_mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {2247_mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) {
2346 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,2248 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2347 (__v16sf)_mm512_div_ps(__A, __B),2249 (__v16sf)_mm512_div_ps(__A, __B),
2348 (__v16sf)__W);2250 (__v16sf)__W);
2349}2251}
23502252
2351static __inline__ __m512 __DEFAULT_FN_ATTRS5122253static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2352_mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) {2254_mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2353 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,2255 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
2354 (__v16sf)_mm512_div_ps(__A, __B),2256 (__v16sf)_mm512_div_ps(__A, __B),
...@@ -2530,125 +2432,104 @@ _mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) {...@@ -2530,125 +2432,104 @@ _mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) {
2530 -(__v8df)(__m512d)(C), \2432 -(__v8df)(__m512d)(C), \
2531 (__mmask8)(U), (int)(R)))2433 (__mmask8)(U), (int)(R)))
25322434
2435static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2436_mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C) {
2437 return (__m512d)__builtin_elementwise_fma((__v8df)__A, (__v8df)__B,
2438 (__v8df)__C);
2439}
25332440
2534static __inline__ __m512d __DEFAULT_FN_ATTRS5122441static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2535_mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C)2442_mm512_mask_fmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {
2536{2443 return (__m512d)__builtin_ia32_selectpd_512(
2537 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,2444 (__mmask8)__U, (__v8df)_mm512_fmadd_pd(__A, __B, __C), (__v8df)__A);
2538 (__v8df) __B,
2539 (__v8df) __C,
2540 (__mmask8) -1,
2541 _MM_FROUND_CUR_DIRECTION);
2542}2445}
25432446
2544static __inline__ __m512d __DEFAULT_FN_ATTRS5122447static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2545_mm512_mask_fmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)2448_mm512_mask3_fmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {
2546{2449 return (__m512d)__builtin_ia32_selectpd_512(
2547 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,2450 (__mmask8)__U, (__v8df)_mm512_fmadd_pd(__A, __B, __C), (__v8df)__C);
2548 (__v8df) __B,
2549 (__v8df) __C,
2550 (__mmask8) __U,
2551 _MM_FROUND_CUR_DIRECTION);
2552}2451}
25532452
2554static __inline__ __m512d __DEFAULT_FN_ATTRS5122453static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2555_mm512_mask3_fmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)2454_mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {
2556{2455 return (__m512d)__builtin_ia32_selectpd_512(
2557 return (__m512d) __builtin_ia32_vfmaddpd512_mask3 ((__v8df) __A,2456 (__mmask8)__U, (__v8df)_mm512_fmadd_pd(__A, __B, __C),
2558 (__v8df) __B,2457 (__v8df)_mm512_setzero_pd());
2559 (__v8df) __C,
2560 (__mmask8) __U,
2561 _MM_FROUND_CUR_DIRECTION);
2562}2458}
25632459
2564static __inline__ __m512d __DEFAULT_FN_ATTRS5122460static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2565_mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)2461_mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C) {
2566{2462 return (__m512d)__builtin_elementwise_fma((__v8df)__A, (__v8df)__B,
2567 return (__m512d) __builtin_ia32_vfmaddpd512_maskz ((__v8df) __A,2463 -(__v8df)__C);
2568 (__v8df) __B,
2569 (__v8df) __C,
2570 (__mmask8) __U,
2571 _MM_FROUND_CUR_DIRECTION);
2572}2464}
25732465
2574static __inline__ __m512d __DEFAULT_FN_ATTRS5122466static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2575_mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C)2467_mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {
2576{2468 return (__m512d)__builtin_ia32_selectpd_512(
2577 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,2469 (__mmask8)__U, (__v8df)_mm512_fmsub_pd(__A, __B, __C), (__v8df)__A);
2578 (__v8df) __B,
2579 -(__v8df) __C,
2580 (__mmask8) -1,
2581 _MM_FROUND_CUR_DIRECTION);
2582}2470}
25832471
2584static __inline__ __m512d __DEFAULT_FN_ATTRS5122472static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2585_mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)2473_mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {
2586{2474 return (__m512d)__builtin_ia32_selectpd_512(
2587 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,2475 (__mmask8)__U, (__v8df)_mm512_fmsub_pd(__A, __B, __C), (__v8df)__C);
2588 (__v8df) __B,
2589 -(__v8df) __C,
2590 (__mmask8) __U,
2591 _MM_FROUND_CUR_DIRECTION);
2592}2476}
25932477
2594static __inline__ __m512d __DEFAULT_FN_ATTRS5122478static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2595_mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)2479_mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {
2596{2480 return (__m512d)__builtin_ia32_selectpd_512(
2597 return (__m512d) __builtin_ia32_vfmaddpd512_maskz ((__v8df) __A,2481 (__mmask8)__U, (__v8df)_mm512_fmsub_pd(__A, __B, __C),
2598 (__v8df) __B,2482 (__v8df)_mm512_setzero_pd());
2599 -(__v8df) __C,
2600 (__mmask8) __U,
2601 _MM_FROUND_CUR_DIRECTION);
2602}2483}
26032484
2604static __inline__ __m512d __DEFAULT_FN_ATTRS5122485static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2605_mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C)2486_mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C) {
2606{2487 return (__m512d)__builtin_elementwise_fma(-(__v8df)__A, (__v8df)__B,
2607 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,2488 (__v8df)__C);
2608 -(__v8df) __B,
2609 (__v8df) __C,
2610 (__mmask8) -1,
2611 _MM_FROUND_CUR_DIRECTION);
2612}2489}
26132490
2614static __inline__ __m512d __DEFAULT_FN_ATTRS5122491static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2615_mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)2492_mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {
2616{2493 return (__m512d)__builtin_ia32_selectpd_512(
2617 return (__m512d) __builtin_ia32_vfmaddpd512_mask3 (-(__v8df) __A,2494 (__mmask8)__U, (__v8df)_mm512_fnmadd_pd(__A, __B, __C), (__v8df)__A);
2618 (__v8df) __B,
2619 (__v8df) __C,
2620 (__mmask8) __U,
2621 _MM_FROUND_CUR_DIRECTION);
2622}2495}
26232496
2624static __inline__ __m512d __DEFAULT_FN_ATTRS5122497static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2625_mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)2498_mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {
2626{2499 return (__m512d)__builtin_ia32_selectpd_512(
2627 return (__m512d) __builtin_ia32_vfmaddpd512_maskz (-(__v8df) __A,2500 (__mmask8)__U, (__v8df)_mm512_fnmadd_pd(__A, __B, __C), (__v8df)__C);
2628 (__v8df) __B,
2629 (__v8df) __C,
2630 (__mmask8) __U,
2631 _MM_FROUND_CUR_DIRECTION);
2632}2501}
26332502
2634static __inline__ __m512d __DEFAULT_FN_ATTRS5122503static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2635_mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C)2504_mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {
2636{2505 return (__m512d)__builtin_ia32_selectpd_512(
2637 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,2506 (__mmask8)__U, (__v8df)_mm512_fnmadd_pd(__A, __B, __C),
2638 -(__v8df) __B,2507 (__v8df)_mm512_setzero_pd());
2639 -(__v8df) __C,
2640 (__mmask8) -1,
2641 _MM_FROUND_CUR_DIRECTION);
2642}2508}
26432509
2644static __inline__ __m512d __DEFAULT_FN_ATTRS5122510static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2645_mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)2511_mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C) {
2646{2512 return (__m512d)__builtin_elementwise_fma(-(__v8df)__A, (__v8df)__B,
2647 return (__m512d) __builtin_ia32_vfmaddpd512_maskz (-(__v8df) __A,2513 -(__v8df)__C);
2648 (__v8df) __B,2514}
2649 -(__v8df) __C,2515
2650 (__mmask8) __U,2516static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2651 _MM_FROUND_CUR_DIRECTION);2517_mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) {
2518 return (__m512d)__builtin_ia32_selectpd_512(
2519 (__mmask8)__U, (__v8df)_mm512_fnmsub_pd(__A, __B, __C), (__v8df)__A);
2520}
2521
2522static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2523_mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) {
2524 return (__m512d)__builtin_ia32_selectpd_512(
2525 (__mmask8)__U, (__v8df)_mm512_fnmsub_pd(__A, __B, __C), (__v8df)__C);
2526}
2527
2528static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
2529_mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) {
2530 return (__m512d)__builtin_ia32_selectpd_512(
2531 (__mmask8)__U, (__v8df)_mm512_fnmsub_pd(__A, __B, __C),
2532 (__v8df)_mm512_setzero_pd());
2652}2533}
26532534
2654#define _mm512_fmadd_round_ps(A, B, C, R) \2535#define _mm512_fmadd_round_ps(A, B, C, R) \
...@@ -2734,125 +2615,104 @@ _mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)...@@ -2734,125 +2615,104 @@ _mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C)
2734 -(__v16sf)(__m512)(C), \2615 -(__v16sf)(__m512)(C), \
2735 (__mmask16)(U), (int)(R)))2616 (__mmask16)(U), (int)(R)))
27362617
2618static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2619_mm512_fmadd_ps(__m512 __A, __m512 __B, __m512 __C) {
2620 return (__m512)__builtin_elementwise_fma((__v16sf)__A, (__v16sf)__B,
2621 (__v16sf)__C);
2622}
27372623
2738static __inline__ __m512 __DEFAULT_FN_ATTRS5122624static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2739_mm512_fmadd_ps(__m512 __A, __m512 __B, __m512 __C)2625_mm512_mask_fmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {
2740{2626 return (__m512)__builtin_ia32_selectps_512(
2741 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,2627 (__mmask16)__U, (__v16sf)_mm512_fmadd_ps(__A, __B, __C), (__v16sf)__A);
2742 (__v16sf) __B,
2743 (__v16sf) __C,
2744 (__mmask16) -1,
2745 _MM_FROUND_CUR_DIRECTION);
2746}2628}
27472629
2748static __inline__ __m512 __DEFAULT_FN_ATTRS5122630static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2749_mm512_mask_fmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)2631_mm512_mask3_fmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {
2750{2632 return (__m512)__builtin_ia32_selectps_512(
2751 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,2633 (__mmask16)__U, (__v16sf)_mm512_fmadd_ps(__A, __B, __C), (__v16sf)__C);
2752 (__v16sf) __B,
2753 (__v16sf) __C,
2754 (__mmask16) __U,
2755 _MM_FROUND_CUR_DIRECTION);
2756}2634}
27572635
2758static __inline__ __m512 __DEFAULT_FN_ATTRS5122636static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2759_mm512_mask3_fmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)2637_mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {
2760{2638 return (__m512)__builtin_ia32_selectps_512(
2761 return (__m512) __builtin_ia32_vfmaddps512_mask3 ((__v16sf) __A,2639 (__mmask16)__U, (__v16sf)_mm512_fmadd_ps(__A, __B, __C),
2762 (__v16sf) __B,2640 (__v16sf)_mm512_setzero_ps());
2763 (__v16sf) __C,
2764 (__mmask16) __U,
2765 _MM_FROUND_CUR_DIRECTION);
2766}2641}
27672642
2768static __inline__ __m512 __DEFAULT_FN_ATTRS5122643static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2769_mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)2644_mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C) {
2770{2645 return (__m512)__builtin_elementwise_fma((__v16sf)__A, (__v16sf)__B,
2771 return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A,2646 -(__v16sf)__C);
2772 (__v16sf) __B,
2773 (__v16sf) __C,
2774 (__mmask16) __U,
2775 _MM_FROUND_CUR_DIRECTION);
2776}2647}
27772648
2778static __inline__ __m512 __DEFAULT_FN_ATTRS5122649static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2779_mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C)2650_mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {
2780{2651 return (__m512)__builtin_ia32_selectps_512(
2781 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,2652 (__mmask16)__U, (__v16sf)_mm512_fmsub_ps(__A, __B, __C), (__v16sf)__A);
2782 (__v16sf) __B,
2783 -(__v16sf) __C,
2784 (__mmask16) -1,
2785 _MM_FROUND_CUR_DIRECTION);
2786}2653}
27872654
2788static __inline__ __m512 __DEFAULT_FN_ATTRS5122655static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2789_mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)2656_mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {
2790{2657 return (__m512)__builtin_ia32_selectps_512(
2791 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,2658 (__mmask16)__U, (__v16sf)_mm512_fmsub_ps(__A, __B, __C), (__v16sf)__C);
2792 (__v16sf) __B,2659}
2793 -(__v16sf) __C,2660
2794 (__mmask16) __U,2661static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2795 _MM_FROUND_CUR_DIRECTION);2662_mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {
2663 return (__m512)__builtin_ia32_selectps_512(
2664 (__mmask16)__U, (__v16sf)_mm512_fmsub_ps(__A, __B, __C),
2665 (__v16sf)_mm512_setzero_ps());
2666}
2667
2668static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2669_mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C) {
2670 return (__m512)__builtin_elementwise_fma(-(__v16sf)__A, (__v16sf)__B,
2671 (__v16sf)__C);
2796}2672}
27972673
2798static __inline__ __m512 __DEFAULT_FN_ATTRS5122674static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2799_mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)2675_mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {
2800{2676 return (__m512)__builtin_ia32_selectps_512(
2801 return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A,2677 (__mmask16)__U, (__v16sf)_mm512_fnmadd_ps(__A, __B, __C), (__v16sf)__A);
2802 (__v16sf) __B,
2803 -(__v16sf) __C,
2804 (__mmask16) __U,
2805 _MM_FROUND_CUR_DIRECTION);
2806}2678}
28072679
2808static __inline__ __m512 __DEFAULT_FN_ATTRS5122680static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2809_mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C)2681_mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {
2810{2682 return (__m512)__builtin_ia32_selectps_512(
2811 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,2683 (__mmask16)__U, (__v16sf)_mm512_fnmadd_ps(__A, __B, __C), (__v16sf)__C);
2812 -(__v16sf) __B,
2813 (__v16sf) __C,
2814 (__mmask16) -1,
2815 _MM_FROUND_CUR_DIRECTION);
2816}2684}
28172685
2818static __inline__ __m512 __DEFAULT_FN_ATTRS5122686static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2819_mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)2687_mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {
2820{2688 return (__m512)__builtin_ia32_selectps_512(
2821 return (__m512) __builtin_ia32_vfmaddps512_mask3 (-(__v16sf) __A,2689 (__mmask16)__U, (__v16sf)_mm512_fnmadd_ps(__A, __B, __C),
2822 (__v16sf) __B,2690 (__v16sf)_mm512_setzero_ps());
2823 (__v16sf) __C,
2824 (__mmask16) __U,
2825 _MM_FROUND_CUR_DIRECTION);
2826}2691}
28272692
2828static __inline__ __m512 __DEFAULT_FN_ATTRS5122693static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2829_mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)2694_mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C) {
2830{2695 return (__m512)__builtin_elementwise_fma(-(__v16sf)__A, (__v16sf)__B,
2831 return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A,2696 -(__v16sf)__C);
2832 (__v16sf) __B,
2833 (__v16sf) __C,
2834 (__mmask16) __U,
2835 _MM_FROUND_CUR_DIRECTION);
2836}2697}
28372698
2838static __inline__ __m512 __DEFAULT_FN_ATTRS5122699static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2839_mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C)2700_mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) {
2840{2701 return (__m512)__builtin_ia32_selectps_512(
2841 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,2702 (__mmask16)__U, (__v16sf)_mm512_fnmsub_ps(__A, __B, __C), (__v16sf)__A);
2842 -(__v16sf) __B,
2843 -(__v16sf) __C,
2844 (__mmask16) -1,
2845 _MM_FROUND_CUR_DIRECTION);
2846}2703}
28472704
2848static __inline__ __m512 __DEFAULT_FN_ATTRS5122705static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2849_mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)2706_mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) {
2850{2707 return (__m512)__builtin_ia32_selectps_512(
2851 return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A,2708 (__mmask16)__U, (__v16sf)_mm512_fnmsub_ps(__A, __B, __C), (__v16sf)__C);
2852 (__v16sf) __B,2709}
2853 -(__v16sf) __C,2710
2854 (__mmask16) __U,2711static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
2855 _MM_FROUND_CUR_DIRECTION);2712_mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) {
2713 return (__m512)__builtin_ia32_selectps_512(
2714 (__mmask16)__U, (__v16sf)_mm512_fnmsub_ps(__A, __B, __C),
2715 (__v16sf)_mm512_setzero_ps());
2856}2716}
28572717
2858#define _mm512_fmaddsub_round_pd(A, B, C, R) \2718#define _mm512_fmaddsub_round_pd(A, B, C, R) \
...@@ -3099,33 +2959,12 @@ _mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)...@@ -3099,33 +2959,12 @@ _mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C)
3099 (__v8df)(__m512d)(C), \2959 (__v8df)(__m512d)(C), \
3100 (__mmask8)(U), (int)(R)))2960 (__mmask8)(U), (int)(R)))
31012961
3102
3103static __inline__ __m512d __DEFAULT_FN_ATTRS512
3104_mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
3105{
3106 return (__m512d)__builtin_ia32_vfmsubpd512_mask3 ((__v8df) __A,
3107 (__v8df) __B,
3108 (__v8df) __C,
3109 (__mmask8) __U,
3110 _MM_FROUND_CUR_DIRECTION);
3111}
3112
3113#define _mm512_mask3_fmsub_round_ps(A, B, C, U, R) \2962#define _mm512_mask3_fmsub_round_ps(A, B, C, U, R) \
3114 ((__m512)__builtin_ia32_vfmsubps512_mask3((__v16sf)(__m512)(A), \2963 ((__m512)__builtin_ia32_vfmsubps512_mask3((__v16sf)(__m512)(A), \
3115 (__v16sf)(__m512)(B), \2964 (__v16sf)(__m512)(B), \
3116 (__v16sf)(__m512)(C), \2965 (__v16sf)(__m512)(C), \
3117 (__mmask16)(U), (int)(R)))2966 (__mmask16)(U), (int)(R)))
31182967
3119static __inline__ __m512 __DEFAULT_FN_ATTRS512
3120_mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
3121{
3122 return (__m512)__builtin_ia32_vfmsubps512_mask3 ((__v16sf) __A,
3123 (__v16sf) __B,
3124 (__v16sf) __C,
3125 (__mmask16) __U,
3126 _MM_FROUND_CUR_DIRECTION);
3127}
3128
3129#define _mm512_mask3_fmsubadd_round_pd(A, B, C, U, R) \2968#define _mm512_mask3_fmsubadd_round_pd(A, B, C, U, R) \
3130 ((__m512d)__builtin_ia32_vfmsubaddpd512_mask3((__v8df)(__m512d)(A), \2969 ((__m512d)__builtin_ia32_vfmsubaddpd512_mask3((__v8df)(__m512d)(A), \
3131 (__v8df)(__m512d)(B), \2970 (__v8df)(__m512d)(B), \
...@@ -3166,34 +3005,12 @@ _mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)...@@ -3166,34 +3005,12 @@ _mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
3166 (__v8df)(__m512d)(C), \3005 (__v8df)(__m512d)(C), \
3167 (__mmask8)(U), (int)(R)))3006 (__mmask8)(U), (int)(R)))
31683007
3169
3170static __inline__ __m512d __DEFAULT_FN_ATTRS512
3171_mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)
3172{
3173 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
3174 -(__v8df) __B,
3175 (__v8df) __C,
3176 (__mmask8) __U,
3177 _MM_FROUND_CUR_DIRECTION);
3178}
3179
3180#define _mm512_mask_fnmadd_round_ps(A, U, B, C, R) \3008#define _mm512_mask_fnmadd_round_ps(A, U, B, C, R) \
3181 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \3009 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
3182 -(__v16sf)(__m512)(B), \3010 -(__v16sf)(__m512)(B), \
3183 (__v16sf)(__m512)(C), \3011 (__v16sf)(__m512)(C), \
3184 (__mmask16)(U), (int)(R)))3012 (__mmask16)(U), (int)(R)))
31853013
3186
3187static __inline__ __m512 __DEFAULT_FN_ATTRS512
3188_mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
3189{
3190 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
3191 -(__v16sf) __B,
3192 (__v16sf) __C,
3193 (__mmask16) __U,
3194 _MM_FROUND_CUR_DIRECTION);
3195}
3196
3197#define _mm512_mask_fnmsub_round_pd(A, U, B, C, R) \3014#define _mm512_mask_fnmsub_round_pd(A, U, B, C, R) \
3198 ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \3015 ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \
3199 -(__v8df)(__m512d)(B), \3016 -(__v8df)(__m512d)(B), \
...@@ -3207,27 +3024,6 @@ _mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)...@@ -3207,27 +3024,6 @@ _mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
3207 (__v8df)(__m512d)(C), \3024 (__v8df)(__m512d)(C), \
3208 (__mmask8)(U), (int)(R)))3025 (__mmask8)(U), (int)(R)))
32093026
3210
3211static __inline__ __m512d __DEFAULT_FN_ATTRS512
3212_mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C)
3213{
3214 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A,
3215 -(__v8df) __B,
3216 -(__v8df) __C,
3217 (__mmask8) __U,
3218 _MM_FROUND_CUR_DIRECTION);
3219}
3220
3221static __inline__ __m512d __DEFAULT_FN_ATTRS512
3222_mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
3223{
3224 return (__m512d) __builtin_ia32_vfmsubpd512_mask3 (-(__v8df) __A,
3225 (__v8df) __B,
3226 (__v8df) __C,
3227 (__mmask8) __U,
3228 _MM_FROUND_CUR_DIRECTION);
3229}
3230
3231#define _mm512_mask_fnmsub_round_ps(A, U, B, C, R) \3027#define _mm512_mask_fnmsub_round_ps(A, U, B, C, R) \
3232 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \3028 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \
3233 -(__v16sf)(__m512)(B), \3029 -(__v16sf)(__m512)(B), \
...@@ -3241,94 +3037,63 @@ _mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)...@@ -3241,94 +3037,63 @@ _mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U)
3241 (__v16sf)(__m512)(C), \3037 (__v16sf)(__m512)(C), \
3242 (__mmask16)(U), (int)(R)))3038 (__mmask16)(U), (int)(R)))
32433039
3244
3245static __inline__ __m512 __DEFAULT_FN_ATTRS512
3246_mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C)
3247{
3248 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A,
3249 -(__v16sf) __B,
3250 -(__v16sf) __C,
3251 (__mmask16) __U,
3252 _MM_FROUND_CUR_DIRECTION);
3253}
3254
3255static __inline__ __m512 __DEFAULT_FN_ATTRS512
3256_mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U)
3257{
3258 return (__m512) __builtin_ia32_vfmsubps512_mask3 (-(__v16sf) __A,
3259 (__v16sf) __B,
3260 (__v16sf) __C,
3261 (__mmask16) __U,
3262 _MM_FROUND_CUR_DIRECTION);
3263}
3264
3265
3266
3267/* Vector permutations */3040/* Vector permutations */
32683041
3269static __inline __m512i __DEFAULT_FN_ATTRS5123042static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3270_mm512_permutex2var_epi32(__m512i __A, __m512i __I, __m512i __B)3043_mm512_permutex2var_epi32(__m512i __A, __m512i __I, __m512i __B) {
3271{
3272 return (__m512i)__builtin_ia32_vpermi2vard512((__v16si)__A, (__v16si) __I,3044 return (__m512i)__builtin_ia32_vpermi2vard512((__v16si)__A, (__v16si) __I,
3273 (__v16si) __B);3045 (__v16si) __B);
3274}3046}
32753047
3276static __inline__ __m512i __DEFAULT_FN_ATTRS5123048static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3277_mm512_mask_permutex2var_epi32(__m512i __A, __mmask16 __U, __m512i __I,3049_mm512_mask_permutex2var_epi32(__m512i __A, __mmask16 __U, __m512i __I,
3278 __m512i __B)3050 __m512i __B) {
3279{
3280 return (__m512i)__builtin_ia32_selectd_512(__U,3051 return (__m512i)__builtin_ia32_selectd_512(__U,
3281 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),3052 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),
3282 (__v16si)__A);3053 (__v16si)__A);
3283}3054}
32843055
3285static __inline__ __m512i __DEFAULT_FN_ATTRS5123056static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3286_mm512_mask2_permutex2var_epi32(__m512i __A, __m512i __I, __mmask16 __U,3057_mm512_mask2_permutex2var_epi32(__m512i __A, __m512i __I, __mmask16 __U,
3287 __m512i __B)3058 __m512i __B) {
3288{
3289 return (__m512i)__builtin_ia32_selectd_512(__U,3059 return (__m512i)__builtin_ia32_selectd_512(__U,
3290 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),3060 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),
3291 (__v16si)__I);3061 (__v16si)__I);
3292}3062}
32933063
3294static __inline__ __m512i __DEFAULT_FN_ATTRS5123064static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3295_mm512_maskz_permutex2var_epi32(__mmask16 __U, __m512i __A, __m512i __I,3065_mm512_maskz_permutex2var_epi32(__mmask16 __U, __m512i __A, __m512i __I,
3296 __m512i __B)3066 __m512i __B) {
3297{
3298 return (__m512i)__builtin_ia32_selectd_512(__U,3067 return (__m512i)__builtin_ia32_selectd_512(__U,
3299 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),3068 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B),
3300 (__v16si)_mm512_setzero_si512());3069 (__v16si)_mm512_setzero_si512());
3301}3070}
33023071
3303static __inline __m512i __DEFAULT_FN_ATTRS5123072static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3304_mm512_permutex2var_epi64(__m512i __A, __m512i __I, __m512i __B)3073_mm512_permutex2var_epi64(__m512i __A, __m512i __I, __m512i __B) {
3305{
3306 return (__m512i)__builtin_ia32_vpermi2varq512((__v8di)__A, (__v8di) __I,3074 return (__m512i)__builtin_ia32_vpermi2varq512((__v8di)__A, (__v8di) __I,
3307 (__v8di) __B);3075 (__v8di) __B);
3308}3076}
33093077
3310static __inline__ __m512i __DEFAULT_FN_ATTRS5123078static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3311_mm512_mask_permutex2var_epi64(__m512i __A, __mmask8 __U, __m512i __I,3079_mm512_mask_permutex2var_epi64(__m512i __A, __mmask8 __U, __m512i __I,
3312 __m512i __B)3080 __m512i __B) {
3313{
3314 return (__m512i)__builtin_ia32_selectq_512(__U,3081 return (__m512i)__builtin_ia32_selectq_512(__U,
3315 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),3082 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),
3316 (__v8di)__A);3083 (__v8di)__A);
3317}3084}
33183085
3319static __inline__ __m512i __DEFAULT_FN_ATTRS5123086static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3320_mm512_mask2_permutex2var_epi64(__m512i __A, __m512i __I, __mmask8 __U,3087_mm512_mask2_permutex2var_epi64(__m512i __A, __m512i __I, __mmask8 __U,
3321 __m512i __B)3088 __m512i __B) {
3322{
3323 return (__m512i)__builtin_ia32_selectq_512(__U,3089 return (__m512i)__builtin_ia32_selectq_512(__U,
3324 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),3090 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),
3325 (__v8di)__I);3091 (__v8di)__I);
3326}3092}
33273093
3328static __inline__ __m512i __DEFAULT_FN_ATTRS5123094static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3329_mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,3095_mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,
3330 __m512i __B)3096 __m512i __B) {
3331{
3332 return (__m512i)__builtin_ia32_selectq_512(__U,3097 return (__m512i)__builtin_ia32_selectq_512(__U,
3333 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),3098 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B),
3334 (__v8di)_mm512_setzero_si512());3099 (__v8di)_mm512_setzero_si512());
...@@ -3363,10 +3128,10 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,...@@ -3363,10 +3128,10 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,
3363 (__v16si)_mm512_setzero_si512()))3128 (__v16si)_mm512_setzero_si512()))
3364/* Vector Extract */3129/* Vector Extract */
33653130
3366#define _mm512_extractf64x4_pd(A, I) \3131#define _mm512_extractf64x4_pd(A, I) \
3367 ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(I), \3132 ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(I), \
3368 (__v4df)_mm256_undefined_pd(), \3133 (__v4df)_mm256_setzero_pd(), \
3369 (__mmask8)-1))3134 (__mmask8) - 1))
33703135
3371#define _mm512_mask_extractf64x4_pd(W, U, A, imm) \3136#define _mm512_mask_extractf64x4_pd(W, U, A, imm) \
3372 ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(imm), \3137 ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(imm), \
...@@ -3378,10 +3143,10 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,...@@ -3378,10 +3143,10 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,
3378 (__v4df)_mm256_setzero_pd(), \3143 (__v4df)_mm256_setzero_pd(), \
3379 (__mmask8)(U)))3144 (__mmask8)(U)))
33803145
3381#define _mm512_extractf32x4_ps(A, I) \3146#define _mm512_extractf32x4_ps(A, I) \
3382 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(I), \3147 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(I), \
3383 (__v4sf)_mm_undefined_ps(), \3148 (__v4sf)_mm_setzero_ps(), \
3384 (__mmask8)-1))3149 (__mmask8) - 1))
33853150
3386#define _mm512_mask_extractf32x4_ps(W, U, A, imm) \3151#define _mm512_mask_extractf32x4_ps(W, U, A, imm) \
3387 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \3152 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \
...@@ -3395,33 +3160,29 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,...@@ -3395,33 +3160,29 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I,
33953160
3396/* Vector Blend */3161/* Vector Blend */
33973162
3398static __inline __m512d __DEFAULT_FN_ATTRS5123163static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3399_mm512_mask_blend_pd(__mmask8 __U, __m512d __A, __m512d __W)3164_mm512_mask_blend_pd(__mmask8 __U, __m512d __A, __m512d __W) {
3400{
3401 return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U,3165 return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U,
3402 (__v8df) __W,3166 (__v8df) __W,
3403 (__v8df) __A);3167 (__v8df) __A);
3404}3168}
34053169
3406static __inline __m512 __DEFAULT_FN_ATTRS5123170static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
3407_mm512_mask_blend_ps(__mmask16 __U, __m512 __A, __m512 __W)3171_mm512_mask_blend_ps(__mmask16 __U, __m512 __A, __m512 __W) {
3408{
3409 return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U,3172 return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U,
3410 (__v16sf) __W,3173 (__v16sf) __W,
3411 (__v16sf) __A);3174 (__v16sf) __A);
3412}3175}
34133176
3414static __inline __m512i __DEFAULT_FN_ATTRS5123177static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3415_mm512_mask_blend_epi64(__mmask8 __U, __m512i __A, __m512i __W)3178_mm512_mask_blend_epi64(__mmask8 __U, __m512i __A, __m512i __W) {
3416{
3417 return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U,3179 return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U,
3418 (__v8di) __W,3180 (__v8di) __W,
3419 (__v8di) __A);3181 (__v8di) __A);
3420}3182}
34213183
3422static __inline __m512i __DEFAULT_FN_ATTRS5123184static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
3423_mm512_mask_blend_epi32(__mmask16 __U, __m512i __A, __m512i __W)3185_mm512_mask_blend_epi32(__mmask16 __U, __m512i __A, __m512i __W) {
3424{
3425 return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U,3186 return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U,
3426 (__v16si) __W,3187 (__v16si) __W,
3427 (__v16si) __A);3188 (__v16si) __A);
...@@ -3615,115 +3376,99 @@ _mm512_maskz_cvttps_epu32 (__mmask16 __U, __m512 __A)...@@ -3615,115 +3376,99 @@ _mm512_maskz_cvttps_epu32 (__mmask16 __U, __m512 __A)
3615 (__v16sf)_mm512_setzero_ps(), \3376 (__v16sf)_mm512_setzero_ps(), \
3616 (__mmask16)(U), (int)(R)))3377 (__mmask16)(U), (int)(R)))
36173378
3618static __inline__ __m512 __DEFAULT_FN_ATTRS5123379static __inline__ __m512
3619_mm512_cvtepu32_ps (__m512i __A)3380 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_cvtepu32_ps(__m512i __A) {
3620{
3621 return (__m512)__builtin_convertvector((__v16su)__A, __v16sf);3381 return (__m512)__builtin_convertvector((__v16su)__A, __v16sf);
3622}3382}
36233383
3624static __inline__ __m512 __DEFAULT_FN_ATTRS5123384static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
3625_mm512_mask_cvtepu32_ps (__m512 __W, __mmask16 __U, __m512i __A)3385_mm512_mask_cvtepu32_ps(__m512 __W, __mmask16 __U, __m512i __A) {
3626{
3627 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,3386 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
3628 (__v16sf)_mm512_cvtepu32_ps(__A),3387 (__v16sf)_mm512_cvtepu32_ps(__A),
3629 (__v16sf)__W);3388 (__v16sf)__W);
3630}3389}
36313390
3632static __inline__ __m512 __DEFAULT_FN_ATTRS5123391static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
3633_mm512_maskz_cvtepu32_ps (__mmask16 __U, __m512i __A)3392_mm512_maskz_cvtepu32_ps(__mmask16 __U, __m512i __A) {
3634{
3635 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,3393 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
3636 (__v16sf)_mm512_cvtepu32_ps(__A),3394 (__v16sf)_mm512_cvtepu32_ps(__A),
3637 (__v16sf)_mm512_setzero_ps());3395 (__v16sf)_mm512_setzero_ps());
3638}3396}
36393397
3640static __inline __m512d __DEFAULT_FN_ATTRS5123398static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3641_mm512_cvtepi32_pd(__m256i __A)3399_mm512_cvtepi32_pd(__m256i __A) {
3642{
3643 return (__m512d)__builtin_convertvector((__v8si)__A, __v8df);3400 return (__m512d)__builtin_convertvector((__v8si)__A, __v8df);
3644}3401}
36453402
3646static __inline__ __m512d __DEFAULT_FN_ATTRS5123403static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3647_mm512_mask_cvtepi32_pd (__m512d __W, __mmask8 __U, __m256i __A)3404_mm512_mask_cvtepi32_pd(__m512d __W, __mmask8 __U, __m256i __A) {
3648{
3649 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,3405 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
3650 (__v8df)_mm512_cvtepi32_pd(__A),3406 (__v8df)_mm512_cvtepi32_pd(__A),
3651 (__v8df)__W);3407 (__v8df)__W);
3652}3408}
36533409
3654static __inline__ __m512d __DEFAULT_FN_ATTRS5123410static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3655_mm512_maskz_cvtepi32_pd (__mmask8 __U, __m256i __A)3411_mm512_maskz_cvtepi32_pd(__mmask8 __U, __m256i __A) {
3656{
3657 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,3412 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
3658 (__v8df)_mm512_cvtepi32_pd(__A),3413 (__v8df)_mm512_cvtepi32_pd(__A),
3659 (__v8df)_mm512_setzero_pd());3414 (__v8df)_mm512_setzero_pd());
3660}3415}
36613416
3662static __inline__ __m512d __DEFAULT_FN_ATTRS5123417static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3663_mm512_cvtepi32lo_pd(__m512i __A)3418_mm512_cvtepi32lo_pd(__m512i __A) {
3664{
3665 return (__m512d) _mm512_cvtepi32_pd(_mm512_castsi512_si256(__A));3419 return (__m512d) _mm512_cvtepi32_pd(_mm512_castsi512_si256(__A));
3666}3420}
36673421
3668static __inline__ __m512d __DEFAULT_FN_ATTRS5123422static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3669_mm512_mask_cvtepi32lo_pd(__m512d __W, __mmask8 __U,__m512i __A)3423_mm512_mask_cvtepi32lo_pd(__m512d __W, __mmask8 __U, __m512i __A) {
3670{
3671 return (__m512d) _mm512_mask_cvtepi32_pd(__W, __U, _mm512_castsi512_si256(__A));3424 return (__m512d) _mm512_mask_cvtepi32_pd(__W, __U, _mm512_castsi512_si256(__A));
3672}3425}
36733426
3674static __inline__ __m512 __DEFAULT_FN_ATTRS5123427static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
3675_mm512_cvtepi32_ps (__m512i __A)3428_mm512_cvtepi32_ps(__m512i __A) {
3676{
3677 return (__m512)__builtin_convertvector((__v16si)__A, __v16sf);3429 return (__m512)__builtin_convertvector((__v16si)__A, __v16sf);
3678}3430}
36793431
3680static __inline__ __m512 __DEFAULT_FN_ATTRS5123432static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
3681_mm512_mask_cvtepi32_ps (__m512 __W, __mmask16 __U, __m512i __A)3433_mm512_mask_cvtepi32_ps(__m512 __W, __mmask16 __U, __m512i __A) {
3682{
3683 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,3434 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
3684 (__v16sf)_mm512_cvtepi32_ps(__A),3435 (__v16sf)_mm512_cvtepi32_ps(__A),
3685 (__v16sf)__W);3436 (__v16sf)__W);
3686}3437}
36873438
3688static __inline__ __m512 __DEFAULT_FN_ATTRS5123439static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
3689_mm512_maskz_cvtepi32_ps (__mmask16 __U, __m512i __A)3440_mm512_maskz_cvtepi32_ps(__mmask16 __U, __m512i __A) {
3690{
3691 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,3441 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
3692 (__v16sf)_mm512_cvtepi32_ps(__A),3442 (__v16sf)_mm512_cvtepi32_ps(__A),
3693 (__v16sf)_mm512_setzero_ps());3443 (__v16sf)_mm512_setzero_ps());
3694}3444}
36953445
3696static __inline __m512d __DEFAULT_FN_ATTRS5123446static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3697_mm512_cvtepu32_pd(__m256i __A)3447_mm512_cvtepu32_pd(__m256i __A) {
3698{
3699 return (__m512d)__builtin_convertvector((__v8su)__A, __v8df);3448 return (__m512d)__builtin_convertvector((__v8su)__A, __v8df);
3700}3449}
37013450
3702static __inline__ __m512d __DEFAULT_FN_ATTRS5123451static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3703_mm512_mask_cvtepu32_pd (__m512d __W, __mmask8 __U, __m256i __A)3452_mm512_mask_cvtepu32_pd(__m512d __W, __mmask8 __U, __m256i __A) {
3704{
3705 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,3453 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
3706 (__v8df)_mm512_cvtepu32_pd(__A),3454 (__v8df)_mm512_cvtepu32_pd(__A),
3707 (__v8df)__W);3455 (__v8df)__W);
3708}3456}
37093457
3710static __inline__ __m512d __DEFAULT_FN_ATTRS5123458static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3711_mm512_maskz_cvtepu32_pd (__mmask8 __U, __m256i __A)3459_mm512_maskz_cvtepu32_pd(__mmask8 __U, __m256i __A) {
3712{
3713 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,3460 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U,
3714 (__v8df)_mm512_cvtepu32_pd(__A),3461 (__v8df)_mm512_cvtepu32_pd(__A),
3715 (__v8df)_mm512_setzero_pd());3462 (__v8df)_mm512_setzero_pd());
3716}3463}
37173464
3718static __inline__ __m512d __DEFAULT_FN_ATTRS5123465static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3719_mm512_cvtepu32lo_pd(__m512i __A)3466_mm512_cvtepu32lo_pd(__m512i __A) {
3720{
3721 return (__m512d) _mm512_cvtepu32_pd(_mm512_castsi512_si256(__A));3467 return (__m512d) _mm512_cvtepu32_pd(_mm512_castsi512_si256(__A));
3722}3468}
37233469
3724static __inline__ __m512d __DEFAULT_FN_ATTRS5123470static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
3725_mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U,__m512i __A)3471_mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U, __m512i __A) {
3726{
3727 return (__m512d) _mm512_mask_cvtepu32_pd(__W, __U, _mm512_castsi512_si256(__A));3472 return (__m512d) _mm512_mask_cvtepu32_pd(__W, __U, _mm512_castsi512_si256(__A));
3728}3473}
37293474
...@@ -3742,44 +3487,38 @@ _mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U,__m512i __A)...@@ -3742,44 +3487,38 @@ _mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U,__m512i __A)
3742 (__v8sf)_mm256_setzero_ps(), \3487 (__v8sf)_mm256_setzero_ps(), \
3743 (__mmask8)(U), (int)(R)))3488 (__mmask8)(U), (int)(R)))
37443489
3745static __inline__ __m256 __DEFAULT_FN_ATTRS5123490static __inline__ __m256
3746_mm512_cvtpd_ps (__m512d __A)3491 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_cvtpd_ps(__m512d __A) {
3747{3492 return (__m256)__builtin_ia32_cvtpd2ps512_mask(
3748 return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,3493 (__v8df)__A, (__v8sf)_mm256_setzero_ps(), (__mmask8)-1,
3749 (__v8sf) _mm256_undefined_ps (),3494 _MM_FROUND_CUR_DIRECTION);
3750 (__mmask8) -1,
3751 _MM_FROUND_CUR_DIRECTION);
3752}3495}
37533496
3754static __inline__ __m256 __DEFAULT_FN_ATTRS5123497static __inline__ __m256 __DEFAULT_FN_ATTRS512_CONSTEXPR
3755_mm512_mask_cvtpd_ps (__m256 __W, __mmask8 __U, __m512d __A)3498_mm512_mask_cvtpd_ps(__m256 __W, __mmask8 __U, __m512d __A) {
3756{
3757 return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,3499 return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,
3758 (__v8sf) __W,3500 (__v8sf) __W,
3759 (__mmask8) __U,3501 (__mmask8) __U,
3760 _MM_FROUND_CUR_DIRECTION);3502 _MM_FROUND_CUR_DIRECTION);
3761}3503}
37623504
3763static __inline__ __m256 __DEFAULT_FN_ATTRS5123505static __inline__ __m256 __DEFAULT_FN_ATTRS512_CONSTEXPR
3764_mm512_maskz_cvtpd_ps (__mmask8 __U, __m512d __A)3506_mm512_maskz_cvtpd_ps(__mmask8 __U, __m512d __A) {
3765{
3766 return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,3507 return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,
3767 (__v8sf) _mm256_setzero_ps (),3508 (__v8sf) _mm256_setzero_ps (),
3768 (__mmask8) __U,3509 (__mmask8) __U,
3769 _MM_FROUND_CUR_DIRECTION);3510 _MM_FROUND_CUR_DIRECTION);
3770}3511}
37713512
3772static __inline__ __m512 __DEFAULT_FN_ATTRS5123513static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
3773_mm512_cvtpd_pslo (__m512d __A)3514_mm512_cvtpd_pslo(__m512d __A) {
3774{
3775 return (__m512) __builtin_shufflevector((__v8sf) _mm512_cvtpd_ps(__A),3515 return (__m512) __builtin_shufflevector((__v8sf) _mm512_cvtpd_ps(__A),
3776 (__v8sf) _mm256_setzero_ps (),3516 (__v8sf) _mm256_setzero_ps (),
3777 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);3517 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
3778}3518}
37793519
3780static __inline__ __m512 __DEFAULT_FN_ATTRS5123520static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
3781_mm512_mask_cvtpd_pslo (__m512 __W, __mmask8 __U,__m512d __A)3521_mm512_mask_cvtpd_pslo(__m512 __W, __mmask8 __U, __m512d __A) {
3782{
3783 return (__m512) __builtin_shufflevector (3522 return (__m512) __builtin_shufflevector (
3784 (__v8sf) _mm512_mask_cvtpd_ps (_mm512_castps512_ps256(__W),3523 (__v8sf) _mm512_mask_cvtpd_ps (_mm512_castps512_ps256(__W),
3785 __U, __A),3524 __U, __A),
...@@ -4123,9 +3862,8 @@ _mm512_cvtss_f32(__m512 __a)...@@ -4123,9 +3862,8 @@ _mm512_cvtss_f32(__m512 __a)
41233862
4124/* Unpack and Interleave */3863/* Unpack and Interleave */
41253864
4126static __inline __m512d __DEFAULT_FN_ATTRS5123865static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
4127_mm512_unpackhi_pd(__m512d __a, __m512d __b)3866_mm512_unpackhi_pd(__m512d __a, __m512d __b) {
4128{
4129 return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b,3867 return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b,
4130 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6);3868 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6);
4131}3869}
...@@ -4146,9 +3884,8 @@ _mm512_maskz_unpackhi_pd(__mmask8 __U, __m512d __A, __m512d __B)...@@ -4146,9 +3884,8 @@ _mm512_maskz_unpackhi_pd(__mmask8 __U, __m512d __A, __m512d __B)
4146 (__v8df)_mm512_setzero_pd());3884 (__v8df)_mm512_setzero_pd());
4147}3885}
41483886
4149static __inline __m512d __DEFAULT_FN_ATTRS5123887static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
4150_mm512_unpacklo_pd(__m512d __a, __m512d __b)3888_mm512_unpacklo_pd(__m512d __a, __m512d __b) {
4151{
4152 return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b,3889 return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b,
4153 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6);3890 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6);
4154}3891}
...@@ -4169,9 +3906,8 @@ _mm512_maskz_unpacklo_pd (__mmask8 __U, __m512d __A, __m512d __B)...@@ -4169,9 +3906,8 @@ _mm512_maskz_unpacklo_pd (__mmask8 __U, __m512d __A, __m512d __B)
4169 (__v8df)_mm512_setzero_pd());3906 (__v8df)_mm512_setzero_pd());
4170}3907}
41713908
4172static __inline __m512 __DEFAULT_FN_ATTRS5123909static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
4173_mm512_unpackhi_ps(__m512 __a, __m512 __b)3910_mm512_unpackhi_ps(__m512 __a, __m512 __b) {
4174{
4175 return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b,3911 return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b,
4176 2, 18, 3, 19,3912 2, 18, 3, 19,
4177 2+4, 18+4, 3+4, 19+4,3913 2+4, 18+4, 3+4, 19+4,
...@@ -4195,9 +3931,8 @@ _mm512_maskz_unpackhi_ps (__mmask16 __U, __m512 __A, __m512 __B)...@@ -4195,9 +3931,8 @@ _mm512_maskz_unpackhi_ps (__mmask16 __U, __m512 __A, __m512 __B)
4195 (__v16sf)_mm512_setzero_ps());3931 (__v16sf)_mm512_setzero_ps());
4196}3932}
41973933
4198static __inline __m512 __DEFAULT_FN_ATTRS5123934static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
4199_mm512_unpacklo_ps(__m512 __a, __m512 __b)3935_mm512_unpacklo_ps(__m512 __a, __m512 __b) {
4200{
4201 return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b,3936 return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b,
4202 0, 16, 1, 17,3937 0, 16, 1, 17,
4203 0+4, 16+4, 1+4, 17+4,3938 0+4, 16+4, 1+4, 17+4,
...@@ -4221,9 +3956,8 @@ _mm512_maskz_unpacklo_ps (__mmask16 __U, __m512 __A, __m512 __B)...@@ -4221,9 +3956,8 @@ _mm512_maskz_unpacklo_ps (__mmask16 __U, __m512 __A, __m512 __B)
4221 (__v16sf)_mm512_setzero_ps());3956 (__v16sf)_mm512_setzero_ps());
4222}3957}
42233958
4224static __inline__ __m512i __DEFAULT_FN_ATTRS5123959static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4225_mm512_unpackhi_epi32(__m512i __A, __m512i __B)3960_mm512_unpackhi_epi32(__m512i __A, __m512i __B) {
4226{
4227 return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B,3961 return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B,
4228 2, 18, 3, 19,3962 2, 18, 3, 19,
4229 2+4, 18+4, 3+4, 19+4,3963 2+4, 18+4, 3+4, 19+4,
...@@ -4247,9 +3981,8 @@ _mm512_maskz_unpackhi_epi32(__mmask16 __U, __m512i __A, __m512i __B)...@@ -4247,9 +3981,8 @@ _mm512_maskz_unpackhi_epi32(__mmask16 __U, __m512i __A, __m512i __B)
4247 (__v16si)_mm512_setzero_si512());3981 (__v16si)_mm512_setzero_si512());
4248}3982}
42493983
4250static __inline__ __m512i __DEFAULT_FN_ATTRS5123984static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4251_mm512_unpacklo_epi32(__m512i __A, __m512i __B)3985_mm512_unpacklo_epi32(__m512i __A, __m512i __B) {
4252{
4253 return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B,3986 return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B,
4254 0, 16, 1, 17,3987 0, 16, 1, 17,
4255 0+4, 16+4, 1+4, 17+4,3988 0+4, 16+4, 1+4, 17+4,
...@@ -4273,9 +4006,8 @@ _mm512_maskz_unpacklo_epi32(__mmask16 __U, __m512i __A, __m512i __B)...@@ -4273,9 +4006,8 @@ _mm512_maskz_unpacklo_epi32(__mmask16 __U, __m512i __A, __m512i __B)
4273 (__v16si)_mm512_setzero_si512());4006 (__v16si)_mm512_setzero_si512());
4274}4007}
42754008
4276static __inline__ __m512i __DEFAULT_FN_ATTRS5124009static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4277_mm512_unpackhi_epi64(__m512i __A, __m512i __B)4010_mm512_unpackhi_epi64(__m512i __A, __m512i __B) {
4278{
4279 return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B,4011 return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B,
4280 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6);4012 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6);
4281}4013}
...@@ -4296,9 +4028,8 @@ _mm512_maskz_unpackhi_epi64(__mmask8 __U, __m512i __A, __m512i __B)...@@ -4296,9 +4028,8 @@ _mm512_maskz_unpackhi_epi64(__mmask8 __U, __m512i __A, __m512i __B)
4296 (__v8di)_mm512_setzero_si512());4028 (__v8di)_mm512_setzero_si512());
4297}4029}
42984030
4299static __inline__ __m512i __DEFAULT_FN_ATTRS5124031static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4300_mm512_unpacklo_epi64 (__m512i __A, __m512i __B)4032_mm512_unpacklo_epi64(__m512i __A, __m512i __B) {
4301{
4302 return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B,4033 return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B,
4303 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6);4034 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6);
4304}4035}
...@@ -4619,9 +4350,8 @@ _mm512_store_epi64 (void *__P, __m512i __A)...@@ -4619,9 +4350,8 @@ _mm512_store_epi64 (void *__P, __m512i __A)
46194350
4620/* Mask ops */4351/* Mask ops */
46214352
4622static __inline __mmask16 __DEFAULT_FN_ATTRS4353static __inline __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
4623_mm512_knot(__mmask16 __M)4354_mm512_knot(__mmask16 __M) {
4624{
4625 return __builtin_ia32_knothi(__M);4355 return __builtin_ia32_knothi(__M);
4626}4356}
46274357
...@@ -4727,237 +4457,207 @@ _mm512_knot(__mmask16 __M)...@@ -4727,237 +4457,207 @@ _mm512_knot(__mmask16 __M)
4727#define _mm512_mask_cmpneq_epu64_mask(k, A, B) \4457#define _mm512_mask_cmpneq_epu64_mask(k, A, B) \
4728 _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE)4458 _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE)
47294459
4730static __inline__ __m512i __DEFAULT_FN_ATTRS5124460static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4731_mm512_cvtepi8_epi32(__m128i __A)4461_mm512_cvtepi8_epi32(__m128i __A) {
4732{
4733 /* This function always performs a signed extension, but __v16qi is a char4462 /* This function always performs a signed extension, but __v16qi is a char
4734 which may be signed or unsigned, so use __v16qs. */4463 which may be signed or unsigned, so use __v16qs. */
4735 return (__m512i)__builtin_convertvector((__v16qs)__A, __v16si);4464 return (__m512i)__builtin_convertvector((__v16qs)__A, __v16si);
4736}4465}
47374466
4738static __inline__ __m512i __DEFAULT_FN_ATTRS5124467static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4739_mm512_mask_cvtepi8_epi32(__m512i __W, __mmask16 __U, __m128i __A)4468_mm512_mask_cvtepi8_epi32(__m512i __W, __mmask16 __U, __m128i __A) {
4740{
4741 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4469 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4742 (__v16si)_mm512_cvtepi8_epi32(__A),4470 (__v16si)_mm512_cvtepi8_epi32(__A),
4743 (__v16si)__W);4471 (__v16si)__W);
4744}4472}
47454473
4746static __inline__ __m512i __DEFAULT_FN_ATTRS5124474static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4747_mm512_maskz_cvtepi8_epi32(__mmask16 __U, __m128i __A)4475_mm512_maskz_cvtepi8_epi32(__mmask16 __U, __m128i __A) {
4748{
4749 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4476 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4750 (__v16si)_mm512_cvtepi8_epi32(__A),4477 (__v16si)_mm512_cvtepi8_epi32(__A),
4751 (__v16si)_mm512_setzero_si512());4478 (__v16si)_mm512_setzero_si512());
4752}4479}
47534480
4754static __inline__ __m512i __DEFAULT_FN_ATTRS5124481static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4755_mm512_cvtepi8_epi64(__m128i __A)4482_mm512_cvtepi8_epi64(__m128i __A) {
4756{
4757 /* This function always performs a signed extension, but __v16qi is a char4483 /* This function always performs a signed extension, but __v16qi is a char
4758 which may be signed or unsigned, so use __v16qs. */4484 which may be signed or unsigned, so use __v16qs. */
4759 return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__A, (__v16qs)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di);4485 return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__A, (__v16qs)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di);
4760}4486}
47614487
4762static __inline__ __m512i __DEFAULT_FN_ATTRS5124488static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4763_mm512_mask_cvtepi8_epi64(__m512i __W, __mmask8 __U, __m128i __A)4489_mm512_mask_cvtepi8_epi64(__m512i __W, __mmask8 __U, __m128i __A) {
4764{
4765 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4490 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4766 (__v8di)_mm512_cvtepi8_epi64(__A),4491 (__v8di)_mm512_cvtepi8_epi64(__A),
4767 (__v8di)__W);4492 (__v8di)__W);
4768}4493}
47694494
4770static __inline__ __m512i __DEFAULT_FN_ATTRS5124495static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4771_mm512_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A)4496_mm512_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) {
4772{
4773 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4497 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4774 (__v8di)_mm512_cvtepi8_epi64(__A),4498 (__v8di)_mm512_cvtepi8_epi64(__A),
4775 (__v8di)_mm512_setzero_si512 ());4499 (__v8di)_mm512_setzero_si512 ());
4776}4500}
47774501
4778static __inline__ __m512i __DEFAULT_FN_ATTRS5124502static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4779_mm512_cvtepi32_epi64(__m256i __X)4503_mm512_cvtepi32_epi64(__m256i __X) {
4780{
4781 return (__m512i)__builtin_convertvector((__v8si)__X, __v8di);4504 return (__m512i)__builtin_convertvector((__v8si)__X, __v8di);
4782}4505}
47834506
4784static __inline__ __m512i __DEFAULT_FN_ATTRS5124507static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4785_mm512_mask_cvtepi32_epi64(__m512i __W, __mmask8 __U, __m256i __X)4508_mm512_mask_cvtepi32_epi64(__m512i __W, __mmask8 __U, __m256i __X) {
4786{
4787 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4509 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4788 (__v8di)_mm512_cvtepi32_epi64(__X),4510 (__v8di)_mm512_cvtepi32_epi64(__X),
4789 (__v8di)__W);4511 (__v8di)__W);
4790}4512}
47914513
4792static __inline__ __m512i __DEFAULT_FN_ATTRS5124514static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4793_mm512_maskz_cvtepi32_epi64(__mmask8 __U, __m256i __X)4515_mm512_maskz_cvtepi32_epi64(__mmask8 __U, __m256i __X) {
4794{
4795 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4516 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4796 (__v8di)_mm512_cvtepi32_epi64(__X),4517 (__v8di)_mm512_cvtepi32_epi64(__X),
4797 (__v8di)_mm512_setzero_si512());4518 (__v8di)_mm512_setzero_si512());
4798}4519}
47994520
4800static __inline__ __m512i __DEFAULT_FN_ATTRS5124521static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4801_mm512_cvtepi16_epi32(__m256i __A)4522_mm512_cvtepi16_epi32(__m256i __A) {
4802{
4803 return (__m512i)__builtin_convertvector((__v16hi)__A, __v16si);4523 return (__m512i)__builtin_convertvector((__v16hi)__A, __v16si);
4804}4524}
48054525
4806static __inline__ __m512i __DEFAULT_FN_ATTRS5124526static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4807_mm512_mask_cvtepi16_epi32(__m512i __W, __mmask16 __U, __m256i __A)4527_mm512_mask_cvtepi16_epi32(__m512i __W, __mmask16 __U, __m256i __A) {
4808{
4809 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4528 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4810 (__v16si)_mm512_cvtepi16_epi32(__A),4529 (__v16si)_mm512_cvtepi16_epi32(__A),
4811 (__v16si)__W);4530 (__v16si)__W);
4812}4531}
48134532
4814static __inline__ __m512i __DEFAULT_FN_ATTRS5124533static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4815_mm512_maskz_cvtepi16_epi32(__mmask16 __U, __m256i __A)4534_mm512_maskz_cvtepi16_epi32(__mmask16 __U, __m256i __A) {
4816{
4817 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4535 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4818 (__v16si)_mm512_cvtepi16_epi32(__A),4536 (__v16si)_mm512_cvtepi16_epi32(__A),
4819 (__v16si)_mm512_setzero_si512 ());4537 (__v16si)_mm512_setzero_si512 ());
4820}4538}
48214539
4822static __inline__ __m512i __DEFAULT_FN_ATTRS5124540static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4823_mm512_cvtepi16_epi64(__m128i __A)4541_mm512_cvtepi16_epi64(__m128i __A) {
4824{
4825 return (__m512i)__builtin_convertvector((__v8hi)__A, __v8di);4542 return (__m512i)__builtin_convertvector((__v8hi)__A, __v8di);
4826}4543}
48274544
4828static __inline__ __m512i __DEFAULT_FN_ATTRS5124545static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4829_mm512_mask_cvtepi16_epi64(__m512i __W, __mmask8 __U, __m128i __A)4546_mm512_mask_cvtepi16_epi64(__m512i __W, __mmask8 __U, __m128i __A) {
4830{
4831 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4547 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4832 (__v8di)_mm512_cvtepi16_epi64(__A),4548 (__v8di)_mm512_cvtepi16_epi64(__A),
4833 (__v8di)__W);4549 (__v8di)__W);
4834}4550}
48354551
4836static __inline__ __m512i __DEFAULT_FN_ATTRS5124552static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4837_mm512_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A)4553_mm512_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) {
4838{
4839 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4554 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4840 (__v8di)_mm512_cvtepi16_epi64(__A),4555 (__v8di)_mm512_cvtepi16_epi64(__A),
4841 (__v8di)_mm512_setzero_si512());4556 (__v8di)_mm512_setzero_si512());
4842}4557}
48434558
4844static __inline__ __m512i __DEFAULT_FN_ATTRS5124559static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4845_mm512_cvtepu8_epi32(__m128i __A)4560_mm512_cvtepu8_epi32(__m128i __A) {
4846{
4847 return (__m512i)__builtin_convertvector((__v16qu)__A, __v16si);4561 return (__m512i)__builtin_convertvector((__v16qu)__A, __v16si);
4848}4562}
48494563
4850static __inline__ __m512i __DEFAULT_FN_ATTRS5124564static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4851_mm512_mask_cvtepu8_epi32(__m512i __W, __mmask16 __U, __m128i __A)4565_mm512_mask_cvtepu8_epi32(__m512i __W, __mmask16 __U, __m128i __A) {
4852{
4853 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4566 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4854 (__v16si)_mm512_cvtepu8_epi32(__A),4567 (__v16si)_mm512_cvtepu8_epi32(__A),
4855 (__v16si)__W);4568 (__v16si)__W);
4856}4569}
48574570
4858static __inline__ __m512i __DEFAULT_FN_ATTRS5124571static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4859_mm512_maskz_cvtepu8_epi32(__mmask16 __U, __m128i __A)4572_mm512_maskz_cvtepu8_epi32(__mmask16 __U, __m128i __A) {
4860{
4861 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4573 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4862 (__v16si)_mm512_cvtepu8_epi32(__A),4574 (__v16si)_mm512_cvtepu8_epi32(__A),
4863 (__v16si)_mm512_setzero_si512());4575 (__v16si)_mm512_setzero_si512());
4864}4576}
48654577
4866static __inline__ __m512i __DEFAULT_FN_ATTRS5124578static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4867_mm512_cvtepu8_epi64(__m128i __A)4579_mm512_cvtepu8_epi64(__m128i __A) {
4868{
4869 return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__A, (__v16qu)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di);4580 return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__A, (__v16qu)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di);
4870}4581}
48714582
4872static __inline__ __m512i __DEFAULT_FN_ATTRS5124583static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4873_mm512_mask_cvtepu8_epi64(__m512i __W, __mmask8 __U, __m128i __A)4584_mm512_mask_cvtepu8_epi64(__m512i __W, __mmask8 __U, __m128i __A) {
4874{
4875 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4585 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4876 (__v8di)_mm512_cvtepu8_epi64(__A),4586 (__v8di)_mm512_cvtepu8_epi64(__A),
4877 (__v8di)__W);4587 (__v8di)__W);
4878}4588}
48794589
4880static __inline__ __m512i __DEFAULT_FN_ATTRS5124590static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4881_mm512_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A)4591_mm512_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A) {
4882{
4883 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4592 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4884 (__v8di)_mm512_cvtepu8_epi64(__A),4593 (__v8di)_mm512_cvtepu8_epi64(__A),
4885 (__v8di)_mm512_setzero_si512());4594 (__v8di)_mm512_setzero_si512());
4886}4595}
48874596
4888static __inline__ __m512i __DEFAULT_FN_ATTRS5124597static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4889_mm512_cvtepu32_epi64(__m256i __X)4598_mm512_cvtepu32_epi64(__m256i __X) {
4890{
4891 return (__m512i)__builtin_convertvector((__v8su)__X, __v8di);4599 return (__m512i)__builtin_convertvector((__v8su)__X, __v8di);
4892}4600}
48934601
4894static __inline__ __m512i __DEFAULT_FN_ATTRS5124602static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4895_mm512_mask_cvtepu32_epi64(__m512i __W, __mmask8 __U, __m256i __X)4603_mm512_mask_cvtepu32_epi64(__m512i __W, __mmask8 __U, __m256i __X) {
4896{
4897 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4604 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4898 (__v8di)_mm512_cvtepu32_epi64(__X),4605 (__v8di)_mm512_cvtepu32_epi64(__X),
4899 (__v8di)__W);4606 (__v8di)__W);
4900}4607}
49014608
4902static __inline__ __m512i __DEFAULT_FN_ATTRS5124609static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4903_mm512_maskz_cvtepu32_epi64(__mmask8 __U, __m256i __X)4610_mm512_maskz_cvtepu32_epi64(__mmask8 __U, __m256i __X) {
4904{
4905 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4611 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4906 (__v8di)_mm512_cvtepu32_epi64(__X),4612 (__v8di)_mm512_cvtepu32_epi64(__X),
4907 (__v8di)_mm512_setzero_si512());4613 (__v8di)_mm512_setzero_si512());
4908}4614}
49094615
4910static __inline__ __m512i __DEFAULT_FN_ATTRS5124616static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4911_mm512_cvtepu16_epi32(__m256i __A)4617_mm512_cvtepu16_epi32(__m256i __A) {
4912{
4913 return (__m512i)__builtin_convertvector((__v16hu)__A, __v16si);4618 return (__m512i)__builtin_convertvector((__v16hu)__A, __v16si);
4914}4619}
49154620
4916static __inline__ __m512i __DEFAULT_FN_ATTRS5124621static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4917_mm512_mask_cvtepu16_epi32(__m512i __W, __mmask16 __U, __m256i __A)4622_mm512_mask_cvtepu16_epi32(__m512i __W, __mmask16 __U, __m256i __A) {
4918{
4919 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4623 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4920 (__v16si)_mm512_cvtepu16_epi32(__A),4624 (__v16si)_mm512_cvtepu16_epi32(__A),
4921 (__v16si)__W);4625 (__v16si)__W);
4922}4626}
49234627
4924static __inline__ __m512i __DEFAULT_FN_ATTRS5124628static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4925_mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A)4629_mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A) {
4926{
4927 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4630 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
4928 (__v16si)_mm512_cvtepu16_epi32(__A),4631 (__v16si)_mm512_cvtepu16_epi32(__A),
4929 (__v16si)_mm512_setzero_si512());4632 (__v16si)_mm512_setzero_si512());
4930}4633}
49314634
4932static __inline__ __m512i __DEFAULT_FN_ATTRS5124635static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4933_mm512_cvtepu16_epi64(__m128i __A)4636_mm512_cvtepu16_epi64(__m128i __A) {
4934{
4935 return (__m512i)__builtin_convertvector((__v8hu)__A, __v8di);4637 return (__m512i)__builtin_convertvector((__v8hu)__A, __v8di);
4936}4638}
49374639
4938static __inline__ __m512i __DEFAULT_FN_ATTRS5124640static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4939_mm512_mask_cvtepu16_epi64(__m512i __W, __mmask8 __U, __m128i __A)4641_mm512_mask_cvtepu16_epi64(__m512i __W, __mmask8 __U, __m128i __A) {
4940{
4941 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4642 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4942 (__v8di)_mm512_cvtepu16_epi64(__A),4643 (__v8di)_mm512_cvtepu16_epi64(__A),
4943 (__v8di)__W);4644 (__v8di)__W);
4944}4645}
49454646
4946static __inline__ __m512i __DEFAULT_FN_ATTRS5124647static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4947_mm512_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A)4648_mm512_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) {
4948{
4949 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4649 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
4950 (__v8di)_mm512_cvtepu16_epi64(__A),4650 (__v8di)_mm512_cvtepu16_epi64(__A),
4951 (__v8di)_mm512_setzero_si512());4651 (__v8di)_mm512_setzero_si512());
4952}4652}
49534653
4954static __inline__ __m512i __DEFAULT_FN_ATTRS5124654static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4955_mm512_rorv_epi32 (__m512i __A, __m512i __B)4655_mm512_rorv_epi32 (__m512i __A, __m512i __B)
4956{4656{
4957 return (__m512i)__builtin_ia32_prorvd512((__v16si)__A, (__v16si)__B);4657 return (__m512i)__builtin_elementwise_fshr((__v16su)__A,(__v16su)__A, (__v16su)__B);
4958}4658}
49594659
4960static __inline__ __m512i __DEFAULT_FN_ATTRS5124660static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4961_mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)4661_mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
4962{4662{
4963 return (__m512i)__builtin_ia32_selectd_512(__U,4663 return (__m512i)__builtin_ia32_selectd_512(__U,
...@@ -4965,7 +4665,7 @@ _mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)...@@ -4965,7 +4665,7 @@ _mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
4965 (__v16si)__W);4665 (__v16si)__W);
4966}4666}
49674667
4968static __inline__ __m512i __DEFAULT_FN_ATTRS5124668static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4969_mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)4669_mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
4970{4670{
4971 return (__m512i)__builtin_ia32_selectd_512(__U,4671 return (__m512i)__builtin_ia32_selectd_512(__U,
...@@ -4973,13 +4673,13 @@ _mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)...@@ -4973,13 +4673,13 @@ _mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
4973 (__v16si)_mm512_setzero_si512());4673 (__v16si)_mm512_setzero_si512());
4974}4674}
49754675
4976static __inline__ __m512i __DEFAULT_FN_ATTRS5124676static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4977_mm512_rorv_epi64 (__m512i __A, __m512i __B)4677_mm512_rorv_epi64 (__m512i __A, __m512i __B)
4978{4678{
4979 return (__m512i)__builtin_ia32_prorvq512((__v8di)__A, (__v8di)__B);4679 return (__m512i)__builtin_elementwise_fshr((__v8du)__A, (__v8du)__A, (__v8du)__B);
4980}4680}
49814681
4982static __inline__ __m512i __DEFAULT_FN_ATTRS5124682static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4983_mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)4683_mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
4984{4684{
4985 return (__m512i)__builtin_ia32_selectq_512(__U,4685 return (__m512i)__builtin_ia32_selectq_512(__U,
...@@ -4987,7 +4687,7 @@ _mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)...@@ -4987,7 +4687,7 @@ _mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
4987 (__v8di)__W);4687 (__v8di)__W);
4988}4688}
49894689
4990static __inline__ __m512i __DEFAULT_FN_ATTRS5124690static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
4991_mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)4691_mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
4992{4692{
4993 return (__m512i)__builtin_ia32_selectq_512(__U,4693 return (__m512i)__builtin_ia32_selectq_512(__U,
...@@ -5063,13 +4763,13 @@ _mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)...@@ -5063,13 +4763,13 @@ _mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
5063 (__v8di)_mm512_rol_epi64((a), (b)), \4763 (__v8di)_mm512_rol_epi64((a), (b)), \
5064 (__v8di)_mm512_setzero_si512()))4764 (__v8di)_mm512_setzero_si512()))
50654765
5066static __inline__ __m512i __DEFAULT_FN_ATTRS5124766static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5067_mm512_rolv_epi32 (__m512i __A, __m512i __B)4767_mm512_rolv_epi32 (__m512i __A, __m512i __B)
5068{4768{
5069 return (__m512i)__builtin_ia32_prolvd512((__v16si)__A, (__v16si)__B);4769 return (__m512i)__builtin_elementwise_fshl((__v16su)__A, (__v16su)__A, (__v16su)__B);
5070}4770}
50714771
5072static __inline__ __m512i __DEFAULT_FN_ATTRS5124772static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5073_mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)4773_mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
5074{4774{
5075 return (__m512i)__builtin_ia32_selectd_512(__U,4775 return (__m512i)__builtin_ia32_selectd_512(__U,
...@@ -5077,7 +4777,7 @@ _mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)...@@ -5077,7 +4777,7 @@ _mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B)
5077 (__v16si)__W);4777 (__v16si)__W);
5078}4778}
50794779
5080static __inline__ __m512i __DEFAULT_FN_ATTRS5124780static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5081_mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)4781_mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
5082{4782{
5083 return (__m512i)__builtin_ia32_selectd_512(__U,4783 return (__m512i)__builtin_ia32_selectd_512(__U,
...@@ -5085,13 +4785,13 @@ _mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)...@@ -5085,13 +4785,13 @@ _mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B)
5085 (__v16si)_mm512_setzero_si512());4785 (__v16si)_mm512_setzero_si512());
5086}4786}
50874787
5088static __inline__ __m512i __DEFAULT_FN_ATTRS5124788static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5089_mm512_rolv_epi64 (__m512i __A, __m512i __B)4789_mm512_rolv_epi64 (__m512i __A, __m512i __B)
5090{4790{
5091 return (__m512i)__builtin_ia32_prolvq512((__v8di)__A, (__v8di)__B);4791 return (__m512i)__builtin_elementwise_fshl((__v8du)__A, (__v8du)__A, (__v8du)__B);
5092}4792}
50934793
5094static __inline__ __m512i __DEFAULT_FN_ATTRS5124794static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5095_mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)4795_mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
5096{4796{
5097 return (__m512i)__builtin_ia32_selectq_512(__U,4797 return (__m512i)__builtin_ia32_selectq_512(__U,
...@@ -5099,7 +4799,7 @@ _mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)...@@ -5099,7 +4799,7 @@ _mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B)
5099 (__v8di)__W);4799 (__v8di)__W);
5100}4800}
51014801
5102static __inline__ __m512i __DEFAULT_FN_ATTRS5124802static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5103_mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)4803_mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
5104{4804{
5105 return (__m512i)__builtin_ia32_selectq_512(__U,4805 return (__m512i)__builtin_ia32_selectq_512(__U,
...@@ -5133,91 +4833,81 @@ _mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)...@@ -5133,91 +4833,81 @@ _mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
5133 (__v8di)_mm512_ror_epi64((A), (B)), \4833 (__v8di)_mm512_ror_epi64((A), (B)), \
5134 (__v8di)_mm512_setzero_si512()))4834 (__v8di)_mm512_setzero_si512()))
51354835
5136static __inline__ __m512i __DEFAULT_FN_ATTRS5124836static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5137_mm512_slli_epi32(__m512i __A, unsigned int __B)4837_mm512_slli_epi32(__m512i __A, unsigned int __B) {
5138{
5139 return (__m512i)__builtin_ia32_pslldi512((__v16si)__A, (int)__B);4838 return (__m512i)__builtin_ia32_pslldi512((__v16si)__A, (int)__B);
5140}4839}
51414840
5142static __inline__ __m512i __DEFAULT_FN_ATTRS5124841static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5143_mm512_mask_slli_epi32(__m512i __W, __mmask16 __U, __m512i __A,4842_mm512_mask_slli_epi32(__m512i __W, __mmask16 __U, __m512i __A,
5144 unsigned int __B)4843 unsigned int __B) {
5145{
5146 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4844 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5147 (__v16si)_mm512_slli_epi32(__A, __B),4845 (__v16si)_mm512_slli_epi32(__A, __B),
5148 (__v16si)__W);4846 (__v16si)__W);
5149}4847}
51504848
5151static __inline__ __m512i __DEFAULT_FN_ATTRS5124849static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5152_mm512_maskz_slli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) {4850_mm512_maskz_slli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) {
5153 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4851 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5154 (__v16si)_mm512_slli_epi32(__A, __B),4852 (__v16si)_mm512_slli_epi32(__A, __B),
5155 (__v16si)_mm512_setzero_si512());4853 (__v16si)_mm512_setzero_si512());
5156}4854}
51574855
5158static __inline__ __m512i __DEFAULT_FN_ATTRS5124856static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5159_mm512_slli_epi64(__m512i __A, unsigned int __B)4857_mm512_slli_epi64(__m512i __A, unsigned int __B) {
5160{
5161 return (__m512i)__builtin_ia32_psllqi512((__v8di)__A, (int)__B);4858 return (__m512i)__builtin_ia32_psllqi512((__v8di)__A, (int)__B);
5162}4859}
51634860
5164static __inline__ __m512i __DEFAULT_FN_ATTRS5124861static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5165_mm512_mask_slli_epi64(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B)4862_mm512_mask_slli_epi64(__m512i __W, __mmask8 __U, __m512i __A,
5166{4863 unsigned int __B) {
5167 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4864 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5168 (__v8di)_mm512_slli_epi64(__A, __B),4865 (__v8di)_mm512_slli_epi64(__A, __B),
5169 (__v8di)__W);4866 (__v8di)__W);
5170}4867}
51714868
5172static __inline__ __m512i __DEFAULT_FN_ATTRS5124869static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5173_mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A, unsigned int __B)4870_mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A, unsigned int __B) {
5174{
5175 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4871 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5176 (__v8di)_mm512_slli_epi64(__A, __B),4872 (__v8di)_mm512_slli_epi64(__A, __B),
5177 (__v8di)_mm512_setzero_si512());4873 (__v8di)_mm512_setzero_si512());
5178}4874}
51794875
5180static __inline__ __m512i __DEFAULT_FN_ATTRS5124876static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5181_mm512_srli_epi32(__m512i __A, unsigned int __B)4877_mm512_srli_epi32(__m512i __A, unsigned int __B) {
5182{
5183 return (__m512i)__builtin_ia32_psrldi512((__v16si)__A, (int)__B);4878 return (__m512i)__builtin_ia32_psrldi512((__v16si)__A, (int)__B);
5184}4879}
51854880
5186static __inline__ __m512i __DEFAULT_FN_ATTRS5124881static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5187_mm512_mask_srli_epi32(__m512i __W, __mmask16 __U, __m512i __A,4882_mm512_mask_srli_epi32(__m512i __W, __mmask16 __U, __m512i __A,
5188 unsigned int __B)4883 unsigned int __B) {
5189{
5190 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4884 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5191 (__v16si)_mm512_srli_epi32(__A, __B),4885 (__v16si)_mm512_srli_epi32(__A, __B),
5192 (__v16si)__W);4886 (__v16si)__W);
5193}4887}
51944888
5195static __inline__ __m512i __DEFAULT_FN_ATTRS5124889static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5196_mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) {4890_mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) {
5197 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,4891 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5198 (__v16si)_mm512_srli_epi32(__A, __B),4892 (__v16si)_mm512_srli_epi32(__A, __B),
5199 (__v16si)_mm512_setzero_si512());4893 (__v16si)_mm512_setzero_si512());
5200}4894}
52014895
5202static __inline__ __m512i __DEFAULT_FN_ATTRS5124896static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5203_mm512_srli_epi64(__m512i __A, unsigned int __B)4897_mm512_srli_epi64(__m512i __A, unsigned int __B) {
5204{
5205 return (__m512i)__builtin_ia32_psrlqi512((__v8di)__A, (int)__B);4898 return (__m512i)__builtin_ia32_psrlqi512((__v8di)__A, (int)__B);
5206}4899}
52074900
5208static __inline__ __m512i __DEFAULT_FN_ATTRS5124901static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5209_mm512_mask_srli_epi64(__m512i __W, __mmask8 __U, __m512i __A,4902_mm512_mask_srli_epi64(__m512i __W, __mmask8 __U, __m512i __A,
5210 unsigned int __B)4903 unsigned int __B) {
5211{
5212 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4904 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5213 (__v8di)_mm512_srli_epi64(__A, __B),4905 (__v8di)_mm512_srli_epi64(__A, __B),
5214 (__v8di)__W);4906 (__v8di)__W);
5215}4907}
52164908
5217static __inline__ __m512i __DEFAULT_FN_ATTRS5124909static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5218_mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A,4910_mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A, unsigned int __B) {
5219 unsigned int __B)
5220{
5221 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,4911 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5222 (__v8di)_mm512_srli_epi64(__A, __B),4912 (__v8di)_mm512_srli_epi64(__A, __B),
5223 (__v8di)_mm512_setzero_si512());4913 (__v8di)_mm512_setzero_si512());
...@@ -5303,7 +4993,7 @@ _mm512_mask_store_epi64 (void *__P, __mmask8 __U, __m512i __A)...@@ -5303,7 +4993,7 @@ _mm512_mask_store_epi64 (void *__P, __mmask8 __U, __m512i __A)
5303 (__mmask8) __U);4993 (__mmask8) __U);
5304}4994}
53054995
5306static __inline__ __m512d __DEFAULT_FN_ATTRS5124996static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
5307_mm512_movedup_pd (__m512d __A)4997_mm512_movedup_pd (__m512d __A)
5308{4998{
5309 return (__m512d)__builtin_shufflevector((__v8df)__A, (__v8df)__A,4999 return (__m512d)__builtin_shufflevector((__v8df)__A, (__v8df)__A,
...@@ -5664,10 +5354,9 @@ _mm_maskz_getexp_ss (__mmask8 __U, __m128 __A, __m128 __B)...@@ -5664,10 +5354,9 @@ _mm_maskz_getexp_ss (__mmask8 __U, __m128 __A, __m128 __B)
5664 (int)(((D)<<2) | (C)), \5354 (int)(((D)<<2) | (C)), \
5665 (__v4sf)_mm_setzero_ps(), \5355 (__v4sf)_mm_setzero_ps(), \
5666 (__mmask8)(U), (int)(R)))5356 (__mmask8)(U), (int)(R)))
56675357
5668static __inline__ __mmask16 __DEFAULT_FN_ATTRS5358static __inline__ __mmask16
5669_mm512_kmov (__mmask16 __A)5359 __DEFAULT_FN_ATTRS_CONSTEXPR _mm512_kmov(__mmask16 __A) {
5670{
5671 return __A;5360 return __A;
5672}5361}
56735362
...@@ -5684,79 +5373,70 @@ _mm512_kmov (__mmask16 __A)...@@ -5684,79 +5373,70 @@ _mm512_kmov (__mmask16 __A)
5684 ((long long)__builtin_ia32_vcvtsd2si64((__v2df)(__m128d)(A), (int)(R)))5373 ((long long)__builtin_ia32_vcvtsd2si64((__v2df)(__m128d)(A), (int)(R)))
5685#endif5374#endif
56865375
5687static __inline__ __m512i __DEFAULT_FN_ATTRS5125376static __inline__ __m512i
5688_mm512_sll_epi32(__m512i __A, __m128i __B)5377 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_sll_epi32(__m512i __A, __m128i __B) {
5689{
5690 return (__m512i)__builtin_ia32_pslld512((__v16si) __A, (__v4si)__B);5378 return (__m512i)__builtin_ia32_pslld512((__v16si) __A, (__v4si)__B);
5691}5379}
56925380
5693static __inline__ __m512i __DEFAULT_FN_ATTRS5125381static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5694_mm512_mask_sll_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B)5382_mm512_mask_sll_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) {
5695{
5696 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5383 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5697 (__v16si)_mm512_sll_epi32(__A, __B),5384 (__v16si)_mm512_sll_epi32(__A, __B),
5698 (__v16si)__W);5385 (__v16si)__W);
5699}5386}
57005387
5701static __inline__ __m512i __DEFAULT_FN_ATTRS5125388static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5702_mm512_maskz_sll_epi32(__mmask16 __U, __m512i __A, __m128i __B)5389_mm512_maskz_sll_epi32(__mmask16 __U, __m512i __A, __m128i __B) {
5703{
5704 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5390 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5705 (__v16si)_mm512_sll_epi32(__A, __B),5391 (__v16si)_mm512_sll_epi32(__A, __B),
5706 (__v16si)_mm512_setzero_si512());5392 (__v16si)_mm512_setzero_si512());
5707}5393}
57085394
5709static __inline__ __m512i __DEFAULT_FN_ATTRS5125395static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5710_mm512_sll_epi64(__m512i __A, __m128i __B)5396_mm512_sll_epi64(__m512i __A, __m128i __B) {
5711{
5712 return (__m512i)__builtin_ia32_psllq512((__v8di)__A, (__v2di)__B);5397 return (__m512i)__builtin_ia32_psllq512((__v8di)__A, (__v2di)__B);
5713}5398}
57145399
5715static __inline__ __m512i __DEFAULT_FN_ATTRS5125400static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5716_mm512_mask_sll_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B)5401_mm512_mask_sll_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) {
5717{
5718 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5402 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5719 (__v8di)_mm512_sll_epi64(__A, __B),5403 (__v8di)_mm512_sll_epi64(__A, __B),
5720 (__v8di)__W);5404 (__v8di)__W);
5721}5405}
57225406
5723static __inline__ __m512i __DEFAULT_FN_ATTRS5125407static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5724_mm512_maskz_sll_epi64(__mmask8 __U, __m512i __A, __m128i __B)5408_mm512_maskz_sll_epi64(__mmask8 __U, __m512i __A, __m128i __B) {
5725{
5726 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5409 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5727 (__v8di)_mm512_sll_epi64(__A, __B),5410 (__v8di)_mm512_sll_epi64(__A, __B),
5728 (__v8di)_mm512_setzero_si512());5411 (__v8di)_mm512_setzero_si512());
5729}5412}
57305413
5731static __inline__ __m512i __DEFAULT_FN_ATTRS5125414static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5732_mm512_sllv_epi32(__m512i __X, __m512i __Y)5415_mm512_sllv_epi32(__m512i __X, __m512i __Y) {
5733{
5734 return (__m512i)__builtin_ia32_psllv16si((__v16si)__X, (__v16si)__Y);5416 return (__m512i)__builtin_ia32_psllv16si((__v16si)__X, (__v16si)__Y);
5735}5417}
57365418
5737static __inline__ __m512i __DEFAULT_FN_ATTRS5125419static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5738_mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y)5420_mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {
5739{
5740 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5421 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5741 (__v16si)_mm512_sllv_epi32(__X, __Y),5422 (__v16si)_mm512_sllv_epi32(__X, __Y),
5742 (__v16si)__W);5423 (__v16si)__W);
5743}5424}
57445425
5745static __inline__ __m512i __DEFAULT_FN_ATTRS5125426static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5746_mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y)5427_mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {
5747{
5748 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5428 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5749 (__v16si)_mm512_sllv_epi32(__X, __Y),5429 (__v16si)_mm512_sllv_epi32(__X, __Y),
5750 (__v16si)_mm512_setzero_si512());5430 (__v16si)_mm512_setzero_si512());
5751}5431}
57525432
5753static __inline__ __m512i __DEFAULT_FN_ATTRS5125433static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5754_mm512_sllv_epi64(__m512i __X, __m512i __Y)5434_mm512_sllv_epi64(__m512i __X, __m512i __Y)
5755{5435{
5756 return (__m512i)__builtin_ia32_psllv8di((__v8di)__X, (__v8di)__Y);5436 return (__m512i)__builtin_ia32_psllv8di((__v8di)__X, (__v8di)__Y);
5757}5437}
57585438
5759static __inline__ __m512i __DEFAULT_FN_ATTRS5125439static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5760_mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)5440_mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)
5761{5441{
5762 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5442 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
...@@ -5764,7 +5444,7 @@ _mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)...@@ -5764,7 +5444,7 @@ _mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)
5764 (__v8di)__W);5444 (__v8di)__W);
5765}5445}
57665446
5767static __inline__ __m512i __DEFAULT_FN_ATTRS5125447static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5768_mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y)5448_mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y)
5769{5449{
5770 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5450 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
...@@ -5772,79 +5452,70 @@ _mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y)...@@ -5772,79 +5452,70 @@ _mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y)
5772 (__v8di)_mm512_setzero_si512());5452 (__v8di)_mm512_setzero_si512());
5773}5453}
57745454
5775static __inline__ __m512i __DEFAULT_FN_ATTRS5125455static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5776_mm512_sra_epi32(__m512i __A, __m128i __B)5456_mm512_sra_epi32(__m512i __A, __m128i __B) {
5777{
5778 return (__m512i)__builtin_ia32_psrad512((__v16si) __A, (__v4si)__B);5457 return (__m512i)__builtin_ia32_psrad512((__v16si) __A, (__v4si)__B);
5779}5458}
57805459
5781static __inline__ __m512i __DEFAULT_FN_ATTRS5125460static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5782_mm512_mask_sra_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B)5461_mm512_mask_sra_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) {
5783{
5784 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5462 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5785 (__v16si)_mm512_sra_epi32(__A, __B),5463 (__v16si)_mm512_sra_epi32(__A, __B),
5786 (__v16si)__W);5464 (__v16si)__W);
5787}5465}
57885466
5789static __inline__ __m512i __DEFAULT_FN_ATTRS5125467static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5790_mm512_maskz_sra_epi32(__mmask16 __U, __m512i __A, __m128i __B)5468_mm512_maskz_sra_epi32(__mmask16 __U, __m512i __A, __m128i __B) {
5791{
5792 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5469 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5793 (__v16si)_mm512_sra_epi32(__A, __B),5470 (__v16si)_mm512_sra_epi32(__A, __B),
5794 (__v16si)_mm512_setzero_si512());5471 (__v16si)_mm512_setzero_si512());
5795}5472}
57965473
5797static __inline__ __m512i __DEFAULT_FN_ATTRS5125474static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5798_mm512_sra_epi64(__m512i __A, __m128i __B)5475_mm512_sra_epi64(__m512i __A, __m128i __B) {
5799{
5800 return (__m512i)__builtin_ia32_psraq512((__v8di)__A, (__v2di)__B);5476 return (__m512i)__builtin_ia32_psraq512((__v8di)__A, (__v2di)__B);
5801}5477}
58025478
5803static __inline__ __m512i __DEFAULT_FN_ATTRS5125479static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5804_mm512_mask_sra_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B)5480_mm512_mask_sra_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) {
5805{
5806 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5481 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5807 (__v8di)_mm512_sra_epi64(__A, __B),5482 (__v8di)_mm512_sra_epi64(__A, __B),
5808 (__v8di)__W);5483 (__v8di)__W);
5809}5484}
58105485
5811static __inline__ __m512i __DEFAULT_FN_ATTRS5125486static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5812_mm512_maskz_sra_epi64(__mmask8 __U, __m512i __A, __m128i __B)5487_mm512_maskz_sra_epi64(__mmask8 __U, __m512i __A, __m128i __B) {
5813{
5814 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5488 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5815 (__v8di)_mm512_sra_epi64(__A, __B),5489 (__v8di)_mm512_sra_epi64(__A, __B),
5816 (__v8di)_mm512_setzero_si512());5490 (__v8di)_mm512_setzero_si512());
5817}5491}
58185492
5819static __inline__ __m512i __DEFAULT_FN_ATTRS5125493static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5820_mm512_srav_epi32(__m512i __X, __m512i __Y)5494_mm512_srav_epi32(__m512i __X, __m512i __Y) {
5821{
5822 return (__m512i)__builtin_ia32_psrav16si((__v16si)__X, (__v16si)__Y);5495 return (__m512i)__builtin_ia32_psrav16si((__v16si)__X, (__v16si)__Y);
5823}5496}
58245497
5825static __inline__ __m512i __DEFAULT_FN_ATTRS5125498static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5826_mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y)5499_mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {
5827{
5828 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5500 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5829 (__v16si)_mm512_srav_epi32(__X, __Y),5501 (__v16si)_mm512_srav_epi32(__X, __Y),
5830 (__v16si)__W);5502 (__v16si)__W);
5831}5503}
58325504
5833static __inline__ __m512i __DEFAULT_FN_ATTRS5125505static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5834_mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y)5506_mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {
5835{
5836 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5507 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5837 (__v16si)_mm512_srav_epi32(__X, __Y),5508 (__v16si)_mm512_srav_epi32(__X, __Y),
5838 (__v16si)_mm512_setzero_si512());5509 (__v16si)_mm512_setzero_si512());
5839}5510}
58405511
5841static __inline__ __m512i __DEFAULT_FN_ATTRS5125512static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5842_mm512_srav_epi64(__m512i __X, __m512i __Y)5513_mm512_srav_epi64(__m512i __X, __m512i __Y)
5843{5514{
5844 return (__m512i)__builtin_ia32_psrav8di((__v8di)__X, (__v8di)__Y);5515 return (__m512i)__builtin_ia32_psrav8di((__v8di)__X, (__v8di)__Y);
5845}5516}
58465517
5847static __inline__ __m512i __DEFAULT_FN_ATTRS5125518static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5848_mm512_mask_srav_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)5519_mm512_mask_srav_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)
5849{5520{
5850 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5521 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
...@@ -5852,7 +5523,7 @@ _mm512_mask_srav_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)...@@ -5852,7 +5523,7 @@ _mm512_mask_srav_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)
5852 (__v8di)__W);5523 (__v8di)__W);
5853}5524}
58545525
5855static __inline__ __m512i __DEFAULT_FN_ATTRS5125526static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5856_mm512_maskz_srav_epi64(__mmask8 __U, __m512i __X, __m512i __Y)5527_mm512_maskz_srav_epi64(__mmask8 __U, __m512i __X, __m512i __Y)
5857{5528{
5858 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5529 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
...@@ -5860,79 +5531,70 @@ _mm512_maskz_srav_epi64(__mmask8 __U, __m512i __X, __m512i __Y)...@@ -5860,79 +5531,70 @@ _mm512_maskz_srav_epi64(__mmask8 __U, __m512i __X, __m512i __Y)
5860 (__v8di)_mm512_setzero_si512());5531 (__v8di)_mm512_setzero_si512());
5861}5532}
58625533
5863static __inline__ __m512i __DEFAULT_FN_ATTRS5125534static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5864_mm512_srl_epi32(__m512i __A, __m128i __B)5535_mm512_srl_epi32(__m512i __A, __m128i __B) {
5865{
5866 return (__m512i)__builtin_ia32_psrld512((__v16si) __A, (__v4si)__B);5536 return (__m512i)__builtin_ia32_psrld512((__v16si) __A, (__v4si)__B);
5867}5537}
58685538
5869static __inline__ __m512i __DEFAULT_FN_ATTRS5125539static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5870_mm512_mask_srl_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B)5540_mm512_mask_srl_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) {
5871{
5872 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5541 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5873 (__v16si)_mm512_srl_epi32(__A, __B),5542 (__v16si)_mm512_srl_epi32(__A, __B),
5874 (__v16si)__W);5543 (__v16si)__W);
5875}5544}
58765545
5877static __inline__ __m512i __DEFAULT_FN_ATTRS5125546static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5878_mm512_maskz_srl_epi32(__mmask16 __U, __m512i __A, __m128i __B)5547_mm512_maskz_srl_epi32(__mmask16 __U, __m512i __A, __m128i __B) {
5879{
5880 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5548 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5881 (__v16si)_mm512_srl_epi32(__A, __B),5549 (__v16si)_mm512_srl_epi32(__A, __B),
5882 (__v16si)_mm512_setzero_si512());5550 (__v16si)_mm512_setzero_si512());
5883}5551}
58845552
5885static __inline__ __m512i __DEFAULT_FN_ATTRS5125553static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5886_mm512_srl_epi64(__m512i __A, __m128i __B)5554_mm512_srl_epi64(__m512i __A, __m128i __B) {
5887{
5888 return (__m512i)__builtin_ia32_psrlq512((__v8di)__A, (__v2di)__B);5555 return (__m512i)__builtin_ia32_psrlq512((__v8di)__A, (__v2di)__B);
5889}5556}
58905557
5891static __inline__ __m512i __DEFAULT_FN_ATTRS5125558static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5892_mm512_mask_srl_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B)5559_mm512_mask_srl_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) {
5893{
5894 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5560 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5895 (__v8di)_mm512_srl_epi64(__A, __B),5561 (__v8di)_mm512_srl_epi64(__A, __B),
5896 (__v8di)__W);5562 (__v8di)__W);
5897}5563}
58985564
5899static __inline__ __m512i __DEFAULT_FN_ATTRS5125565static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5900_mm512_maskz_srl_epi64(__mmask8 __U, __m512i __A, __m128i __B)5566_mm512_maskz_srl_epi64(__mmask8 __U, __m512i __A, __m128i __B) {
5901{
5902 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5567 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
5903 (__v8di)_mm512_srl_epi64(__A, __B),5568 (__v8di)_mm512_srl_epi64(__A, __B),
5904 (__v8di)_mm512_setzero_si512());5569 (__v8di)_mm512_setzero_si512());
5905}5570}
59065571
5907static __inline__ __m512i __DEFAULT_FN_ATTRS5125572static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5908_mm512_srlv_epi32(__m512i __X, __m512i __Y)5573_mm512_srlv_epi32(__m512i __X, __m512i __Y) {
5909{
5910 return (__m512i)__builtin_ia32_psrlv16si((__v16si)__X, (__v16si)__Y);5574 return (__m512i)__builtin_ia32_psrlv16si((__v16si)__X, (__v16si)__Y);
5911}5575}
59125576
5913static __inline__ __m512i __DEFAULT_FN_ATTRS5125577static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5914_mm512_mask_srlv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y)5578_mm512_mask_srlv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) {
5915{
5916 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5579 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5917 (__v16si)_mm512_srlv_epi32(__X, __Y),5580 (__v16si)_mm512_srlv_epi32(__X, __Y),
5918 (__v16si)__W);5581 (__v16si)__W);
5919}5582}
59205583
5921static __inline__ __m512i __DEFAULT_FN_ATTRS5125584static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5922_mm512_maskz_srlv_epi32(__mmask16 __U, __m512i __X, __m512i __Y)5585_mm512_maskz_srlv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) {
5923{
5924 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,5586 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
5925 (__v16si)_mm512_srlv_epi32(__X, __Y),5587 (__v16si)_mm512_srlv_epi32(__X, __Y),
5926 (__v16si)_mm512_setzero_si512());5588 (__v16si)_mm512_setzero_si512());
5927}5589}
59285590
5929static __inline__ __m512i __DEFAULT_FN_ATTRS5125591static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5930_mm512_srlv_epi64 (__m512i __X, __m512i __Y)5592_mm512_srlv_epi64 (__m512i __X, __m512i __Y)
5931{5593{
5932 return (__m512i)__builtin_ia32_psrlv8di((__v8di)__X, (__v8di)__Y);5594 return (__m512i)__builtin_ia32_psrlv8di((__v8di)__X, (__v8di)__Y);
5933}5595}
59345596
5935static __inline__ __m512i __DEFAULT_FN_ATTRS5125597static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5936_mm512_mask_srlv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)5598_mm512_mask_srlv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)
5937{5599{
5938 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5600 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
...@@ -5940,7 +5602,7 @@ _mm512_mask_srlv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)...@@ -5940,7 +5602,7 @@ _mm512_mask_srlv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y)
5940 (__v8di)__W);5602 (__v8di)__W);
5941}5603}
59425604
5943static __inline__ __m512i __DEFAULT_FN_ATTRS5125605static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
5944_mm512_maskz_srlv_epi64(__mmask8 __U, __m512i __X, __m512i __Y)5606_mm512_maskz_srlv_epi64(__mmask8 __U, __m512i __X, __m512i __Y)
5945{5607{
5946 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,5608 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
...@@ -6190,115 +5852,104 @@ _mm_cvttss_u64 (__m128 __A)...@@ -6190,115 +5852,104 @@ _mm_cvttss_u64 (__m128 __A)
6190 (__v16sf)_mm512_permute_ps((X), (C)), \5852 (__v16sf)_mm512_permute_ps((X), (C)), \
6191 (__v16sf)_mm512_setzero_ps()))5853 (__v16sf)_mm512_setzero_ps()))
61925854
6193static __inline__ __m512d __DEFAULT_FN_ATTRS5125855static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6194_mm512_permutevar_pd(__m512d __A, __m512i __C)5856_mm512_permutevar_pd(__m512d __A, __m512i __C) {
6195{
6196 return (__m512d)__builtin_ia32_vpermilvarpd512((__v8df)__A, (__v8di)__C);5857 return (__m512d)__builtin_ia32_vpermilvarpd512((__v8df)__A, (__v8di)__C);
6197}5858}
61985859
6199static __inline__ __m512d __DEFAULT_FN_ATTRS5125860static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6200_mm512_mask_permutevar_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512i __C)5861_mm512_mask_permutevar_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512i __C) {
6201{
6202 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,5862 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
6203 (__v8df)_mm512_permutevar_pd(__A, __C),5863 (__v8df)_mm512_permutevar_pd(__A, __C),
6204 (__v8df)__W);5864 (__v8df)__W);
6205}5865}
62065866
6207static __inline__ __m512d __DEFAULT_FN_ATTRS5125867static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6208_mm512_maskz_permutevar_pd(__mmask8 __U, __m512d __A, __m512i __C)5868_mm512_maskz_permutevar_pd(__mmask8 __U, __m512d __A, __m512i __C) {
6209{
6210 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,5869 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
6211 (__v8df)_mm512_permutevar_pd(__A, __C),5870 (__v8df)_mm512_permutevar_pd(__A, __C),
6212 (__v8df)_mm512_setzero_pd());5871 (__v8df)_mm512_setzero_pd());
6213}5872}
62145873
6215static __inline__ __m512 __DEFAULT_FN_ATTRS5125874static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6216_mm512_permutevar_ps(__m512 __A, __m512i __C)5875_mm512_permutevar_ps(__m512 __A, __m512i __C) {
6217{
6218 return (__m512)__builtin_ia32_vpermilvarps512((__v16sf)__A, (__v16si)__C);5876 return (__m512)__builtin_ia32_vpermilvarps512((__v16sf)__A, (__v16si)__C);
6219}5877}
62205878
6221static __inline__ __m512 __DEFAULT_FN_ATTRS5125879static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6222_mm512_mask_permutevar_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512i __C)5880_mm512_mask_permutevar_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512i __C) {
6223{
6224 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,5881 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
6225 (__v16sf)_mm512_permutevar_ps(__A, __C),5882 (__v16sf)_mm512_permutevar_ps(__A, __C),
6226 (__v16sf)__W);5883 (__v16sf)__W);
6227}5884}
62285885
6229static __inline__ __m512 __DEFAULT_FN_ATTRS5125886static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6230_mm512_maskz_permutevar_ps(__mmask16 __U, __m512 __A, __m512i __C)5887_mm512_maskz_permutevar_ps(__mmask16 __U, __m512 __A, __m512i __C) {
6231{
6232 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,5888 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
6233 (__v16sf)_mm512_permutevar_ps(__A, __C),5889 (__v16sf)_mm512_permutevar_ps(__A, __C),
6234 (__v16sf)_mm512_setzero_ps());5890 (__v16sf)_mm512_setzero_ps());
6235}5891}
62365892
6237static __inline __m512d __DEFAULT_FN_ATTRS5125893static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6238_mm512_permutex2var_pd(__m512d __A, __m512i __I, __m512d __B)5894_mm512_permutex2var_pd(__m512d __A, __m512i __I, __m512d __B) {
6239{
6240 return (__m512d)__builtin_ia32_vpermi2varpd512((__v8df)__A, (__v8di)__I,5895 return (__m512d)__builtin_ia32_vpermi2varpd512((__v8df)__A, (__v8di)__I,
6241 (__v8df)__B);5896 (__v8df)__B);
6242}5897}
62435898
6244static __inline__ __m512d __DEFAULT_FN_ATTRS5125899static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6245_mm512_mask_permutex2var_pd(__m512d __A, __mmask8 __U, __m512i __I, __m512d __B)5900_mm512_mask_permutex2var_pd(__m512d __A, __mmask8 __U, __m512i __I,
6246{5901 __m512d __B) {
6247 return (__m512d)__builtin_ia32_selectpd_512(__U,5902 return (__m512d)__builtin_ia32_selectpd_512(__U,
6248 (__v8df)_mm512_permutex2var_pd(__A, __I, __B),5903 (__v8df)_mm512_permutex2var_pd(__A, __I, __B),
6249 (__v8df)__A);5904 (__v8df)__A);
6250}5905}
62515906
6252static __inline__ __m512d __DEFAULT_FN_ATTRS5125907static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6253_mm512_mask2_permutex2var_pd(__m512d __A, __m512i __I, __mmask8 __U,5908_mm512_mask2_permutex2var_pd(__m512d __A, __m512i __I, __mmask8 __U,
6254 __m512d __B)5909 __m512d __B) {
6255{
6256 return (__m512d)__builtin_ia32_selectpd_512(__U,5910 return (__m512d)__builtin_ia32_selectpd_512(__U,
6257 (__v8df)_mm512_permutex2var_pd(__A, __I, __B),5911 (__v8df)_mm512_permutex2var_pd(__A, __I, __B),
6258 (__v8df)(__m512d)__I);5912 (__v8df)(__m512d)__I);
6259}5913}
62605914
6261static __inline__ __m512d __DEFAULT_FN_ATTRS5125915static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6262_mm512_maskz_permutex2var_pd(__mmask8 __U, __m512d __A, __m512i __I,5916_mm512_maskz_permutex2var_pd(__mmask8 __U, __m512d __A, __m512i __I,
6263 __m512d __B)5917 __m512d __B) {
6264{
6265 return (__m512d)__builtin_ia32_selectpd_512(__U,5918 return (__m512d)__builtin_ia32_selectpd_512(__U,
6266 (__v8df)_mm512_permutex2var_pd(__A, __I, __B),5919 (__v8df)_mm512_permutex2var_pd(__A, __I, __B),
6267 (__v8df)_mm512_setzero_pd());5920 (__v8df)_mm512_setzero_pd());
6268}5921}
62695922
6270static __inline __m512 __DEFAULT_FN_ATTRS5125923static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6271_mm512_permutex2var_ps(__m512 __A, __m512i __I, __m512 __B)5924_mm512_permutex2var_ps(__m512 __A, __m512i __I, __m512 __B) {
6272{
6273 return (__m512)__builtin_ia32_vpermi2varps512((__v16sf)__A, (__v16si)__I,5925 return (__m512)__builtin_ia32_vpermi2varps512((__v16sf)__A, (__v16si)__I,
6274 (__v16sf) __B);5926 (__v16sf) __B);
6275}5927}
62765928
6277static __inline__ __m512 __DEFAULT_FN_ATTRS5125929static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6278_mm512_mask_permutex2var_ps(__m512 __A, __mmask16 __U, __m512i __I, __m512 __B)5930_mm512_mask_permutex2var_ps(__m512 __A, __mmask16 __U, __m512i __I,
6279{5931 __m512 __B) {
6280 return (__m512)__builtin_ia32_selectps_512(__U,5932 return (__m512)__builtin_ia32_selectps_512(__U,
6281 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),5933 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),
6282 (__v16sf)__A);5934 (__v16sf)__A);
6283}5935}
62845936
6285static __inline__ __m512 __DEFAULT_FN_ATTRS5125937static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6286_mm512_mask2_permutex2var_ps(__m512 __A, __m512i __I, __mmask16 __U, __m512 __B)5938_mm512_mask2_permutex2var_ps(__m512 __A, __m512i __I, __mmask16 __U,
6287{5939 __m512 __B) {
6288 return (__m512)__builtin_ia32_selectps_512(__U,5940 return (__m512)__builtin_ia32_selectps_512(__U,
6289 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),5941 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),
6290 (__v16sf)(__m512)__I);5942 (__v16sf)(__m512)__I);
6291}5943}
62925944
6293static __inline__ __m512 __DEFAULT_FN_ATTRS5125945static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6294_mm512_maskz_permutex2var_ps(__mmask16 __U, __m512 __A, __m512i __I, __m512 __B)5946_mm512_maskz_permutex2var_ps(__mmask16 __U, __m512 __A, __m512i __I,
6295{5947 __m512 __B) {
6296 return (__m512)__builtin_ia32_selectps_512(__U,5948 return (__m512)__builtin_ia32_selectps_512(__U,
6297 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),5949 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B),
6298 (__v16sf)_mm512_setzero_ps());5950 (__v16sf)_mm512_setzero_ps());
6299}5951}
63005952
6301
6302#define _mm512_cvtt_roundpd_epu32(A, R) \5953#define _mm512_cvtt_roundpd_epu32(A, R) \
6303 ((__m256i)__builtin_ia32_cvttpd2udq512_mask((__v8df)(__m512d)(A), \5954 ((__m256i)__builtin_ia32_cvttpd2udq512_mask((__v8df)(__m512d)(A), \
6304 (__v8si)_mm256_undefined_si256(), \5955 (__v8si)_mm256_undefined_si256(), \
...@@ -6622,46 +6273,41 @@ _mm_maskz_scalef_ss (__mmask8 __U, __m128 __A, __m128 __B)...@@ -6622,46 +6273,41 @@ _mm_maskz_scalef_ss (__mmask8 __U, __m128 __A, __m128 __B)
6622 (__mmask8)(U), \6273 (__mmask8)(U), \
6623 (int)(R)))6274 (int)(R)))
66246275
6625static __inline__ __m512i __DEFAULT_FN_ATTRS5126276static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6626_mm512_srai_epi32(__m512i __A, unsigned int __B)6277_mm512_srai_epi32(__m512i __A, unsigned int __B) {
6627{
6628 return (__m512i)__builtin_ia32_psradi512((__v16si)__A, (int)__B);6278 return (__m512i)__builtin_ia32_psradi512((__v16si)__A, (int)__B);
6629}6279}
66306280
6631static __inline__ __m512i __DEFAULT_FN_ATTRS5126281static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6632_mm512_mask_srai_epi32(__m512i __W, __mmask16 __U, __m512i __A,6282_mm512_mask_srai_epi32(__m512i __W, __mmask16 __U, __m512i __A,
6633 unsigned int __B)6283 unsigned int __B) {
6634{
6635 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,6284 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
6636 (__v16si)_mm512_srai_epi32(__A, __B),6285 (__v16si)_mm512_srai_epi32(__A, __B),
6637 (__v16si)__W);6286 (__v16si)__W);
6638}6287}
66396288
6640static __inline__ __m512i __DEFAULT_FN_ATTRS5126289static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6641_mm512_maskz_srai_epi32(__mmask16 __U, __m512i __A,6290_mm512_maskz_srai_epi32(__mmask16 __U, __m512i __A, unsigned int __B) {
6642 unsigned int __B) {
6643 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,6291 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
6644 (__v16si)_mm512_srai_epi32(__A, __B),6292 (__v16si)_mm512_srai_epi32(__A, __B),
6645 (__v16si)_mm512_setzero_si512());6293 (__v16si)_mm512_setzero_si512());
6646}6294}
66476295
6648static __inline__ __m512i __DEFAULT_FN_ATTRS5126296static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6649_mm512_srai_epi64(__m512i __A, unsigned int __B)6297_mm512_srai_epi64(__m512i __A, unsigned int __B) {
6650{
6651 return (__m512i)__builtin_ia32_psraqi512((__v8di)__A, (int)__B);6298 return (__m512i)__builtin_ia32_psraqi512((__v8di)__A, (int)__B);
6652}6299}
66536300
6654static __inline__ __m512i __DEFAULT_FN_ATTRS5126301static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6655_mm512_mask_srai_epi64(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B)6302_mm512_mask_srai_epi64(__m512i __W, __mmask8 __U, __m512i __A,
6656{6303 unsigned int __B) {
6657 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,6304 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
6658 (__v8di)_mm512_srai_epi64(__A, __B),6305 (__v8di)_mm512_srai_epi64(__A, __B),
6659 (__v8di)__W);6306 (__v8di)__W);
6660}6307}
66616308
6662static __inline__ __m512i __DEFAULT_FN_ATTRS5126309static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6663_mm512_maskz_srai_epi64(__mmask8 __U, __m512i __A, unsigned int __B)6310_mm512_maskz_srai_epi64(__mmask8 __U, __m512i __A, unsigned int __B) {
6664{
6665 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,6311 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U,
6666 (__v8di)_mm512_srai_epi64(__A, __B),6312 (__v8di)_mm512_srai_epi64(__A, __B),
6667 (__v8di)_mm512_setzero_si512());6313 (__v8di)_mm512_setzero_si512());
...@@ -6827,33 +6473,29 @@ _mm_maskz_sqrt_ss (__mmask8 __U, __m128 __A, __m128 __B)...@@ -6827,33 +6473,29 @@ _mm_maskz_sqrt_ss (__mmask8 __U, __m128 __A, __m128 __B)
6827 (__v4sf)_mm_setzero_ps(), \6473 (__v4sf)_mm_setzero_ps(), \
6828 (__mmask8)(U), (int)(R)))6474 (__mmask8)(U), (int)(R)))
68296475
6830static __inline__ __m512 __DEFAULT_FN_ATTRS5126476static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6831_mm512_broadcast_f32x4(__m128 __A)6477_mm512_broadcast_f32x4(__m128 __A) {
6832{
6833 return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,6478 return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,
6834 0, 1, 2, 3, 0, 1, 2, 3,6479 0, 1, 2, 3, 0, 1, 2, 3,
6835 0, 1, 2, 3, 0, 1, 2, 3);6480 0, 1, 2, 3, 0, 1, 2, 3);
6836}6481}
68376482
6838static __inline__ __m512 __DEFAULT_FN_ATTRS5126483static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6839_mm512_mask_broadcast_f32x4(__m512 __O, __mmask16 __M, __m128 __A)6484_mm512_mask_broadcast_f32x4(__m512 __O, __mmask16 __M, __m128 __A) {
6840{
6841 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,6485 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
6842 (__v16sf)_mm512_broadcast_f32x4(__A),6486 (__v16sf)_mm512_broadcast_f32x4(__A),
6843 (__v16sf)__O);6487 (__v16sf)__O);
6844}6488}
68456489
6846static __inline__ __m512 __DEFAULT_FN_ATTRS5126490static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6847_mm512_maskz_broadcast_f32x4(__mmask16 __M, __m128 __A)6491_mm512_maskz_broadcast_f32x4(__mmask16 __M, __m128 __A) {
6848{
6849 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,6492 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M,
6850 (__v16sf)_mm512_broadcast_f32x4(__A),6493 (__v16sf)_mm512_broadcast_f32x4(__A),
6851 (__v16sf)_mm512_setzero_ps());6494 (__v16sf)_mm512_setzero_ps());
6852}6495}
68536496
6854static __inline__ __m512d __DEFAULT_FN_ATTRS5126497static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6855_mm512_broadcast_f64x4(__m256d __A)6498_mm512_broadcast_f64x4(__m256d __A) {
6856{
6857 return (__m512d)__builtin_shufflevector((__v4df)__A, (__v4df)__A,6499 return (__m512d)__builtin_shufflevector((__v4df)__A, (__v4df)__A,
6858 0, 1, 2, 3, 0, 1, 2, 3);6500 0, 1, 2, 3, 0, 1, 2, 3);
6859}6501}
...@@ -6874,33 +6516,29 @@ _mm512_maskz_broadcast_f64x4(__mmask8 __M, __m256d __A)...@@ -6874,33 +6516,29 @@ _mm512_maskz_broadcast_f64x4(__mmask8 __M, __m256d __A)
6874 (__v8df)_mm512_setzero_pd());6516 (__v8df)_mm512_setzero_pd());
6875}6517}
68766518
6877static __inline__ __m512i __DEFAULT_FN_ATTRS5126519static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6878_mm512_broadcast_i32x4(__m128i __A)6520_mm512_broadcast_i32x4(__m128i __A) {
6879{
6880 return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,6521 return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,
6881 0, 1, 2, 3, 0, 1, 2, 3,6522 0, 1, 2, 3, 0, 1, 2, 3,
6882 0, 1, 2, 3, 0, 1, 2, 3);6523 0, 1, 2, 3, 0, 1, 2, 3);
6883}6524}
68846525
6885static __inline__ __m512i __DEFAULT_FN_ATTRS5126526static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6886_mm512_mask_broadcast_i32x4(__m512i __O, __mmask16 __M, __m128i __A)6527_mm512_mask_broadcast_i32x4(__m512i __O, __mmask16 __M, __m128i __A) {
6887{
6888 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,6528 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
6889 (__v16si)_mm512_broadcast_i32x4(__A),6529 (__v16si)_mm512_broadcast_i32x4(__A),
6890 (__v16si)__O);6530 (__v16si)__O);
6891}6531}
68926532
6893static __inline__ __m512i __DEFAULT_FN_ATTRS5126533static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6894_mm512_maskz_broadcast_i32x4(__mmask16 __M, __m128i __A)6534_mm512_maskz_broadcast_i32x4(__mmask16 __M, __m128i __A) {
6895{
6896 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,6535 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
6897 (__v16si)_mm512_broadcast_i32x4(__A),6536 (__v16si)_mm512_broadcast_i32x4(__A),
6898 (__v16si)_mm512_setzero_si512());6537 (__v16si)_mm512_setzero_si512());
6899}6538}
69006539
6901static __inline__ __m512i __DEFAULT_FN_ATTRS5126540static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
6902_mm512_broadcast_i64x4(__m256i __A)6541_mm512_broadcast_i64x4(__m256i __A) {
6903{
6904 return (__m512i)__builtin_shufflevector((__v4di)__A, (__v4di)__A,6542 return (__m512i)__builtin_shufflevector((__v4di)__A, (__v4di)__A,
6905 0, 1, 2, 3, 0, 1, 2, 3);6543 0, 1, 2, 3, 0, 1, 2, 3);
6906}6544}
...@@ -6921,33 +6559,29 @@ _mm512_maskz_broadcast_i64x4(__mmask8 __M, __m256i __A)...@@ -6921,33 +6559,29 @@ _mm512_maskz_broadcast_i64x4(__mmask8 __M, __m256i __A)
6921 (__v8di)_mm512_setzero_si512());6559 (__v8di)_mm512_setzero_si512());
6922}6560}
69236561
6924static __inline__ __m512d __DEFAULT_FN_ATTRS5126562static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6925_mm512_mask_broadcastsd_pd (__m512d __O, __mmask8 __M, __m128d __A)6563_mm512_mask_broadcastsd_pd(__m512d __O, __mmask8 __M, __m128d __A) {
6926{
6927 return (__m512d)__builtin_ia32_selectpd_512(__M,6564 return (__m512d)__builtin_ia32_selectpd_512(__M,
6928 (__v8df) _mm512_broadcastsd_pd(__A),6565 (__v8df) _mm512_broadcastsd_pd(__A),
6929 (__v8df) __O);6566 (__v8df) __O);
6930}6567}
69316568
6932static __inline__ __m512d __DEFAULT_FN_ATTRS5126569static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
6933_mm512_maskz_broadcastsd_pd (__mmask8 __M, __m128d __A)6570_mm512_maskz_broadcastsd_pd(__mmask8 __M, __m128d __A) {
6934{
6935 return (__m512d)__builtin_ia32_selectpd_512(__M,6571 return (__m512d)__builtin_ia32_selectpd_512(__M,
6936 (__v8df) _mm512_broadcastsd_pd(__A),6572 (__v8df) _mm512_broadcastsd_pd(__A),
6937 (__v8df) _mm512_setzero_pd());6573 (__v8df) _mm512_setzero_pd());
6938}6574}
69396575
6940static __inline__ __m512 __DEFAULT_FN_ATTRS5126576static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6941_mm512_mask_broadcastss_ps (__m512 __O, __mmask16 __M, __m128 __A)6577_mm512_mask_broadcastss_ps(__m512 __O, __mmask16 __M, __m128 __A) {
6942{
6943 return (__m512)__builtin_ia32_selectps_512(__M,6578 return (__m512)__builtin_ia32_selectps_512(__M,
6944 (__v16sf) _mm512_broadcastss_ps(__A),6579 (__v16sf) _mm512_broadcastss_ps(__A),
6945 (__v16sf) __O);6580 (__v16sf) __O);
6946}6581}
69476582
6948static __inline__ __m512 __DEFAULT_FN_ATTRS5126583static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
6949_mm512_maskz_broadcastss_ps (__mmask16 __M, __m128 __A)6584_mm512_maskz_broadcastss_ps(__mmask16 __M, __m128 __A) {
6950{
6951 return (__m512)__builtin_ia32_selectps_512(__M,6585 return (__m512)__builtin_ia32_selectps_512(__M,
6952 (__v16sf) _mm512_broadcastss_ps(__A),6586 (__v16sf) _mm512_broadcastss_ps(__A),
6953 (__v16sf) _mm512_setzero_ps());6587 (__v16sf) _mm512_setzero_ps());
...@@ -7391,10 +7025,10 @@ _mm512_mask_cvtepi64_storeu_epi16 (void *__P, __mmask8 __M, __m512i __A)...@@ -7391,10 +7025,10 @@ _mm512_mask_cvtepi64_storeu_epi16 (void *__P, __mmask8 __M, __m512i __A)
7391 __builtin_ia32_pmovqw512mem_mask ((__v8hi *) __P, (__v8di) __A, __M);7025 __builtin_ia32_pmovqw512mem_mask ((__v8hi *) __P, (__v8di) __A, __M);
7392}7026}
73937027
7394#define _mm512_extracti32x4_epi32(A, imm) \7028#define _mm512_extracti32x4_epi32(A, imm) \
7395 ((__m128i)__builtin_ia32_extracti32x4_mask((__v16si)(__m512i)(A), (int)(imm), \7029 ((__m128i)__builtin_ia32_extracti32x4_mask( \
7396 (__v4si)_mm_undefined_si128(), \7030 (__v16si)(__m512i)(A), (int)(imm), (__v4si)_mm_setzero_si128(), \
7397 (__mmask8)-1))7031 (__mmask8) - 1))
73987032
7399#define _mm512_mask_extracti32x4_epi32(W, U, A, imm) \7033#define _mm512_mask_extracti32x4_epi32(W, U, A, imm) \
7400 ((__m128i)__builtin_ia32_extracti32x4_mask((__v16si)(__m512i)(A), (int)(imm), \7034 ((__m128i)__builtin_ia32_extracti32x4_mask((__v16si)(__m512i)(A), (int)(imm), \
...@@ -7406,10 +7040,10 @@ _mm512_mask_cvtepi64_storeu_epi16 (void *__P, __mmask8 __M, __m512i __A)...@@ -7406,10 +7040,10 @@ _mm512_mask_cvtepi64_storeu_epi16 (void *__P, __mmask8 __M, __m512i __A)
7406 (__v4si)_mm_setzero_si128(), \7040 (__v4si)_mm_setzero_si128(), \
7407 (__mmask8)(U)))7041 (__mmask8)(U)))
74087042
7409#define _mm512_extracti64x4_epi64(A, imm) \7043#define _mm512_extracti64x4_epi64(A, imm) \
7410 ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \7044 ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \
7411 (__v4di)_mm256_undefined_si256(), \7045 (__v4di)_mm256_setzero_si256(), \
7412 (__mmask8)-1))7046 (__mmask8) - 1))
74137047
7414#define _mm512_mask_extracti64x4_epi64(W, U, A, imm) \7048#define _mm512_mask_extracti64x4_epi64(W, U, A, imm) \
7415 ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \7049 ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \
...@@ -8274,93 +7908,82 @@ _mm_mask3_fnmsub_sd (__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U)...@@ -8274,93 +7908,82 @@ _mm_mask3_fnmsub_sd (__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U)
8274 (__v8di)_mm512_permutex_epi64((X), (C)), \7908 (__v8di)_mm512_permutex_epi64((X), (C)), \
8275 (__v8di)_mm512_setzero_si512()))7909 (__v8di)_mm512_setzero_si512()))
82767910
8277static __inline__ __m512d __DEFAULT_FN_ATTRS5127911static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8278_mm512_permutexvar_pd (__m512i __X, __m512d __Y)7912_mm512_permutexvar_pd(__m512i __X, __m512d __Y) {
8279{
8280 return (__m512d)__builtin_ia32_permvardf512((__v8df) __Y, (__v8di) __X);7913 return (__m512d)__builtin_ia32_permvardf512((__v8df) __Y, (__v8di) __X);
8281}7914}
82827915
8283static __inline__ __m512d __DEFAULT_FN_ATTRS5127916static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8284_mm512_mask_permutexvar_pd (__m512d __W, __mmask8 __U, __m512i __X, __m512d __Y)7917_mm512_mask_permutexvar_pd(__m512d __W, __mmask8 __U, __m512i __X,
8285{7918 __m512d __Y) {
8286 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,7919 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
8287 (__v8df)_mm512_permutexvar_pd(__X, __Y),7920 (__v8df)_mm512_permutexvar_pd(__X, __Y),
8288 (__v8df)__W);7921 (__v8df)__W);
8289}7922}
82907923
8291static __inline__ __m512d __DEFAULT_FN_ATTRS5127924static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8292_mm512_maskz_permutexvar_pd (__mmask8 __U, __m512i __X, __m512d __Y)7925_mm512_maskz_permutexvar_pd(__mmask8 __U, __m512i __X, __m512d __Y) {
8293{
8294 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,7926 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
8295 (__v8df)_mm512_permutexvar_pd(__X, __Y),7927 (__v8df)_mm512_permutexvar_pd(__X, __Y),
8296 (__v8df)_mm512_setzero_pd());7928 (__v8df)_mm512_setzero_pd());
8297}7929}
82987930
8299static __inline__ __m512i __DEFAULT_FN_ATTRS5127931static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
8300_mm512_permutexvar_epi64 (__m512i __X, __m512i __Y)7932_mm512_permutexvar_epi64(__m512i __X, __m512i __Y) {
8301{
8302 return (__m512i)__builtin_ia32_permvardi512((__v8di)__Y, (__v8di)__X);7933 return (__m512i)__builtin_ia32_permvardi512((__v8di)__Y, (__v8di)__X);
8303}7934}
83047935
8305static __inline__ __m512i __DEFAULT_FN_ATTRS5127936static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
8306_mm512_maskz_permutexvar_epi64 (__mmask8 __M, __m512i __X, __m512i __Y)7937_mm512_maskz_permutexvar_epi64(__mmask8 __M, __m512i __X, __m512i __Y) {
8307{
8308 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,7938 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
8309 (__v8di)_mm512_permutexvar_epi64(__X, __Y),7939 (__v8di)_mm512_permutexvar_epi64(__X, __Y),
8310 (__v8di)_mm512_setzero_si512());7940 (__v8di)_mm512_setzero_si512());
8311}7941}
83127942
8313static __inline__ __m512i __DEFAULT_FN_ATTRS5127943static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
8314_mm512_mask_permutexvar_epi64 (__m512i __W, __mmask8 __M, __m512i __X,7944_mm512_mask_permutexvar_epi64(__m512i __W, __mmask8 __M, __m512i __X,
8315 __m512i __Y)7945 __m512i __Y) {
8316{
8317 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,7946 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M,
8318 (__v8di)_mm512_permutexvar_epi64(__X, __Y),7947 (__v8di)_mm512_permutexvar_epi64(__X, __Y),
8319 (__v8di)__W);7948 (__v8di)__W);
8320}7949}
83217950
8322static __inline__ __m512 __DEFAULT_FN_ATTRS5127951static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8323_mm512_permutexvar_ps (__m512i __X, __m512 __Y)7952_mm512_permutexvar_ps(__m512i __X, __m512 __Y) {
8324{
8325 return (__m512)__builtin_ia32_permvarsf512((__v16sf)__Y, (__v16si)__X);7953 return (__m512)__builtin_ia32_permvarsf512((__v16sf)__Y, (__v16si)__X);
8326}7954}
83277955
8328static __inline__ __m512 __DEFAULT_FN_ATTRS5127956static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8329_mm512_mask_permutexvar_ps (__m512 __W, __mmask16 __U, __m512i __X, __m512 __Y)7957_mm512_mask_permutexvar_ps(__m512 __W, __mmask16 __U, __m512i __X, __m512 __Y) {
8330{
8331 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,7958 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
8332 (__v16sf)_mm512_permutexvar_ps(__X, __Y),7959 (__v16sf)_mm512_permutexvar_ps(__X, __Y),
8333 (__v16sf)__W);7960 (__v16sf)__W);
8334}7961}
83357962
8336static __inline__ __m512 __DEFAULT_FN_ATTRS5127963static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8337_mm512_maskz_permutexvar_ps (__mmask16 __U, __m512i __X, __m512 __Y)7964_mm512_maskz_permutexvar_ps(__mmask16 __U, __m512i __X, __m512 __Y) {
8338{
8339 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,7965 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
8340 (__v16sf)_mm512_permutexvar_ps(__X, __Y),7966 (__v16sf)_mm512_permutexvar_ps(__X, __Y),
8341 (__v16sf)_mm512_setzero_ps());7967 (__v16sf)_mm512_setzero_ps());
8342}7968}
83437969
8344static __inline__ __m512i __DEFAULT_FN_ATTRS5127970static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
8345_mm512_permutexvar_epi32 (__m512i __X, __m512i __Y)7971_mm512_permutexvar_epi32(__m512i __X, __m512i __Y) {
8346{
8347 return (__m512i)__builtin_ia32_permvarsi512((__v16si)__Y, (__v16si)__X);7972 return (__m512i)__builtin_ia32_permvarsi512((__v16si)__Y, (__v16si)__X);
8348}7973}
83497974
8350#define _mm512_permutevar_epi32 _mm512_permutexvar_epi327975#define _mm512_permutevar_epi32 _mm512_permutexvar_epi32
83517976
8352static __inline__ __m512i __DEFAULT_FN_ATTRS5127977static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
8353_mm512_maskz_permutexvar_epi32 (__mmask16 __M, __m512i __X, __m512i __Y)7978_mm512_maskz_permutexvar_epi32(__mmask16 __M, __m512i __X, __m512i __Y) {
8354{
8355 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,7979 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
8356 (__v16si)_mm512_permutexvar_epi32(__X, __Y),7980 (__v16si)_mm512_permutexvar_epi32(__X, __Y),
8357 (__v16si)_mm512_setzero_si512());7981 (__v16si)_mm512_setzero_si512());
8358}7982}
83597983
8360static __inline__ __m512i __DEFAULT_FN_ATTRS5127984static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
8361_mm512_mask_permutexvar_epi32 (__m512i __W, __mmask16 __M, __m512i __X,7985_mm512_mask_permutexvar_epi32(__m512i __W, __mmask16 __M, __m512i __X,
8362 __m512i __Y)7986 __m512i __Y) {
8363{
8364 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,7987 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M,
8365 (__v16si)_mm512_permutexvar_epi32(__X, __Y),7988 (__v16si)_mm512_permutexvar_epi32(__X, __Y),
8366 (__v16si)__W);7989 (__v16si)__W);
...@@ -8368,69 +7991,59 @@ _mm512_mask_permutexvar_epi32 (__m512i __W, __mmask16 __M, __m512i __X,...@@ -8368,69 +7991,59 @@ _mm512_mask_permutexvar_epi32 (__m512i __W, __mmask16 __M, __m512i __X,
83687991
8369#define _mm512_mask_permutevar_epi32 _mm512_mask_permutexvar_epi327992#define _mm512_mask_permutevar_epi32 _mm512_mask_permutexvar_epi32
83707993
8371static __inline__ __mmask16 __DEFAULT_FN_ATTRS7994static __inline__ __mmask16
8372_mm512_kand (__mmask16 __A, __mmask16 __B)7995 __DEFAULT_FN_ATTRS_CONSTEXPR _mm512_kand(__mmask16 __A, __mmask16 __B) {
8373{
8374 return (__mmask16) __builtin_ia32_kandhi ((__mmask16) __A, (__mmask16) __B);7996 return (__mmask16) __builtin_ia32_kandhi ((__mmask16) __A, (__mmask16) __B);
8375}7997}
83767998
8377static __inline__ __mmask16 __DEFAULT_FN_ATTRS7999static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
8378_mm512_kandn (__mmask16 __A, __mmask16 __B)8000_mm512_kandn(__mmask16 __A, __mmask16 __B) {
8379{
8380 return (__mmask16) __builtin_ia32_kandnhi ((__mmask16) __A, (__mmask16) __B);8001 return (__mmask16) __builtin_ia32_kandnhi ((__mmask16) __A, (__mmask16) __B);
8381}8002}
83828003
8383static __inline__ __mmask16 __DEFAULT_FN_ATTRS8004static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
8384_mm512_kor (__mmask16 __A, __mmask16 __B)8005_mm512_kor(__mmask16 __A, __mmask16 __B) {
8385{
8386 return (__mmask16) __builtin_ia32_korhi ((__mmask16) __A, (__mmask16) __B);8006 return (__mmask16) __builtin_ia32_korhi ((__mmask16) __A, (__mmask16) __B);
8387}8007}
83888008
8389static __inline__ int __DEFAULT_FN_ATTRS8009static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
8390_mm512_kortestc (__mmask16 __A, __mmask16 __B)8010_mm512_kortestc(__mmask16 __A, __mmask16 __B) {
8391{
8392 return __builtin_ia32_kortestchi ((__mmask16) __A, (__mmask16) __B);8011 return __builtin_ia32_kortestchi ((__mmask16) __A, (__mmask16) __B);
8393}8012}
83948013
8395static __inline__ int __DEFAULT_FN_ATTRS8014static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
8396_mm512_kortestz (__mmask16 __A, __mmask16 __B)8015_mm512_kortestz(__mmask16 __A, __mmask16 __B) {
8397{
8398 return __builtin_ia32_kortestzhi ((__mmask16) __A, (__mmask16) __B);8016 return __builtin_ia32_kortestzhi ((__mmask16) __A, (__mmask16) __B);
8399}8017}
84008018
8401static __inline__ unsigned char __DEFAULT_FN_ATTRS8019static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
8402_kortestc_mask16_u8(__mmask16 __A, __mmask16 __B)8020_kortestc_mask16_u8(__mmask16 __A, __mmask16 __B) {
8403{
8404 return (unsigned char)__builtin_ia32_kortestchi(__A, __B);8021 return (unsigned char)__builtin_ia32_kortestchi(__A, __B);
8405}8022}
84068023
8407static __inline__ unsigned char __DEFAULT_FN_ATTRS8024static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
8408_kortestz_mask16_u8(__mmask16 __A, __mmask16 __B)8025_kortestz_mask16_u8(__mmask16 __A, __mmask16 __B) {
8409{
8410 return (unsigned char)__builtin_ia32_kortestzhi(__A, __B);8026 return (unsigned char)__builtin_ia32_kortestzhi(__A, __B);
8411}8027}
84128028
8413static __inline__ unsigned char __DEFAULT_FN_ATTRS8029static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR
8414_kortest_mask16_u8(__mmask16 __A, __mmask16 __B, unsigned char *__C) {8030_kortest_mask16_u8(__mmask16 __A, __mmask16 __B, unsigned char *__C) {
8415 *__C = (unsigned char)__builtin_ia32_kortestchi(__A, __B);8031 *__C = (unsigned char)__builtin_ia32_kortestchi(__A, __B);
8416 return (unsigned char)__builtin_ia32_kortestzhi(__A, __B);8032 return (unsigned char)__builtin_ia32_kortestzhi(__A, __B);
8417}8033}
84188034
8419static __inline__ __mmask16 __DEFAULT_FN_ATTRS8035static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
8420_mm512_kunpackb (__mmask16 __A, __mmask16 __B)8036_mm512_kunpackb(__mmask16 __A, __mmask16 __B) {
8421{
8422 return (__mmask16) __builtin_ia32_kunpckhi ((__mmask16) __A, (__mmask16) __B);8037 return (__mmask16) __builtin_ia32_kunpckhi ((__mmask16) __A, (__mmask16) __B);
8423}8038}
84248039
8425static __inline__ __mmask16 __DEFAULT_FN_ATTRS8040static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
8426_mm512_kxnor (__mmask16 __A, __mmask16 __B)8041_mm512_kxnor(__mmask16 __A, __mmask16 __B) {
8427{
8428 return (__mmask16) __builtin_ia32_kxnorhi ((__mmask16) __A, (__mmask16) __B);8042 return (__mmask16) __builtin_ia32_kxnorhi ((__mmask16) __A, (__mmask16) __B);
8429}8043}
84308044
8431static __inline__ __mmask16 __DEFAULT_FN_ATTRS8045static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
8432_mm512_kxor (__mmask16 __A, __mmask16 __B)8046_mm512_kxor(__mmask16 __A, __mmask16 __B) {
8433{
8434 return (__mmask16) __builtin_ia32_kxorhi ((__mmask16) __A, (__mmask16) __B);8047 return (__mmask16) __builtin_ia32_kxorhi ((__mmask16) __A, (__mmask16) __B);
8435}8048}
84368049
...@@ -8447,12 +8060,12 @@ _mm512_kxor (__mmask16 __A, __mmask16 __B)...@@ -8447,12 +8060,12 @@ _mm512_kxor (__mmask16 __A, __mmask16 __B)
8447#define _kshiftri_mask16(A, I) \8060#define _kshiftri_mask16(A, I) \
8448 ((__mmask16)__builtin_ia32_kshiftrihi((__mmask16)(A), (unsigned int)(I)))8061 ((__mmask16)__builtin_ia32_kshiftrihi((__mmask16)(A), (unsigned int)(I)))
84498062
8450static __inline__ unsigned int __DEFAULT_FN_ATTRS8063static __inline__ unsigned int
8451_cvtmask16_u32(__mmask16 __A) {8064 __DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask16_u32(__mmask16 __A) {
8452 return (unsigned int)__builtin_ia32_kmovw((__mmask16)__A);8065 return (unsigned int)__builtin_ia32_kmovw((__mmask16)__A);
8453}8066}
84548067
8455static __inline__ __mmask16 __DEFAULT_FN_ATTRS8068static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR
8456_cvtu32_mask16(unsigned int __A) {8069_cvtu32_mask16(unsigned int __A) {
8457 return (__mmask16)__builtin_ia32_kmovw((__mmask16)__A);8070 return (__mmask16)__builtin_ia32_kmovw((__mmask16)__A);
8458}8071}
...@@ -8665,74 +8278,66 @@ _mm512_mask_testn_epi64_mask (__mmask8 __U, __m512i __A, __m512i __B)...@@ -8665,74 +8278,66 @@ _mm512_mask_testn_epi64_mask (__mmask8 __U, __m512i __A, __m512i __B)
8665 _mm512_setzero_si512());8278 _mm512_setzero_si512());
8666}8279}
86678280
8668static __inline__ __m512 __DEFAULT_FN_ATTRS5128281static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8669_mm512_movehdup_ps (__m512 __A)8282_mm512_movehdup_ps (__m512 __A)
8670{8283{
8671 return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A,8284 return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A,
8672 1, 1, 3, 3, 5, 5, 7, 7, 9, 9, 11, 11, 13, 13, 15, 15);8285 1, 1, 3, 3, 5, 5, 7, 7, 9, 9, 11, 11, 13, 13, 15, 15);
8673}8286}
86748287
8675static __inline__ __m512 __DEFAULT_FN_ATTRS5128288static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8676_mm512_mask_movehdup_ps (__m512 __W, __mmask16 __U, __m512 __A)8289_mm512_mask_movehdup_ps(__m512 __W, __mmask16 __U, __m512 __A) {
8677{
8678 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,8290 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
8679 (__v16sf)_mm512_movehdup_ps(__A),8291 (__v16sf)_mm512_movehdup_ps(__A),
8680 (__v16sf)__W);8292 (__v16sf)__W);
8681}8293}
86828294
8683static __inline__ __m512 __DEFAULT_FN_ATTRS5128295static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8684_mm512_maskz_movehdup_ps (__mmask16 __U, __m512 __A)8296_mm512_maskz_movehdup_ps(__mmask16 __U, __m512 __A) {
8685{
8686 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,8297 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
8687 (__v16sf)_mm512_movehdup_ps(__A),8298 (__v16sf)_mm512_movehdup_ps(__A),
8688 (__v16sf)_mm512_setzero_ps());8299 (__v16sf)_mm512_setzero_ps());
8689}8300}
86908301
8691static __inline__ __m512 __DEFAULT_FN_ATTRS5128302static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8692_mm512_moveldup_ps (__m512 __A)8303_mm512_moveldup_ps (__m512 __A)
8693{8304{
8694 return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A,8305 return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A,
8695 0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14);8306 0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14);
8696}8307}
86978308
8698static __inline__ __m512 __DEFAULT_FN_ATTRS5128309static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8699_mm512_mask_moveldup_ps (__m512 __W, __mmask16 __U, __m512 __A)8310_mm512_mask_moveldup_ps(__m512 __W, __mmask16 __U, __m512 __A) {
8700{
8701 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,8311 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
8702 (__v16sf)_mm512_moveldup_ps(__A),8312 (__v16sf)_mm512_moveldup_ps(__A),
8703 (__v16sf)__W);8313 (__v16sf)__W);
8704}8314}
87058315
8706static __inline__ __m512 __DEFAULT_FN_ATTRS5128316static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8707_mm512_maskz_moveldup_ps (__mmask16 __U, __m512 __A)8317_mm512_maskz_moveldup_ps(__mmask16 __U, __m512 __A) {
8708{
8709 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,8318 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
8710 (__v16sf)_mm512_moveldup_ps(__A),8319 (__v16sf)_mm512_moveldup_ps(__A),
8711 (__v16sf)_mm512_setzero_ps());8320 (__v16sf)_mm512_setzero_ps());
8712}8321}
87138322
8714static __inline__ __m128 __DEFAULT_FN_ATTRS1288323static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8715_mm_mask_move_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)8324_mm_mask_move_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
8716{
8717 return __builtin_ia32_selectss_128(__U, _mm_move_ss(__A, __B), __W);8325 return __builtin_ia32_selectss_128(__U, _mm_move_ss(__A, __B), __W);
8718}8326}
87198327
8720static __inline__ __m128 __DEFAULT_FN_ATTRS1288328static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8721_mm_maskz_move_ss (__mmask8 __U, __m128 __A, __m128 __B)8329_mm_maskz_move_ss(__mmask8 __U, __m128 __A, __m128 __B) {
8722{
8723 return __builtin_ia32_selectss_128(__U, _mm_move_ss(__A, __B),8330 return __builtin_ia32_selectss_128(__U, _mm_move_ss(__A, __B),
8724 _mm_setzero_ps());8331 _mm_setzero_ps());
8725}8332}
87268333
8727static __inline__ __m128d __DEFAULT_FN_ATTRS1288334static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
8728_mm_mask_move_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)8335_mm_mask_move_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
8729{
8730 return __builtin_ia32_selectsd_128(__U, _mm_move_sd(__A, __B), __W);8336 return __builtin_ia32_selectsd_128(__U, _mm_move_sd(__A, __B), __W);
8731}8337}
87328338
8733static __inline__ __m128d __DEFAULT_FN_ATTRS1288339static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
8734_mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B)8340_mm_maskz_move_sd(__mmask8 __U, __m128d __A, __m128d __B) {
8735{
8736 return __builtin_ia32_selectsd_128(__U, _mm_move_sd(__A, __B),8341 return __builtin_ia32_selectsd_128(__U, _mm_move_sd(__A, __B),
8737 _mm_setzero_pd());8342 _mm_setzero_pd());
8738}8343}
...@@ -8941,70 +8546,57 @@ _mm512_maskz_expand_epi32 (__mmask16 __U, __m512i __A)...@@ -8941,70 +8546,57 @@ _mm512_maskz_expand_epi32 (__mmask16 __U, __m512i __A)
8941 (__v8df)_mm512_setzero_pd(), \8546 (__v8df)_mm512_setzero_pd(), \
8942 (__mmask8)(U), (int)(R)))8547 (__mmask8)(U), (int)(R)))
89438548
8944static __inline__ __m512d __DEFAULT_FN_ATTRS5128549static __inline__ __m512d
8945_mm512_cvtps_pd (__m256 __A)8550 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_cvtps_pd(__m256 __A) {
8946{
8947 return (__m512d) __builtin_convertvector((__v8sf)__A, __v8df);8551 return (__m512d) __builtin_convertvector((__v8sf)__A, __v8df);
8948}8552}
89498553
8950static __inline__ __m512d __DEFAULT_FN_ATTRS5128554static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8951_mm512_mask_cvtps_pd (__m512d __W, __mmask8 __U, __m256 __A)8555_mm512_mask_cvtps_pd(__m512d __W, __mmask8 __U, __m256 __A) {
8952{
8953 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,8556 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
8954 (__v8df)_mm512_cvtps_pd(__A),8557 (__v8df)_mm512_cvtps_pd(__A),
8955 (__v8df)__W);8558 (__v8df)__W);
8956}8559}
89578560
8958static __inline__ __m512d __DEFAULT_FN_ATTRS5128561static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8959_mm512_maskz_cvtps_pd (__mmask8 __U, __m256 __A)8562_mm512_maskz_cvtps_pd(__mmask8 __U, __m256 __A) {
8960{
8961 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,8563 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
8962 (__v8df)_mm512_cvtps_pd(__A),8564 (__v8df)_mm512_cvtps_pd(__A),
8963 (__v8df)_mm512_setzero_pd());8565 (__v8df)_mm512_setzero_pd());
8964}8566}
89658567
8966static __inline__ __m512d __DEFAULT_FN_ATTRS5128568static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8967_mm512_cvtpslo_pd (__m512 __A)8569_mm512_cvtpslo_pd(__m512 __A) {
8968{
8969 return (__m512d) _mm512_cvtps_pd(_mm512_castps512_ps256(__A));8570 return (__m512d) _mm512_cvtps_pd(_mm512_castps512_ps256(__A));
8970}8571}
89718572
8972static __inline__ __m512d __DEFAULT_FN_ATTRS5128573static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8973_mm512_mask_cvtpslo_pd (__m512d __W, __mmask8 __U, __m512 __A)8574_mm512_mask_cvtpslo_pd(__m512d __W, __mmask8 __U, __m512 __A) {
8974{
8975 return (__m512d) _mm512_mask_cvtps_pd(__W, __U, _mm512_castps512_ps256(__A));8575 return (__m512d) _mm512_mask_cvtps_pd(__W, __U, _mm512_castps512_ps256(__A));
8976}8576}
89778577
8978static __inline__ __m512d __DEFAULT_FN_ATTRS5128578static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8979_mm512_mask_mov_pd (__m512d __W, __mmask8 __U, __m512d __A)8579_mm512_mask_mov_pd(__m512d __W, __mmask8 __U, __m512d __A) {
8980{8580 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, (__v8df)__A,
8981 return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U,8581 (__v8df)__W);
8982 (__v8df) __A,
8983 (__v8df) __W);
8984}8582}
89858583
8986static __inline__ __m512d __DEFAULT_FN_ATTRS5128584static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
8987_mm512_maskz_mov_pd (__mmask8 __U, __m512d __A)8585_mm512_maskz_mov_pd(__mmask8 __U, __m512d __A) {
8988{8586 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, (__v8df)__A,
8989 return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U,8587 (__v8df)_mm512_setzero_pd());
8990 (__v8df) __A,
8991 (__v8df) _mm512_setzero_pd ());
8992}8588}
89938589
8994static __inline__ __m512 __DEFAULT_FN_ATTRS5128590static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
8995_mm512_mask_mov_ps (__m512 __W, __mmask16 __U, __m512 __A)8591_mm512_mask_mov_ps(__m512 __W, __mmask16 __U, __m512 __A) {
8996{8592 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, (__v16sf)__A,
8997 return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U,8593 (__v16sf)__W);
8998 (__v16sf) __A,
8999 (__v16sf) __W);
9000}8594}
90018595
9002static __inline__ __m512 __DEFAULT_FN_ATTRS5128596static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
9003_mm512_maskz_mov_ps (__mmask16 __U, __m512 __A)8597_mm512_maskz_mov_ps(__mmask16 __U, __m512 __A) {
9004{8598 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, (__v16sf)__A,
9005 return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U,8599 (__v16sf)_mm512_setzero_ps());
9006 (__v16sf) __A,
9007 (__v16sf) _mm512_setzero_ps ());
9008}8600}
90098601
9010static __inline__ void __DEFAULT_FN_ATTRS5128602static __inline__ void __DEFAULT_FN_ATTRS512
...@@ -9053,18 +8645,16 @@ _mm512_mask_compressstoreu_epi32 (void *__P, __mmask16 __U, __m512i __A)...@@ -9053,18 +8645,16 @@ _mm512_mask_compressstoreu_epi32 (void *__P, __mmask16 __U, __m512i __A)
9053 (__v4sf)_mm_setzero_ps(), \8645 (__v4sf)_mm_setzero_ps(), \
9054 (__mmask8)(U), (int)(R)))8646 (__mmask8)(U), (int)(R)))
90558647
9056static __inline__ __m128 __DEFAULT_FN_ATTRS1288648static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
9057_mm_mask_cvtsd_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128d __B)8649_mm_mask_cvtsd_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128d __B) {
9058{
9059 return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)__A,8650 return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)__A,
9060 (__v2df)__B,8651 (__v2df)__B,
9061 (__v4sf)__W,8652 (__v4sf)__W,
9062 (__mmask8)__U, _MM_FROUND_CUR_DIRECTION);8653 (__mmask8)__U, _MM_FROUND_CUR_DIRECTION);
9063}8654}
90648655
9065static __inline__ __m128 __DEFAULT_FN_ATTRS1288656static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
9066_mm_maskz_cvtsd_ss (__mmask8 __U, __m128 __A, __m128d __B)8657_mm_maskz_cvtsd_ss(__mmask8 __U, __m128 __A, __m128d __B) {
9067{
9068 return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)__A,8658 return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)__A,
9069 (__v2df)__B,8659 (__v2df)__B,
9070 (__v4sf)_mm_setzero_ps(),8660 (__v4sf)_mm_setzero_ps(),
...@@ -9188,34 +8778,32 @@ _mm_cvtu64_ss (__m128 __A, unsigned long long __B)...@@ -9188,34 +8778,32 @@ _mm_cvtu64_ss (__m128 __A, unsigned long long __B)
9188}8778}
9189#endif8779#endif
91908780
9191static __inline__ __m512i __DEFAULT_FN_ATTRS5128781static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
9192_mm512_mask_set1_epi32 (__m512i __O, __mmask16 __M, int __A)8782_mm512_mask_set1_epi32(__m512i __O, __mmask16 __M, int __A) {
9193{
9194 return (__m512i) __builtin_ia32_selectd_512(__M,8783 return (__m512i) __builtin_ia32_selectd_512(__M,
9195 (__v16si) _mm512_set1_epi32(__A),8784 (__v16si) _mm512_set1_epi32(__A),
9196 (__v16si) __O);8785 (__v16si) __O);
9197}8786}
91988787
9199static __inline__ __m512i __DEFAULT_FN_ATTRS5128788static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
9200_mm512_mask_set1_epi64 (__m512i __O, __mmask8 __M, long long __A)8789_mm512_mask_set1_epi64(__m512i __O, __mmask8 __M, long long __A) {
9201{
9202 return (__m512i) __builtin_ia32_selectq_512(__M,8790 return (__m512i) __builtin_ia32_selectq_512(__M,
9203 (__v8di) _mm512_set1_epi64(__A),8791 (__v8di) _mm512_set1_epi64(__A),
9204 (__v8di) __O);8792 (__v8di) __O);
9205}8793}
92068794
9207static __inline __m512i __DEFAULT_FN_ATTRS5128795static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set_epi8(
9208_mm512_set_epi8 (char __e63, char __e62, char __e61, char __e60, char __e59,8796 char __e63, char __e62, char __e61, char __e60, char __e59, char __e58,
9209 char __e58, char __e57, char __e56, char __e55, char __e54, char __e53,8797 char __e57, char __e56, char __e55, char __e54, char __e53, char __e52,
9210 char __e52, char __e51, char __e50, char __e49, char __e48, char __e47,8798 char __e51, char __e50, char __e49, char __e48, char __e47, char __e46,
9211 char __e46, char __e45, char __e44, char __e43, char __e42, char __e41,8799 char __e45, char __e44, char __e43, char __e42, char __e41, char __e40,
9212 char __e40, char __e39, char __e38, char __e37, char __e36, char __e35,8800 char __e39, char __e38, char __e37, char __e36, char __e35, char __e34,
9213 char __e34, char __e33, char __e32, char __e31, char __e30, char __e29,8801 char __e33, char __e32, char __e31, char __e30, char __e29, char __e28,
9214 char __e28, char __e27, char __e26, char __e25, char __e24, char __e23,8802 char __e27, char __e26, char __e25, char __e24, char __e23, char __e22,
9215 char __e22, char __e21, char __e20, char __e19, char __e18, char __e17,8803 char __e21, char __e20, char __e19, char __e18, char __e17, char __e16,
9216 char __e16, char __e15, char __e14, char __e13, char __e12, char __e11,8804 char __e15, char __e14, char __e13, char __e12, char __e11, char __e10,
9217 char __e10, char __e9, char __e8, char __e7, char __e6, char __e5,8805 char __e9, char __e8, char __e7, char __e6, char __e5, char __e4, char __e3,
9218 char __e4, char __e3, char __e2, char __e1, char __e0) {8806 char __e2, char __e1, char __e0) {
92198807
9220 return __extension__ (__m512i)(__v64qi)8808 return __extension__ (__m512i)(__v64qi)
9221 {__e0, __e1, __e2, __e3, __e4, __e5, __e6, __e7,8809 {__e0, __e1, __e2, __e3, __e4, __e5, __e6, __e7,
...@@ -9228,14 +8816,13 @@ _mm512_set_epi8 (char __e63, char __e62, char __e61, char __e60, char __e59,...@@ -9228,14 +8816,13 @@ _mm512_set_epi8 (char __e63, char __e62, char __e61, char __e60, char __e59,
9228 __e56, __e57, __e58, __e59, __e60, __e61, __e62, __e63};8816 __e56, __e57, __e58, __e59, __e60, __e61, __e62, __e63};
9229}8817}
92308818
9231static __inline __m512i __DEFAULT_FN_ATTRS5128819static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set_epi16(
9232_mm512_set_epi16(short __e31, short __e30, short __e29, short __e28,8820 short __e31, short __e30, short __e29, short __e28, short __e27,
9233 short __e27, short __e26, short __e25, short __e24, short __e23,8821 short __e26, short __e25, short __e24, short __e23, short __e22,
9234 short __e22, short __e21, short __e20, short __e19, short __e18,8822 short __e21, short __e20, short __e19, short __e18, short __e17,
9235 short __e17, short __e16, short __e15, short __e14, short __e13,8823 short __e16, short __e15, short __e14, short __e13, short __e12,
9236 short __e12, short __e11, short __e10, short __e9, short __e8,8824 short __e11, short __e10, short __e9, short __e8, short __e7, short __e6,
9237 short __e7, short __e6, short __e5, short __e4, short __e3,8825 short __e5, short __e4, short __e3, short __e2, short __e1, short __e0) {
9238 short __e2, short __e1, short __e0) {
9239 return __extension__ (__m512i)(__v32hi)8826 return __extension__ (__m512i)(__v32hi)
9240 {__e0, __e1, __e2, __e3, __e4, __e5, __e6, __e7,8827 {__e0, __e1, __e2, __e3, __e4, __e5, __e6, __e7,
9241 __e8, __e9, __e10, __e11, __e12, __e13, __e14, __e15,8828 __e8, __e9, __e10, __e11, __e12, __e13, __e14, __e15,
...@@ -9243,81 +8830,81 @@ _mm512_set_epi16(short __e31, short __e30, short __e29, short __e28,...@@ -9243,81 +8830,81 @@ _mm512_set_epi16(short __e31, short __e30, short __e29, short __e28,
9243 __e24, __e25, __e26, __e27, __e28, __e29, __e30, __e31 };8830 __e24, __e25, __e26, __e27, __e28, __e29, __e30, __e31 };
9244}8831}
92458832
9246static __inline __m512i __DEFAULT_FN_ATTRS5128833static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set_epi32(
9247_mm512_set_epi32 (int __A, int __B, int __C, int __D,8834 int __A, int __B, int __C, int __D, int __E, int __F, int __G, int __H,
9248 int __E, int __F, int __G, int __H,8835 int __I, int __J, int __K, int __L, int __M, int __N, int __O, int __P) {
9249 int __I, int __J, int __K, int __L,
9250 int __M, int __N, int __O, int __P)
9251{
9252 return __extension__ (__m512i)(__v16si)8836 return __extension__ (__m512i)(__v16si)
9253 { __P, __O, __N, __M, __L, __K, __J, __I,8837 { __P, __O, __N, __M, __L, __K, __J, __I,
9254 __H, __G, __F, __E, __D, __C, __B, __A };8838 __H, __G, __F, __E, __D, __C, __B, __A };
9255}8839}
92568840
9257#define _mm512_setr_epi32(e0,e1,e2,e3,e4,e5,e6,e7, \8841static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_setr_epi32(
9258 e8,e9,e10,e11,e12,e13,e14,e15) \8842 int e0, int e1, int e2, int e3, int e4, int e5, int e6, int e7, int e8,
9259 _mm512_set_epi32((e15),(e14),(e13),(e12),(e11),(e10),(e9),(e8),(e7),(e6), \8843 int e9, int e10, int e11, int e12, int e13, int e14, int e15) {
9260 (e5),(e4),(e3),(e2),(e1),(e0))8844 return _mm512_set_epi32(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4,
8845 e3, e2, e1, e0);
8846}
92618847
9262static __inline__ __m512i __DEFAULT_FN_ATTRS5128848static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
9263_mm512_set_epi64 (long long __A, long long __B, long long __C,8849_mm512_set_epi64(long long __A, long long __B, long long __C, long long __D,
9264 long long __D, long long __E, long long __F,8850 long long __E, long long __F, long long __G, long long __H) {
9265 long long __G, long long __H)
9266{
9267 return __extension__ (__m512i) (__v8di)8851 return __extension__ (__m512i) (__v8di)
9268 { __H, __G, __F, __E, __D, __C, __B, __A };8852 { __H, __G, __F, __E, __D, __C, __B, __A };
9269}8853}
92708854
9271#define _mm512_setr_epi64(e0,e1,e2,e3,e4,e5,e6,e7) \8855static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
9272 _mm512_set_epi64((e7),(e6),(e5),(e4),(e3),(e2),(e1),(e0))8856_mm512_setr_epi64(long long e0, long long e1, long long e2, long long e3,
8857 long long e4, long long e5, long long e6, long long e7) {
8858 return _mm512_set_epi64(e7, e6, e5, e4, e3, e2, e1, e0);
8859}
92738860
9274static __inline__ __m512d __DEFAULT_FN_ATTRS5128861static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
9275_mm512_set_pd (double __A, double __B, double __C, double __D,8862_mm512_set_pd(double __A, double __B, double __C, double __D, double __E,
9276 double __E, double __F, double __G, double __H)8863 double __F, double __G, double __H) {
9277{
9278 return __extension__ (__m512d)8864 return __extension__ (__m512d)
9279 { __H, __G, __F, __E, __D, __C, __B, __A };8865 { __H, __G, __F, __E, __D, __C, __B, __A };
9280}8866}
92818867
9282#define _mm512_setr_pd(e0,e1,e2,e3,e4,e5,e6,e7) \8868static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
9283 _mm512_set_pd((e7),(e6),(e5),(e4),(e3),(e2),(e1),(e0))8869_mm512_setr_pd(double e0, double e1, double e2, double e3, double e4, double e5,
8870 double e6, double e7) {
8871 return _mm512_set_pd(e7, e6, e5, e4, e3, e2, e1, e0);
8872}
92848873
9285static __inline__ __m512 __DEFAULT_FN_ATTRS5128874static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
9286_mm512_set_ps (float __A, float __B, float __C, float __D,8875_mm512_set_ps(float __A, float __B, float __C, float __D, float __E, float __F,
9287 float __E, float __F, float __G, float __H,8876 float __G, float __H, float __I, float __J, float __K, float __L,
9288 float __I, float __J, float __K, float __L,8877 float __M, float __N, float __O, float __P) {
9289 float __M, float __N, float __O, float __P)
9290{
9291 return __extension__ (__m512)8878 return __extension__ (__m512)
9292 { __P, __O, __N, __M, __L, __K, __J, __I,8879 { __P, __O, __N, __M, __L, __K, __J, __I,
9293 __H, __G, __F, __E, __D, __C, __B, __A };8880 __H, __G, __F, __E, __D, __C, __B, __A };
9294}8881}
92958882
9296#define _mm512_setr_ps(e0,e1,e2,e3,e4,e5,e6,e7,e8,e9,e10,e11,e12,e13,e14,e15) \8883static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
9297 _mm512_set_ps((e15),(e14),(e13),(e12),(e11),(e10),(e9),(e8),(e7),(e6),(e5), \8884_mm512_setr_ps(float e0, float e1, float e2, float e3, float e4, float e5,
9298 (e4),(e3),(e2),(e1),(e0))8885 float e6, float e7, float e8, float e9, float e10, float e11,
8886 float e12, float e13, float e14, float e15) {
8887 return _mm512_set_ps(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3,
8888 e2, e1, e0);
8889}
92998890
9300static __inline__ __m512 __DEFAULT_FN_ATTRS5128891static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
9301_mm512_abs_ps(__m512 __A)8892_mm512_abs_ps(__m512 __A) {
9302{
9303 return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFFFFFF),(__m512i)__A) ;8893 return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFFFFFF),(__m512i)__A) ;
9304}8894}
93058895
9306static __inline__ __m512 __DEFAULT_FN_ATTRS5128896static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
9307_mm512_mask_abs_ps(__m512 __W, __mmask16 __K, __m512 __A)8897_mm512_mask_abs_ps(__m512 __W, __mmask16 __K, __m512 __A) {
9308{
9309 return (__m512)_mm512_mask_and_epi32((__m512i)__W, __K, _mm512_set1_epi32(0x7FFFFFFF),(__m512i)__A) ;8898 return (__m512)_mm512_mask_and_epi32((__m512i)__W, __K, _mm512_set1_epi32(0x7FFFFFFF),(__m512i)__A) ;
9310}8899}
93118900
9312static __inline__ __m512d __DEFAULT_FN_ATTRS5128901static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
9313_mm512_abs_pd(__m512d __A)8902_mm512_abs_pd(__m512d __A) {
9314{
9315 return (__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A) ;8903 return (__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A) ;
9316}8904}
93178905
9318static __inline__ __m512d __DEFAULT_FN_ATTRS5128906static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
9319_mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A)8907_mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A) {
9320{
9321 return (__m512d)_mm512_mask_and_epi64((__v8di)__W, __K, _mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A);8908 return (__m512d)_mm512_mask_and_epi64((__v8di)__W, __K, _mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A);
9322}8909}
93238910
...@@ -9337,19 +8924,23 @@ _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A)...@@ -9337,19 +8924,23 @@ _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A)
9337 * This takes log2(n) steps where n is the number of elements in the vector.8924 * This takes log2(n) steps where n is the number of elements in the vector.
9338 */8925 */
93398926
9340static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_add_epi64(__m512i __W) {8927static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR
8928_mm512_reduce_add_epi64(__m512i __W) {
9341 return __builtin_reduce_add((__v8di)__W);8929 return __builtin_reduce_add((__v8di)__W);
9342}8930}
93438931
9344static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_mul_epi64(__m512i __W) {8932static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR
8933_mm512_reduce_mul_epi64(__m512i __W) {
9345 return __builtin_reduce_mul((__v8di)__W);8934 return __builtin_reduce_mul((__v8di)__W);
9346}8935}
93478936
9348static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_and_epi64(__m512i __W) {8937static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR
8938_mm512_reduce_and_epi64(__m512i __W) {
9349 return __builtin_reduce_and((__v8di)__W);8939 return __builtin_reduce_and((__v8di)__W);
9350}8940}
93518941
9352static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_or_epi64(__m512i __W) {8942static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR
8943_mm512_reduce_or_epi64(__m512i __W) {
9353 return __builtin_reduce_or((__v8di)__W);8944 return __builtin_reduce_or((__v8di)__W);
9354}8945}
93558946
...@@ -9400,22 +8991,22 @@ _mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W) {...@@ -9400,22 +8991,22 @@ _mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W) {
9400 return __builtin_ia32_reduce_fmul_pd512(1.0, __W);8991 return __builtin_ia32_reduce_fmul_pd512(1.0, __W);
9401}8992}
94028993
9403static __inline__ int __DEFAULT_FN_ATTRS5128994static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR
9404_mm512_reduce_add_epi32(__m512i __W) {8995_mm512_reduce_add_epi32(__m512i __W) {
9405 return __builtin_reduce_add((__v16si)__W);8996 return __builtin_reduce_add((__v16si)__W);
9406}8997}
94078998
9408static __inline__ int __DEFAULT_FN_ATTRS5128999static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR
9409_mm512_reduce_mul_epi32(__m512i __W) {9000_mm512_reduce_mul_epi32(__m512i __W) {
9410 return __builtin_reduce_mul((__v16si)__W);9001 return __builtin_reduce_mul((__v16si)__W);
9411}9002}
94129003
9413static __inline__ int __DEFAULT_FN_ATTRS5129004static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR
9414_mm512_reduce_and_epi32(__m512i __W) {9005_mm512_reduce_and_epi32(__m512i __W) {
9415 return __builtin_reduce_and((__v16si)__W);9006 return __builtin_reduce_and((__v16si)__W);
9416}9007}
94179008
9418static __inline__ int __DEFAULT_FN_ATTRS5129009static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR
9419_mm512_reduce_or_epi32(__m512i __W) {9010_mm512_reduce_or_epi32(__m512i __W) {
9420 return __builtin_reduce_or((__v16si)__W);9011 return __builtin_reduce_or((__v16si)__W);
9421}9012}
...@@ -9466,22 +9057,22 @@ _mm512_mask_reduce_mul_ps(__mmask16 __M, __m512 __W) {...@@ -9466,22 +9057,22 @@ _mm512_mask_reduce_mul_ps(__mmask16 __M, __m512 __W) {
9466 return __builtin_ia32_reduce_fmul_ps512(1.0f, __W);9057 return __builtin_ia32_reduce_fmul_ps512(1.0f, __W);
9467}9058}
94689059
9469static __inline__ long long __DEFAULT_FN_ATTRS5129060static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR
9470_mm512_reduce_max_epi64(__m512i __V) {9061_mm512_reduce_max_epi64(__m512i __V) {
9471 return __builtin_reduce_max((__v8di)__V);9062 return __builtin_reduce_max((__v8di)__V);
9472}9063}
94739064
9474static __inline__ unsigned long long __DEFAULT_FN_ATTRS5129065static __inline__ unsigned long long __DEFAULT_FN_ATTRS512_CONSTEXPR
9475_mm512_reduce_max_epu64(__m512i __V) {9066_mm512_reduce_max_epu64(__m512i __V) {
9476 return __builtin_reduce_max((__v8du)__V);9067 return __builtin_reduce_max((__v8du)__V);
9477}9068}
94789069
9479static __inline__ long long __DEFAULT_FN_ATTRS5129070static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR
9480_mm512_reduce_min_epi64(__m512i __V) {9071_mm512_reduce_min_epi64(__m512i __V) {
9481 return __builtin_reduce_min((__v8di)__V);9072 return __builtin_reduce_min((__v8di)__V);
9482}9073}
94839074
9484static __inline__ unsigned long long __DEFAULT_FN_ATTRS5129075static __inline__ unsigned long long __DEFAULT_FN_ATTRS512_CONSTEXPR
9485_mm512_reduce_min_epu64(__m512i __V) {9076_mm512_reduce_min_epu64(__m512i __V) {
9486 return __builtin_reduce_min((__v8du)__V);9077 return __builtin_reduce_min((__v8du)__V);
9487}9078}
...@@ -9509,22 +9100,22 @@ _mm512_mask_reduce_min_epu64(__mmask8 __M, __m512i __V) {...@@ -9509,22 +9100,22 @@ _mm512_mask_reduce_min_epu64(__mmask8 __M, __m512i __V) {
9509 __V = _mm512_mask_mov_epi64(_mm512_set1_epi64(-1LL), __M, __V);9100 __V = _mm512_mask_mov_epi64(_mm512_set1_epi64(-1LL), __M, __V);
9510 return __builtin_reduce_min((__v8du)__V);9101 return __builtin_reduce_min((__v8du)__V);
9511}9102}
9512static __inline__ int __DEFAULT_FN_ATTRS5129103static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR
9513_mm512_reduce_max_epi32(__m512i __V) {9104_mm512_reduce_max_epi32(__m512i __V) {
9514 return __builtin_reduce_max((__v16si)__V);9105 return __builtin_reduce_max((__v16si)__V);
9515}9106}
95169107
9517static __inline__ unsigned int __DEFAULT_FN_ATTRS5129108static __inline__ unsigned int __DEFAULT_FN_ATTRS512_CONSTEXPR
9518_mm512_reduce_max_epu32(__m512i __V) {9109_mm512_reduce_max_epu32(__m512i __V) {
9519 return __builtin_reduce_max((__v16su)__V);9110 return __builtin_reduce_max((__v16su)__V);
9520}9111}
95219112
9522static __inline__ int __DEFAULT_FN_ATTRS5129113static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR
9523_mm512_reduce_min_epi32(__m512i __V) {9114_mm512_reduce_min_epi32(__m512i __V) {
9524 return __builtin_reduce_min((__v16si)__V);9115 return __builtin_reduce_min((__v16si)__V);
9525}9116}
95269117
9527static __inline__ unsigned int __DEFAULT_FN_ATTRS5129118static __inline__ unsigned int __DEFAULT_FN_ATTRS512_CONSTEXPR
9528_mm512_reduce_min_epu32(__m512i __V) {9119_mm512_reduce_min_epu32(__m512i __V) {
9529 return __builtin_reduce_min((__v16su)__V);9120 return __builtin_reduce_min((__v16su)__V);
9530}9121}
lib/include/avx512fp16intrin.h+112-110
...@@ -22,26 +22,36 @@ typedef _Float16 __m512h_u __attribute__((__vector_size__(64), __aligned__(1)));...@@ -22,26 +22,36 @@ typedef _Float16 __m512h_u __attribute__((__vector_size__(64), __aligned__(1)));
2222
23/* Define the default attributes for the functions in this file. */23/* Define the default attributes for the functions in this file. */
24#define __DEFAULT_FN_ATTRS512 \24#define __DEFAULT_FN_ATTRS512 \
25 __attribute__((__always_inline__, __nodebug__, \25 __attribute__((__always_inline__, __nodebug__, __target__("avx512fp16"), \
26 __target__("avx512fp16,evex512"), __min_vector_width__(512)))26 __min_vector_width__(512)))
27#define __DEFAULT_FN_ATTRS256 \27#define __DEFAULT_FN_ATTRS256 \
28 __attribute__((__always_inline__, __nodebug__, \28 __attribute__((__always_inline__, __nodebug__, __target__("avx512fp16"), \
29 __target__("avx512fp16,no-evex512"), \
30 __min_vector_width__(256)))29 __min_vector_width__(256)))
31#define __DEFAULT_FN_ATTRS128 \30#define __DEFAULT_FN_ATTRS128 \
32 __attribute__((__always_inline__, __nodebug__, \31 __attribute__((__always_inline__, __nodebug__, __target__("avx512fp16"), \
33 __target__("avx512fp16,no-evex512"), \
34 __min_vector_width__(128)))32 __min_vector_width__(128)))
3533
36static __inline__ _Float16 __DEFAULT_FN_ATTRS512 _mm512_cvtsh_h(__m512h __a) {34#if defined(__cplusplus) && (__cplusplus >= 201103L)
35#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr
36#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
37#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
38#else
39#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512
40#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
41#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
42#endif
43
44static __inline__ _Float16 __DEFAULT_FN_ATTRS512_CONSTEXPR
45_mm512_cvtsh_h(__m512h __a) {
37 return __a[0];46 return __a[0];
38}47}
3948
40static __inline __m128h __DEFAULT_FN_ATTRS128 _mm_setzero_ph(void) {49static __inline __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_setzero_ph(void) {
41 return (__m128h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};50 return (__m128h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};
42}51}
4352
44static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_setzero_ph(void) {53static __inline __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
54_mm256_setzero_ph(void) {
45 return (__m256h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0,55 return (__m256h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0,
46 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};56 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};
47}57}
...@@ -50,7 +60,8 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_undefined_ph(void) {...@@ -50,7 +60,8 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_undefined_ph(void) {
50 return (__m256h)__builtin_ia32_undef256();60 return (__m256h)__builtin_ia32_undef256();
51}61}
5262
53static __inline __m512h __DEFAULT_FN_ATTRS512 _mm512_setzero_ph(void) {63static __inline __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
64_mm512_setzero_ph(void) {
54 return (__m512h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0,65 return (__m512h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0,
55 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0,66 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0,
56 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};67 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};
...@@ -64,14 +75,15 @@ static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_undefined_ph(void) {...@@ -64,14 +75,15 @@ static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_undefined_ph(void) {
64 return (__m512h)__builtin_ia32_undef512();75 return (__m512h)__builtin_ia32_undef512();
65}76}
6677
67static __inline __m512h __DEFAULT_FN_ATTRS512 _mm512_set1_ph(_Float16 __h) {78static __inline __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
79_mm512_set1_ph(_Float16 __h) {
68 return (__m512h)(__v32hf){__h, __h, __h, __h, __h, __h, __h, __h,80 return (__m512h)(__v32hf){__h, __h, __h, __h, __h, __h, __h, __h,
69 __h, __h, __h, __h, __h, __h, __h, __h,81 __h, __h, __h, __h, __h, __h, __h, __h,
70 __h, __h, __h, __h, __h, __h, __h, __h,82 __h, __h, __h, __h, __h, __h, __h, __h,
71 __h, __h, __h, __h, __h, __h, __h, __h};83 __h, __h, __h, __h, __h, __h, __h, __h};
72}84}
7385
74static __inline __m512h __DEFAULT_FN_ATTRS51286static __inline __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
75_mm512_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,87_mm512_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,
76 _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8,88 _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8,
77 _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12,89 _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12,
...@@ -87,106 +99,111 @@ _mm512_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,...@@ -87,106 +99,111 @@ _mm512_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,
87 __h4, __h3, __h2, __h1};99 __h4, __h3, __h2, __h1};
88}100}
89101
90#define _mm512_setr_ph(h1, h2, h3, h4, h5, h6, h7, h8, h9, h10, h11, h12, h13, \102static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_setr_ph(
91 h14, h15, h16, h17, h18, h19, h20, h21, h22, h23, h24, \103 _Float16 e0, _Float16 e1, _Float16 e2, _Float16 e3, _Float16 e4,
92 h25, h26, h27, h28, h29, h30, h31, h32) \104 _Float16 e5, _Float16 e6, _Float16 e7, _Float16 e8, _Float16 e9,
93 _mm512_set_ph((h32), (h31), (h30), (h29), (h28), (h27), (h26), (h25), (h24), \105 _Float16 e10, _Float16 e11, _Float16 e12, _Float16 e13, _Float16 e14,
94 (h23), (h22), (h21), (h20), (h19), (h18), (h17), (h16), (h15), \106 _Float16 e15, _Float16 e16, _Float16 e17, _Float16 e18, _Float16 e19,
95 (h14), (h13), (h12), (h11), (h10), (h9), (h8), (h7), (h6), \107 _Float16 e20, _Float16 e21, _Float16 e22, _Float16 e23, _Float16 e24,
96 (h5), (h4), (h3), (h2), (h1))108 _Float16 e25, _Float16 e26, _Float16 e27, _Float16 e28, _Float16 e29,
109 _Float16 e30, _Float16 e31) {
110 return _mm512_set_ph(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21,
111 e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10,
112 e9, e8, e7, e6, e5, e4, e3, e2, e1, e0);
113}
97114
98static __inline __m512h __DEFAULT_FN_ATTRS512115static __inline __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
99_mm512_set1_pch(_Float16 _Complex __h) {116_mm512_set1_pch(_Float16 _Complex __h) {
100 return (__m512h)_mm512_set1_ps(__builtin_bit_cast(float, __h));117 return (__m512h)_mm512_set1_ps(__builtin_bit_cast(float, __h));
101}118}
102119
103static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_castph_ps(__m128h __a) {120static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castph_ps(__m128h __a) {
104 return (__m128)__a;121 return (__m128)__a;
105}122}
106123
107static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_castph_ps(__m256h __a) {124static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_castph_ps(__m256h __a) {
108 return (__m256)__a;125 return (__m256)__a;
109}126}
110127
111static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_castph_ps(__m512h __a) {128static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_castph_ps(__m512h __a) {
112 return (__m512)__a;129 return (__m512)__a;
113}130}
114131
115static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_castph_pd(__m128h __a) {132static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castph_pd(__m128h __a) {
116 return (__m128d)__a;133 return (__m128d)__a;
117}134}
118135
119static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_castph_pd(__m256h __a) {136static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_castph_pd(__m256h __a) {
120 return (__m256d)__a;137 return (__m256d)__a;
121}138}
122139
123static __inline__ __m512d __DEFAULT_FN_ATTRS512 _mm512_castph_pd(__m512h __a) {140static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_castph_pd(__m512h __a) {
124 return (__m512d)__a;141 return (__m512d)__a;
125}142}
126143
127static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_castph_si128(__m128h __a) {144static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castph_si128(__m128h __a) {
128 return (__m128i)__a;145 return (__m128i)__a;
129}146}
130147
131static __inline__ __m256i __DEFAULT_FN_ATTRS256148static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
132_mm256_castph_si256(__m256h __a) {149_mm256_castph_si256(__m256h __a) {
133 return (__m256i)__a;150 return (__m256i)__a;
134}151}
135152
136static __inline__ __m512i __DEFAULT_FN_ATTRS512153static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
137_mm512_castph_si512(__m512h __a) {154_mm512_castph_si512(__m512h __a) {
138 return (__m512i)__a;155 return (__m512i)__a;
139}156}
140157
141static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_castps_ph(__m128 __a) {158static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castps_ph(__m128 __a) {
142 return (__m128h)__a;159 return (__m128h)__a;
143}160}
144161
145static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_castps_ph(__m256 __a) {162static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_castps_ph(__m256 __a) {
146 return (__m256h)__a;163 return (__m256h)__a;
147}164}
148165
149static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_castps_ph(__m512 __a) {166static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_castps_ph(__m512 __a) {
150 return (__m512h)__a;167 return (__m512h)__a;
151}168}
152169
153static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_castpd_ph(__m128d __a) {170static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castpd_ph(__m128d __a) {
154 return (__m128h)__a;171 return (__m128h)__a;
155}172}
156173
157static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_castpd_ph(__m256d __a) {174static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_castpd_ph(__m256d __a) {
158 return (__m256h)__a;175 return (__m256h)__a;
159}176}
160177
161static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_castpd_ph(__m512d __a) {178static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_castpd_ph(__m512d __a) {
162 return (__m512h)__a;179 return (__m512h)__a;
163}180}
164181
165static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_castsi128_ph(__m128i __a) {182static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castsi128_ph(__m128i __a) {
166 return (__m128h)__a;183 return (__m128h)__a;
167}184}
168185
169static __inline__ __m256h __DEFAULT_FN_ATTRS256186static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
170_mm256_castsi256_ph(__m256i __a) {187_mm256_castsi256_ph(__m256i __a) {
171 return (__m256h)__a;188 return (__m256h)__a;
172}189}
173190
174static __inline__ __m512h __DEFAULT_FN_ATTRS512191static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
175_mm512_castsi512_ph(__m512i __a) {192_mm512_castsi512_ph(__m512i __a) {
176 return (__m512h)__a;193 return (__m512h)__a;
177}194}
178195
179static __inline__ __m128h __DEFAULT_FN_ATTRS256196static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR
180_mm256_castph256_ph128(__m256h __a) {197_mm256_castph256_ph128(__m256h __a) {
181 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7);198 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7);
182}199}
183200
184static __inline__ __m128h __DEFAULT_FN_ATTRS512201static __inline__ __m128h __DEFAULT_FN_ATTRS512_CONSTEXPR
185_mm512_castph512_ph128(__m512h __a) {202_mm512_castph512_ph128(__m512h __a) {
186 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7);203 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7);
187}204}
188205
189static __inline__ __m256h __DEFAULT_FN_ATTRS512206static __inline__ __m256h __DEFAULT_FN_ATTRS512_CONSTEXPR
190_mm512_castph512_ph256(__m512h __a) {207_mm512_castph512_ph256(__m512h __a) {
191 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,208 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
192 12, 13, 14, 15);209 12, 13, 14, 15);
...@@ -229,7 +246,7 @@ _mm512_castph256_ph512(__m256h __a) {...@@ -229,7 +246,7 @@ _mm512_castph256_ph512(__m256h __a) {
229/// A 128-bit vector of [8 x half].246/// A 128-bit vector of [8 x half].
230/// \returns A 512-bit floating-point vector of [16 x half]. The lower 128 bits247/// \returns A 512-bit floating-point vector of [16 x half]. The lower 128 bits
231/// contain the value of the parameter. The upper 384 bits are set to zero.248/// contain the value of the parameter. The upper 384 bits are set to zero.
232static __inline__ __m256h __DEFAULT_FN_ATTRS256249static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
233_mm256_zextph128_ph256(__m128h __a) {250_mm256_zextph128_ph256(__m128h __a) {
234 return __builtin_shufflevector(__a, (__v8hf)_mm_setzero_ph(), 0, 1, 2, 3, 4,251 return __builtin_shufflevector(__a, (__v8hf)_mm_setzero_ph(), 0, 1, 2, 3, 4,
235 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);252 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
...@@ -248,7 +265,7 @@ _mm256_zextph128_ph256(__m128h __a) {...@@ -248,7 +265,7 @@ _mm256_zextph128_ph256(__m128h __a) {
248/// A 128-bit vector of [8 x half].265/// A 128-bit vector of [8 x half].
249/// \returns A 512-bit floating-point vector of [32 x half]. The lower 128 bits266/// \returns A 512-bit floating-point vector of [32 x half]. The lower 128 bits
250/// contain the value of the parameter. The upper 384 bits are set to zero.267/// contain the value of the parameter. The upper 384 bits are set to zero.
251static __inline__ __m512h __DEFAULT_FN_ATTRS512268static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
252_mm512_zextph128_ph512(__m128h __a) {269_mm512_zextph128_ph512(__m128h __a) {
253 return __builtin_shufflevector(270 return __builtin_shufflevector(
254 __a, (__v8hf)_mm_setzero_ph(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,271 __a, (__v8hf)_mm_setzero_ph(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
...@@ -268,7 +285,7 @@ _mm512_zextph128_ph512(__m128h __a) {...@@ -268,7 +285,7 @@ _mm512_zextph128_ph512(__m128h __a) {
268/// A 256-bit vector of [16 x half].285/// A 256-bit vector of [16 x half].
269/// \returns A 512-bit floating-point vector of [32 x half]. The lower 256 bits286/// \returns A 512-bit floating-point vector of [32 x half]. The lower 256 bits
270/// contain the value of the parameter. The upper 256 bits are set to zero.287/// contain the value of the parameter. The upper 256 bits are set to zero.
271static __inline__ __m512h __DEFAULT_FN_ATTRS512288static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
272_mm512_zextph256_ph512(__m256h __a) {289_mm512_zextph256_ph512(__m256h __a) {
273 return __builtin_shufflevector(__a, (__v16hf)_mm256_setzero_ph(), 0, 1, 2, 3,290 return __builtin_shufflevector(__a, (__v16hf)_mm256_setzero_ph(), 0, 1, 2, 3,
274 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,291 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
...@@ -482,19 +499,19 @@ _mm512_maskz_div_ph(__mmask32 __U, __m512h __A, __m512h __B) {...@@ -482,19 +499,19 @@ _mm512_maskz_div_ph(__mmask32 __U, __m512h __A, __m512h __B) {
482 (__mmask32)(U), (__v32hf)_mm512_div_round_ph((A), (B), (R)), \499 (__mmask32)(U), (__v32hf)_mm512_div_round_ph((A), (B), (R)), \
483 (__v32hf)_mm512_setzero_ph()))500 (__v32hf)_mm512_setzero_ph()))
484501
485static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_min_ph(__m512h __A,502static __inline__ __m512h
486 __m512h __B) {503 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_ph(__m512h __A, __m512h __B) {
487 return (__m512h)__builtin_ia32_minph512((__v32hf)__A, (__v32hf)__B,504 return (__m512h)__builtin_ia32_minph512((__v32hf)__A, (__v32hf)__B,
488 _MM_FROUND_CUR_DIRECTION);505 _MM_FROUND_CUR_DIRECTION);
489}506}
490507
491static __inline__ __m512h __DEFAULT_FN_ATTRS512508static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
492_mm512_mask_min_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {509_mm512_mask_min_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
493 return (__m512h)__builtin_ia32_selectph_512(510 return (__m512h)__builtin_ia32_selectph_512(
494 (__mmask32)__U, (__v32hf)_mm512_min_ph(__A, __B), (__v32hf)__W);511 (__mmask32)__U, (__v32hf)_mm512_min_ph(__A, __B), (__v32hf)__W);
495}512}
496513
497static __inline__ __m512h __DEFAULT_FN_ATTRS512514static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
498_mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) {515_mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) {
499 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,516 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,
500 (__v32hf)_mm512_min_ph(__A, __B),517 (__v32hf)_mm512_min_ph(__A, __B),
...@@ -515,19 +532,19 @@ _mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) {...@@ -515,19 +532,19 @@ _mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) {
515 (__mmask32)(U), (__v32hf)_mm512_min_round_ph((A), (B), (R)), \532 (__mmask32)(U), (__v32hf)_mm512_min_round_ph((A), (B), (R)), \
516 (__v32hf)_mm512_setzero_ph()))533 (__v32hf)_mm512_setzero_ph()))
517534
518static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_max_ph(__m512h __A,535static __inline__ __m512h
519 __m512h __B) {536 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_ph(__m512h __A, __m512h __B) {
520 return (__m512h)__builtin_ia32_maxph512((__v32hf)__A, (__v32hf)__B,537 return (__m512h)__builtin_ia32_maxph512((__v32hf)__A, (__v32hf)__B,
521 _MM_FROUND_CUR_DIRECTION);538 _MM_FROUND_CUR_DIRECTION);
522}539}
523540
524static __inline__ __m512h __DEFAULT_FN_ATTRS512541static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
525_mm512_mask_max_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {542_mm512_mask_max_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) {
526 return (__m512h)__builtin_ia32_selectph_512(543 return (__m512h)__builtin_ia32_selectph_512(
527 (__mmask32)__U, (__v32hf)_mm512_max_ph(__A, __B), (__v32hf)__W);544 (__mmask32)__U, (__v32hf)_mm512_max_ph(__A, __B), (__v32hf)__W);
528}545}
529546
530static __inline__ __m512h __DEFAULT_FN_ATTRS512547static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
531_mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) {548_mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) {
532 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,549 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U,
533 (__v32hf)_mm512_max_ph(__A, __B),550 (__v32hf)_mm512_max_ph(__A, __B),
...@@ -548,7 +565,8 @@ _mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) {...@@ -548,7 +565,8 @@ _mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) {
548 (__mmask32)(U), (__v32hf)_mm512_max_round_ph((A), (B), (R)), \565 (__mmask32)(U), (__v32hf)_mm512_max_round_ph((A), (B), (R)), \
549 (__v32hf)_mm512_setzero_ph()))566 (__v32hf)_mm512_setzero_ph()))
550567
551static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_abs_ph(__m512h __A) {568static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
569_mm512_abs_ph(__m512h __A) {
552 return (__m512h)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF7FFF), (__m512i)__A);570 return (__m512h)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF7FFF), (__m512i)__A);
553}571}
554572
...@@ -570,23 +588,20 @@ _mm512_maskz_conj_pch(__mmask16 __U, __m512h __A) {...@@ -570,23 +588,20 @@ _mm512_maskz_conj_pch(__mmask16 __U, __m512h __A) {
570 (__v16sf)_mm512_setzero_ps());588 (__v16sf)_mm512_setzero_ps());
571}589}
572590
573static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_add_sh(__m128h __A,591static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
574 __m128h __B) {592_mm_add_sh(__m128h __A, __m128h __B) {
575 __A[0] += __B[0];593 __A[0] += __B[0];
576 return __A;594 return __A;
577}595}
578596
579static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_add_sh(__m128h __W,597static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
580 __mmask8 __U,598_mm_mask_add_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {
581 __m128h __A,
582 __m128h __B) {
583 __A = _mm_add_sh(__A, __B);599 __A = _mm_add_sh(__A, __B);
584 return __builtin_ia32_selectsh_128(__U, __A, __W);600 return __builtin_ia32_selectsh_128(__U, __A, __W);
585}601}
586602
587static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_add_sh(__mmask8 __U,603static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
588 __m128h __A,604_mm_maskz_add_sh(__mmask8 __U, __m128h __A, __m128h __B) {
589 __m128h __B) {
590 __A = _mm_add_sh(__A, __B);605 __A = _mm_add_sh(__A, __B);
591 return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph());606 return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph());
592}607}
...@@ -606,23 +621,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_add_sh(__mmask8 __U,...@@ -606,23 +621,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_add_sh(__mmask8 __U,
606 (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \621 (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \
607 (__mmask8)(U), (int)(R)))622 (__mmask8)(U), (int)(R)))
608623
609static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_sub_sh(__m128h __A,624static __inline__ __m128h
610 __m128h __B) {625 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_sub_sh(__m128h __A, __m128h __B) {
611 __A[0] -= __B[0];626 __A[0] -= __B[0];
612 return __A;627 return __A;
613}628}
614629
615static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_sub_sh(__m128h __W,630static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
616 __mmask8 __U,631_mm_mask_sub_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {
617 __m128h __A,
618 __m128h __B) {
619 __A = _mm_sub_sh(__A, __B);632 __A = _mm_sub_sh(__A, __B);
620 return __builtin_ia32_selectsh_128(__U, __A, __W);633 return __builtin_ia32_selectsh_128(__U, __A, __W);
621}634}
622635
623static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sub_sh(__mmask8 __U,636static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
624 __m128h __A,637_mm_maskz_sub_sh(__mmask8 __U, __m128h __A, __m128h __B) {
625 __m128h __B) {
626 __A = _mm_sub_sh(__A, __B);638 __A = _mm_sub_sh(__A, __B);
627 return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph());639 return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph());
628}640}
...@@ -642,23 +654,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sub_sh(__mmask8 __U,...@@ -642,23 +654,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sub_sh(__mmask8 __U,
642 (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \654 (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \
643 (__mmask8)(U), (int)(R)))655 (__mmask8)(U), (int)(R)))
644656
645static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mul_sh(__m128h __A,657static __inline__ __m128h
646 __m128h __B) {658 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mul_sh(__m128h __A, __m128h __B) {
647 __A[0] *= __B[0];659 __A[0] *= __B[0];
648 return __A;660 return __A;
649}661}
650662
651static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_mul_sh(__m128h __W,663static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
652 __mmask8 __U,664_mm_mask_mul_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {
653 __m128h __A,
654 __m128h __B) {
655 __A = _mm_mul_sh(__A, __B);665 __A = _mm_mul_sh(__A, __B);
656 return __builtin_ia32_selectsh_128(__U, __A, __W);666 return __builtin_ia32_selectsh_128(__U, __A, __W);
657}667}
658668
659static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_mul_sh(__mmask8 __U,669static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
660 __m128h __A,670_mm_maskz_mul_sh(__mmask8 __U, __m128h __A, __m128h __B) {
661 __m128h __B) {
662 __A = _mm_mul_sh(__A, __B);671 __A = _mm_mul_sh(__A, __B);
663 return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph());672 return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph());
664}673}
...@@ -678,23 +687,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_mul_sh(__mmask8 __U,...@@ -678,23 +687,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_mul_sh(__mmask8 __U,
678 (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \687 (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \
679 (__mmask8)(U), (int)(R)))688 (__mmask8)(U), (int)(R)))
680689
681static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_div_sh(__m128h __A,690static __inline__ __m128h
682 __m128h __B) {691 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_div_sh(__m128h __A, __m128h __B) {
683 __A[0] /= __B[0];692 __A[0] /= __B[0];
684 return __A;693 return __A;
685}694}
686695
687static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_div_sh(__m128h __W,696static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
688 __mmask8 __U,697_mm_mask_div_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {
689 __m128h __A,
690 __m128h __B) {
691 __A = _mm_div_sh(__A, __B);698 __A = _mm_div_sh(__A, __B);
692 return __builtin_ia32_selectsh_128(__U, __A, __W);699 return __builtin_ia32_selectsh_128(__U, __A, __W);
693}700}
694701
695static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_div_sh(__mmask8 __U,702static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
696 __m128h __A,703_mm_maskz_div_sh(__mmask8 __U, __m128h __A, __m128h __B) {
697 __m128h __B) {
698 __A = _mm_div_sh(__A, __B);704 __A = _mm_div_sh(__A, __B);
699 return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph());705 return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph());
700}706}
...@@ -942,22 +948,19 @@ static __inline__ void __DEFAULT_FN_ATTRS128 _mm_storeu_ph(void *__P,...@@ -942,22 +948,19 @@ static __inline__ void __DEFAULT_FN_ATTRS128 _mm_storeu_ph(void *__P,
942}948}
943949
944// moves with vmovsh:950// moves with vmovsh:
945static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_move_sh(__m128h __a,951static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
946 __m128h __b) {952_mm_move_sh(__m128h __a, __m128h __b) {
947 __a[0] = __b[0];953 __a[0] = __b[0];
948 return __a;954 return __a;
949}955}
950956
951static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_move_sh(__m128h __W,957static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
952 __mmask8 __U,958_mm_mask_move_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {
953 __m128h __A,
954 __m128h __B) {
955 return __builtin_ia32_selectsh_128(__U, _mm_move_sh(__A, __B), __W);959 return __builtin_ia32_selectsh_128(__U, _mm_move_sh(__A, __B), __W);
956}960}
957961
958static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_move_sh(__mmask8 __U,962static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
959 __m128h __A,963_mm_maskz_move_sh(__mmask8 __U, __m128h __A, __m128h __B) {
960 __m128h __B) {
961 return __builtin_ia32_selectsh_128(__U, _mm_move_sh(__A, __B),964 return __builtin_ia32_selectsh_128(__U, _mm_move_sh(__A, __B),
962 _mm_setzero_ph());965 _mm_setzero_ph());
963}966}
...@@ -1383,24 +1386,20 @@ _mm_maskz_scalef_sh(__mmask8 __U, __m128h __A, __m128h __B) {...@@ -1383,24 +1386,20 @@ _mm_maskz_scalef_sh(__mmask8 __U, __m128h __A, __m128h __B) {
1383 (__v32hf)_mm512_setzero_ph()))1386 (__v32hf)_mm512_setzero_ph()))
13841387
1385static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_sqrt_ph(__m512h __A) {1388static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_sqrt_ph(__m512h __A) {
1386 return (__m512h)__builtin_ia32_sqrtph512((__v32hf)__A,1389 return (__m512h)__builtin_elementwise_sqrt((__v32hf)__A);
1387 _MM_FROUND_CUR_DIRECTION);
1388}1390}
13891391
1390static __inline__ __m512h __DEFAULT_FN_ATTRS5121392static __inline__ __m512h __DEFAULT_FN_ATTRS512
1391_mm512_mask_sqrt_ph(__m512h __W, __mmask32 __U, __m512h __A) {1393_mm512_mask_sqrt_ph(__m512h __W, __mmask32 __U, __m512h __A) {
1392 return (__m512h)__builtin_ia32_selectph_512(1394 return (__m512h)__builtin_ia32_selectph_512(
1393 (__mmask32)(__U),1395 (__mmask32)(__U), (__v32hf)_mm512_sqrt_ph(__A), (__v32hf)(__m512h)(__W));
1394 (__v32hf)__builtin_ia32_sqrtph512((__A), (_MM_FROUND_CUR_DIRECTION)),
1395 (__v32hf)(__m512h)(__W));
1396}1396}
13971397
1398static __inline__ __m512h __DEFAULT_FN_ATTRS5121398static __inline__ __m512h __DEFAULT_FN_ATTRS512
1399_mm512_maskz_sqrt_ph(__mmask32 __U, __m512h __A) {1399_mm512_maskz_sqrt_ph(__mmask32 __U, __m512h __A) {
1400 return (__m512h)__builtin_ia32_selectph_512(1400 return (__m512h)__builtin_ia32_selectph_512((__mmask32)(__U),
1401 (__mmask32)(__U),1401 (__v32hf)_mm512_sqrt_ph(__A),
1402 (__v32hf)__builtin_ia32_sqrtph512((__A), (_MM_FROUND_CUR_DIRECTION)),1402 (__v32hf)_mm512_setzero_ph());
1403 (__v32hf)_mm512_setzero_ph());
1404}1403}
14051404
1406#define _mm_sqrt_round_sh(A, B, R) \1405#define _mm_sqrt_round_sh(A, B, R) \
...@@ -3292,19 +3291,19 @@ _mm512_reduce_min_ph(__m512h __V) {...@@ -3292,19 +3291,19 @@ _mm512_reduce_min_ph(__m512h __V) {
3292 return __builtin_ia32_reduce_fmin_ph512(__V);3291 return __builtin_ia32_reduce_fmin_ph512(__V);
3293}3292}
32943293
3295static __inline__ __m512h __DEFAULT_FN_ATTRS5123294static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
3296_mm512_mask_blend_ph(__mmask32 __U, __m512h __A, __m512h __W) {3295_mm512_mask_blend_ph(__mmask32 __U, __m512h __A, __m512h __W) {
3297 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U, (__v32hf)__W,3296 return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U, (__v32hf)__W,
3298 (__v32hf)__A);3297 (__v32hf)__A);
3299}3298}
33003299
3301static __inline__ __m512h __DEFAULT_FN_ATTRS5123300static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
3302_mm512_permutex2var_ph(__m512h __A, __m512i __I, __m512h __B) {3301_mm512_permutex2var_ph(__m512h __A, __m512i __I, __m512h __B) {
3303 return (__m512h)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I,3302 return (__m512h)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I,
3304 (__v32hi)__B);3303 (__v32hi)__B);
3305}3304}
33063305
3307static __inline__ __m512h __DEFAULT_FN_ATTRS5123306static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR
3308_mm512_permutexvar_ph(__m512i __A, __m512h __B) {3307_mm512_permutexvar_ph(__m512i __A, __m512h __B) {
3309 return (__m512h)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A);3308 return (__m512h)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A);
3310}3309}
...@@ -3348,6 +3347,9 @@ _mm512_permutexvar_ph(__m512i __A, __m512h __B) {...@@ -3348,6 +3347,9 @@ _mm512_permutexvar_ph(__m512i __A, __m512h __B) {
3348#undef __DEFAULT_FN_ATTRS1283347#undef __DEFAULT_FN_ATTRS128
3349#undef __DEFAULT_FN_ATTRS2563348#undef __DEFAULT_FN_ATTRS256
3350#undef __DEFAULT_FN_ATTRS5123349#undef __DEFAULT_FN_ATTRS512
3350#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
3351#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
3352#undef __DEFAULT_FN_ATTRS512_CONSTEXPR
33513353
3352#endif3354#endif
3353#endif3355#endif
lib/include/avx512ifmaintrin.h+32-34
...@@ -15,54 +15,52 @@...@@ -15,54 +15,52 @@
15#define __IFMAINTRIN_H15#define __IFMAINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#if defined(__cplusplus) && (__cplusplus >= 201103L)
18#define __DEFAULT_FN_ATTRS \19#define __DEFAULT_FN_ATTRS \
19 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, __target__("avx512ifma"), \
20 __target__("avx512ifma,evex512"), __min_vector_width__(512)))21 __min_vector_width__(512))) constexpr
22#else
23#define __DEFAULT_FN_ATTRS \
24 __attribute__((__always_inline__, __nodebug__, __target__("avx512ifma"), \
25 __min_vector_width__(512)))
26#endif
2127
22static __inline__ __m512i __DEFAULT_FN_ATTRS28static __inline__ __m512i __DEFAULT_FN_ATTRS
23_mm512_madd52hi_epu64 (__m512i __X, __m512i __Y, __m512i __Z)29_mm512_madd52hi_epu64(__m512i __X, __m512i __Y, __m512i __Z) {
24{30 return (__m512i)__builtin_ia32_vpmadd52huq512((__v8di)__X, (__v8di)__Y,
25 return (__m512i)__builtin_ia32_vpmadd52huq512((__v8di) __X, (__v8di) __Y,31 (__v8di)__Z);
26 (__v8di) __Z);
27}32}
2833
29static __inline__ __m512i __DEFAULT_FN_ATTRS34static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_madd52hi_epu64(
30_mm512_mask_madd52hi_epu64 (__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y)35 __m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) {
31{36 return (__m512i)__builtin_ia32_selectq_512(
32 return (__m512i)__builtin_ia32_selectq_512(__M,37 __M, (__v8di)_mm512_madd52hi_epu64(__W, __X, __Y), (__v8di)__W);
33 (__v8di)_mm512_madd52hi_epu64(__W, __X, __Y),
34 (__v8di)__W);
35}38}
3639
37static __inline__ __m512i __DEFAULT_FN_ATTRS40static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_madd52hi_epu64(
38_mm512_maskz_madd52hi_epu64 (__mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z)41 __mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z) {
39{42 return (__m512i)__builtin_ia32_selectq_512(
40 return (__m512i)__builtin_ia32_selectq_512(__M,43 __M, (__v8di)_mm512_madd52hi_epu64(__X, __Y, __Z),
41 (__v8di)_mm512_madd52hi_epu64(__X, __Y, __Z),44 (__v8di)_mm512_setzero_si512());
42 (__v8di)_mm512_setzero_si512());
43}45}
4446
45static __inline__ __m512i __DEFAULT_FN_ATTRS47static __inline__ __m512i __DEFAULT_FN_ATTRS
46_mm512_madd52lo_epu64 (__m512i __X, __m512i __Y, __m512i __Z)48_mm512_madd52lo_epu64(__m512i __X, __m512i __Y, __m512i __Z) {
47{49 return (__m512i)__builtin_ia32_vpmadd52luq512((__v8di)__X, (__v8di)__Y,
48 return (__m512i)__builtin_ia32_vpmadd52luq512((__v8di) __X, (__v8di) __Y,50 (__v8di)__Z);
49 (__v8di) __Z);
50}51}
5152
52static __inline__ __m512i __DEFAULT_FN_ATTRS53static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_madd52lo_epu64(
53_mm512_mask_madd52lo_epu64 (__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y)54 __m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) {
54{55 return (__m512i)__builtin_ia32_selectq_512(
55 return (__m512i)__builtin_ia32_selectq_512(__M,56 __M, (__v8di)_mm512_madd52lo_epu64(__W, __X, __Y), (__v8di)__W);
56 (__v8di)_mm512_madd52lo_epu64(__W, __X, __Y),
57 (__v8di)__W);
58}57}
5958
60static __inline__ __m512i __DEFAULT_FN_ATTRS59static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_madd52lo_epu64(
61_mm512_maskz_madd52lo_epu64 (__mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z)60 __mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z) {
62{61 return (__m512i)__builtin_ia32_selectq_512(
63 return (__m512i)__builtin_ia32_selectq_512(__M,62 __M, (__v8di)_mm512_madd52lo_epu64(__X, __Y, __Z),
64 (__v8di)_mm512_madd52lo_epu64(__X, __Y, __Z),63 (__v8di)_mm512_setzero_si512());
65 (__v8di)_mm512_setzero_si512());
66}64}
6765
68#undef __DEFAULT_FN_ATTRS66#undef __DEFAULT_FN_ATTRS
lib/include/avx512ifmavlintrin.h+73-46
...@@ -8,22 +8,35 @@...@@ -8,22 +8,35 @@
8 *===-----------------------------------------------------------------------===8 *===-----------------------------------------------------------------------===
9 */9 */
10#ifndef __IMMINTRIN_H10#ifndef __IMMINTRIN_H
11#error "Never use <avx512ifmavlintrin.h> directly; include <immintrin.h> instead."11#error \
12 "Never use <avx512ifmavlintrin.h> directly; include <immintrin.h> instead."
12#endif13#endif
1314
14#ifndef __IFMAVLINTRIN_H15#ifndef __IFMAVLINTRIN_H
15#define __IFMAVLINTRIN_H16#define __IFMAVLINTRIN_H
1617
17/* Define the default attributes for the functions in this file. */18/* Define the default attributes for the functions in this file. */
19#if defined(__cplusplus) && (__cplusplus >= 201103L)
18#define __DEFAULT_FN_ATTRS128 \20#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \21 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512ifma,avx512vl,no-evex512"), \22 __target__("avx512ifma,avx512vl"), \
23 __min_vector_width__(128))) constexpr
24#define __DEFAULT_FN_ATTRS256 \
25 __attribute__((__always_inline__, __nodebug__, \
26 __target__("avx512ifma,avx512vl"), \
27 __min_vector_width__(256))) constexpr
28#else
29#define __DEFAULT_FN_ATTRS128 \
30 __attribute__((__always_inline__, __nodebug__, \
31 __target__("avx512ifma,avx512vl"), \
21 __min_vector_width__(128)))32 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \33#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \34 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512ifma,avx512vl,no-evex512"), \35 __target__("avx512ifma,avx512vl"), \
25 __min_vector_width__(256)))36 __min_vector_width__(256)))
37#endif
2638
39#if !(defined(__AVXIFMA__) || defined(__AVX512IFMA__))
27#define _mm_madd52hi_epu64(X, Y, Z) \40#define _mm_madd52hi_epu64(X, Y, Z) \
28 ((__m128i)__builtin_ia32_vpmadd52huq128((__v2di)(X), (__v2di)(Y), \41 ((__m128i)__builtin_ia32_vpmadd52huq128((__v2di)(X), (__v2di)(Y), \
29 (__v2di)(Z)))42 (__v2di)(Z)))
...@@ -39,71 +52,85 @@...@@ -39,71 +52,85 @@
39#define _mm256_madd52lo_epu64(X, Y, Z) \52#define _mm256_madd52lo_epu64(X, Y, Z) \
40 ((__m256i)__builtin_ia32_vpmadd52luq256((__v4di)(X), (__v4di)(Y), \53 ((__m256i)__builtin_ia32_vpmadd52luq256((__v4di)(X), (__v4di)(Y), \
41 (__v4di)(Z)))54 (__v4di)(Z)))
55#endif
4256
57#if defined(__AVX512IFMA__)
43static __inline__ __m128i __DEFAULT_FN_ATTRS12858static __inline__ __m128i __DEFAULT_FN_ATTRS128
44_mm_mask_madd52hi_epu64 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)59_mm_madd52hi_epu64(__m128i __X, __m128i __Y, __m128i __Z) {
45{60 return (__m128i)__builtin_ia32_vpmadd52huq128((__v2di)__X, (__v2di)__Y,
46 return (__m128i)__builtin_ia32_selectq_128(__M,61 (__v2di)__Z);
47 (__v2di)_mm_madd52hi_epu64(__W, __X, __Y),62}
48 (__v2di)__W);63
64static __inline__ __m256i __DEFAULT_FN_ATTRS256
65_mm256_madd52hi_epu64(__m256i __X, __m256i __Y, __m256i __Z) {
66 return (__m256i)__builtin_ia32_vpmadd52huq256((__v4di)__X, (__v4di)__Y,
67 (__v4di)__Z);
49}68}
5069
51static __inline__ __m128i __DEFAULT_FN_ATTRS12870static __inline__ __m128i __DEFAULT_FN_ATTRS128
52_mm_maskz_madd52hi_epu64 (__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z)71_mm_madd52lo_epu64(__m128i __X, __m128i __Y, __m128i __Z) {
53{72 return (__m128i)__builtin_ia32_vpmadd52luq128((__v2di)__X, (__v2di)__Y,
54 return (__m128i)__builtin_ia32_selectq_128(__M,73 (__v2di)__Z);
55 (__v2di)_mm_madd52hi_epu64(__X, __Y, __Z),
56 (__v2di)_mm_setzero_si128());
57}74}
5875
59static __inline__ __m256i __DEFAULT_FN_ATTRS25676static __inline__ __m256i __DEFAULT_FN_ATTRS256
60_mm256_mask_madd52hi_epu64 (__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)77_mm256_madd52lo_epu64(__m256i __X, __m256i __Y, __m256i __Z) {
61{78 return (__m256i)__builtin_ia32_vpmadd52luq256((__v4di)__X, (__v4di)__Y,
62 return (__m256i)__builtin_ia32_selectq_256(__M,79 (__v4di)__Z);
63 (__v4di)_mm256_madd52hi_epu64(__W, __X, __Y),
64 (__v4di)__W);
65}80}
81#endif
6682
67static __inline__ __m256i __DEFAULT_FN_ATTRS25683static __inline__ __m128i __DEFAULT_FN_ATTRS128
68_mm256_maskz_madd52hi_epu64 (__mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z)84_mm_mask_madd52hi_epu64(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) {
69{85 return (__m128i)__builtin_ia32_selectq_128(
70 return (__m256i)__builtin_ia32_selectq_256(__M,86 __M, (__v2di)__builtin_ia32_vpmadd52huq128(__W, __X, __Y), (__v2di)__W);
71 (__v4di)_mm256_madd52hi_epu64(__X, __Y, __Z),
72 (__v4di)_mm256_setzero_si256());
73}87}
7488
75static __inline__ __m128i __DEFAULT_FN_ATTRS12889static __inline__ __m128i __DEFAULT_FN_ATTRS128
76_mm_mask_madd52lo_epu64 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)90_mm_maskz_madd52hi_epu64(__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z) {
77{91 return (__m128i)__builtin_ia32_selectq_128(
78 return (__m128i)__builtin_ia32_selectq_128(__M,92 __M, (__v2di)__builtin_ia32_vpmadd52huq128(__X, __Y, __Z),
79 (__v2di)_mm_madd52lo_epu64(__W, __X, __Y),93 (__v2di)_mm_setzero_si128());
80 (__v2di)__W);94}
95
96static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_madd52hi_epu64(
97 __m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) {
98 return (__m256i)__builtin_ia32_selectq_256(
99 __M, (__v4di)__builtin_ia32_vpmadd52huq256(__W, __X, __Y), (__v4di)__W);
100}
101
102static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_madd52hi_epu64(
103 __mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z) {
104 return (__m256i)__builtin_ia32_selectq_256(
105 __M, (__v4di)__builtin_ia32_vpmadd52huq256(__X, __Y, __Z),
106 (__v4di)_mm256_setzero_si256());
81}107}
82108
83static __inline__ __m128i __DEFAULT_FN_ATTRS128109static __inline__ __m128i __DEFAULT_FN_ATTRS128
84_mm_maskz_madd52lo_epu64 (__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z)110_mm_mask_madd52lo_epu64(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) {
85{111 return (__m128i)__builtin_ia32_selectq_128(
86 return (__m128i)__builtin_ia32_selectq_128(__M,112 __M, (__v2di)__builtin_ia32_vpmadd52luq128(__W, __X, __Y), (__v2di)__W);
87 (__v2di)_mm_madd52lo_epu64(__X, __Y, __Z),
88 (__v2di)_mm_setzero_si128());
89}113}
90114
91static __inline__ __m256i __DEFAULT_FN_ATTRS256115static __inline__ __m128i __DEFAULT_FN_ATTRS128
92_mm256_mask_madd52lo_epu64 (__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)116_mm_maskz_madd52lo_epu64(__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z) {
93{117 return (__m128i)__builtin_ia32_selectq_128(
94 return (__m256i)__builtin_ia32_selectq_256(__M,118 __M, (__v2di)__builtin_ia32_vpmadd52luq128(__X, __Y, __Z),
95 (__v4di)_mm256_madd52lo_epu64(__W, __X, __Y),119 (__v2di)_mm_setzero_si128());
96 (__v4di)__W);
97}120}
98121
99static __inline__ __m256i __DEFAULT_FN_ATTRS256122static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_madd52lo_epu64(
100_mm256_maskz_madd52lo_epu64 (__mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z)123 __m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) {
101{124 return (__m256i)__builtin_ia32_selectq_256(
102 return (__m256i)__builtin_ia32_selectq_256(__M,125 __M, (__v4di)__builtin_ia32_vpmadd52luq256(__W, __X, __Y), (__v4di)__W);
103 (__v4di)_mm256_madd52lo_epu64(__X, __Y, __Z),
104 (__v4di)_mm256_setzero_si256());
105}126}
106127
128static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_madd52lo_epu64(
129 __mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z) {
130 return (__m256i)__builtin_ia32_selectq_256(
131 __M, (__v4di)__builtin_ia32_vpmadd52luq256(__X, __Y, __Z),
132 (__v4di)_mm256_setzero_si256());
133}
107134
108#undef __DEFAULT_FN_ATTRS128135#undef __DEFAULT_FN_ATTRS128
109#undef __DEFAULT_FN_ATTRS256136#undef __DEFAULT_FN_ATTRS256
lib/include/avx512vbmi2intrin.h+43-32
...@@ -15,8 +15,15 @@...@@ -15,8 +15,15 @@
15#define __AVX512VBMI2INTRIN_H15#define __AVX512VBMI2INTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vbmi2,evex512"), __min_vector_width__(512)))18#define __DEFAULT_FN_ATTRS \
1919 __attribute__((__always_inline__, __nodebug__, __target__("avx512vbmi2"), \
20 __min_vector_width__(512)))
21
22#if defined(__cplusplus) && (__cplusplus >= 201103L)
23#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
24#else
25#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
26#endif
2027
21static __inline__ __m512i __DEFAULT_FN_ATTRS28static __inline__ __m512i __DEFAULT_FN_ATTRS
22_mm512_mask_compress_epi16(__m512i __S, __mmask32 __U, __m512i __D)29_mm512_mask_compress_epi16(__m512i __S, __mmask32 __U, __m512i __D)
...@@ -212,14 +219,14 @@ _mm512_maskz_expandloadu_epi8(__mmask64 __U, void const *__P)...@@ -212,14 +219,14 @@ _mm512_maskz_expandloadu_epi8(__mmask64 __U, void const *__P)
212 (__v32hi)_mm512_shrdi_epi16((A), (B), (I)), \219 (__v32hi)_mm512_shrdi_epi16((A), (B), (I)), \
213 (__v32hi)_mm512_setzero_si512()))220 (__v32hi)_mm512_setzero_si512()))
214221
215static __inline__ __m512i __DEFAULT_FN_ATTRS222static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
216_mm512_shldv_epi64(__m512i __A, __m512i __B, __m512i __C)223_mm512_shldv_epi64(__m512i __A, __m512i __B, __m512i __C)
217{224{
218 return (__m512i)__builtin_ia32_vpshldvq512((__v8di)__A, (__v8di)__B,225 return (__m512i)__builtin_elementwise_fshl((__v8du)__A, (__v8du)__B,
219 (__v8di)__C);226 (__v8du)__C);
220}227}
221228
222static __inline__ __m512i __DEFAULT_FN_ATTRS229static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
223_mm512_mask_shldv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C)230_mm512_mask_shldv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C)
224{231{
225 return (__m512i)__builtin_ia32_selectq_512(__U,232 return (__m512i)__builtin_ia32_selectq_512(__U,
...@@ -227,7 +234,7 @@ _mm512_mask_shldv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C)...@@ -227,7 +234,7 @@ _mm512_mask_shldv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C)
227 (__v8di)__A);234 (__v8di)__A);
228}235}
229236
230static __inline__ __m512i __DEFAULT_FN_ATTRS237static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
231_mm512_maskz_shldv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C)238_mm512_maskz_shldv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C)
232{239{
233 return (__m512i)__builtin_ia32_selectq_512(__U,240 return (__m512i)__builtin_ia32_selectq_512(__U,
...@@ -235,14 +242,14 @@ _mm512_maskz_shldv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C)...@@ -235,14 +242,14 @@ _mm512_maskz_shldv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C)
235 (__v8di)_mm512_setzero_si512());242 (__v8di)_mm512_setzero_si512());
236}243}
237244
238static __inline__ __m512i __DEFAULT_FN_ATTRS245static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
239_mm512_shldv_epi32(__m512i __A, __m512i __B, __m512i __C)246_mm512_shldv_epi32(__m512i __A, __m512i __B, __m512i __C)
240{247{
241 return (__m512i)__builtin_ia32_vpshldvd512((__v16si)__A, (__v16si)__B,248 return (__m512i)__builtin_elementwise_fshl((__v16su)__A, (__v16su)__B,
242 (__v16si)__C);249 (__v16su)__C);
243}250}
244251
245static __inline__ __m512i __DEFAULT_FN_ATTRS252static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
246_mm512_mask_shldv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C)253_mm512_mask_shldv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C)
247{254{
248 return (__m512i)__builtin_ia32_selectd_512(__U,255 return (__m512i)__builtin_ia32_selectd_512(__U,
...@@ -250,7 +257,7 @@ _mm512_mask_shldv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C)...@@ -250,7 +257,7 @@ _mm512_mask_shldv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C)
250 (__v16si)__A);257 (__v16si)__A);
251}258}
252259
253static __inline__ __m512i __DEFAULT_FN_ATTRS260static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
254_mm512_maskz_shldv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C)261_mm512_maskz_shldv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C)
255{262{
256 return (__m512i)__builtin_ia32_selectd_512(__U,263 return (__m512i)__builtin_ia32_selectd_512(__U,
...@@ -258,14 +265,14 @@ _mm512_maskz_shldv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C)...@@ -258,14 +265,14 @@ _mm512_maskz_shldv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C)
258 (__v16si)_mm512_setzero_si512());265 (__v16si)_mm512_setzero_si512());
259}266}
260267
261static __inline__ __m512i __DEFAULT_FN_ATTRS268static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
262_mm512_shldv_epi16(__m512i __A, __m512i __B, __m512i __C)269_mm512_shldv_epi16(__m512i __A, __m512i __B, __m512i __C)
263{270{
264 return (__m512i)__builtin_ia32_vpshldvw512((__v32hi)__A, (__v32hi)__B,271 return (__m512i)__builtin_elementwise_fshl((__v32hu)__A, (__v32hu)__B,
265 (__v32hi)__C);272 (__v32hu)__C);
266}273}
267274
268static __inline__ __m512i __DEFAULT_FN_ATTRS275static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
269_mm512_mask_shldv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C)276_mm512_mask_shldv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C)
270{277{
271 return (__m512i)__builtin_ia32_selectw_512(__U,278 return (__m512i)__builtin_ia32_selectw_512(__U,
...@@ -273,7 +280,7 @@ _mm512_mask_shldv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C)...@@ -273,7 +280,7 @@ _mm512_mask_shldv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C)
273 (__v32hi)__A);280 (__v32hi)__A);
274}281}
275282
276static __inline__ __m512i __DEFAULT_FN_ATTRS283static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
277_mm512_maskz_shldv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C)284_mm512_maskz_shldv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C)
278{285{
279 return (__m512i)__builtin_ia32_selectw_512(__U,286 return (__m512i)__builtin_ia32_selectw_512(__U,
...@@ -281,14 +288,15 @@ _mm512_maskz_shldv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C)...@@ -281,14 +288,15 @@ _mm512_maskz_shldv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C)
281 (__v32hi)_mm512_setzero_si512());288 (__v32hi)_mm512_setzero_si512());
282}289}
283290
284static __inline__ __m512i __DEFAULT_FN_ATTRS291static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
285_mm512_shrdv_epi64(__m512i __A, __m512i __B, __m512i __C)292_mm512_shrdv_epi64(__m512i __A, __m512i __B, __m512i __C)
286{293{
287 return (__m512i)__builtin_ia32_vpshrdvq512((__v8di)__A, (__v8di)__B,294 // Ops __A and __B are swapped.
288 (__v8di)__C);295 return (__m512i)__builtin_elementwise_fshr((__v8du)__B, (__v8du)__A,
296 (__v8du)__C);
289}297}
290298
291static __inline__ __m512i __DEFAULT_FN_ATTRS299static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
292_mm512_mask_shrdv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C)300_mm512_mask_shrdv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C)
293{301{
294 return (__m512i)__builtin_ia32_selectq_512(__U,302 return (__m512i)__builtin_ia32_selectq_512(__U,
...@@ -296,7 +304,7 @@ _mm512_mask_shrdv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C)...@@ -296,7 +304,7 @@ _mm512_mask_shrdv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C)
296 (__v8di)__A);304 (__v8di)__A);
297}305}
298306
299static __inline__ __m512i __DEFAULT_FN_ATTRS307static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
300_mm512_maskz_shrdv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C)308_mm512_maskz_shrdv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C)
301{309{
302 return (__m512i)__builtin_ia32_selectq_512(__U,310 return (__m512i)__builtin_ia32_selectq_512(__U,
...@@ -304,14 +312,15 @@ _mm512_maskz_shrdv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C)...@@ -304,14 +312,15 @@ _mm512_maskz_shrdv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C)
304 (__v8di)_mm512_setzero_si512());312 (__v8di)_mm512_setzero_si512());
305}313}
306314
307static __inline__ __m512i __DEFAULT_FN_ATTRS315static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
308_mm512_shrdv_epi32(__m512i __A, __m512i __B, __m512i __C)316_mm512_shrdv_epi32(__m512i __A, __m512i __B, __m512i __C)
309{317{
310 return (__m512i)__builtin_ia32_vpshrdvd512((__v16si)__A, (__v16si)__B,318 // Ops __A and __B are swapped.
311 (__v16si)__C);319 return (__m512i)__builtin_elementwise_fshr((__v16su)__B, (__v16su)__A,
320 (__v16su)__C);
312}321}
313322
314static __inline__ __m512i __DEFAULT_FN_ATTRS323static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
315_mm512_mask_shrdv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C)324_mm512_mask_shrdv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C)
316{325{
317 return (__m512i) __builtin_ia32_selectd_512(__U,326 return (__m512i) __builtin_ia32_selectd_512(__U,
...@@ -319,7 +328,7 @@ _mm512_mask_shrdv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C)...@@ -319,7 +328,7 @@ _mm512_mask_shrdv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C)
319 (__v16si)__A);328 (__v16si)__A);
320}329}
321330
322static __inline__ __m512i __DEFAULT_FN_ATTRS331static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
323_mm512_maskz_shrdv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C)332_mm512_maskz_shrdv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C)
324{333{
325 return (__m512i) __builtin_ia32_selectd_512(__U,334 return (__m512i) __builtin_ia32_selectd_512(__U,
...@@ -327,14 +336,15 @@ _mm512_maskz_shrdv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C)...@@ -327,14 +336,15 @@ _mm512_maskz_shrdv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C)
327 (__v16si)_mm512_setzero_si512());336 (__v16si)_mm512_setzero_si512());
328}337}
329338
330static __inline__ __m512i __DEFAULT_FN_ATTRS339static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
331_mm512_shrdv_epi16(__m512i __A, __m512i __B, __m512i __C)340_mm512_shrdv_epi16(__m512i __A, __m512i __B, __m512i __C)
332{341{
333 return (__m512i)__builtin_ia32_vpshrdvw512((__v32hi)__A, (__v32hi)__B,342 // Ops __A and __B are swapped.
334 (__v32hi)__C);343 return (__m512i)__builtin_elementwise_fshr((__v32hu)__B, (__v32hu)__A,
344 (__v32hu)__C);
335}345}
336346
337static __inline__ __m512i __DEFAULT_FN_ATTRS347static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
338_mm512_mask_shrdv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C)348_mm512_mask_shrdv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C)
339{349{
340 return (__m512i)__builtin_ia32_selectw_512(__U,350 return (__m512i)__builtin_ia32_selectw_512(__U,
...@@ -342,7 +352,7 @@ _mm512_mask_shrdv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C)...@@ -342,7 +352,7 @@ _mm512_mask_shrdv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C)
342 (__v32hi)__A);352 (__v32hi)__A);
343}353}
344354
345static __inline__ __m512i __DEFAULT_FN_ATTRS355static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR
346_mm512_maskz_shrdv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C)356_mm512_maskz_shrdv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C)
347{357{
348 return (__m512i)__builtin_ia32_selectw_512(__U,358 return (__m512i)__builtin_ia32_selectw_512(__U,
...@@ -352,6 +362,7 @@ _mm512_maskz_shrdv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C)...@@ -352,6 +362,7 @@ _mm512_maskz_shrdv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C)
352362
353363
354#undef __DEFAULT_FN_ATTRS364#undef __DEFAULT_FN_ATTRS
365#undef __DEFAULT_FN_ATTRS_CONSTEXPR
355366
356#endif367#endif
357368
lib/include/avx512vbmiintrin.h+19-27
...@@ -15,63 +15,57 @@...@@ -15,63 +15,57 @@
15#define __VBMIINTRIN_H15#define __VBMIINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#if defined(__cplusplus) && (__cplusplus >= 201103L)
18#define __DEFAULT_FN_ATTRS \19#define __DEFAULT_FN_ATTRS \
19 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, __target__("avx512vbmi"), \
20 __target__("avx512vbmi,evex512"), __min_vector_width__(512)))21 __min_vector_width__(512))) constexpr
22#else
23#define __DEFAULT_FN_ATTRS \
24 __attribute__((__always_inline__, __nodebug__, __target__("avx512vbmi"), \
25 __min_vector_width__(512)))
26#endif
2127
22static __inline__ __m512i __DEFAULT_FN_ATTRS28static __inline__ __m512i __DEFAULT_FN_ATTRS
23_mm512_permutex2var_epi8(__m512i __A, __m512i __I, __m512i __B)29_mm512_permutex2var_epi8(__m512i __A, __m512i __I, __m512i __B) {
24{
25 return (__m512i)__builtin_ia32_vpermi2varqi512((__v64qi)__A, (__v64qi)__I,30 return (__m512i)__builtin_ia32_vpermi2varqi512((__v64qi)__A, (__v64qi)__I,
26 (__v64qi) __B);31 (__v64qi) __B);
27}32}
2833
29static __inline__ __m512i __DEFAULT_FN_ATTRS34static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_permutex2var_epi8(
30_mm512_mask_permutex2var_epi8(__m512i __A, __mmask64 __U, __m512i __I,35 __m512i __A, __mmask64 __U, __m512i __I, __m512i __B) {
31 __m512i __B)
32{
33 return (__m512i)__builtin_ia32_selectb_512(__U,36 return (__m512i)__builtin_ia32_selectb_512(__U,
34 (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B),37 (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B),
35 (__v64qi)__A);38 (__v64qi)__A);
36}39}
3740
38static __inline__ __m512i __DEFAULT_FN_ATTRS41static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask2_permutex2var_epi8(
39_mm512_mask2_permutex2var_epi8(__m512i __A, __m512i __I, __mmask64 __U,42 __m512i __A, __m512i __I, __mmask64 __U, __m512i __B) {
40 __m512i __B)
41{
42 return (__m512i)__builtin_ia32_selectb_512(__U,43 return (__m512i)__builtin_ia32_selectb_512(__U,
43 (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B),44 (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B),
44 (__v64qi)__I);45 (__v64qi)__I);
45}46}
4647
47static __inline__ __m512i __DEFAULT_FN_ATTRS48static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_permutex2var_epi8(
48_mm512_maskz_permutex2var_epi8(__mmask64 __U, __m512i __A, __m512i __I,49 __mmask64 __U, __m512i __A, __m512i __I, __m512i __B) {
49 __m512i __B)
50{
51 return (__m512i)__builtin_ia32_selectb_512(__U,50 return (__m512i)__builtin_ia32_selectb_512(__U,
52 (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B),51 (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B),
53 (__v64qi)_mm512_setzero_si512());52 (__v64qi)_mm512_setzero_si512());
54}53}
5554
56static __inline__ __m512i __DEFAULT_FN_ATTRS55static __inline__ __m512i __DEFAULT_FN_ATTRS
57_mm512_permutexvar_epi8 (__m512i __A, __m512i __B)56_mm512_permutexvar_epi8(__m512i __A, __m512i __B) {
58{
59 return (__m512i)__builtin_ia32_permvarqi512((__v64qi) __B, (__v64qi) __A);57 return (__m512i)__builtin_ia32_permvarqi512((__v64qi) __B, (__v64qi) __A);
60}58}
6159
62static __inline__ __m512i __DEFAULT_FN_ATTRS60static __inline__ __m512i __DEFAULT_FN_ATTRS
63_mm512_maskz_permutexvar_epi8 (__mmask64 __M, __m512i __A,61_mm512_maskz_permutexvar_epi8(__mmask64 __M, __m512i __A, __m512i __B) {
64 __m512i __B)
65{
66 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,62 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
67 (__v64qi)_mm512_permutexvar_epi8(__A, __B),63 (__v64qi)_mm512_permutexvar_epi8(__A, __B),
68 (__v64qi)_mm512_setzero_si512());64 (__v64qi)_mm512_setzero_si512());
69}65}
7066
71static __inline__ __m512i __DEFAULT_FN_ATTRS67static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_permutexvar_epi8(
72_mm512_mask_permutexvar_epi8 (__m512i __W, __mmask64 __M, __m512i __A,68 __m512i __W, __mmask64 __M, __m512i __A, __m512i __B) {
73 __m512i __B)
74{
75 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,69 return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M,
76 (__v64qi)_mm512_permutexvar_epi8(__A, __B),70 (__v64qi)_mm512_permutexvar_epi8(__A, __B),
77 (__v64qi)__W);71 (__v64qi)__W);
...@@ -100,7 +94,5 @@ _mm512_maskz_multishift_epi64_epi8(__mmask64 __M, __m512i __X, __m512i __Y)...@@ -100,7 +94,5 @@ _mm512_maskz_multishift_epi64_epi8(__mmask64 __M, __m512i __X, __m512i __Y)
100 (__v64qi)_mm512_setzero_si512());94 (__v64qi)_mm512_setzero_si512());
101}95}
10296
103
104#undef __DEFAULT_FN_ATTRS97#undef __DEFAULT_FN_ATTRS
105
106#endif98#endif
lib/include/avx512vbmivlintrin.h+35-49
...@@ -15,126 +15,114 @@...@@ -15,126 +15,114 @@
15#define __VBMIVLINTRIN_H15#define __VBMIVLINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#if defined(__cplusplus) && (__cplusplus >= 201103L)
18#define __DEFAULT_FN_ATTRS128 \19#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512vbmi,avx512vl,no-evex512"), \21 __target__("avx512vbmi,avx512vl"), \
22 __min_vector_width__(128))) constexpr
23#define __DEFAULT_FN_ATTRS256 \
24 __attribute__((__always_inline__, __nodebug__, \
25 __target__("avx512vbmi,avx512vl"), \
26 __min_vector_width__(256))) constexpr
27#else
28#define __DEFAULT_FN_ATTRS128 \
29 __attribute__((__always_inline__, __nodebug__, \
30 __target__("avx512vbmi,avx512vl"), \
21 __min_vector_width__(128)))31 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \32#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \33 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512vbmi,avx512vl,no-evex512"), \34 __target__("avx512vbmi,avx512vl"), \
25 __min_vector_width__(256)))35 __min_vector_width__(256)))
36#endif
2637
27static __inline__ __m128i __DEFAULT_FN_ATTRS12838static __inline__ __m128i __DEFAULT_FN_ATTRS128
28_mm_permutex2var_epi8(__m128i __A, __m128i __I, __m128i __B)39_mm_permutex2var_epi8(__m128i __A, __m128i __I, __m128i __B) {
29{
30 return (__m128i)__builtin_ia32_vpermi2varqi128((__v16qi)__A,40 return (__m128i)__builtin_ia32_vpermi2varqi128((__v16qi)__A,
31 (__v16qi)__I,41 (__v16qi)__I,
32 (__v16qi)__B);42 (__v16qi)__B);
33}43}
3444
35static __inline__ __m128i __DEFAULT_FN_ATTRS12845static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_permutex2var_epi8(
36_mm_mask_permutex2var_epi8(__m128i __A, __mmask16 __U, __m128i __I,46 __m128i __A, __mmask16 __U, __m128i __I, __m128i __B) {
37 __m128i __B)
38{
39 return (__m128i)__builtin_ia32_selectb_128(__U,47 return (__m128i)__builtin_ia32_selectb_128(__U,
40 (__v16qi)_mm_permutex2var_epi8(__A, __I, __B),48 (__v16qi)_mm_permutex2var_epi8(__A, __I, __B),
41 (__v16qi)__A);49 (__v16qi)__A);
42}50}
4351
44static __inline__ __m128i __DEFAULT_FN_ATTRS12852static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask2_permutex2var_epi8(
45_mm_mask2_permutex2var_epi8(__m128i __A, __m128i __I, __mmask16 __U,53 __m128i __A, __m128i __I, __mmask16 __U, __m128i __B) {
46 __m128i __B)
47{
48 return (__m128i)__builtin_ia32_selectb_128(__U,54 return (__m128i)__builtin_ia32_selectb_128(__U,
49 (__v16qi)_mm_permutex2var_epi8(__A, __I, __B),55 (__v16qi)_mm_permutex2var_epi8(__A, __I, __B),
50 (__v16qi)__I);56 (__v16qi)__I);
51}57}
5258
53static __inline__ __m128i __DEFAULT_FN_ATTRS12859static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_permutex2var_epi8(
54_mm_maskz_permutex2var_epi8(__mmask16 __U, __m128i __A, __m128i __I,60 __mmask16 __U, __m128i __A, __m128i __I, __m128i __B) {
55 __m128i __B)
56{
57 return (__m128i)__builtin_ia32_selectb_128(__U,61 return (__m128i)__builtin_ia32_selectb_128(__U,
58 (__v16qi)_mm_permutex2var_epi8(__A, __I, __B),62 (__v16qi)_mm_permutex2var_epi8(__A, __I, __B),
59 (__v16qi)_mm_setzero_si128());63 (__v16qi)_mm_setzero_si128());
60}64}
6165
62static __inline__ __m256i __DEFAULT_FN_ATTRS25666static __inline__ __m256i __DEFAULT_FN_ATTRS256
63_mm256_permutex2var_epi8(__m256i __A, __m256i __I, __m256i __B)67_mm256_permutex2var_epi8(__m256i __A, __m256i __I, __m256i __B) {
64{
65 return (__m256i)__builtin_ia32_vpermi2varqi256((__v32qi)__A, (__v32qi)__I,68 return (__m256i)__builtin_ia32_vpermi2varqi256((__v32qi)__A, (__v32qi)__I,
66 (__v32qi)__B);69 (__v32qi)__B);
67}70}
6871
69static __inline__ __m256i __DEFAULT_FN_ATTRS25672static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_permutex2var_epi8(
70_mm256_mask_permutex2var_epi8(__m256i __A, __mmask32 __U, __m256i __I,73 __m256i __A, __mmask32 __U, __m256i __I, __m256i __B) {
71 __m256i __B)
72{
73 return (__m256i)__builtin_ia32_selectb_256(__U,74 return (__m256i)__builtin_ia32_selectb_256(__U,
74 (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B),75 (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B),
75 (__v32qi)__A);76 (__v32qi)__A);
76}77}
7778
78static __inline__ __m256i __DEFAULT_FN_ATTRS25679static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask2_permutex2var_epi8(
79_mm256_mask2_permutex2var_epi8(__m256i __A, __m256i __I, __mmask32 __U,80 __m256i __A, __m256i __I, __mmask32 __U, __m256i __B) {
80 __m256i __B)
81{
82 return (__m256i)__builtin_ia32_selectb_256(__U,81 return (__m256i)__builtin_ia32_selectb_256(__U,
83 (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B),82 (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B),
84 (__v32qi)__I);83 (__v32qi)__I);
85}84}
8685
87static __inline__ __m256i __DEFAULT_FN_ATTRS25686static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_permutex2var_epi8(
88_mm256_maskz_permutex2var_epi8(__mmask32 __U, __m256i __A, __m256i __I,87 __mmask32 __U, __m256i __A, __m256i __I, __m256i __B) {
89 __m256i __B)
90{
91 return (__m256i)__builtin_ia32_selectb_256(__U,88 return (__m256i)__builtin_ia32_selectb_256(__U,
92 (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B),89 (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B),
93 (__v32qi)_mm256_setzero_si256());90 (__v32qi)_mm256_setzero_si256());
94}91}
9592
96static __inline__ __m128i __DEFAULT_FN_ATTRS12893static __inline__ __m128i __DEFAULT_FN_ATTRS128
97_mm_permutexvar_epi8 (__m128i __A, __m128i __B)94_mm_permutexvar_epi8(__m128i __A, __m128i __B) {
98{
99 return (__m128i)__builtin_ia32_permvarqi128((__v16qi)__B, (__v16qi)__A);95 return (__m128i)__builtin_ia32_permvarqi128((__v16qi)__B, (__v16qi)__A);
100}96}
10197
102static __inline__ __m128i __DEFAULT_FN_ATTRS12898static __inline__ __m128i __DEFAULT_FN_ATTRS128
103_mm_maskz_permutexvar_epi8 (__mmask16 __M, __m128i __A, __m128i __B)99_mm_maskz_permutexvar_epi8(__mmask16 __M, __m128i __A, __m128i __B) {
104{
105 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,100 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
106 (__v16qi)_mm_permutexvar_epi8(__A, __B),101 (__v16qi)_mm_permutexvar_epi8(__A, __B),
107 (__v16qi)_mm_setzero_si128());102 (__v16qi)_mm_setzero_si128());
108}103}
109104
110static __inline__ __m128i __DEFAULT_FN_ATTRS128105static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_permutexvar_epi8(
111_mm_mask_permutexvar_epi8 (__m128i __W, __mmask16 __M, __m128i __A,106 __m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
112 __m128i __B)
113{
114 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,107 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
115 (__v16qi)_mm_permutexvar_epi8(__A, __B),108 (__v16qi)_mm_permutexvar_epi8(__A, __B),
116 (__v16qi)__W);109 (__v16qi)__W);
117}110}
118111
119static __inline__ __m256i __DEFAULT_FN_ATTRS256112static __inline__ __m256i __DEFAULT_FN_ATTRS256
120_mm256_permutexvar_epi8 (__m256i __A, __m256i __B)113_mm256_permutexvar_epi8(__m256i __A, __m256i __B) {
121{
122 return (__m256i)__builtin_ia32_permvarqi256((__v32qi) __B, (__v32qi) __A);114 return (__m256i)__builtin_ia32_permvarqi256((__v32qi) __B, (__v32qi) __A);
123}115}
124116
125static __inline__ __m256i __DEFAULT_FN_ATTRS256117static __inline__ __m256i __DEFAULT_FN_ATTRS256
126_mm256_maskz_permutexvar_epi8 (__mmask32 __M, __m256i __A,118_mm256_maskz_permutexvar_epi8(__mmask32 __M, __m256i __A, __m256i __B) {
127 __m256i __B)
128{
129 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,119 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
130 (__v32qi)_mm256_permutexvar_epi8(__A, __B),120 (__v32qi)_mm256_permutexvar_epi8(__A, __B),
131 (__v32qi)_mm256_setzero_si256());121 (__v32qi)_mm256_setzero_si256());
132}122}
133123
134static __inline__ __m256i __DEFAULT_FN_ATTRS256124static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_permutexvar_epi8(
135_mm256_mask_permutexvar_epi8 (__m256i __W, __mmask32 __M, __m256i __A,125 __m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
136 __m256i __B)
137{
138 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,126 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
139 (__v32qi)_mm256_permutexvar_epi8(__A, __B),127 (__v32qi)_mm256_permutexvar_epi8(__A, __B),
140 (__v32qi)__W);128 (__v32qi)__W);
...@@ -186,8 +174,6 @@ _mm256_maskz_multishift_epi64_epi8(__mmask32 __M, __m256i __X, __m256i __Y)...@@ -186,8 +174,6 @@ _mm256_maskz_multishift_epi64_epi8(__mmask32 __M, __m256i __X, __m256i __Y)
186 (__v32qi)_mm256_setzero_si256());174 (__v32qi)_mm256_setzero_si256());
187}175}
188176
189
190#undef __DEFAULT_FN_ATTRS128177#undef __DEFAULT_FN_ATTRS128
191#undef __DEFAULT_FN_ATTRS256178#undef __DEFAULT_FN_ATTRS256
192
193#endif179#endif
lib/include/avx512vlbf16intrin.h+32-22
...@@ -17,13 +17,21 @@...@@ -17,13 +17,21 @@
1717
18#define __DEFAULT_FN_ATTRS128 \18#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \19 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512vl,avx512bf16,no-evex512"), \20 __target__("avx512vl,avx512bf16"), \
21 __min_vector_width__(128)))21 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \22#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \23 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512vl,avx512bf16,no-evex512"), \24 __target__("avx512vl,avx512bf16"), \
25 __min_vector_width__(256)))25 __min_vector_width__(256)))
2626
27#if defined(__cplusplus) && (__cplusplus >= 201103L)
28#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
29#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
30#else
31#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
32#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
33#endif
34
27/// Convert Two Packed Single Data to One Packed BF16 Data.35/// Convert Two Packed Single Data to One Packed BF16 Data.
28///36///
29/// \headerfile <x86intrin.h>37/// \headerfile <x86intrin.h>
...@@ -421,9 +429,10 @@ static __inline__ __bf16 __DEFAULT_FN_ATTRS128 _mm_cvtness_sbh(float __A) {...@@ -421,9 +429,10 @@ static __inline__ __bf16 __DEFAULT_FN_ATTRS128 _mm_cvtness_sbh(float __A) {
421/// \param __A429/// \param __A
422/// A 128-bit vector of [4 x bfloat].430/// A 128-bit vector of [4 x bfloat].
423/// \returns A 128-bit vector of [4 x float] come from conversion of __A431/// \returns A 128-bit vector of [4 x float] come from conversion of __A
424static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_cvtpbh_ps(__m128bh __A) {432static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
425 return _mm_castsi128_ps(433_mm_cvtpbh_ps(__m128bh __A) {
426 (__m128i)_mm_slli_epi32((__m128i)_mm_cvtepi16_epi32((__m128i)__A), 16));434 return (__m128)_mm256_castps256_ps128(
435 (__m256) __builtin_convertvector(__A, __v8sf));
427}436}
428437
429/// Convert Packed BF16 Data to Packed float Data.438/// Convert Packed BF16 Data to Packed float Data.
...@@ -433,9 +442,9 @@ static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_cvtpbh_ps(__m128bh __A) {...@@ -433,9 +442,9 @@ static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_cvtpbh_ps(__m128bh __A) {
433/// \param __A442/// \param __A
434/// A 128-bit vector of [8 x bfloat].443/// A 128-bit vector of [8 x bfloat].
435/// \returns A 256-bit vector of [8 x float] come from conversion of __A444/// \returns A 256-bit vector of [8 x float] come from conversion of __A
436static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_cvtpbh_ps(__m128bh __A) {445static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
437 return _mm256_castsi256_ps((__m256i)_mm256_slli_epi32(446_mm256_cvtpbh_ps(__m128bh __A) {
438 (__m256i)_mm256_cvtepi16_epi32((__m128i)__A), 16));447 return (__m256) __builtin_convertvector(__A, __v8sf);
439}448}
440449
441/// Convert Packed BF16 Data to Packed float Data using zeroing mask.450/// Convert Packed BF16 Data to Packed float Data using zeroing mask.
...@@ -448,10 +457,10 @@ static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_cvtpbh_ps(__m128bh __A) {...@@ -448,10 +457,10 @@ static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_cvtpbh_ps(__m128bh __A) {
448/// \param __A457/// \param __A
449/// A 128-bit vector of [4 x bfloat].458/// A 128-bit vector of [4 x bfloat].
450/// \returns A 128-bit vector of [4 x float] come from conversion of __A459/// \returns A 128-bit vector of [4 x float] come from conversion of __A
451static __inline__ __m128 __DEFAULT_FN_ATTRS128460static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
452_mm_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) {461_mm_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) {
453 return _mm_castsi128_ps((__m128i)_mm_slli_epi32(462 return (__m128)__builtin_ia32_selectps_128(
454 (__m128i)_mm_maskz_cvtepi16_epi32((__mmask8)__U, (__m128i)__A), 16));463 (__mmask8)__U, (__v4sf)_mm_cvtpbh_ps(__A), (__v4sf)_mm_setzero_ps());
455}464}
456465
457/// Convert Packed BF16 Data to Packed float Data using zeroing mask.466/// Convert Packed BF16 Data to Packed float Data using zeroing mask.
...@@ -464,10 +473,11 @@ _mm_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) {...@@ -464,10 +473,11 @@ _mm_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) {
464/// \param __A473/// \param __A
465/// A 128-bit vector of [8 x bfloat].474/// A 128-bit vector of [8 x bfloat].
466/// \returns A 256-bit vector of [8 x float] come from conversion of __A475/// \returns A 256-bit vector of [8 x float] come from conversion of __A
467static __inline__ __m256 __DEFAULT_FN_ATTRS256476static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
468_mm256_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) {477_mm256_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) {
469 return _mm256_castsi256_ps((__m256i)_mm256_slli_epi32(478 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
470 (__m256i)_mm256_maskz_cvtepi16_epi32((__mmask8)__U, (__m128i)__A), 16));479 (__v8sf)_mm256_cvtpbh_ps(__A),
480 (__v8sf)_mm256_setzero_ps());
471}481}
472482
473/// Convert Packed BF16 Data to Packed float Data using merging mask.483/// Convert Packed BF16 Data to Packed float Data using merging mask.
...@@ -483,11 +493,10 @@ _mm256_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) {...@@ -483,11 +493,10 @@ _mm256_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) {
483/// \param __A493/// \param __A
484/// A 128-bit vector of [4 x bfloat].494/// A 128-bit vector of [4 x bfloat].
485/// \returns A 128-bit vector of [4 x float] come from conversion of __A495/// \returns A 128-bit vector of [4 x float] come from conversion of __A
486static __inline__ __m128 __DEFAULT_FN_ATTRS128496static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
487_mm_mask_cvtpbh_ps(__m128 __S, __mmask8 __U, __m128bh __A) {497_mm_mask_cvtpbh_ps(__m128 __S, __mmask8 __U, __m128bh __A) {
488 return _mm_castsi128_ps((__m128i)_mm_mask_slli_epi32(498 return (__m128)__builtin_ia32_selectps_128(
489 (__m128i)__S, (__mmask8)__U, (__m128i)_mm_cvtepi16_epi32((__m128i)__A),499 (__mmask8)__U, (__v4sf)_mm_cvtpbh_ps(__A), (__v4sf)__S);
490 16));
491}500}
492501
493/// Convert Packed BF16 Data to Packed float Data using merging mask.502/// Convert Packed BF16 Data to Packed float Data using merging mask.
...@@ -503,15 +512,16 @@ _mm_mask_cvtpbh_ps(__m128 __S, __mmask8 __U, __m128bh __A) {...@@ -503,15 +512,16 @@ _mm_mask_cvtpbh_ps(__m128 __S, __mmask8 __U, __m128bh __A) {
503/// \param __A512/// \param __A
504/// A 128-bit vector of [8 x bfloat].513/// A 128-bit vector of [8 x bfloat].
505/// \returns A 256-bit vector of [8 x float] come from conversion of __A514/// \returns A 256-bit vector of [8 x float] come from conversion of __A
506static __inline__ __m256 __DEFAULT_FN_ATTRS256515static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
507_mm256_mask_cvtpbh_ps(__m256 __S, __mmask8 __U, __m128bh __A) {516_mm256_mask_cvtpbh_ps(__m256 __S, __mmask8 __U, __m128bh __A) {
508 return _mm256_castsi256_ps((__m256i)_mm256_mask_slli_epi32(517 return (__m256)__builtin_ia32_selectps_256(
509 (__m256i)__S, (__mmask8)__U, (__m256i)_mm256_cvtepi16_epi32((__m128i)__A),518 (__mmask8)__U, (__v8sf)_mm256_cvtpbh_ps(__A), (__v8sf)__S);
510 16));
511}519}
512520
513#undef __DEFAULT_FN_ATTRS128521#undef __DEFAULT_FN_ATTRS128
514#undef __DEFAULT_FN_ATTRS256522#undef __DEFAULT_FN_ATTRS256
523#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
524#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
515525
516#endif526#endif
517#endif527#endif
lib/include/avx512vlbitalgintrin.h+37-53
...@@ -15,101 +15,86 @@...@@ -15,101 +15,86 @@
15#define __AVX512VLBITALGINTRIN_H15#define __AVX512VLBITALGINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#if defined(__cplusplus) && (__cplusplus >= 201103L)
18#define __DEFAULT_FN_ATTRS128 \19#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512vl,avx512bitalg,no-evex512"), \21 __target__("avx512vl,avx512bitalg"), \
22 __min_vector_width__(128))) constexpr
23#define __DEFAULT_FN_ATTRS256 \
24 __attribute__((__always_inline__, __nodebug__, \
25 __target__("avx512vl,avx512bitalg"), \
26 __min_vector_width__(256))) constexpr
27#else
28#define __DEFAULT_FN_ATTRS128 \
29 __attribute__((__always_inline__, __nodebug__, \
30 __target__("avx512vl,avx512bitalg"), \
21 __min_vector_width__(128)))31 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \32#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \33 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512vl,avx512bitalg,no-evex512"), \34 __target__("avx512vl,avx512bitalg"), \
25 __min_vector_width__(256)))35 __min_vector_width__(256)))
36#endif
2637
27static __inline__ __m256i __DEFAULT_FN_ATTRS25638static __inline__ __m256i __DEFAULT_FN_ATTRS256
28_mm256_popcnt_epi16(__m256i __A)39_mm256_popcnt_epi16(__m256i __A) {
29{
30 return (__m256i)__builtin_elementwise_popcount((__v16hu)__A);40 return (__m256i)__builtin_elementwise_popcount((__v16hu)__A);
31}41}
3242
33static __inline__ __m256i __DEFAULT_FN_ATTRS25643static __inline__ __m256i __DEFAULT_FN_ATTRS256
34_mm256_mask_popcnt_epi16(__m256i __A, __mmask16 __U, __m256i __B)44_mm256_mask_popcnt_epi16(__m256i __A, __mmask16 __U, __m256i __B) {
35{45 return (__m256i)__builtin_ia32_selectw_256(
36 return (__m256i) __builtin_ia32_selectw_256((__mmask16) __U,46 (__mmask16)__U, (__v16hi)_mm256_popcnt_epi16(__B), (__v16hi)__A);
37 (__v16hi) _mm256_popcnt_epi16(__B),
38 (__v16hi) __A);
39}47}
4048
41static __inline__ __m256i __DEFAULT_FN_ATTRS25649static __inline__ __m256i __DEFAULT_FN_ATTRS256
42_mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B)50_mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B) {
43{51 return _mm256_mask_popcnt_epi16((__m256i)_mm256_setzero_si256(), __U, __B);
44 return _mm256_mask_popcnt_epi16((__m256i) _mm256_setzero_si256(),
45 __U,
46 __B);
47}52}
4853
49static __inline__ __m128i __DEFAULT_FN_ATTRS12854static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_popcnt_epi16(__m128i __A) {
50_mm_popcnt_epi16(__m128i __A)
51{
52 return (__m128i)__builtin_elementwise_popcount((__v8hu)__A);55 return (__m128i)__builtin_elementwise_popcount((__v8hu)__A);
53}56}
5457
55static __inline__ __m128i __DEFAULT_FN_ATTRS12858static __inline__ __m128i __DEFAULT_FN_ATTRS128
56_mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B)59_mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B) {
57{60 return (__m128i)__builtin_ia32_selectw_128(
58 return (__m128i) __builtin_ia32_selectw_128((__mmask8) __U,61 (__mmask8)__U, (__v8hi)_mm_popcnt_epi16(__B), (__v8hi)__A);
59 (__v8hi) _mm_popcnt_epi16(__B),
60 (__v8hi) __A);
61}62}
6263
63static __inline__ __m128i __DEFAULT_FN_ATTRS12864static __inline__ __m128i __DEFAULT_FN_ATTRS128
64_mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B)65_mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B) {
65{66 return _mm_mask_popcnt_epi16((__m128i)_mm_setzero_si128(), __U, __B);
66 return _mm_mask_popcnt_epi16((__m128i) _mm_setzero_si128(),
67 __U,
68 __B);
69}67}
7068
71static __inline__ __m256i __DEFAULT_FN_ATTRS25669static __inline__ __m256i __DEFAULT_FN_ATTRS256
72_mm256_popcnt_epi8(__m256i __A)70_mm256_popcnt_epi8(__m256i __A) {
73{
74 return (__m256i)__builtin_elementwise_popcount((__v32qu)__A);71 return (__m256i)__builtin_elementwise_popcount((__v32qu)__A);
75}72}
7673
77static __inline__ __m256i __DEFAULT_FN_ATTRS25674static __inline__ __m256i __DEFAULT_FN_ATTRS256
78_mm256_mask_popcnt_epi8(__m256i __A, __mmask32 __U, __m256i __B)75_mm256_mask_popcnt_epi8(__m256i __A, __mmask32 __U, __m256i __B) {
79{76 return (__m256i)__builtin_ia32_selectb_256(
80 return (__m256i) __builtin_ia32_selectb_256((__mmask32) __U,77 (__mmask32)__U, (__v32qi)_mm256_popcnt_epi8(__B), (__v32qi)__A);
81 (__v32qi) _mm256_popcnt_epi8(__B),
82 (__v32qi) __A);
83}78}
8479
85static __inline__ __m256i __DEFAULT_FN_ATTRS25680static __inline__ __m256i __DEFAULT_FN_ATTRS256
86_mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B)81_mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B) {
87{82 return _mm256_mask_popcnt_epi8((__m256i)_mm256_setzero_si256(), __U, __B);
88 return _mm256_mask_popcnt_epi8((__m256i) _mm256_setzero_si256(),
89 __U,
90 __B);
91}83}
9284
93static __inline__ __m128i __DEFAULT_FN_ATTRS12885static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_popcnt_epi8(__m128i __A) {
94_mm_popcnt_epi8(__m128i __A)
95{
96 return (__m128i)__builtin_elementwise_popcount((__v16qu)__A);86 return (__m128i)__builtin_elementwise_popcount((__v16qu)__A);
97}87}
9888
99static __inline__ __m128i __DEFAULT_FN_ATTRS12889static __inline__ __m128i __DEFAULT_FN_ATTRS128
100_mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B)90_mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B) {
101{91 return (__m128i)__builtin_ia32_selectb_128(
102 return (__m128i) __builtin_ia32_selectb_128((__mmask16) __U,92 (__mmask16)__U, (__v16qi)_mm_popcnt_epi8(__B), (__v16qi)__A);
103 (__v16qi) _mm_popcnt_epi8(__B),
104 (__v16qi) __A);
105}93}
10694
107static __inline__ __m128i __DEFAULT_FN_ATTRS12895static __inline__ __m128i __DEFAULT_FN_ATTRS128
108_mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B)96_mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B) {
109{97 return _mm_mask_popcnt_epi8((__m128i)_mm_setzero_si128(), __U, __B);
110 return _mm_mask_popcnt_epi8((__m128i) _mm_setzero_si128(),
111 __U,
112 __B);
113}98}
11499
115static __inline__ __mmask32 __DEFAULT_FN_ATTRS256100static __inline__ __mmask32 __DEFAULT_FN_ATTRS256
...@@ -147,5 +132,4 @@ _mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B)...@@ -147,5 +132,4 @@ _mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B)
147132
148#undef __DEFAULT_FN_ATTRS128133#undef __DEFAULT_FN_ATTRS128
149#undef __DEFAULT_FN_ATTRS256134#undef __DEFAULT_FN_ATTRS256
150
151#endif135#endif
lib/include/avx512vlbwintrin.h+470-573
...@@ -17,12 +17,18 @@...@@ -17,12 +17,18 @@
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS128 \18#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \19 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512vl,avx512bw,no-evex512"), \20 __target__("avx512vl,avx512bw"), __min_vector_width__(128)))
21 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \21#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \22 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512vl,avx512bw,no-evex512"), \23 __target__("avx512vl,avx512bw"), __min_vector_width__(256)))
25 __min_vector_width__(256)))24
25#if defined(__cplusplus) && (__cplusplus >= 201103L)
26#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
27#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
28#else
29#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
30#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
31#endif
2632
27/* Integer compare */33/* Integer compare */
2834
...@@ -306,250 +312,238 @@...@@ -306,250 +312,238 @@
306#define _mm256_mask_cmpneq_epu16_mask(k, A, B) \312#define _mm256_mask_cmpneq_epu16_mask(k, A, B) \
307 _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)313 _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE)
308314
309static __inline__ __m256i __DEFAULT_FN_ATTRS256315static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
310_mm256_mask_add_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B){316_mm256_mask_add_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
311 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,317 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
312 (__v32qi)_mm256_add_epi8(__A, __B),318 (__v32qi)_mm256_add_epi8(__A, __B),
313 (__v32qi)__W);319 (__v32qi)__W);
314}320}
315321
316static __inline__ __m256i __DEFAULT_FN_ATTRS256322static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
317_mm256_maskz_add_epi8(__mmask32 __U, __m256i __A, __m256i __B) {323_mm256_maskz_add_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
318 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,324 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
319 (__v32qi)_mm256_add_epi8(__A, __B),325 (__v32qi)_mm256_add_epi8(__A, __B),
320 (__v32qi)_mm256_setzero_si256());326 (__v32qi)_mm256_setzero_si256());
321}327}
322328
323static __inline__ __m256i __DEFAULT_FN_ATTRS256329static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
324_mm256_mask_add_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {330_mm256_mask_add_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
325 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,331 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
326 (__v16hi)_mm256_add_epi16(__A, __B),332 (__v16hi)_mm256_add_epi16(__A, __B),
327 (__v16hi)__W);333 (__v16hi)__W);
328}334}
329335
330static __inline__ __m256i __DEFAULT_FN_ATTRS256336static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
331_mm256_maskz_add_epi16(__mmask16 __U, __m256i __A, __m256i __B) {337_mm256_maskz_add_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
332 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,338 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
333 (__v16hi)_mm256_add_epi16(__A, __B),339 (__v16hi)_mm256_add_epi16(__A, __B),
334 (__v16hi)_mm256_setzero_si256());340 (__v16hi)_mm256_setzero_si256());
335}341}
336342
337static __inline__ __m256i __DEFAULT_FN_ATTRS256343static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
338_mm256_mask_sub_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {344_mm256_mask_sub_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
339 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,345 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
340 (__v32qi)_mm256_sub_epi8(__A, __B),346 (__v32qi)_mm256_sub_epi8(__A, __B),
341 (__v32qi)__W);347 (__v32qi)__W);
342}348}
343349
344static __inline__ __m256i __DEFAULT_FN_ATTRS256350static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
345_mm256_maskz_sub_epi8(__mmask32 __U, __m256i __A, __m256i __B) {351_mm256_maskz_sub_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
346 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,352 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
347 (__v32qi)_mm256_sub_epi8(__A, __B),353 (__v32qi)_mm256_sub_epi8(__A, __B),
348 (__v32qi)_mm256_setzero_si256());354 (__v32qi)_mm256_setzero_si256());
349}355}
350356
351static __inline__ __m256i __DEFAULT_FN_ATTRS256357static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
352_mm256_mask_sub_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {358_mm256_mask_sub_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
353 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,359 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
354 (__v16hi)_mm256_sub_epi16(__A, __B),360 (__v16hi)_mm256_sub_epi16(__A, __B),
355 (__v16hi)__W);361 (__v16hi)__W);
356}362}
357363
358static __inline__ __m256i __DEFAULT_FN_ATTRS256364static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
359_mm256_maskz_sub_epi16(__mmask16 __U, __m256i __A, __m256i __B) {365_mm256_maskz_sub_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
360 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,366 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
361 (__v16hi)_mm256_sub_epi16(__A, __B),367 (__v16hi)_mm256_sub_epi16(__A, __B),
362 (__v16hi)_mm256_setzero_si256());368 (__v16hi)_mm256_setzero_si256());
363}369}
364370
365static __inline__ __m128i __DEFAULT_FN_ATTRS128371static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
366_mm_mask_add_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {372_mm_mask_add_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
367 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,373 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
368 (__v16qi)_mm_add_epi8(__A, __B),374 (__v16qi)_mm_add_epi8(__A, __B),
369 (__v16qi)__W);375 (__v16qi)__W);
370}376}
371377
372static __inline__ __m128i __DEFAULT_FN_ATTRS128378static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
373_mm_maskz_add_epi8(__mmask16 __U, __m128i __A, __m128i __B) {379_mm_maskz_add_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
374 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,380 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
375 (__v16qi)_mm_add_epi8(__A, __B),381 (__v16qi)_mm_add_epi8(__A, __B),
376 (__v16qi)_mm_setzero_si128());382 (__v16qi)_mm_setzero_si128());
377}383}
378384
379static __inline__ __m128i __DEFAULT_FN_ATTRS128385static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
380_mm_mask_add_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {386_mm_mask_add_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
381 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,387 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
382 (__v8hi)_mm_add_epi16(__A, __B),388 (__v8hi)_mm_add_epi16(__A, __B),
383 (__v8hi)__W);389 (__v8hi)__W);
384}390}
385391
386static __inline__ __m128i __DEFAULT_FN_ATTRS128392static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
387_mm_maskz_add_epi16(__mmask8 __U, __m128i __A, __m128i __B) {393_mm_maskz_add_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
388 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,394 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
389 (__v8hi)_mm_add_epi16(__A, __B),395 (__v8hi)_mm_add_epi16(__A, __B),
390 (__v8hi)_mm_setzero_si128());396 (__v8hi)_mm_setzero_si128());
391}397}
392398
393static __inline__ __m128i __DEFAULT_FN_ATTRS128399static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
394_mm_mask_sub_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {400_mm_mask_sub_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
395 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,401 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
396 (__v16qi)_mm_sub_epi8(__A, __B),402 (__v16qi)_mm_sub_epi8(__A, __B),
397 (__v16qi)__W);403 (__v16qi)__W);
398}404}
399405
400static __inline__ __m128i __DEFAULT_FN_ATTRS128406static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
401_mm_maskz_sub_epi8(__mmask16 __U, __m128i __A, __m128i __B) {407_mm_maskz_sub_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
402 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,408 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
403 (__v16qi)_mm_sub_epi8(__A, __B),409 (__v16qi)_mm_sub_epi8(__A, __B),
404 (__v16qi)_mm_setzero_si128());410 (__v16qi)_mm_setzero_si128());
405}411}
406412
407static __inline__ __m128i __DEFAULT_FN_ATTRS128413static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
408_mm_mask_sub_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {414_mm_mask_sub_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
409 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,415 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
410 (__v8hi)_mm_sub_epi16(__A, __B),416 (__v8hi)_mm_sub_epi16(__A, __B),
411 (__v8hi)__W);417 (__v8hi)__W);
412}418}
413419
414static __inline__ __m128i __DEFAULT_FN_ATTRS128420static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
415_mm_maskz_sub_epi16(__mmask8 __U, __m128i __A, __m128i __B) {421_mm_maskz_sub_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
416 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,422 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
417 (__v8hi)_mm_sub_epi16(__A, __B),423 (__v8hi)_mm_sub_epi16(__A, __B),
418 (__v8hi)_mm_setzero_si128());424 (__v8hi)_mm_setzero_si128());
419}425}
420426
421static __inline__ __m256i __DEFAULT_FN_ATTRS256427static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
422_mm256_mask_mullo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {428_mm256_mask_mullo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
423 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,429 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
424 (__v16hi)_mm256_mullo_epi16(__A, __B),430 (__v16hi)_mm256_mullo_epi16(__A, __B),
425 (__v16hi)__W);431 (__v16hi)__W);
426}432}
427433
428static __inline__ __m256i __DEFAULT_FN_ATTRS256434static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
429_mm256_maskz_mullo_epi16(__mmask16 __U, __m256i __A, __m256i __B) {435_mm256_maskz_mullo_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
430 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,436 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
431 (__v16hi)_mm256_mullo_epi16(__A, __B),437 (__v16hi)_mm256_mullo_epi16(__A, __B),
432 (__v16hi)_mm256_setzero_si256());438 (__v16hi)_mm256_setzero_si256());
433}439}
434440
435static __inline__ __m128i __DEFAULT_FN_ATTRS128441static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
436_mm_mask_mullo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {442_mm_mask_mullo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
437 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,443 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
438 (__v8hi)_mm_mullo_epi16(__A, __B),444 (__v8hi)_mm_mullo_epi16(__A, __B),
439 (__v8hi)__W);445 (__v8hi)__W);
440}446}
441447
442static __inline__ __m128i __DEFAULT_FN_ATTRS128448static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
443_mm_maskz_mullo_epi16(__mmask8 __U, __m128i __A, __m128i __B) {449_mm_maskz_mullo_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
444 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,450 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
445 (__v8hi)_mm_mullo_epi16(__A, __B),451 (__v8hi)_mm_mullo_epi16(__A, __B),
446 (__v8hi)_mm_setzero_si128());452 (__v8hi)_mm_setzero_si128());
447}453}
448454
449static __inline__ __m128i __DEFAULT_FN_ATTRS128455static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
450_mm_mask_blend_epi8 (__mmask16 __U, __m128i __A, __m128i __W)456_mm_mask_blend_epi8(__mmask16 __U, __m128i __A, __m128i __W) {
451{
452 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,457 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,
453 (__v16qi) __W,458 (__v16qi) __W,
454 (__v16qi) __A);459 (__v16qi) __A);
455}460}
456461
457static __inline__ __m256i __DEFAULT_FN_ATTRS256462static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
458_mm256_mask_blend_epi8 (__mmask32 __U, __m256i __A, __m256i __W)463_mm256_mask_blend_epi8(__mmask32 __U, __m256i __A, __m256i __W) {
459{
460 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,464 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,
461 (__v32qi) __W,465 (__v32qi) __W,
462 (__v32qi) __A);466 (__v32qi) __A);
463}467}
464468
465static __inline__ __m128i __DEFAULT_FN_ATTRS128469static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
466_mm_mask_blend_epi16 (__mmask8 __U, __m128i __A, __m128i __W)470_mm_mask_blend_epi16(__mmask8 __U, __m128i __A, __m128i __W) {
467{
468 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,471 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,
469 (__v8hi) __W,472 (__v8hi) __W,
470 (__v8hi) __A);473 (__v8hi) __A);
471}474}
472475
473static __inline__ __m256i __DEFAULT_FN_ATTRS256476static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
474_mm256_mask_blend_epi16 (__mmask16 __U, __m256i __A, __m256i __W)477_mm256_mask_blend_epi16(__mmask16 __U, __m256i __A, __m256i __W) {
475{
476 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,478 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,
477 (__v16hi) __W,479 (__v16hi) __W,
478 (__v16hi) __A);480 (__v16hi) __A);
479}481}
480482
481static __inline__ __m128i __DEFAULT_FN_ATTRS128483static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
482_mm_mask_abs_epi8(__m128i __W, __mmask16 __U, __m128i __A)484_mm_mask_abs_epi8(__m128i __W, __mmask16 __U, __m128i __A) {
483{
484 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,485 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
485 (__v16qi)_mm_abs_epi8(__A),486 (__v16qi)_mm_abs_epi8(__A),
486 (__v16qi)__W);487 (__v16qi)__W);
487}488}
488489
489static __inline__ __m128i __DEFAULT_FN_ATTRS128490static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
490_mm_maskz_abs_epi8(__mmask16 __U, __m128i __A)491_mm_maskz_abs_epi8(__mmask16 __U, __m128i __A) {
491{
492 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,492 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
493 (__v16qi)_mm_abs_epi8(__A),493 (__v16qi)_mm_abs_epi8(__A),
494 (__v16qi)_mm_setzero_si128());494 (__v16qi)_mm_setzero_si128());
495}495}
496496
497static __inline__ __m256i __DEFAULT_FN_ATTRS256497static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
498_mm256_mask_abs_epi8(__m256i __W, __mmask32 __U, __m256i __A)498_mm256_mask_abs_epi8(__m256i __W, __mmask32 __U, __m256i __A) {
499{
500 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,499 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
501 (__v32qi)_mm256_abs_epi8(__A),500 (__v32qi)_mm256_abs_epi8(__A),
502 (__v32qi)__W);501 (__v32qi)__W);
503}502}
504503
505static __inline__ __m256i __DEFAULT_FN_ATTRS256504static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
506_mm256_maskz_abs_epi8 (__mmask32 __U, __m256i __A)505_mm256_maskz_abs_epi8(__mmask32 __U, __m256i __A) {
507{
508 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,506 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
509 (__v32qi)_mm256_abs_epi8(__A),507 (__v32qi)_mm256_abs_epi8(__A),
510 (__v32qi)_mm256_setzero_si256());508 (__v32qi)_mm256_setzero_si256());
511}509}
512510
513static __inline__ __m128i __DEFAULT_FN_ATTRS128511static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
514_mm_mask_abs_epi16(__m128i __W, __mmask8 __U, __m128i __A)512_mm_mask_abs_epi16(__m128i __W, __mmask8 __U, __m128i __A) {
515{
516 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,513 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
517 (__v8hi)_mm_abs_epi16(__A),514 (__v8hi)_mm_abs_epi16(__A),
518 (__v8hi)__W);515 (__v8hi)__W);
519}516}
520517
521static __inline__ __m128i __DEFAULT_FN_ATTRS128518static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
522_mm_maskz_abs_epi16(__mmask8 __U, __m128i __A)519_mm_maskz_abs_epi16(__mmask8 __U, __m128i __A) {
523{
524 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,520 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
525 (__v8hi)_mm_abs_epi16(__A),521 (__v8hi)_mm_abs_epi16(__A),
526 (__v8hi)_mm_setzero_si128());522 (__v8hi)_mm_setzero_si128());
527}523}
528524
529static __inline__ __m256i __DEFAULT_FN_ATTRS256525static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
530_mm256_mask_abs_epi16(__m256i __W, __mmask16 __U, __m256i __A)526_mm256_mask_abs_epi16(__m256i __W, __mmask16 __U, __m256i __A) {
531{
532 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,527 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
533 (__v16hi)_mm256_abs_epi16(__A),528 (__v16hi)_mm256_abs_epi16(__A),
534 (__v16hi)__W);529 (__v16hi)__W);
535}530}
536531
537static __inline__ __m256i __DEFAULT_FN_ATTRS256532static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
538_mm256_maskz_abs_epi16(__mmask16 __U, __m256i __A)533_mm256_maskz_abs_epi16(__mmask16 __U, __m256i __A) {
539{
540 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,534 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
541 (__v16hi)_mm256_abs_epi16(__A),535 (__v16hi)_mm256_abs_epi16(__A),
542 (__v16hi)_mm256_setzero_si256());536 (__v16hi)_mm256_setzero_si256());
543}537}
544538
545static __inline__ __m128i __DEFAULT_FN_ATTRS128539static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
546_mm_maskz_packs_epi32(__mmask8 __M, __m128i __A, __m128i __B) {540_mm_maskz_packs_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
547 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,541 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
548 (__v8hi)_mm_packs_epi32(__A, __B),542 (__v8hi)_mm_packs_epi32(__A, __B),
549 (__v8hi)_mm_setzero_si128());543 (__v8hi)_mm_setzero_si128());
550}544}
551545
552static __inline__ __m128i __DEFAULT_FN_ATTRS128546static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
553_mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)547_mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
554{548{
555 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,549 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
...@@ -557,7 +551,7 @@ _mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)...@@ -557,7 +551,7 @@ _mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
557 (__v8hi)__W);551 (__v8hi)__W);
558}552}
559553
560static __inline__ __m256i __DEFAULT_FN_ATTRS256554static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
561_mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B)555_mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B)
562{556{
563 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,557 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
...@@ -565,7 +559,7 @@ _mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B)...@@ -565,7 +559,7 @@ _mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B)
565 (__v16hi)_mm256_setzero_si256());559 (__v16hi)_mm256_setzero_si256());
566}560}
567561
568static __inline__ __m256i __DEFAULT_FN_ATTRS256562static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
569_mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)563_mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)
570{564{
571 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,565 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
...@@ -573,7 +567,7 @@ _mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)...@@ -573,7 +567,7 @@ _mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)
573 (__v16hi)__W);567 (__v16hi)__W);
574}568}
575569
576static __inline__ __m128i __DEFAULT_FN_ATTRS128570static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
577_mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B)571_mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B)
578{572{
579 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,573 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
...@@ -581,7 +575,7 @@ _mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B)...@@ -581,7 +575,7 @@ _mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B)
581 (__v16qi)_mm_setzero_si128());575 (__v16qi)_mm_setzero_si128());
582}576}
583577
584static __inline__ __m128i __DEFAULT_FN_ATTRS128578static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
585_mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)579_mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)
586{580{
587 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,581 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
...@@ -589,7 +583,7 @@ _mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)...@@ -589,7 +583,7 @@ _mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)
589 (__v16qi)__W);583 (__v16qi)__W);
590}584}
591585
592static __inline__ __m256i __DEFAULT_FN_ATTRS256586static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
593_mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B)587_mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B)
594{588{
595 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,589 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
...@@ -597,7 +591,7 @@ _mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B)...@@ -597,7 +591,7 @@ _mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B)
597 (__v32qi)_mm256_setzero_si256());591 (__v32qi)_mm256_setzero_si256());
598}592}
599593
600static __inline__ __m256i __DEFAULT_FN_ATTRS256594static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
601_mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)595_mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)
602{596{
603 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,597 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
...@@ -605,7 +599,7 @@ _mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)...@@ -605,7 +599,7 @@ _mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)
605 (__v32qi)__W);599 (__v32qi)__W);
606}600}
607601
608static __inline__ __m128i __DEFAULT_FN_ATTRS128602static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
609_mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B)603_mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B)
610{604{
611 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,605 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
...@@ -613,7 +607,7 @@ _mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B)...@@ -613,7 +607,7 @@ _mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B)
613 (__v8hi)_mm_setzero_si128());607 (__v8hi)_mm_setzero_si128());
614}608}
615609
616static __inline__ __m128i __DEFAULT_FN_ATTRS128610static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
617_mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)611_mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
618{612{
619 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,613 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
...@@ -621,7 +615,7 @@ _mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)...@@ -621,7 +615,7 @@ _mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
621 (__v8hi)__W);615 (__v8hi)__W);
622}616}
623617
624static __inline__ __m256i __DEFAULT_FN_ATTRS256618static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
625_mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B)619_mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B)
626{620{
627 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,621 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
...@@ -629,7 +623,7 @@ _mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B)...@@ -629,7 +623,7 @@ _mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B)
629 (__v16hi)_mm256_setzero_si256());623 (__v16hi)_mm256_setzero_si256());
630}624}
631625
632static __inline__ __m256i __DEFAULT_FN_ATTRS256626static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
633_mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)627_mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)
634{628{
635 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,629 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
...@@ -637,7 +631,7 @@ _mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)...@@ -637,7 +631,7 @@ _mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)
637 (__v16hi)__W);631 (__v16hi)__W);
638}632}
639633
640static __inline__ __m128i __DEFAULT_FN_ATTRS128634static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
641_mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B)635_mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B)
642{636{
643 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,637 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
...@@ -645,7 +639,7 @@ _mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B)...@@ -645,7 +639,7 @@ _mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B)
645 (__v16qi)_mm_setzero_si128());639 (__v16qi)_mm_setzero_si128());
646}640}
647641
648static __inline__ __m128i __DEFAULT_FN_ATTRS128642static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
649_mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)643_mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)
650{644{
651 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,645 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
...@@ -653,7 +647,7 @@ _mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)...@@ -653,7 +647,7 @@ _mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)
653 (__v16qi)__W);647 (__v16qi)__W);
654}648}
655649
656static __inline__ __m256i __DEFAULT_FN_ATTRS256650static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
657_mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B)651_mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B)
658{652{
659 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,653 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
...@@ -661,7 +655,7 @@ _mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B)...@@ -661,7 +655,7 @@ _mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B)
661 (__v32qi)_mm256_setzero_si256());655 (__v32qi)_mm256_setzero_si256());
662}656}
663657
664static __inline__ __m256i __DEFAULT_FN_ATTRS256658static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
665_mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)659_mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)
666{660{
667 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,661 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
...@@ -669,7 +663,7 @@ _mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)...@@ -669,7 +663,7 @@ _mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)
669 (__v32qi)__W);663 (__v32qi)__W);
670}664}
671665
672static __inline__ __m128i __DEFAULT_FN_ATTRS128666static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
673_mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)667_mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
674{668{
675 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,669 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
...@@ -677,7 +671,7 @@ _mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)...@@ -677,7 +671,7 @@ _mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
677 (__v16qi)__W);671 (__v16qi)__W);
678}672}
679673
680static __inline__ __m128i __DEFAULT_FN_ATTRS128674static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
681_mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B)675_mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B)
682{676{
683 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,677 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
...@@ -685,7 +679,7 @@ _mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B)...@@ -685,7 +679,7 @@ _mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B)
685 (__v16qi)_mm_setzero_si128());679 (__v16qi)_mm_setzero_si128());
686}680}
687681
688static __inline__ __m256i __DEFAULT_FN_ATTRS256682static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
689_mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)683_mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
690{684{
691 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,685 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
...@@ -693,7 +687,7 @@ _mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)...@@ -693,7 +687,7 @@ _mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
693 (__v32qi)__W);687 (__v32qi)__W);
694}688}
695689
696static __inline__ __m256i __DEFAULT_FN_ATTRS256690static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
697_mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B)691_mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B)
698{692{
699 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,693 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
...@@ -701,7 +695,7 @@ _mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B)...@@ -701,7 +695,7 @@ _mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B)
701 (__v32qi)_mm256_setzero_si256());695 (__v32qi)_mm256_setzero_si256());
702}696}
703697
704static __inline__ __m128i __DEFAULT_FN_ATTRS128698static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
705_mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)699_mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
706{700{
707 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,701 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -709,7 +703,7 @@ _mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -709,7 +703,7 @@ _mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
709 (__v8hi)__W);703 (__v8hi)__W);
710}704}
711705
712static __inline__ __m128i __DEFAULT_FN_ATTRS128706static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
713_mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B)707_mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B)
714{708{
715 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,709 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -717,7 +711,7 @@ _mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B)...@@ -717,7 +711,7 @@ _mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B)
717 (__v8hi)_mm_setzero_si128());711 (__v8hi)_mm_setzero_si128());
718}712}
719713
720static __inline__ __m256i __DEFAULT_FN_ATTRS256714static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
721_mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)715_mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
722{716{
723 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,717 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -725,7 +719,7 @@ _mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)...@@ -725,7 +719,7 @@ _mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
725 (__v16hi)__W);719 (__v16hi)__W);
726}720}
727721
728static __inline__ __m256i __DEFAULT_FN_ATTRS256722static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
729_mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B)723_mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B)
730{724{
731 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,725 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -733,7 +727,7 @@ _mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B)...@@ -733,7 +727,7 @@ _mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B)
733 (__v16hi)_mm256_setzero_si256());727 (__v16hi)_mm256_setzero_si256());
734}728}
735729
736static __inline__ __m128i __DEFAULT_FN_ATTRS128730static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
737_mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)731_mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
738{732{
739 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,733 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
...@@ -741,7 +735,7 @@ _mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)...@@ -741,7 +735,7 @@ _mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
741 (__v16qi)__W);735 (__v16qi)__W);
742}736}
743737
744static __inline__ __m128i __DEFAULT_FN_ATTRS128738static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
745_mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B)739_mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B)
746{740{
747 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,741 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
...@@ -749,7 +743,7 @@ _mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B)...@@ -749,7 +743,7 @@ _mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B)
749 (__v16qi)_mm_setzero_si128());743 (__v16qi)_mm_setzero_si128());
750}744}
751745
752static __inline__ __m256i __DEFAULT_FN_ATTRS256746static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
753_mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)747_mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
754{748{
755 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,749 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
...@@ -757,7 +751,7 @@ _mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)...@@ -757,7 +751,7 @@ _mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
757 (__v32qi)__W);751 (__v32qi)__W);
758}752}
759753
760static __inline__ __m256i __DEFAULT_FN_ATTRS256754static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
761_mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B)755_mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B)
762{756{
763 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,757 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
...@@ -765,7 +759,7 @@ _mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B)...@@ -765,7 +759,7 @@ _mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B)
765 (__v32qi)_mm256_setzero_si256());759 (__v32qi)_mm256_setzero_si256());
766}760}
767761
768static __inline__ __m128i __DEFAULT_FN_ATTRS128762static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
769_mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)763_mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
770{764{
771 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,765 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -773,7 +767,7 @@ _mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -773,7 +767,7 @@ _mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
773 (__v8hi)__W);767 (__v8hi)__W);
774}768}
775769
776static __inline__ __m128i __DEFAULT_FN_ATTRS128770static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
777_mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B)771_mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B)
778{772{
779 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,773 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -781,7 +775,7 @@ _mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B)...@@ -781,7 +775,7 @@ _mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B)
781 (__v8hi)_mm_setzero_si128());775 (__v8hi)_mm_setzero_si128());
782}776}
783777
784static __inline__ __m256i __DEFAULT_FN_ATTRS256778static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
785_mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)779_mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
786{780{
787 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,781 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -789,7 +783,7 @@ _mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)...@@ -789,7 +783,7 @@ _mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
789 (__v16hi)__W);783 (__v16hi)__W);
790}784}
791785
792static __inline__ __m256i __DEFAULT_FN_ATTRS256786static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
793_mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B)787_mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B)
794{788{
795 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,789 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -797,359 +791,311 @@ _mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B)...@@ -797,359 +791,311 @@ _mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B)
797 (__v16hi)_mm256_setzero_si256());791 (__v16hi)_mm256_setzero_si256());
798}792}
799793
800static __inline__ __m128i __DEFAULT_FN_ATTRS128794static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
801_mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)795_mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
802{796 return (__m128i)__builtin_ia32_selectb_128(
803 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,797 (__mmask16)__U, (__v16qi)_mm_avg_epu8(__A, __B), (__v16qi)__W);
804 (__v16qi)_mm_avg_epu8(__A, __B),
805 (__v16qi)__W);
806}798}
807799
808static __inline__ __m128i __DEFAULT_FN_ATTRS128800static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
809_mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B)801_mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B) {
810{
811 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,802 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
812 (__v16qi)_mm_avg_epu8(__A, __B),803 (__v16qi)_mm_avg_epu8(__A, __B),
813 (__v16qi)_mm_setzero_si128());804 (__v16qi)_mm_setzero_si128());
814}805}
815806
816static __inline__ __m256i __DEFAULT_FN_ATTRS256807static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
817_mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)808_mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
818{809 return (__m256i)__builtin_ia32_selectb_256(
819 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,810 (__mmask32)__U, (__v32qi)_mm256_avg_epu8(__A, __B), (__v32qi)__W);
820 (__v32qi)_mm256_avg_epu8(__A, __B),
821 (__v32qi)__W);
822}811}
823812
824static __inline__ __m256i __DEFAULT_FN_ATTRS256813static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
825_mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B)814_mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B) {
826{
827 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,815 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
828 (__v32qi)_mm256_avg_epu8(__A, __B),816 (__v32qi)_mm256_avg_epu8(__A, __B),
829 (__v32qi)_mm256_setzero_si256());817 (__v32qi)_mm256_setzero_si256());
830}818}
831819
832static __inline__ __m128i __DEFAULT_FN_ATTRS128820static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
833_mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)821_mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
834{822 return (__m128i)__builtin_ia32_selectw_128(
835 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,823 (__mmask8)__U, (__v8hi)_mm_avg_epu16(__A, __B), (__v8hi)__W);
836 (__v8hi)_mm_avg_epu16(__A, __B),
837 (__v8hi)__W);
838}824}
839825
840static __inline__ __m128i __DEFAULT_FN_ATTRS128826static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
841_mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B)827_mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B) {
842{
843 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,828 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
844 (__v8hi)_mm_avg_epu16(__A, __B),829 (__v8hi)_mm_avg_epu16(__A, __B),
845 (__v8hi)_mm_setzero_si128());830 (__v8hi)_mm_setzero_si128());
846}831}
847832
848static __inline__ __m256i __DEFAULT_FN_ATTRS256833static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
849_mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)834_mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
850{835 return (__m256i)__builtin_ia32_selectw_256(
851 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,836 (__mmask16)__U, (__v16hi)_mm256_avg_epu16(__A, __B), (__v16hi)__W);
852 (__v16hi)_mm256_avg_epu16(__A, __B),
853 (__v16hi)__W);
854}837}
855838
856static __inline__ __m256i __DEFAULT_FN_ATTRS256839static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
857_mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B)840_mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B) {
858{841 return (__m256i)__builtin_ia32_selectw_256(
859 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,842 (__mmask16)__U, (__v16hi)_mm256_avg_epu16(__A, __B),
860 (__v16hi)_mm256_avg_epu16(__A, __B),843 (__v16hi)_mm256_setzero_si256());
861 (__v16hi)_mm256_setzero_si256());
862}844}
863845
864static __inline__ __m128i __DEFAULT_FN_ATTRS128846static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
865_mm_maskz_max_epi8(__mmask16 __M, __m128i __A, __m128i __B)847_mm_maskz_max_epi8(__mmask16 __M, __m128i __A, __m128i __B) {
866{
867 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,848 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
868 (__v16qi)_mm_max_epi8(__A, __B),849 (__v16qi)_mm_max_epi8(__A, __B),
869 (__v16qi)_mm_setzero_si128());850 (__v16qi)_mm_setzero_si128());
870}851}
871852
872static __inline__ __m128i __DEFAULT_FN_ATTRS128853static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
873_mm_mask_max_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)854_mm_mask_max_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
874{
875 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,855 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
876 (__v16qi)_mm_max_epi8(__A, __B),856 (__v16qi)_mm_max_epi8(__A, __B),
877 (__v16qi)__W);857 (__v16qi)__W);
878}858}
879859
880static __inline__ __m256i __DEFAULT_FN_ATTRS256860static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
881_mm256_maskz_max_epi8(__mmask32 __M, __m256i __A, __m256i __B)861_mm256_maskz_max_epi8(__mmask32 __M, __m256i __A, __m256i __B) {
882{
883 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,862 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
884 (__v32qi)_mm256_max_epi8(__A, __B),863 (__v32qi)_mm256_max_epi8(__A, __B),
885 (__v32qi)_mm256_setzero_si256());864 (__v32qi)_mm256_setzero_si256());
886}865}
887866
888static __inline__ __m256i __DEFAULT_FN_ATTRS256867static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
889_mm256_mask_max_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)868_mm256_mask_max_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
890{
891 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,869 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
892 (__v32qi)_mm256_max_epi8(__A, __B),870 (__v32qi)_mm256_max_epi8(__A, __B),
893 (__v32qi)__W);871 (__v32qi)__W);
894}872}
895873
896static __inline__ __m128i __DEFAULT_FN_ATTRS128874static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
897_mm_maskz_max_epi16(__mmask8 __M, __m128i __A, __m128i __B)875_mm_maskz_max_epi16(__mmask8 __M, __m128i __A, __m128i __B) {
898{
899 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,876 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
900 (__v8hi)_mm_max_epi16(__A, __B),877 (__v8hi)_mm_max_epi16(__A, __B),
901 (__v8hi)_mm_setzero_si128());878 (__v8hi)_mm_setzero_si128());
902}879}
903880
904static __inline__ __m128i __DEFAULT_FN_ATTRS128881static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
905_mm_mask_max_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)882_mm_mask_max_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
906{
907 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,883 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
908 (__v8hi)_mm_max_epi16(__A, __B),884 (__v8hi)_mm_max_epi16(__A, __B),
909 (__v8hi)__W);885 (__v8hi)__W);
910}886}
911887
912static __inline__ __m256i __DEFAULT_FN_ATTRS256888static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
913_mm256_maskz_max_epi16(__mmask16 __M, __m256i __A, __m256i __B)889_mm256_maskz_max_epi16(__mmask16 __M, __m256i __A, __m256i __B) {
914{
915 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,890 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
916 (__v16hi)_mm256_max_epi16(__A, __B),891 (__v16hi)_mm256_max_epi16(__A, __B),
917 (__v16hi)_mm256_setzero_si256());892 (__v16hi)_mm256_setzero_si256());
918}893}
919894
920static __inline__ __m256i __DEFAULT_FN_ATTRS256895static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
921_mm256_mask_max_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)896_mm256_mask_max_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {
922{
923 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,897 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
924 (__v16hi)_mm256_max_epi16(__A, __B),898 (__v16hi)_mm256_max_epi16(__A, __B),
925 (__v16hi)__W);899 (__v16hi)__W);
926}900}
927901
928static __inline__ __m128i __DEFAULT_FN_ATTRS128902static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
929_mm_maskz_max_epu8(__mmask16 __M, __m128i __A, __m128i __B)903_mm_maskz_max_epu8(__mmask16 __M, __m128i __A, __m128i __B) {
930{
931 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,904 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
932 (__v16qi)_mm_max_epu8(__A, __B),905 (__v16qi)_mm_max_epu8(__A, __B),
933 (__v16qi)_mm_setzero_si128());906 (__v16qi)_mm_setzero_si128());
934}907}
935908
936static __inline__ __m128i __DEFAULT_FN_ATTRS128909static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
937_mm_mask_max_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)910_mm_mask_max_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
938{
939 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,911 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
940 (__v16qi)_mm_max_epu8(__A, __B),912 (__v16qi)_mm_max_epu8(__A, __B),
941 (__v16qi)__W);913 (__v16qi)__W);
942}914}
943915
944static __inline__ __m256i __DEFAULT_FN_ATTRS256916static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
945_mm256_maskz_max_epu8 (__mmask32 __M, __m256i __A, __m256i __B)917_mm256_maskz_max_epu8(__mmask32 __M, __m256i __A, __m256i __B) {
946{
947 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,918 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
948 (__v32qi)_mm256_max_epu8(__A, __B),919 (__v32qi)_mm256_max_epu8(__A, __B),
949 (__v32qi)_mm256_setzero_si256());920 (__v32qi)_mm256_setzero_si256());
950}921}
951922
952static __inline__ __m256i __DEFAULT_FN_ATTRS256923static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
953_mm256_mask_max_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)924_mm256_mask_max_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
954{
955 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,925 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
956 (__v32qi)_mm256_max_epu8(__A, __B),926 (__v32qi)_mm256_max_epu8(__A, __B),
957 (__v32qi)__W);927 (__v32qi)__W);
958}928}
959929
960static __inline__ __m128i __DEFAULT_FN_ATTRS128930static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
961_mm_maskz_max_epu16(__mmask8 __M, __m128i __A, __m128i __B)931_mm_maskz_max_epu16(__mmask8 __M, __m128i __A, __m128i __B) {
962{
963 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,932 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
964 (__v8hi)_mm_max_epu16(__A, __B),933 (__v8hi)_mm_max_epu16(__A, __B),
965 (__v8hi)_mm_setzero_si128());934 (__v8hi)_mm_setzero_si128());
966}935}
967936
968static __inline__ __m128i __DEFAULT_FN_ATTRS128937static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
969_mm_mask_max_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)938_mm_mask_max_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
970{
971 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,939 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
972 (__v8hi)_mm_max_epu16(__A, __B),940 (__v8hi)_mm_max_epu16(__A, __B),
973 (__v8hi)__W);941 (__v8hi)__W);
974}942}
975943
976static __inline__ __m256i __DEFAULT_FN_ATTRS256944static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
977_mm256_maskz_max_epu16(__mmask16 __M, __m256i __A, __m256i __B)945_mm256_maskz_max_epu16(__mmask16 __M, __m256i __A, __m256i __B) {
978{
979 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,946 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
980 (__v16hi)_mm256_max_epu16(__A, __B),947 (__v16hi)_mm256_max_epu16(__A, __B),
981 (__v16hi)_mm256_setzero_si256());948 (__v16hi)_mm256_setzero_si256());
982}949}
983950
984static __inline__ __m256i __DEFAULT_FN_ATTRS256951static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
985_mm256_mask_max_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)952_mm256_mask_max_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {
986{
987 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,953 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
988 (__v16hi)_mm256_max_epu16(__A, __B),954 (__v16hi)_mm256_max_epu16(__A, __B),
989 (__v16hi)__W);955 (__v16hi)__W);
990}956}
991957
992static __inline__ __m128i __DEFAULT_FN_ATTRS128958static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
993_mm_maskz_min_epi8(__mmask16 __M, __m128i __A, __m128i __B)959_mm_maskz_min_epi8(__mmask16 __M, __m128i __A, __m128i __B) {
994{
995 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,960 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
996 (__v16qi)_mm_min_epi8(__A, __B),961 (__v16qi)_mm_min_epi8(__A, __B),
997 (__v16qi)_mm_setzero_si128());962 (__v16qi)_mm_setzero_si128());
998}963}
999964
1000static __inline__ __m128i __DEFAULT_FN_ATTRS128965static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1001_mm_mask_min_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)966_mm_mask_min_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
1002{
1003 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,967 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1004 (__v16qi)_mm_min_epi8(__A, __B),968 (__v16qi)_mm_min_epi8(__A, __B),
1005 (__v16qi)__W);969 (__v16qi)__W);
1006}970}
1007971
1008static __inline__ __m256i __DEFAULT_FN_ATTRS256972static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1009_mm256_maskz_min_epi8(__mmask32 __M, __m256i __A, __m256i __B)973_mm256_maskz_min_epi8(__mmask32 __M, __m256i __A, __m256i __B) {
1010{
1011 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,974 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
1012 (__v32qi)_mm256_min_epi8(__A, __B),975 (__v32qi)_mm256_min_epi8(__A, __B),
1013 (__v32qi)_mm256_setzero_si256());976 (__v32qi)_mm256_setzero_si256());
1014}977}
1015978
1016static __inline__ __m256i __DEFAULT_FN_ATTRS256979static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1017_mm256_mask_min_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)980_mm256_mask_min_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
1018{
1019 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,981 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
1020 (__v32qi)_mm256_min_epi8(__A, __B),982 (__v32qi)_mm256_min_epi8(__A, __B),
1021 (__v32qi)__W);983 (__v32qi)__W);
1022}984}
1023985
1024static __inline__ __m128i __DEFAULT_FN_ATTRS128986static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1025_mm_maskz_min_epi16(__mmask8 __M, __m128i __A, __m128i __B)987_mm_maskz_min_epi16(__mmask8 __M, __m128i __A, __m128i __B) {
1026{
1027 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,988 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
1028 (__v8hi)_mm_min_epi16(__A, __B),989 (__v8hi)_mm_min_epi16(__A, __B),
1029 (__v8hi)_mm_setzero_si128());990 (__v8hi)_mm_setzero_si128());
1030}991}
1031992
1032static __inline__ __m128i __DEFAULT_FN_ATTRS128993static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1033_mm_mask_min_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)994_mm_mask_min_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
1034{
1035 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,995 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
1036 (__v8hi)_mm_min_epi16(__A, __B),996 (__v8hi)_mm_min_epi16(__A, __B),
1037 (__v8hi)__W);997 (__v8hi)__W);
1038}998}
1039999
1040static __inline__ __m256i __DEFAULT_FN_ATTRS2561000static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1041_mm256_maskz_min_epi16(__mmask16 __M, __m256i __A, __m256i __B)1001_mm256_maskz_min_epi16(__mmask16 __M, __m256i __A, __m256i __B) {
1042{
1043 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,1002 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
1044 (__v16hi)_mm256_min_epi16(__A, __B),1003 (__v16hi)_mm256_min_epi16(__A, __B),
1045 (__v16hi)_mm256_setzero_si256());1004 (__v16hi)_mm256_setzero_si256());
1046}1005}
10471006
1048static __inline__ __m256i __DEFAULT_FN_ATTRS2561007static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1049_mm256_mask_min_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)1008_mm256_mask_min_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {
1050{
1051 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,1009 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
1052 (__v16hi)_mm256_min_epi16(__A, __B),1010 (__v16hi)_mm256_min_epi16(__A, __B),
1053 (__v16hi)__W);1011 (__v16hi)__W);
1054}1012}
10551013
1056static __inline__ __m128i __DEFAULT_FN_ATTRS1281014static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1057_mm_maskz_min_epu8(__mmask16 __M, __m128i __A, __m128i __B)1015_mm_maskz_min_epu8(__mmask16 __M, __m128i __A, __m128i __B) {
1058{
1059 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,1016 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1060 (__v16qi)_mm_min_epu8(__A, __B),1017 (__v16qi)_mm_min_epu8(__A, __B),
1061 (__v16qi)_mm_setzero_si128());1018 (__v16qi)_mm_setzero_si128());
1062}1019}
10631020
1064static __inline__ __m128i __DEFAULT_FN_ATTRS1281021static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1065_mm_mask_min_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B)1022_mm_mask_min_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) {
1066{
1067 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,1023 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1068 (__v16qi)_mm_min_epu8(__A, __B),1024 (__v16qi)_mm_min_epu8(__A, __B),
1069 (__v16qi)__W);1025 (__v16qi)__W);
1070}1026}
10711027
1072static __inline__ __m256i __DEFAULT_FN_ATTRS2561028static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1073_mm256_maskz_min_epu8 (__mmask32 __M, __m256i __A, __m256i __B)1029_mm256_maskz_min_epu8(__mmask32 __M, __m256i __A, __m256i __B) {
1074{
1075 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,1030 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
1076 (__v32qi)_mm256_min_epu8(__A, __B),1031 (__v32qi)_mm256_min_epu8(__A, __B),
1077 (__v32qi)_mm256_setzero_si256());1032 (__v32qi)_mm256_setzero_si256());
1078}1033}
10791034
1080static __inline__ __m256i __DEFAULT_FN_ATTRS2561035static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1081_mm256_mask_min_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B)1036_mm256_mask_min_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) {
1082{
1083 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,1037 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M,
1084 (__v32qi)_mm256_min_epu8(__A, __B),1038 (__v32qi)_mm256_min_epu8(__A, __B),
1085 (__v32qi)__W);1039 (__v32qi)__W);
1086}1040}
10871041
1088static __inline__ __m128i __DEFAULT_FN_ATTRS1281042static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1089_mm_maskz_min_epu16(__mmask8 __M, __m128i __A, __m128i __B)1043_mm_maskz_min_epu16(__mmask8 __M, __m128i __A, __m128i __B) {
1090{
1091 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,1044 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
1092 (__v8hi)_mm_min_epu16(__A, __B),1045 (__v8hi)_mm_min_epu16(__A, __B),
1093 (__v8hi)_mm_setzero_si128());1046 (__v8hi)_mm_setzero_si128());
1094}1047}
10951048
1096static __inline__ __m128i __DEFAULT_FN_ATTRS1281049static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1097_mm_mask_min_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)1050_mm_mask_min_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
1098{
1099 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,1051 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
1100 (__v8hi)_mm_min_epu16(__A, __B),1052 (__v8hi)_mm_min_epu16(__A, __B),
1101 (__v8hi)__W);1053 (__v8hi)__W);
1102}1054}
11031055
1104static __inline__ __m256i __DEFAULT_FN_ATTRS2561056static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1105_mm256_maskz_min_epu16(__mmask16 __M, __m256i __A, __m256i __B)1057_mm256_maskz_min_epu16(__mmask16 __M, __m256i __A, __m256i __B) {
1106{
1107 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,1058 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
1108 (__v16hi)_mm256_min_epu16(__A, __B),1059 (__v16hi)_mm256_min_epu16(__A, __B),
1109 (__v16hi)_mm256_setzero_si256());1060 (__v16hi)_mm256_setzero_si256());
1110}1061}
11111062
1112static __inline__ __m256i __DEFAULT_FN_ATTRS2561063static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1113_mm256_mask_min_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B)1064_mm256_mask_min_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) {
1114{
1115 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,1065 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
1116 (__v16hi)_mm256_min_epu16(__A, __B),1066 (__v16hi)_mm256_min_epu16(__A, __B),
1117 (__v16hi)__W);1067 (__v16hi)__W);
1118}1068}
11191069
1120static __inline__ __m128i __DEFAULT_FN_ATTRS1281070static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1121_mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)1071_mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
1122{
1123 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1072 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1124 (__v16qi)_mm_shuffle_epi8(__A, __B),1073 (__v16qi)_mm_shuffle_epi8(__A, __B),
1125 (__v16qi)__W);1074 (__v16qi)__W);
1126}1075}
11271076
1128static __inline__ __m128i __DEFAULT_FN_ATTRS1281077static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1129_mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B)1078_mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
1130{
1131 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1079 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1132 (__v16qi)_mm_shuffle_epi8(__A, __B),1080 (__v16qi)_mm_shuffle_epi8(__A, __B),
1133 (__v16qi)_mm_setzero_si128());1081 (__v16qi)_mm_setzero_si128());
1134}1082}
11351083
1136static __inline__ __m256i __DEFAULT_FN_ATTRS2561084static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1137_mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)1085_mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
1138{
1139 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1086 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1140 (__v32qi)_mm256_shuffle_epi8(__A, __B),1087 (__v32qi)_mm256_shuffle_epi8(__A, __B),
1141 (__v32qi)__W);1088 (__v32qi)__W);
1142}1089}
11431090
1144static __inline__ __m256i __DEFAULT_FN_ATTRS2561091static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1145_mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B)1092_mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
1146{
1147 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1093 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1148 (__v32qi)_mm256_shuffle_epi8(__A, __B),1094 (__v32qi)_mm256_shuffle_epi8(__A, __B),
1149 (__v32qi)_mm256_setzero_si256());1095 (__v32qi)_mm256_setzero_si256());
1150}1096}
11511097
1152static __inline__ __m128i __DEFAULT_FN_ATTRS1281098static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1153_mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)1099_mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
1154{1100{
1155 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1101 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
...@@ -1157,7 +1103,7 @@ _mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)...@@ -1157,7 +1103,7 @@ _mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
1157 (__v16qi)__W);1103 (__v16qi)__W);
1158}1104}
11591105
1160static __inline__ __m128i __DEFAULT_FN_ATTRS1281106static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1161_mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B)1107_mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B)
1162{1108{
1163 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1109 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
...@@ -1165,7 +1111,7 @@ _mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B)...@@ -1165,7 +1111,7 @@ _mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B)
1165 (__v16qi)_mm_setzero_si128());1111 (__v16qi)_mm_setzero_si128());
1166}1112}
11671113
1168static __inline__ __m256i __DEFAULT_FN_ATTRS2561114static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1169_mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)1115_mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
1170{1116{
1171 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1117 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
...@@ -1173,7 +1119,7 @@ _mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)...@@ -1173,7 +1119,7 @@ _mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
1173 (__v32qi)__W);1119 (__v32qi)__W);
1174}1120}
11751121
1176static __inline__ __m256i __DEFAULT_FN_ATTRS2561122static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1177_mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B)1123_mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B)
1178{1124{
1179 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1125 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
...@@ -1181,7 +1127,7 @@ _mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B)...@@ -1181,7 +1127,7 @@ _mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B)
1181 (__v32qi)_mm256_setzero_si256());1127 (__v32qi)_mm256_setzero_si256());
1182}1128}
11831129
1184static __inline__ __m128i __DEFAULT_FN_ATTRS1281130static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1185_mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1131_mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1186{1132{
1187 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1133 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1189,7 +1135,7 @@ _mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -1189,7 +1135,7 @@ _mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1189 (__v8hi)__W);1135 (__v8hi)__W);
1190}1136}
11911137
1192static __inline__ __m128i __DEFAULT_FN_ATTRS1281138static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1193_mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B)1139_mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B)
1194{1140{
1195 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1141 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1197,7 +1143,7 @@ _mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B)...@@ -1197,7 +1143,7 @@ _mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B)
1197 (__v8hi)_mm_setzero_si128());1143 (__v8hi)_mm_setzero_si128());
1198}1144}
11991145
1200static __inline__ __m256i __DEFAULT_FN_ATTRS2561146static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1201_mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)1147_mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1202{1148{
1203 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1149 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1205,7 +1151,7 @@ _mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)...@@ -1205,7 +1151,7 @@ _mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1205 (__v16hi)__W);1151 (__v16hi)__W);
1206}1152}
12071153
1208static __inline__ __m256i __DEFAULT_FN_ATTRS2561154static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1209_mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B)1155_mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1210{1156{
1211 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1157 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1213,7 +1159,7 @@ _mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B)...@@ -1213,7 +1159,7 @@ _mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1213 (__v16hi)_mm256_setzero_si256());1159 (__v16hi)_mm256_setzero_si256());
1214}1160}
12151161
1216static __inline__ __m128i __DEFAULT_FN_ATTRS1281162static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1217_mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)1163_mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
1218{1164{
1219 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1165 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
...@@ -1221,7 +1167,7 @@ _mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)...@@ -1221,7 +1167,7 @@ _mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
1221 (__v16qi)__W);1167 (__v16qi)__W);
1222}1168}
12231169
1224static __inline__ __m128i __DEFAULT_FN_ATTRS1281170static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1225_mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B)1171_mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B)
1226{1172{
1227 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1173 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
...@@ -1229,7 +1175,7 @@ _mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B)...@@ -1229,7 +1175,7 @@ _mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B)
1229 (__v16qi)_mm_setzero_si128());1175 (__v16qi)_mm_setzero_si128());
1230}1176}
12311177
1232static __inline__ __m256i __DEFAULT_FN_ATTRS2561178static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1233_mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)1179_mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
1234{1180{
1235 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1181 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
...@@ -1237,7 +1183,7 @@ _mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)...@@ -1237,7 +1183,7 @@ _mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
1237 (__v32qi)__W);1183 (__v32qi)__W);
1238}1184}
12391185
1240static __inline__ __m256i __DEFAULT_FN_ATTRS2561186static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1241_mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B)1187_mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B)
1242{1188{
1243 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1189 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
...@@ -1245,7 +1191,7 @@ _mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B)...@@ -1245,7 +1191,7 @@ _mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B)
1245 (__v32qi)_mm256_setzero_si256());1191 (__v32qi)_mm256_setzero_si256());
1246}1192}
12471193
1248static __inline__ __m128i __DEFAULT_FN_ATTRS1281194static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1249_mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1195_mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1250{1196{
1251 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1197 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1253,7 +1199,7 @@ _mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -1253,7 +1199,7 @@ _mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1253 (__v8hi)__W);1199 (__v8hi)__W);
1254}1200}
12551201
1256static __inline__ __m128i __DEFAULT_FN_ATTRS1281202static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1257_mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B)1203_mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B)
1258{1204{
1259 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1205 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1261,7 +1207,7 @@ _mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B)...@@ -1261,7 +1207,7 @@ _mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B)
1261 (__v8hi)_mm_setzero_si128());1207 (__v8hi)_mm_setzero_si128());
1262}1208}
12631209
1264static __inline__ __m256i __DEFAULT_FN_ATTRS2561210static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1265_mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A,1211_mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A,
1266 __m256i __B) {1212 __m256i __B) {
1267 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1213 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1269,7 +1215,7 @@ _mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A,...@@ -1269,7 +1215,7 @@ _mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A,
1269 (__v16hi)__W);1215 (__v16hi)__W);
1270}1216}
12711217
1272static __inline__ __m256i __DEFAULT_FN_ATTRS2561218static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1273_mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B)1219_mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B)
1274{1220{
1275 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1221 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1277,89 +1223,81 @@ _mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B)...@@ -1277,89 +1223,81 @@ _mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B)
1277 (__v16hi)_mm256_setzero_si256());1223 (__v16hi)_mm256_setzero_si256());
1278}1224}
12791225
1280static __inline__ __m128i __DEFAULT_FN_ATTRS1281226static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1281_mm_permutex2var_epi16(__m128i __A, __m128i __I, __m128i __B)1227_mm_permutex2var_epi16(__m128i __A, __m128i __I, __m128i __B) {
1282{
1283 return (__m128i)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I,1228 return (__m128i)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I,
1284 (__v8hi) __B);1229 (__v8hi) __B);
1285}1230}
12861231
1287static __inline__ __m128i __DEFAULT_FN_ATTRS1281232static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1288_mm_mask_permutex2var_epi16(__m128i __A, __mmask8 __U, __m128i __I,1233_mm_mask_permutex2var_epi16(__m128i __A, __mmask8 __U, __m128i __I,
1289 __m128i __B)1234 __m128i __B) {
1290{
1291 return (__m128i)__builtin_ia32_selectw_128(__U,1235 return (__m128i)__builtin_ia32_selectw_128(__U,
1292 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),1236 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),
1293 (__v8hi)__A);1237 (__v8hi)__A);
1294}1238}
12951239
1296static __inline__ __m128i __DEFAULT_FN_ATTRS1281240static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1297_mm_mask2_permutex2var_epi16(__m128i __A, __m128i __I, __mmask8 __U,1241_mm_mask2_permutex2var_epi16(__m128i __A, __m128i __I, __mmask8 __U,
1298 __m128i __B)1242 __m128i __B) {
1299{
1300 return (__m128i)__builtin_ia32_selectw_128(__U,1243 return (__m128i)__builtin_ia32_selectw_128(__U,
1301 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),1244 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),
1302 (__v8hi)__I);1245 (__v8hi)__I);
1303}1246}
13041247
1305static __inline__ __m128i __DEFAULT_FN_ATTRS1281248static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1306_mm_maskz_permutex2var_epi16 (__mmask8 __U, __m128i __A, __m128i __I,1249_mm_maskz_permutex2var_epi16(__mmask8 __U, __m128i __A, __m128i __I,
1307 __m128i __B)1250 __m128i __B) {
1308{
1309 return (__m128i)__builtin_ia32_selectw_128(__U,1251 return (__m128i)__builtin_ia32_selectw_128(__U,
1310 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),1252 (__v8hi)_mm_permutex2var_epi16(__A, __I, __B),
1311 (__v8hi)_mm_setzero_si128());1253 (__v8hi)_mm_setzero_si128());
1312}1254}
13131255
1314static __inline__ __m256i __DEFAULT_FN_ATTRS2561256static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1315_mm256_permutex2var_epi16(__m256i __A, __m256i __I, __m256i __B)1257_mm256_permutex2var_epi16(__m256i __A, __m256i __I, __m256i __B) {
1316{
1317 return (__m256i)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I,1258 return (__m256i)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I,
1318 (__v16hi)__B);1259 (__v16hi)__B);
1319}1260}
13201261
1321static __inline__ __m256i __DEFAULT_FN_ATTRS2561262static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1322_mm256_mask_permutex2var_epi16(__m256i __A, __mmask16 __U, __m256i __I,1263_mm256_mask_permutex2var_epi16(__m256i __A, __mmask16 __U, __m256i __I,
1323 __m256i __B)1264 __m256i __B) {
1324{
1325 return (__m256i)__builtin_ia32_selectw_256(__U,1265 return (__m256i)__builtin_ia32_selectw_256(__U,
1326 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),1266 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),
1327 (__v16hi)__A);1267 (__v16hi)__A);
1328}1268}
13291269
1330static __inline__ __m256i __DEFAULT_FN_ATTRS2561270static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1331_mm256_mask2_permutex2var_epi16(__m256i __A, __m256i __I, __mmask16 __U,1271_mm256_mask2_permutex2var_epi16(__m256i __A, __m256i __I, __mmask16 __U,
1332 __m256i __B)1272 __m256i __B) {
1333{
1334 return (__m256i)__builtin_ia32_selectw_256(__U,1273 return (__m256i)__builtin_ia32_selectw_256(__U,
1335 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),1274 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),
1336 (__v16hi)__I);1275 (__v16hi)__I);
1337}1276}
13381277
1339static __inline__ __m256i __DEFAULT_FN_ATTRS2561278static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1340_mm256_maskz_permutex2var_epi16 (__mmask16 __U, __m256i __A, __m256i __I,1279_mm256_maskz_permutex2var_epi16(__mmask16 __U, __m256i __A, __m256i __I,
1341 __m256i __B)1280 __m256i __B) {
1342{
1343 return (__m256i)__builtin_ia32_selectw_256(__U,1281 return (__m256i)__builtin_ia32_selectw_256(__U,
1344 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),1282 (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B),
1345 (__v16hi)_mm256_setzero_si256());1283 (__v16hi)_mm256_setzero_si256());
1346}1284}
13471285
1348static __inline__ __m128i __DEFAULT_FN_ATTRS1281286static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1349_mm_mask_maddubs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {1287_mm_mask_maddubs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {
1350 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1288 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1351 (__v8hi)_mm_maddubs_epi16(__X, __Y),1289 (__v8hi)_mm_maddubs_epi16(__X, __Y),
1352 (__v8hi)__W);1290 (__v8hi)__W);
1353}1291}
13541292
1355static __inline__ __m128i __DEFAULT_FN_ATTRS1281293static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1356_mm_maskz_maddubs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {1294_mm_maskz_maddubs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {
1357 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1295 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1358 (__v8hi)_mm_maddubs_epi16(__X, __Y),1296 (__v8hi)_mm_maddubs_epi16(__X, __Y),
1359 (__v8hi)_mm_setzero_si128());1297 (__v8hi)_mm_setzero_si128());
1360}1298}
13611299
1362static __inline__ __m256i __DEFAULT_FN_ATTRS2561300static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1363_mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X,1301_mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X,
1364 __m256i __Y) {1302 __m256i __Y) {
1365 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1303 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1367,35 +1305,35 @@ _mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X,...@@ -1367,35 +1305,35 @@ _mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X,
1367 (__v16hi)__W);1305 (__v16hi)__W);
1368}1306}
13691307
1370static __inline__ __m256i __DEFAULT_FN_ATTRS2561308static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1371_mm256_maskz_maddubs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {1309_mm256_maskz_maddubs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {
1372 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1310 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1373 (__v16hi)_mm256_maddubs_epi16(__X, __Y),1311 (__v16hi)_mm256_maddubs_epi16(__X, __Y),
1374 (__v16hi)_mm256_setzero_si256());1312 (__v16hi)_mm256_setzero_si256());
1375}1313}
13761314
1377static __inline__ __m128i __DEFAULT_FN_ATTRS1281315static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1378_mm_mask_madd_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1316_mm_mask_madd_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1379 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,1317 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1380 (__v4si)_mm_madd_epi16(__A, __B),1318 (__v4si)_mm_madd_epi16(__A, __B),
1381 (__v4si)__W);1319 (__v4si)__W);
1382}1320}
13831321
1384static __inline__ __m128i __DEFAULT_FN_ATTRS1281322static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1385_mm_maskz_madd_epi16(__mmask8 __U, __m128i __A, __m128i __B) {1323_mm_maskz_madd_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
1386 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,1324 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
1387 (__v4si)_mm_madd_epi16(__A, __B),1325 (__v4si)_mm_madd_epi16(__A, __B),
1388 (__v4si)_mm_setzero_si128());1326 (__v4si)_mm_setzero_si128());
1389}1327}
13901328
1391static __inline__ __m256i __DEFAULT_FN_ATTRS2561329static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1392_mm256_mask_madd_epi16(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {1330_mm256_mask_madd_epi16(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
1393 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,1331 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
1394 (__v8si)_mm256_madd_epi16(__A, __B),1332 (__v8si)_mm256_madd_epi16(__A, __B),
1395 (__v8si)__W);1333 (__v8si)__W);
1396}1334}
13971335
1398static __inline__ __m256i __DEFAULT_FN_ATTRS2561336static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1399_mm256_maskz_madd_epi16(__mmask8 __U, __m256i __A, __m256i __B) {1337_mm256_maskz_madd_epi16(__mmask8 __U, __m256i __A, __m256i __B) {
1400 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,1338 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
1401 (__v8si)_mm256_madd_epi16(__A, __B),1339 (__v8si)_mm256_madd_epi16(__A, __B),
...@@ -1486,8 +1424,8 @@ _mm256_maskz_cvtusepi16_epi8 (__mmask16 __M, __m256i __A) {...@@ -1486,8 +1424,8 @@ _mm256_maskz_cvtusepi16_epi8 (__mmask16 __M, __m256i __A) {
1486 __M);1424 __M);
1487}1425}
14881426
1489static __inline__ __m128i __DEFAULT_FN_ATTRS1281427static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1490_mm_cvtepi16_epi8 (__m128i __A) {1428_mm_cvtepi16_epi8(__m128i __A) {
1491 return (__m128i)__builtin_shufflevector(1429 return (__m128i)__builtin_shufflevector(
1492 __builtin_convertvector((__v8hi)__A, __v8qi),1430 __builtin_convertvector((__v8hi)__A, __v8qi),
1493 (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,1431 (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
...@@ -1527,20 +1465,20 @@ _mm_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)...@@ -1527,20 +1465,20 @@ _mm_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)
1527 __builtin_ia32_pmovuswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M);1465 __builtin_ia32_pmovuswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M);
1528}1466}
15291467
1530static __inline__ __m128i __DEFAULT_FN_ATTRS2561468static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
1531_mm256_cvtepi16_epi8 (__m256i __A) {1469_mm256_cvtepi16_epi8(__m256i __A) {
1532 return (__m128i)__builtin_convertvector((__v16hi) __A, __v16qi);1470 return (__m128i)__builtin_convertvector((__v16hi) __A, __v16qi);
1533}1471}
15341472
1535static __inline__ __m128i __DEFAULT_FN_ATTRS2561473static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
1536_mm256_mask_cvtepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) {1474_mm256_mask_cvtepi16_epi8(__m128i __O, __mmask16 __M, __m256i __A) {
1537 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,1475 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1538 (__v16qi)_mm256_cvtepi16_epi8(__A),1476 (__v16qi)_mm256_cvtepi16_epi8(__A),
1539 (__v16qi)__O);1477 (__v16qi)__O);
1540}1478}
15411479
1542static __inline__ __m128i __DEFAULT_FN_ATTRS2561480static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
1543_mm256_maskz_cvtepi16_epi8 (__mmask16 __M, __m256i __A) {1481_mm256_maskz_cvtepi16_epi8(__mmask16 __M, __m256i __A) {
1544 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,1482 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M,
1545 (__v16qi)_mm256_cvtepi16_epi8(__A),1483 (__v16qi)_mm256_cvtepi16_epi8(__A),
1546 (__v16qi)_mm_setzero_si128());1484 (__v16qi)_mm_setzero_si128());
...@@ -1564,203 +1502,198 @@ _mm256_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)...@@ -1564,203 +1502,198 @@ _mm256_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A)
1564 __builtin_ia32_pmovuswb256mem_mask ((__v16qi*) __P, (__v16hi) __A, __M);1502 __builtin_ia32_pmovuswb256mem_mask ((__v16qi*) __P, (__v16hi) __A, __M);
1565}1503}
15661504
1567static __inline__ __m128i __DEFAULT_FN_ATTRS1281505static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1568_mm_mask_mulhrs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {1506_mm_mask_mulhrs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) {
1569 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1507 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1570 (__v8hi)_mm_mulhrs_epi16(__X, __Y),1508 (__v8hi)_mm_mulhrs_epi16(__X, __Y),
1571 (__v8hi)__W);1509 (__v8hi)__W);
1572}1510}
15731511
1574static __inline__ __m128i __DEFAULT_FN_ATTRS1281512static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1575_mm_maskz_mulhrs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {1513_mm_maskz_mulhrs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) {
1576 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1514 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1577 (__v8hi)_mm_mulhrs_epi16(__X, __Y),1515 (__v8hi)_mm_mulhrs_epi16(__X, __Y),
1578 (__v8hi)_mm_setzero_si128());1516 (__v8hi)_mm_setzero_si128());
1579}1517}
15801518
1581static __inline__ __m256i __DEFAULT_FN_ATTRS2561519static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1582_mm256_mask_mulhrs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) {1520_mm256_mask_mulhrs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) {
1583 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1521 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1584 (__v16hi)_mm256_mulhrs_epi16(__X, __Y),1522 (__v16hi)_mm256_mulhrs_epi16(__X, __Y),
1585 (__v16hi)__W);1523 (__v16hi)__W);
1586}1524}
15871525
1588static __inline__ __m256i __DEFAULT_FN_ATTRS2561526static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1589_mm256_maskz_mulhrs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {1527_mm256_maskz_mulhrs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) {
1590 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1528 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1591 (__v16hi)_mm256_mulhrs_epi16(__X, __Y),1529 (__v16hi)_mm256_mulhrs_epi16(__X, __Y),
1592 (__v16hi)_mm256_setzero_si256());1530 (__v16hi)_mm256_setzero_si256());
1593}1531}
15941532
1595static __inline__ __m128i __DEFAULT_FN_ATTRS1281533static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1596_mm_mask_mulhi_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1534_mm_mask_mulhi_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1597 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1535 return (__m128i)__builtin_ia32_selectw_128(
1598 (__v8hi)_mm_mulhi_epu16(__A, __B),1536 (__mmask8)__U, (__v8hi)_mm_mulhi_epu16(__A, __B), (__v8hi)__W);
1599 (__v8hi)__W);
1600}1537}
16011538
1602static __inline__ __m128i __DEFAULT_FN_ATTRS1281539static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1603_mm_maskz_mulhi_epu16(__mmask8 __U, __m128i __A, __m128i __B) {1540_mm_maskz_mulhi_epu16(__mmask8 __U, __m128i __A, __m128i __B) {
1604 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1541 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1605 (__v8hi)_mm_mulhi_epu16(__A, __B),1542 (__v8hi)_mm_mulhi_epu16(__A, __B),
1606 (__v8hi)_mm_setzero_si128());1543 (__v8hi)_mm_setzero_si128());
1607}1544}
16081545
1609static __inline__ __m256i __DEFAULT_FN_ATTRS2561546static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1610_mm256_mask_mulhi_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {1547_mm256_mask_mulhi_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
1611 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1548 return (__m256i)__builtin_ia32_selectw_256(
1612 (__v16hi)_mm256_mulhi_epu16(__A, __B),1549 (__mmask16)__U, (__v16hi)_mm256_mulhi_epu16(__A, __B), (__v16hi)__W);
1613 (__v16hi)__W);
1614}1550}
16151551
1616static __inline__ __m256i __DEFAULT_FN_ATTRS2561552static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1617_mm256_maskz_mulhi_epu16(__mmask16 __U, __m256i __A, __m256i __B) {1553_mm256_maskz_mulhi_epu16(__mmask16 __U, __m256i __A, __m256i __B) {
1618 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1554 return (__m256i)__builtin_ia32_selectw_256(
1619 (__v16hi)_mm256_mulhi_epu16(__A, __B),1555 (__mmask16)__U, (__v16hi)_mm256_mulhi_epu16(__A, __B),
1620 (__v16hi)_mm256_setzero_si256());1556 (__v16hi)_mm256_setzero_si256());
1621}1557}
16221558
1623static __inline__ __m128i __DEFAULT_FN_ATTRS1281559static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1624_mm_mask_mulhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1560_mm_mask_mulhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1625 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1561 return (__m128i)__builtin_ia32_selectw_128(
1626 (__v8hi)_mm_mulhi_epi16(__A, __B),1562 (__mmask8)__U, (__v8hi)_mm_mulhi_epi16(__A, __B), (__v8hi)__W);
1627 (__v8hi)__W);
1628}1563}
16291564
1630static __inline__ __m128i __DEFAULT_FN_ATTRS1281565static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1631_mm_maskz_mulhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {1566_mm_maskz_mulhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
1632 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1567 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1633 (__v8hi)_mm_mulhi_epi16(__A, __B),1568 (__v8hi)_mm_mulhi_epi16(__A, __B),
1634 (__v8hi)_mm_setzero_si128());1569 (__v8hi)_mm_setzero_si128());
1635}1570}
16361571
1637static __inline__ __m256i __DEFAULT_FN_ATTRS2561572static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1638_mm256_mask_mulhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {1573_mm256_mask_mulhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
1639 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1574 return (__m256i)__builtin_ia32_selectw_256(
1640 (__v16hi)_mm256_mulhi_epi16(__A, __B),1575 (__mmask16)__U, (__v16hi)_mm256_mulhi_epi16(__A, __B), (__v16hi)__W);
1641 (__v16hi)__W);
1642}1576}
16431577
1644static __inline__ __m256i __DEFAULT_FN_ATTRS2561578static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1645_mm256_maskz_mulhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) {1579_mm256_maskz_mulhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
1646 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1580 return (__m256i)__builtin_ia32_selectw_256(
1647 (__v16hi)_mm256_mulhi_epi16(__A, __B),1581 (__mmask16)__U, (__v16hi)_mm256_mulhi_epi16(__A, __B),
1648 (__v16hi)_mm256_setzero_si256());1582 (__v16hi)_mm256_setzero_si256());
1649}1583}
16501584
1651static __inline__ __m128i __DEFAULT_FN_ATTRS1281585static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1652_mm_mask_unpackhi_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {1586_mm_mask_unpackhi_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
1653 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1587 return (__m128i)__builtin_ia32_selectb_128(
1654 (__v16qi)_mm_unpackhi_epi8(__A, __B),1588 (__mmask16)__U, (__v16qi)_mm_unpackhi_epi8(__A, __B), (__v16qi)__W);
1655 (__v16qi)__W);
1656}1589}
16571590
1658static __inline__ __m128i __DEFAULT_FN_ATTRS1281591static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1659_mm_maskz_unpackhi_epi8(__mmask16 __U, __m128i __A, __m128i __B) {1592_mm_maskz_unpackhi_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
1660 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1593 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1661 (__v16qi)_mm_unpackhi_epi8(__A, __B),1594 (__v16qi)_mm_unpackhi_epi8(__A, __B),
1662 (__v16qi)_mm_setzero_si128());1595 (__v16qi)_mm_setzero_si128());
1663}1596}
16641597
1665static __inline__ __m256i __DEFAULT_FN_ATTRS2561598static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1666_mm256_mask_unpackhi_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {1599_mm256_mask_unpackhi_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
1667 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1600 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1668 (__v32qi)_mm256_unpackhi_epi8(__A, __B),1601 (__v32qi)_mm256_unpackhi_epi8(__A, __B),
1669 (__v32qi)__W);1602 (__v32qi)__W);
1670}1603}
16711604
1672static __inline__ __m256i __DEFAULT_FN_ATTRS2561605static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1673_mm256_maskz_unpackhi_epi8(__mmask32 __U, __m256i __A, __m256i __B) {1606_mm256_maskz_unpackhi_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
1674 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1607 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1675 (__v32qi)_mm256_unpackhi_epi8(__A, __B),1608 (__v32qi)_mm256_unpackhi_epi8(__A, __B),
1676 (__v32qi)_mm256_setzero_si256());1609 (__v32qi)_mm256_setzero_si256());
1677}1610}
16781611
1679static __inline__ __m128i __DEFAULT_FN_ATTRS1281612static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1680_mm_mask_unpackhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1613_mm_mask_unpackhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1681 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1614 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1682 (__v8hi)_mm_unpackhi_epi16(__A, __B),1615 (__v8hi)_mm_unpackhi_epi16(__A, __B),
1683 (__v8hi)__W);1616 (__v8hi)__W);
1684}1617}
16851618
1686static __inline__ __m128i __DEFAULT_FN_ATTRS1281619static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1687_mm_maskz_unpackhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {1620_mm_maskz_unpackhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
1688 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1621 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1689 (__v8hi)_mm_unpackhi_epi16(__A, __B),1622 (__v8hi)_mm_unpackhi_epi16(__A, __B),
1690 (__v8hi) _mm_setzero_si128());1623 (__v8hi) _mm_setzero_si128());
1691}1624}
16921625
1693static __inline__ __m256i __DEFAULT_FN_ATTRS2561626static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1694_mm256_mask_unpackhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {1627_mm256_mask_unpackhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
1695 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1628 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1696 (__v16hi)_mm256_unpackhi_epi16(__A, __B),1629 (__v16hi)_mm256_unpackhi_epi16(__A, __B),
1697 (__v16hi)__W);1630 (__v16hi)__W);
1698}1631}
16991632
1700static __inline__ __m256i __DEFAULT_FN_ATTRS2561633static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1701_mm256_maskz_unpackhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) {1634_mm256_maskz_unpackhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
1702 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1635 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1703 (__v16hi)_mm256_unpackhi_epi16(__A, __B),1636 (__v16hi)_mm256_unpackhi_epi16(__A, __B),
1704 (__v16hi)_mm256_setzero_si256());1637 (__v16hi)_mm256_setzero_si256());
1705}1638}
17061639
1707static __inline__ __m128i __DEFAULT_FN_ATTRS1281640static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1708_mm_mask_unpacklo_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {1641_mm_mask_unpacklo_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
1709 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1642 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1710 (__v16qi)_mm_unpacklo_epi8(__A, __B),1643 (__v16qi)_mm_unpacklo_epi8(__A, __B),
1711 (__v16qi)__W);1644 (__v16qi)__W);
1712}1645}
17131646
1714static __inline__ __m128i __DEFAULT_FN_ATTRS1281647static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1715_mm_maskz_unpacklo_epi8(__mmask16 __U, __m128i __A, __m128i __B) {1648_mm_maskz_unpacklo_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
1716 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,1649 return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
1717 (__v16qi)_mm_unpacklo_epi8(__A, __B),1650 (__v16qi)_mm_unpacklo_epi8(__A, __B),
1718 (__v16qi)_mm_setzero_si128());1651 (__v16qi)_mm_setzero_si128());
1719}1652}
17201653
1721static __inline__ __m256i __DEFAULT_FN_ATTRS2561654static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1722_mm256_mask_unpacklo_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {1655_mm256_mask_unpacklo_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
1723 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1656 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1724 (__v32qi)_mm256_unpacklo_epi8(__A, __B),1657 (__v32qi)_mm256_unpacklo_epi8(__A, __B),
1725 (__v32qi)__W);1658 (__v32qi)__W);
1726}1659}
17271660
1728static __inline__ __m256i __DEFAULT_FN_ATTRS2561661static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1729_mm256_maskz_unpacklo_epi8(__mmask32 __U, __m256i __A, __m256i __B) {1662_mm256_maskz_unpacklo_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
1730 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,1663 return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
1731 (__v32qi)_mm256_unpacklo_epi8(__A, __B),1664 (__v32qi)_mm256_unpacklo_epi8(__A, __B),
1732 (__v32qi)_mm256_setzero_si256());1665 (__v32qi)_mm256_setzero_si256());
1733}1666}
17341667
1735static __inline__ __m128i __DEFAULT_FN_ATTRS1281668static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1736_mm_mask_unpacklo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {1669_mm_mask_unpacklo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
1737 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1670 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1738 (__v8hi)_mm_unpacklo_epi16(__A, __B),1671 (__v8hi)_mm_unpacklo_epi16(__A, __B),
1739 (__v8hi)__W);1672 (__v8hi)__W);
1740}1673}
17411674
1742static __inline__ __m128i __DEFAULT_FN_ATTRS1281675static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1743_mm_maskz_unpacklo_epi16(__mmask8 __U, __m128i __A, __m128i __B) {1676_mm_maskz_unpacklo_epi16(__mmask8 __U, __m128i __A, __m128i __B) {
1744 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1677 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
1745 (__v8hi)_mm_unpacklo_epi16(__A, __B),1678 (__v8hi)_mm_unpacklo_epi16(__A, __B),
1746 (__v8hi) _mm_setzero_si128());1679 (__v8hi) _mm_setzero_si128());
1747}1680}
17481681
1749static __inline__ __m256i __DEFAULT_FN_ATTRS2561682static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1750_mm256_mask_unpacklo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {1683_mm256_mask_unpacklo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
1751 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1684 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1752 (__v16hi)_mm256_unpacklo_epi16(__A, __B),1685 (__v16hi)_mm256_unpacklo_epi16(__A, __B),
1753 (__v16hi)__W);1686 (__v16hi)__W);
1754}1687}
17551688
1756static __inline__ __m256i __DEFAULT_FN_ATTRS2561689static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1757_mm256_maskz_unpacklo_epi16(__mmask16 __U, __m256i __A, __m256i __B) {1690_mm256_maskz_unpacklo_epi16(__mmask16 __U, __m256i __A, __m256i __B) {
1758 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1691 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1759 (__v16hi)_mm256_unpacklo_epi16(__A, __B),1692 (__v16hi)_mm256_unpacklo_epi16(__A, __B),
1760 (__v16hi)_mm256_setzero_si256());1693 (__v16hi)_mm256_setzero_si256());
1761}1694}
17621695
1763static __inline__ __m128i __DEFAULT_FN_ATTRS1281696static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1764_mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A)1697_mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A)
1765{1698{
1766 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1699 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1768,7 +1701,7 @@ _mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A)...@@ -1768,7 +1701,7 @@ _mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A)
1768 (__v8hi)__W);1701 (__v8hi)__W);
1769}1702}
17701703
1771static __inline__ __m128i __DEFAULT_FN_ATTRS1281704static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1772_mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A)1705_mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A)
1773{1706{
1774 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1707 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1776,7 +1709,7 @@ _mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A)...@@ -1776,7 +1709,7 @@ _mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A)
1776 (__v8hi)_mm_setzero_si128());1709 (__v8hi)_mm_setzero_si128());
1777}1710}
17781711
1779static __inline__ __m256i __DEFAULT_FN_ATTRS2561712static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1780_mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A)1713_mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A)
1781{1714{
1782 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1715 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1784,7 +1717,7 @@ _mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A)...@@ -1784,7 +1717,7 @@ _mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A)
1784 (__v16hi)__W);1717 (__v16hi)__W);
1785}1718}
17861719
1787static __inline__ __m256i __DEFAULT_FN_ATTRS2561720static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1788_mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A)1721_mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A)
1789{1722{
1790 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1723 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1793,7 +1726,7 @@ _mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A)...@@ -1793,7 +1726,7 @@ _mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A)
1793}1726}
17941727
17951728
1796static __inline__ __m128i __DEFAULT_FN_ATTRS1281729static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1797_mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A)1730_mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A)
1798{1731{
1799 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1732 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1801,7 +1734,7 @@ _mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A)...@@ -1801,7 +1734,7 @@ _mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A)
1801 (__v8hi)__W);1734 (__v8hi)__W);
1802}1735}
18031736
1804static __inline__ __m128i __DEFAULT_FN_ATTRS1281737static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1805_mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A)1738_mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A)
1806{1739{
1807 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1740 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1809,7 +1742,7 @@ _mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A)...@@ -1809,7 +1742,7 @@ _mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A)
1809 (__v8hi)_mm_setzero_si128());1742 (__v8hi)_mm_setzero_si128());
1810}1743}
18111744
1812static __inline__ __m256i __DEFAULT_FN_ATTRS2561745static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1813_mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A)1746_mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A)
1814{1747{
1815 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1748 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1817,7 +1750,7 @@ _mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A)...@@ -1817,7 +1750,7 @@ _mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A)
1817 (__v16hi)__W);1750 (__v16hi)__W);
1818}1751}
18191752
1820static __inline__ __m256i __DEFAULT_FN_ATTRS2561753static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1821_mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A)1754_mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A)
1822{1755{
1823 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1756 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1868,13 +1801,13 @@ _mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A)...@@ -1868,13 +1801,13 @@ _mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A)
1868 (imm)), \1801 (imm)), \
1869 (__v16hi)_mm256_setzero_si256()))1802 (__v16hi)_mm256_setzero_si256()))
18701803
1871static __inline__ __m256i __DEFAULT_FN_ATTRS2561804static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1872_mm256_sllv_epi16(__m256i __A, __m256i __B)1805_mm256_sllv_epi16(__m256i __A, __m256i __B)
1873{1806{
1874 return (__m256i)__builtin_ia32_psllv16hi((__v16hi)__A, (__v16hi)__B);1807 return (__m256i)__builtin_ia32_psllv16hi((__v16hi)__A, (__v16hi)__B);
1875}1808}
18761809
1877static __inline__ __m256i __DEFAULT_FN_ATTRS2561810static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1878_mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)1811_mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1879{1812{
1880 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1813 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1882,7 +1815,7 @@ _mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)...@@ -1882,7 +1815,7 @@ _mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1882 (__v16hi)__W);1815 (__v16hi)__W);
1883}1816}
18841817
1885static __inline__ __m256i __DEFAULT_FN_ATTRS2561818static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1886_mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B)1819_mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1887{1820{
1888 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1821 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1890,13 +1823,13 @@ _mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B)...@@ -1890,13 +1823,13 @@ _mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1890 (__v16hi)_mm256_setzero_si256());1823 (__v16hi)_mm256_setzero_si256());
1891}1824}
18921825
1893static __inline__ __m128i __DEFAULT_FN_ATTRS1281826static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1894_mm_sllv_epi16(__m128i __A, __m128i __B)1827_mm_sllv_epi16(__m128i __A, __m128i __B)
1895{1828{
1896 return (__m128i)__builtin_ia32_psllv8hi((__v8hi)__A, (__v8hi)__B);1829 return (__m128i)__builtin_ia32_psllv8hi((__v8hi)__A, (__v8hi)__B);
1897}1830}
18981831
1899static __inline__ __m128i __DEFAULT_FN_ATTRS1281832static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1900_mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1833_mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1901{1834{
1902 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1835 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1904,7 +1837,7 @@ _mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -1904,7 +1837,7 @@ _mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
1904 (__v8hi)__W);1837 (__v8hi)__W);
1905}1838}
19061839
1907static __inline__ __m128i __DEFAULT_FN_ATTRS1281840static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1908_mm_maskz_sllv_epi16(__mmask8 __U, __m128i __A, __m128i __B)1841_mm_maskz_sllv_epi16(__mmask8 __U, __m128i __A, __m128i __B)
1909{1842{
1910 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1843 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1944,7 +1877,7 @@ _mm256_maskz_sll_epi16(__mmask16 __U, __m256i __A, __m128i __B)...@@ -1944,7 +1877,7 @@ _mm256_maskz_sll_epi16(__mmask16 __U, __m256i __A, __m128i __B)
1944 (__v16hi)_mm256_setzero_si256());1877 (__v16hi)_mm256_setzero_si256());
1945}1878}
19461879
1947static __inline__ __m128i __DEFAULT_FN_ATTRS1281880static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1948_mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)1881_mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
1949{1882{
1950 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1883 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1952,7 +1885,7 @@ _mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)...@@ -1952,7 +1885,7 @@ _mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)
1952 (__v8hi)__W);1885 (__v8hi)__W);
1953}1886}
19541887
1955static __inline__ __m128i __DEFAULT_FN_ATTRS1281888static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1956_mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B)1889_mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B)
1957{1890{
1958 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1891 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -1960,30 +1893,28 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B)...@@ -1960,30 +1893,28 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B)
1960 (__v8hi)_mm_setzero_si128());1893 (__v8hi)_mm_setzero_si128());
1961}1894}
19621895
1963static __inline__ __m256i __DEFAULT_FN_ATTRS2561896static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1964_mm256_mask_slli_epi16(__m256i __W, __mmask16 __U, __m256i __A,1897_mm256_mask_slli_epi16(__m256i __W, __mmask16 __U, __m256i __A,
1965 unsigned int __B)1898 unsigned int __B) {
1966{
1967 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1899 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1968 (__v16hi)_mm256_slli_epi16(__A, (int)__B),1900 (__v16hi)_mm256_slli_epi16(__A, (int)__B),
1969 (__v16hi)__W);1901 (__v16hi)__W);
1970}1902}
19711903
1972static __inline__ __m256i __DEFAULT_FN_ATTRS2561904static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1973_mm256_maskz_slli_epi16(__mmask16 __U, __m256i __A, unsigned int __B)1905_mm256_maskz_slli_epi16(__mmask16 __U, __m256i __A, unsigned int __B) {
1974{
1975 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1906 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
1976 (__v16hi)_mm256_slli_epi16(__A, (int)__B),1907 (__v16hi)_mm256_slli_epi16(__A, (int)__B),
1977 (__v16hi)_mm256_setzero_si256());1908 (__v16hi)_mm256_setzero_si256());
1978}1909}
19791910
1980static __inline__ __m256i __DEFAULT_FN_ATTRS2561911static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1981_mm256_srlv_epi16(__m256i __A, __m256i __B)1912_mm256_srlv_epi16(__m256i __A, __m256i __B)
1982{1913{
1983 return (__m256i)__builtin_ia32_psrlv16hi((__v16hi)__A, (__v16hi)__B);1914 return (__m256i)__builtin_ia32_psrlv16hi((__v16hi)__A, (__v16hi)__B);
1984}1915}
19851916
1986static __inline__ __m256i __DEFAULT_FN_ATTRS2561917static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1987_mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)1918_mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1988{1919{
1989 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1920 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1991,7 +1922,7 @@ _mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)...@@ -1991,7 +1922,7 @@ _mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
1991 (__v16hi)__W);1922 (__v16hi)__W);
1992}1923}
19931924
1994static __inline__ __m256i __DEFAULT_FN_ATTRS2561925static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1995_mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B)1926_mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1996{1927{
1997 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1928 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -1999,13 +1930,13 @@ _mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B)...@@ -1999,13 +1930,13 @@ _mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B)
1999 (__v16hi)_mm256_setzero_si256());1930 (__v16hi)_mm256_setzero_si256());
2000}1931}
20011932
2002static __inline__ __m128i __DEFAULT_FN_ATTRS1281933static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2003_mm_srlv_epi16(__m128i __A, __m128i __B)1934_mm_srlv_epi16(__m128i __A, __m128i __B)
2004{1935{
2005 return (__m128i)__builtin_ia32_psrlv8hi((__v8hi)__A, (__v8hi)__B);1936 return (__m128i)__builtin_ia32_psrlv8hi((__v8hi)__A, (__v8hi)__B);
2006}1937}
20071938
2008static __inline__ __m128i __DEFAULT_FN_ATTRS1281939static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2009_mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1940_mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
2010{1941{
2011 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1942 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -2013,7 +1944,7 @@ _mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -2013,7 +1944,7 @@ _mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
2013 (__v8hi)__W);1944 (__v8hi)__W);
2014}1945}
20151946
2016static __inline__ __m128i __DEFAULT_FN_ATTRS1281947static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2017_mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B)1948_mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B)
2018{1949{
2019 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1950 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -2021,13 +1952,13 @@ _mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B)...@@ -2021,13 +1952,13 @@ _mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B)
2021 (__v8hi)_mm_setzero_si128());1952 (__v8hi)_mm_setzero_si128());
2022}1953}
20231954
2024static __inline__ __m256i __DEFAULT_FN_ATTRS2561955static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2025_mm256_srav_epi16(__m256i __A, __m256i __B)1956_mm256_srav_epi16(__m256i __A, __m256i __B)
2026{1957{
2027 return (__m256i)__builtin_ia32_psrav16hi((__v16hi)__A, (__v16hi)__B);1958 return (__m256i)__builtin_ia32_psrav16hi((__v16hi)__A, (__v16hi)__B);
2028}1959}
20291960
2030static __inline__ __m256i __DEFAULT_FN_ATTRS2561961static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2031_mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)1962_mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
2032{1963{
2033 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1964 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -2035,7 +1966,7 @@ _mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)...@@ -2035,7 +1966,7 @@ _mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
2035 (__v16hi)__W);1966 (__v16hi)__W);
2036}1967}
20371968
2038static __inline__ __m256i __DEFAULT_FN_ATTRS2561969static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2039_mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B)1970_mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B)
2040{1971{
2041 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,1972 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
...@@ -2043,13 +1974,13 @@ _mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B)...@@ -2043,13 +1974,13 @@ _mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B)
2043 (__v16hi)_mm256_setzero_si256());1974 (__v16hi)_mm256_setzero_si256());
2044}1975}
20451976
2046static __inline__ __m128i __DEFAULT_FN_ATTRS1281977static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2047_mm_srav_epi16(__m128i __A, __m128i __B)1978_mm_srav_epi16(__m128i __A, __m128i __B)
2048{1979{
2049 return (__m128i)__builtin_ia32_psrav8hi((__v8hi)__A, (__v8hi)__B);1980 return (__m128i)__builtin_ia32_psrav8hi((__v8hi)__A, (__v8hi)__B);
2050}1981}
20511982
2052static __inline__ __m128i __DEFAULT_FN_ATTRS1281983static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2053_mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)1984_mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
2054{1985{
2055 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1986 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -2057,7 +1988,7 @@ _mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -2057,7 +1988,7 @@ _mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
2057 (__v8hi)__W);1988 (__v8hi)__W);
2058}1989}
20591990
2060static __inline__ __m128i __DEFAULT_FN_ATTRS1281991static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2061_mm_maskz_srav_epi16(__mmask8 __U, __m128i __A, __m128i __B)1992_mm_maskz_srav_epi16(__mmask8 __U, __m128i __A, __m128i __B)
2062{1993{
2063 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,1994 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
...@@ -2097,34 +2028,30 @@ _mm256_maskz_sra_epi16(__mmask16 __U, __m256i __A, __m128i __B)...@@ -2097,34 +2028,30 @@ _mm256_maskz_sra_epi16(__mmask16 __U, __m256i __A, __m128i __B)
2097 (__v16hi)_mm256_setzero_si256());2028 (__v16hi)_mm256_setzero_si256());
2098}2029}
20992030
2100static __inline__ __m128i __DEFAULT_FN_ATTRS1282031static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2101_mm_mask_srai_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)2032_mm_mask_srai_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) {
2102{
2103 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2033 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2104 (__v8hi)_mm_srai_epi16(__A, (int)__B),2034 (__v8hi)_mm_srai_epi16(__A, (int)__B),
2105 (__v8hi)__W);2035 (__v8hi)__W);
2106}2036}
21072037
2108static __inline__ __m128i __DEFAULT_FN_ATTRS1282038static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2109_mm_maskz_srai_epi16(__mmask8 __U, __m128i __A, unsigned int __B)2039_mm_maskz_srai_epi16(__mmask8 __U, __m128i __A, unsigned int __B) {
2110{
2111 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2040 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2112 (__v8hi)_mm_srai_epi16(__A, (int)__B),2041 (__v8hi)_mm_srai_epi16(__A, (int)__B),
2113 (__v8hi)_mm_setzero_si128());2042 (__v8hi)_mm_setzero_si128());
2114}2043}
21152044
2116static __inline__ __m256i __DEFAULT_FN_ATTRS2562045static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2117_mm256_mask_srai_epi16(__m256i __W, __mmask16 __U, __m256i __A,2046_mm256_mask_srai_epi16(__m256i __W, __mmask16 __U, __m256i __A,
2118 unsigned int __B)2047 unsigned int __B) {
2119{
2120 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2048 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2121 (__v16hi)_mm256_srai_epi16(__A, (int)__B),2049 (__v16hi)_mm256_srai_epi16(__A, (int)__B),
2122 (__v16hi)__W);2050 (__v16hi)__W);
2123}2051}
21242052
2125static __inline__ __m256i __DEFAULT_FN_ATTRS2562053static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2126_mm256_maskz_srai_epi16(__mmask16 __U, __m256i __A, unsigned int __B)2054_mm256_maskz_srai_epi16(__mmask16 __U, __m256i __A, unsigned int __B) {
2127{
2128 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2055 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2129 (__v16hi)_mm256_srai_epi16(__A, (int)__B),2056 (__v16hi)_mm256_srai_epi16(__A, (int)__B),
2130 (__v16hi)_mm256_setzero_si256());2057 (__v16hi)_mm256_setzero_si256());
...@@ -2162,104 +2089,91 @@ _mm256_maskz_srl_epi16(__mmask16 __U, __m256i __A, __m128i __B)...@@ -2162,104 +2089,91 @@ _mm256_maskz_srl_epi16(__mmask16 __U, __m256i __A, __m128i __B)
2162 (__v16hi)_mm256_setzero_si256());2089 (__v16hi)_mm256_setzero_si256());
2163}2090}
21642091
2165static __inline__ __m128i __DEFAULT_FN_ATTRS1282092static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2166_mm_mask_srli_epi16(__m128i __W, __mmask8 __U, __m128i __A, int __B)2093_mm_mask_srli_epi16(__m128i __W, __mmask8 __U, __m128i __A, int __B) {
2167{
2168 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2094 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2169 (__v8hi)_mm_srli_epi16(__A, __B),2095 (__v8hi)_mm_srli_epi16(__A, __B),
2170 (__v8hi)__W);2096 (__v8hi)__W);
2171}2097}
21722098
2173static __inline__ __m128i __DEFAULT_FN_ATTRS1282099static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2174_mm_maskz_srli_epi16 (__mmask8 __U, __m128i __A, int __B)2100_mm_maskz_srli_epi16(__mmask8 __U, __m128i __A, int __B) {
2175{
2176 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,2101 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
2177 (__v8hi)_mm_srli_epi16(__A, __B),2102 (__v8hi)_mm_srli_epi16(__A, __B),
2178 (__v8hi)_mm_setzero_si128());2103 (__v8hi)_mm_setzero_si128());
2179}2104}
21802105
2181static __inline__ __m256i __DEFAULT_FN_ATTRS2562106static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2182_mm256_mask_srli_epi16(__m256i __W, __mmask16 __U, __m256i __A, int __B)2107_mm256_mask_srli_epi16(__m256i __W, __mmask16 __U, __m256i __A, int __B) {
2183{
2184 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2108 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2185 (__v16hi)_mm256_srli_epi16(__A, __B),2109 (__v16hi)_mm256_srli_epi16(__A, __B),
2186 (__v16hi)__W);2110 (__v16hi)__W);
2187}2111}
21882112
2189static __inline__ __m256i __DEFAULT_FN_ATTRS2562113static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2190_mm256_maskz_srli_epi16(__mmask16 __U, __m256i __A, int __B)2114_mm256_maskz_srli_epi16(__mmask16 __U, __m256i __A, int __B) {
2191{
2192 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,2115 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
2193 (__v16hi)_mm256_srli_epi16(__A, __B),2116 (__v16hi)_mm256_srli_epi16(__A, __B),
2194 (__v16hi)_mm256_setzero_si256());2117 (__v16hi)_mm256_setzero_si256());
2195}2118}
21962119
2197static __inline__ __m128i __DEFAULT_FN_ATTRS1282120static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2198_mm_mask_mov_epi16 (__m128i __W, __mmask8 __U, __m128i __A)2121_mm_mask_mov_epi16(__m128i __W, __mmask8 __U, __m128i __A) {
2199{
2200 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,2122 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,
2201 (__v8hi) __A,2123 (__v8hi) __A,
2202 (__v8hi) __W);2124 (__v8hi) __W);
2203}2125}
22042126
2205static __inline__ __m128i __DEFAULT_FN_ATTRS1282127static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2206_mm_maskz_mov_epi16 (__mmask8 __U, __m128i __A)2128_mm_maskz_mov_epi16(__mmask8 __U, __m128i __A) {
2207{
2208 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,2129 return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U,
2209 (__v8hi) __A,2130 (__v8hi) __A,
2210 (__v8hi) _mm_setzero_si128 ());2131 (__v8hi) _mm_setzero_si128 ());
2211}2132}
22122133
2213static __inline__ __m256i __DEFAULT_FN_ATTRS2562134static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2214_mm256_mask_mov_epi16 (__m256i __W, __mmask16 __U, __m256i __A)2135_mm256_mask_mov_epi16(__m256i __W, __mmask16 __U, __m256i __A) {
2215{
2216 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,2136 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,
2217 (__v16hi) __A,2137 (__v16hi) __A,
2218 (__v16hi) __W);2138 (__v16hi) __W);
2219}2139}
22202140
2221static __inline__ __m256i __DEFAULT_FN_ATTRS2562141static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2222_mm256_maskz_mov_epi16 (__mmask16 __U, __m256i __A)2142_mm256_maskz_mov_epi16(__mmask16 __U, __m256i __A) {
2223{
2224 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,2143 return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U,
2225 (__v16hi) __A,2144 (__v16hi) __A,
2226 (__v16hi) _mm256_setzero_si256 ());2145 (__v16hi) _mm256_setzero_si256 ());
2227}2146}
22282147
2229static __inline__ __m128i __DEFAULT_FN_ATTRS1282148static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2230_mm_mask_mov_epi8 (__m128i __W, __mmask16 __U, __m128i __A)2149_mm_mask_mov_epi8(__m128i __W, __mmask16 __U, __m128i __A) {
2231{
2232 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,2150 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,
2233 (__v16qi) __A,2151 (__v16qi) __A,
2234 (__v16qi) __W);2152 (__v16qi) __W);
2235}2153}
22362154
2237static __inline__ __m128i __DEFAULT_FN_ATTRS1282155static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2238_mm_maskz_mov_epi8 (__mmask16 __U, __m128i __A)2156_mm_maskz_mov_epi8(__mmask16 __U, __m128i __A) {
2239{
2240 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,2157 return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U,
2241 (__v16qi) __A,2158 (__v16qi) __A,
2242 (__v16qi) _mm_setzero_si128 ());2159 (__v16qi) _mm_setzero_si128 ());
2243}2160}
22442161
2245static __inline__ __m256i __DEFAULT_FN_ATTRS2562162static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2246_mm256_mask_mov_epi8 (__m256i __W, __mmask32 __U, __m256i __A)2163_mm256_mask_mov_epi8(__m256i __W, __mmask32 __U, __m256i __A) {
2247{
2248 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,2164 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,
2249 (__v32qi) __A,2165 (__v32qi) __A,
2250 (__v32qi) __W);2166 (__v32qi) __W);
2251}2167}
22522168
2253static __inline__ __m256i __DEFAULT_FN_ATTRS2562169static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2254_mm256_maskz_mov_epi8 (__mmask32 __U, __m256i __A)2170_mm256_maskz_mov_epi8(__mmask32 __U, __m256i __A) {
2255{
2256 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,2171 return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U,
2257 (__v32qi) __A,2172 (__v32qi) __A,
2258 (__v32qi) _mm256_setzero_si256 ());2173 (__v32qi) _mm256_setzero_si256 ());
2259}2174}
22602175
22612176static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2262static __inline__ __m128i __DEFAULT_FN_ATTRS128
2263_mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A)2177_mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A)
2264{2178{
2265 return (__m128i) __builtin_ia32_selectb_128(__M,2179 return (__m128i) __builtin_ia32_selectb_128(__M,
...@@ -2267,7 +2181,7 @@ _mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A)...@@ -2267,7 +2181,7 @@ _mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A)
2267 (__v16qi) __O);2181 (__v16qi) __O);
2268}2182}
22692183
2270static __inline__ __m128i __DEFAULT_FN_ATTRS1282184static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2271_mm_maskz_set1_epi8 (__mmask16 __M, char __A)2185_mm_maskz_set1_epi8 (__mmask16 __M, char __A)
2272{2186{
2273 return (__m128i) __builtin_ia32_selectb_128(__M,2187 return (__m128i) __builtin_ia32_selectb_128(__M,
...@@ -2275,7 +2189,7 @@ _mm_maskz_set1_epi8 (__mmask16 __M, char __A)...@@ -2275,7 +2189,7 @@ _mm_maskz_set1_epi8 (__mmask16 __M, char __A)
2275 (__v16qi) _mm_setzero_si128());2189 (__v16qi) _mm_setzero_si128());
2276}2190}
22772191
2278static __inline__ __m256i __DEFAULT_FN_ATTRS2562192static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2279_mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A)2193_mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A)
2280{2194{
2281 return (__m256i) __builtin_ia32_selectb_256(__M,2195 return (__m256i) __builtin_ia32_selectb_256(__M,
...@@ -2283,7 +2197,7 @@ _mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A)...@@ -2283,7 +2197,7 @@ _mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A)
2283 (__v32qi) __O);2197 (__v32qi) __O);
2284}2198}
22852199
2286static __inline__ __m256i __DEFAULT_FN_ATTRS2562200static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2287_mm256_maskz_set1_epi8 (__mmask32 __M, char __A)2201_mm256_maskz_set1_epi8 (__mmask32 __M, char __A)
2288{2202{
2289 return (__m256i) __builtin_ia32_selectb_256(__M,2203 return (__m256i) __builtin_ia32_selectb_256(__M,
...@@ -2463,22 +2377,19 @@ _mm256_mask_storeu_epi8 (void *__P, __mmask32 __U, __m256i __A)...@@ -2463,22 +2377,19 @@ _mm256_mask_storeu_epi8 (void *__P, __mmask32 __U, __m256i __A)
2463 (__mmask32) __U);2377 (__mmask32) __U);
2464}2378}
24652379
2466static __inline__ __mmask16 __DEFAULT_FN_ATTRS1282380static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR
2467_mm_test_epi8_mask (__m128i __A, __m128i __B)2381_mm_test_epi8_mask(__m128i __A, __m128i __B) {
2468{
2469 return _mm_cmpneq_epi8_mask (_mm_and_si128(__A, __B), _mm_setzero_si128());2382 return _mm_cmpneq_epi8_mask (_mm_and_si128(__A, __B), _mm_setzero_si128());
2470}2383}
24712384
2472static __inline__ __mmask16 __DEFAULT_FN_ATTRS1282385static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR
2473_mm_mask_test_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B)2386_mm_mask_test_epi8_mask(__mmask16 __U, __m128i __A, __m128i __B) {
2474{
2475 return _mm_mask_cmpneq_epi8_mask (__U, _mm_and_si128 (__A, __B),2387 return _mm_mask_cmpneq_epi8_mask (__U, _mm_and_si128 (__A, __B),
2476 _mm_setzero_si128());2388 _mm_setzero_si128());
2477}2389}
24782390
2479static __inline__ __mmask32 __DEFAULT_FN_ATTRS2562391static __inline__ __mmask32 __DEFAULT_FN_ATTRS256_CONSTEXPR
2480_mm256_test_epi8_mask (__m256i __A, __m256i __B)2392_mm256_test_epi8_mask(__m256i __A, __m256i __B) {
2481{
2482 return _mm256_cmpneq_epi8_mask (_mm256_and_si256(__A, __B),2393 return _mm256_cmpneq_epi8_mask (_mm256_and_si256(__A, __B),
2483 _mm256_setzero_si256());2394 _mm256_setzero_si256());
2484}2395}
...@@ -2517,9 +2428,8 @@ _mm256_mask_test_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)...@@ -2517,9 +2428,8 @@ _mm256_mask_test_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)
2517 _mm256_setzero_si256());2428 _mm256_setzero_si256());
2518}2429}
25192430
2520static __inline__ __mmask16 __DEFAULT_FN_ATTRS1282431static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR
2521_mm_testn_epi8_mask (__m128i __A, __m128i __B)2432_mm_testn_epi8_mask(__m128i __A, __m128i __B) {
2522{
2523 return _mm_cmpeq_epi8_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128());2433 return _mm_cmpeq_epi8_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128());
2524}2434}
25252435
...@@ -2570,55 +2480,47 @@ _mm256_mask_testn_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)...@@ -2570,55 +2480,47 @@ _mm256_mask_testn_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)
2570 _mm256_setzero_si256());2480 _mm256_setzero_si256());
2571}2481}
25722482
2573static __inline__ __mmask16 __DEFAULT_FN_ATTRS1282483static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR
2574_mm_movepi8_mask (__m128i __A)2484_mm_movepi8_mask(__m128i __A) {
2575{
2576 return (__mmask16) __builtin_ia32_cvtb2mask128 ((__v16qi) __A);2485 return (__mmask16) __builtin_ia32_cvtb2mask128 ((__v16qi) __A);
2577}2486}
25782487
2579static __inline__ __mmask32 __DEFAULT_FN_ATTRS2562488static __inline__ __mmask32 __DEFAULT_FN_ATTRS256_CONSTEXPR
2580_mm256_movepi8_mask (__m256i __A)2489_mm256_movepi8_mask(__m256i __A) {
2581{
2582 return (__mmask32) __builtin_ia32_cvtb2mask256 ((__v32qi) __A);2490 return (__mmask32) __builtin_ia32_cvtb2mask256 ((__v32qi) __A);
2583}2491}
25842492
2585static __inline__ __mmask8 __DEFAULT_FN_ATTRS1282493static __inline__ __mmask8 __DEFAULT_FN_ATTRS128_CONSTEXPR
2586_mm_movepi16_mask (__m128i __A)2494_mm_movepi16_mask(__m128i __A) {
2587{
2588 return (__mmask8) __builtin_ia32_cvtw2mask128 ((__v8hi) __A);2495 return (__mmask8) __builtin_ia32_cvtw2mask128 ((__v8hi) __A);
2589}2496}
25902497
2591static __inline__ __mmask16 __DEFAULT_FN_ATTRS2562498static __inline__ __mmask16 __DEFAULT_FN_ATTRS256_CONSTEXPR
2592_mm256_movepi16_mask (__m256i __A)2499_mm256_movepi16_mask(__m256i __A) {
2593{
2594 return (__mmask16) __builtin_ia32_cvtw2mask256 ((__v16hi) __A);2500 return (__mmask16) __builtin_ia32_cvtw2mask256 ((__v16hi) __A);
2595}2501}
25962502
2597static __inline__ __m128i __DEFAULT_FN_ATTRS1282503static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2598_mm_movm_epi8 (__mmask16 __A)2504_mm_movm_epi8(__mmask16 __A) {
2599{
2600 return (__m128i) __builtin_ia32_cvtmask2b128 (__A);2505 return (__m128i) __builtin_ia32_cvtmask2b128 (__A);
2601}2506}
26022507
2603static __inline__ __m256i __DEFAULT_FN_ATTRS2562508static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2604_mm256_movm_epi8 (__mmask32 __A)2509_mm256_movm_epi8(__mmask32 __A) {
2605{
2606 return (__m256i) __builtin_ia32_cvtmask2b256 (__A);2510 return (__m256i) __builtin_ia32_cvtmask2b256 (__A);
2607}2511}
26082512
2609static __inline__ __m128i __DEFAULT_FN_ATTRS1282513static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2610_mm_movm_epi16 (__mmask8 __A)2514_mm_movm_epi16(__mmask8 __A) {
2611{
2612 return (__m128i) __builtin_ia32_cvtmask2w128 (__A);2515 return (__m128i) __builtin_ia32_cvtmask2w128 (__A);
2613}2516}
26142517
2615static __inline__ __m256i __DEFAULT_FN_ATTRS2562518static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2616_mm256_movm_epi16 (__mmask16 __A)2519_mm256_movm_epi16(__mmask16 __A) {
2617{
2618 return (__m256i) __builtin_ia32_cvtmask2w256 (__A);2520 return (__m256i) __builtin_ia32_cvtmask2w256 (__A);
2619}2521}
26202522
2621static __inline__ __m128i __DEFAULT_FN_ATTRS1282523static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2622_mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A)2524_mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A)
2623{2525{
2624 return (__m128i)__builtin_ia32_selectb_128(__M,2526 return (__m128i)__builtin_ia32_selectb_128(__M,
...@@ -2626,7 +2528,7 @@ _mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A)...@@ -2626,7 +2528,7 @@ _mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A)
2626 (__v16qi) __O);2528 (__v16qi) __O);
2627}2529}
26282530
2629static __inline__ __m128i __DEFAULT_FN_ATTRS1282531static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2630_mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A)2532_mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A)
2631{2533{
2632 return (__m128i)__builtin_ia32_selectb_128(__M,2534 return (__m128i)__builtin_ia32_selectb_128(__M,
...@@ -2634,7 +2536,7 @@ _mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A)...@@ -2634,7 +2536,7 @@ _mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A)
2634 (__v16qi) _mm_setzero_si128());2536 (__v16qi) _mm_setzero_si128());
2635}2537}
26362538
2637static __inline__ __m256i __DEFAULT_FN_ATTRS2562539static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2638_mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A)2540_mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A)
2639{2541{
2640 return (__m256i)__builtin_ia32_selectb_256(__M,2542 return (__m256i)__builtin_ia32_selectb_256(__M,
...@@ -2642,7 +2544,7 @@ _mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A)...@@ -2642,7 +2544,7 @@ _mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A)
2642 (__v32qi) __O);2544 (__v32qi) __O);
2643}2545}
26442546
2645static __inline__ __m256i __DEFAULT_FN_ATTRS2562547static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2646_mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A)2548_mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A)
2647{2549{
2648 return (__m256i)__builtin_ia32_selectb_256(__M,2550 return (__m256i)__builtin_ia32_selectb_256(__M,
...@@ -2650,7 +2552,7 @@ _mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A)...@@ -2650,7 +2552,7 @@ _mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A)
2650 (__v32qi) _mm256_setzero_si256());2552 (__v32qi) _mm256_setzero_si256());
2651}2553}
26522554
2653static __inline__ __m128i __DEFAULT_FN_ATTRS1282555static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2654_mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A)2556_mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
2655{2557{
2656 return (__m128i)__builtin_ia32_selectw_128(__M,2558 return (__m128i)__builtin_ia32_selectw_128(__M,
...@@ -2658,7 +2560,7 @@ _mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A)...@@ -2658,7 +2560,7 @@ _mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A)
2658 (__v8hi) __O);2560 (__v8hi) __O);
2659}2561}
26602562
2661static __inline__ __m128i __DEFAULT_FN_ATTRS1282563static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2662_mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A)2564_mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A)
2663{2565{
2664 return (__m128i)__builtin_ia32_selectw_128(__M,2566 return (__m128i)__builtin_ia32_selectw_128(__M,
...@@ -2666,7 +2568,7 @@ _mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A)...@@ -2666,7 +2568,7 @@ _mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A)
2666 (__v8hi) _mm_setzero_si128());2568 (__v8hi) _mm_setzero_si128());
2667}2569}
26682570
2669static __inline__ __m256i __DEFAULT_FN_ATTRS2562571static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2670_mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A)2572_mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A)
2671{2573{
2672 return (__m256i)__builtin_ia32_selectw_256(__M,2574 return (__m256i)__builtin_ia32_selectw_256(__M,
...@@ -2674,7 +2576,7 @@ _mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A)...@@ -2674,7 +2576,7 @@ _mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A)
2674 (__v16hi) __O);2576 (__v16hi) __O);
2675}2577}
26762578
2677static __inline__ __m256i __DEFAULT_FN_ATTRS2562579static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2678_mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A)2580_mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A)
2679{2581{
2680 return (__m256i)__builtin_ia32_selectw_256(__M,2582 return (__m256i)__builtin_ia32_selectw_256(__M,
...@@ -2682,7 +2584,7 @@ _mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A)...@@ -2682,7 +2584,7 @@ _mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A)
2682 (__v16hi) _mm256_setzero_si256());2584 (__v16hi) _mm256_setzero_si256());
2683}2585}
26842586
2685static __inline__ __m256i __DEFAULT_FN_ATTRS2562587static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2686_mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A)2588_mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A)
2687{2589{
2688 return (__m256i) __builtin_ia32_selectw_256 (__M,2590 return (__m256i) __builtin_ia32_selectw_256 (__M,
...@@ -2690,7 +2592,7 @@ _mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A)...@@ -2690,7 +2592,7 @@ _mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A)
2690 (__v16hi) __O);2592 (__v16hi) __O);
2691}2593}
26922594
2693static __inline__ __m256i __DEFAULT_FN_ATTRS2562595static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2694_mm256_maskz_set1_epi16 (__mmask16 __M, short __A)2596_mm256_maskz_set1_epi16 (__mmask16 __M, short __A)
2695{2597{
2696 return (__m256i) __builtin_ia32_selectw_256(__M,2598 return (__m256i) __builtin_ia32_selectw_256(__M,
...@@ -2698,7 +2600,7 @@ _mm256_maskz_set1_epi16 (__mmask16 __M, short __A)...@@ -2698,7 +2600,7 @@ _mm256_maskz_set1_epi16 (__mmask16 __M, short __A)
2698 (__v16hi) _mm256_setzero_si256());2600 (__v16hi) _mm256_setzero_si256());
2699}2601}
27002602
2701static __inline__ __m128i __DEFAULT_FN_ATTRS1282603static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2702_mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A)2604_mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A)
2703{2605{
2704 return (__m128i) __builtin_ia32_selectw_128(__M,2606 return (__m128i) __builtin_ia32_selectw_128(__M,
...@@ -2706,7 +2608,7 @@ _mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A)...@@ -2706,7 +2608,7 @@ _mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A)
2706 (__v8hi) __O);2608 (__v8hi) __O);
2707}2609}
27082610
2709static __inline__ __m128i __DEFAULT_FN_ATTRS1282611static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2710_mm_maskz_set1_epi16 (__mmask8 __M, short __A)2612_mm_maskz_set1_epi16 (__mmask8 __M, short __A)
2711{2613{
2712 return (__m128i) __builtin_ia32_selectw_128(__M,2614 return (__m128i) __builtin_ia32_selectw_128(__M,
...@@ -2714,48 +2616,41 @@ _mm_maskz_set1_epi16 (__mmask8 __M, short __A)...@@ -2714,48 +2616,41 @@ _mm_maskz_set1_epi16 (__mmask8 __M, short __A)
2714 (__v8hi) _mm_setzero_si128());2616 (__v8hi) _mm_setzero_si128());
2715}2617}
27162618
2717static __inline__ __m128i __DEFAULT_FN_ATTRS1282619static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2718_mm_permutexvar_epi16 (__m128i __A, __m128i __B)2620_mm_permutexvar_epi16(__m128i __A, __m128i __B) {
2719{
2720 return (__m128i)__builtin_ia32_permvarhi128((__v8hi) __B, (__v8hi) __A);2621 return (__m128i)__builtin_ia32_permvarhi128((__v8hi) __B, (__v8hi) __A);
2721}2622}
27222623
2723static __inline__ __m128i __DEFAULT_FN_ATTRS1282624static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2724_mm_maskz_permutexvar_epi16 (__mmask8 __M, __m128i __A, __m128i __B)2625_mm_maskz_permutexvar_epi16(__mmask8 __M, __m128i __A, __m128i __B) {
2725{
2726 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,2626 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
2727 (__v8hi)_mm_permutexvar_epi16(__A, __B),2627 (__v8hi)_mm_permutexvar_epi16(__A, __B),
2728 (__v8hi) _mm_setzero_si128());2628 (__v8hi) _mm_setzero_si128());
2729}2629}
27302630
2731static __inline__ __m128i __DEFAULT_FN_ATTRS1282631static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2732_mm_mask_permutexvar_epi16 (__m128i __W, __mmask8 __M, __m128i __A,2632_mm_mask_permutexvar_epi16(__m128i __W, __mmask8 __M, __m128i __A,
2733 __m128i __B)2633 __m128i __B) {
2734{
2735 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,2634 return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M,
2736 (__v8hi)_mm_permutexvar_epi16(__A, __B),2635 (__v8hi)_mm_permutexvar_epi16(__A, __B),
2737 (__v8hi)__W);2636 (__v8hi)__W);
2738}2637}
27392638
2740static __inline__ __m256i __DEFAULT_FN_ATTRS2562639static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2741_mm256_permutexvar_epi16 (__m256i __A, __m256i __B)2640_mm256_permutexvar_epi16(__m256i __A, __m256i __B) {
2742{
2743 return (__m256i)__builtin_ia32_permvarhi256((__v16hi) __B, (__v16hi) __A);2641 return (__m256i)__builtin_ia32_permvarhi256((__v16hi) __B, (__v16hi) __A);
2744}2642}
27452643
2746static __inline__ __m256i __DEFAULT_FN_ATTRS2562644static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2747_mm256_maskz_permutexvar_epi16 (__mmask16 __M, __m256i __A,2645_mm256_maskz_permutexvar_epi16(__mmask16 __M, __m256i __A, __m256i __B) {
2748 __m256i __B)
2749{
2750 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,2646 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
2751 (__v16hi)_mm256_permutexvar_epi16(__A, __B),2647 (__v16hi)_mm256_permutexvar_epi16(__A, __B),
2752 (__v16hi)_mm256_setzero_si256());2648 (__v16hi)_mm256_setzero_si256());
2753}2649}
27542650
2755static __inline__ __m256i __DEFAULT_FN_ATTRS2562651static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2756_mm256_mask_permutexvar_epi16 (__m256i __W, __mmask16 __M, __m256i __A,2652_mm256_mask_permutexvar_epi16(__m256i __W, __mmask16 __M, __m256i __A,
2757 __m256i __B)2653 __m256i __B) {
2758{
2759 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,2654 return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M,
2760 (__v16hi)_mm256_permutexvar_epi16(__A, __B),2655 (__v16hi)_mm256_permutexvar_epi16(__A, __B),
2761 (__v16hi)__W);2656 (__v16hi)__W);
...@@ -2809,353 +2704,353 @@ _mm256_mask_permutexvar_epi16 (__m256i __W, __mmask16 __M, __m256i __A,...@@ -2809,353 +2704,353 @@ _mm256_mask_permutexvar_epi16 (__m256i __W, __mmask16 __M, __m256i __A,
2809 (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \2704 (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \
2810 (__v16hi)_mm256_setzero_si256()))2705 (__v16hi)_mm256_setzero_si256()))
28112706
2812static __inline__ short __DEFAULT_FN_ATTRS1282707static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2813_mm_reduce_add_epi16(__m128i __W) {2708_mm_reduce_add_epi16(__m128i __W) {
2814 return __builtin_reduce_add((__v8hi)__W);2709 return __builtin_reduce_add((__v8hi)__W);
2815}2710}
28162711
2817static __inline__ short __DEFAULT_FN_ATTRS1282712static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2818_mm_reduce_mul_epi16(__m128i __W) {2713_mm_reduce_mul_epi16(__m128i __W) {
2819 return __builtin_reduce_mul((__v8hi)__W);2714 return __builtin_reduce_mul((__v8hi)__W);
2820}2715}
28212716
2822static __inline__ short __DEFAULT_FN_ATTRS1282717static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2823_mm_reduce_and_epi16(__m128i __W) {2718_mm_reduce_and_epi16(__m128i __W) {
2824 return __builtin_reduce_and((__v8hi)__W);2719 return __builtin_reduce_and((__v8hi)__W);
2825}2720}
28262721
2827static __inline__ short __DEFAULT_FN_ATTRS1282722static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2828_mm_reduce_or_epi16(__m128i __W) {2723_mm_reduce_or_epi16(__m128i __W) {
2829 return __builtin_reduce_or((__v8hi)__W);2724 return __builtin_reduce_or((__v8hi)__W);
2830}2725}
28312726
2832static __inline__ short __DEFAULT_FN_ATTRS1282727static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2833_mm_mask_reduce_add_epi16( __mmask8 __M, __m128i __W) {2728_mm_mask_reduce_add_epi16(__mmask8 __M, __m128i __W) {
2834 __W = _mm_maskz_mov_epi16(__M, __W);2729 __W = _mm_maskz_mov_epi16(__M, __W);
2835 return __builtin_reduce_add((__v8hi)__W);2730 return __builtin_reduce_add((__v8hi)__W);
2836}2731}
28372732
2838static __inline__ short __DEFAULT_FN_ATTRS1282733static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2839_mm_mask_reduce_mul_epi16( __mmask8 __M, __m128i __W) {2734_mm_mask_reduce_mul_epi16(__mmask8 __M, __m128i __W) {
2840 __W = _mm_mask_mov_epi16(_mm_set1_epi16(1), __M, __W);2735 __W = _mm_mask_mov_epi16(_mm_set1_epi16(1), __M, __W);
2841 return __builtin_reduce_mul((__v8hi)__W);2736 return __builtin_reduce_mul((__v8hi)__W);
2842}2737}
28432738
2844static __inline__ short __DEFAULT_FN_ATTRS1282739static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2845_mm_mask_reduce_and_epi16( __mmask8 __M, __m128i __W) {2740_mm_mask_reduce_and_epi16(__mmask8 __M, __m128i __W) {
2846 __W = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __W);2741 __W = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __W);
2847 return __builtin_reduce_and((__v8hi)__W);2742 return __builtin_reduce_and((__v8hi)__W);
2848}2743}
28492744
2850static __inline__ short __DEFAULT_FN_ATTRS1282745static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2851_mm_mask_reduce_or_epi16(__mmask8 __M, __m128i __W) {2746_mm_mask_reduce_or_epi16(__mmask8 __M, __m128i __W) {
2852 __W = _mm_maskz_mov_epi16(__M, __W);2747 __W = _mm_maskz_mov_epi16(__M, __W);
2853 return __builtin_reduce_or((__v8hi)__W);2748 return __builtin_reduce_or((__v8hi)__W);
2854}2749}
28552750
2856static __inline__ short __DEFAULT_FN_ATTRS1282751static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2857_mm_reduce_max_epi16(__m128i __V) {2752_mm_reduce_max_epi16(__m128i __V) {
2858 return __builtin_reduce_max((__v8hi)__V);2753 return __builtin_reduce_max((__v8hi)__V);
2859}2754}
28602755
2861static __inline__ unsigned short __DEFAULT_FN_ATTRS1282756static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR
2862_mm_reduce_max_epu16(__m128i __V) {2757_mm_reduce_max_epu16(__m128i __V) {
2863 return __builtin_reduce_max((__v8hu)__V);2758 return __builtin_reduce_max((__v8hu)__V);
2864}2759}
28652760
2866static __inline__ short __DEFAULT_FN_ATTRS1282761static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2867_mm_reduce_min_epi16(__m128i __V) {2762_mm_reduce_min_epi16(__m128i __V) {
2868 return __builtin_reduce_min((__v8hi)__V);2763 return __builtin_reduce_min((__v8hi)__V);
2869}2764}
28702765
2871static __inline__ unsigned short __DEFAULT_FN_ATTRS1282766static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR
2872_mm_reduce_min_epu16(__m128i __V) {2767_mm_reduce_min_epu16(__m128i __V) {
2873 return __builtin_reduce_min((__v8hu)__V);2768 return __builtin_reduce_min((__v8hu)__V);
2874}2769}
28752770
2876static __inline__ short __DEFAULT_FN_ATTRS1282771static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2877_mm_mask_reduce_max_epi16(__mmask16 __M, __m128i __V) {2772_mm_mask_reduce_max_epi16(__mmask16 __M, __m128i __V) {
2878 __V = _mm_mask_mov_epi16(_mm_set1_epi16(-32767-1), __M, __V);2773 __V = _mm_mask_mov_epi16(_mm_set1_epi16(-32767-1), __M, __V);
2879 return __builtin_reduce_max((__v8hi)__V);2774 return __builtin_reduce_max((__v8hi)__V);
2880}2775}
28812776
2882static __inline__ unsigned short __DEFAULT_FN_ATTRS1282777static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR
2883_mm_mask_reduce_max_epu16(__mmask16 __M, __m128i __V) {2778_mm_mask_reduce_max_epu16(__mmask16 __M, __m128i __V) {
2884 __V = _mm_maskz_mov_epi16(__M, __V);2779 __V = _mm_maskz_mov_epi16(__M, __V);
2885 return __builtin_reduce_max((__v8hu)__V);2780 return __builtin_reduce_max((__v8hu)__V);
2886}2781}
28872782
2888static __inline__ short __DEFAULT_FN_ATTRS1282783static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR
2889_mm_mask_reduce_min_epi16(__mmask16 __M, __m128i __V) {2784_mm_mask_reduce_min_epi16(__mmask16 __M, __m128i __V) {
2890 __V = _mm_mask_mov_epi16(_mm_set1_epi16(32767), __M, __V);2785 __V = _mm_mask_mov_epi16(_mm_set1_epi16(32767), __M, __V);
2891 return __builtin_reduce_min((__v8hi)__V);2786 return __builtin_reduce_min((__v8hi)__V);
2892}2787}
28932788
2894static __inline__ unsigned short __DEFAULT_FN_ATTRS1282789static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR
2895_mm_mask_reduce_min_epu16(__mmask16 __M, __m128i __V) {2790_mm_mask_reduce_min_epu16(__mmask16 __M, __m128i __V) {
2896 __V = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __V);2791 __V = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __V);
2897 return __builtin_reduce_min((__v8hu)__V);2792 return __builtin_reduce_min((__v8hu)__V);
2898}2793}
28992794
2900static __inline__ short __DEFAULT_FN_ATTRS2562795static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2901_mm256_reduce_add_epi16(__m256i __W) {2796_mm256_reduce_add_epi16(__m256i __W) {
2902 return __builtin_reduce_add((__v16hi)__W);2797 return __builtin_reduce_add((__v16hi)__W);
2903}2798}
29042799
2905static __inline__ short __DEFAULT_FN_ATTRS2562800static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2906_mm256_reduce_mul_epi16(__m256i __W) {2801_mm256_reduce_mul_epi16(__m256i __W) {
2907 return __builtin_reduce_mul((__v16hi)__W);2802 return __builtin_reduce_mul((__v16hi)__W);
2908}2803}
29092804
2910static __inline__ short __DEFAULT_FN_ATTRS2562805static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2911_mm256_reduce_and_epi16(__m256i __W) {2806_mm256_reduce_and_epi16(__m256i __W) {
2912 return __builtin_reduce_and((__v16hi)__W);2807 return __builtin_reduce_and((__v16hi)__W);
2913}2808}
29142809
2915static __inline__ short __DEFAULT_FN_ATTRS2562810static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2916_mm256_reduce_or_epi16(__m256i __W) {2811_mm256_reduce_or_epi16(__m256i __W) {
2917 return __builtin_reduce_or((__v16hi)__W);2812 return __builtin_reduce_or((__v16hi)__W);
2918}2813}
29192814
2920static __inline__ short __DEFAULT_FN_ATTRS2562815static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2921_mm256_mask_reduce_add_epi16( __mmask16 __M, __m256i __W) {2816_mm256_mask_reduce_add_epi16(__mmask16 __M, __m256i __W) {
2922 __W = _mm256_maskz_mov_epi16(__M, __W);2817 __W = _mm256_maskz_mov_epi16(__M, __W);
2923 return __builtin_reduce_add((__v16hi)__W);2818 return __builtin_reduce_add((__v16hi)__W);
2924}2819}
29252820
2926static __inline__ short __DEFAULT_FN_ATTRS2562821static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2927_mm256_mask_reduce_mul_epi16( __mmask16 __M, __m256i __W) {2822_mm256_mask_reduce_mul_epi16(__mmask16 __M, __m256i __W) {
2928 __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(1), __M, __W);2823 __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(1), __M, __W);
2929 return __builtin_reduce_mul((__v16hi)__W);2824 return __builtin_reduce_mul((__v16hi)__W);
2930}2825}
29312826
2932static __inline__ short __DEFAULT_FN_ATTRS2562827static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2933_mm256_mask_reduce_and_epi16( __mmask16 __M, __m256i __W) {2828_mm256_mask_reduce_and_epi16(__mmask16 __M, __m256i __W) {
2934 __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __W);2829 __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __W);
2935 return __builtin_reduce_and((__v16hi)__W);2830 return __builtin_reduce_and((__v16hi)__W);
2936}2831}
29372832
2938static __inline__ short __DEFAULT_FN_ATTRS2562833static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2939_mm256_mask_reduce_or_epi16(__mmask16 __M, __m256i __W) {2834_mm256_mask_reduce_or_epi16(__mmask16 __M, __m256i __W) {
2940 __W = _mm256_maskz_mov_epi16(__M, __W);2835 __W = _mm256_maskz_mov_epi16(__M, __W);
2941 return __builtin_reduce_or((__v16hi)__W);2836 return __builtin_reduce_or((__v16hi)__W);
2942}2837}
29432838
2944static __inline__ short __DEFAULT_FN_ATTRS2562839static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2945_mm256_reduce_max_epi16(__m256i __V) {2840_mm256_reduce_max_epi16(__m256i __V) {
2946 return __builtin_reduce_max((__v16hi)__V);2841 return __builtin_reduce_max((__v16hi)__V);
2947}2842}
29482843
2949static __inline__ unsigned short __DEFAULT_FN_ATTRS2562844static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR
2950_mm256_reduce_max_epu16(__m256i __V) {2845_mm256_reduce_max_epu16(__m256i __V) {
2951 return __builtin_reduce_max((__v16hu)__V);2846 return __builtin_reduce_max((__v16hu)__V);
2952}2847}
29532848
2954static __inline__ short __DEFAULT_FN_ATTRS2562849static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2955_mm256_reduce_min_epi16(__m256i __V) {2850_mm256_reduce_min_epi16(__m256i __V) {
2956 return __builtin_reduce_min((__v16hi)__V);2851 return __builtin_reduce_min((__v16hi)__V);
2957}2852}
29582853
2959static __inline__ unsigned short __DEFAULT_FN_ATTRS2562854static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR
2960_mm256_reduce_min_epu16(__m256i __V) {2855_mm256_reduce_min_epu16(__m256i __V) {
2961 return __builtin_reduce_min((__v16hu)__V);2856 return __builtin_reduce_min((__v16hu)__V);
2962}2857}
29632858
2964static __inline__ short __DEFAULT_FN_ATTRS2562859static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2965_mm256_mask_reduce_max_epi16(__mmask16 __M, __m256i __V) {2860_mm256_mask_reduce_max_epi16(__mmask16 __M, __m256i __V) {
2966 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-32767-1), __M, __V);2861 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-32767-1), __M, __V);
2967 return __builtin_reduce_max((__v16hi)__V);2862 return __builtin_reduce_max((__v16hi)__V);
2968}2863}
29692864
2970static __inline__ unsigned short __DEFAULT_FN_ATTRS2562865static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR
2971_mm256_mask_reduce_max_epu16(__mmask16 __M, __m256i __V) {2866_mm256_mask_reduce_max_epu16(__mmask16 __M, __m256i __V) {
2972 __V = _mm256_maskz_mov_epi16(__M, __V);2867 __V = _mm256_maskz_mov_epi16(__M, __V);
2973 return __builtin_reduce_max((__v16hu)__V);2868 return __builtin_reduce_max((__v16hu)__V);
2974}2869}
29752870
2976static __inline__ short __DEFAULT_FN_ATTRS2562871static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR
2977_mm256_mask_reduce_min_epi16(__mmask16 __M, __m256i __V) {2872_mm256_mask_reduce_min_epi16(__mmask16 __M, __m256i __V) {
2978 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(32767), __M, __V);2873 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(32767), __M, __V);
2979 return __builtin_reduce_min((__v16hi)__V);2874 return __builtin_reduce_min((__v16hi)__V);
2980}2875}
29812876
2982static __inline__ unsigned short __DEFAULT_FN_ATTRS2562877static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR
2983_mm256_mask_reduce_min_epu16(__mmask16 __M, __m256i __V) {2878_mm256_mask_reduce_min_epu16(__mmask16 __M, __m256i __V) {
2984 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __V);2879 __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __V);
2985 return __builtin_reduce_min((__v16hu)__V);2880 return __builtin_reduce_min((__v16hu)__V);
2986}2881}
29872882
2988static __inline__ signed char __DEFAULT_FN_ATTRS1282883static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2989_mm_reduce_add_epi8(__m128i __W) {2884_mm_reduce_add_epi8(__m128i __W) {
2990 return __builtin_reduce_add((__v16qs)__W);2885 return __builtin_reduce_add((__v16qs)__W);
2991}2886}
29922887
2993static __inline__ signed char __DEFAULT_FN_ATTRS1282888static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2994_mm_reduce_mul_epi8(__m128i __W) {2889_mm_reduce_mul_epi8(__m128i __W) {
2995 return __builtin_reduce_mul((__v16qs)__W);2890 return __builtin_reduce_mul((__v16qs)__W);
2996}2891}
29972892
2998static __inline__ signed char __DEFAULT_FN_ATTRS1282893static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
2999_mm_reduce_and_epi8(__m128i __W) {2894_mm_reduce_and_epi8(__m128i __W) {
3000 return __builtin_reduce_and((__v16qs)__W);2895 return __builtin_reduce_and((__v16qs)__W);
3001}2896}
30022897
3003static __inline__ signed char __DEFAULT_FN_ATTRS1282898static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3004_mm_reduce_or_epi8(__m128i __W) {2899_mm_reduce_or_epi8(__m128i __W) {
3005 return __builtin_reduce_or((__v16qs)__W);2900 return __builtin_reduce_or((__v16qs)__W);
3006}2901}
30072902
3008static __inline__ signed char __DEFAULT_FN_ATTRS1282903static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3009_mm_mask_reduce_add_epi8(__mmask16 __M, __m128i __W) {2904_mm_mask_reduce_add_epi8(__mmask16 __M, __m128i __W) {
3010 __W = _mm_maskz_mov_epi8(__M, __W);2905 __W = _mm_maskz_mov_epi8(__M, __W);
3011 return __builtin_reduce_add((__v16qs)__W);2906 return __builtin_reduce_add((__v16qs)__W);
3012}2907}
30132908
3014static __inline__ signed char __DEFAULT_FN_ATTRS1282909static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3015_mm_mask_reduce_mul_epi8(__mmask16 __M, __m128i __W) {2910_mm_mask_reduce_mul_epi8(__mmask16 __M, __m128i __W) {
3016 __W = _mm_mask_mov_epi8(_mm_set1_epi8(1), __M, __W);2911 __W = _mm_mask_mov_epi8(_mm_set1_epi8(1), __M, __W);
3017 return __builtin_reduce_mul((__v16qs)__W);2912 return __builtin_reduce_mul((__v16qs)__W);
3018}2913}
30192914
3020static __inline__ signed char __DEFAULT_FN_ATTRS1282915static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3021_mm_mask_reduce_and_epi8(__mmask16 __M, __m128i __W) {2916_mm_mask_reduce_and_epi8(__mmask16 __M, __m128i __W) {
3022 __W = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __W);2917 __W = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __W);
3023 return __builtin_reduce_and((__v16qs)__W);2918 return __builtin_reduce_and((__v16qs)__W);
3024}2919}
30252920
3026static __inline__ signed char __DEFAULT_FN_ATTRS1282921static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3027_mm_mask_reduce_or_epi8(__mmask16 __M, __m128i __W) {2922_mm_mask_reduce_or_epi8(__mmask16 __M, __m128i __W) {
3028 __W = _mm_maskz_mov_epi8(__M, __W);2923 __W = _mm_maskz_mov_epi8(__M, __W);
3029 return __builtin_reduce_or((__v16qs)__W);2924 return __builtin_reduce_or((__v16qs)__W);
3030}2925}
30312926
3032static __inline__ signed char __DEFAULT_FN_ATTRS1282927static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3033_mm_reduce_max_epi8(__m128i __V) {2928_mm_reduce_max_epi8(__m128i __V) {
3034 return __builtin_reduce_max((__v16qs)__V);2929 return __builtin_reduce_max((__v16qs)__V);
3035}2930}
30362931
3037static __inline__ unsigned char __DEFAULT_FN_ATTRS1282932static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR
3038_mm_reduce_max_epu8(__m128i __V) {2933_mm_reduce_max_epu8(__m128i __V) {
3039 return __builtin_reduce_max((__v16qu)__V);2934 return __builtin_reduce_max((__v16qu)__V);
3040}2935}
30412936
3042static __inline__ signed char __DEFAULT_FN_ATTRS1282937static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3043_mm_reduce_min_epi8(__m128i __V) {2938_mm_reduce_min_epi8(__m128i __V) {
3044 return __builtin_reduce_min((__v16qs)__V);2939 return __builtin_reduce_min((__v16qs)__V);
3045}2940}
30462941
3047static __inline__ unsigned char __DEFAULT_FN_ATTRS1282942static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR
3048_mm_reduce_min_epu8(__m128i __V) {2943_mm_reduce_min_epu8(__m128i __V) {
3049 return __builtin_reduce_min((__v16qu)__V);2944 return __builtin_reduce_min((__v16qu)__V);
3050}2945}
30512946
3052static __inline__ signed char __DEFAULT_FN_ATTRS1282947static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3053_mm_mask_reduce_max_epi8(__mmask16 __M, __m128i __V) {2948_mm_mask_reduce_max_epi8(__mmask16 __M, __m128i __V) {
3054 __V = _mm_mask_mov_epi8(_mm_set1_epi8(-127-1), __M, __V);2949 __V = _mm_mask_mov_epi8(_mm_set1_epi8(-127-1), __M, __V);
3055 return __builtin_reduce_max((__v16qs)__V);2950 return __builtin_reduce_max((__v16qs)__V);
3056}2951}
30572952
3058static __inline__ unsigned char __DEFAULT_FN_ATTRS1282953static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR
3059_mm_mask_reduce_max_epu8(__mmask16 __M, __m128i __V) {2954_mm_mask_reduce_max_epu8(__mmask16 __M, __m128i __V) {
3060 __V = _mm_maskz_mov_epi8(__M, __V);2955 __V = _mm_maskz_mov_epi8(__M, __V);
3061 return __builtin_reduce_max((__v16qu)__V);2956 return __builtin_reduce_max((__v16qu)__V);
3062}2957}
30632958
3064static __inline__ signed char __DEFAULT_FN_ATTRS1282959static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR
3065_mm_mask_reduce_min_epi8(__mmask16 __M, __m128i __V) {2960_mm_mask_reduce_min_epi8(__mmask16 __M, __m128i __V) {
3066 __V = _mm_mask_mov_epi8(_mm_set1_epi8(127), __M, __V);2961 __V = _mm_mask_mov_epi8(_mm_set1_epi8(127), __M, __V);
3067 return __builtin_reduce_min((__v16qs)__V);2962 return __builtin_reduce_min((__v16qs)__V);
3068}2963}
30692964
3070static __inline__ unsigned char __DEFAULT_FN_ATTRS1282965static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR
3071_mm_mask_reduce_min_epu8(__mmask16 __M, __m128i __V) {2966_mm_mask_reduce_min_epu8(__mmask16 __M, __m128i __V) {
3072 __V = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __V);2967 __V = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __V);
3073 return __builtin_reduce_min((__v16qu)__V);2968 return __builtin_reduce_min((__v16qu)__V);
3074}2969}
30752970
3076static __inline__ signed char __DEFAULT_FN_ATTRS2562971static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3077_mm256_reduce_add_epi8(__m256i __W) {2972_mm256_reduce_add_epi8(__m256i __W) {
3078 return __builtin_reduce_add((__v32qs)__W);2973 return __builtin_reduce_add((__v32qs)__W);
3079}2974}
30802975
3081static __inline__ signed char __DEFAULT_FN_ATTRS2562976static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3082_mm256_reduce_mul_epi8(__m256i __W) {2977_mm256_reduce_mul_epi8(__m256i __W) {
3083 return __builtin_reduce_mul((__v32qs)__W);2978 return __builtin_reduce_mul((__v32qs)__W);
3084}2979}
30852980
3086static __inline__ signed char __DEFAULT_FN_ATTRS2562981static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3087_mm256_reduce_and_epi8(__m256i __W) {2982_mm256_reduce_and_epi8(__m256i __W) {
3088 return __builtin_reduce_and((__v32qs)__W);2983 return __builtin_reduce_and((__v32qs)__W);
3089}2984}
30902985
3091static __inline__ signed char __DEFAULT_FN_ATTRS2562986static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3092_mm256_reduce_or_epi8(__m256i __W) {2987_mm256_reduce_or_epi8(__m256i __W) {
3093 return __builtin_reduce_or((__v32qs)__W);2988 return __builtin_reduce_or((__v32qs)__W);
3094}2989}
30952990
3096static __inline__ signed char __DEFAULT_FN_ATTRS2562991static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3097_mm256_mask_reduce_add_epi8(__mmask32 __M, __m256i __W) {2992_mm256_mask_reduce_add_epi8(__mmask32 __M, __m256i __W) {
3098 __W = _mm256_maskz_mov_epi8(__M, __W);2993 __W = _mm256_maskz_mov_epi8(__M, __W);
3099 return __builtin_reduce_add((__v32qs)__W);2994 return __builtin_reduce_add((__v32qs)__W);
3100}2995}
31012996
3102static __inline__ signed char __DEFAULT_FN_ATTRS2562997static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3103_mm256_mask_reduce_mul_epi8(__mmask32 __M, __m256i __W) {2998_mm256_mask_reduce_mul_epi8(__mmask32 __M, __m256i __W) {
3104 __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(1), __M, __W);2999 __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(1), __M, __W);
3105 return __builtin_reduce_mul((__v32qs)__W);3000 return __builtin_reduce_mul((__v32qs)__W);
3106}3001}
31073002
3108static __inline__ signed char __DEFAULT_FN_ATTRS2563003static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3109_mm256_mask_reduce_and_epi8(__mmask32 __M, __m256i __W) {3004_mm256_mask_reduce_and_epi8(__mmask32 __M, __m256i __W) {
3110 __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __W);3005 __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __W);
3111 return __builtin_reduce_and((__v32qs)__W);3006 return __builtin_reduce_and((__v32qs)__W);
3112}3007}
31133008
3114static __inline__ signed char __DEFAULT_FN_ATTRS2563009static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3115_mm256_mask_reduce_or_epi8(__mmask32 __M, __m256i __W) {3010_mm256_mask_reduce_or_epi8(__mmask32 __M, __m256i __W) {
3116 __W = _mm256_maskz_mov_epi8(__M, __W);3011 __W = _mm256_maskz_mov_epi8(__M, __W);
3117 return __builtin_reduce_or((__v32qs)__W);3012 return __builtin_reduce_or((__v32qs)__W);
3118}3013}
31193014
3120static __inline__ signed char __DEFAULT_FN_ATTRS2563015static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3121_mm256_reduce_max_epi8(__m256i __V) {3016_mm256_reduce_max_epi8(__m256i __V) {
3122 return __builtin_reduce_max((__v32qs)__V);3017 return __builtin_reduce_max((__v32qs)__V);
3123}3018}
31243019
3125static __inline__ unsigned char __DEFAULT_FN_ATTRS2563020static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR
3126_mm256_reduce_max_epu8(__m256i __V) {3021_mm256_reduce_max_epu8(__m256i __V) {
3127 return __builtin_reduce_max((__v32qu)__V);3022 return __builtin_reduce_max((__v32qu)__V);
3128}3023}
31293024
3130static __inline__ signed char __DEFAULT_FN_ATTRS2563025static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3131_mm256_reduce_min_epi8(__m256i __V) {3026_mm256_reduce_min_epi8(__m256i __V) {
3132 return __builtin_reduce_min((__v32qs)__V);3027 return __builtin_reduce_min((__v32qs)__V);
3133}3028}
31343029
3135static __inline__ unsigned char __DEFAULT_FN_ATTRS2563030static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR
3136_mm256_reduce_min_epu8(__m256i __V) {3031_mm256_reduce_min_epu8(__m256i __V) {
3137 return __builtin_reduce_min((__v32qu)__V);3032 return __builtin_reduce_min((__v32qu)__V);
3138}3033}
31393034
3140static __inline__ signed char __DEFAULT_FN_ATTRS2563035static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3141_mm256_mask_reduce_max_epi8(__mmask32 __M, __m256i __V) {3036_mm256_mask_reduce_max_epi8(__mmask32 __M, __m256i __V) {
3142 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-127-1), __M, __V);3037 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-127-1), __M, __V);
3143 return __builtin_reduce_max((__v32qs)__V);3038 return __builtin_reduce_max((__v32qs)__V);
3144}3039}
31453040
3146static __inline__ unsigned char __DEFAULT_FN_ATTRS2563041static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR
3147_mm256_mask_reduce_max_epu8(__mmask32 __M, __m256i __V) {3042_mm256_mask_reduce_max_epu8(__mmask32 __M, __m256i __V) {
3148 __V = _mm256_maskz_mov_epi8(__M, __V);3043 __V = _mm256_maskz_mov_epi8(__M, __V);
3149 return __builtin_reduce_max((__v32qu)__V);3044 return __builtin_reduce_max((__v32qu)__V);
3150}3045}
31513046
3152static __inline__ signed char __DEFAULT_FN_ATTRS2563047static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR
3153_mm256_mask_reduce_min_epi8(__mmask32 __M, __m256i __V) {3048_mm256_mask_reduce_min_epi8(__mmask32 __M, __m256i __V) {
3154 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(127), __M, __V);3049 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(127), __M, __V);
3155 return __builtin_reduce_min((__v32qs)__V);3050 return __builtin_reduce_min((__v32qs)__V);
3156}3051}
31573052
3158static __inline__ unsigned char __DEFAULT_FN_ATTRS2563053static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR
3159_mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) {3054_mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) {
3160 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __V);3055 __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __V);
3161 return __builtin_reduce_min((__v32qu)__V);3056 return __builtin_reduce_min((__v32qu)__V);
...@@ -3163,5 +3058,7 @@ _mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) {...@@ -3163,5 +3058,7 @@ _mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) {
31633058
3164#undef __DEFAULT_FN_ATTRS1283059#undef __DEFAULT_FN_ATTRS128
3165#undef __DEFAULT_FN_ATTRS2563060#undef __DEFAULT_FN_ATTRS256
3061#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
3062#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
31663063
3167#endif /* __AVX512VLBWINTRIN_H */3064#endif /* __AVX512VLBWINTRIN_H */
lib/include/avx512vlcdintrin.h+74-102
...@@ -14,211 +14,183 @@...@@ -14,211 +14,183 @@
14#define __AVX512VLCDINTRIN_H14#define __AVX512VLCDINTRIN_H
1515
16/* Define the default attributes for the functions in this file. */16/* Define the default attributes for the functions in this file. */
17#if defined(__cplusplus) && (__cplusplus >= 201103L)
17#define __DEFAULT_FN_ATTRS128 \18#define __DEFAULT_FN_ATTRS128 \
18 __attribute__((__always_inline__, __nodebug__, \19 __attribute__((__always_inline__, __nodebug__, \
19 __target__("avx512vl,avx512cd,no-evex512"), \20 __target__("avx512vl,avx512cd"), \
20 __min_vector_width__(128)))21 __min_vector_width__(128))) constexpr
21#define __DEFAULT_FN_ATTRS256 \22#define __DEFAULT_FN_ATTRS256 \
22 __attribute__((__always_inline__, __nodebug__, \23 __attribute__((__always_inline__, __nodebug__, \
23 __target__("avx512vl,avx512cd,no-evex512"), \24 __target__("avx512vl,avx512cd"), \
24 __min_vector_width__(256)))25 __min_vector_width__(256))) constexpr
26#else
27#define __DEFAULT_FN_ATTRS128 \
28 __attribute__((__always_inline__, __nodebug__, \
29 __target__("avx512vl,avx512cd"), __min_vector_width__(128)))
30#define __DEFAULT_FN_ATTRS256 \
31 __attribute__((__always_inline__, __nodebug__, \
32 __target__("avx512vl,avx512cd"), __min_vector_width__(256)))
33#endif
2534
26static __inline__ __m128i __DEFAULT_FN_ATTRS12835static __inline__ __m128i __DEFAULT_FN_ATTRS128
27_mm_broadcastmb_epi64 (__mmask8 __A)36_mm_broadcastmb_epi64(__mmask8 __A) {
28{
29 return (__m128i) _mm_set1_epi64x((long long) __A);37 return (__m128i) _mm_set1_epi64x((long long) __A);
30}38}
3139
32static __inline__ __m256i __DEFAULT_FN_ATTRS25640static __inline__ __m256i __DEFAULT_FN_ATTRS256
33_mm256_broadcastmb_epi64 (__mmask8 __A)41_mm256_broadcastmb_epi64(__mmask8 __A) {
34{42 return (__m256i)_mm256_set1_epi64x((long long)__A);
35 return (__m256i) _mm256_set1_epi64x((long long)__A);
36}43}
3744
38static __inline__ __m128i __DEFAULT_FN_ATTRS12845static __inline__ __m128i __DEFAULT_FN_ATTRS128
39_mm_broadcastmw_epi32 (__mmask16 __A)46_mm_broadcastmw_epi32(__mmask16 __A) {
40{
41 return (__m128i) _mm_set1_epi32((int)__A);47 return (__m128i) _mm_set1_epi32((int)__A);
42}48}
4349
44static __inline__ __m256i __DEFAULT_FN_ATTRS25650static __inline__ __m256i __DEFAULT_FN_ATTRS256
45_mm256_broadcastmw_epi32 (__mmask16 __A)51_mm256_broadcastmw_epi32(__mmask16 __A) {
46{
47 return (__m256i) _mm256_set1_epi32((int)__A);52 return (__m256i) _mm256_set1_epi32((int)__A);
48}53}
4954
50
51static __inline__ __m128i __DEFAULT_FN_ATTRS12855static __inline__ __m128i __DEFAULT_FN_ATTRS128
52_mm_conflict_epi64 (__m128i __A)56_mm_conflict_epi64(__m128i __A) {
53{57 return (__m128i)__builtin_ia32_vpconflictdi_128((__v2di)__A);
54 return (__m128i) __builtin_ia32_vpconflictdi_128 ((__v2di) __A);
55}58}
5659
57static __inline__ __m128i __DEFAULT_FN_ATTRS12860static __inline__ __m128i __DEFAULT_FN_ATTRS128
58_mm_mask_conflict_epi64 (__m128i __W, __mmask8 __U, __m128i __A)61_mm_mask_conflict_epi64(__m128i __W, __mmask8 __U, __m128i __A) {
59{62 return (__m128i)__builtin_ia32_selectq_128(
60 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,63 (__mmask8)__U, (__v2di)_mm_conflict_epi64(__A), (__v2di)__W);
61 (__v2di)_mm_conflict_epi64(__A),
62 (__v2di)__W);
63}64}
6465
65static __inline__ __m128i __DEFAULT_FN_ATTRS12866static __inline__ __m128i __DEFAULT_FN_ATTRS128
66_mm_maskz_conflict_epi64 (__mmask8 __U, __m128i __A)67_mm_maskz_conflict_epi64(__mmask8 __U, __m128i __A) {
67{
68 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,68 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
69 (__v2di)_mm_conflict_epi64(__A),69 (__v2di)_mm_conflict_epi64(__A),
70 (__v2di)_mm_setzero_si128());70 (__v2di)_mm_setzero_si128());
71}71}
7272
73static __inline__ __m256i __DEFAULT_FN_ATTRS25673static __inline__ __m256i __DEFAULT_FN_ATTRS256
74_mm256_conflict_epi64 (__m256i __A)74_mm256_conflict_epi64(__m256i __A) {
75{75 return (__m256i)__builtin_ia32_vpconflictdi_256((__v4di)__A);
76 return (__m256i) __builtin_ia32_vpconflictdi_256 ((__v4di) __A);
77}76}
7877
79static __inline__ __m256i __DEFAULT_FN_ATTRS25678static __inline__ __m256i __DEFAULT_FN_ATTRS256
80_mm256_mask_conflict_epi64 (__m256i __W, __mmask8 __U, __m256i __A)79_mm256_mask_conflict_epi64(__m256i __W, __mmask8 __U, __m256i __A) {
81{80 return (__m256i)__builtin_ia32_selectq_256(
82 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,81 (__mmask8)__U, (__v4di)_mm256_conflict_epi64(__A), (__v4di)__W);
83 (__v4di)_mm256_conflict_epi64(__A),
84 (__v4di)__W);
85}82}
8683
87static __inline__ __m256i __DEFAULT_FN_ATTRS25684static __inline__ __m256i __DEFAULT_FN_ATTRS256
88_mm256_maskz_conflict_epi64 (__mmask8 __U, __m256i __A)85_mm256_maskz_conflict_epi64(__mmask8 __U, __m256i __A) {
89{
90 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,86 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
91 (__v4di)_mm256_conflict_epi64(__A),87 (__v4di)_mm256_conflict_epi64(__A),
92 (__v4di)_mm256_setzero_si256());88 (__v4di)_mm256_setzero_si256());
93}89}
9490
95static __inline__ __m128i __DEFAULT_FN_ATTRS12891static __inline__ __m128i __DEFAULT_FN_ATTRS128
96_mm_conflict_epi32 (__m128i __A)92_mm_conflict_epi32(__m128i __A) {
97{93 return (__m128i)__builtin_ia32_vpconflictsi_128((__v4si)__A);
98 return (__m128i) __builtin_ia32_vpconflictsi_128 ((__v4si) __A);
99}94}
10095
101static __inline__ __m128i __DEFAULT_FN_ATTRS12896static __inline__ __m128i __DEFAULT_FN_ATTRS128
102_mm_mask_conflict_epi32 (__m128i __W, __mmask8 __U, __m128i __A)97_mm_mask_conflict_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
103{98 return (__m128i)__builtin_ia32_selectd_128(
104 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,99 (__mmask8)__U, (__v4si)_mm_conflict_epi32(__A), (__v4si)__W);
105 (__v4si)_mm_conflict_epi32(__A),
106 (__v4si)__W);
107}100}
108101
109static __inline__ __m128i __DEFAULT_FN_ATTRS128102static __inline__ __m128i __DEFAULT_FN_ATTRS128
110_mm_maskz_conflict_epi32 (__mmask8 __U, __m128i __A)103_mm_maskz_conflict_epi32(__mmask8 __U, __m128i __A) {
111{
112 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,104 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
113 (__v4si)_mm_conflict_epi32(__A),105 (__v4si)_mm_conflict_epi32(__A),
114 (__v4si)_mm_setzero_si128());106 (__v4si)_mm_setzero_si128());
115}107}
116108
117static __inline__ __m256i __DEFAULT_FN_ATTRS256109static __inline__ __m256i __DEFAULT_FN_ATTRS256
118_mm256_conflict_epi32 (__m256i __A)110_mm256_conflict_epi32(__m256i __A) {
119{111 return (__m256i)__builtin_ia32_vpconflictsi_256((__v8si)__A);
120 return (__m256i) __builtin_ia32_vpconflictsi_256 ((__v8si) __A);
121}112}
122113
123static __inline__ __m256i __DEFAULT_FN_ATTRS256114static __inline__ __m256i __DEFAULT_FN_ATTRS256
124_mm256_mask_conflict_epi32 (__m256i __W, __mmask8 __U, __m256i __A)115_mm256_mask_conflict_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
125{116 return (__m256i)__builtin_ia32_selectd_256(
126 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,117 (__mmask8)__U, (__v8si)_mm256_conflict_epi32(__A), (__v8si)__W);
127 (__v8si)_mm256_conflict_epi32(__A),
128 (__v8si)__W);
129}118}
130119
131static __inline__ __m256i __DEFAULT_FN_ATTRS256120static __inline__ __m256i __DEFAULT_FN_ATTRS256
132_mm256_maskz_conflict_epi32 (__mmask8 __U, __m256i __A)121_mm256_maskz_conflict_epi32(__mmask8 __U, __m256i __A) {
133{
134 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,122 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
135 (__v8si)_mm256_conflict_epi32(__A),123 (__v8si)_mm256_conflict_epi32(__A),
136 (__v8si)_mm256_setzero_si256());124 (__v8si)_mm256_setzero_si256());
137}125}
138126
139static __inline__ __m128i __DEFAULT_FN_ATTRS128127static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_lzcnt_epi32(__m128i __A) {
140_mm_lzcnt_epi32 (__m128i __A)128 return (__m128i)__builtin_elementwise_clzg((__v4si)__A,
141{129 (__v4si)_mm_set1_epi32(32));
142 return (__m128i) __builtin_ia32_vplzcntd_128 ((__v4si) __A);
143}130}
144131
145static __inline__ __m128i __DEFAULT_FN_ATTRS128132static __inline__ __m128i __DEFAULT_FN_ATTRS128
146_mm_mask_lzcnt_epi32 (__m128i __W, __mmask8 __U, __m128i __A)133_mm_mask_lzcnt_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
147{134 return (__m128i)__builtin_ia32_selectd_128(
148 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,135 (__mmask8)__U, (__v4si)_mm_lzcnt_epi32(__A), (__v4si)__W);
149 (__v4si)_mm_lzcnt_epi32(__A),
150 (__v4si)__W);
151}136}
152137
153static __inline__ __m128i __DEFAULT_FN_ATTRS128138static __inline__ __m128i __DEFAULT_FN_ATTRS128
154_mm_maskz_lzcnt_epi32 (__mmask8 __U, __m128i __A)139_mm_maskz_lzcnt_epi32(__mmask8 __U, __m128i __A) {
155{140 return (__m128i)__builtin_ia32_selectd_128(
156 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,141 (__mmask8)__U, (__v4si)_mm_lzcnt_epi32(__A), (__v4si)_mm_setzero_si128());
157 (__v4si)_mm_lzcnt_epi32(__A),
158 (__v4si)_mm_setzero_si128());
159}142}
160143
161static __inline__ __m256i __DEFAULT_FN_ATTRS256144static __inline__ __m256i __DEFAULT_FN_ATTRS256
162_mm256_lzcnt_epi32 (__m256i __A)145_mm256_lzcnt_epi32(__m256i __A) {
163{146 return (__m256i)__builtin_elementwise_clzg((__v8si)__A,
164 return (__m256i) __builtin_ia32_vplzcntd_256 ((__v8si) __A);147 (__v8si)_mm256_set1_epi32(32));
165}148}
166149
167static __inline__ __m256i __DEFAULT_FN_ATTRS256150static __inline__ __m256i __DEFAULT_FN_ATTRS256
168_mm256_mask_lzcnt_epi32 (__m256i __W, __mmask8 __U, __m256i __A)151_mm256_mask_lzcnt_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
169{152 return (__m256i)__builtin_ia32_selectd_256(
170 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,153 (__mmask8)__U, (__v8si)_mm256_lzcnt_epi32(__A), (__v8si)__W);
171 (__v8si)_mm256_lzcnt_epi32(__A),
172 (__v8si)__W);
173}154}
174155
175static __inline__ __m256i __DEFAULT_FN_ATTRS256156static __inline__ __m256i __DEFAULT_FN_ATTRS256
176_mm256_maskz_lzcnt_epi32 (__mmask8 __U, __m256i __A)157_mm256_maskz_lzcnt_epi32(__mmask8 __U, __m256i __A) {
177{
178 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,158 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
179 (__v8si)_mm256_lzcnt_epi32(__A),159 (__v8si)_mm256_lzcnt_epi32(__A),
180 (__v8si)_mm256_setzero_si256());160 (__v8si)_mm256_setzero_si256());
181}161}
182162
183static __inline__ __m128i __DEFAULT_FN_ATTRS128163static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_lzcnt_epi64(__m128i __A) {
184_mm_lzcnt_epi64 (__m128i __A)164 return (__m128i)__builtin_elementwise_clzg(
185{165 (__v2di)__A, (__v2di)_mm_set1_epi64x((long long)64));
186 return (__m128i) __builtin_ia32_vplzcntq_128 ((__v2di) __A);
187}166}
188167
189static __inline__ __m128i __DEFAULT_FN_ATTRS128168static __inline__ __m128i __DEFAULT_FN_ATTRS128
190_mm_mask_lzcnt_epi64 (__m128i __W, __mmask8 __U, __m128i __A)169_mm_mask_lzcnt_epi64(__m128i __W, __mmask8 __U, __m128i __A) {
191{170 return (__m128i)__builtin_ia32_selectq_128(
192 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,171 (__mmask8)__U, (__v2di)_mm_lzcnt_epi64(__A), (__v2di)__W);
193 (__v2di)_mm_lzcnt_epi64(__A),
194 (__v2di)__W);
195}172}
196173
197static __inline__ __m128i __DEFAULT_FN_ATTRS128174static __inline__ __m128i __DEFAULT_FN_ATTRS128
198_mm_maskz_lzcnt_epi64 (__mmask8 __U, __m128i __A)175_mm_maskz_lzcnt_epi64(__mmask8 __U, __m128i __A) {
199{176 return (__m128i)__builtin_ia32_selectq_128(
200 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,177 (__mmask8)__U, (__v2di)_mm_lzcnt_epi64(__A), (__v2di)_mm_setzero_si128());
201 (__v2di)_mm_lzcnt_epi64(__A),
202 (__v2di)_mm_setzero_si128());
203}178}
204179
205static __inline__ __m256i __DEFAULT_FN_ATTRS256180static __inline__ __m256i __DEFAULT_FN_ATTRS256
206_mm256_lzcnt_epi64 (__m256i __A)181_mm256_lzcnt_epi64(__m256i __A) {
207{182 return (__m256i)__builtin_elementwise_clzg(
208 return (__m256i) __builtin_ia32_vplzcntq_256 ((__v4di) __A);183 (__v4di)__A, (__v4di)_mm256_set1_epi64x((long long)64));
209}184}
210185
211static __inline__ __m256i __DEFAULT_FN_ATTRS256186static __inline__ __m256i __DEFAULT_FN_ATTRS256
212_mm256_mask_lzcnt_epi64 (__m256i __W, __mmask8 __U, __m256i __A)187_mm256_mask_lzcnt_epi64(__m256i __W, __mmask8 __U, __m256i __A) {
213{188 return (__m256i)__builtin_ia32_selectq_256(
214 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,189 (__mmask8)__U, (__v4di)_mm256_lzcnt_epi64(__A), (__v4di)__W);
215 (__v4di)_mm256_lzcnt_epi64(__A),
216 (__v4di)__W);
217}190}
218191
219static __inline__ __m256i __DEFAULT_FN_ATTRS256192static __inline__ __m256i __DEFAULT_FN_ATTRS256
220_mm256_maskz_lzcnt_epi64 (__mmask8 __U, __m256i __A)193_mm256_maskz_lzcnt_epi64(__mmask8 __U, __m256i __A) {
221{
222 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,194 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
223 (__v4di)_mm256_lzcnt_epi64(__A),195 (__v4di)_mm256_lzcnt_epi64(__A),
224 (__v4di)_mm256_setzero_si256());196 (__v4di)_mm256_setzero_si256());
lib/include/avx512vldqintrin.h+110-127
...@@ -17,45 +17,51 @@...@@ -17,45 +17,51 @@
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS128 \18#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \19 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512vl,avx512dq,no-evex512"), \20 __target__("avx512vl,avx512dq"), __min_vector_width__(128)))
21 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \21#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \22 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512vl,avx512dq,no-evex512"), \23 __target__("avx512vl,avx512dq"), __min_vector_width__(256)))
25 __min_vector_width__(256)))24
25#if defined(__cplusplus) && (__cplusplus >= 201103L)
26#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
27#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
28#else
29#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
30#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
31#endif
2632
27static __inline__ __m256i __DEFAULT_FN_ATTRS25633static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR
28_mm256_mullo_epi64 (__m256i __A, __m256i __B) {34_mm256_mullo_epi64(__m256i __A, __m256i __B) {
29 return (__m256i) ((__v4du) __A * (__v4du) __B);35 return (__m256i) ((__v4du) __A * (__v4du) __B);
30}36}
3137
32static __inline__ __m256i __DEFAULT_FN_ATTRS25638static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR
33_mm256_mask_mullo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {39_mm256_mask_mullo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
34 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,40 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
35 (__v4di)_mm256_mullo_epi64(__A, __B),41 (__v4di)_mm256_mullo_epi64(__A, __B),
36 (__v4di)__W);42 (__v4di)__W);
37}43}
3844
39static __inline__ __m256i __DEFAULT_FN_ATTRS25645static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR
40_mm256_maskz_mullo_epi64(__mmask8 __U, __m256i __A, __m256i __B) {46_mm256_maskz_mullo_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
41 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,47 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
42 (__v4di)_mm256_mullo_epi64(__A, __B),48 (__v4di)_mm256_mullo_epi64(__A, __B),
43 (__v4di)_mm256_setzero_si256());49 (__v4di)_mm256_setzero_si256());
44}50}
4551
46static __inline__ __m128i __DEFAULT_FN_ATTRS12852static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
47_mm_mullo_epi64 (__m128i __A, __m128i __B) {53_mm_mullo_epi64(__m128i __A, __m128i __B) {
48 return (__m128i) ((__v2du) __A * (__v2du) __B);54 return (__m128i) ((__v2du) __A * (__v2du) __B);
49}55}
5056
51static __inline__ __m128i __DEFAULT_FN_ATTRS12857static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
52_mm_mask_mullo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {58_mm_mask_mullo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
53 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,59 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
54 (__v2di)_mm_mullo_epi64(__A, __B),60 (__v2di)_mm_mullo_epi64(__A, __B),
55 (__v2di)__W);61 (__v2di)__W);
56}62}
5763
58static __inline__ __m128i __DEFAULT_FN_ATTRS12864static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
59_mm_maskz_mullo_epi64(__mmask8 __U, __m128i __A, __m128i __B) {65_mm_maskz_mullo_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
60 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,66 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
61 (__v2di)_mm_mullo_epi64(__A, __B),67 (__v2di)_mm_mullo_epi64(__A, __B),
...@@ -454,39 +460,39 @@ _mm256_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A) {...@@ -454,39 +460,39 @@ _mm256_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A) {
454 (__mmask8) __U);460 (__mmask8) __U);
455}461}
456462
457static __inline__ __m128d __DEFAULT_FN_ATTRS128463static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
458_mm_cvtepi64_pd (__m128i __A) {464_mm_cvtepi64_pd(__m128i __A) {
459 return (__m128d)__builtin_convertvector((__v2di)__A, __v2df);465 return (__m128d)__builtin_convertvector((__v2di)__A, __v2df);
460}466}
461467
462static __inline__ __m128d __DEFAULT_FN_ATTRS128468static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
463_mm_mask_cvtepi64_pd (__m128d __W, __mmask8 __U, __m128i __A) {469_mm_mask_cvtepi64_pd(__m128d __W, __mmask8 __U, __m128i __A) {
464 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,470 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
465 (__v2df)_mm_cvtepi64_pd(__A),471 (__v2df)_mm_cvtepi64_pd(__A),
466 (__v2df)__W);472 (__v2df)__W);
467}473}
468474
469static __inline__ __m128d __DEFAULT_FN_ATTRS128475static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
470_mm_maskz_cvtepi64_pd (__mmask8 __U, __m128i __A) {476_mm_maskz_cvtepi64_pd(__mmask8 __U, __m128i __A) {
471 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,477 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
472 (__v2df)_mm_cvtepi64_pd(__A),478 (__v2df)_mm_cvtepi64_pd(__A),
473 (__v2df)_mm_setzero_pd());479 (__v2df)_mm_setzero_pd());
474}480}
475481
476static __inline__ __m256d __DEFAULT_FN_ATTRS256482static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
477_mm256_cvtepi64_pd (__m256i __A) {483_mm256_cvtepi64_pd(__m256i __A) {
478 return (__m256d)__builtin_convertvector((__v4di)__A, __v4df);484 return (__m256d)__builtin_convertvector((__v4di)__A, __v4df);
479}485}
480486
481static __inline__ __m256d __DEFAULT_FN_ATTRS256487static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
482_mm256_mask_cvtepi64_pd (__m256d __W, __mmask8 __U, __m256i __A) {488_mm256_mask_cvtepi64_pd(__m256d __W, __mmask8 __U, __m256i __A) {
483 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,489 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
484 (__v4df)_mm256_cvtepi64_pd(__A),490 (__v4df)_mm256_cvtepi64_pd(__A),
485 (__v4df)__W);491 (__v4df)__W);
486}492}
487493
488static __inline__ __m256d __DEFAULT_FN_ATTRS256494static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
489_mm256_maskz_cvtepi64_pd (__mmask8 __U, __m256i __A) {495_mm256_maskz_cvtepi64_pd(__mmask8 __U, __m256i __A) {
490 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,496 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
491 (__v4df)_mm256_cvtepi64_pd(__A),497 (__v4df)_mm256_cvtepi64_pd(__A),
492 (__v4df)_mm256_setzero_pd());498 (__v4df)_mm256_setzero_pd());
...@@ -513,20 +519,20 @@ _mm_maskz_cvtepi64_ps (__mmask8 __U, __m128i __A) {...@@ -513,20 +519,20 @@ _mm_maskz_cvtepi64_ps (__mmask8 __U, __m128i __A) {
513 (__mmask8) __U);519 (__mmask8) __U);
514}520}
515521
516static __inline__ __m128 __DEFAULT_FN_ATTRS256522static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR
517_mm256_cvtepi64_ps (__m256i __A) {523_mm256_cvtepi64_ps(__m256i __A) {
518 return (__m128)__builtin_convertvector((__v4di)__A, __v4sf);524 return (__m128)__builtin_convertvector((__v4di)__A, __v4sf);
519}525}
520526
521static __inline__ __m128 __DEFAULT_FN_ATTRS256527static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR
522_mm256_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m256i __A) {528_mm256_mask_cvtepi64_ps(__m128 __W, __mmask8 __U, __m256i __A) {
523 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,529 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
524 (__v4sf)_mm256_cvtepi64_ps(__A),530 (__v4sf)_mm256_cvtepi64_ps(__A),
525 (__v4sf)__W);531 (__v4sf)__W);
526}532}
527533
528static __inline__ __m128 __DEFAULT_FN_ATTRS256534static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR
529_mm256_maskz_cvtepi64_ps (__mmask8 __U, __m256i __A) {535_mm256_maskz_cvtepi64_ps(__mmask8 __U, __m256i __A) {
530 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,536 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
531 (__v4sf)_mm256_cvtepi64_ps(__A),537 (__v4sf)_mm256_cvtepi64_ps(__A),
532 (__v4sf)_mm_setzero_ps());538 (__v4sf)_mm_setzero_ps());
...@@ -700,39 +706,39 @@ _mm256_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A) {...@@ -700,39 +706,39 @@ _mm256_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A) {
700 (__mmask8) __U);706 (__mmask8) __U);
701}707}
702708
703static __inline__ __m128d __DEFAULT_FN_ATTRS128709static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
704_mm_cvtepu64_pd (__m128i __A) {710_mm_cvtepu64_pd(__m128i __A) {
705 return (__m128d)__builtin_convertvector((__v2du)__A, __v2df);711 return (__m128d)__builtin_convertvector((__v2du)__A, __v2df);
706}712}
707713
708static __inline__ __m128d __DEFAULT_FN_ATTRS128714static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
709_mm_mask_cvtepu64_pd (__m128d __W, __mmask8 __U, __m128i __A) {715_mm_mask_cvtepu64_pd(__m128d __W, __mmask8 __U, __m128i __A) {
710 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,716 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
711 (__v2df)_mm_cvtepu64_pd(__A),717 (__v2df)_mm_cvtepu64_pd(__A),
712 (__v2df)__W);718 (__v2df)__W);
713}719}
714720
715static __inline__ __m128d __DEFAULT_FN_ATTRS128721static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
716_mm_maskz_cvtepu64_pd (__mmask8 __U, __m128i __A) {722_mm_maskz_cvtepu64_pd(__mmask8 __U, __m128i __A) {
717 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,723 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
718 (__v2df)_mm_cvtepu64_pd(__A),724 (__v2df)_mm_cvtepu64_pd(__A),
719 (__v2df)_mm_setzero_pd());725 (__v2df)_mm_setzero_pd());
720}726}
721727
722static __inline__ __m256d __DEFAULT_FN_ATTRS256728static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
723_mm256_cvtepu64_pd (__m256i __A) {729_mm256_cvtepu64_pd(__m256i __A) {
724 return (__m256d)__builtin_convertvector((__v4du)__A, __v4df);730 return (__m256d)__builtin_convertvector((__v4du)__A, __v4df);
725}731}
726732
727static __inline__ __m256d __DEFAULT_FN_ATTRS256733static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
728_mm256_mask_cvtepu64_pd (__m256d __W, __mmask8 __U, __m256i __A) {734_mm256_mask_cvtepu64_pd(__m256d __W, __mmask8 __U, __m256i __A) {
729 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,735 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
730 (__v4df)_mm256_cvtepu64_pd(__A),736 (__v4df)_mm256_cvtepu64_pd(__A),
731 (__v4df)__W);737 (__v4df)__W);
732}738}
733739
734static __inline__ __m256d __DEFAULT_FN_ATTRS256740static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
735_mm256_maskz_cvtepu64_pd (__mmask8 __U, __m256i __A) {741_mm256_maskz_cvtepu64_pd(__mmask8 __U, __m256i __A) {
736 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,742 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
737 (__v4df)_mm256_cvtepu64_pd(__A),743 (__v4df)_mm256_cvtepu64_pd(__A),
738 (__v4df)_mm256_setzero_pd());744 (__v4df)_mm256_setzero_pd());
...@@ -759,20 +765,20 @@ _mm_maskz_cvtepu64_ps (__mmask8 __U, __m128i __A) {...@@ -759,20 +765,20 @@ _mm_maskz_cvtepu64_ps (__mmask8 __U, __m128i __A) {
759 (__mmask8) __U);765 (__mmask8) __U);
760}766}
761767
762static __inline__ __m128 __DEFAULT_FN_ATTRS256768static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR
763_mm256_cvtepu64_ps (__m256i __A) {769_mm256_cvtepu64_ps(__m256i __A) {
764 return (__m128)__builtin_convertvector((__v4du)__A, __v4sf);770 return (__m128)__builtin_convertvector((__v4du)__A, __v4sf);
765}771}
766772
767static __inline__ __m128 __DEFAULT_FN_ATTRS256773static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR
768_mm256_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m256i __A) {774_mm256_mask_cvtepu64_ps(__m128 __W, __mmask8 __U, __m256i __A) {
769 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,775 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
770 (__v4sf)_mm256_cvtepu64_ps(__A),776 (__v4sf)_mm256_cvtepu64_ps(__A),
771 (__v4sf)__W);777 (__v4sf)__W);
772}778}
773779
774static __inline__ __m128 __DEFAULT_FN_ATTRS256780static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR
775_mm256_maskz_cvtepu64_ps (__mmask8 __U, __m256i __A) {781_mm256_maskz_cvtepu64_ps(__mmask8 __U, __m256i __A) {
776 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,782 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
777 (__v4sf)_mm256_cvtepu64_ps(__A),783 (__v4sf)_mm256_cvtepu64_ps(__A),
778 (__v4sf)_mm_setzero_ps());784 (__v4sf)_mm_setzero_ps());
...@@ -908,174 +914,150 @@ _mm256_maskz_cvtepu64_ps (__mmask8 __U, __m256i __A) {...@@ -908,174 +914,150 @@ _mm256_maskz_cvtepu64_ps (__mmask8 __U, __m256i __A) {
908 (__v8sf)_mm256_setzero_ps(), \914 (__v8sf)_mm256_setzero_ps(), \
909 (__mmask8)(U)))915 (__mmask8)(U)))
910916
911static __inline__ __mmask8 __DEFAULT_FN_ATTRS128917static __inline__ __mmask8
912_mm_movepi32_mask (__m128i __A)918 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_movepi32_mask(__m128i __A) {
913{
914 return (__mmask8) __builtin_ia32_cvtd2mask128 ((__v4si) __A);919 return (__mmask8) __builtin_ia32_cvtd2mask128 ((__v4si) __A);
915}920}
916921
917static __inline__ __mmask8 __DEFAULT_FN_ATTRS256922static __inline__ __mmask8 __DEFAULT_FN_ATTRS256_CONSTEXPR
918_mm256_movepi32_mask (__m256i __A)923_mm256_movepi32_mask(__m256i __A) {
919{
920 return (__mmask8) __builtin_ia32_cvtd2mask256 ((__v8si) __A);924 return (__mmask8) __builtin_ia32_cvtd2mask256 ((__v8si) __A);
921}925}
922926
923static __inline__ __m128i __DEFAULT_FN_ATTRS128927static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
924_mm_movm_epi32 (__mmask8 __A)928_mm_movm_epi32(__mmask8 __A) {
925{
926 return (__m128i) __builtin_ia32_cvtmask2d128 (__A);929 return (__m128i) __builtin_ia32_cvtmask2d128 (__A);
927}930}
928931
929static __inline__ __m256i __DEFAULT_FN_ATTRS256932static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
930_mm256_movm_epi32 (__mmask8 __A)933_mm256_movm_epi32(__mmask8 __A) {
931{
932 return (__m256i) __builtin_ia32_cvtmask2d256 (__A);934 return (__m256i) __builtin_ia32_cvtmask2d256 (__A);
933}935}
934936
935static __inline__ __m128i __DEFAULT_FN_ATTRS128937static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
936_mm_movm_epi64 (__mmask8 __A)938_mm_movm_epi64(__mmask8 __A) {
937{
938 return (__m128i) __builtin_ia32_cvtmask2q128 (__A);939 return (__m128i) __builtin_ia32_cvtmask2q128 (__A);
939}940}
940941
941static __inline__ __m256i __DEFAULT_FN_ATTRS256942static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
942_mm256_movm_epi64 (__mmask8 __A)943_mm256_movm_epi64(__mmask8 __A) {
943{
944 return (__m256i) __builtin_ia32_cvtmask2q256 (__A);944 return (__m256i) __builtin_ia32_cvtmask2q256 (__A);
945}945}
946946
947static __inline__ __mmask8 __DEFAULT_FN_ATTRS128947static __inline__ __mmask8 __DEFAULT_FN_ATTRS128_CONSTEXPR
948_mm_movepi64_mask (__m128i __A)948_mm_movepi64_mask(__m128i __A) {
949{
950 return (__mmask8) __builtin_ia32_cvtq2mask128 ((__v2di) __A);949 return (__mmask8) __builtin_ia32_cvtq2mask128 ((__v2di) __A);
951}950}
952951
953static __inline__ __mmask8 __DEFAULT_FN_ATTRS256952static __inline__ __mmask8 __DEFAULT_FN_ATTRS256_CONSTEXPR
954_mm256_movepi64_mask (__m256i __A)953_mm256_movepi64_mask(__m256i __A) {
955{
956 return (__mmask8) __builtin_ia32_cvtq2mask256 ((__v4di) __A);954 return (__mmask8) __builtin_ia32_cvtq2mask256 ((__v4di) __A);
957}955}
958956
959static __inline__ __m256 __DEFAULT_FN_ATTRS256957static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
960_mm256_broadcast_f32x2 (__m128 __A)958_mm256_broadcast_f32x2(__m128 __A) {
961{
962 return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,959 return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,
963 0, 1, 0, 1, 0, 1, 0, 1);960 0, 1, 0, 1, 0, 1, 0, 1);
964}961}
965962
966static __inline__ __m256 __DEFAULT_FN_ATTRS256963static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
967_mm256_mask_broadcast_f32x2 (__m256 __O, __mmask8 __M, __m128 __A)964_mm256_mask_broadcast_f32x2(__m256 __O, __mmask8 __M, __m128 __A) {
968{
969 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,965 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,
970 (__v8sf)_mm256_broadcast_f32x2(__A),966 (__v8sf)_mm256_broadcast_f32x2(__A),
971 (__v8sf)__O);967 (__v8sf)__O);
972}968}
973969
974static __inline__ __m256 __DEFAULT_FN_ATTRS256970static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
975_mm256_maskz_broadcast_f32x2 (__mmask8 __M, __m128 __A)971_mm256_maskz_broadcast_f32x2(__mmask8 __M, __m128 __A) {
976{
977 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,972 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,
978 (__v8sf)_mm256_broadcast_f32x2(__A),973 (__v8sf)_mm256_broadcast_f32x2(__A),
979 (__v8sf)_mm256_setzero_ps());974 (__v8sf)_mm256_setzero_ps());
980}975}
981976
982static __inline__ __m256d __DEFAULT_FN_ATTRS256977static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
983_mm256_broadcast_f64x2(__m128d __A)978_mm256_broadcast_f64x2(__m128d __A) {
984{
985 return (__m256d)__builtin_shufflevector((__v2df)__A, (__v2df)__A,979 return (__m256d)__builtin_shufflevector((__v2df)__A, (__v2df)__A,
986 0, 1, 0, 1);980 0, 1, 0, 1);
987}981}
988982
989static __inline__ __m256d __DEFAULT_FN_ATTRS256983static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
990_mm256_mask_broadcast_f64x2(__m256d __O, __mmask8 __M, __m128d __A)984_mm256_mask_broadcast_f64x2(__m256d __O, __mmask8 __M, __m128d __A) {
991{
992 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__M,985 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__M,
993 (__v4df)_mm256_broadcast_f64x2(__A),986 (__v4df)_mm256_broadcast_f64x2(__A),
994 (__v4df)__O);987 (__v4df)__O);
995}988}
996989
997static __inline__ __m256d __DEFAULT_FN_ATTRS256990static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
998_mm256_maskz_broadcast_f64x2 (__mmask8 __M, __m128d __A)991_mm256_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A) {
999{
1000 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__M,992 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__M,
1001 (__v4df)_mm256_broadcast_f64x2(__A),993 (__v4df)_mm256_broadcast_f64x2(__A),
1002 (__v4df)_mm256_setzero_pd());994 (__v4df)_mm256_setzero_pd());
1003}995}
1004996
1005static __inline__ __m128i __DEFAULT_FN_ATTRS128997static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1006_mm_broadcast_i32x2 (__m128i __A)998_mm_broadcast_i32x2(__m128i __A) {
1007{
1008 return (__m128i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,999 return (__m128i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,
1009 0, 1, 0, 1);1000 0, 1, 0, 1);
1010}1001}
10111002
1012static __inline__ __m128i __DEFAULT_FN_ATTRS1281003static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1013_mm_mask_broadcast_i32x2 (__m128i __O, __mmask8 __M, __m128i __A)1004_mm_mask_broadcast_i32x2(__m128i __O, __mmask8 __M, __m128i __A) {
1014{
1015 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,1005 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
1016 (__v4si)_mm_broadcast_i32x2(__A),1006 (__v4si)_mm_broadcast_i32x2(__A),
1017 (__v4si)__O);1007 (__v4si)__O);
1018}1008}
10191009
1020static __inline__ __m128i __DEFAULT_FN_ATTRS1281010static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1021_mm_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A)1011_mm_maskz_broadcast_i32x2(__mmask8 __M, __m128i __A) {
1022{
1023 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,1012 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
1024 (__v4si)_mm_broadcast_i32x2(__A),1013 (__v4si)_mm_broadcast_i32x2(__A),
1025 (__v4si)_mm_setzero_si128());1014 (__v4si)_mm_setzero_si128());
1026}1015}
10271016
1028static __inline__ __m256i __DEFAULT_FN_ATTRS2561017static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1029_mm256_broadcast_i32x2 (__m128i __A)1018_mm256_broadcast_i32x2(__m128i __A) {
1030{
1031 return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,1019 return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,
1032 0, 1, 0, 1, 0, 1, 0, 1);1020 0, 1, 0, 1, 0, 1, 0, 1);
1033}1021}
10341022
1035static __inline__ __m256i __DEFAULT_FN_ATTRS2561023static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1036_mm256_mask_broadcast_i32x2 (__m256i __O, __mmask8 __M, __m128i __A)1024_mm256_mask_broadcast_i32x2(__m256i __O, __mmask8 __M, __m128i __A) {
1037{
1038 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,1025 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
1039 (__v8si)_mm256_broadcast_i32x2(__A),1026 (__v8si)_mm256_broadcast_i32x2(__A),
1040 (__v8si)__O);1027 (__v8si)__O);
1041}1028}
10421029
1043static __inline__ __m256i __DEFAULT_FN_ATTRS2561030static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1044_mm256_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A)1031_mm256_maskz_broadcast_i32x2(__mmask8 __M, __m128i __A) {
1045{
1046 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,1032 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
1047 (__v8si)_mm256_broadcast_i32x2(__A),1033 (__v8si)_mm256_broadcast_i32x2(__A),
1048 (__v8si)_mm256_setzero_si256());1034 (__v8si)_mm256_setzero_si256());
1049}1035}
10501036
1051static __inline__ __m256i __DEFAULT_FN_ATTRS2561037static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1052_mm256_broadcast_i64x2(__m128i __A)1038_mm256_broadcast_i64x2(__m128i __A) {
1053{
1054 return (__m256i)__builtin_shufflevector((__v2di)__A, (__v2di)__A,1039 return (__m256i)__builtin_shufflevector((__v2di)__A, (__v2di)__A,
1055 0, 1, 0, 1);1040 0, 1, 0, 1);
1056}1041}
10571042
1058static __inline__ __m256i __DEFAULT_FN_ATTRS2561043static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1059_mm256_mask_broadcast_i64x2(__m256i __O, __mmask8 __M, __m128i __A)1044_mm256_mask_broadcast_i64x2(__m256i __O, __mmask8 __M, __m128i __A) {
1060{
1061 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,1045 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
1062 (__v4di)_mm256_broadcast_i64x2(__A),1046 (__v4di)_mm256_broadcast_i64x2(__A),
1063 (__v4di)__O);1047 (__v4di)__O);
1064}1048}
10651049
1066static __inline__ __m256i __DEFAULT_FN_ATTRS2561050static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1067_mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A)1051_mm256_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) {
1068{
1069 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,1052 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
1070 (__v4di)_mm256_broadcast_i64x2(__A),1053 (__v4di)_mm256_broadcast_i64x2(__A),
1071 (__v4di)_mm256_setzero_si256());1054 (__v4di)_mm256_setzero_si256());
1072}1055}
10731056
1074#define _mm256_extractf64x2_pd(A, imm) \1057#define _mm256_extractf64x2_pd(A, imm) \
1075 ((__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \1058 ((__m128d)__builtin_ia32_extractf64x2_256_mask( \
1076 (int)(imm), \1059 (__v4df)(__m256d)(A), (int)(imm), (__v2df)_mm_setzero_pd(), \
1077 (__v2df)_mm_undefined_pd(), \1060 (__mmask8) - 1))
1078 (__mmask8)-1))
10791061
1080#define _mm256_mask_extractf64x2_pd(W, U, A, imm) \1062#define _mm256_mask_extractf64x2_pd(W, U, A, imm) \
1081 ((__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \1063 ((__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \
...@@ -1089,11 +1071,10 @@ _mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A)...@@ -1089,11 +1071,10 @@ _mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A)
1089 (__v2df)_mm_setzero_pd(), \1071 (__v2df)_mm_setzero_pd(), \
1090 (__mmask8)(U)))1072 (__mmask8)(U)))
10911073
1092#define _mm256_extracti64x2_epi64(A, imm) \1074#define _mm256_extracti64x2_epi64(A, imm) \
1093 ((__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \1075 ((__m128i)__builtin_ia32_extracti64x2_256_mask( \
1094 (int)(imm), \1076 (__v4di)(__m256i)(A), (int)(imm), (__v2di)_mm_setzero_si128(), \
1095 (__v2di)_mm_undefined_si128(), \1077 (__mmask8) - 1))
1096 (__mmask8)-1))
10971078
1098#define _mm256_mask_extracti64x2_epi64(W, U, A, imm) \1079#define _mm256_mask_extracti64x2_epi64(W, U, A, imm) \
1099 ((__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \1080 ((__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \
...@@ -1169,5 +1150,7 @@ _mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A)...@@ -1169,5 +1150,7 @@ _mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A)
11691150
1170#undef __DEFAULT_FN_ATTRS1281151#undef __DEFAULT_FN_ATTRS128
1171#undef __DEFAULT_FN_ATTRS2561152#undef __DEFAULT_FN_ATTRS256
1153#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
1154#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
11721155
1173#endif1156#endif
lib/include/avx512vlfp16intrin.h+130-111
...@@ -19,51 +19,64 @@...@@ -19,51 +19,64 @@
19/* Define the default attributes for the functions in this file. */19/* Define the default attributes for the functions in this file. */
20#define __DEFAULT_FN_ATTRS256 \20#define __DEFAULT_FN_ATTRS256 \
21 __attribute__((__always_inline__, __nodebug__, \21 __attribute__((__always_inline__, __nodebug__, \
22 __target__("avx512fp16,avx512vl,no-evex512"), \22 __target__("avx512fp16,avx512vl"), \
23 __min_vector_width__(256)))23 __min_vector_width__(256)))
24#define __DEFAULT_FN_ATTRS128 \24#define __DEFAULT_FN_ATTRS128 \
25 __attribute__((__always_inline__, __nodebug__, \25 __attribute__((__always_inline__, __nodebug__, \
26 __target__("avx512fp16,avx512vl,no-evex512"), \26 __target__("avx512fp16,avx512vl"), \
27 __min_vector_width__(128)))27 __min_vector_width__(128)))
2828
29static __inline__ _Float16 __DEFAULT_FN_ATTRS128 _mm_cvtsh_h(__m128h __a) {29#if defined(__cplusplus) && (__cplusplus >= 201103L)
30#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
31#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
32#else
33#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
34#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
35#endif
36
37static __inline__ _Float16 __DEFAULT_FN_ATTRS128_CONSTEXPR
38_mm_cvtsh_h(__m128h __a) {
30 return __a[0];39 return __a[0];
31}40}
3241
33static __inline__ _Float16 __DEFAULT_FN_ATTRS256 _mm256_cvtsh_h(__m256h __a) {42static __inline__ _Float16 __DEFAULT_FN_ATTRS256_CONSTEXPR
43_mm256_cvtsh_h(__m256h __a) {
34 return __a[0];44 return __a[0];
35}45}
3646
37static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_set_sh(_Float16 __h) {47static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
48_mm_set_sh(_Float16 __h) {
38 return __extension__(__m128h){__h, 0, 0, 0, 0, 0, 0, 0};49 return __extension__(__m128h){__h, 0, 0, 0, 0, 0, 0, 0};
39}50}
4051
41static __inline __m128h __DEFAULT_FN_ATTRS128 _mm_set1_ph(_Float16 __h) {52static __inline __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
53_mm_set1_ph(_Float16 __h) {
42 return (__m128h)(__v8hf){__h, __h, __h, __h, __h, __h, __h, __h};54 return (__m128h)(__v8hf){__h, __h, __h, __h, __h, __h, __h, __h};
43}55}
4456
45static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_set1_ph(_Float16 __h) {57static __inline __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
58_mm256_set1_ph(_Float16 __h) {
46 return (__m256h)(__v16hf){__h, __h, __h, __h, __h, __h, __h, __h,59 return (__m256h)(__v16hf){__h, __h, __h, __h, __h, __h, __h, __h,
47 __h, __h, __h, __h, __h, __h, __h, __h};60 __h, __h, __h, __h, __h, __h, __h, __h};
48}61}
4962
50static __inline __m128h __DEFAULT_FN_ATTRS12863static __inline __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
51_mm_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,64_mm_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,
52 _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8) {65 _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8) {
53 return (__m128h)(__v8hf){__h8, __h7, __h6, __h5, __h4, __h3, __h2, __h1};66 return (__m128h)(__v8hf){__h8, __h7, __h6, __h5, __h4, __h3, __h2, __h1};
54}67}
5568
56static __inline __m256h __DEFAULT_FN_ATTRS25669static __inline __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
57_mm256_set1_pch(_Float16 _Complex h) {70_mm256_set1_pch(_Float16 _Complex h) {
58 return (__m256h)_mm256_set1_ps(__builtin_bit_cast(float, h));71 return (__m256h)_mm256_set1_ps(__builtin_bit_cast(float, h));
59}72}
6073
61static __inline __m128h __DEFAULT_FN_ATTRS12874static __inline __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
62_mm_set1_pch(_Float16 _Complex h) {75_mm_set1_pch(_Float16 _Complex h) {
63 return (__m128h)_mm_set1_ps(__builtin_bit_cast(float, h));76 return (__m128h)_mm_set1_ps(__builtin_bit_cast(float, h));
64}77}
6578
66static __inline __m256h __DEFAULT_FN_ATTRS25679static __inline __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
67_mm256_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,80_mm256_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,
68 _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8,81 _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8,
69 _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12,82 _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12,
...@@ -73,13 +86,20 @@ _mm256_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,...@@ -73,13 +86,20 @@ _mm256_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4,
73 __h4, __h3, __h2, __h1};86 __h4, __h3, __h2, __h1};
74}87}
7588
76#define _mm_setr_ph(h1, h2, h3, h4, h5, h6, h7, h8) \89static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
77 _mm_set_ph((h8), (h7), (h6), (h5), (h4), (h3), (h2), (h1))90_mm_setr_ph(_Float16 e0, _Float16 e1, _Float16 e2, _Float16 e3, _Float16 e4,
91 _Float16 e5, _Float16 e6, _Float16 e7) {
92 return _mm_set_ph(e7, e6, e5, e4, e3, e2, e1, e0);
93}
7894
79#define _mm256_setr_ph(h1, h2, h3, h4, h5, h6, h7, h8, h9, h10, h11, h12, h13, \95static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
80 h14, h15, h16) \96_mm256_setr_ph(_Float16 e0, _Float16 e1, _Float16 e2, _Float16 e3, _Float16 e4,
81 _mm256_set_ph((h16), (h15), (h14), (h13), (h12), (h11), (h10), (h9), (h8), \97 _Float16 e5, _Float16 e6, _Float16 e7, _Float16 e8, _Float16 e9,
82 (h7), (h6), (h5), (h4), (h3), (h2), (h1))98 _Float16 e10, _Float16 e11, _Float16 e12, _Float16 e13,
99 _Float16 e14, _Float16 e15) {
100 return _mm256_set_ph(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3,
101 e2, e1, e0);
102}
83103
84static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_add_ph(__m256h __A,104static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_add_ph(__m256h __A,
85 __m256h __B) {105 __m256h __B) {
...@@ -229,12 +249,12 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_div_ph(__mmask8 __U,...@@ -229,12 +249,12 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_div_ph(__mmask8 __U,
229 (__v8hf)_mm_setzero_ph());249 (__v8hf)_mm_setzero_ph());
230}250}
231251
232static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_min_ph(__m256h __A,252static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
233 __m256h __B) {253_mm256_min_ph(__m256h __A, __m256h __B) {
234 return (__m256h)__builtin_ia32_minph256((__v16hf)__A, (__v16hf)__B);254 return (__m256h)__builtin_ia32_minph256((__v16hf)__A, (__v16hf)__B);
235}255}
236256
237static __inline__ __m256h __DEFAULT_FN_ATTRS256257static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
238_mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) {258_mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) {
239 return (__m256h)__builtin_ia32_selectph_256(259 return (__m256h)__builtin_ia32_selectph_256(
240 (__mmask16)__U,260 (__mmask16)__U,
...@@ -242,7 +262,7 @@ _mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) {...@@ -242,7 +262,7 @@ _mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) {
242 (__v16hf)__W);262 (__v16hf)__W);
243}263}
244264
245static __inline__ __m256h __DEFAULT_FN_ATTRS256265static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
246_mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) {266_mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) {
247 return (__m256h)__builtin_ia32_selectph_256(267 return (__m256h)__builtin_ia32_selectph_256(
248 (__mmask16)__U,268 (__mmask16)__U,
...@@ -250,34 +270,31 @@ _mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) {...@@ -250,34 +270,31 @@ _mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) {
250 (__v16hf)_mm256_setzero_ph());270 (__v16hf)_mm256_setzero_ph());
251}271}
252272
253static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_min_ph(__m128h __A,273static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
254 __m128h __B) {274_mm_min_ph(__m128h __A, __m128h __B) {
255 return (__m128h)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B);275 return (__m128h)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B);
256}276}
257277
258static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_min_ph(__m128h __W,278static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
259 __mmask8 __U,279_mm_mask_min_ph(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {
260 __m128h __A,
261 __m128h __B) {
262 return (__m128h)__builtin_ia32_selectph_128(280 return (__m128h)__builtin_ia32_selectph_128(
263 (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B),281 (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B),
264 (__v8hf)__W);282 (__v8hf)__W);
265}283}
266284
267static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_min_ph(__mmask8 __U,285static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
268 __m128h __A,286_mm_maskz_min_ph(__mmask8 __U, __m128h __A, __m128h __B) {
269 __m128h __B) {
270 return (__m128h)__builtin_ia32_selectph_128(287 return (__m128h)__builtin_ia32_selectph_128(
271 (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B),288 (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B),
272 (__v8hf)_mm_setzero_ph());289 (__v8hf)_mm_setzero_ph());
273}290}
274291
275static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_max_ph(__m256h __A,292static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
276 __m256h __B) {293_mm256_max_ph(__m256h __A, __m256h __B) {
277 return (__m256h)__builtin_ia32_maxph256((__v16hf)__A, (__v16hf)__B);294 return (__m256h)__builtin_ia32_maxph256((__v16hf)__A, (__v16hf)__B);
278}295}
279296
280static __inline__ __m256h __DEFAULT_FN_ATTRS256297static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
281_mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) {298_mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) {
282 return (__m256h)__builtin_ia32_selectph_256(299 return (__m256h)__builtin_ia32_selectph_256(
283 (__mmask16)__U,300 (__mmask16)__U,
...@@ -285,7 +302,7 @@ _mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) {...@@ -285,7 +302,7 @@ _mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) {
285 (__v16hf)__W);302 (__v16hf)__W);
286}303}
287304
288static __inline__ __m256h __DEFAULT_FN_ATTRS256305static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
289_mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) {306_mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) {
290 return (__m256h)__builtin_ia32_selectph_256(307 return (__m256h)__builtin_ia32_selectph_256(
291 (__mmask16)__U,308 (__mmask16)__U,
...@@ -293,33 +310,32 @@ _mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) {...@@ -293,33 +310,32 @@ _mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) {
293 (__v16hf)_mm256_setzero_ph());310 (__v16hf)_mm256_setzero_ph());
294}311}
295312
296static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_max_ph(__m128h __A,313static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
297 __m128h __B) {314_mm_max_ph(__m128h __A, __m128h __B) {
298 return (__m128h)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B);315 return (__m128h)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B);
299}316}
300317
301static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_max_ph(__m128h __W,318static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
302 __mmask8 __U,319_mm_mask_max_ph(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) {
303 __m128h __A,
304 __m128h __B) {
305 return (__m128h)__builtin_ia32_selectph_128(320 return (__m128h)__builtin_ia32_selectph_128(
306 (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B),321 (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B),
307 (__v8hf)__W);322 (__v8hf)__W);
308}323}
309324
310static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_max_ph(__mmask8 __U,325static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
311 __m128h __A,326_mm_maskz_max_ph(__mmask8 __U, __m128h __A, __m128h __B) {
312 __m128h __B) {
313 return (__m128h)__builtin_ia32_selectph_128(327 return (__m128h)__builtin_ia32_selectph_128(
314 (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B),328 (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B),
315 (__v8hf)_mm_setzero_ph());329 (__v8hf)_mm_setzero_ph());
316}330}
317331
318static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_abs_ph(__m256h __A) {332static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
333_mm256_abs_ph(__m256h __A) {
319 return (__m256h)_mm256_and_epi32(_mm256_set1_epi32(0x7FFF7FFF), (__m256i)__A);334 return (__m256h)_mm256_and_epi32(_mm256_set1_epi32(0x7FFF7FFF), (__m256i)__A);
320}335}
321336
322static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_abs_ph(__m128h __A) {337static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
338_mm_abs_ph(__m128h __A) {
323 return (__m128h)_mm_and_epi32(_mm_set1_epi32(0x7FFF7FFF), (__m128i)__A);339 return (__m128h)_mm_and_epi32(_mm_set1_epi32(0x7FFF7FFF), (__m128i)__A);
324}340}
325341
...@@ -601,7 +617,7 @@ _mm256_maskz_scalef_ph(__mmask16 __U, __m256h __A, __m256h __B) {...@@ -601,7 +617,7 @@ _mm256_maskz_scalef_ph(__mmask16 __U, __m256h __A, __m256h __B) {
601 (__mmask16)(U)))617 (__mmask16)(U)))
602618
603static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_sqrt_ph(__m128h __a) {619static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_sqrt_ph(__m128h __a) {
604 return __builtin_ia32_sqrtph((__v8hf)__a);620 return __builtin_elementwise_sqrt(__a);
605}621}
606622
607static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_sqrt_ph(__m128h __W,623static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_sqrt_ph(__m128h __W,
...@@ -618,7 +634,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sqrt_ph(__mmask8 __U,...@@ -618,7 +634,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sqrt_ph(__mmask8 __U,
618}634}
619635
620static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_sqrt_ph(__m256h __a) {636static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_sqrt_ph(__m256h __a) {
621 return (__m256h)__builtin_ia32_sqrtph256((__v16hf)__a);637 return __builtin_elementwise_sqrt(__a);
622}638}
623639
624static __inline__ __m256h __DEFAULT_FN_ATTRS256640static __inline__ __m256h __DEFAULT_FN_ATTRS256
...@@ -790,34 +806,35 @@ _mm256_maskz_cvttph_epi16(__mmask16 __U, __m256h __A) {...@@ -790,34 +806,35 @@ _mm256_maskz_cvttph_epi16(__mmask16 __U, __m256h __A) {
790 (__v16hf)__A, (__v16hi)_mm256_setzero_si256(), (__mmask16)__U);806 (__v16hf)__A, (__v16hi)_mm256_setzero_si256(), (__mmask16)__U);
791}807}
792808
793static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepi16_ph(__m128i __A) {809static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
810_mm_cvtepi16_ph(__m128i __A) {
794 return (__m128h) __builtin_convertvector((__v8hi)__A, __v8hf);811 return (__m128h) __builtin_convertvector((__v8hi)__A, __v8hf);
795}812}
796813
797static __inline__ __m128h __DEFAULT_FN_ATTRS128814static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
798_mm_mask_cvtepi16_ph(__m128h __W, __mmask8 __U, __m128i __A) {815_mm_mask_cvtepi16_ph(__m128h __W, __mmask8 __U, __m128i __A) {
799 return (__m128h)__builtin_ia32_selectph_128(816 return (__m128h)__builtin_ia32_selectph_128(
800 (__mmask8)__U, (__v8hf)_mm_cvtepi16_ph(__A), (__v8hf)__W);817 (__mmask8)__U, (__v8hf)_mm_cvtepi16_ph(__A), (__v8hf)__W);
801}818}
802819
803static __inline__ __m128h __DEFAULT_FN_ATTRS128820static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
804_mm_maskz_cvtepi16_ph(__mmask8 __U, __m128i __A) {821_mm_maskz_cvtepi16_ph(__mmask8 __U, __m128i __A) {
805 return (__m128h)__builtin_ia32_selectph_128(822 return (__m128h)__builtin_ia32_selectph_128(
806 (__mmask8)__U, (__v8hf)_mm_cvtepi16_ph(__A), (__v8hf)_mm_setzero_ph());823 (__mmask8)__U, (__v8hf)_mm_cvtepi16_ph(__A), (__v8hf)_mm_setzero_ph());
807}824}
808825
809static __inline__ __m256h __DEFAULT_FN_ATTRS256826static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
810_mm256_cvtepi16_ph(__m256i __A) {827_mm256_cvtepi16_ph(__m256i __A) {
811 return (__m256h) __builtin_convertvector((__v16hi)__A, __v16hf);828 return (__m256h) __builtin_convertvector((__v16hi)__A, __v16hf);
812}829}
813830
814static __inline__ __m256h __DEFAULT_FN_ATTRS256831static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
815_mm256_mask_cvtepi16_ph(__m256h __W, __mmask16 __U, __m256i __A) {832_mm256_mask_cvtepi16_ph(__m256h __W, __mmask16 __U, __m256i __A) {
816 return (__m256h)__builtin_ia32_selectph_256(833 return (__m256h)__builtin_ia32_selectph_256(
817 (__mmask16)__U, (__v16hf)_mm256_cvtepi16_ph(__A), (__v16hf)__W);834 (__mmask16)__U, (__v16hf)_mm256_cvtepi16_ph(__A), (__v16hf)__W);
818}835}
819836
820static __inline__ __m256h __DEFAULT_FN_ATTRS256837static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
821_mm256_maskz_cvtepi16_ph(__mmask16 __U, __m256i __A) {838_mm256_maskz_cvtepi16_ph(__mmask16 __U, __m256i __A) {
822 return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U,839 return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U,
823 (__v16hf)_mm256_cvtepi16_ph(__A),840 (__v16hf)_mm256_cvtepi16_ph(__A),
...@@ -894,34 +911,35 @@ _mm256_maskz_cvttph_epu16(__mmask16 __U, __m256h __A) {...@@ -894,34 +911,35 @@ _mm256_maskz_cvttph_epu16(__mmask16 __U, __m256h __A) {
894 (__v16hf)__A, (__v16hu)_mm256_setzero_si256(), (__mmask16)__U);911 (__v16hf)__A, (__v16hu)_mm256_setzero_si256(), (__mmask16)__U);
895}912}
896913
897static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepu16_ph(__m128i __A) {914static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
915_mm_cvtepu16_ph(__m128i __A) {
898 return (__m128h) __builtin_convertvector((__v8hu)__A, __v8hf);916 return (__m128h) __builtin_convertvector((__v8hu)__A, __v8hf);
899}917}
900918
901static __inline__ __m128h __DEFAULT_FN_ATTRS128919static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
902_mm_mask_cvtepu16_ph(__m128h __W, __mmask8 __U, __m128i __A) {920_mm_mask_cvtepu16_ph(__m128h __W, __mmask8 __U, __m128i __A) {
903 return (__m128h)__builtin_ia32_selectph_128(921 return (__m128h)__builtin_ia32_selectph_128(
904 (__mmask8)__U, (__v8hf)_mm_cvtepu16_ph(__A), (__v8hf)__W);922 (__mmask8)__U, (__v8hf)_mm_cvtepu16_ph(__A), (__v8hf)__W);
905}923}
906924
907static __inline__ __m128h __DEFAULT_FN_ATTRS128925static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
908_mm_maskz_cvtepu16_ph(__mmask8 __U, __m128i __A) {926_mm_maskz_cvtepu16_ph(__mmask8 __U, __m128i __A) {
909 return (__m128h)__builtin_ia32_selectph_128(927 return (__m128h)__builtin_ia32_selectph_128(
910 (__mmask8)__U, (__v8hf)_mm_cvtepu16_ph(__A), (__v8hf)_mm_setzero_ph());928 (__mmask8)__U, (__v8hf)_mm_cvtepu16_ph(__A), (__v8hf)_mm_setzero_ph());
911}929}
912930
913static __inline__ __m256h __DEFAULT_FN_ATTRS256931static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
914_mm256_cvtepu16_ph(__m256i __A) {932_mm256_cvtepu16_ph(__m256i __A) {
915 return (__m256h) __builtin_convertvector((__v16hu)__A, __v16hf);933 return (__m256h) __builtin_convertvector((__v16hu)__A, __v16hf);
916}934}
917935
918static __inline__ __m256h __DEFAULT_FN_ATTRS256936static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
919_mm256_mask_cvtepu16_ph(__m256h __W, __mmask16 __U, __m256i __A) {937_mm256_mask_cvtepu16_ph(__m256h __W, __mmask16 __U, __m256i __A) {
920 return (__m256h)__builtin_ia32_selectph_256(938 return (__m256h)__builtin_ia32_selectph_256(
921 (__mmask16)__U, (__v16hf)_mm256_cvtepu16_ph(__A), (__v16hf)__W);939 (__mmask16)__U, (__v16hf)_mm256_cvtepu16_ph(__A), (__v16hf)__W);
922}940}
923941
924static __inline__ __m256h __DEFAULT_FN_ATTRS256942static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
925_mm256_maskz_cvtepu16_ph(__mmask16 __U, __m256i __A) {943_mm256_maskz_cvtepu16_ph(__mmask16 __U, __m256i __A) {
926 return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U,944 return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U,
927 (__v16hf)_mm256_cvtepu16_ph(__A),945 (__v16hf)_mm256_cvtepu16_ph(__A),
...@@ -1015,18 +1033,18 @@ _mm_maskz_cvtepi32_ph(__mmask8 __U, __m128i __A) {...@@ -1015,18 +1033,18 @@ _mm_maskz_cvtepi32_ph(__mmask8 __U, __m128i __A) {
1015 (__v4si)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U);1033 (__v4si)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U);
1016}1034}
10171035
1018static __inline__ __m128h __DEFAULT_FN_ATTRS2561036static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR
1019_mm256_cvtepi32_ph(__m256i __A) {1037_mm256_cvtepi32_ph(__m256i __A) {
1020 return (__m128h) __builtin_convertvector((__v8si)__A, __v8hf);1038 return (__m128h) __builtin_convertvector((__v8si)__A, __v8hf);
1021}1039}
10221040
1023static __inline__ __m128h __DEFAULT_FN_ATTRS2561041static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR
1024_mm256_mask_cvtepi32_ph(__m128h __W, __mmask8 __U, __m256i __A) {1042_mm256_mask_cvtepi32_ph(__m128h __W, __mmask8 __U, __m256i __A) {
1025 return (__m128h)__builtin_ia32_selectph_128(1043 return (__m128h)__builtin_ia32_selectph_128(
1026 (__mmask8)__U, (__v8hf)_mm256_cvtepi32_ph(__A), (__v8hf)__W);1044 (__mmask8)__U, (__v8hf)_mm256_cvtepi32_ph(__A), (__v8hf)__W);
1027}1045}
10281046
1029static __inline__ __m128h __DEFAULT_FN_ATTRS2561047static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR
1030_mm256_maskz_cvtepi32_ph(__mmask8 __U, __m256i __A) {1048_mm256_maskz_cvtepi32_ph(__mmask8 __U, __m256i __A) {
1031 return (__m128h)__builtin_ia32_selectph_128(1049 return (__m128h)__builtin_ia32_selectph_128(
1032 (__mmask8)__U, (__v8hf)_mm256_cvtepi32_ph(__A), (__v8hf)_mm_setzero_ph());1050 (__mmask8)__U, (__v8hf)_mm256_cvtepi32_ph(__A), (__v8hf)_mm_setzero_ph());
...@@ -1049,18 +1067,18 @@ _mm_maskz_cvtepu32_ph(__mmask8 __U, __m128i __A) {...@@ -1049,18 +1067,18 @@ _mm_maskz_cvtepu32_ph(__mmask8 __U, __m128i __A) {
1049 (__v4su)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U);1067 (__v4su)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U);
1050}1068}
10511069
1052static __inline__ __m128h __DEFAULT_FN_ATTRS2561070static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR
1053_mm256_cvtepu32_ph(__m256i __A) {1071_mm256_cvtepu32_ph(__m256i __A) {
1054 return (__m128h) __builtin_convertvector((__v8su)__A, __v8hf);1072 return (__m128h) __builtin_convertvector((__v8su)__A, __v8hf);
1055}1073}
10561074
1057static __inline__ __m128h __DEFAULT_FN_ATTRS2561075static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR
1058_mm256_mask_cvtepu32_ph(__m128h __W, __mmask8 __U, __m256i __A) {1076_mm256_mask_cvtepu32_ph(__m128h __W, __mmask8 __U, __m256i __A) {
1059 return (__m128h)__builtin_ia32_selectph_128(1077 return (__m128h)__builtin_ia32_selectph_128(
1060 (__mmask8)__U, (__v8hf)_mm256_cvtepu32_ph(__A), (__v8hf)__W);1078 (__mmask8)__U, (__v8hf)_mm256_cvtepu32_ph(__A), (__v8hf)__W);
1061}1079}
10621080
1063static __inline__ __m128h __DEFAULT_FN_ATTRS2561081static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR
1064_mm256_maskz_cvtepu32_ph(__mmask8 __U, __m256i __A) {1082_mm256_maskz_cvtepu32_ph(__mmask8 __U, __m256i __A) {
1065 return (__m128h)__builtin_ia32_selectph_128(1083 return (__m128h)__builtin_ia32_selectph_128(
1066 (__mmask8)__U, (__v8hf)_mm256_cvtepu32_ph(__A), (__v8hf)_mm_setzero_ph());1084 (__mmask8)__U, (__v8hf)_mm256_cvtepu32_ph(__A), (__v8hf)_mm_setzero_ph());
...@@ -1419,8 +1437,8 @@ _mm256_maskz_cvtxps_ph(__mmask8 __U, __m256 __A) {...@@ -1419,8 +1437,8 @@ _mm256_maskz_cvtxps_ph(__mmask8 __U, __m256 __A) {
1419static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmadd_ph(__m128h __A,1437static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmadd_ph(__m128h __A,
1420 __m128h __B,1438 __m128h __B,
1421 __m128h __C) {1439 __m128h __C) {
1422 return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B,1440 return (__m128h)__builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B,
1423 (__v8hf)__C);1441 (__v8hf)__C);
1424}1442}
14251443
1426static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A,1444static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A,
...@@ -1429,7 +1447,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A,...@@ -1429,7 +1447,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A,
1429 __m128h __C) {1447 __m128h __C) {
1430 return (__m128h)__builtin_ia32_selectph_128(1448 return (__m128h)__builtin_ia32_selectph_128(
1431 (__mmask8)__U,1449 (__mmask8)__U,
1432 __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C),1450 __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C),
1433 (__v8hf)__A);1451 (__v8hf)__A);
1434}1452}
14351453
...@@ -1437,7 +1455,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128...@@ -1437,7 +1455,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128
1437_mm_mask3_fmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {1455_mm_mask3_fmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {
1438 return (__m128h)__builtin_ia32_selectph_128(1456 return (__m128h)__builtin_ia32_selectph_128(
1439 (__mmask8)__U,1457 (__mmask8)__U,
1440 __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C),1458 __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C),
1441 (__v8hf)__C);1459 (__v8hf)__C);
1442}1460}
14431461
...@@ -1445,15 +1463,15 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128...@@ -1445,15 +1463,15 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128
1445_mm_maskz_fmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {1463_mm_maskz_fmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {
1446 return (__m128h)__builtin_ia32_selectph_128(1464 return (__m128h)__builtin_ia32_selectph_128(
1447 (__mmask8)__U,1465 (__mmask8)__U,
1448 __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C),1466 __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C),
1449 (__v8hf)_mm_setzero_ph());1467 (__v8hf)_mm_setzero_ph());
1450}1468}
14511469
1452static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmsub_ph(__m128h __A,1470static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmsub_ph(__m128h __A,
1453 __m128h __B,1471 __m128h __B,
1454 __m128h __C) {1472 __m128h __C) {
1455 return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B,1473 return (__m128h)__builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B,
1456 -(__v8hf)__C);1474 -(__v8hf)__C);
1457}1475}
14581476
1459static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmsub_ph(__m128h __A,1477static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmsub_ph(__m128h __A,
...@@ -1476,7 +1494,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128...@@ -1476,7 +1494,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128
1476_mm_mask3_fnmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {1494_mm_mask3_fnmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {
1477 return (__m128h)__builtin_ia32_selectph_128(1495 return (__m128h)__builtin_ia32_selectph_128(
1478 (__mmask8)__U,1496 (__mmask8)__U,
1479 __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C),1497 __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C),
1480 (__v8hf)__C);1498 (__v8hf)__C);
1481}1499}
14821500
...@@ -1484,7 +1502,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128...@@ -1484,7 +1502,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128
1484_mm_maskz_fnmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {1502_mm_maskz_fnmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {
1485 return (__m128h)__builtin_ia32_selectph_128(1503 return (__m128h)__builtin_ia32_selectph_128(
1486 (__mmask8)__U,1504 (__mmask8)__U,
1487 __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C),1505 __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C),
1488 (__v8hf)_mm_setzero_ph());1506 (__v8hf)_mm_setzero_ph());
1489}1507}
14901508
...@@ -1492,22 +1510,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128...@@ -1492,22 +1510,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128
1492_mm_maskz_fnmsub_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {1510_mm_maskz_fnmsub_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) {
1493 return (__m128h)__builtin_ia32_selectph_128(1511 return (__m128h)__builtin_ia32_selectph_128(
1494 (__mmask8)__U,1512 (__mmask8)__U,
1495 __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, -(__v8hf)__C),1513 __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, -(__v8hf)__C),
1496 (__v8hf)_mm_setzero_ph());1514 (__v8hf)_mm_setzero_ph());
1497}1515}
14981516
1499static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmadd_ph(__m256h __A,1517static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmadd_ph(__m256h __A,
1500 __m256h __B,1518 __m256h __B,
1501 __m256h __C) {1519 __m256h __C) {
1502 return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B,1520 return (__m256h)__builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B,
1503 (__v16hf)__C);1521 (__v16hf)__C);
1504}1522}
15051523
1506static __inline__ __m256h __DEFAULT_FN_ATTRS2561524static __inline__ __m256h __DEFAULT_FN_ATTRS256
1507_mm256_mask_fmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) {1525_mm256_mask_fmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) {
1508 return (__m256h)__builtin_ia32_selectph_256(1526 return (__m256h)__builtin_ia32_selectph_256(
1509 (__mmask16)__U,1527 (__mmask16)__U,
1510 __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C),1528 __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C),
1511 (__v16hf)__A);1529 (__v16hf)__A);
1512}1530}
15131531
...@@ -1515,7 +1533,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256...@@ -1515,7 +1533,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
1515_mm256_mask3_fmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {1533_mm256_mask3_fmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {
1516 return (__m256h)__builtin_ia32_selectph_256(1534 return (__m256h)__builtin_ia32_selectph_256(
1517 (__mmask16)__U,1535 (__mmask16)__U,
1518 __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C),1536 __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C),
1519 (__v16hf)__C);1537 (__v16hf)__C);
1520}1538}
15211539
...@@ -1523,22 +1541,22 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256...@@ -1523,22 +1541,22 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
1523_mm256_maskz_fmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) {1541_mm256_maskz_fmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) {
1524 return (__m256h)__builtin_ia32_selectph_256(1542 return (__m256h)__builtin_ia32_selectph_256(
1525 (__mmask16)__U,1543 (__mmask16)__U,
1526 __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C),1544 __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C),
1527 (__v16hf)_mm256_setzero_ph());1545 (__v16hf)_mm256_setzero_ph());
1528}1546}
15291547
1530static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmsub_ph(__m256h __A,1548static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmsub_ph(__m256h __A,
1531 __m256h __B,1549 __m256h __B,
1532 __m256h __C) {1550 __m256h __C) {
1533 return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B,1551 return (__m256h)__builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B,
1534 -(__v16hf)__C);1552 -(__v16hf)__C);
1535}1553}
15361554
1537static __inline__ __m256h __DEFAULT_FN_ATTRS2561555static __inline__ __m256h __DEFAULT_FN_ATTRS256
1538_mm256_mask_fmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) {1556_mm256_mask_fmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) {
1539 return (__m256h)__builtin_ia32_selectph_256(1557 return (__m256h)__builtin_ia32_selectph_256(
1540 (__mmask16)__U,1558 (__mmask16)__U,
1541 __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C),1559 __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C),
1542 (__v16hf)__A);1560 (__v16hf)__A);
1543}1561}
15441562
...@@ -1546,7 +1564,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256...@@ -1546,7 +1564,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
1546_mm256_maskz_fmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) {1564_mm256_maskz_fmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) {
1547 return (__m256h)__builtin_ia32_selectph_256(1565 return (__m256h)__builtin_ia32_selectph_256(
1548 (__mmask16)__U,1566 (__mmask16)__U,
1549 __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C),1567 __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C),
1550 (__v16hf)_mm256_setzero_ph());1568 (__v16hf)_mm256_setzero_ph());
1551}1569}
15521570
...@@ -1554,7 +1572,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256...@@ -1554,7 +1572,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
1554_mm256_mask3_fnmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {1572_mm256_mask3_fnmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {
1555 return (__m256h)__builtin_ia32_selectph_256(1573 return (__m256h)__builtin_ia32_selectph_256(
1556 (__mmask16)__U,1574 (__mmask16)__U,
1557 __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C),1575 __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C),
1558 (__v16hf)__C);1576 (__v16hf)__C);
1559}1577}
15601578
...@@ -1562,7 +1580,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256...@@ -1562,7 +1580,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
1562_mm256_maskz_fnmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) {1580_mm256_maskz_fnmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) {
1563 return (__m256h)__builtin_ia32_selectph_256(1581 return (__m256h)__builtin_ia32_selectph_256(
1564 (__mmask16)__U,1582 (__mmask16)__U,
1565 __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C),1583 __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C),
1566 (__v16hf)_mm256_setzero_ph());1584 (__v16hf)_mm256_setzero_ph());
1567}1585}
15681586
...@@ -1570,7 +1588,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256...@@ -1570,7 +1588,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
1570_mm256_maskz_fnmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) {1588_mm256_maskz_fnmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) {
1571 return (__m256h)__builtin_ia32_selectph_256(1589 return (__m256h)__builtin_ia32_selectph_256(
1572 (__mmask16)__U,1590 (__mmask16)__U,
1573 __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, -(__v16hf)__C),1591 __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, -(__v16hf)__C),
1574 (__v16hf)_mm256_setzero_ph());1592 (__v16hf)_mm256_setzero_ph());
1575}1593}
15761594
...@@ -1684,7 +1702,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128...@@ -1684,7 +1702,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128
1684_mm_mask3_fmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {1702_mm_mask3_fmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {
1685 return (__m128h)__builtin_ia32_selectph_128(1703 return (__m128h)__builtin_ia32_selectph_128(
1686 (__mmask8)__U,1704 (__mmask8)__U,
1687 __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C),1705 __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C),
1688 (__v8hf)__C);1706 (__v8hf)__C);
1689}1707}
16901708
...@@ -1692,7 +1710,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256...@@ -1692,7 +1710,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
1692_mm256_mask3_fmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {1710_mm256_mask3_fmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {
1693 return (__m256h)__builtin_ia32_selectph_256(1711 return (__m256h)__builtin_ia32_selectph_256(
1694 (__mmask16)__U,1712 (__mmask16)__U,
1695 __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C),1713 __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C),
1696 (__v16hf)__C);1714 (__v16hf)__C);
1697}1715}
16981716
...@@ -1715,45 +1733,45 @@ _mm256_mask3_fmsubadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {...@@ -1715,45 +1733,45 @@ _mm256_mask3_fmsubadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {
1715static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmadd_ph(__m128h __A,1733static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmadd_ph(__m128h __A,
1716 __m128h __B,1734 __m128h __B,
1717 __m128h __C) {1735 __m128h __C) {
1718 return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B,1736 return (__m128h)__builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B,
1719 (__v8hf)__C);1737 (__v8hf)__C);
1720}1738}
17211739
1722static __inline__ __m128h __DEFAULT_FN_ATTRS1281740static __inline__ __m128h __DEFAULT_FN_ATTRS128
1723_mm_mask_fnmadd_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) {1741_mm_mask_fnmadd_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) {
1724 return (__m128h)__builtin_ia32_selectph_128(1742 return (__m128h)__builtin_ia32_selectph_128(
1725 (__mmask8)__U,1743 (__mmask8)__U,
1726 __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, (__v8hf)__C),1744 __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, (__v8hf)__C),
1727 (__v8hf)__A);1745 (__v8hf)__A);
1728}1746}
17291747
1730static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmadd_ph(__m256h __A,1748static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmadd_ph(__m256h __A,
1731 __m256h __B,1749 __m256h __B,
1732 __m256h __C) {1750 __m256h __C) {
1733 return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B,1751 return (__m256h)__builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B,
1734 (__v16hf)__C);1752 (__v16hf)__C);
1735}1753}
17361754
1737static __inline__ __m256h __DEFAULT_FN_ATTRS2561755static __inline__ __m256h __DEFAULT_FN_ATTRS256
1738_mm256_mask_fnmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) {1756_mm256_mask_fnmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) {
1739 return (__m256h)__builtin_ia32_selectph_256(1757 return (__m256h)__builtin_ia32_selectph_256(
1740 (__mmask16)__U,1758 (__mmask16)__U,
1741 __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, (__v16hf)__C),1759 __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, (__v16hf)__C),
1742 (__v16hf)__A);1760 (__v16hf)__A);
1743}1761}
17441762
1745static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmsub_ph(__m128h __A,1763static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmsub_ph(__m128h __A,
1746 __m128h __B,1764 __m128h __B,
1747 __m128h __C) {1765 __m128h __C) {
1748 return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B,1766 return (__m128h)__builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B,
1749 -(__v8hf)__C);1767 -(__v8hf)__C);
1750}1768}
17511769
1752static __inline__ __m128h __DEFAULT_FN_ATTRS1281770static __inline__ __m128h __DEFAULT_FN_ATTRS128
1753_mm_mask_fnmsub_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) {1771_mm_mask_fnmsub_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) {
1754 return (__m128h)__builtin_ia32_selectph_128(1772 return (__m128h)__builtin_ia32_selectph_128(
1755 (__mmask8)__U,1773 (__mmask8)__U,
1756 __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C),1774 __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C),
1757 (__v8hf)__A);1775 (__v8hf)__A);
1758}1776}
17591777
...@@ -1761,22 +1779,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128...@@ -1761,22 +1779,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128
1761_mm_mask3_fnmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {1779_mm_mask3_fnmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {
1762 return (__m128h)__builtin_ia32_selectph_128(1780 return (__m128h)__builtin_ia32_selectph_128(
1763 (__mmask8)__U,1781 (__mmask8)__U,
1764 __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C),1782 __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C),
1765 (__v8hf)__C);1783 (__v8hf)__C);
1766}1784}
17671785
1768static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmsub_ph(__m256h __A,1786static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmsub_ph(__m256h __A,
1769 __m256h __B,1787 __m256h __B,
1770 __m256h __C) {1788 __m256h __C) {
1771 return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B,1789 return (__m256h)__builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B,
1772 -(__v16hf)__C);1790 -(__v16hf)__C);
1773}1791}
17741792
1775static __inline__ __m256h __DEFAULT_FN_ATTRS2561793static __inline__ __m256h __DEFAULT_FN_ATTRS256
1776_mm256_mask_fnmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) {1794_mm256_mask_fnmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) {
1777 return (__m256h)__builtin_ia32_selectph_256(1795 return (__m256h)__builtin_ia32_selectph_256(
1778 (__mmask16)__U,1796 (__mmask16)__U,
1779 __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C),1797 __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C),
1780 (__v16hf)__A);1798 (__v16hf)__A);
1781}1799}
17821800
...@@ -1784,7 +1802,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256...@@ -1784,7 +1802,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256
1784_mm256_mask3_fnmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {1802_mm256_mask3_fnmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) {
1785 return (__m256h)__builtin_ia32_selectph_256(1803 return (__m256h)__builtin_ia32_selectph_256(
1786 (__mmask16)__U,1804 (__mmask16)__U,
1787 __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C),1805 __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C),
1788 (__v16hf)__C);1806 (__v16hf)__C);
1789}1807}
17901808
...@@ -1974,37 +1992,36 @@ _mm256_maskz_fmadd_pch(__mmask8 __U, __m256h __A, __m256h __B, __m256h __C) {...@@ -1974,37 +1992,36 @@ _mm256_maskz_fmadd_pch(__mmask8 __U, __m256h __A, __m256h __B, __m256h __C) {
1974 (__v8sf)__C, (__mmask8)__U);1992 (__v8sf)__C, (__mmask8)__U);
1975}1993}
19761994
1977static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_blend_ph(__mmask8 __U,1995static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
1978 __m128h __A,1996_mm_mask_blend_ph(__mmask8 __U, __m128h __A, __m128h __W) {
1979 __m128h __W) {
1980 return (__m128h)__builtin_ia32_selectph_128((__mmask8)__U, (__v8hf)__W,1997 return (__m128h)__builtin_ia32_selectph_128((__mmask8)__U, (__v8hf)__W,
1981 (__v8hf)__A);1998 (__v8hf)__A);
1982}1999}
19832000
1984static __inline__ __m256h __DEFAULT_FN_ATTRS2562001static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
1985_mm256_mask_blend_ph(__mmask16 __U, __m256h __A, __m256h __W) {2002_mm256_mask_blend_ph(__mmask16 __U, __m256h __A, __m256h __W) {
1986 return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, (__v16hf)__W,2003 return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, (__v16hf)__W,
1987 (__v16hf)__A);2004 (__v16hf)__A);
1988}2005}
19892006
1990static __inline__ __m128h __DEFAULT_FN_ATTRS1282007static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
1991_mm_permutex2var_ph(__m128h __A, __m128i __I, __m128h __B) {2008_mm_permutex2var_ph(__m128h __A, __m128i __I, __m128h __B) {
1992 return (__m128h)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I,2009 return (__m128h)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I,
1993 (__v8hi)__B);2010 (__v8hi)__B);
1994}2011}
19952012
1996static __inline__ __m256h __DEFAULT_FN_ATTRS2562013static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
1997_mm256_permutex2var_ph(__m256h __A, __m256i __I, __m256h __B) {2014_mm256_permutex2var_ph(__m256h __A, __m256i __I, __m256h __B) {
1998 return (__m256h)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I,2015 return (__m256h)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I,
1999 (__v16hi)__B);2016 (__v16hi)__B);
2000}2017}
20012018
2002static __inline__ __m128h __DEFAULT_FN_ATTRS1282019static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR
2003_mm_permutexvar_ph(__m128i __A, __m128h __B) {2020_mm_permutexvar_ph(__m128i __A, __m128h __B) {
2004 return (__m128h)__builtin_ia32_permvarhi128((__v8hi)__B, (__v8hi)__A);2021 return (__m128h)__builtin_ia32_permvarhi128((__v8hi)__B, (__v8hi)__A);
2005}2022}
20062023
2007static __inline__ __m256h __DEFAULT_FN_ATTRS2562024static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR
2008_mm256_permutexvar_ph(__m256i __A, __m256h __B) {2025_mm256_permutexvar_ph(__m256i __A, __m256h __B) {
2009 return (__m256h)__builtin_ia32_permvarhi256((__v16hi)__B, (__v16hi)__A);2026 return (__m256h)__builtin_ia32_permvarhi256((__v16hi)__B, (__v16hi)__A);
2010}2027}
...@@ -2066,6 +2083,8 @@ _mm_reduce_min_ph(__m128h __V) {...@@ -2066,6 +2083,8 @@ _mm_reduce_min_ph(__m128h __V) {
20662083
2067#undef __DEFAULT_FN_ATTRS1282084#undef __DEFAULT_FN_ATTRS128
2068#undef __DEFAULT_FN_ATTRS2562085#undef __DEFAULT_FN_ATTRS256
2086#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
2087#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
20692088
2070#endif2089#endif
2071#endif2090#endif
lib/include/avx512vlintrin.h+945-1299
...@@ -15,14 +15,20 @@...@@ -15,14 +15,20 @@
15#define __AVX512VLINTRIN_H15#define __AVX512VLINTRIN_H
1616
17#define __DEFAULT_FN_ATTRS128 \17#define __DEFAULT_FN_ATTRS128 \
18 __attribute__((__always_inline__, __nodebug__, \18 __attribute__((__always_inline__, __nodebug__, __target__("avx512vl"), \
19 __target__("avx512vl,no-evex512"), \
20 __min_vector_width__(128)))19 __min_vector_width__(128)))
21#define __DEFAULT_FN_ATTRS256 \20#define __DEFAULT_FN_ATTRS256 \
22 __attribute__((__always_inline__, __nodebug__, \21 __attribute__((__always_inline__, __nodebug__, __target__("avx512vl"), \
23 __target__("avx512vl,no-evex512"), \
24 __min_vector_width__(256)))22 __min_vector_width__(256)))
2523
24#if defined(__cplusplus) && (__cplusplus >= 201103L)
25#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
26#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
27#else
28#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
29#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
30#endif
31
26typedef short __v2hi __attribute__((__vector_size__(4)));32typedef short __v2hi __attribute__((__vector_size__(4)));
27typedef char __v4qi __attribute__((__vector_size__(4)));33typedef char __v4qi __attribute__((__vector_size__(4)));
28typedef char __v2qi __attribute__((__vector_size__(2)));34typedef char __v2qi __attribute__((__vector_size__(2)));
...@@ -229,209 +235,183 @@ typedef char __v2qi __attribute__((__vector_size__(2)));...@@ -229,209 +235,183 @@ typedef char __v2qi __attribute__((__vector_size__(2)));
229#define _mm256_mask_cmpneq_epu64_mask(k, A, B) \235#define _mm256_mask_cmpneq_epu64_mask(k, A, B) \
230 _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE)236 _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE)
231237
232static __inline__ __m256i __DEFAULT_FN_ATTRS256238static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
233_mm256_mask_add_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)239_mm256_mask_add_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
234{
235 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,240 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
236 (__v8si)_mm256_add_epi32(__A, __B),241 (__v8si)_mm256_add_epi32(__A, __B),
237 (__v8si)__W);242 (__v8si)__W);
238}243}
239244
240static __inline__ __m256i __DEFAULT_FN_ATTRS256245static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
241_mm256_maskz_add_epi32(__mmask8 __U, __m256i __A, __m256i __B)246_mm256_maskz_add_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
242{
243 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,247 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
244 (__v8si)_mm256_add_epi32(__A, __B),248 (__v8si)_mm256_add_epi32(__A, __B),
245 (__v8si)_mm256_setzero_si256());249 (__v8si)_mm256_setzero_si256());
246}250}
247251
248static __inline__ __m256i __DEFAULT_FN_ATTRS256252static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
249_mm256_mask_add_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)253_mm256_mask_add_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
250{
251 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,254 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
252 (__v4di)_mm256_add_epi64(__A, __B),255 (__v4di)_mm256_add_epi64(__A, __B),
253 (__v4di)__W);256 (__v4di)__W);
254}257}
255258
256static __inline__ __m256i __DEFAULT_FN_ATTRS256259static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
257_mm256_maskz_add_epi64(__mmask8 __U, __m256i __A, __m256i __B)260_mm256_maskz_add_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
258{
259 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,261 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
260 (__v4di)_mm256_add_epi64(__A, __B),262 (__v4di)_mm256_add_epi64(__A, __B),
261 (__v4di)_mm256_setzero_si256());263 (__v4di)_mm256_setzero_si256());
262}264}
263265
264static __inline__ __m256i __DEFAULT_FN_ATTRS256266static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
265_mm256_mask_sub_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)267_mm256_mask_sub_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
266{
267 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,268 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
268 (__v8si)_mm256_sub_epi32(__A, __B),269 (__v8si)_mm256_sub_epi32(__A, __B),
269 (__v8si)__W);270 (__v8si)__W);
270}271}
271272
272static __inline__ __m256i __DEFAULT_FN_ATTRS256273static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
273_mm256_maskz_sub_epi32(__mmask8 __U, __m256i __A, __m256i __B)274_mm256_maskz_sub_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
274{
275 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,275 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
276 (__v8si)_mm256_sub_epi32(__A, __B),276 (__v8si)_mm256_sub_epi32(__A, __B),
277 (__v8si)_mm256_setzero_si256());277 (__v8si)_mm256_setzero_si256());
278}278}
279279
280static __inline__ __m256i __DEFAULT_FN_ATTRS256280static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
281_mm256_mask_sub_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)281_mm256_mask_sub_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) {
282{
283 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,282 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
284 (__v4di)_mm256_sub_epi64(__A, __B),283 (__v4di)_mm256_sub_epi64(__A, __B),
285 (__v4di)__W);284 (__v4di)__W);
286}285}
287286
288static __inline__ __m256i __DEFAULT_FN_ATTRS256287static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
289_mm256_maskz_sub_epi64(__mmask8 __U, __m256i __A, __m256i __B)288_mm256_maskz_sub_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
290{
291 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,289 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
292 (__v4di)_mm256_sub_epi64(__A, __B),290 (__v4di)_mm256_sub_epi64(__A, __B),
293 (__v4di)_mm256_setzero_si256());291 (__v4di)_mm256_setzero_si256());
294}292}
295293
296static __inline__ __m128i __DEFAULT_FN_ATTRS128294static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
297_mm_mask_add_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)295_mm_mask_add_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
298{
299 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,296 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
300 (__v4si)_mm_add_epi32(__A, __B),297 (__v4si)_mm_add_epi32(__A, __B),
301 (__v4si)__W);298 (__v4si)__W);
302}299}
303300
304static __inline__ __m128i __DEFAULT_FN_ATTRS128301static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
305_mm_maskz_add_epi32(__mmask8 __U, __m128i __A, __m128i __B)302_mm_maskz_add_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
306{
307 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,303 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
308 (__v4si)_mm_add_epi32(__A, __B),304 (__v4si)_mm_add_epi32(__A, __B),
309 (__v4si)_mm_setzero_si128());305 (__v4si)_mm_setzero_si128());
310}306}
311307
312static __inline__ __m128i __DEFAULT_FN_ATTRS128308static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
313_mm_mask_add_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)309_mm_mask_add_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
314{
315 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,310 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
316 (__v2di)_mm_add_epi64(__A, __B),311 (__v2di)_mm_add_epi64(__A, __B),
317 (__v2di)__W);312 (__v2di)__W);
318}313}
319314
320static __inline__ __m128i __DEFAULT_FN_ATTRS128315static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
321_mm_maskz_add_epi64(__mmask8 __U, __m128i __A, __m128i __B)316_mm_maskz_add_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
322{
323 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,317 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
324 (__v2di)_mm_add_epi64(__A, __B),318 (__v2di)_mm_add_epi64(__A, __B),
325 (__v2di)_mm_setzero_si128());319 (__v2di)_mm_setzero_si128());
326}320}
327321
328static __inline__ __m128i __DEFAULT_FN_ATTRS128322static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
329_mm_mask_sub_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)323_mm_mask_sub_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
330{
331 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,324 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
332 (__v4si)_mm_sub_epi32(__A, __B),325 (__v4si)_mm_sub_epi32(__A, __B),
333 (__v4si)__W);326 (__v4si)__W);
334}327}
335328
336static __inline__ __m128i __DEFAULT_FN_ATTRS128329static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
337_mm_maskz_sub_epi32(__mmask8 __U, __m128i __A, __m128i __B)330_mm_maskz_sub_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
338{
339 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,331 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
340 (__v4si)_mm_sub_epi32(__A, __B),332 (__v4si)_mm_sub_epi32(__A, __B),
341 (__v4si)_mm_setzero_si128());333 (__v4si)_mm_setzero_si128());
342}334}
343335
344static __inline__ __m128i __DEFAULT_FN_ATTRS128336static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
345_mm_mask_sub_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)337_mm_mask_sub_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
346{
347 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,338 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
348 (__v2di)_mm_sub_epi64(__A, __B),339 (__v2di)_mm_sub_epi64(__A, __B),
349 (__v2di)__W);340 (__v2di)__W);
350}341}
351342
352static __inline__ __m128i __DEFAULT_FN_ATTRS128343static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
353_mm_maskz_sub_epi64(__mmask8 __U, __m128i __A, __m128i __B)344_mm_maskz_sub_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
354{
355 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,345 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
356 (__v2di)_mm_sub_epi64(__A, __B),346 (__v2di)_mm_sub_epi64(__A, __B),
357 (__v2di)_mm_setzero_si128());347 (__v2di)_mm_setzero_si128());
358}348}
359349
360static __inline__ __m256i __DEFAULT_FN_ATTRS256350static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
361_mm256_mask_mul_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)351_mm256_mask_mul_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) {
362{
363 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,352 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
364 (__v4di)_mm256_mul_epi32(__X, __Y),353 (__v4di)_mm256_mul_epi32(__X, __Y),
365 (__v4di)__W);354 (__v4di)__W);
366}355}
367356
368static __inline__ __m256i __DEFAULT_FN_ATTRS256357static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
369_mm256_maskz_mul_epi32(__mmask8 __M, __m256i __X, __m256i __Y)358_mm256_maskz_mul_epi32(__mmask8 __M, __m256i __X, __m256i __Y) {
370{
371 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,359 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
372 (__v4di)_mm256_mul_epi32(__X, __Y),360 (__v4di)_mm256_mul_epi32(__X, __Y),
373 (__v4di)_mm256_setzero_si256());361 (__v4di)_mm256_setzero_si256());
374}362}
375363
376static __inline__ __m128i __DEFAULT_FN_ATTRS128364static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
377_mm_mask_mul_epi32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)365_mm_mask_mul_epi32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) {
378{
379 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,366 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
380 (__v2di)_mm_mul_epi32(__X, __Y),367 (__v2di)_mm_mul_epi32(__X, __Y),
381 (__v2di)__W);368 (__v2di)__W);
382}369}
383370
384static __inline__ __m128i __DEFAULT_FN_ATTRS128371static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
385_mm_maskz_mul_epi32(__mmask8 __M, __m128i __X, __m128i __Y)372_mm_maskz_mul_epi32(__mmask8 __M, __m128i __X, __m128i __Y) {
386{
387 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,373 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
388 (__v2di)_mm_mul_epi32(__X, __Y),374 (__v2di)_mm_mul_epi32(__X, __Y),
389 (__v2di)_mm_setzero_si128());375 (__v2di)_mm_setzero_si128());
390}376}
391377
392static __inline__ __m256i __DEFAULT_FN_ATTRS256378static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
393_mm256_mask_mul_epu32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)379_mm256_mask_mul_epu32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) {
394{
395 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,380 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
396 (__v4di)_mm256_mul_epu32(__X, __Y),381 (__v4di)_mm256_mul_epu32(__X, __Y),
397 (__v4di)__W);382 (__v4di)__W);
398}383}
399384
400static __inline__ __m256i __DEFAULT_FN_ATTRS256385static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
401_mm256_maskz_mul_epu32(__mmask8 __M, __m256i __X, __m256i __Y)386_mm256_maskz_mul_epu32(__mmask8 __M, __m256i __X, __m256i __Y) {
402{
403 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,387 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
404 (__v4di)_mm256_mul_epu32(__X, __Y),388 (__v4di)_mm256_mul_epu32(__X, __Y),
405 (__v4di)_mm256_setzero_si256());389 (__v4di)_mm256_setzero_si256());
406}390}
407391
408static __inline__ __m128i __DEFAULT_FN_ATTRS128392static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
409_mm_mask_mul_epu32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)393_mm_mask_mul_epu32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) {
410{
411 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,394 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
412 (__v2di)_mm_mul_epu32(__X, __Y),395 (__v2di)_mm_mul_epu32(__X, __Y),
413 (__v2di)__W);396 (__v2di)__W);
414}397}
415398
416static __inline__ __m128i __DEFAULT_FN_ATTRS128399static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
417_mm_maskz_mul_epu32(__mmask8 __M, __m128i __X, __m128i __Y)400_mm_maskz_mul_epu32(__mmask8 __M, __m128i __X, __m128i __Y) {
418{
419 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,401 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
420 (__v2di)_mm_mul_epu32(__X, __Y),402 (__v2di)_mm_mul_epu32(__X, __Y),
421 (__v2di)_mm_setzero_si128());403 (__v2di)_mm_setzero_si128());
422}404}
423405
424static __inline__ __m256i __DEFAULT_FN_ATTRS256406static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR
425_mm256_maskz_mullo_epi32(__mmask8 __M, __m256i __A, __m256i __B)407_mm256_maskz_mullo_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
426{
427 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,408 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
428 (__v8si)_mm256_mullo_epi32(__A, __B),409 (__v8si)_mm256_mullo_epi32(__A, __B),
429 (__v8si)_mm256_setzero_si256());410 (__v8si)_mm256_setzero_si256());
430}411}
431412
432static __inline__ __m256i __DEFAULT_FN_ATTRS256413static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR
433_mm256_mask_mullo_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B)414_mm256_mask_mullo_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
434{
435 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,415 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
436 (__v8si)_mm256_mullo_epi32(__A, __B),416 (__v8si)_mm256_mullo_epi32(__A, __B),
437 (__v8si)__W);417 (__v8si)__W);
...@@ -453,9 +433,8 @@ _mm_mask_mullo_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)...@@ -453,9 +433,8 @@ _mm_mask_mullo_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B)
453 (__v4si)__W);433 (__v4si)__W);
454}434}
455435
456static __inline__ __m256i __DEFAULT_FN_ATTRS256436static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
457_mm256_and_epi32(__m256i __a, __m256i __b)437_mm256_and_epi32(__m256i __a, __m256i __b) {
458{
459 return (__m256i)((__v8su)__a & (__v8su)__b);438 return (__m256i)((__v8su)__a & (__v8su)__b);
460}439}
461440
...@@ -473,9 +452,8 @@ _mm256_maskz_and_epi32(__mmask8 __U, __m256i __A, __m256i __B)...@@ -473,9 +452,8 @@ _mm256_maskz_and_epi32(__mmask8 __U, __m256i __A, __m256i __B)
473 return (__m256i)_mm256_mask_and_epi32(_mm256_setzero_si256(), __U, __A, __B);452 return (__m256i)_mm256_mask_and_epi32(_mm256_setzero_si256(), __U, __A, __B);
474}453}
475454
476static __inline__ __m128i __DEFAULT_FN_ATTRS128455static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
477_mm_and_epi32(__m128i __a, __m128i __b)456_mm_and_epi32(__m128i __a, __m128i __b) {
478{
479 return (__m128i)((__v4su)__a & (__v4su)__b);457 return (__m128i)((__v4su)__a & (__v4su)__b);
480}458}
481459
...@@ -896,329 +874,312 @@ _mm_maskz_xor_epi64(__mmask8 __U, __m128i __A, __m128i __B)...@@ -896,329 +874,312 @@ _mm_maskz_xor_epi64(__mmask8 __U, __m128i __A, __m128i __B)
896 (__v2df)(__m128d)(b), (int)(p), \874 (__v2df)(__m128d)(b), (int)(p), \
897 (__mmask8)(m)))875 (__mmask8)(m)))
898876
899static __inline__ __m128d __DEFAULT_FN_ATTRS128877static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
900_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)878_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
901{879 return (__m128d)__builtin_ia32_selectpd_128(
902 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,880 (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C), (__v2df)__A);
903 __builtin_ia32_vfmaddpd ((__v2df) __A,
904 (__v2df) __B,
905 (__v2df) __C),
906 (__v2df) __A);
907}881}
908882
909static __inline__ __m128d __DEFAULT_FN_ATTRS128883static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
910_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)884_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) {
911{885 return (__m128d)__builtin_ia32_selectpd_128(
912 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,886 (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C), (__v2df)__C);
913 __builtin_ia32_vfmaddpd ((__v2df) __A,
914 (__v2df) __B,
915 (__v2df) __C),
916 (__v2df) __C);
917}887}
918888
919static __inline__ __m128d __DEFAULT_FN_ATTRS128889static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
920_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)890_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) {
921{891 return (__m128d)__builtin_ia32_selectpd_128(
922 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,892 (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C),
923 __builtin_ia32_vfmaddpd ((__v2df) __A,893 (__v2df)_mm_setzero_pd());
924 (__v2df) __B,
925 (__v2df) __C),
926 (__v2df)_mm_setzero_pd());
927}894}
928895
929static __inline__ __m128d __DEFAULT_FN_ATTRS128896static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
930_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)897_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
931{898 return (__m128d)__builtin_ia32_selectpd_128(
932 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,899 (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C), (__v2df)__A);
933 __builtin_ia32_vfmaddpd ((__v2df) __A,
934 (__v2df) __B,
935 -(__v2df) __C),
936 (__v2df) __A);
937}900}
938901
939static __inline__ __m128d __DEFAULT_FN_ATTRS128902static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
940_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)903_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) {
941{904 return (__m128d)__builtin_ia32_selectpd_128(
942 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,905 (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C), (__v2df)__C);
943 __builtin_ia32_vfmaddpd ((__v2df) __A,
944 (__v2df) __B,
945 -(__v2df) __C),
946 (__v2df)_mm_setzero_pd());
947}906}
948907
949static __inline__ __m128d __DEFAULT_FN_ATTRS128908static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
950_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)909_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) {
951{910 return (__m128d)__builtin_ia32_selectpd_128(
952 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,911 (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C),
953 __builtin_ia32_vfmaddpd (-(__v2df) __A,912 (__v2df)_mm_setzero_pd());
954 (__v2df) __B,
955 (__v2df) __C),
956 (__v2df) __C);
957}913}
958914
959static __inline__ __m128d __DEFAULT_FN_ATTRS128915static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
960_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)916_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
961{917 return (__m128d)__builtin_ia32_selectpd_128(
962 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,918 (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C), (__v2df)__A);
963 __builtin_ia32_vfmaddpd (-(__v2df) __A,
964 (__v2df) __B,
965 (__v2df) __C),
966 (__v2df)_mm_setzero_pd());
967}919}
968920
969static __inline__ __m128d __DEFAULT_FN_ATTRS128921static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
970_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C)922_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) {
971{923 return (__m128d)__builtin_ia32_selectpd_128(
972 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,924 (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C), (__v2df)__C);
973 __builtin_ia32_vfmaddpd (-(__v2df) __A,
974 (__v2df) __B,
975 -(__v2df) __C),
976 (__v2df)_mm_setzero_pd());
977}925}
978926
979static __inline__ __m256d __DEFAULT_FN_ATTRS256927static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
980_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)928_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) {
981{929 return (__m128d)__builtin_ia32_selectpd_128(
982 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,930 (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C),
983 __builtin_ia32_vfmaddpd256 ((__v4df) __A,931 (__v2df)_mm_setzero_pd());
984 (__v4df) __B,
985 (__v4df) __C),
986 (__v4df) __A);
987}932}
988933
989static __inline__ __m256d __DEFAULT_FN_ATTRS256934static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
990_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)935_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
991{936 return (__m128d)__builtin_ia32_selectpd_128(
992 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,937 (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C), (__v2df)__A);
993 __builtin_ia32_vfmaddpd256 ((__v4df) __A,
994 (__v4df) __B,
995 (__v4df) __C),
996 (__v4df) __C);
997}938}
998939
999static __inline__ __m256d __DEFAULT_FN_ATTRS256940static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1000_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)941_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) {
1001{942 return (__m128d)__builtin_ia32_selectpd_128(
1002 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,943 (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C), (__v2df)__C);
1003 __builtin_ia32_vfmaddpd256 ((__v4df) __A,
1004 (__v4df) __B,
1005 (__v4df) __C),
1006 (__v4df)_mm256_setzero_pd());
1007}944}
1008945
1009static __inline__ __m256d __DEFAULT_FN_ATTRS256946static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1010_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)947_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) {
1011{948 return (__m128d)__builtin_ia32_selectpd_128(
1012 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,949 (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C),
1013 __builtin_ia32_vfmaddpd256 ((__v4df) __A,950 (__v2df)_mm_setzero_pd());
1014 (__v4df) __B,
1015 -(__v4df) __C),
1016 (__v4df) __A);
1017}951}
1018952
1019static __inline__ __m256d __DEFAULT_FN_ATTRS256953static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1020_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)954_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) {
1021{955 return (__m256d)__builtin_ia32_selectpd_256(
1022 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,956 (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C), (__v4df)__A);
1023 __builtin_ia32_vfmaddpd256 ((__v4df) __A,
1024 (__v4df) __B,
1025 -(__v4df) __C),
1026 (__v4df)_mm256_setzero_pd());
1027}957}
1028958
1029static __inline__ __m256d __DEFAULT_FN_ATTRS256959static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1030_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)960_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) {
1031{961 return (__m256d)__builtin_ia32_selectpd_256(
1032 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,962 (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C), (__v4df)__C);
1033 __builtin_ia32_vfmaddpd256 (-(__v4df) __A,
1034 (__v4df) __B,
1035 (__v4df) __C),
1036 (__v4df) __C);
1037}963}
1038964
1039static __inline__ __m256d __DEFAULT_FN_ATTRS256965static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1040_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)966_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) {
1041{967 return (__m256d)__builtin_ia32_selectpd_256(
1042 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,968 (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C),
1043 __builtin_ia32_vfmaddpd256 (-(__v4df) __A,969 (__v4df)_mm256_setzero_pd());
1044 (__v4df) __B,
1045 (__v4df) __C),
1046 (__v4df)_mm256_setzero_pd());
1047}970}
1048971
1049static __inline__ __m256d __DEFAULT_FN_ATTRS256972static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1050_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C)973_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) {
1051{974 return (__m256d)__builtin_ia32_selectpd_256(
1052 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,975 (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C), (__v4df)__A);
1053 __builtin_ia32_vfmaddpd256 (-(__v4df) __A,
1054 (__v4df) __B,
1055 -(__v4df) __C),
1056 (__v4df)_mm256_setzero_pd());
1057}976}
1058977
1059static __inline__ __m128 __DEFAULT_FN_ATTRS128978static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1060_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)979_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) {
1061{980 return (__m256d)__builtin_ia32_selectpd_256(
1062 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,981 (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C), (__v4df)__C);
1063 __builtin_ia32_vfmaddps ((__v4sf) __A,
1064 (__v4sf) __B,
1065 (__v4sf) __C),
1066 (__v4sf) __A);
1067}982}
1068983
1069static __inline__ __m128 __DEFAULT_FN_ATTRS128984static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1070_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)985_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) {
1071{986 return (__m256d)__builtin_ia32_selectpd_256(
1072 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,987 (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C),
1073 __builtin_ia32_vfmaddps ((__v4sf) __A,988 (__v4df)_mm256_setzero_pd());
1074 (__v4sf) __B,
1075 (__v4sf) __C),
1076 (__v4sf) __C);
1077}989}
1078990
1079static __inline__ __m128 __DEFAULT_FN_ATTRS128991static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1080_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)992_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) {
1081{993 return (__m256d)__builtin_ia32_selectpd_256(
1082 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,994 (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C), (__v4df)__A);
1083 __builtin_ia32_vfmaddps ((__v4sf) __A,
1084 (__v4sf) __B,
1085 (__v4sf) __C),
1086 (__v4sf)_mm_setzero_ps());
1087}995}
1088996
1089static __inline__ __m128 __DEFAULT_FN_ATTRS128997static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1090_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)998_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) {
1091{999 return (__m256d)__builtin_ia32_selectpd_256(
1092 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,1000 (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C), (__v4df)__C);
1093 __builtin_ia32_vfmaddps ((__v4sf) __A,
1094 (__v4sf) __B,
1095 -(__v4sf) __C),
1096 (__v4sf) __A);
1097}1001}
10981002
1099static __inline__ __m128 __DEFAULT_FN_ATTRS1281003static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1100_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)1004_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) {
1101{1005 return (__m256d)__builtin_ia32_selectpd_256(
1102 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,1006 (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C),
1103 __builtin_ia32_vfmaddps ((__v4sf) __A,1007 (__v4df)_mm256_setzero_pd());
1104 (__v4sf) __B,
1105 -(__v4sf) __C),
1106 (__v4sf)_mm_setzero_ps());
1107}1008}
11081009
1109static __inline__ __m128 __DEFAULT_FN_ATTRS1281010static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1110_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)1011_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) {
1111{1012 return (__m256d)__builtin_ia32_selectpd_256(
1112 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,1013 (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C), (__v4df)__A);
1113 __builtin_ia32_vfmaddps (-(__v4sf) __A,
1114 (__v4sf) __B,
1115 (__v4sf) __C),
1116 (__v4sf) __C);
1117}1014}
11181015
1119static __inline__ __m128 __DEFAULT_FN_ATTRS1281016static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1120_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)1017_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) {
1121{1018 return (__m256d)__builtin_ia32_selectpd_256(
1122 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,1019 (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C), (__v4df)__C);
1123 __builtin_ia32_vfmaddps (-(__v4sf) __A,
1124 (__v4sf) __B,
1125 (__v4sf) __C),
1126 (__v4sf)_mm_setzero_ps());
1127}1020}
11281021
1129static __inline__ __m128 __DEFAULT_FN_ATTRS1281022static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1130_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C)1023_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) {
1131{1024 return (__m256d)__builtin_ia32_selectpd_256(
1132 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,1025 (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C),
1133 __builtin_ia32_vfmaddps (-(__v4sf) __A,1026 (__v4df)_mm256_setzero_pd());
1134 (__v4sf) __B,
1135 -(__v4sf) __C),
1136 (__v4sf)_mm_setzero_ps());
1137}1027}
11381028
1139static __inline__ __m256 __DEFAULT_FN_ATTRS2561029static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1140_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)1030_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) {
1141{1031 return (__m128)__builtin_ia32_selectps_128(
1142 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,1032 (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C), (__v4sf)__A);
1143 __builtin_ia32_vfmaddps256 ((__v8sf) __A,
1144 (__v8sf) __B,
1145 (__v8sf) __C),
1146 (__v8sf) __A);
1147}1033}
11481034
1149static __inline__ __m256 __DEFAULT_FN_ATTRS2561035static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1150_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)1036_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) {
1151{1037 return (__m128)__builtin_ia32_selectps_128(
1152 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,1038 (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C), (__v4sf)__C);
1153 __builtin_ia32_vfmaddps256 ((__v8sf) __A,
1154 (__v8sf) __B,
1155 (__v8sf) __C),
1156 (__v8sf) __C);
1157}1039}
11581040
1159static __inline__ __m256 __DEFAULT_FN_ATTRS2561041static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1160_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)1042_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) {
1161{1043 return (__m128)__builtin_ia32_selectps_128(
1162 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,1044 (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C),
1163 __builtin_ia32_vfmaddps256 ((__v8sf) __A,1045 (__v4sf)_mm_setzero_ps());
1164 (__v8sf) __B,
1165 (__v8sf) __C),
1166 (__v8sf)_mm256_setzero_ps());
1167}1046}
11681047
1169static __inline__ __m256 __DEFAULT_FN_ATTRS2561048static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1170_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)1049_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) {
1171{1050 return (__m128)__builtin_ia32_selectps_128(
1172 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,1051 (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C), (__v4sf)__A);
1173 __builtin_ia32_vfmaddps256 ((__v8sf) __A,
1174 (__v8sf) __B,
1175 -(__v8sf) __C),
1176 (__v8sf) __A);
1177}1052}
11781053
1179static __inline__ __m256 __DEFAULT_FN_ATTRS2561054static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1180_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)1055_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) {
1181{1056 return (__m128)__builtin_ia32_selectps_128(
1182 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,1057 (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C), (__v4sf)__C);
1183 __builtin_ia32_vfmaddps256 ((__v8sf) __A,
1184 (__v8sf) __B,
1185 -(__v8sf) __C),
1186 (__v8sf)_mm256_setzero_ps());
1187}1058}
11881059
1189static __inline__ __m256 __DEFAULT_FN_ATTRS2561060static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1190_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)1061_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) {
1191{1062 return (__m128)__builtin_ia32_selectps_128(
1192 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,1063 (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C),
1193 __builtin_ia32_vfmaddps256 (-(__v8sf) __A,1064 (__v4sf)_mm_setzero_ps());
1194 (__v8sf) __B,
1195 (__v8sf) __C),
1196 (__v8sf) __C);
1197}1065}
11981066
1199static __inline__ __m256 __DEFAULT_FN_ATTRS2561067static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1200_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)1068_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) {
1201{1069 return (__m128)__builtin_ia32_selectps_128(
1202 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,1070 (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C), (__v4sf)__A);
1203 __builtin_ia32_vfmaddps256 (-(__v8sf) __A,
1204 (__v8sf) __B,
1205 (__v8sf) __C),
1206 (__v8sf)_mm256_setzero_ps());
1207}1071}
12081072
1209static __inline__ __m256 __DEFAULT_FN_ATTRS2561073static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1210_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)1074_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) {
1211{1075 return (__m128)__builtin_ia32_selectps_128(
1212 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,1076 (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C), (__v4sf)__C);
1213 __builtin_ia32_vfmaddps256 (-(__v8sf) __A,1077}
1214 (__v8sf) __B,1078
1215 -(__v8sf) __C),1079static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1216 (__v8sf)_mm256_setzero_ps());1080_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) {
1081 return (__m128)__builtin_ia32_selectps_128(
1082 (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C),
1083 (__v4sf)_mm_setzero_ps());
1084}
1085
1086static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1087_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) {
1088 return (__m128)__builtin_ia32_selectps_128(
1089 (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C), (__v4sf)__A);
1090}
1091
1092static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1093_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) {
1094 return (__m128)__builtin_ia32_selectps_128(
1095 (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C), (__v4sf)__C);
1096}
1097
1098static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1099_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) {
1100 return (__m128)__builtin_ia32_selectps_128(
1101 (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C),
1102 (__v4sf)_mm_setzero_ps());
1103}
1104
1105static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1106_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) {
1107 return (__m256)__builtin_ia32_selectps_256(
1108 (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C), (__v8sf)__A);
1109}
1110
1111static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1112_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) {
1113 return (__m256)__builtin_ia32_selectps_256(
1114 (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C), (__v8sf)__C);
1115}
1116
1117static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1118_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) {
1119 return (__m256)__builtin_ia32_selectps_256(
1120 (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C),
1121 (__v8sf)_mm256_setzero_ps());
1122}
1123
1124static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1125_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) {
1126 return (__m256)__builtin_ia32_selectps_256(
1127 (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C), (__v8sf)__A);
1128}
1129
1130static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1131_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) {
1132 return (__m256)__builtin_ia32_selectps_256(
1133 (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C), (__v8sf)__C);
1134}
1135
1136static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1137_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) {
1138 return (__m256)__builtin_ia32_selectps_256(
1139 (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C),
1140 (__v8sf)_mm256_setzero_ps());
1141}
1142
1143static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1144_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) {
1145 return (__m256)__builtin_ia32_selectps_256(
1146 (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C), (__v8sf)__A);
1147}
1148
1149static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1150_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) {
1151 return (__m256)__builtin_ia32_selectps_256(
1152 (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C), (__v8sf)__C);
1153}
1154
1155static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1156_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) {
1157 return (__m256)__builtin_ia32_selectps_256(
1158 (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C),
1159 (__v8sf)_mm256_setzero_ps());
1160}
1161
1162static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1163_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) {
1164 return (__m256)__builtin_ia32_selectps_256(
1165 (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C), (__v8sf)__A);
1166}
1167
1168static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1169_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) {
1170 return (__m256)__builtin_ia32_selectps_256(
1171 (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C), (__v8sf)__C);
1172}
1173
1174static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1175_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) {
1176 return (__m256)__builtin_ia32_selectps_256(
1177 (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C),
1178 (__v8sf)_mm256_setzero_ps());
1217}1179}
12181180
1219static __inline__ __m128d __DEFAULT_FN_ATTRS1281181static __inline__ __m128d __DEFAULT_FN_ATTRS128
1220_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)1182_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) {
1221{
1222 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,1183 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1223 __builtin_ia32_vfmaddsubpd ((__v2df) __A,1184 __builtin_ia32_vfmaddsubpd ((__v2df) __A,
1224 (__v2df) __B,1185 (__v2df) __B,
...@@ -1417,46 +1378,6 @@ _mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)...@@ -1417,46 +1378,6 @@ _mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C)
1417 (__v8sf)_mm256_setzero_ps());1378 (__v8sf)_mm256_setzero_ps());
1418}1379}
14191380
1420static __inline__ __m128d __DEFAULT_FN_ATTRS128
1421_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
1422{
1423 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1424 __builtin_ia32_vfmaddpd ((__v2df) __A,
1425 (__v2df) __B,
1426 -(__v2df) __C),
1427 (__v2df) __C);
1428}
1429
1430static __inline__ __m256d __DEFAULT_FN_ATTRS256
1431_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
1432{
1433 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1434 __builtin_ia32_vfmaddpd256 ((__v4df) __A,
1435 (__v4df) __B,
1436 -(__v4df) __C),
1437 (__v4df) __C);
1438}
1439
1440static __inline__ __m128 __DEFAULT_FN_ATTRS128
1441_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
1442{
1443 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1444 __builtin_ia32_vfmaddps ((__v4sf) __A,
1445 (__v4sf) __B,
1446 -(__v4sf) __C),
1447 (__v4sf) __C);
1448}
1449
1450static __inline__ __m256 __DEFAULT_FN_ATTRS256
1451_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
1452{
1453 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1454 __builtin_ia32_vfmaddps256 ((__v8sf) __A,
1455 (__v8sf) __B,
1456 -(__v8sf) __C),
1457 (__v8sf) __C);
1458}
1459
1460static __inline__ __m128d __DEFAULT_FN_ATTRS1281381static __inline__ __m128d __DEFAULT_FN_ATTRS128
1461_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)1382_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
1462{1383{
...@@ -1497,233 +1418,113 @@ _mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)...@@ -1497,233 +1418,113 @@ _mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
1497 (__v8sf) __C);1418 (__v8sf) __C);
1498}1419}
14991420
1500static __inline__ __m128d __DEFAULT_FN_ATTRS1281421static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1501_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
1502{
1503 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1504 __builtin_ia32_vfmaddpd ((__v2df) __A,
1505 -(__v2df) __B,
1506 (__v2df) __C),
1507 (__v2df) __A);
1508}
1509
1510static __inline__ __m256d __DEFAULT_FN_ATTRS256
1511_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
1512{
1513 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1514 __builtin_ia32_vfmaddpd256 ((__v4df) __A,
1515 -(__v4df) __B,
1516 (__v4df) __C),
1517 (__v4df) __A);
1518}
1519
1520static __inline__ __m128 __DEFAULT_FN_ATTRS128
1521_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
1522{
1523 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1524 __builtin_ia32_vfmaddps ((__v4sf) __A,
1525 -(__v4sf) __B,
1526 (__v4sf) __C),
1527 (__v4sf) __A);
1528}
1529
1530static __inline__ __m256 __DEFAULT_FN_ATTRS256
1531_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
1532{
1533 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1534 __builtin_ia32_vfmaddps256 ((__v8sf) __A,
1535 -(__v8sf) __B,
1536 (__v8sf) __C),
1537 (__v8sf) __A);
1538}
1539
1540static __inline__ __m128d __DEFAULT_FN_ATTRS128
1541_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C)
1542{
1543 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1544 __builtin_ia32_vfmaddpd ((__v2df) __A,
1545 -(__v2df) __B,
1546 -(__v2df) __C),
1547 (__v2df) __A);
1548}
1549
1550static __inline__ __m128d __DEFAULT_FN_ATTRS128
1551_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U)
1552{
1553 return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U,
1554 __builtin_ia32_vfmaddpd ((__v2df) __A,
1555 -(__v2df) __B,
1556 -(__v2df) __C),
1557 (__v2df) __C);
1558}
1559
1560static __inline__ __m256d __DEFAULT_FN_ATTRS256
1561_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C)
1562{
1563 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1564 __builtin_ia32_vfmaddpd256 ((__v4df) __A,
1565 -(__v4df) __B,
1566 -(__v4df) __C),
1567 (__v4df) __A);
1568}
1569
1570static __inline__ __m256d __DEFAULT_FN_ATTRS256
1571_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U)
1572{
1573 return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U,
1574 __builtin_ia32_vfmaddpd256 ((__v4df) __A,
1575 -(__v4df) __B,
1576 -(__v4df) __C),
1577 (__v4df) __C);
1578}
1579
1580static __inline__ __m128 __DEFAULT_FN_ATTRS128
1581_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C)
1582{
1583 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1584 __builtin_ia32_vfmaddps ((__v4sf) __A,
1585 -(__v4sf) __B,
1586 -(__v4sf) __C),
1587 (__v4sf) __A);
1588}
1589
1590static __inline__ __m128 __DEFAULT_FN_ATTRS128
1591_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U)
1592{
1593 return (__m128) __builtin_ia32_selectps_128((__mmask8) __U,
1594 __builtin_ia32_vfmaddps ((__v4sf) __A,
1595 -(__v4sf) __B,
1596 -(__v4sf) __C),
1597 (__v4sf) __C);
1598}
1599
1600static __inline__ __m256 __DEFAULT_FN_ATTRS256
1601_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C)
1602{
1603 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1604 __builtin_ia32_vfmaddps256 ((__v8sf) __A,
1605 -(__v8sf) __B,
1606 -(__v8sf) __C),
1607 (__v8sf) __A);
1608}
1609
1610static __inline__ __m256 __DEFAULT_FN_ATTRS256
1611_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U)
1612{
1613 return (__m256) __builtin_ia32_selectps_256((__mmask8) __U,
1614 __builtin_ia32_vfmaddps256 ((__v8sf) __A,
1615 -(__v8sf) __B,
1616 -(__v8sf) __C),
1617 (__v8sf) __C);
1618}
1619
1620static __inline__ __m128d __DEFAULT_FN_ATTRS128
1621_mm_mask_add_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {1422_mm_mask_add_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
1622 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,1423 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
1623 (__v2df)_mm_add_pd(__A, __B),1424 (__v2df)_mm_add_pd(__A, __B),
1624 (__v2df)__W);1425 (__v2df)__W);
1625}1426}
16261427
1627static __inline__ __m128d __DEFAULT_FN_ATTRS1281428static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1628_mm_maskz_add_pd(__mmask8 __U, __m128d __A, __m128d __B) {1429_mm_maskz_add_pd(__mmask8 __U, __m128d __A, __m128d __B) {
1629 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,1430 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
1630 (__v2df)_mm_add_pd(__A, __B),1431 (__v2df)_mm_add_pd(__A, __B),
1631 (__v2df)_mm_setzero_pd());1432 (__v2df)_mm_setzero_pd());
1632}1433}
16331434
1634static __inline__ __m256d __DEFAULT_FN_ATTRS2561435static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1635_mm256_mask_add_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {1436_mm256_mask_add_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
1636 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,1437 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
1637 (__v4df)_mm256_add_pd(__A, __B),1438 (__v4df)_mm256_add_pd(__A, __B),
1638 (__v4df)__W);1439 (__v4df)__W);
1639}1440}
16401441
1641static __inline__ __m256d __DEFAULT_FN_ATTRS2561442static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1642_mm256_maskz_add_pd(__mmask8 __U, __m256d __A, __m256d __B) {1443_mm256_maskz_add_pd(__mmask8 __U, __m256d __A, __m256d __B) {
1643 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,1444 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
1644 (__v4df)_mm256_add_pd(__A, __B),1445 (__v4df)_mm256_add_pd(__A, __B),
1645 (__v4df)_mm256_setzero_pd());1446 (__v4df)_mm256_setzero_pd());
1646}1447}
16471448
1648static __inline__ __m128 __DEFAULT_FN_ATTRS1281449static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1649_mm_mask_add_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {1450_mm_mask_add_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
1650 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,1451 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1651 (__v4sf)_mm_add_ps(__A, __B),1452 (__v4sf)_mm_add_ps(__A, __B),
1652 (__v4sf)__W);1453 (__v4sf)__W);
1653}1454}
16541455
1655static __inline__ __m128 __DEFAULT_FN_ATTRS1281456static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1656_mm_maskz_add_ps(__mmask8 __U, __m128 __A, __m128 __B) {1457_mm_maskz_add_ps(__mmask8 __U, __m128 __A, __m128 __B) {
1657 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,1458 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1658 (__v4sf)_mm_add_ps(__A, __B),1459 (__v4sf)_mm_add_ps(__A, __B),
1659 (__v4sf)_mm_setzero_ps());1460 (__v4sf)_mm_setzero_ps());
1660}1461}
16611462
1662static __inline__ __m256 __DEFAULT_FN_ATTRS2561463static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1663_mm256_mask_add_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {1464_mm256_mask_add_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
1664 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,1465 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
1665 (__v8sf)_mm256_add_ps(__A, __B),1466 (__v8sf)_mm256_add_ps(__A, __B),
1666 (__v8sf)__W);1467 (__v8sf)__W);
1667}1468}
16681469
1669static __inline__ __m256 __DEFAULT_FN_ATTRS2561470static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1670_mm256_maskz_add_ps(__mmask8 __U, __m256 __A, __m256 __B) {1471_mm256_maskz_add_ps(__mmask8 __U, __m256 __A, __m256 __B) {
1671 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,1472 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
1672 (__v8sf)_mm256_add_ps(__A, __B),1473 (__v8sf)_mm256_add_ps(__A, __B),
1673 (__v8sf)_mm256_setzero_ps());1474 (__v8sf)_mm256_setzero_ps());
1674}1475}
16751476
1676static __inline__ __m128i __DEFAULT_FN_ATTRS1281477static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1677_mm_mask_blend_epi32 (__mmask8 __U, __m128i __A, __m128i __W) {1478_mm_mask_blend_epi32(__mmask8 __U, __m128i __A, __m128i __W) {
1678 return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U,1479 return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U,
1679 (__v4si) __W,1480 (__v4si) __W,
1680 (__v4si) __A);1481 (__v4si) __A);
1681}1482}
16821483
1683static __inline__ __m256i __DEFAULT_FN_ATTRS2561484static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1684_mm256_mask_blend_epi32 (__mmask8 __U, __m256i __A, __m256i __W) {1485_mm256_mask_blend_epi32(__mmask8 __U, __m256i __A, __m256i __W) {
1685 return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U,1486 return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U,
1686 (__v8si) __W,1487 (__v8si) __W,
1687 (__v8si) __A);1488 (__v8si) __A);
1688}1489}
16891490
1690static __inline__ __m128d __DEFAULT_FN_ATTRS1281491static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1691_mm_mask_blend_pd (__mmask8 __U, __m128d __A, __m128d __W) {1492_mm_mask_blend_pd(__mmask8 __U, __m128d __A, __m128d __W) {
1692 return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U,1493 return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U,
1693 (__v2df) __W,1494 (__v2df) __W,
1694 (__v2df) __A);1495 (__v2df) __A);
1695}1496}
16961497
1697static __inline__ __m256d __DEFAULT_FN_ATTRS2561498static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1698_mm256_mask_blend_pd (__mmask8 __U, __m256d __A, __m256d __W) {1499_mm256_mask_blend_pd(__mmask8 __U, __m256d __A, __m256d __W) {
1699 return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U,1500 return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U,
1700 (__v4df) __W,1501 (__v4df) __W,
1701 (__v4df) __A);1502 (__v4df) __A);
1702}1503}
17031504
1704static __inline__ __m128 __DEFAULT_FN_ATTRS1281505static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1705_mm_mask_blend_ps (__mmask8 __U, __m128 __A, __m128 __W) {1506_mm_mask_blend_ps(__mmask8 __U, __m128 __A, __m128 __W) {
1706 return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U,1507 return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U,
1707 (__v4sf) __W,1508 (__v4sf) __W,
1708 (__v4sf) __A);1509 (__v4sf) __A);
1709}1510}
17101511
1711static __inline__ __m256 __DEFAULT_FN_ATTRS2561512static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1712_mm256_mask_blend_ps (__mmask8 __U, __m256 __A, __m256 __W) {1513_mm256_mask_blend_ps(__mmask8 __U, __m256 __A, __m256 __W) {
1713 return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U,1514 return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U,
1714 (__v8sf) __W,1515 (__v8sf) __W,
1715 (__v8sf) __A);1516 (__v8sf) __A);
1716}1517}
17171518
1718static __inline__ __m128i __DEFAULT_FN_ATTRS1281519static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
1719_mm_mask_blend_epi64 (__mmask8 __U, __m128i __A, __m128i __W) {1520_mm_mask_blend_epi64(__mmask8 __U, __m128i __A, __m128i __W) {
1720 return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U,1521 return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U,
1721 (__v2di) __W,1522 (__v2di) __W,
1722 (__v2di) __A);1523 (__v2di) __A);
1723}1524}
17241525
1725static __inline__ __m256i __DEFAULT_FN_ATTRS2561526static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
1726_mm256_mask_blend_epi64 (__mmask8 __U, __m256i __A, __m256i __W) {1527_mm256_mask_blend_epi64(__mmask8 __U, __m256i __A, __m256i __W) {
1727 return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U,1528 return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U,
1728 (__v4di) __W,1529 (__v4di) __W,
1729 (__v4di) __A);1530 (__v4di) __A);
...@@ -1905,57 +1706,57 @@ _mm256_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m256i __A) {...@@ -1905,57 +1706,57 @@ _mm256_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m256i __A) {
1905 (__mmask8) __U);1706 (__mmask8) __U);
1906}1707}
19071708
1908static __inline__ __m128d __DEFAULT_FN_ATTRS1281709static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1909_mm_mask_cvtepi32_pd (__m128d __W, __mmask8 __U, __m128i __A) {1710_mm_mask_cvtepi32_pd(__m128d __W, __mmask8 __U, __m128i __A) {
1910 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,1711 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,
1911 (__v2df)_mm_cvtepi32_pd(__A),1712 (__v2df)_mm_cvtepi32_pd(__A),
1912 (__v2df)__W);1713 (__v2df)__W);
1913}1714}
19141715
1915static __inline__ __m128d __DEFAULT_FN_ATTRS1281716static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
1916_mm_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) {1717_mm_maskz_cvtepi32_pd(__mmask8 __U, __m128i __A) {
1917 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,1718 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,
1918 (__v2df)_mm_cvtepi32_pd(__A),1719 (__v2df)_mm_cvtepi32_pd(__A),
1919 (__v2df)_mm_setzero_pd());1720 (__v2df)_mm_setzero_pd());
1920}1721}
19211722
1922static __inline__ __m256d __DEFAULT_FN_ATTRS2561723static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1923_mm256_mask_cvtepi32_pd (__m256d __W, __mmask8 __U, __m128i __A) {1724_mm256_mask_cvtepi32_pd(__m256d __W, __mmask8 __U, __m128i __A) {
1924 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,1725 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,
1925 (__v4df)_mm256_cvtepi32_pd(__A),1726 (__v4df)_mm256_cvtepi32_pd(__A),
1926 (__v4df)__W);1727 (__v4df)__W);
1927}1728}
19281729
1929static __inline__ __m256d __DEFAULT_FN_ATTRS2561730static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
1930_mm256_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) {1731_mm256_maskz_cvtepi32_pd(__mmask8 __U, __m128i __A) {
1931 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,1732 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,
1932 (__v4df)_mm256_cvtepi32_pd(__A),1733 (__v4df)_mm256_cvtepi32_pd(__A),
1933 (__v4df)_mm256_setzero_pd());1734 (__v4df)_mm256_setzero_pd());
1934}1735}
19351736
1936static __inline__ __m128 __DEFAULT_FN_ATTRS1281737static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1937_mm_mask_cvtepi32_ps (__m128 __W, __mmask8 __U, __m128i __A) {1738_mm_mask_cvtepi32_ps(__m128 __W, __mmask8 __U, __m128i __A) {
1938 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,1739 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1939 (__v4sf)_mm_cvtepi32_ps(__A),1740 (__v4sf)_mm_cvtepi32_ps(__A),
1940 (__v4sf)__W);1741 (__v4sf)__W);
1941}1742}
19421743
1943static __inline__ __m128 __DEFAULT_FN_ATTRS1281744static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1944_mm_maskz_cvtepi32_ps (__mmask8 __U, __m128i __A) {1745_mm_maskz_cvtepi32_ps(__mmask8 __U, __m128i __A) {
1945 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,1746 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
1946 (__v4sf)_mm_cvtepi32_ps(__A),1747 (__v4sf)_mm_cvtepi32_ps(__A),
1947 (__v4sf)_mm_setzero_ps());1748 (__v4sf)_mm_setzero_ps());
1948}1749}
19491750
1950static __inline__ __m256 __DEFAULT_FN_ATTRS2561751static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1951_mm256_mask_cvtepi32_ps (__m256 __W, __mmask8 __U, __m256i __A) {1752_mm256_mask_cvtepi32_ps(__m256 __W, __mmask8 __U, __m256i __A) {
1952 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,1753 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
1953 (__v8sf)_mm256_cvtepi32_ps(__A),1754 (__v8sf)_mm256_cvtepi32_ps(__A),
1954 (__v8sf)__W);1755 (__v8sf)__W);
1955}1756}
19561757
1957static __inline__ __m256 __DEFAULT_FN_ATTRS2561758static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
1958_mm256_maskz_cvtepi32_ps (__mmask8 __U, __m256i __A) {1759_mm256_maskz_cvtepi32_ps(__mmask8 __U, __m256i __A) {
1959 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,1760 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
1960 (__v8sf)_mm256_cvtepi32_ps(__A),1761 (__v8sf)_mm256_cvtepi32_ps(__A),
1961 (__v8sf)_mm256_setzero_ps());1762 (__v8sf)_mm256_setzero_ps());
...@@ -1990,30 +1791,30 @@ _mm256_maskz_cvtpd_epi32 (__mmask8 __U, __m256d __A) {...@@ -1990,30 +1791,30 @@ _mm256_maskz_cvtpd_epi32 (__mmask8 __U, __m256d __A) {
1990 (__v4si)_mm_setzero_si128());1791 (__v4si)_mm_setzero_si128());
1991}1792}
19921793
1993static __inline__ __m128 __DEFAULT_FN_ATTRS1281794static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
1994_mm_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m128d __A) {1795_mm_mask_cvtpd_ps(__m128 __W, __mmask8 __U, __m128d __A) {
1995 return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A,1796 return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A,
1996 (__v4sf) __W,1797 (__v4sf) __W,
1997 (__mmask8) __U);1798 (__mmask8) __U);
1998}1799}
19991800
2000static __inline__ __m128 __DEFAULT_FN_ATTRS1281801static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2001_mm_maskz_cvtpd_ps (__mmask8 __U, __m128d __A) {1802_mm_maskz_cvtpd_ps(__mmask8 __U, __m128d __A) {
2002 return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A,1803 return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A,
2003 (__v4sf)1804 (__v4sf)
2004 _mm_setzero_ps (),1805 _mm_setzero_ps (),
2005 (__mmask8) __U);1806 (__mmask8) __U);
2006}1807}
20071808
2008static __inline__ __m128 __DEFAULT_FN_ATTRS2561809static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR
2009_mm256_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m256d __A) {1810_mm256_mask_cvtpd_ps(__m128 __W, __mmask8 __U, __m256d __A) {
2010 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,1811 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2011 (__v4sf)_mm256_cvtpd_ps(__A),1812 (__v4sf)_mm256_cvtpd_ps(__A),
2012 (__v4sf)__W);1813 (__v4sf)__W);
2013}1814}
20141815
2015static __inline__ __m128 __DEFAULT_FN_ATTRS2561816static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR
2016_mm256_maskz_cvtpd_ps (__mmask8 __U, __m256d __A) {1817_mm256_maskz_cvtpd_ps(__mmask8 __U, __m256d __A) {
2017 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,1818 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2018 (__v4sf)_mm256_cvtpd_ps(__A),1819 (__v4sf)_mm256_cvtpd_ps(__A),
2019 (__v4sf)_mm_setzero_ps());1820 (__v4sf)_mm_setzero_ps());
...@@ -2316,133 +2117,133 @@ _mm256_maskz_cvttps_epu32 (__mmask8 __U, __m256 __A) {...@@ -2316,133 +2117,133 @@ _mm256_maskz_cvttps_epu32 (__mmask8 __U, __m256 __A) {
2316 (__mmask8) __U);2117 (__mmask8) __U);
2317}2118}
23182119
2319static __inline__ __m128d __DEFAULT_FN_ATTRS1282120static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2320_mm_cvtepu32_pd (__m128i __A) {2121_mm_cvtepu32_pd(__m128i __A) {
2321 return (__m128d) __builtin_convertvector(2122 return (__m128d) __builtin_convertvector(
2322 __builtin_shufflevector((__v4su)__A, (__v4su)__A, 0, 1), __v2df);2123 __builtin_shufflevector((__v4su)__A, (__v4su)__A, 0, 1), __v2df);
2323}2124}
23242125
2325static __inline__ __m128d __DEFAULT_FN_ATTRS1282126static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2326_mm_mask_cvtepu32_pd (__m128d __W, __mmask8 __U, __m128i __A) {2127_mm_mask_cvtepu32_pd(__m128d __W, __mmask8 __U, __m128i __A) {
2327 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,2128 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,
2328 (__v2df)_mm_cvtepu32_pd(__A),2129 (__v2df)_mm_cvtepu32_pd(__A),
2329 (__v2df)__W);2130 (__v2df)__W);
2330}2131}
23312132
2332static __inline__ __m128d __DEFAULT_FN_ATTRS1282133static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2333_mm_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {2134_mm_maskz_cvtepu32_pd(__mmask8 __U, __m128i __A) {
2334 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,2135 return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U,
2335 (__v2df)_mm_cvtepu32_pd(__A),2136 (__v2df)_mm_cvtepu32_pd(__A),
2336 (__v2df)_mm_setzero_pd());2137 (__v2df)_mm_setzero_pd());
2337}2138}
23382139
2339static __inline__ __m256d __DEFAULT_FN_ATTRS2562140static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2340_mm256_cvtepu32_pd (__m128i __A) {2141_mm256_cvtepu32_pd(__m128i __A) {
2341 return (__m256d)__builtin_convertvector((__v4su)__A, __v4df);2142 return (__m256d)__builtin_convertvector((__v4su)__A, __v4df);
2342}2143}
23432144
2344static __inline__ __m256d __DEFAULT_FN_ATTRS2562145static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2345_mm256_mask_cvtepu32_pd (__m256d __W, __mmask8 __U, __m128i __A) {2146_mm256_mask_cvtepu32_pd(__m256d __W, __mmask8 __U, __m128i __A) {
2346 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,2147 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,
2347 (__v4df)_mm256_cvtepu32_pd(__A),2148 (__v4df)_mm256_cvtepu32_pd(__A),
2348 (__v4df)__W);2149 (__v4df)__W);
2349}2150}
23502151
2351static __inline__ __m256d __DEFAULT_FN_ATTRS2562152static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2352_mm256_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {2153_mm256_maskz_cvtepu32_pd(__mmask8 __U, __m128i __A) {
2353 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,2154 return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U,
2354 (__v4df)_mm256_cvtepu32_pd(__A),2155 (__v4df)_mm256_cvtepu32_pd(__A),
2355 (__v4df)_mm256_setzero_pd());2156 (__v4df)_mm256_setzero_pd());
2356}2157}
23572158
2358static __inline__ __m128 __DEFAULT_FN_ATTRS1282159static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2359_mm_cvtepu32_ps (__m128i __A) {2160_mm_cvtepu32_ps(__m128i __A) {
2360 return (__m128)__builtin_convertvector((__v4su)__A, __v4sf);2161 return (__m128)__builtin_convertvector((__v4su)__A, __v4sf);
2361}2162}
23622163
2363static __inline__ __m128 __DEFAULT_FN_ATTRS1282164static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2364_mm_mask_cvtepu32_ps (__m128 __W, __mmask8 __U, __m128i __A) {2165_mm_mask_cvtepu32_ps(__m128 __W, __mmask8 __U, __m128i __A) {
2365 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2166 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2366 (__v4sf)_mm_cvtepu32_ps(__A),2167 (__v4sf)_mm_cvtepu32_ps(__A),
2367 (__v4sf)__W);2168 (__v4sf)__W);
2368}2169}
23692170
2370static __inline__ __m128 __DEFAULT_FN_ATTRS1282171static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2371_mm_maskz_cvtepu32_ps (__mmask8 __U, __m128i __A) {2172_mm_maskz_cvtepu32_ps(__mmask8 __U, __m128i __A) {
2372 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2173 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2373 (__v4sf)_mm_cvtepu32_ps(__A),2174 (__v4sf)_mm_cvtepu32_ps(__A),
2374 (__v4sf)_mm_setzero_ps());2175 (__v4sf)_mm_setzero_ps());
2375}2176}
23762177
2377static __inline__ __m256 __DEFAULT_FN_ATTRS2562178static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2378_mm256_cvtepu32_ps (__m256i __A) {2179_mm256_cvtepu32_ps(__m256i __A) {
2379 return (__m256)__builtin_convertvector((__v8su)__A, __v8sf);2180 return (__m256)__builtin_convertvector((__v8su)__A, __v8sf);
2380}2181}
23812182
2382static __inline__ __m256 __DEFAULT_FN_ATTRS2562183static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2383_mm256_mask_cvtepu32_ps (__m256 __W, __mmask8 __U, __m256i __A) {2184_mm256_mask_cvtepu32_ps(__m256 __W, __mmask8 __U, __m256i __A) {
2384 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2185 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2385 (__v8sf)_mm256_cvtepu32_ps(__A),2186 (__v8sf)_mm256_cvtepu32_ps(__A),
2386 (__v8sf)__W);2187 (__v8sf)__W);
2387}2188}
23882189
2389static __inline__ __m256 __DEFAULT_FN_ATTRS2562190static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2390_mm256_maskz_cvtepu32_ps (__mmask8 __U, __m256i __A) {2191_mm256_maskz_cvtepu32_ps(__mmask8 __U, __m256i __A) {
2391 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2192 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2392 (__v8sf)_mm256_cvtepu32_ps(__A),2193 (__v8sf)_mm256_cvtepu32_ps(__A),
2393 (__v8sf)_mm256_setzero_ps());2194 (__v8sf)_mm256_setzero_ps());
2394}2195}
23952196
2396static __inline__ __m128d __DEFAULT_FN_ATTRS1282197static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2397_mm_mask_div_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {2198_mm_mask_div_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2398 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,2199 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2399 (__v2df)_mm_div_pd(__A, __B),2200 (__v2df)_mm_div_pd(__A, __B),
2400 (__v2df)__W);2201 (__v2df)__W);
2401}2202}
24022203
2403static __inline__ __m128d __DEFAULT_FN_ATTRS1282204static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2404_mm_maskz_div_pd(__mmask8 __U, __m128d __A, __m128d __B) {2205_mm_maskz_div_pd(__mmask8 __U, __m128d __A, __m128d __B) {
2405 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,2206 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2406 (__v2df)_mm_div_pd(__A, __B),2207 (__v2df)_mm_div_pd(__A, __B),
2407 (__v2df)_mm_setzero_pd());2208 (__v2df)_mm_setzero_pd());
2408}2209}
24092210
2410static __inline__ __m256d __DEFAULT_FN_ATTRS2562211static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2411_mm256_mask_div_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {2212_mm256_mask_div_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
2412 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,2213 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2413 (__v4df)_mm256_div_pd(__A, __B),2214 (__v4df)_mm256_div_pd(__A, __B),
2414 (__v4df)__W);2215 (__v4df)__W);
2415}2216}
24162217
2417static __inline__ __m256d __DEFAULT_FN_ATTRS2562218static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2418_mm256_maskz_div_pd(__mmask8 __U, __m256d __A, __m256d __B) {2219_mm256_maskz_div_pd(__mmask8 __U, __m256d __A, __m256d __B) {
2419 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,2220 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2420 (__v4df)_mm256_div_pd(__A, __B),2221 (__v4df)_mm256_div_pd(__A, __B),
2421 (__v4df)_mm256_setzero_pd());2222 (__v4df)_mm256_setzero_pd());
2422}2223}
24232224
2424static __inline__ __m128 __DEFAULT_FN_ATTRS1282225static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2425_mm_mask_div_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {2226_mm_mask_div_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2426 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2227 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2427 (__v4sf)_mm_div_ps(__A, __B),2228 (__v4sf)_mm_div_ps(__A, __B),
2428 (__v4sf)__W);2229 (__v4sf)__W);
2429}2230}
24302231
2431static __inline__ __m128 __DEFAULT_FN_ATTRS1282232static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2432_mm_maskz_div_ps(__mmask8 __U, __m128 __A, __m128 __B) {2233_mm_maskz_div_ps(__mmask8 __U, __m128 __A, __m128 __B) {
2433 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2234 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2434 (__v4sf)_mm_div_ps(__A, __B),2235 (__v4sf)_mm_div_ps(__A, __B),
2435 (__v4sf)_mm_setzero_ps());2236 (__v4sf)_mm_setzero_ps());
2436}2237}
24372238
2438static __inline__ __m256 __DEFAULT_FN_ATTRS2562239static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2439_mm256_mask_div_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {2240_mm256_mask_div_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
2440 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2241 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2441 (__v8sf)_mm256_div_ps(__A, __B),2242 (__v8sf)_mm256_div_ps(__A, __B),
2442 (__v8sf)__W);2243 (__v8sf)__W);
2443}2244}
24442245
2445static __inline__ __m256 __DEFAULT_FN_ATTRS2562246static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2446_mm256_maskz_div_ps(__mmask8 __U, __m256 __A, __m256 __B) {2247_mm256_maskz_div_ps(__mmask8 __U, __m256 __A, __m256 __B) {
2447 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2248 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2448 (__v8sf)_mm256_div_ps(__A, __B),2249 (__v8sf)_mm256_div_ps(__A, __B),
...@@ -2796,499 +2597,499 @@ _mm256_maskz_getexp_ps (__mmask8 __U, __m256 __A) {...@@ -2796,499 +2597,499 @@ _mm256_maskz_getexp_ps (__mmask8 __U, __m256 __A) {
2796 (__mmask8) __U);2597 (__mmask8) __U);
2797}2598}
27982599
2799static __inline__ __m128d __DEFAULT_FN_ATTRS1282600static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2800_mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {2601_mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2801 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,2602 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2802 (__v2df)_mm_max_pd(__A, __B),2603 (__v2df)_mm_max_pd(__A, __B),
2803 (__v2df)__W);2604 (__v2df)__W);
2804}2605}
28052606
2806static __inline__ __m128d __DEFAULT_FN_ATTRS1282607static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2807_mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B) {2608_mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B) {
2808 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,2609 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2809 (__v2df)_mm_max_pd(__A, __B),2610 (__v2df)_mm_max_pd(__A, __B),
2810 (__v2df)_mm_setzero_pd());2611 (__v2df)_mm_setzero_pd());
2811}2612}
28122613
2813static __inline__ __m256d __DEFAULT_FN_ATTRS2562614static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2814_mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {2615_mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
2815 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,2616 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2816 (__v4df)_mm256_max_pd(__A, __B),2617 (__v4df)_mm256_max_pd(__A, __B),
2817 (__v4df)__W);2618 (__v4df)__W);
2818}2619}
28192620
2820static __inline__ __m256d __DEFAULT_FN_ATTRS2562621static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2821_mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B) {2622_mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B) {
2822 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,2623 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2823 (__v4df)_mm256_max_pd(__A, __B),2624 (__v4df)_mm256_max_pd(__A, __B),
2824 (__v4df)_mm256_setzero_pd());2625 (__v4df)_mm256_setzero_pd());
2825}2626}
28262627
2827static __inline__ __m128 __DEFAULT_FN_ATTRS1282628static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2828_mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {2629_mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2829 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2630 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2830 (__v4sf)_mm_max_ps(__A, __B),2631 (__v4sf)_mm_max_ps(__A, __B),
2831 (__v4sf)__W);2632 (__v4sf)__W);
2832}2633}
28332634
2834static __inline__ __m128 __DEFAULT_FN_ATTRS1282635static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2835_mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B) {2636_mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B) {
2836 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2637 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2837 (__v4sf)_mm_max_ps(__A, __B),2638 (__v4sf)_mm_max_ps(__A, __B),
2838 (__v4sf)_mm_setzero_ps());2639 (__v4sf)_mm_setzero_ps());
2839}2640}
28402641
2841static __inline__ __m256 __DEFAULT_FN_ATTRS2562642static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2842_mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {2643_mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
2843 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2644 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2844 (__v8sf)_mm256_max_ps(__A, __B),2645 (__v8sf)_mm256_max_ps(__A, __B),
2845 (__v8sf)__W);2646 (__v8sf)__W);
2846}2647}
28472648
2848static __inline__ __m256 __DEFAULT_FN_ATTRS2562649static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2849_mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B) {2650_mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B) {
2850 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2651 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2851 (__v8sf)_mm256_max_ps(__A, __B),2652 (__v8sf)_mm256_max_ps(__A, __B),
2852 (__v8sf)_mm256_setzero_ps());2653 (__v8sf)_mm256_setzero_ps());
2853}2654}
28542655
2855static __inline__ __m128d __DEFAULT_FN_ATTRS1282656static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2856_mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {2657_mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2857 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,2658 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2858 (__v2df)_mm_min_pd(__A, __B),2659 (__v2df)_mm_min_pd(__A, __B),
2859 (__v2df)__W);2660 (__v2df)__W);
2860}2661}
28612662
2862static __inline__ __m128d __DEFAULT_FN_ATTRS1282663static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2863_mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B) {2664_mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B) {
2864 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,2665 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2865 (__v2df)_mm_min_pd(__A, __B),2666 (__v2df)_mm_min_pd(__A, __B),
2866 (__v2df)_mm_setzero_pd());2667 (__v2df)_mm_setzero_pd());
2867}2668}
28682669
2869static __inline__ __m256d __DEFAULT_FN_ATTRS2562670static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2870_mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {2671_mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
2871 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,2672 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2872 (__v4df)_mm256_min_pd(__A, __B),2673 (__v4df)_mm256_min_pd(__A, __B),
2873 (__v4df)__W);2674 (__v4df)__W);
2874}2675}
28752676
2876static __inline__ __m256d __DEFAULT_FN_ATTRS2562677static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2877_mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B) {2678_mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B) {
2878 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,2679 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2879 (__v4df)_mm256_min_pd(__A, __B),2680 (__v4df)_mm256_min_pd(__A, __B),
2880 (__v4df)_mm256_setzero_pd());2681 (__v4df)_mm256_setzero_pd());
2881}2682}
28822683
2883static __inline__ __m128 __DEFAULT_FN_ATTRS1282684static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2884_mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {2685_mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2885 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2686 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2886 (__v4sf)_mm_min_ps(__A, __B),2687 (__v4sf)_mm_min_ps(__A, __B),
2887 (__v4sf)__W);2688 (__v4sf)__W);
2888}2689}
28892690
2890static __inline__ __m128 __DEFAULT_FN_ATTRS1282691static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2891_mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B) {2692_mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B) {
2892 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2693 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2893 (__v4sf)_mm_min_ps(__A, __B),2694 (__v4sf)_mm_min_ps(__A, __B),
2894 (__v4sf)_mm_setzero_ps());2695 (__v4sf)_mm_setzero_ps());
2895}2696}
28962697
2897static __inline__ __m256 __DEFAULT_FN_ATTRS2562698static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2898_mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {2699_mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
2899 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2700 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2900 (__v8sf)_mm256_min_ps(__A, __B),2701 (__v8sf)_mm256_min_ps(__A, __B),
2901 (__v8sf)__W);2702 (__v8sf)__W);
2902}2703}
29032704
2904static __inline__ __m256 __DEFAULT_FN_ATTRS2562705static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2905_mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B) {2706_mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B) {
2906 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2707 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2907 (__v8sf)_mm256_min_ps(__A, __B),2708 (__v8sf)_mm256_min_ps(__A, __B),
2908 (__v8sf)_mm256_setzero_ps());2709 (__v8sf)_mm256_setzero_ps());
2909}2710}
29102711
2911static __inline__ __m128d __DEFAULT_FN_ATTRS1282712static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2912_mm_mask_mul_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {2713_mm_mask_mul_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
2913 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,2714 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2914 (__v2df)_mm_mul_pd(__A, __B),2715 (__v2df)_mm_mul_pd(__A, __B),
2915 (__v2df)__W);2716 (__v2df)__W);
2916}2717}
29172718
2918static __inline__ __m128d __DEFAULT_FN_ATTRS1282719static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
2919_mm_maskz_mul_pd(__mmask8 __U, __m128d __A, __m128d __B) {2720_mm_maskz_mul_pd(__mmask8 __U, __m128d __A, __m128d __B) {
2920 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,2721 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
2921 (__v2df)_mm_mul_pd(__A, __B),2722 (__v2df)_mm_mul_pd(__A, __B),
2922 (__v2df)_mm_setzero_pd());2723 (__v2df)_mm_setzero_pd());
2923}2724}
29242725
2925static __inline__ __m256d __DEFAULT_FN_ATTRS2562726static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2926_mm256_mask_mul_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {2727_mm256_mask_mul_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
2927 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,2728 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2928 (__v4df)_mm256_mul_pd(__A, __B),2729 (__v4df)_mm256_mul_pd(__A, __B),
2929 (__v4df)__W);2730 (__v4df)__W);
2930}2731}
29312732
2932static __inline__ __m256d __DEFAULT_FN_ATTRS2562733static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
2933_mm256_maskz_mul_pd(__mmask8 __U, __m256d __A, __m256d __B) {2734_mm256_maskz_mul_pd(__mmask8 __U, __m256d __A, __m256d __B) {
2934 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,2735 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
2935 (__v4df)_mm256_mul_pd(__A, __B),2736 (__v4df)_mm256_mul_pd(__A, __B),
2936 (__v4df)_mm256_setzero_pd());2737 (__v4df)_mm256_setzero_pd());
2937}2738}
29382739
2939static __inline__ __m128 __DEFAULT_FN_ATTRS1282740static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2940_mm_mask_mul_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {2741_mm_mask_mul_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
2941 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2742 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2942 (__v4sf)_mm_mul_ps(__A, __B),2743 (__v4sf)_mm_mul_ps(__A, __B),
2943 (__v4sf)__W);2744 (__v4sf)__W);
2944}2745}
29452746
2946static __inline__ __m128 __DEFAULT_FN_ATTRS1282747static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
2947_mm_maskz_mul_ps(__mmask8 __U, __m128 __A, __m128 __B) {2748_mm_maskz_mul_ps(__mmask8 __U, __m128 __A, __m128 __B) {
2948 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,2749 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
2949 (__v4sf)_mm_mul_ps(__A, __B),2750 (__v4sf)_mm_mul_ps(__A, __B),
2950 (__v4sf)_mm_setzero_ps());2751 (__v4sf)_mm_setzero_ps());
2951}2752}
29522753
2953static __inline__ __m256 __DEFAULT_FN_ATTRS2562754static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2954_mm256_mask_mul_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {2755_mm256_mask_mul_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
2955 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2756 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2956 (__v8sf)_mm256_mul_ps(__A, __B),2757 (__v8sf)_mm256_mul_ps(__A, __B),
2957 (__v8sf)__W);2758 (__v8sf)__W);
2958}2759}
29592760
2960static __inline__ __m256 __DEFAULT_FN_ATTRS2562761static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
2961_mm256_maskz_mul_ps(__mmask8 __U, __m256 __A, __m256 __B) {2762_mm256_maskz_mul_ps(__mmask8 __U, __m256 __A, __m256 __B) {
2962 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,2763 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
2963 (__v8sf)_mm256_mul_ps(__A, __B),2764 (__v8sf)_mm256_mul_ps(__A, __B),
2964 (__v8sf)_mm256_setzero_ps());2765 (__v8sf)_mm256_setzero_ps());
2965}2766}
29662767
2967static __inline__ __m128i __DEFAULT_FN_ATTRS1282768static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2968_mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A) {2769_mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
2969 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,2770 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
2970 (__v4si)_mm_abs_epi32(__A),2771 (__v4si)_mm_abs_epi32(__A),
2971 (__v4si)__W);2772 (__v4si)__W);
2972}2773}
29732774
2974static __inline__ __m128i __DEFAULT_FN_ATTRS1282775static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2975_mm_maskz_abs_epi32(__mmask8 __U, __m128i __A) {2776_mm_maskz_abs_epi32(__mmask8 __U, __m128i __A) {
2976 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,2777 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
2977 (__v4si)_mm_abs_epi32(__A),2778 (__v4si)_mm_abs_epi32(__A),
2978 (__v4si)_mm_setzero_si128());2779 (__v4si)_mm_setzero_si128());
2979}2780}
29802781
2981static __inline__ __m256i __DEFAULT_FN_ATTRS2562782static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2982_mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) {2783_mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
2983 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,2784 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
2984 (__v8si)_mm256_abs_epi32(__A),2785 (__v8si)_mm256_abs_epi32(__A),
2985 (__v8si)__W);2786 (__v8si)__W);
2986}2787}
29872788
2988static __inline__ __m256i __DEFAULT_FN_ATTRS2562789static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
2989_mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A) {2790_mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A) {
2990 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,2791 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
2991 (__v8si)_mm256_abs_epi32(__A),2792 (__v8si)_mm256_abs_epi32(__A),
2992 (__v8si)_mm256_setzero_si256());2793 (__v8si)_mm256_setzero_si256());
2993}2794}
29942795
2995static __inline__ __m128i __DEFAULT_FN_ATTRS1282796static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
2996_mm_abs_epi64 (__m128i __A) {2797_mm_abs_epi64(__m128i __A) {
2997 return (__m128i)__builtin_elementwise_abs((__v2di)__A);2798 return (__m128i)__builtin_elementwise_abs((__v2di)__A);
2998}2799}
29992800
3000static __inline__ __m128i __DEFAULT_FN_ATTRS1282801static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3001_mm_mask_abs_epi64 (__m128i __W, __mmask8 __U, __m128i __A) {2802_mm_mask_abs_epi64(__m128i __W, __mmask8 __U, __m128i __A) {
3002 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,2803 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3003 (__v2di)_mm_abs_epi64(__A),2804 (__v2di)_mm_abs_epi64(__A),
3004 (__v2di)__W);2805 (__v2di)__W);
3005}2806}
30062807
3007static __inline__ __m128i __DEFAULT_FN_ATTRS1282808static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3008_mm_maskz_abs_epi64 (__mmask8 __U, __m128i __A) {2809_mm_maskz_abs_epi64(__mmask8 __U, __m128i __A) {
3009 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,2810 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
3010 (__v2di)_mm_abs_epi64(__A),2811 (__v2di)_mm_abs_epi64(__A),
3011 (__v2di)_mm_setzero_si128());2812 (__v2di)_mm_setzero_si128());
3012}2813}
30132814
3014static __inline__ __m256i __DEFAULT_FN_ATTRS2562815static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3015_mm256_abs_epi64 (__m256i __A) {2816_mm256_abs_epi64(__m256i __A) {
3016 return (__m256i)__builtin_elementwise_abs((__v4di)__A);2817 return (__m256i)__builtin_elementwise_abs((__v4di)__A);
3017}2818}
30182819
3019static __inline__ __m256i __DEFAULT_FN_ATTRS2562820static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3020_mm256_mask_abs_epi64 (__m256i __W, __mmask8 __U, __m256i __A) {2821_mm256_mask_abs_epi64(__m256i __W, __mmask8 __U, __m256i __A) {
3021 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,2822 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
3022 (__v4di)_mm256_abs_epi64(__A),2823 (__v4di)_mm256_abs_epi64(__A),
3023 (__v4di)__W);2824 (__v4di)__W);
3024}2825}
30252826
3026static __inline__ __m256i __DEFAULT_FN_ATTRS2562827static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3027_mm256_maskz_abs_epi64 (__mmask8 __U, __m256i __A) {2828_mm256_maskz_abs_epi64(__mmask8 __U, __m256i __A) {
3028 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,2829 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
3029 (__v4di)_mm256_abs_epi64(__A),2830 (__v4di)_mm256_abs_epi64(__A),
3030 (__v4di)_mm256_setzero_si256());2831 (__v4di)_mm256_setzero_si256());
3031}2832}
30322833
3033static __inline__ __m128i __DEFAULT_FN_ATTRS1282834static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3034_mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) {2835_mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
3035 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,2836 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3036 (__v4si)_mm_max_epi32(__A, __B),2837 (__v4si)_mm_max_epi32(__A, __B),
3037 (__v4si)_mm_setzero_si128());2838 (__v4si)_mm_setzero_si128());
3038}2839}
30392840
3040static __inline__ __m128i __DEFAULT_FN_ATTRS1282841static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3041_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {2842_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3042 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,2843 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3043 (__v4si)_mm_max_epi32(__A, __B),2844 (__v4si)_mm_max_epi32(__A, __B),
3044 (__v4si)__W);2845 (__v4si)__W);
3045}2846}
30462847
3047static __inline__ __m256i __DEFAULT_FN_ATTRS2562848static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3048_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) {2849_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
3049 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,2850 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3050 (__v8si)_mm256_max_epi32(__A, __B),2851 (__v8si)_mm256_max_epi32(__A, __B),
3051 (__v8si)_mm256_setzero_si256());2852 (__v8si)_mm256_setzero_si256());
3052}2853}
30532854
3054static __inline__ __m256i __DEFAULT_FN_ATTRS2562855static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3055_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {2856_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3056 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,2857 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3057 (__v8si)_mm256_max_epi32(__A, __B),2858 (__v8si)_mm256_max_epi32(__A, __B),
3058 (__v8si)__W);2859 (__v8si)__W);
3059}2860}
30602861
3061static __inline__ __m128i __DEFAULT_FN_ATTRS1282862static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3062_mm_max_epi64 (__m128i __A, __m128i __B) {2863_mm_max_epi64(__m128i __A, __m128i __B) {
3063 return (__m128i)__builtin_elementwise_max((__v2di)__A, (__v2di)__B);2864 return (__m128i)__builtin_elementwise_max((__v2di)__A, (__v2di)__B);
3064}2865}
30652866
3066static __inline__ __m128i __DEFAULT_FN_ATTRS1282867static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3067_mm_maskz_max_epi64 (__mmask8 __M, __m128i __A, __m128i __B) {2868_mm_maskz_max_epi64(__mmask8 __M, __m128i __A, __m128i __B) {
3068 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,2869 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3069 (__v2di)_mm_max_epi64(__A, __B),2870 (__v2di)_mm_max_epi64(__A, __B),
3070 (__v2di)_mm_setzero_si128());2871 (__v2di)_mm_setzero_si128());
3071}2872}
30722873
3073static __inline__ __m128i __DEFAULT_FN_ATTRS1282874static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3074_mm_mask_max_epi64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {2875_mm_mask_max_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3075 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,2876 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3076 (__v2di)_mm_max_epi64(__A, __B),2877 (__v2di)_mm_max_epi64(__A, __B),
3077 (__v2di)__W);2878 (__v2di)__W);
3078}2879}
30792880
3080static __inline__ __m256i __DEFAULT_FN_ATTRS2562881static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3081_mm256_max_epi64 (__m256i __A, __m256i __B) {2882_mm256_max_epi64(__m256i __A, __m256i __B) {
3082 return (__m256i)__builtin_elementwise_max((__v4di)__A, (__v4di)__B);2883 return (__m256i)__builtin_elementwise_max((__v4di)__A, (__v4di)__B);
3083}2884}
30842885
3085static __inline__ __m256i __DEFAULT_FN_ATTRS2562886static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3086_mm256_maskz_max_epi64 (__mmask8 __M, __m256i __A, __m256i __B) {2887_mm256_maskz_max_epi64(__mmask8 __M, __m256i __A, __m256i __B) {
3087 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,2888 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3088 (__v4di)_mm256_max_epi64(__A, __B),2889 (__v4di)_mm256_max_epi64(__A, __B),
3089 (__v4di)_mm256_setzero_si256());2890 (__v4di)_mm256_setzero_si256());
3090}2891}
30912892
3092static __inline__ __m256i __DEFAULT_FN_ATTRS2562893static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3093_mm256_mask_max_epi64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {2894_mm256_mask_max_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3094 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,2895 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3095 (__v4di)_mm256_max_epi64(__A, __B),2896 (__v4di)_mm256_max_epi64(__A, __B),
3096 (__v4di)__W);2897 (__v4di)__W);
3097}2898}
30982899
3099static __inline__ __m128i __DEFAULT_FN_ATTRS1282900static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3100_mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) {2901_mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
3101 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,2902 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3102 (__v4si)_mm_max_epu32(__A, __B),2903 (__v4si)_mm_max_epu32(__A, __B),
3103 (__v4si)_mm_setzero_si128());2904 (__v4si)_mm_setzero_si128());
3104}2905}
31052906
3106static __inline__ __m128i __DEFAULT_FN_ATTRS1282907static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3107_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {2908_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3108 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,2909 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3109 (__v4si)_mm_max_epu32(__A, __B),2910 (__v4si)_mm_max_epu32(__A, __B),
3110 (__v4si)__W);2911 (__v4si)__W);
3111}2912}
31122913
3113static __inline__ __m256i __DEFAULT_FN_ATTRS2562914static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3114_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) {2915_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
3115 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,2916 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3116 (__v8si)_mm256_max_epu32(__A, __B),2917 (__v8si)_mm256_max_epu32(__A, __B),
3117 (__v8si)_mm256_setzero_si256());2918 (__v8si)_mm256_setzero_si256());
3118}2919}
31192920
3120static __inline__ __m256i __DEFAULT_FN_ATTRS2562921static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3121_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {2922_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3122 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,2923 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3123 (__v8si)_mm256_max_epu32(__A, __B),2924 (__v8si)_mm256_max_epu32(__A, __B),
3124 (__v8si)__W);2925 (__v8si)__W);
3125}2926}
31262927
3127static __inline__ __m128i __DEFAULT_FN_ATTRS1282928static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3128_mm_max_epu64 (__m128i __A, __m128i __B) {2929_mm_max_epu64(__m128i __A, __m128i __B) {
3129 return (__m128i)__builtin_elementwise_max((__v2du)__A, (__v2du)__B);2930 return (__m128i)__builtin_elementwise_max((__v2du)__A, (__v2du)__B);
3130}2931}
31312932
3132static __inline__ __m128i __DEFAULT_FN_ATTRS1282933static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3133_mm_maskz_max_epu64 (__mmask8 __M, __m128i __A, __m128i __B) {2934_mm_maskz_max_epu64(__mmask8 __M, __m128i __A, __m128i __B) {
3134 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,2935 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3135 (__v2di)_mm_max_epu64(__A, __B),2936 (__v2di)_mm_max_epu64(__A, __B),
3136 (__v2di)_mm_setzero_si128());2937 (__v2di)_mm_setzero_si128());
3137}2938}
31382939
3139static __inline__ __m128i __DEFAULT_FN_ATTRS1282940static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3140_mm_mask_max_epu64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {2941_mm_mask_max_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3141 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,2942 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3142 (__v2di)_mm_max_epu64(__A, __B),2943 (__v2di)_mm_max_epu64(__A, __B),
3143 (__v2di)__W);2944 (__v2di)__W);
3144}2945}
31452946
3146static __inline__ __m256i __DEFAULT_FN_ATTRS2562947static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3147_mm256_max_epu64 (__m256i __A, __m256i __B) {2948_mm256_max_epu64(__m256i __A, __m256i __B) {
3148 return (__m256i)__builtin_elementwise_max((__v4du)__A, (__v4du)__B);2949 return (__m256i)__builtin_elementwise_max((__v4du)__A, (__v4du)__B);
3149}2950}
31502951
3151static __inline__ __m256i __DEFAULT_FN_ATTRS2562952static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3152_mm256_maskz_max_epu64 (__mmask8 __M, __m256i __A, __m256i __B) {2953_mm256_maskz_max_epu64(__mmask8 __M, __m256i __A, __m256i __B) {
3153 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,2954 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3154 (__v4di)_mm256_max_epu64(__A, __B),2955 (__v4di)_mm256_max_epu64(__A, __B),
3155 (__v4di)_mm256_setzero_si256());2956 (__v4di)_mm256_setzero_si256());
3156}2957}
31572958
3158static __inline__ __m256i __DEFAULT_FN_ATTRS2562959static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3159_mm256_mask_max_epu64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {2960_mm256_mask_max_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3160 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,2961 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3161 (__v4di)_mm256_max_epu64(__A, __B),2962 (__v4di)_mm256_max_epu64(__A, __B),
3162 (__v4di)__W);2963 (__v4di)__W);
3163}2964}
31642965
3165static __inline__ __m128i __DEFAULT_FN_ATTRS1282966static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3166_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) {2967_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) {
3167 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,2968 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3168 (__v4si)_mm_min_epi32(__A, __B),2969 (__v4si)_mm_min_epi32(__A, __B),
3169 (__v4si)_mm_setzero_si128());2970 (__v4si)_mm_setzero_si128());
3170}2971}
31712972
3172static __inline__ __m128i __DEFAULT_FN_ATTRS1282973static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3173_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {2974_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3174 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,2975 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3175 (__v4si)_mm_min_epi32(__A, __B),2976 (__v4si)_mm_min_epi32(__A, __B),
3176 (__v4si)__W);2977 (__v4si)__W);
3177}2978}
31782979
3179static __inline__ __m256i __DEFAULT_FN_ATTRS2562980static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3180_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) {2981_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) {
3181 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,2982 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3182 (__v8si)_mm256_min_epi32(__A, __B),2983 (__v8si)_mm256_min_epi32(__A, __B),
3183 (__v8si)_mm256_setzero_si256());2984 (__v8si)_mm256_setzero_si256());
3184}2985}
31852986
3186static __inline__ __m256i __DEFAULT_FN_ATTRS2562987static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3187_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {2988_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3188 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,2989 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3189 (__v8si)_mm256_min_epi32(__A, __B),2990 (__v8si)_mm256_min_epi32(__A, __B),
3190 (__v8si)__W);2991 (__v8si)__W);
3191}2992}
31922993
3193static __inline__ __m128i __DEFAULT_FN_ATTRS1282994static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3194_mm_min_epi64 (__m128i __A, __m128i __B) {2995_mm_min_epi64(__m128i __A, __m128i __B) {
3195 return (__m128i)__builtin_elementwise_min((__v2di)__A, (__v2di)__B);2996 return (__m128i)__builtin_elementwise_min((__v2di)__A, (__v2di)__B);
3196}2997}
31972998
3198static __inline__ __m128i __DEFAULT_FN_ATTRS1282999static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3199_mm_mask_min_epi64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {3000_mm_mask_min_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3200 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,3001 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3201 (__v2di)_mm_min_epi64(__A, __B),3002 (__v2di)_mm_min_epi64(__A, __B),
3202 (__v2di)__W);3003 (__v2di)__W);
3203}3004}
32043005
3205static __inline__ __m128i __DEFAULT_FN_ATTRS1283006static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3206_mm_maskz_min_epi64 (__mmask8 __M, __m128i __A, __m128i __B) {3007_mm_maskz_min_epi64(__mmask8 __M, __m128i __A, __m128i __B) {
3207 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,3008 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3208 (__v2di)_mm_min_epi64(__A, __B),3009 (__v2di)_mm_min_epi64(__A, __B),
3209 (__v2di)_mm_setzero_si128());3010 (__v2di)_mm_setzero_si128());
3210}3011}
32113012
3212static __inline__ __m256i __DEFAULT_FN_ATTRS2563013static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3213_mm256_min_epi64 (__m256i __A, __m256i __B) {3014_mm256_min_epi64(__m256i __A, __m256i __B) {
3214 return (__m256i)__builtin_elementwise_min((__v4di)__A, (__v4di)__B);3015 return (__m256i)__builtin_elementwise_min((__v4di)__A, (__v4di)__B);
3215}3016}
32163017
3217static __inline__ __m256i __DEFAULT_FN_ATTRS2563018static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3218_mm256_mask_min_epi64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {3019_mm256_mask_min_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3219 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,3020 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3220 (__v4di)_mm256_min_epi64(__A, __B),3021 (__v4di)_mm256_min_epi64(__A, __B),
3221 (__v4di)__W);3022 (__v4di)__W);
3222}3023}
32233024
3224static __inline__ __m256i __DEFAULT_FN_ATTRS2563025static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3225_mm256_maskz_min_epi64 (__mmask8 __M, __m256i __A, __m256i __B) {3026_mm256_maskz_min_epi64(__mmask8 __M, __m256i __A, __m256i __B) {
3226 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,3027 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3227 (__v4di)_mm256_min_epi64(__A, __B),3028 (__v4di)_mm256_min_epi64(__A, __B),
3228 (__v4di)_mm256_setzero_si256());3029 (__v4di)_mm256_setzero_si256());
3229}3030}
32303031
3231static __inline__ __m128i __DEFAULT_FN_ATTRS1283032static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3232_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) {3033_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) {
3233 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,3034 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3234 (__v4si)_mm_min_epu32(__A, __B),3035 (__v4si)_mm_min_epu32(__A, __B),
3235 (__v4si)_mm_setzero_si128());3036 (__v4si)_mm_setzero_si128());
3236}3037}
32373038
3238static __inline__ __m128i __DEFAULT_FN_ATTRS1283039static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3239_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {3040_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3240 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,3041 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
3241 (__v4si)_mm_min_epu32(__A, __B),3042 (__v4si)_mm_min_epu32(__A, __B),
3242 (__v4si)__W);3043 (__v4si)__W);
3243}3044}
32443045
3245static __inline__ __m256i __DEFAULT_FN_ATTRS2563046static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3246_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) {3047_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) {
3247 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,3048 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3248 (__v8si)_mm256_min_epu32(__A, __B),3049 (__v8si)_mm256_min_epu32(__A, __B),
3249 (__v8si)_mm256_setzero_si256());3050 (__v8si)_mm256_setzero_si256());
3250}3051}
32513052
3252static __inline__ __m256i __DEFAULT_FN_ATTRS2563053static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3253_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {3054_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3254 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,3055 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
3255 (__v8si)_mm256_min_epu32(__A, __B),3056 (__v8si)_mm256_min_epu32(__A, __B),
3256 (__v8si)__W);3057 (__v8si)__W);
3257}3058}
32583059
3259static __inline__ __m128i __DEFAULT_FN_ATTRS1283060static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3260_mm_min_epu64 (__m128i __A, __m128i __B) {3061_mm_min_epu64(__m128i __A, __m128i __B) {
3261 return (__m128i)__builtin_elementwise_min((__v2du)__A, (__v2du)__B);3062 return (__m128i)__builtin_elementwise_min((__v2du)__A, (__v2du)__B);
3262}3063}
32633064
3264static __inline__ __m128i __DEFAULT_FN_ATTRS1283065static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3265_mm_mask_min_epu64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {3066_mm_mask_min_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) {
3266 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,3067 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3267 (__v2di)_mm_min_epu64(__A, __B),3068 (__v2di)_mm_min_epu64(__A, __B),
3268 (__v2di)__W);3069 (__v2di)__W);
3269}3070}
32703071
3271static __inline__ __m128i __DEFAULT_FN_ATTRS1283072static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3272_mm_maskz_min_epu64 (__mmask8 __M, __m128i __A, __m128i __B) {3073_mm_maskz_min_epu64(__mmask8 __M, __m128i __A, __m128i __B) {
3273 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,3074 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M,
3274 (__v2di)_mm_min_epu64(__A, __B),3075 (__v2di)_mm_min_epu64(__A, __B),
3275 (__v2di)_mm_setzero_si128());3076 (__v2di)_mm_setzero_si128());
3276}3077}
32773078
3278static __inline__ __m256i __DEFAULT_FN_ATTRS2563079static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3279_mm256_min_epu64 (__m256i __A, __m256i __B) {3080_mm256_min_epu64(__m256i __A, __m256i __B) {
3280 return (__m256i)__builtin_elementwise_min((__v4du)__A, (__v4du)__B);3081 return (__m256i)__builtin_elementwise_min((__v4du)__A, (__v4du)__B);
3281}3082}
32823083
3283static __inline__ __m256i __DEFAULT_FN_ATTRS2563084static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3284_mm256_mask_min_epu64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {3085_mm256_mask_min_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) {
3285 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,3086 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3286 (__v4di)_mm256_min_epu64(__A, __B),3087 (__v4di)_mm256_min_epu64(__A, __B),
3287 (__v4di)__W);3088 (__v4di)__W);
3288}3089}
32893090
3290static __inline__ __m256i __DEFAULT_FN_ATTRS2563091static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3291_mm256_maskz_min_epu64 (__mmask8 __M, __m256i __A, __m256i __B) {3092_mm256_maskz_min_epu64(__mmask8 __M, __m256i __A, __m256i __B) {
3292 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,3093 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
3293 (__v4di)_mm256_min_epu64(__A, __B),3094 (__v4di)_mm256_min_epu64(__A, __B),
3294 (__v4di)_mm256_setzero_si256());3095 (__v4di)_mm256_setzero_si256());
...@@ -3691,69 +3492,69 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3691,69 +3492,69 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3691 (__v8sf)_mm256_setzero_ps());3492 (__v8sf)_mm256_setzero_ps());
3692 }3493 }
36933494
3694 static __inline__ __m128d __DEFAULT_FN_ATTRS1283495 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3695 _mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {3496 _mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
3696 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,3497 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
3697 (__v2df)_mm_sub_pd(__A, __B),3498 (__v2df)_mm_sub_pd(__A, __B),
3698 (__v2df)__W);3499 (__v2df)__W);
3699 }3500 }
37003501
3701 static __inline__ __m128d __DEFAULT_FN_ATTRS1283502 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3702 _mm_maskz_sub_pd(__mmask8 __U, __m128d __A, __m128d __B) {3503 _mm_maskz_sub_pd(__mmask8 __U, __m128d __A, __m128d __B) {
3703 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,3504 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
3704 (__v2df)_mm_sub_pd(__A, __B),3505 (__v2df)_mm_sub_pd(__A, __B),
3705 (__v2df)_mm_setzero_pd());3506 (__v2df)_mm_setzero_pd());
3706 }3507 }
37073508
3708 static __inline__ __m256d __DEFAULT_FN_ATTRS2563509 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3709 _mm256_mask_sub_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {3510 _mm256_mask_sub_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
3710 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,3511 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
3711 (__v4df)_mm256_sub_pd(__A, __B),3512 (__v4df)_mm256_sub_pd(__A, __B),
3712 (__v4df)__W);3513 (__v4df)__W);
3713 }3514 }
37143515
3715 static __inline__ __m256d __DEFAULT_FN_ATTRS2563516 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3716 _mm256_maskz_sub_pd(__mmask8 __U, __m256d __A, __m256d __B) {3517 _mm256_maskz_sub_pd(__mmask8 __U, __m256d __A, __m256d __B) {
3717 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,3518 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
3718 (__v4df)_mm256_sub_pd(__A, __B),3519 (__v4df)_mm256_sub_pd(__A, __B),
3719 (__v4df)_mm256_setzero_pd());3520 (__v4df)_mm256_setzero_pd());
3720 }3521 }
37213522
3722 static __inline__ __m128 __DEFAULT_FN_ATTRS1283523 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3723 _mm_mask_sub_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {3524 _mm_mask_sub_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
3724 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,3525 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
3725 (__v4sf)_mm_sub_ps(__A, __B),3526 (__v4sf)_mm_sub_ps(__A, __B),
3726 (__v4sf)__W);3527 (__v4sf)__W);
3727 }3528 }
37283529
3729 static __inline__ __m128 __DEFAULT_FN_ATTRS1283530 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3730 _mm_maskz_sub_ps(__mmask8 __U, __m128 __A, __m128 __B) {3531 _mm_maskz_sub_ps(__mmask8 __U, __m128 __A, __m128 __B) {
3731 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,3532 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
3732 (__v4sf)_mm_sub_ps(__A, __B),3533 (__v4sf)_mm_sub_ps(__A, __B),
3733 (__v4sf)_mm_setzero_ps());3534 (__v4sf)_mm_setzero_ps());
3734 }3535 }
37353536
3736 static __inline__ __m256 __DEFAULT_FN_ATTRS2563537 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3737 _mm256_mask_sub_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {3538 _mm256_mask_sub_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
3738 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,3539 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
3739 (__v8sf)_mm256_sub_ps(__A, __B),3540 (__v8sf)_mm256_sub_ps(__A, __B),
3740 (__v8sf)__W);3541 (__v8sf)__W);
3741 }3542 }
37423543
3743 static __inline__ __m256 __DEFAULT_FN_ATTRS2563544 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3744 _mm256_maskz_sub_ps(__mmask8 __U, __m256 __A, __m256 __B) {3545 _mm256_maskz_sub_ps(__mmask8 __U, __m256 __A, __m256 __B) {
3745 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,3546 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
3746 (__v8sf)_mm256_sub_ps(__A, __B),3547 (__v8sf)_mm256_sub_ps(__A, __B),
3747 (__v8sf)_mm256_setzero_ps());3548 (__v8sf)_mm256_setzero_ps());
3748 }3549 }
37493550
3750 static __inline__ __m128i __DEFAULT_FN_ATTRS1283551 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3751 _mm_permutex2var_epi32(__m128i __A, __m128i __I, __m128i __B) {3552 _mm_permutex2var_epi32(__m128i __A, __m128i __I, __m128i __B) {
3752 return (__m128i)__builtin_ia32_vpermi2vard128((__v4si) __A, (__v4si)__I,3553 return (__m128i)__builtin_ia32_vpermi2vard128((__v4si) __A, (__v4si)__I,
3753 (__v4si)__B);3554 (__v4si)__B);
3754 }3555 }
37553556
3756 static __inline__ __m128i __DEFAULT_FN_ATTRS1283557 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3757 _mm_mask_permutex2var_epi32(__m128i __A, __mmask8 __U, __m128i __I,3558 _mm_mask_permutex2var_epi32(__m128i __A, __mmask8 __U, __m128i __I,
3758 __m128i __B) {3559 __m128i __B) {
3759 return (__m128i)__builtin_ia32_selectd_128(__U,3560 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -3761,7 +3562,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3761,7 +3562,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3761 (__v4si)__A);3562 (__v4si)__A);
3762 }3563 }
37633564
3764 static __inline__ __m128i __DEFAULT_FN_ATTRS1283565 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3765 _mm_mask2_permutex2var_epi32(__m128i __A, __m128i __I, __mmask8 __U,3566 _mm_mask2_permutex2var_epi32(__m128i __A, __m128i __I, __mmask8 __U,
3766 __m128i __B) {3567 __m128i __B) {
3767 return (__m128i)__builtin_ia32_selectd_128(__U,3568 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -3769,7 +3570,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3769,7 +3570,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3769 (__v4si)__I);3570 (__v4si)__I);
3770 }3571 }
37713572
3772 static __inline__ __m128i __DEFAULT_FN_ATTRS1283573 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3773 _mm_maskz_permutex2var_epi32(__mmask8 __U, __m128i __A, __m128i __I,3574 _mm_maskz_permutex2var_epi32(__mmask8 __U, __m128i __A, __m128i __I,
3774 __m128i __B) {3575 __m128i __B) {
3775 return (__m128i)__builtin_ia32_selectd_128(__U,3576 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -3777,13 +3578,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3777,13 +3578,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3777 (__v4si)_mm_setzero_si128());3578 (__v4si)_mm_setzero_si128());
3778 }3579 }
37793580
3780 static __inline__ __m256i __DEFAULT_FN_ATTRS2563581 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3781 _mm256_permutex2var_epi32(__m256i __A, __m256i __I, __m256i __B) {3582 _mm256_permutex2var_epi32(__m256i __A, __m256i __I, __m256i __B) {
3782 return (__m256i)__builtin_ia32_vpermi2vard256((__v8si)__A, (__v8si) __I,3583 return (__m256i)__builtin_ia32_vpermi2vard256((__v8si)__A, (__v8si) __I,
3783 (__v8si) __B);3584 (__v8si) __B);
3784 }3585 }
37853586
3786 static __inline__ __m256i __DEFAULT_FN_ATTRS2563587 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3787 _mm256_mask_permutex2var_epi32(__m256i __A, __mmask8 __U, __m256i __I,3588 _mm256_mask_permutex2var_epi32(__m256i __A, __mmask8 __U, __m256i __I,
3788 __m256i __B) {3589 __m256i __B) {
3789 return (__m256i)__builtin_ia32_selectd_256(__U,3590 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -3791,7 +3592,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3791,7 +3592,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3791 (__v8si)__A);3592 (__v8si)__A);
3792 }3593 }
37933594
3794 static __inline__ __m256i __DEFAULT_FN_ATTRS2563595 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3795 _mm256_mask2_permutex2var_epi32(__m256i __A, __m256i __I, __mmask8 __U,3596 _mm256_mask2_permutex2var_epi32(__m256i __A, __m256i __I, __mmask8 __U,
3796 __m256i __B) {3597 __m256i __B) {
3797 return (__m256i)__builtin_ia32_selectd_256(__U,3598 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -3799,7 +3600,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3799,7 +3600,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3799 (__v8si)__I);3600 (__v8si)__I);
3800 }3601 }
38013602
3802 static __inline__ __m256i __DEFAULT_FN_ATTRS2563603 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3803 _mm256_maskz_permutex2var_epi32(__mmask8 __U, __m256i __A, __m256i __I,3604 _mm256_maskz_permutex2var_epi32(__mmask8 __U, __m256i __A, __m256i __I,
3804 __m256i __B) {3605 __m256i __B) {
3805 return (__m256i)__builtin_ia32_selectd_256(__U,3606 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -3807,40 +3608,43 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3807,40 +3608,43 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3807 (__v8si)_mm256_setzero_si256());3608 (__v8si)_mm256_setzero_si256());
3808 }3609 }
38093610
3810 static __inline__ __m128d __DEFAULT_FN_ATTRS1283611 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3811 _mm_permutex2var_pd(__m128d __A, __m128i __I, __m128d __B) {3612 _mm_permutex2var_pd(__m128d __A, __m128i __I, __m128d __B) {
3812 return (__m128d)__builtin_ia32_vpermi2varpd128((__v2df)__A, (__v2di)__I,3613 return (__m128d)__builtin_ia32_vpermi2varpd128((__v2df)__A, (__v2di)__I,
3813 (__v2df)__B);3614 (__v2df)__B);
3814 }3615 }
38153616
3816 static __inline__ __m128d __DEFAULT_FN_ATTRS1283617 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3817 _mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I, __m128d __B) {3618 _mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I,
3619 __m128d __B) {
3818 return (__m128d)__builtin_ia32_selectpd_128(__U,3620 return (__m128d)__builtin_ia32_selectpd_128(__U,
3819 (__v2df)_mm_permutex2var_pd(__A, __I, __B),3621 (__v2df)_mm_permutex2var_pd(__A, __I, __B),
3820 (__v2df)__A);3622 (__v2df)__A);
3821 }3623 }
38223624
3823 static __inline__ __m128d __DEFAULT_FN_ATTRS1283625 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3824 _mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U, __m128d __B) {3626 _mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U,
3627 __m128d __B) {
3825 return (__m128d)__builtin_ia32_selectpd_128(__U,3628 return (__m128d)__builtin_ia32_selectpd_128(__U,
3826 (__v2df)_mm_permutex2var_pd(__A, __I, __B),3629 (__v2df)_mm_permutex2var_pd(__A, __I, __B),
3827 (__v2df)(__m128d)__I);3630 (__v2df)(__m128d)__I);
3828 }3631 }
38293632
3830 static __inline__ __m128d __DEFAULT_FN_ATTRS1283633 static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
3831 _mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I, __m128d __B) {3634 _mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I,
3635 __m128d __B) {
3832 return (__m128d)__builtin_ia32_selectpd_128(__U,3636 return (__m128d)__builtin_ia32_selectpd_128(__U,
3833 (__v2df)_mm_permutex2var_pd(__A, __I, __B),3637 (__v2df)_mm_permutex2var_pd(__A, __I, __B),
3834 (__v2df)_mm_setzero_pd());3638 (__v2df)_mm_setzero_pd());
3835 }3639 }
38363640
3837 static __inline__ __m256d __DEFAULT_FN_ATTRS2563641 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3838 _mm256_permutex2var_pd(__m256d __A, __m256i __I, __m256d __B) {3642 _mm256_permutex2var_pd(__m256d __A, __m256i __I, __m256d __B) {
3839 return (__m256d)__builtin_ia32_vpermi2varpd256((__v4df)__A, (__v4di)__I,3643 return (__m256d)__builtin_ia32_vpermi2varpd256((__v4df)__A, (__v4di)__I,
3840 (__v4df)__B);3644 (__v4df)__B);
3841 }3645 }
38423646
3843 static __inline__ __m256d __DEFAULT_FN_ATTRS2563647 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3844 _mm256_mask_permutex2var_pd(__m256d __A, __mmask8 __U, __m256i __I,3648 _mm256_mask_permutex2var_pd(__m256d __A, __mmask8 __U, __m256i __I,
3845 __m256d __B) {3649 __m256d __B) {
3846 return (__m256d)__builtin_ia32_selectpd_256(__U,3650 return (__m256d)__builtin_ia32_selectpd_256(__U,
...@@ -3848,7 +3652,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3848,7 +3652,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3848 (__v4df)__A);3652 (__v4df)__A);
3849 }3653 }
38503654
3851 static __inline__ __m256d __DEFAULT_FN_ATTRS2563655 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3852 _mm256_mask2_permutex2var_pd(__m256d __A, __m256i __I, __mmask8 __U,3656 _mm256_mask2_permutex2var_pd(__m256d __A, __m256i __I, __mmask8 __U,
3853 __m256d __B) {3657 __m256d __B) {
3854 return (__m256d)__builtin_ia32_selectpd_256(__U,3658 return (__m256d)__builtin_ia32_selectpd_256(__U,
...@@ -3856,7 +3660,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3856,7 +3660,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3856 (__v4df)(__m256d)__I);3660 (__v4df)(__m256d)__I);
3857 }3661 }
38583662
3859 static __inline__ __m256d __DEFAULT_FN_ATTRS2563663 static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
3860 _mm256_maskz_permutex2var_pd(__mmask8 __U, __m256d __A, __m256i __I,3664 _mm256_maskz_permutex2var_pd(__mmask8 __U, __m256d __A, __m256i __I,
3861 __m256d __B) {3665 __m256d __B) {
3862 return (__m256d)__builtin_ia32_selectpd_256(__U,3666 return (__m256d)__builtin_ia32_selectpd_256(__U,
...@@ -3864,47 +3668,48 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3864,47 +3668,48 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3864 (__v4df)_mm256_setzero_pd());3668 (__v4df)_mm256_setzero_pd());
3865 }3669 }
38663670
3867 static __inline__ __m128 __DEFAULT_FN_ATTRS1283671 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3868 _mm_permutex2var_ps(__m128 __A, __m128i __I, __m128 __B) {3672 _mm_permutex2var_ps(__m128 __A, __m128i __I, __m128 __B) {
3869 return (__m128)__builtin_ia32_vpermi2varps128((__v4sf)__A, (__v4si)__I,3673 return (__m128)__builtin_ia32_vpermi2varps128((__v4sf)__A, (__v4si)__I,
3870 (__v4sf)__B);3674 (__v4sf)__B);
3871 }3675 }
38723676
3873 static __inline__ __m128 __DEFAULT_FN_ATTRS1283677 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3874 _mm_mask_permutex2var_ps(__m128 __A, __mmask8 __U, __m128i __I, __m128 __B) {3678 _mm_mask_permutex2var_ps(__m128 __A, __mmask8 __U, __m128i __I, __m128 __B) {
3875 return (__m128)__builtin_ia32_selectps_128(__U,3679 return (__m128)__builtin_ia32_selectps_128(__U,
3876 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),3680 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),
3877 (__v4sf)__A);3681 (__v4sf)__A);
3878 }3682 }
38793683
3880 static __inline__ __m128 __DEFAULT_FN_ATTRS1283684 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3881 _mm_mask2_permutex2var_ps(__m128 __A, __m128i __I, __mmask8 __U, __m128 __B) {3685 _mm_mask2_permutex2var_ps(__m128 __A, __m128i __I, __mmask8 __U, __m128 __B) {
3882 return (__m128)__builtin_ia32_selectps_128(__U,3686 return (__m128)__builtin_ia32_selectps_128(__U,
3883 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),3687 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),
3884 (__v4sf)(__m128)__I);3688 (__v4sf)(__m128)__I);
3885 }3689 }
38863690
3887 static __inline__ __m128 __DEFAULT_FN_ATTRS1283691 static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
3888 _mm_maskz_permutex2var_ps(__mmask8 __U, __m128 __A, __m128i __I, __m128 __B) {3692 _mm_maskz_permutex2var_ps(__mmask8 __U, __m128 __A, __m128i __I, __m128 __B) {
3889 return (__m128)__builtin_ia32_selectps_128(__U,3693 return (__m128)__builtin_ia32_selectps_128(__U,
3890 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),3694 (__v4sf)_mm_permutex2var_ps(__A, __I, __B),
3891 (__v4sf)_mm_setzero_ps());3695 (__v4sf)_mm_setzero_ps());
3892 }3696 }
38933697
3894 static __inline__ __m256 __DEFAULT_FN_ATTRS2563698 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3895 _mm256_permutex2var_ps(__m256 __A, __m256i __I, __m256 __B) {3699 _mm256_permutex2var_ps(__m256 __A, __m256i __I, __m256 __B) {
3896 return (__m256)__builtin_ia32_vpermi2varps256((__v8sf)__A, (__v8si)__I,3700 return (__m256)__builtin_ia32_vpermi2varps256((__v8sf)__A, (__v8si)__I,
3897 (__v8sf) __B);3701 (__v8sf) __B);
3898 }3702 }
38993703
3900 static __inline__ __m256 __DEFAULT_FN_ATTRS2563704 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3901 _mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I, __m256 __B) {3705 _mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I,
3706 __m256 __B) {
3902 return (__m256)__builtin_ia32_selectps_256(__U,3707 return (__m256)__builtin_ia32_selectps_256(__U,
3903 (__v8sf)_mm256_permutex2var_ps(__A, __I, __B),3708 (__v8sf)_mm256_permutex2var_ps(__A, __I, __B),
3904 (__v8sf)__A);3709 (__v8sf)__A);
3905 }3710 }
39063711
3907 static __inline__ __m256 __DEFAULT_FN_ATTRS2563712 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3908 _mm256_mask2_permutex2var_ps(__m256 __A, __m256i __I, __mmask8 __U,3713 _mm256_mask2_permutex2var_ps(__m256 __A, __m256i __I, __mmask8 __U,
3909 __m256 __B) {3714 __m256 __B) {
3910 return (__m256)__builtin_ia32_selectps_256(__U,3715 return (__m256)__builtin_ia32_selectps_256(__U,
...@@ -3912,7 +3717,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3912,7 +3717,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3912 (__v8sf)(__m256)__I);3717 (__v8sf)(__m256)__I);
3913 }3718 }
39143719
3915 static __inline__ __m256 __DEFAULT_FN_ATTRS2563720 static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
3916 _mm256_maskz_permutex2var_ps(__mmask8 __U, __m256 __A, __m256i __I,3721 _mm256_maskz_permutex2var_ps(__mmask8 __U, __m256 __A, __m256i __I,
3917 __m256 __B) {3722 __m256 __B) {
3918 return (__m256)__builtin_ia32_selectps_256(__U,3723 return (__m256)__builtin_ia32_selectps_256(__U,
...@@ -3920,13 +3725,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3920,13 +3725,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3920 (__v8sf)_mm256_setzero_ps());3725 (__v8sf)_mm256_setzero_ps());
3921 }3726 }
39223727
3923 static __inline__ __m128i __DEFAULT_FN_ATTRS1283728 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3924 _mm_permutex2var_epi64(__m128i __A, __m128i __I, __m128i __B) {3729 _mm_permutex2var_epi64(__m128i __A, __m128i __I, __m128i __B) {
3925 return (__m128i)__builtin_ia32_vpermi2varq128((__v2di)__A, (__v2di)__I,3730 return (__m128i)__builtin_ia32_vpermi2varq128((__v2di)__A, (__v2di)__I,
3926 (__v2di)__B);3731 (__v2di)__B);
3927 }3732 }
39283733
3929 static __inline__ __m128i __DEFAULT_FN_ATTRS1283734 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3930 _mm_mask_permutex2var_epi64(__m128i __A, __mmask8 __U, __m128i __I,3735 _mm_mask_permutex2var_epi64(__m128i __A, __mmask8 __U, __m128i __I,
3931 __m128i __B) {3736 __m128i __B) {
3932 return (__m128i)__builtin_ia32_selectq_128(__U,3737 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -3934,7 +3739,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3934,7 +3739,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3934 (__v2di)__A);3739 (__v2di)__A);
3935 }3740 }
39363741
3937 static __inline__ __m128i __DEFAULT_FN_ATTRS1283742 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3938 _mm_mask2_permutex2var_epi64(__m128i __A, __m128i __I, __mmask8 __U,3743 _mm_mask2_permutex2var_epi64(__m128i __A, __m128i __I, __mmask8 __U,
3939 __m128i __B) {3744 __m128i __B) {
3940 return (__m128i)__builtin_ia32_selectq_128(__U,3745 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -3942,7 +3747,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3942,7 +3747,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3942 (__v2di)__I);3747 (__v2di)__I);
3943 }3748 }
39443749
3945 static __inline__ __m128i __DEFAULT_FN_ATTRS1283750 static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
3946 _mm_maskz_permutex2var_epi64(__mmask8 __U, __m128i __A, __m128i __I,3751 _mm_maskz_permutex2var_epi64(__mmask8 __U, __m128i __A, __m128i __I,
3947 __m128i __B) {3752 __m128i __B) {
3948 return (__m128i)__builtin_ia32_selectq_128(__U,3753 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -3950,14 +3755,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3950,14 +3755,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3950 (__v2di)_mm_setzero_si128());3755 (__v2di)_mm_setzero_si128());
3951 }3756 }
39523757
39533758 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3954 static __inline__ __m256i __DEFAULT_FN_ATTRS256
3955 _mm256_permutex2var_epi64(__m256i __A, __m256i __I, __m256i __B) {3759 _mm256_permutex2var_epi64(__m256i __A, __m256i __I, __m256i __B) {
3956 return (__m256i)__builtin_ia32_vpermi2varq256((__v4di)__A, (__v4di) __I,3760 return (__m256i)__builtin_ia32_vpermi2varq256((__v4di)__A, (__v4di) __I,
3957 (__v4di) __B);3761 (__v4di) __B);
3958 }3762 }
39593763
3960 static __inline__ __m256i __DEFAULT_FN_ATTRS2563764 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3961 _mm256_mask_permutex2var_epi64(__m256i __A, __mmask8 __U, __m256i __I,3765 _mm256_mask_permutex2var_epi64(__m256i __A, __mmask8 __U, __m256i __I,
3962 __m256i __B) {3766 __m256i __B) {
3963 return (__m256i)__builtin_ia32_selectq_256(__U,3767 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -3965,7 +3769,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3965,7 +3769,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3965 (__v4di)__A);3769 (__v4di)__A);
3966 }3770 }
39673771
3968 static __inline__ __m256i __DEFAULT_FN_ATTRS2563772 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3969 _mm256_mask2_permutex2var_epi64(__m256i __A, __m256i __I, __mmask8 __U,3773 _mm256_mask2_permutex2var_epi64(__m256i __A, __m256i __I, __mmask8 __U,
3970 __m256i __B) {3774 __m256i __B) {
3971 return (__m256i)__builtin_ia32_selectq_256(__U,3775 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -3973,7 +3777,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -3973,7 +3777,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
3973 (__v4di)__I);3777 (__v4di)__I);
3974 }3778 }
39753779
3976 static __inline__ __m256i __DEFAULT_FN_ATTRS2563780 static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
3977 _mm256_maskz_permutex2var_epi64(__mmask8 __U, __m256i __A, __m256i __I,3781 _mm256_maskz_permutex2var_epi64(__mmask8 __U, __m256i __A, __m256i __I,
3978 __m256i __B) {3782 __m256i __B) {
3979 return (__m256i)__builtin_ia32_selectq_256(__U,3783 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -4355,13 +4159,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {...@@ -4355,13 +4159,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) {
4355 (__v4di)_mm256_rol_epi64((a), (b)), \4159 (__v4di)_mm256_rol_epi64((a), (b)), \
4356 (__v4di)_mm256_setzero_si256()))4160 (__v4di)_mm256_setzero_si256()))
43574161
4358static __inline__ __m128i __DEFAULT_FN_ATTRS1284162static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4359_mm_rolv_epi32 (__m128i __A, __m128i __B)4163_mm_rolv_epi32 (__m128i __A, __m128i __B)
4360{4164{
4361 return (__m128i)__builtin_ia32_prolvd128((__v4si)__A, (__v4si)__B);4165 return (__m128i)__builtin_elementwise_fshl((__v4su)__A, (__v4su)__A, (__v4su)__B);
4362}4166}
43634167
4364static __inline__ __m128i __DEFAULT_FN_ATTRS1284168static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4365_mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)4169_mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4366{4170{
4367 return (__m128i)__builtin_ia32_selectd_128(__U,4171 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -4369,7 +4173,7 @@ _mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -4369,7 +4173,7 @@ _mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4369 (__v4si)__W);4173 (__v4si)__W);
4370}4174}
43714175
4372static __inline__ __m128i __DEFAULT_FN_ATTRS1284176static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4373_mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)4177_mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
4374{4178{
4375 return (__m128i)__builtin_ia32_selectd_128(__U,4179 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -4377,13 +4181,13 @@ _mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)...@@ -4377,13 +4181,13 @@ _mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
4377 (__v4si)_mm_setzero_si128());4181 (__v4si)_mm_setzero_si128());
4378}4182}
43794183
4380static __inline__ __m256i __DEFAULT_FN_ATTRS2564184static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4381_mm256_rolv_epi32 (__m256i __A, __m256i __B)4185_mm256_rolv_epi32 (__m256i __A, __m256i __B)
4382{4186{
4383 return (__m256i)__builtin_ia32_prolvd256((__v8si)__A, (__v8si)__B);4187 return (__m256i)__builtin_elementwise_fshl((__v8su)__A, (__v8su)__A, (__v8su)__B);
4384}4188}
43854189
4386static __inline__ __m256i __DEFAULT_FN_ATTRS2564190static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4387_mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)4191_mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4388{4192{
4389 return (__m256i)__builtin_ia32_selectd_256(__U,4193 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -4391,7 +4195,7 @@ _mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)...@@ -4391,7 +4195,7 @@ _mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4391 (__v8si)__W);4195 (__v8si)__W);
4392}4196}
43934197
4394static __inline__ __m256i __DEFAULT_FN_ATTRS2564198static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4395_mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)4199_mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
4396{4200{
4397 return (__m256i)__builtin_ia32_selectd_256(__U,4201 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -4399,13 +4203,13 @@ _mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)...@@ -4399,13 +4203,13 @@ _mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
4399 (__v8si)_mm256_setzero_si256());4203 (__v8si)_mm256_setzero_si256());
4400}4204}
44014205
4402static __inline__ __m128i __DEFAULT_FN_ATTRS1284206static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4403_mm_rolv_epi64 (__m128i __A, __m128i __B)4207_mm_rolv_epi64 (__m128i __A, __m128i __B)
4404{4208{
4405 return (__m128i)__builtin_ia32_prolvq128((__v2di)__A, (__v2di)__B);4209 return (__m128i)__builtin_elementwise_fshl((__v2du)__A, (__v2du)__A, (__v2du)__B);
4406}4210}
44074211
4408static __inline__ __m128i __DEFAULT_FN_ATTRS1284212static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4409_mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)4213_mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4410{4214{
4411 return (__m128i)__builtin_ia32_selectq_128(__U,4215 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -4413,7 +4217,7 @@ _mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -4413,7 +4217,7 @@ _mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4413 (__v2di)__W);4217 (__v2di)__W);
4414}4218}
44154219
4416static __inline__ __m128i __DEFAULT_FN_ATTRS1284220static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4417_mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)4221_mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
4418{4222{
4419 return (__m128i)__builtin_ia32_selectq_128(__U,4223 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -4421,13 +4225,13 @@ _mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)...@@ -4421,13 +4225,13 @@ _mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
4421 (__v2di)_mm_setzero_si128());4225 (__v2di)_mm_setzero_si128());
4422}4226}
44234227
4424static __inline__ __m256i __DEFAULT_FN_ATTRS2564228static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4425_mm256_rolv_epi64 (__m256i __A, __m256i __B)4229_mm256_rolv_epi64 (__m256i __A, __m256i __B)
4426{4230{
4427 return (__m256i)__builtin_ia32_prolvq256((__v4di)__A, (__v4di)__B);4231 return (__m256i)__builtin_elementwise_fshl((__v4du)__A, (__v4du)__A, (__v4du)__B);
4428}4232}
44294233
4430static __inline__ __m256i __DEFAULT_FN_ATTRS2564234static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4431_mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)4235_mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4432{4236{
4433 return (__m256i)__builtin_ia32_selectq_256(__U,4237 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -4435,7 +4239,7 @@ _mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)...@@ -4435,7 +4239,7 @@ _mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4435 (__v4di)__W);4239 (__v4di)__W);
4436}4240}
44374241
4438static __inline__ __m256i __DEFAULT_FN_ATTRS2564242static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4439_mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)4243_mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
4440{4244{
4441 return (__m256i)__builtin_ia32_selectq_256(__U,4245 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -4495,33 +4299,29 @@ _mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)...@@ -4495,33 +4299,29 @@ _mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
4495 (__v4di)_mm256_ror_epi64((a), (b)), \4299 (__v4di)_mm256_ror_epi64((a), (b)), \
4496 (__v4di)_mm256_setzero_si256()))4300 (__v4di)_mm256_setzero_si256()))
44974301
4498static __inline__ __m128i __DEFAULT_FN_ATTRS1284302static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4499_mm_mask_sll_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)4303_mm_mask_sll_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
4500{
4501 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4304 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4502 (__v4si)_mm_sll_epi32(__A, __B),4305 (__v4si)_mm_sll_epi32(__A, __B),
4503 (__v4si)__W);4306 (__v4si)__W);
4504}4307}
45054308
4506static __inline__ __m128i __DEFAULT_FN_ATTRS1284309static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4507_mm_maskz_sll_epi32(__mmask8 __U, __m128i __A, __m128i __B)4310_mm_maskz_sll_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
4508{
4509 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4311 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4510 (__v4si)_mm_sll_epi32(__A, __B),4312 (__v4si)_mm_sll_epi32(__A, __B),
4511 (__v4si)_mm_setzero_si128());4313 (__v4si)_mm_setzero_si128());
4512}4314}
45134315
4514static __inline__ __m256i __DEFAULT_FN_ATTRS2564316static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4515_mm256_mask_sll_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)4317_mm256_mask_sll_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) {
4516{
4517 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4318 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4518 (__v8si)_mm256_sll_epi32(__A, __B),4319 (__v8si)_mm256_sll_epi32(__A, __B),
4519 (__v8si)__W);4320 (__v8si)__W);
4520}4321}
45214322
4522static __inline__ __m256i __DEFAULT_FN_ATTRS2564323static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4523_mm256_maskz_sll_epi32(__mmask8 __U, __m256i __A, __m128i __B)4324_mm256_maskz_sll_epi32(__mmask8 __U, __m256i __A, __m128i __B) {
4524{
4525 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4325 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4526 (__v8si)_mm256_sll_epi32(__A, __B),4326 (__v8si)_mm256_sll_epi32(__A, __B),
4527 (__v8si)_mm256_setzero_si256());4327 (__v8si)_mm256_setzero_si256());
...@@ -4543,49 +4343,44 @@ _mm_maskz_slli_epi32(__mmask8 __U, __m128i __A, unsigned int __B)...@@ -4543,49 +4343,44 @@ _mm_maskz_slli_epi32(__mmask8 __U, __m128i __A, unsigned int __B)
4543 (__v4si)_mm_setzero_si128());4343 (__v4si)_mm_setzero_si128());
4544}4344}
45454345
4546static __inline__ __m256i __DEFAULT_FN_ATTRS2564346static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4547_mm256_mask_slli_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)4347_mm256_mask_slli_epi32(__m256i __W, __mmask8 __U, __m256i __A,
4548{4348 unsigned int __B) {
4549 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4349 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4550 (__v8si)_mm256_slli_epi32(__A, (int)__B),4350 (__v8si)_mm256_slli_epi32(__A, (int)__B),
4551 (__v8si)__W);4351 (__v8si)__W);
4552}4352}
45534353
4554static __inline__ __m256i __DEFAULT_FN_ATTRS2564354static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4555_mm256_maskz_slli_epi32(__mmask8 __U, __m256i __A, unsigned int __B)4355_mm256_maskz_slli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) {
4556{
4557 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4356 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4558 (__v8si)_mm256_slli_epi32(__A, (int)__B),4357 (__v8si)_mm256_slli_epi32(__A, (int)__B),
4559 (__v8si)_mm256_setzero_si256());4358 (__v8si)_mm256_setzero_si256());
4560}4359}
45614360
4562static __inline__ __m128i __DEFAULT_FN_ATTRS1284361static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4563_mm_mask_sll_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)4362_mm_mask_sll_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
4564{
4565 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4363 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4566 (__v2di)_mm_sll_epi64(__A, __B),4364 (__v2di)_mm_sll_epi64(__A, __B),
4567 (__v2di)__W);4365 (__v2di)__W);
4568}4366}
45694367
4570static __inline__ __m128i __DEFAULT_FN_ATTRS1284368static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4571_mm_maskz_sll_epi64(__mmask8 __U, __m128i __A, __m128i __B)4369_mm_maskz_sll_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
4572{
4573 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4370 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4574 (__v2di)_mm_sll_epi64(__A, __B),4371 (__v2di)_mm_sll_epi64(__A, __B),
4575 (__v2di)_mm_setzero_si128());4372 (__v2di)_mm_setzero_si128());
4576}4373}
45774374
4578static __inline__ __m256i __DEFAULT_FN_ATTRS2564375static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4579_mm256_mask_sll_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)4376_mm256_mask_sll_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) {
4580{
4581 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4377 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4582 (__v4di)_mm256_sll_epi64(__A, __B),4378 (__v4di)_mm256_sll_epi64(__A, __B),
4583 (__v4di)__W);4379 (__v4di)__W);
4584}4380}
45854381
4586static __inline__ __m256i __DEFAULT_FN_ATTRS2564382static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4587_mm256_maskz_sll_epi64(__mmask8 __U, __m256i __A, __m128i __B)4383_mm256_maskz_sll_epi64(__mmask8 __U, __m256i __A, __m128i __B) {
4588{
4589 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4384 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4590 (__v4di)_mm256_sll_epi64(__A, __B),4385 (__v4di)_mm256_sll_epi64(__A, __B),
4591 (__v4di)_mm256_setzero_si256());4386 (__v4di)_mm256_setzero_si256());
...@@ -4607,29 +4402,28 @@ _mm_maskz_slli_epi64(__mmask8 __U, __m128i __A, unsigned int __B)...@@ -4607,29 +4402,28 @@ _mm_maskz_slli_epi64(__mmask8 __U, __m128i __A, unsigned int __B)
4607 (__v2di)_mm_setzero_si128());4402 (__v2di)_mm_setzero_si128());
4608}4403}
46094404
4610static __inline__ __m256i __DEFAULT_FN_ATTRS2564405static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4611_mm256_mask_slli_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)4406_mm256_mask_slli_epi64(__m256i __W, __mmask8 __U, __m256i __A,
4612{4407 unsigned int __B) {
4613 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4408 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4614 (__v4di)_mm256_slli_epi64(__A, (int)__B),4409 (__v4di)_mm256_slli_epi64(__A, (int)__B),
4615 (__v4di)__W);4410 (__v4di)__W);
4616}4411}
46174412
4618static __inline__ __m256i __DEFAULT_FN_ATTRS2564413static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4619_mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A, unsigned int __B)4414_mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) {
4620{
4621 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4415 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4622 (__v4di)_mm256_slli_epi64(__A, (int)__B),4416 (__v4di)_mm256_slli_epi64(__A, (int)__B),
4623 (__v4di)_mm256_setzero_si256());4417 (__v4di)_mm256_setzero_si256());
4624}4418}
46254419
4626static __inline__ __m128i __DEFAULT_FN_ATTRS1284420static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4627_mm_rorv_epi32 (__m128i __A, __m128i __B)4421_mm_rorv_epi32 (__m128i __A, __m128i __B)
4628{4422{
4629 return (__m128i)__builtin_ia32_prorvd128((__v4si)__A, (__v4si)__B);4423 return (__m128i)__builtin_elementwise_fshr((__v4su)__A, (__v4su)__A, (__v4su)__B);
4630}4424}
46314425
4632static __inline__ __m128i __DEFAULT_FN_ATTRS1284426static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4633_mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)4427_mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4634{4428{
4635 return (__m128i)__builtin_ia32_selectd_128(__U,4429 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -4637,7 +4431,7 @@ _mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -4637,7 +4431,7 @@ _mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4637 (__v4si)__W);4431 (__v4si)__W);
4638}4432}
46394433
4640static __inline__ __m128i __DEFAULT_FN_ATTRS1284434static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4641_mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)4435_mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
4642{4436{
4643 return (__m128i)__builtin_ia32_selectd_128(__U,4437 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -4645,13 +4439,13 @@ _mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)...@@ -4645,13 +4439,13 @@ _mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
4645 (__v4si)_mm_setzero_si128());4439 (__v4si)_mm_setzero_si128());
4646}4440}
46474441
4648static __inline__ __m256i __DEFAULT_FN_ATTRS2564442static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4649_mm256_rorv_epi32 (__m256i __A, __m256i __B)4443_mm256_rorv_epi32 (__m256i __A, __m256i __B)
4650{4444{
4651 return (__m256i)__builtin_ia32_prorvd256((__v8si)__A, (__v8si)__B);4445 return (__m256i)__builtin_elementwise_fshr((__v8su)__A, (__v8su)__A, (__v8su)__B);
4652}4446}
46534447
4654static __inline__ __m256i __DEFAULT_FN_ATTRS2564448static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4655_mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)4449_mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4656{4450{
4657 return (__m256i)__builtin_ia32_selectd_256(__U,4451 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -4659,7 +4453,7 @@ _mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)...@@ -4659,7 +4453,7 @@ _mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4659 (__v8si)__W);4453 (__v8si)__W);
4660}4454}
46614455
4662static __inline__ __m256i __DEFAULT_FN_ATTRS2564456static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4663_mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)4457_mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
4664{4458{
4665 return (__m256i)__builtin_ia32_selectd_256(__U,4459 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -4667,13 +4461,13 @@ _mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)...@@ -4667,13 +4461,13 @@ _mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B)
4667 (__v8si)_mm256_setzero_si256());4461 (__v8si)_mm256_setzero_si256());
4668}4462}
46694463
4670static __inline__ __m128i __DEFAULT_FN_ATTRS1284464static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4671_mm_rorv_epi64 (__m128i __A, __m128i __B)4465_mm_rorv_epi64 (__m128i __A, __m128i __B)
4672{4466{
4673 return (__m128i)__builtin_ia32_prorvq128((__v2di)__A, (__v2di)__B);4467 return (__m128i)__builtin_elementwise_fshr((__v2du)__A, (__v2du)__A, (__v2du)__B);
4674}4468}
46754469
4676static __inline__ __m128i __DEFAULT_FN_ATTRS1284470static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4677_mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)4471_mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4678{4472{
4679 return (__m128i)__builtin_ia32_selectq_128(__U,4473 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -4681,7 +4475,7 @@ _mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)...@@ -4681,7 +4475,7 @@ _mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
4681 (__v2di)__W);4475 (__v2di)__W);
4682}4476}
46834477
4684static __inline__ __m128i __DEFAULT_FN_ATTRS1284478static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4685_mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)4479_mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
4686{4480{
4687 return (__m128i)__builtin_ia32_selectq_128(__U,4481 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -4689,13 +4483,13 @@ _mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)...@@ -4689,13 +4483,13 @@ _mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
4689 (__v2di)_mm_setzero_si128());4483 (__v2di)_mm_setzero_si128());
4690}4484}
46914485
4692static __inline__ __m256i __DEFAULT_FN_ATTRS2564486static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4693_mm256_rorv_epi64 (__m256i __A, __m256i __B)4487_mm256_rorv_epi64 (__m256i __A, __m256i __B)
4694{4488{
4695 return (__m256i)__builtin_ia32_prorvq256((__v4di)__A, (__v4di)__B);4489 return (__m256i)__builtin_elementwise_fshr((__v4du)__A, (__v4du)__A, (__v4du)__B);
4696}4490}
46974491
4698static __inline__ __m256i __DEFAULT_FN_ATTRS2564492static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4699_mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)4493_mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4700{4494{
4701 return (__m256i)__builtin_ia32_selectq_256(__U,4495 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -4703,7 +4497,7 @@ _mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)...@@ -4703,7 +4497,7 @@ _mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
4703 (__v4di)__W);4497 (__v4di)__W);
4704}4498}
47054499
4706static __inline__ __m256i __DEFAULT_FN_ATTRS2564500static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4707_mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)4501_mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
4708{4502{
4709 return (__m256i)__builtin_ia32_selectq_256(__U,4503 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -4711,7 +4505,7 @@ _mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)...@@ -4711,7 +4505,7 @@ _mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B)
4711 (__v4di)_mm256_setzero_si256());4505 (__v4di)_mm256_setzero_si256());
4712}4506}
47134507
4714static __inline__ __m128i __DEFAULT_FN_ATTRS1284508static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4715_mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)4509_mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4716{4510{
4717 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4511 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
...@@ -4719,7 +4513,7 @@ _mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)...@@ -4719,7 +4513,7 @@ _mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4719 (__v2di)__W);4513 (__v2di)__W);
4720}4514}
47214515
4722static __inline__ __m128i __DEFAULT_FN_ATTRS1284516static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4723_mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)4517_mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
4724{4518{
4725 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4519 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
...@@ -4727,7 +4521,7 @@ _mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)...@@ -4727,7 +4521,7 @@ _mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
4727 (__v2di)_mm_setzero_si128());4521 (__v2di)_mm_setzero_si128());
4728}4522}
47294523
4730static __inline__ __m256i __DEFAULT_FN_ATTRS2564524static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4731_mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)4525_mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4732{4526{
4733 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4527 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
...@@ -4735,7 +4529,7 @@ _mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)...@@ -4735,7 +4529,7 @@ _mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4735 (__v4di)__W);4529 (__v4di)__W);
4736}4530}
47374531
4738static __inline__ __m256i __DEFAULT_FN_ATTRS2564532static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4739_mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)4533_mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
4740{4534{
4741 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4535 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
...@@ -4743,7 +4537,7 @@ _mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)...@@ -4743,7 +4537,7 @@ _mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
4743 (__v4di)_mm256_setzero_si256());4537 (__v4di)_mm256_setzero_si256());
4744}4538}
47454539
4746static __inline__ __m128i __DEFAULT_FN_ATTRS1284540static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4747_mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)4541_mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4748{4542{
4749 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4543 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
...@@ -4751,7 +4545,7 @@ _mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)...@@ -4751,7 +4545,7 @@ _mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4751 (__v4si)__W);4545 (__v4si)__W);
4752}4546}
47534547
4754static __inline__ __m128i __DEFAULT_FN_ATTRS1284548static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4755_mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)4549_mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4756{4550{
4757 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4551 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
...@@ -4759,7 +4553,7 @@ _mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)...@@ -4759,7 +4553,7 @@ _mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4759 (__v4si)_mm_setzero_si128());4553 (__v4si)_mm_setzero_si128());
4760}4554}
47614555
4762static __inline__ __m256i __DEFAULT_FN_ATTRS2564556static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4763_mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)4557_mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4764{4558{
4765 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4559 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
...@@ -4767,7 +4561,7 @@ _mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)...@@ -4767,7 +4561,7 @@ _mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4767 (__v8si)__W);4561 (__v8si)__W);
4768}4562}
47694563
4770static __inline__ __m256i __DEFAULT_FN_ATTRS2564564static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4771_mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)4565_mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4772{4566{
4773 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4567 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
...@@ -4775,7 +4569,7 @@ _mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)...@@ -4775,7 +4569,7 @@ _mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4775 (__v8si)_mm256_setzero_si256());4569 (__v8si)_mm256_setzero_si256());
4776}4570}
47774571
4778static __inline__ __m128i __DEFAULT_FN_ATTRS1284572static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4779_mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)4573_mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4780{4574{
4781 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4575 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
...@@ -4783,7 +4577,7 @@ _mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)...@@ -4783,7 +4577,7 @@ _mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4783 (__v2di)__W);4577 (__v2di)__W);
4784}4578}
47854579
4786static __inline__ __m128i __DEFAULT_FN_ATTRS1284580static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4787_mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)4581_mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
4788{4582{
4789 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4583 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
...@@ -4791,7 +4585,7 @@ _mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)...@@ -4791,7 +4585,7 @@ _mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
4791 (__v2di)_mm_setzero_si128());4585 (__v2di)_mm_setzero_si128());
4792}4586}
47934587
4794static __inline__ __m256i __DEFAULT_FN_ATTRS2564588static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4795_mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)4589_mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4796{4590{
4797 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4591 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
...@@ -4799,7 +4593,7 @@ _mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)...@@ -4799,7 +4593,7 @@ _mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4799 (__v4di)__W);4593 (__v4di)__W);
4800}4594}
48014595
4802static __inline__ __m256i __DEFAULT_FN_ATTRS2564596static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4803_mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)4597_mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
4804{4598{
4805 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4599 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
...@@ -4807,7 +4601,7 @@ _mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)...@@ -4807,7 +4601,7 @@ _mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y)
4807 (__v4di)_mm256_setzero_si256());4601 (__v4di)_mm256_setzero_si256());
4808}4602}
48094603
4810static __inline__ __m128i __DEFAULT_FN_ATTRS1284604static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4811_mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)4605_mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4812{4606{
4813 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4607 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
...@@ -4815,7 +4609,7 @@ _mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)...@@ -4815,7 +4609,7 @@ _mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4815 (__v4si)__W);4609 (__v4si)__W);
4816}4610}
48174611
4818static __inline__ __m128i __DEFAULT_FN_ATTRS1284612static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4819_mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)4613_mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4820{4614{
4821 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4615 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
...@@ -4823,7 +4617,7 @@ _mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)...@@ -4823,7 +4617,7 @@ _mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4823 (__v4si)_mm_setzero_si128());4617 (__v4si)_mm_setzero_si128());
4824}4618}
48254619
4826static __inline__ __m256i __DEFAULT_FN_ATTRS2564620static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4827_mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)4621_mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4828{4622{
4829 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4623 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
...@@ -4831,7 +4625,7 @@ _mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)...@@ -4831,7 +4625,7 @@ _mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4831 (__v8si)__W);4625 (__v8si)__W);
4832}4626}
48334627
4834static __inline__ __m256i __DEFAULT_FN_ATTRS2564628static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4835_mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)4629_mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4836{4630{
4837 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4631 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
...@@ -4839,33 +4633,29 @@ _mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)...@@ -4839,33 +4633,29 @@ _mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4839 (__v8si)_mm256_setzero_si256());4633 (__v8si)_mm256_setzero_si256());
4840}4634}
48414635
4842static __inline__ __m128i __DEFAULT_FN_ATTRS1284636static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4843_mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)4637_mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
4844{
4845 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4638 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4846 (__v4si)_mm_srl_epi32(__A, __B),4639 (__v4si)_mm_srl_epi32(__A, __B),
4847 (__v4si)__W);4640 (__v4si)__W);
4848}4641}
48494642
4850static __inline__ __m128i __DEFAULT_FN_ATTRS1284643static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4851_mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B)4644_mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
4852{
4853 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4645 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
4854 (__v4si)_mm_srl_epi32(__A, __B),4646 (__v4si)_mm_srl_epi32(__A, __B),
4855 (__v4si)_mm_setzero_si128());4647 (__v4si)_mm_setzero_si128());
4856}4648}
48574649
4858static __inline__ __m256i __DEFAULT_FN_ATTRS2564650static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4859_mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)4651_mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) {
4860{
4861 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4652 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4862 (__v8si)_mm256_srl_epi32(__A, __B),4653 (__v8si)_mm256_srl_epi32(__A, __B),
4863 (__v8si)__W);4654 (__v8si)__W);
4864}4655}
48654656
4866static __inline__ __m256i __DEFAULT_FN_ATTRS2564657static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4867_mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B)4658_mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B) {
4868{
4869 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4659 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4870 (__v8si)_mm256_srl_epi32(__A, __B),4660 (__v8si)_mm256_srl_epi32(__A, __B),
4871 (__v8si)_mm256_setzero_si256());4661 (__v8si)_mm256_setzero_si256());
...@@ -4887,49 +4677,44 @@ _mm_maskz_srli_epi32(__mmask8 __U, __m128i __A, unsigned int __B)...@@ -4887,49 +4677,44 @@ _mm_maskz_srli_epi32(__mmask8 __U, __m128i __A, unsigned int __B)
4887 (__v4si)_mm_setzero_si128());4677 (__v4si)_mm_setzero_si128());
4888}4678}
48894679
4890static __inline__ __m256i __DEFAULT_FN_ATTRS2564680static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4891_mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)4681_mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A,
4892{4682 unsigned int __B) {
4893 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4683 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4894 (__v8si)_mm256_srli_epi32(__A, (int)__B),4684 (__v8si)_mm256_srli_epi32(__A, (int)__B),
4895 (__v8si)__W);4685 (__v8si)__W);
4896}4686}
48974687
4898static __inline__ __m256i __DEFAULT_FN_ATTRS2564688static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4899_mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A, unsigned int __B)4689_mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) {
4900{
4901 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4690 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
4902 (__v8si)_mm256_srli_epi32(__A, (int)__B),4691 (__v8si)_mm256_srli_epi32(__A, (int)__B),
4903 (__v8si)_mm256_setzero_si256());4692 (__v8si)_mm256_setzero_si256());
4904}4693}
49054694
4906static __inline__ __m128i __DEFAULT_FN_ATTRS1284695static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4907_mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)4696_mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
4908{
4909 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4697 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4910 (__v2di)_mm_srl_epi64(__A, __B),4698 (__v2di)_mm_srl_epi64(__A, __B),
4911 (__v2di)__W);4699 (__v2di)__W);
4912}4700}
49134701
4914static __inline__ __m128i __DEFAULT_FN_ATTRS1284702static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4915_mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B)4703_mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
4916{
4917 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4704 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
4918 (__v2di)_mm_srl_epi64(__A, __B),4705 (__v2di)_mm_srl_epi64(__A, __B),
4919 (__v2di)_mm_setzero_si128());4706 (__v2di)_mm_setzero_si128());
4920}4707}
49214708
4922static __inline__ __m256i __DEFAULT_FN_ATTRS2564709static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4923_mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)4710_mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) {
4924{
4925 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4711 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4926 (__v4di)_mm256_srl_epi64(__A, __B),4712 (__v4di)_mm256_srl_epi64(__A, __B),
4927 (__v4di)__W);4713 (__v4di)__W);
4928}4714}
49294715
4930static __inline__ __m256i __DEFAULT_FN_ATTRS2564716static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4931_mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B)4717_mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B) {
4932{
4933 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4718 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4934 (__v4di)_mm256_srl_epi64(__A, __B),4719 (__v4di)_mm256_srl_epi64(__A, __B),
4935 (__v4di)_mm256_setzero_si256());4720 (__v4di)_mm256_setzero_si256());
...@@ -4951,23 +4736,22 @@ _mm_maskz_srli_epi64(__mmask8 __U, __m128i __A, unsigned int __B)...@@ -4951,23 +4736,22 @@ _mm_maskz_srli_epi64(__mmask8 __U, __m128i __A, unsigned int __B)
4951 (__v2di)_mm_setzero_si128());4736 (__v2di)_mm_setzero_si128());
4952}4737}
49534738
4954static __inline__ __m256i __DEFAULT_FN_ATTRS2564739static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4955_mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)4740_mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A,
4956{4741 unsigned int __B) {
4957 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4742 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4958 (__v4di)_mm256_srli_epi64(__A, (int)__B),4743 (__v4di)_mm256_srli_epi64(__A, (int)__B),
4959 (__v4di)__W);4744 (__v4di)__W);
4960}4745}
49614746
4962static __inline__ __m256i __DEFAULT_FN_ATTRS2564747static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4963_mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A, unsigned int __B)4748_mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) {
4964{
4965 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4749 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
4966 (__v4di)_mm256_srli_epi64(__A, (int)__B),4750 (__v4di)_mm256_srli_epi64(__A, (int)__B),
4967 (__v4di)_mm256_setzero_si256());4751 (__v4di)_mm256_setzero_si256());
4968}4752}
49694753
4970static __inline__ __m128i __DEFAULT_FN_ATTRS1284754static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4971_mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)4755_mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4972{4756{
4973 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4757 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
...@@ -4975,7 +4759,7 @@ _mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)...@@ -4975,7 +4759,7 @@ _mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
4975 (__v4si)__W);4759 (__v4si)__W);
4976}4760}
49774761
4978static __inline__ __m128i __DEFAULT_FN_ATTRS1284762static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
4979_mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y)4763_mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4980{4764{
4981 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,4765 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
...@@ -4983,7 +4767,7 @@ _mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y)...@@ -4983,7 +4767,7 @@ _mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y)
4983 (__v4si)_mm_setzero_si128());4767 (__v4si)_mm_setzero_si128());
4984}4768}
49854769
4986static __inline__ __m256i __DEFAULT_FN_ATTRS2564770static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4987_mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)4771_mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4988{4772{
4989 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4773 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
...@@ -4991,7 +4775,7 @@ _mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)...@@ -4991,7 +4775,7 @@ _mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
4991 (__v8si)__W);4775 (__v8si)__W);
4992}4776}
49934777
4994static __inline__ __m256i __DEFAULT_FN_ATTRS2564778static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
4995_mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y)4779_mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4996{4780{
4997 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,4781 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
...@@ -4999,13 +4783,13 @@ _mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y)...@@ -4999,13 +4783,13 @@ _mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y)
4999 (__v8si)_mm256_setzero_si256());4783 (__v8si)_mm256_setzero_si256());
5000}4784}
50014785
5002static __inline__ __m128i __DEFAULT_FN_ATTRS1284786static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5003_mm_srav_epi64(__m128i __X, __m128i __Y)4787_mm_srav_epi64(__m128i __X, __m128i __Y)
5004{4788{
5005 return (__m128i)__builtin_ia32_psravq128((__v2di)__X, (__v2di)__Y);4789 return (__m128i)__builtin_ia32_psravq128((__v2di)__X, (__v2di)__Y);
5006}4790}
50074791
5008static __inline__ __m128i __DEFAULT_FN_ATTRS1284792static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5009_mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)4793_mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
5010{4794{
5011 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4795 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
...@@ -5013,7 +4797,7 @@ _mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)...@@ -5013,7 +4797,7 @@ _mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y)
5013 (__v2di)__W);4797 (__v2di)__W);
5014}4798}
50154799
5016static __inline__ __m128i __DEFAULT_FN_ATTRS1284800static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5017_mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y)4801_mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
5018{4802{
5019 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,4803 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
...@@ -5021,13 +4805,13 @@ _mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y)...@@ -5021,13 +4805,13 @@ _mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y)
5021 (__v2di)_mm_setzero_si128());4805 (__v2di)_mm_setzero_si128());
5022}4806}
50234807
5024static __inline__ __m256i __DEFAULT_FN_ATTRS2564808static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5025_mm256_srav_epi64(__m256i __X, __m256i __Y)4809_mm256_srav_epi64(__m256i __X, __m256i __Y)
5026{4810{
5027 return (__m256i)__builtin_ia32_psravq256((__v4di)__X, (__v4di) __Y);4811 return (__m256i)__builtin_ia32_psravq256((__v4di)__X, (__v4di) __Y);
5028}4812}
50294813
5030static __inline__ __m256i __DEFAULT_FN_ATTRS2564814static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5031_mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)4815_mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
5032{4816{
5033 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4817 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
...@@ -5035,7 +4819,7 @@ _mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)...@@ -5035,7 +4819,7 @@ _mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y)
5035 (__v4di)__W);4819 (__v4di)__W);
5036}4820}
50374821
5038static __inline__ __m256i __DEFAULT_FN_ATTRS2564822static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5039_mm256_maskz_srav_epi64 (__mmask8 __U, __m256i __X, __m256i __Y)4823_mm256_maskz_srav_epi64 (__mmask8 __U, __m256i __X, __m256i __Y)
5040{4824{
5041 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,4825 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
...@@ -5296,69 +5080,55 @@ _mm256_maskz_movedup_pd (__mmask8 __U, __m256d __A)...@@ -5296,69 +5080,55 @@ _mm256_maskz_movedup_pd (__mmask8 __U, __m256d __A)
5296 (__v4df)_mm256_setzero_pd());5080 (__v4df)_mm256_setzero_pd());
5297}5081}
52985082
5299static __inline__ __m128i __DEFAULT_FN_ATTRS1285083static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5300_mm_mask_set1_epi32(__m128i __O, __mmask8 __M, int __A)5084_mm_mask_set1_epi32(__m128i __O, __mmask8 __M, int __A) {
5301{5085 return (__m128i)__builtin_ia32_selectd_128(__M, (__v4si)_mm_set1_epi32(__A),
5302 return (__m128i)__builtin_ia32_selectd_128(__M,5086 (__v4si)__O);
5303 (__v4si) _mm_set1_epi32(__A),
5304 (__v4si)__O);
5305}5087}
53065088
5307static __inline__ __m128i __DEFAULT_FN_ATTRS1285089static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5308_mm_maskz_set1_epi32( __mmask8 __M, int __A)5090_mm_maskz_set1_epi32(__mmask8 __M, int __A) {
5309{5091 return (__m128i)__builtin_ia32_selectd_128(__M, (__v4si)_mm_set1_epi32(__A),
5310 return (__m128i)__builtin_ia32_selectd_128(__M,5092 (__v4si)_mm_setzero_si128());
5311 (__v4si) _mm_set1_epi32(__A),
5312 (__v4si)_mm_setzero_si128());
5313}5093}
53145094
5315static __inline__ __m256i __DEFAULT_FN_ATTRS2565095static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5316_mm256_mask_set1_epi32(__m256i __O, __mmask8 __M, int __A)5096_mm256_mask_set1_epi32(__m256i __O, __mmask8 __M, int __A) {
5317{5097 return (__m256i)__builtin_ia32_selectd_256(
5318 return (__m256i)__builtin_ia32_selectd_256(__M,5098 __M, (__v8si)_mm256_set1_epi32(__A), (__v8si)__O);
5319 (__v8si) _mm256_set1_epi32(__A),
5320 (__v8si)__O);
5321}5099}
53225100
5323static __inline__ __m256i __DEFAULT_FN_ATTRS2565101static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5324_mm256_maskz_set1_epi32( __mmask8 __M, int __A)5102_mm256_maskz_set1_epi32(__mmask8 __M, int __A) {
5325{5103 return (__m256i)__builtin_ia32_selectd_256(
5326 return (__m256i)__builtin_ia32_selectd_256(__M,5104 __M, (__v8si)_mm256_set1_epi32(__A), (__v8si)_mm256_setzero_si256());
5327 (__v8si) _mm256_set1_epi32(__A),
5328 (__v8si)_mm256_setzero_si256());
5329}5105}
53305106
53315107static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5332static __inline__ __m128i __DEFAULT_FN_ATTRS1285108_mm_mask_set1_epi64(__m128i __O, __mmask8 __M, long long __A) {
5333_mm_mask_set1_epi64 (__m128i __O, __mmask8 __M, long long __A)
5334{
5335 return (__m128i) __builtin_ia32_selectq_128(__M,5109 return (__m128i) __builtin_ia32_selectq_128(__M,
5336 (__v2di) _mm_set1_epi64x(__A),5110 (__v2di) _mm_set1_epi64x(__A),
5337 (__v2di) __O);5111 (__v2di) __O);
5338}5112}
53395113
5340static __inline__ __m128i __DEFAULT_FN_ATTRS1285114static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
5341_mm_maskz_set1_epi64 (__mmask8 __M, long long __A)5115_mm_maskz_set1_epi64(__mmask8 __M, long long __A) {
5342{
5343 return (__m128i) __builtin_ia32_selectq_128(__M,5116 return (__m128i) __builtin_ia32_selectq_128(__M,
5344 (__v2di) _mm_set1_epi64x(__A),5117 (__v2di) _mm_set1_epi64x(__A),
5345 (__v2di) _mm_setzero_si128());5118 (__v2di) _mm_setzero_si128());
5346}5119}
53475120
5348static __inline__ __m256i __DEFAULT_FN_ATTRS2565121static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5349_mm256_mask_set1_epi64 (__m256i __O, __mmask8 __M, long long __A)5122_mm256_mask_set1_epi64(__m256i __O, __mmask8 __M, long long __A) {
5350{
5351 return (__m256i) __builtin_ia32_selectq_256(__M,5123 return (__m256i) __builtin_ia32_selectq_256(__M,
5352 (__v4di) _mm256_set1_epi64x(__A),5124 (__v4di) _mm256_set1_epi64x(__A),
5353 (__v4di) __O) ;5125 (__v4di) __O) ;
5354}5126}
53555127
5356static __inline__ __m256i __DEFAULT_FN_ATTRS2565128static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
5357_mm256_maskz_set1_epi64 (__mmask8 __M, long long __A)5129_mm256_maskz_set1_epi64(__mmask8 __M, long long __A) {
5358{5130 return (__m256i)__builtin_ia32_selectq_256(
5359 return (__m256i) __builtin_ia32_selectq_256(__M,5131 __M, (__v4di)_mm256_set1_epi64x(__A), (__v4di)_mm256_setzero_si256());
5360 (__v4di) _mm256_set1_epi64x(__A),
5361 (__v4di) _mm256_setzero_si256());
5362}5132}
53635133
5364#define _mm_fixupimm_pd(A, B, C, imm) \5134#define _mm_fixupimm_pd(A, B, C, imm) \
...@@ -5805,130 +5575,113 @@ _mm256_mask_storeu_ps (void *__P, __mmask8 __U, __m256 __A)...@@ -5805,130 +5575,113 @@ _mm256_mask_storeu_ps (void *__P, __mmask8 __U, __m256 __A)
5805 (__mmask8) __U);5575 (__mmask8) __U);
5806}5576}
58075577
58085578static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
5809static __inline__ __m128d __DEFAULT_FN_ATTRS1285579_mm_mask_unpackhi_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
5810_mm_mask_unpackhi_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
5811{
5812 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,5580 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5813 (__v2df)_mm_unpackhi_pd(__A, __B),5581 (__v2df)_mm_unpackhi_pd(__A, __B),
5814 (__v2df)__W);5582 (__v2df)__W);
5815}5583}
58165584
5817static __inline__ __m128d __DEFAULT_FN_ATTRS1285585static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
5818_mm_maskz_unpackhi_pd(__mmask8 __U, __m128d __A, __m128d __B)5586_mm_maskz_unpackhi_pd(__mmask8 __U, __m128d __A, __m128d __B) {
5819{
5820 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,5587 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5821 (__v2df)_mm_unpackhi_pd(__A, __B),5588 (__v2df)_mm_unpackhi_pd(__A, __B),
5822 (__v2df)_mm_setzero_pd());5589 (__v2df)_mm_setzero_pd());
5823}5590}
58245591
5825static __inline__ __m256d __DEFAULT_FN_ATTRS2565592static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
5826_mm256_mask_unpackhi_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)5593_mm256_mask_unpackhi_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
5827{
5828 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,5594 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5829 (__v4df)_mm256_unpackhi_pd(__A, __B),5595 (__v4df)_mm256_unpackhi_pd(__A, __B),
5830 (__v4df)__W);5596 (__v4df)__W);
5831}5597}
58325598
5833static __inline__ __m256d __DEFAULT_FN_ATTRS2565599static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
5834_mm256_maskz_unpackhi_pd(__mmask8 __U, __m256d __A, __m256d __B)5600_mm256_maskz_unpackhi_pd(__mmask8 __U, __m256d __A, __m256d __B) {
5835{
5836 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,5601 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5837 (__v4df)_mm256_unpackhi_pd(__A, __B),5602 (__v4df)_mm256_unpackhi_pd(__A, __B),
5838 (__v4df)_mm256_setzero_pd());5603 (__v4df)_mm256_setzero_pd());
5839}5604}
58405605
5841static __inline__ __m128 __DEFAULT_FN_ATTRS1285606static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
5842_mm_mask_unpackhi_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)5607_mm_mask_unpackhi_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
5843{
5844 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,5608 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5845 (__v4sf)_mm_unpackhi_ps(__A, __B),5609 (__v4sf)_mm_unpackhi_ps(__A, __B),
5846 (__v4sf)__W);5610 (__v4sf)__W);
5847}5611}
58485612
5849static __inline__ __m128 __DEFAULT_FN_ATTRS1285613static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
5850_mm_maskz_unpackhi_ps(__mmask8 __U, __m128 __A, __m128 __B)5614_mm_maskz_unpackhi_ps(__mmask8 __U, __m128 __A, __m128 __B) {
5851{
5852 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,5615 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5853 (__v4sf)_mm_unpackhi_ps(__A, __B),5616 (__v4sf)_mm_unpackhi_ps(__A, __B),
5854 (__v4sf)_mm_setzero_ps());5617 (__v4sf)_mm_setzero_ps());
5855}5618}
58565619
5857static __inline__ __m256 __DEFAULT_FN_ATTRS2565620static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
5858_mm256_mask_unpackhi_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)5621_mm256_mask_unpackhi_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
5859{
5860 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,5622 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5861 (__v8sf)_mm256_unpackhi_ps(__A, __B),5623 (__v8sf)_mm256_unpackhi_ps(__A, __B),
5862 (__v8sf)__W);5624 (__v8sf)__W);
5863}5625}
58645626
5865static __inline__ __m256 __DEFAULT_FN_ATTRS2565627static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
5866_mm256_maskz_unpackhi_ps(__mmask8 __U, __m256 __A, __m256 __B)5628_mm256_maskz_unpackhi_ps(__mmask8 __U, __m256 __A, __m256 __B) {
5867{
5868 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,5629 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5869 (__v8sf)_mm256_unpackhi_ps(__A, __B),5630 (__v8sf)_mm256_unpackhi_ps(__A, __B),
5870 (__v8sf)_mm256_setzero_ps());5631 (__v8sf)_mm256_setzero_ps());
5871}5632}
58725633
5873static __inline__ __m128d __DEFAULT_FN_ATTRS1285634static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
5874_mm_mask_unpacklo_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)5635_mm_mask_unpacklo_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
5875{
5876 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,5636 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5877 (__v2df)_mm_unpacklo_pd(__A, __B),5637 (__v2df)_mm_unpacklo_pd(__A, __B),
5878 (__v2df)__W);5638 (__v2df)__W);
5879}5639}
58805640
5881static __inline__ __m128d __DEFAULT_FN_ATTRS1285641static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
5882_mm_maskz_unpacklo_pd(__mmask8 __U, __m128d __A, __m128d __B)5642_mm_maskz_unpacklo_pd(__mmask8 __U, __m128d __A, __m128d __B) {
5883{
5884 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,5643 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
5885 (__v2df)_mm_unpacklo_pd(__A, __B),5644 (__v2df)_mm_unpacklo_pd(__A, __B),
5886 (__v2df)_mm_setzero_pd());5645 (__v2df)_mm_setzero_pd());
5887}5646}
58885647
5889static __inline__ __m256d __DEFAULT_FN_ATTRS2565648static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
5890_mm256_mask_unpacklo_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)5649_mm256_mask_unpacklo_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) {
5891{
5892 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,5650 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5893 (__v4df)_mm256_unpacklo_pd(__A, __B),5651 (__v4df)_mm256_unpacklo_pd(__A, __B),
5894 (__v4df)__W);5652 (__v4df)__W);
5895}5653}
58965654
5897static __inline__ __m256d __DEFAULT_FN_ATTRS2565655static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
5898_mm256_maskz_unpacklo_pd(__mmask8 __U, __m256d __A, __m256d __B)5656_mm256_maskz_unpacklo_pd(__mmask8 __U, __m256d __A, __m256d __B) {
5899{
5900 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,5657 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
5901 (__v4df)_mm256_unpacklo_pd(__A, __B),5658 (__v4df)_mm256_unpacklo_pd(__A, __B),
5902 (__v4df)_mm256_setzero_pd());5659 (__v4df)_mm256_setzero_pd());
5903}5660}
59045661
5905static __inline__ __m128 __DEFAULT_FN_ATTRS1285662static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
5906_mm_mask_unpacklo_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)5663_mm_mask_unpacklo_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
5907{
5908 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,5664 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5909 (__v4sf)_mm_unpacklo_ps(__A, __B),5665 (__v4sf)_mm_unpacklo_ps(__A, __B),
5910 (__v4sf)__W);5666 (__v4sf)__W);
5911}5667}
59125668
5913static __inline__ __m128 __DEFAULT_FN_ATTRS1285669static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
5914_mm_maskz_unpacklo_ps(__mmask8 __U, __m128 __A, __m128 __B)5670_mm_maskz_unpacklo_ps(__mmask8 __U, __m128 __A, __m128 __B) {
5915{
5916 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,5671 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
5917 (__v4sf)_mm_unpacklo_ps(__A, __B),5672 (__v4sf)_mm_unpacklo_ps(__A, __B),
5918 (__v4sf)_mm_setzero_ps());5673 (__v4sf)_mm_setzero_ps());
5919}5674}
59205675
5921static __inline__ __m256 __DEFAULT_FN_ATTRS2565676static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
5922_mm256_mask_unpacklo_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)5677_mm256_mask_unpacklo_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) {
5923{
5924 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,5678 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5925 (__v8sf)_mm256_unpacklo_ps(__A, __B),5679 (__v8sf)_mm256_unpacklo_ps(__A, __B),
5926 (__v8sf)__W);5680 (__v8sf)__W);
5927}5681}
59285682
5929static __inline__ __m256 __DEFAULT_FN_ATTRS2565683static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
5930_mm256_maskz_unpacklo_ps(__mmask8 __U, __m256 __A, __m256 __B)5684_mm256_maskz_unpacklo_ps(__mmask8 __U, __m256 __A, __m256 __B) {
5931{
5932 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,5685 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
5933 (__v8sf)_mm256_unpacklo_ps(__A, __B),5686 (__v8sf)_mm256_unpacklo_ps(__A, __B),
5934 (__v8sf)_mm256_setzero_ps());5687 (__v8sf)_mm256_setzero_ps());
...@@ -6078,65 +5831,57 @@ _mm256_maskz_rcp14_ps (__mmask8 __U, __m256 __A)...@@ -6078,65 +5831,57 @@ _mm256_maskz_rcp14_ps (__mmask8 __U, __m256 __A)
6078 (__v8sf)_mm256_permute_ps((X), (C)), \5831 (__v8sf)_mm256_permute_ps((X), (C)), \
6079 (__v8sf)_mm256_setzero_ps()))5832 (__v8sf)_mm256_setzero_ps()))
60805833
6081static __inline__ __m128d __DEFAULT_FN_ATTRS1285834static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
6082_mm_mask_permutevar_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128i __C)5835_mm_mask_permutevar_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128i __C) {
6083{
6084 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,5836 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
6085 (__v2df)_mm_permutevar_pd(__A, __C),5837 (__v2df)_mm_permutevar_pd(__A, __C),
6086 (__v2df)__W);5838 (__v2df)__W);
6087}5839}
60885840
6089static __inline__ __m128d __DEFAULT_FN_ATTRS1285841static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
6090_mm_maskz_permutevar_pd(__mmask8 __U, __m128d __A, __m128i __C)5842_mm_maskz_permutevar_pd(__mmask8 __U, __m128d __A, __m128i __C) {
6091{
6092 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,5843 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
6093 (__v2df)_mm_permutevar_pd(__A, __C),5844 (__v2df)_mm_permutevar_pd(__A, __C),
6094 (__v2df)_mm_setzero_pd());5845 (__v2df)_mm_setzero_pd());
6095}5846}
60965847
6097static __inline__ __m256d __DEFAULT_FN_ATTRS2565848static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
6098_mm256_mask_permutevar_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256i __C)5849_mm256_mask_permutevar_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256i __C) {
6099{
6100 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,5850 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
6101 (__v4df)_mm256_permutevar_pd(__A, __C),5851 (__v4df)_mm256_permutevar_pd(__A, __C),
6102 (__v4df)__W);5852 (__v4df)__W);
6103}5853}
61045854
6105static __inline__ __m256d __DEFAULT_FN_ATTRS2565855static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
6106_mm256_maskz_permutevar_pd(__mmask8 __U, __m256d __A, __m256i __C)5856_mm256_maskz_permutevar_pd(__mmask8 __U, __m256d __A, __m256i __C) {
6107{
6108 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,5857 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
6109 (__v4df)_mm256_permutevar_pd(__A, __C),5858 (__v4df)_mm256_permutevar_pd(__A, __C),
6110 (__v4df)_mm256_setzero_pd());5859 (__v4df)_mm256_setzero_pd());
6111}5860}
61125861
6113static __inline__ __m128 __DEFAULT_FN_ATTRS1285862static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
6114_mm_mask_permutevar_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128i __C)5863_mm_mask_permutevar_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128i __C) {
6115{
6116 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,5864 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
6117 (__v4sf)_mm_permutevar_ps(__A, __C),5865 (__v4sf)_mm_permutevar_ps(__A, __C),
6118 (__v4sf)__W);5866 (__v4sf)__W);
6119}5867}
61205868
6121static __inline__ __m128 __DEFAULT_FN_ATTRS1285869static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
6122_mm_maskz_permutevar_ps(__mmask8 __U, __m128 __A, __m128i __C)5870_mm_maskz_permutevar_ps(__mmask8 __U, __m128 __A, __m128i __C) {
6123{
6124 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,5871 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
6125 (__v4sf)_mm_permutevar_ps(__A, __C),5872 (__v4sf)_mm_permutevar_ps(__A, __C),
6126 (__v4sf)_mm_setzero_ps());5873 (__v4sf)_mm_setzero_ps());
6127}5874}
61285875
6129static __inline__ __m256 __DEFAULT_FN_ATTRS2565876static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6130_mm256_mask_permutevar_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256i __C)5877_mm256_mask_permutevar_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256i __C) {
6131{
6132 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,5878 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
6133 (__v8sf)_mm256_permutevar_ps(__A, __C),5879 (__v8sf)_mm256_permutevar_ps(__A, __C),
6134 (__v8sf)__W);5880 (__v8sf)__W);
6135}5881}
61365882
6137static __inline__ __m256 __DEFAULT_FN_ATTRS2565883static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6138_mm256_maskz_permutevar_ps(__mmask8 __U, __m256 __A, __m256i __C)5884_mm256_maskz_permutevar_ps(__mmask8 __U, __m256 __A, __m256i __C) {
6139{
6140 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,5885 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
6141 (__v8sf)_mm256_permutevar_ps(__A, __C),5886 (__v8sf)_mm256_permutevar_ps(__A, __C),
6142 (__v8sf)_mm256_setzero_ps());5887 (__v8sf)_mm256_setzero_ps());
...@@ -6250,282 +5995,251 @@ _mm256_mask_testn_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B)...@@ -6250,282 +5995,251 @@ _mm256_mask_testn_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B)
6250 _mm256_setzero_si256());5995 _mm256_setzero_si256());
6251}5996}
62525997
6253static __inline__ __m128i __DEFAULT_FN_ATTRS1285998static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6254_mm_mask_unpackhi_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)5999_mm_mask_unpackhi_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6255{
6256 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,6000 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6257 (__v4si)_mm_unpackhi_epi32(__A, __B),6001 (__v4si)_mm_unpackhi_epi32(__A, __B),
6258 (__v4si)__W);6002 (__v4si)__W);
6259}6003}
62606004
6261static __inline__ __m128i __DEFAULT_FN_ATTRS1286005static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6262_mm_maskz_unpackhi_epi32(__mmask8 __U, __m128i __A, __m128i __B)6006_mm_maskz_unpackhi_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
6263{
6264 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,6007 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6265 (__v4si)_mm_unpackhi_epi32(__A, __B),6008 (__v4si)_mm_unpackhi_epi32(__A, __B),
6266 (__v4si)_mm_setzero_si128());6009 (__v4si)_mm_setzero_si128());
6267}6010}
62686011
6269static __inline__ __m256i __DEFAULT_FN_ATTRS2566012static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6270_mm256_mask_unpackhi_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)6013_mm256_mask_unpackhi_epi32(__m256i __W, __mmask8 __U, __m256i __A,
6271{6014 __m256i __B) {
6272 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,6015 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6273 (__v8si)_mm256_unpackhi_epi32(__A, __B),6016 (__v8si)_mm256_unpackhi_epi32(__A, __B),
6274 (__v8si)__W);6017 (__v8si)__W);
6275}6018}
62766019
6277static __inline__ __m256i __DEFAULT_FN_ATTRS2566020static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6278_mm256_maskz_unpackhi_epi32(__mmask8 __U, __m256i __A, __m256i __B)6021_mm256_maskz_unpackhi_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
6279{
6280 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,6022 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6281 (__v8si)_mm256_unpackhi_epi32(__A, __B),6023 (__v8si)_mm256_unpackhi_epi32(__A, __B),
6282 (__v8si)_mm256_setzero_si256());6024 (__v8si)_mm256_setzero_si256());
6283}6025}
62846026
6285static __inline__ __m128i __DEFAULT_FN_ATTRS1286027static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6286_mm_mask_unpackhi_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)6028_mm_mask_unpackhi_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6287{
6288 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,6029 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
6289 (__v2di)_mm_unpackhi_epi64(__A, __B),6030 (__v2di)_mm_unpackhi_epi64(__A, __B),
6290 (__v2di)__W);6031 (__v2di)__W);
6291}6032}
62926033
6293static __inline__ __m128i __DEFAULT_FN_ATTRS1286034static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6294_mm_maskz_unpackhi_epi64(__mmask8 __U, __m128i __A, __m128i __B)6035_mm_maskz_unpackhi_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
6295{
6296 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,6036 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
6297 (__v2di)_mm_unpackhi_epi64(__A, __B),6037 (__v2di)_mm_unpackhi_epi64(__A, __B),
6298 (__v2di)_mm_setzero_si128());6038 (__v2di)_mm_setzero_si128());
6299}6039}
63006040
6301static __inline__ __m256i __DEFAULT_FN_ATTRS2566041static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6302_mm256_mask_unpackhi_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)6042_mm256_mask_unpackhi_epi64(__m256i __W, __mmask8 __U, __m256i __A,
6303{6043 __m256i __B) {
6304 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,6044 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
6305 (__v4di)_mm256_unpackhi_epi64(__A, __B),6045 (__v4di)_mm256_unpackhi_epi64(__A, __B),
6306 (__v4di)__W);6046 (__v4di)__W);
6307}6047}
63086048
6309static __inline__ __m256i __DEFAULT_FN_ATTRS2566049static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6310_mm256_maskz_unpackhi_epi64(__mmask8 __U, __m256i __A, __m256i __B)6050_mm256_maskz_unpackhi_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
6311{
6312 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,6051 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
6313 (__v4di)_mm256_unpackhi_epi64(__A, __B),6052 (__v4di)_mm256_unpackhi_epi64(__A, __B),
6314 (__v4di)_mm256_setzero_si256());6053 (__v4di)_mm256_setzero_si256());
6315}6054}
63166055
6317static __inline__ __m128i __DEFAULT_FN_ATTRS1286056static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6318_mm_mask_unpacklo_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)6057_mm_mask_unpacklo_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6319{
6320 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,6058 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6321 (__v4si)_mm_unpacklo_epi32(__A, __B),6059 (__v4si)_mm_unpacklo_epi32(__A, __B),
6322 (__v4si)__W);6060 (__v4si)__W);
6323}6061}
63246062
6325static __inline__ __m128i __DEFAULT_FN_ATTRS1286063static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6326_mm_maskz_unpacklo_epi32(__mmask8 __U, __m128i __A, __m128i __B)6064_mm_maskz_unpacklo_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
6327{
6328 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,6065 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6329 (__v4si)_mm_unpacklo_epi32(__A, __B),6066 (__v4si)_mm_unpacklo_epi32(__A, __B),
6330 (__v4si)_mm_setzero_si128());6067 (__v4si)_mm_setzero_si128());
6331}6068}
63326069
6333static __inline__ __m256i __DEFAULT_FN_ATTRS2566070static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6334_mm256_mask_unpacklo_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)6071_mm256_mask_unpacklo_epi32(__m256i __W, __mmask8 __U, __m256i __A,
6335{6072 __m256i __B) {
6336 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,6073 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6337 (__v8si)_mm256_unpacklo_epi32(__A, __B),6074 (__v8si)_mm256_unpacklo_epi32(__A, __B),
6338 (__v8si)__W);6075 (__v8si)__W);
6339}6076}
63406077
6341static __inline__ __m256i __DEFAULT_FN_ATTRS2566078static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6342_mm256_maskz_unpacklo_epi32(__mmask8 __U, __m256i __A, __m256i __B)6079_mm256_maskz_unpacklo_epi32(__mmask8 __U, __m256i __A, __m256i __B) {
6343{
6344 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,6080 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6345 (__v8si)_mm256_unpacklo_epi32(__A, __B),6081 (__v8si)_mm256_unpacklo_epi32(__A, __B),
6346 (__v8si)_mm256_setzero_si256());6082 (__v8si)_mm256_setzero_si256());
6347}6083}
63486084
6349static __inline__ __m128i __DEFAULT_FN_ATTRS1286085static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6350_mm_mask_unpacklo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)6086_mm_mask_unpacklo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6351{
6352 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,6087 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
6353 (__v2di)_mm_unpacklo_epi64(__A, __B),6088 (__v2di)_mm_unpacklo_epi64(__A, __B),
6354 (__v2di)__W);6089 (__v2di)__W);
6355}6090}
63566091
6357static __inline__ __m128i __DEFAULT_FN_ATTRS1286092static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6358_mm_maskz_unpacklo_epi64(__mmask8 __U, __m128i __A, __m128i __B)6093_mm_maskz_unpacklo_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
6359{
6360 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,6094 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U,
6361 (__v2di)_mm_unpacklo_epi64(__A, __B),6095 (__v2di)_mm_unpacklo_epi64(__A, __B),
6362 (__v2di)_mm_setzero_si128());6096 (__v2di)_mm_setzero_si128());
6363}6097}
63646098
6365static __inline__ __m256i __DEFAULT_FN_ATTRS2566099static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6366_mm256_mask_unpacklo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)6100_mm256_mask_unpacklo_epi64(__m256i __W, __mmask8 __U, __m256i __A,
6367{6101 __m256i __B) {
6368 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,6102 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
6369 (__v4di)_mm256_unpacklo_epi64(__A, __B),6103 (__v4di)_mm256_unpacklo_epi64(__A, __B),
6370 (__v4di)__W);6104 (__v4di)__W);
6371}6105}
63726106
6373static __inline__ __m256i __DEFAULT_FN_ATTRS2566107static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6374_mm256_maskz_unpacklo_epi64(__mmask8 __U, __m256i __A, __m256i __B)6108_mm256_maskz_unpacklo_epi64(__mmask8 __U, __m256i __A, __m256i __B) {
6375{
6376 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,6109 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U,
6377 (__v4di)_mm256_unpacklo_epi64(__A, __B),6110 (__v4di)_mm256_unpacklo_epi64(__A, __B),
6378 (__v4di)_mm256_setzero_si256());6111 (__v4di)_mm256_setzero_si256());
6379}6112}
63806113
6381static __inline__ __m128i __DEFAULT_FN_ATTRS1286114static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6382_mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)6115_mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6383{
6384 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,6116 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6385 (__v4si)_mm_sra_epi32(__A, __B),6117 (__v4si)_mm_sra_epi32(__A, __B),
6386 (__v4si)__W);6118 (__v4si)__W);
6387}6119}
63886120
6389static __inline__ __m128i __DEFAULT_FN_ATTRS1286121static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6390_mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B)6122_mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
6391{
6392 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,6123 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6393 (__v4si)_mm_sra_epi32(__A, __B),6124 (__v4si)_mm_sra_epi32(__A, __B),
6394 (__v4si)_mm_setzero_si128());6125 (__v4si)_mm_setzero_si128());
6395}6126}
63966127
6397static __inline__ __m256i __DEFAULT_FN_ATTRS2566128static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6398_mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)6129_mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) {
6399{
6400 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,6130 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6401 (__v8si)_mm256_sra_epi32(__A, __B),6131 (__v8si)_mm256_sra_epi32(__A, __B),
6402 (__v8si)__W);6132 (__v8si)__W);
6403}6133}
64046134
6405static __inline__ __m256i __DEFAULT_FN_ATTRS2566135static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6406_mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B)6136_mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B) {
6407{
6408 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,6137 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6409 (__v8si)_mm256_sra_epi32(__A, __B),6138 (__v8si)_mm256_sra_epi32(__A, __B),
6410 (__v8si)_mm256_setzero_si256());6139 (__v8si)_mm256_setzero_si256());
6411}6140}
64126141
6413static __inline__ __m128i __DEFAULT_FN_ATTRS1286142static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6414_mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B)6143_mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) {
6415{
6416 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,6144 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6417 (__v4si)_mm_srai_epi32(__A, (int)__B),6145 (__v4si)_mm_srai_epi32(__A, (int)__B),
6418 (__v4si)__W);6146 (__v4si)__W);
6419}6147}
64206148
6421static __inline__ __m128i __DEFAULT_FN_ATTRS1286149static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6422_mm_maskz_srai_epi32(__mmask8 __U, __m128i __A, unsigned int __B)6150_mm_maskz_srai_epi32(__mmask8 __U, __m128i __A, unsigned int __B) {
6423{
6424 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,6151 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U,
6425 (__v4si)_mm_srai_epi32(__A, (int)__B),6152 (__v4si)_mm_srai_epi32(__A, (int)__B),
6426 (__v4si)_mm_setzero_si128());6153 (__v4si)_mm_setzero_si128());
6427}6154}
64286155
6429static __inline__ __m256i __DEFAULT_FN_ATTRS2566156static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6430_mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B)6157_mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A,
6431{6158 unsigned int __B) {
6432 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,6159 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6433 (__v8si)_mm256_srai_epi32(__A, (int)__B),6160 (__v8si)_mm256_srai_epi32(__A, (int)__B),
6434 (__v8si)__W);6161 (__v8si)__W);
6435}6162}
64366163
6437static __inline__ __m256i __DEFAULT_FN_ATTRS2566164static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6438_mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A, unsigned int __B)6165_mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A, unsigned int __B) {
6439{
6440 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,6166 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
6441 (__v8si)_mm256_srai_epi32(__A, (int)__B),6167 (__v8si)_mm256_srai_epi32(__A, (int)__B),
6442 (__v8si)_mm256_setzero_si256());6168 (__v8si)_mm256_setzero_si256());
6443}6169}
64446170
6445static __inline__ __m128i __DEFAULT_FN_ATTRS1286171static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6446_mm_sra_epi64(__m128i __A, __m128i __B)6172_mm_sra_epi64(__m128i __A, __m128i __B) {
6447{
6448 return (__m128i)__builtin_ia32_psraq128((__v2di)__A, (__v2di)__B);6173 return (__m128i)__builtin_ia32_psraq128((__v2di)__A, (__v2di)__B);
6449}6174}
64506175
6451static __inline__ __m128i __DEFAULT_FN_ATTRS1286176static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6452_mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)6177_mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
6453{
6454 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \6178 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \
6455 (__v2di)_mm_sra_epi64(__A, __B), \6179 (__v2di)_mm_sra_epi64(__A, __B), \
6456 (__v2di)__W);6180 (__v2di)__W);
6457}6181}
64586182
6459static __inline__ __m128i __DEFAULT_FN_ATTRS1286183static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6460_mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B)6184_mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
6461{
6462 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \6185 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \
6463 (__v2di)_mm_sra_epi64(__A, __B), \6186 (__v2di)_mm_sra_epi64(__A, __B), \
6464 (__v2di)_mm_setzero_si128());6187 (__v2di)_mm_setzero_si128());
6465}6188}
64666189
6467static __inline__ __m256i __DEFAULT_FN_ATTRS2566190static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6468_mm256_sra_epi64(__m256i __A, __m128i __B)6191_mm256_sra_epi64(__m256i __A, __m128i __B) {
6469{
6470 return (__m256i)__builtin_ia32_psraq256((__v4di) __A, (__v2di) __B);6192 return (__m256i)__builtin_ia32_psraq256((__v4di) __A, (__v2di) __B);
6471}6193}
64726194
6473static __inline__ __m256i __DEFAULT_FN_ATTRS2566195static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6474_mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B)6196_mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) {
6475{
6476 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \6197 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \
6477 (__v4di)_mm256_sra_epi64(__A, __B), \6198 (__v4di)_mm256_sra_epi64(__A, __B), \
6478 (__v4di)__W);6199 (__v4di)__W);
6479}6200}
64806201
6481static __inline__ __m256i __DEFAULT_FN_ATTRS2566202static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6482_mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B)6203_mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B) {
6483{
6484 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \6204 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \
6485 (__v4di)_mm256_sra_epi64(__A, __B), \6205 (__v4di)_mm256_sra_epi64(__A, __B), \
6486 (__v4di)_mm256_setzero_si256());6206 (__v4di)_mm256_setzero_si256());
6487}6207}
64886208
6489static __inline__ __m128i __DEFAULT_FN_ATTRS1286209static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6490_mm_srai_epi64(__m128i __A, unsigned int __imm)6210_mm_srai_epi64(__m128i __A, unsigned int __imm) {
6491{
6492 return (__m128i)__builtin_ia32_psraqi128((__v2di)__A, (int)__imm);6211 return (__m128i)__builtin_ia32_psraqi128((__v2di)__A, (int)__imm);
6493}6212}
64946213
6495static __inline__ __m128i __DEFAULT_FN_ATTRS1286214static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_srai_epi64(
6496_mm_mask_srai_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __imm)6215 __m128i __W, __mmask8 __U, __m128i __A, unsigned int __imm) {
6497{
6498 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \6216 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \
6499 (__v2di)_mm_srai_epi64(__A, __imm), \6217 (__v2di)_mm_srai_epi64(__A, __imm), \
6500 (__v2di)__W);6218 (__v2di)__W);
6501}6219}
65026220
6503static __inline__ __m128i __DEFAULT_FN_ATTRS1286221static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6504_mm_maskz_srai_epi64(__mmask8 __U, __m128i __A, unsigned int __imm)6222_mm_maskz_srai_epi64(__mmask8 __U, __m128i __A, unsigned int __imm) {
6505{
6506 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \6223 return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \
6507 (__v2di)_mm_srai_epi64(__A, __imm), \6224 (__v2di)_mm_srai_epi64(__A, __imm), \
6508 (__v2di)_mm_setzero_si128());6225 (__v2di)_mm_setzero_si128());
6509}6226}
65106227
6511static __inline__ __m256i __DEFAULT_FN_ATTRS2566228static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6512_mm256_srai_epi64(__m256i __A, unsigned int __imm)6229_mm256_srai_epi64(__m256i __A, unsigned int __imm) {
6513{
6514 return (__m256i)__builtin_ia32_psraqi256((__v4di)__A, (int)__imm);6230 return (__m256i)__builtin_ia32_psraqi256((__v4di)__A, (int)__imm);
6515}6231}
65166232
6517static __inline__ __m256i __DEFAULT_FN_ATTRS2566233static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6518_mm256_mask_srai_epi64(__m256i __W, __mmask8 __U, __m256i __A,6234_mm256_mask_srai_epi64(__m256i __W, __mmask8 __U, __m256i __A,
6519 unsigned int __imm)6235 unsigned int __imm) {
6520{
6521 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \6236 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \
6522 (__v4di)_mm256_srai_epi64(__A, __imm), \6237 (__v4di)_mm256_srai_epi64(__A, __imm), \
6523 (__v4di)__W);6238 (__v4di)__W);
6524}6239}
65256240
6526static __inline__ __m256i __DEFAULT_FN_ATTRS2566241static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6527_mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A, unsigned int __imm)6242_mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A, unsigned int __imm) {
6528{
6529 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \6243 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \
6530 (__v4di)_mm256_srai_epi64(__A, __imm), \6244 (__v4di)_mm256_srai_epi64(__A, __imm), \
6531 (__v4di)_mm256_setzero_si256());6245 (__v4di)_mm256_setzero_si256());
...@@ -6792,159 +6506,139 @@ _mm256_maskz_rsqrt14_ps (__mmask8 __U, __m256 __A)...@@ -6792,159 +6506,139 @@ _mm256_maskz_rsqrt14_ps (__mmask8 __U, __m256 __A)
6792 (__mmask8) __U);6506 (__mmask8) __U);
6793}6507}
67946508
6795static __inline__ __m256 __DEFAULT_FN_ATTRS2566509static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6796_mm256_broadcast_f32x4(__m128 __A)6510_mm256_broadcast_f32x4(__m128 __A) {
6797{
6798 return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,6511 return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,
6799 0, 1, 2, 3, 0, 1, 2, 3);6512 0, 1, 2, 3, 0, 1, 2, 3);
6800}6513}
68016514
6802static __inline__ __m256 __DEFAULT_FN_ATTRS2566515static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6803_mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A)6516_mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A) {
6804{
6805 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,6517 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,
6806 (__v8sf)_mm256_broadcast_f32x4(__A),6518 (__v8sf)_mm256_broadcast_f32x4(__A),
6807 (__v8sf)__O);6519 (__v8sf)__O);
6808}6520}
68096521
6810static __inline__ __m256 __DEFAULT_FN_ATTRS2566522static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6811_mm256_maskz_broadcast_f32x4 (__mmask8 __M, __m128 __A)6523_mm256_maskz_broadcast_f32x4(__mmask8 __M, __m128 __A) {
6812{
6813 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,6524 return (__m256)__builtin_ia32_selectps_256((__mmask8)__M,
6814 (__v8sf)_mm256_broadcast_f32x4(__A),6525 (__v8sf)_mm256_broadcast_f32x4(__A),
6815 (__v8sf)_mm256_setzero_ps());6526 (__v8sf)_mm256_setzero_ps());
6816}6527}
68176528
6818static __inline__ __m256i __DEFAULT_FN_ATTRS2566529static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6819_mm256_broadcast_i32x4(__m128i __A)6530_mm256_broadcast_i32x4(__m128i __A) {
6820{
6821 return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,6531 return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A,
6822 0, 1, 2, 3, 0, 1, 2, 3);6532 0, 1, 2, 3, 0, 1, 2, 3);
6823}6533}
68246534
6825static __inline__ __m256i __DEFAULT_FN_ATTRS2566535static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6826_mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i __A)6536_mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i __A) {
6827{
6828 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,6537 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
6829 (__v8si)_mm256_broadcast_i32x4(__A),6538 (__v8si)_mm256_broadcast_i32x4(__A),
6830 (__v8si)__O);6539 (__v8si)__O);
6831}6540}
68326541
6833static __inline__ __m256i __DEFAULT_FN_ATTRS2566542static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6834_mm256_maskz_broadcast_i32x4(__mmask8 __M, __m128i __A)6543_mm256_maskz_broadcast_i32x4(__mmask8 __M, __m128i __A) {
6835{
6836 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,6544 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
6837 (__v8si)_mm256_broadcast_i32x4(__A),6545 (__v8si)_mm256_broadcast_i32x4(__A),
6838 (__v8si)_mm256_setzero_si256());6546 (__v8si)_mm256_setzero_si256());
6839}6547}
68406548
6841static __inline__ __m256d __DEFAULT_FN_ATTRS2566549static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
6842_mm256_mask_broadcastsd_pd (__m256d __O, __mmask8 __M, __m128d __A)6550_mm256_mask_broadcastsd_pd(__m256d __O, __mmask8 __M, __m128d __A) {
6843{
6844 return (__m256d)__builtin_ia32_selectpd_256(__M,6551 return (__m256d)__builtin_ia32_selectpd_256(__M,
6845 (__v4df) _mm256_broadcastsd_pd(__A),6552 (__v4df) _mm256_broadcastsd_pd(__A),
6846 (__v4df) __O);6553 (__v4df) __O);
6847}6554}
68486555
6849static __inline__ __m256d __DEFAULT_FN_ATTRS2566556static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
6850_mm256_maskz_broadcastsd_pd (__mmask8 __M, __m128d __A)6557_mm256_maskz_broadcastsd_pd(__mmask8 __M, __m128d __A) {
6851{
6852 return (__m256d)__builtin_ia32_selectpd_256(__M,6558 return (__m256d)__builtin_ia32_selectpd_256(__M,
6853 (__v4df) _mm256_broadcastsd_pd(__A),6559 (__v4df) _mm256_broadcastsd_pd(__A),
6854 (__v4df) _mm256_setzero_pd());6560 (__v4df) _mm256_setzero_pd());
6855}6561}
68566562
6857static __inline__ __m128 __DEFAULT_FN_ATTRS1286563static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
6858_mm_mask_broadcastss_ps (__m128 __O, __mmask8 __M, __m128 __A)6564_mm_mask_broadcastss_ps(__m128 __O, __mmask8 __M, __m128 __A) {
6859{
6860 return (__m128)__builtin_ia32_selectps_128(__M,6565 return (__m128)__builtin_ia32_selectps_128(__M,
6861 (__v4sf) _mm_broadcastss_ps(__A),6566 (__v4sf) _mm_broadcastss_ps(__A),
6862 (__v4sf) __O);6567 (__v4sf) __O);
6863}6568}
68646569
6865static __inline__ __m128 __DEFAULT_FN_ATTRS1286570static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
6866_mm_maskz_broadcastss_ps (__mmask8 __M, __m128 __A)6571_mm_maskz_broadcastss_ps(__mmask8 __M, __m128 __A) {
6867{
6868 return (__m128)__builtin_ia32_selectps_128(__M,6572 return (__m128)__builtin_ia32_selectps_128(__M,
6869 (__v4sf) _mm_broadcastss_ps(__A),6573 (__v4sf) _mm_broadcastss_ps(__A),
6870 (__v4sf) _mm_setzero_ps());6574 (__v4sf) _mm_setzero_ps());
6871}6575}
68726576
6873static __inline__ __m256 __DEFAULT_FN_ATTRS2566577static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6874_mm256_mask_broadcastss_ps (__m256 __O, __mmask8 __M, __m128 __A)6578_mm256_mask_broadcastss_ps(__m256 __O, __mmask8 __M, __m128 __A) {
6875{
6876 return (__m256)__builtin_ia32_selectps_256(__M,6579 return (__m256)__builtin_ia32_selectps_256(__M,
6877 (__v8sf) _mm256_broadcastss_ps(__A),6580 (__v8sf) _mm256_broadcastss_ps(__A),
6878 (__v8sf) __O);6581 (__v8sf) __O);
6879}6582}
68806583
6881static __inline__ __m256 __DEFAULT_FN_ATTRS2566584static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
6882_mm256_maskz_broadcastss_ps (__mmask8 __M, __m128 __A)6585_mm256_maskz_broadcastss_ps(__mmask8 __M, __m128 __A) {
6883{
6884 return (__m256)__builtin_ia32_selectps_256(__M,6586 return (__m256)__builtin_ia32_selectps_256(__M,
6885 (__v8sf) _mm256_broadcastss_ps(__A),6587 (__v8sf) _mm256_broadcastss_ps(__A),
6886 (__v8sf) _mm256_setzero_ps());6588 (__v8sf) _mm256_setzero_ps());
6887}6589}
68886590
6889static __inline__ __m128i __DEFAULT_FN_ATTRS1286591static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6890_mm_mask_broadcastd_epi32 (__m128i __O, __mmask8 __M, __m128i __A)6592_mm_mask_broadcastd_epi32(__m128i __O, __mmask8 __M, __m128i __A) {
6891{
6892 return (__m128i)__builtin_ia32_selectd_128(__M,6593 return (__m128i)__builtin_ia32_selectd_128(__M,
6893 (__v4si) _mm_broadcastd_epi32(__A),6594 (__v4si) _mm_broadcastd_epi32(__A),
6894 (__v4si) __O);6595 (__v4si) __O);
6895}6596}
68966597
6897static __inline__ __m128i __DEFAULT_FN_ATTRS1286598static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6898_mm_maskz_broadcastd_epi32 (__mmask8 __M, __m128i __A)6599_mm_maskz_broadcastd_epi32(__mmask8 __M, __m128i __A) {
6899{
6900 return (__m128i)__builtin_ia32_selectd_128(__M,6600 return (__m128i)__builtin_ia32_selectd_128(__M,
6901 (__v4si) _mm_broadcastd_epi32(__A),6601 (__v4si) _mm_broadcastd_epi32(__A),
6902 (__v4si) _mm_setzero_si128());6602 (__v4si) _mm_setzero_si128());
6903}6603}
69046604
6905static __inline__ __m256i __DEFAULT_FN_ATTRS2566605static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6906_mm256_mask_broadcastd_epi32 (__m256i __O, __mmask8 __M, __m128i __A)6606_mm256_mask_broadcastd_epi32(__m256i __O, __mmask8 __M, __m128i __A) {
6907{
6908 return (__m256i)__builtin_ia32_selectd_256(__M,6607 return (__m256i)__builtin_ia32_selectd_256(__M,
6909 (__v8si) _mm256_broadcastd_epi32(__A),6608 (__v8si) _mm256_broadcastd_epi32(__A),
6910 (__v8si) __O);6609 (__v8si) __O);
6911}6610}
69126611
6913static __inline__ __m256i __DEFAULT_FN_ATTRS2566612static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6914_mm256_maskz_broadcastd_epi32 (__mmask8 __M, __m128i __A)6613_mm256_maskz_broadcastd_epi32(__mmask8 __M, __m128i __A) {
6915{
6916 return (__m256i)__builtin_ia32_selectd_256(__M,6614 return (__m256i)__builtin_ia32_selectd_256(__M,
6917 (__v8si) _mm256_broadcastd_epi32(__A),6615 (__v8si) _mm256_broadcastd_epi32(__A),
6918 (__v8si) _mm256_setzero_si256());6616 (__v8si) _mm256_setzero_si256());
6919}6617}
69206618
6921static __inline__ __m128i __DEFAULT_FN_ATTRS1286619static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6922_mm_mask_broadcastq_epi64 (__m128i __O, __mmask8 __M, __m128i __A)6620_mm_mask_broadcastq_epi64(__m128i __O, __mmask8 __M, __m128i __A) {
6923{
6924 return (__m128i)__builtin_ia32_selectq_128(__M,6621 return (__m128i)__builtin_ia32_selectq_128(__M,
6925 (__v2di) _mm_broadcastq_epi64(__A),6622 (__v2di) _mm_broadcastq_epi64(__A),
6926 (__v2di) __O);6623 (__v2di) __O);
6927}6624}
69286625
6929static __inline__ __m128i __DEFAULT_FN_ATTRS1286626static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
6930_mm_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A)6627_mm_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) {
6931{
6932 return (__m128i)__builtin_ia32_selectq_128(__M,6628 return (__m128i)__builtin_ia32_selectq_128(__M,
6933 (__v2di) _mm_broadcastq_epi64(__A),6629 (__v2di) _mm_broadcastq_epi64(__A),
6934 (__v2di) _mm_setzero_si128());6630 (__v2di) _mm_setzero_si128());
6935}6631}
69366632
6937static __inline__ __m256i __DEFAULT_FN_ATTRS2566633static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6938_mm256_mask_broadcastq_epi64 (__m256i __O, __mmask8 __M, __m128i __A)6634_mm256_mask_broadcastq_epi64(__m256i __O, __mmask8 __M, __m128i __A) {
6939{
6940 return (__m256i)__builtin_ia32_selectq_256(__M,6635 return (__m256i)__builtin_ia32_selectq_256(__M,
6941 (__v4di) _mm256_broadcastq_epi64(__A),6636 (__v4di) _mm256_broadcastq_epi64(__A),
6942 (__v4di) __O);6637 (__v4di) __O);
6943}6638}
69446639
6945static __inline__ __m256i __DEFAULT_FN_ATTRS2566640static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
6946_mm256_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A)6641_mm256_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) {
6947{
6948 return (__m256i)__builtin_ia32_selectq_256(__M,6642 return (__m256i)__builtin_ia32_selectq_256(__M,
6949 (__v4di) _mm256_broadcastq_epi64(__A),6643 (__v4di) _mm256_broadcastq_epi64(__A),
6950 (__v4di) _mm256_setzero_si256());6644 (__v4di) _mm256_setzero_si256());
...@@ -7536,9 +7230,8 @@ _mm256_mask_cvtusepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)...@@ -7536,9 +7230,8 @@ _mm256_mask_cvtusepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)
7536 __builtin_ia32_pmovusqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M);7230 __builtin_ia32_pmovusqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M);
7537}7231}
75387232
7539static __inline__ __m128i __DEFAULT_FN_ATTRS1287233static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7540_mm_cvtepi32_epi8 (__m128i __A)7234_mm_cvtepi32_epi8(__m128i __A) {
7541{
7542 return (__m128i)__builtin_shufflevector(7235 return (__m128i)__builtin_shufflevector(
7543 __builtin_convertvector((__v4si)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1,7236 __builtin_convertvector((__v4si)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1,
7544 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7);7237 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7);
...@@ -7566,9 +7259,8 @@ _mm_mask_cvtepi32_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)...@@ -7566,9 +7259,8 @@ _mm_mask_cvtepi32_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)
7566 __builtin_ia32_pmovdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M);7259 __builtin_ia32_pmovdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M);
7567}7260}
75687261
7569static __inline__ __m128i __DEFAULT_FN_ATTRS2567262static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7570_mm256_cvtepi32_epi8 (__m256i __A)7263_mm256_cvtepi32_epi8(__m256i __A) {
7571{
7572 return (__m128i)__builtin_shufflevector(7264 return (__m128i)__builtin_shufflevector(
7573 __builtin_convertvector((__v8si)__A, __v8qi),7265 __builtin_convertvector((__v8si)__A, __v8qi),
7574 (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,7266 (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
...@@ -7576,8 +7268,7 @@ _mm256_cvtepi32_epi8 (__m256i __A)...@@ -7576,8 +7268,7 @@ _mm256_cvtepi32_epi8 (__m256i __A)
7576}7268}
75777269
7578static __inline__ __m128i __DEFAULT_FN_ATTRS2567270static __inline__ __m128i __DEFAULT_FN_ATTRS256
7579_mm256_mask_cvtepi32_epi8 (__m128i __O, __mmask8 __M, __m256i __A)7271_mm256_mask_cvtepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A) {
7580{
7581 return (__m128i) __builtin_ia32_pmovdb256_mask ((__v8si) __A,7272 return (__m128i) __builtin_ia32_pmovdb256_mask ((__v8si) __A,
7582 (__v16qi) __O, __M);7273 (__v16qi) __O, __M);
7583}7274}
...@@ -7596,9 +7287,8 @@ _mm256_mask_cvtepi32_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A)...@@ -7596,9 +7287,8 @@ _mm256_mask_cvtepi32_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A)
7596 __builtin_ia32_pmovdb256mem_mask ((__v16qi *) __P, (__v8si) __A, __M);7287 __builtin_ia32_pmovdb256mem_mask ((__v16qi *) __P, (__v8si) __A, __M);
7597}7288}
75987289
7599static __inline__ __m128i __DEFAULT_FN_ATTRS1287290static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7600_mm_cvtepi32_epi16 (__m128i __A)7291_mm_cvtepi32_epi16(__m128i __A) {
7601{
7602 return (__m128i)__builtin_shufflevector(7292 return (__m128i)__builtin_shufflevector(
7603 __builtin_convertvector((__v4si)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1,7293 __builtin_convertvector((__v4si)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1,
7604 2, 3, 4, 5, 6, 7);7294 2, 3, 4, 5, 6, 7);
...@@ -7625,9 +7315,8 @@ _mm_mask_cvtepi32_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A)...@@ -7625,9 +7315,8 @@ _mm_mask_cvtepi32_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A)
7625 __builtin_ia32_pmovdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M);7315 __builtin_ia32_pmovdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M);
7626}7316}
76277317
7628static __inline__ __m128i __DEFAULT_FN_ATTRS2567318static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7629_mm256_cvtepi32_epi16 (__m256i __A)7319_mm256_cvtepi32_epi16(__m256i __A) {
7630{
7631 return (__m128i)__builtin_convertvector((__v8si)__A, __v8hi);7320 return (__m128i)__builtin_convertvector((__v8si)__A, __v8hi);
7632}7321}
76337322
...@@ -7652,9 +7341,8 @@ _mm256_mask_cvtepi32_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)...@@ -7652,9 +7341,8 @@ _mm256_mask_cvtepi32_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)
7652 __builtin_ia32_pmovdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M);7341 __builtin_ia32_pmovdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M);
7653}7342}
76547343
7655static __inline__ __m128i __DEFAULT_FN_ATTRS1287344static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7656_mm_cvtepi64_epi8 (__m128i __A)7345_mm_cvtepi64_epi8(__m128i __A) {
7657{
7658 return (__m128i)__builtin_shufflevector(7346 return (__m128i)__builtin_shufflevector(
7659 __builtin_convertvector((__v2di)__A, __v2qi), (__v2qi){0, 0}, 0, 1, 2, 3,7347 __builtin_convertvector((__v2di)__A, __v2qi), (__v2qi){0, 0}, 0, 1, 2, 3,
7660 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3);7348 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3);
...@@ -7681,9 +7369,8 @@ _mm_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)...@@ -7681,9 +7369,8 @@ _mm_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A)
7681 __builtin_ia32_pmovqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M);7369 __builtin_ia32_pmovqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M);
7682}7370}
76837371
7684static __inline__ __m128i __DEFAULT_FN_ATTRS2567372static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7685_mm256_cvtepi64_epi8 (__m256i __A)7373_mm256_cvtepi64_epi8(__m256i __A) {
7686{
7687 return (__m128i)__builtin_shufflevector(7374 return (__m128i)__builtin_shufflevector(
7688 __builtin_convertvector((__v4di)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1,7375 __builtin_convertvector((__v4di)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1,
7689 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7);7376 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7);
...@@ -7710,9 +7397,8 @@ _mm256_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A)...@@ -7710,9 +7397,8 @@ _mm256_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A)
7710 __builtin_ia32_pmovqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M);7397 __builtin_ia32_pmovqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M);
7711}7398}
77127399
7713static __inline__ __m128i __DEFAULT_FN_ATTRS1287400static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7714_mm_cvtepi64_epi32 (__m128i __A)7401_mm_cvtepi64_epi32(__m128i __A) {
7715{
7716 return (__m128i)__builtin_shufflevector(7402 return (__m128i)__builtin_shufflevector(
7717 __builtin_convertvector((__v2di)__A, __v2si), (__v2si){0, 0}, 0, 1, 2, 3);7403 __builtin_convertvector((__v2di)__A, __v2si), (__v2si){0, 0}, 0, 1, 2, 3);
7718}7404}
...@@ -7738,23 +7424,20 @@ _mm_mask_cvtepi64_storeu_epi32 (void * __P, __mmask8 __M, __m128i __A)...@@ -7738,23 +7424,20 @@ _mm_mask_cvtepi64_storeu_epi32 (void * __P, __mmask8 __M, __m128i __A)
7738 __builtin_ia32_pmovqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M);7424 __builtin_ia32_pmovqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M);
7739}7425}
77407426
7741static __inline__ __m128i __DEFAULT_FN_ATTRS2567427static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7742_mm256_cvtepi64_epi32 (__m256i __A)7428_mm256_cvtepi64_epi32(__m256i __A) {
7743{
7744 return (__m128i)__builtin_convertvector((__v4di)__A, __v4si);7429 return (__m128i)__builtin_convertvector((__v4di)__A, __v4si);
7745}7430}
77467431
7747static __inline__ __m128i __DEFAULT_FN_ATTRS2567432static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7748_mm256_mask_cvtepi64_epi32 (__m128i __O, __mmask8 __M, __m256i __A)7433_mm256_mask_cvtepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A) {
7749{
7750 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,7434 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
7751 (__v4si)_mm256_cvtepi64_epi32(__A),7435 (__v4si)_mm256_cvtepi64_epi32(__A),
7752 (__v4si)__O);7436 (__v4si)__O);
7753}7437}
77547438
7755static __inline__ __m128i __DEFAULT_FN_ATTRS2567439static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7756_mm256_maskz_cvtepi64_epi32 (__mmask8 __M, __m256i __A)7440_mm256_maskz_cvtepi64_epi32(__mmask8 __M, __m256i __A) {
7757{
7758 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,7441 return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M,
7759 (__v4si)_mm256_cvtepi64_epi32(__A),7442 (__v4si)_mm256_cvtepi64_epi32(__A),
7760 (__v4si)_mm_setzero_si128());7443 (__v4si)_mm_setzero_si128());
...@@ -7766,9 +7449,8 @@ _mm256_mask_cvtepi64_storeu_epi32 (void * __P, __mmask8 __M, __m256i __A)...@@ -7766,9 +7449,8 @@ _mm256_mask_cvtepi64_storeu_epi32 (void * __P, __mmask8 __M, __m256i __A)
7766 __builtin_ia32_pmovqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M);7449 __builtin_ia32_pmovqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M);
7767}7450}
77687451
7769static __inline__ __m128i __DEFAULT_FN_ATTRS1287452static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
7770_mm_cvtepi64_epi16 (__m128i __A)7453_mm_cvtepi64_epi16(__m128i __A) {
7771{
7772 return (__m128i)__builtin_shufflevector(7454 return (__m128i)__builtin_shufflevector(
7773 __builtin_convertvector((__v2di)__A, __v2hi), (__v2hi){0, 0}, 0, 1, 2, 3,7455 __builtin_convertvector((__v2di)__A, __v2hi), (__v2hi){0, 0}, 0, 1, 2, 3,
7774 3, 3, 3, 3);7456 3, 3, 3, 3);
...@@ -7796,9 +7478,8 @@ _mm_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A)...@@ -7796,9 +7478,8 @@ _mm_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A)
7796 __builtin_ia32_pmovqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M);7478 __builtin_ia32_pmovqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M);
7797}7479}
77987480
7799static __inline__ __m128i __DEFAULT_FN_ATTRS2567481static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR
7800_mm256_cvtepi64_epi16 (__m256i __A)7482_mm256_cvtepi64_epi16(__m256i __A) {
7801{
7802 return (__m128i)__builtin_shufflevector(7483 return (__m128i)__builtin_shufflevector(
7803 __builtin_convertvector((__v4di)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1,7484 __builtin_convertvector((__v4di)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1,
7804 2, 3, 4, 5, 6, 7);7485 2, 3, 4, 5, 6, 7);
...@@ -7825,11 +7506,10 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)...@@ -7825,11 +7506,10 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)
7825 __builtin_ia32_pmovqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M);7506 __builtin_ia32_pmovqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M);
7826}7507}
78277508
7828#define _mm256_extractf32x4_ps(A, imm) \7509#define _mm256_extractf32x4_ps(A, imm) \
7829 ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \7510 ((__m128)__builtin_ia32_extractf32x4_256_mask( \
7830 (int)(imm), \7511 (__v8sf)(__m256)(A), (int)(imm), (__v4sf)_mm_setzero_ps(), \
7831 (__v4sf)_mm_undefined_ps(), \7512 (__mmask8) - 1))
7832 (__mmask8)-1))
78337513
7834#define _mm256_mask_extractf32x4_ps(W, U, A, imm) \7514#define _mm256_mask_extractf32x4_ps(W, U, A, imm) \
7835 ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \7515 ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \
...@@ -7843,11 +7523,10 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)...@@ -7843,11 +7523,10 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)
7843 (__v4sf)_mm_setzero_ps(), \7523 (__v4sf)_mm_setzero_ps(), \
7844 (__mmask8)(U)))7524 (__mmask8)(U)))
78457525
7846#define _mm256_extracti32x4_epi32(A, imm) \7526#define _mm256_extracti32x4_epi32(A, imm) \
7847 ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \7527 ((__m128i)__builtin_ia32_extracti32x4_256_mask( \
7848 (int)(imm), \7528 (__v8si)(__m256i)(A), (int)(imm), (__v4si)_mm_setzero_si128(), \
7849 (__v4si)_mm_undefined_si128(), \7529 (__mmask8) - 1))
7850 (__mmask8)-1))
78517530
7852#define _mm256_mask_extracti32x4_epi32(W, U, A, imm) \7531#define _mm256_mask_extracti32x4_epi32(W, U, A, imm) \
7853 ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \7532 ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \
...@@ -8083,47 +7762,41 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)...@@ -8083,47 +7762,41 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A)
8083 (__v4di)_mm256_permutex_epi64((X), (C)), \7762 (__v4di)_mm256_permutex_epi64((X), (C)), \
8084 (__v4di)_mm256_setzero_si256()))7763 (__v4di)_mm256_setzero_si256()))
80857764
8086static __inline__ __m256d __DEFAULT_FN_ATTRS2567765static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
8087_mm256_permutexvar_pd (__m256i __X, __m256d __Y)7766_mm256_permutexvar_pd(__m256i __X, __m256d __Y) {
8088{
8089 return (__m256d)__builtin_ia32_permvardf256((__v4df)__Y, (__v4di)__X);7767 return (__m256d)__builtin_ia32_permvardf256((__v4df)__Y, (__v4di)__X);
8090}7768}
80917769
8092static __inline__ __m256d __DEFAULT_FN_ATTRS2567770static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
8093_mm256_mask_permutexvar_pd (__m256d __W, __mmask8 __U, __m256i __X,7771_mm256_mask_permutexvar_pd(__m256d __W, __mmask8 __U, __m256i __X,
8094 __m256d __Y)7772 __m256d __Y) {
8095{
8096 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,7773 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
8097 (__v4df)_mm256_permutexvar_pd(__X, __Y),7774 (__v4df)_mm256_permutexvar_pd(__X, __Y),
8098 (__v4df)__W);7775 (__v4df)__W);
8099}7776}
81007777
8101static __inline__ __m256d __DEFAULT_FN_ATTRS2567778static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
8102_mm256_maskz_permutexvar_pd (__mmask8 __U, __m256i __X, __m256d __Y)7779_mm256_maskz_permutexvar_pd(__mmask8 __U, __m256i __X, __m256d __Y) {
8103{
8104 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,7780 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
8105 (__v4df)_mm256_permutexvar_pd(__X, __Y),7781 (__v4df)_mm256_permutexvar_pd(__X, __Y),
8106 (__v4df)_mm256_setzero_pd());7782 (__v4df)_mm256_setzero_pd());
8107}7783}
81087784
8109static __inline__ __m256i __DEFAULT_FN_ATTRS2567785static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
8110_mm256_permutexvar_epi64 ( __m256i __X, __m256i __Y)7786_mm256_permutexvar_epi64(__m256i __X, __m256i __Y) {
8111{
8112 return (__m256i)__builtin_ia32_permvardi256((__v4di) __Y, (__v4di) __X);7787 return (__m256i)__builtin_ia32_permvardi256((__v4di) __Y, (__v4di) __X);
8113}7788}
81147789
8115static __inline__ __m256i __DEFAULT_FN_ATTRS2567790static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
8116_mm256_maskz_permutexvar_epi64 (__mmask8 __M, __m256i __X, __m256i __Y)7791_mm256_maskz_permutexvar_epi64(__mmask8 __M, __m256i __X, __m256i __Y) {
8117{
8118 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,7792 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
8119 (__v4di)_mm256_permutexvar_epi64(__X, __Y),7793 (__v4di)_mm256_permutexvar_epi64(__X, __Y),
8120 (__v4di)_mm256_setzero_si256());7794 (__v4di)_mm256_setzero_si256());
8121}7795}
81227796
8123static __inline__ __m256i __DEFAULT_FN_ATTRS2567797static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
8124_mm256_mask_permutexvar_epi64 (__m256i __W, __mmask8 __M, __m256i __X,7798_mm256_mask_permutexvar_epi64(__m256i __W, __mmask8 __M, __m256i __X,
8125 __m256i __Y)7799 __m256i __Y) {
8126{
8127 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,7800 return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M,
8128 (__v4di)_mm256_permutexvar_epi64(__X, __Y),7801 (__v4di)_mm256_permutexvar_epi64(__X, __Y),
8129 (__v4di)__W);7802 (__v4di)__W);
...@@ -8131,17 +7804,15 @@ _mm256_mask_permutexvar_epi64 (__m256i __W, __mmask8 __M, __m256i __X,...@@ -8131,17 +7804,15 @@ _mm256_mask_permutexvar_epi64 (__m256i __W, __mmask8 __M, __m256i __X,
81317804
8132#define _mm256_permutexvar_ps(A, B) _mm256_permutevar8x32_ps((B), (A))7805#define _mm256_permutexvar_ps(A, B) _mm256_permutevar8x32_ps((B), (A))
81337806
8134static __inline__ __m256 __DEFAULT_FN_ATTRS2567807static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8135_mm256_mask_permutexvar_ps(__m256 __W, __mmask8 __U, __m256i __X, __m256 __Y)7808_mm256_mask_permutexvar_ps(__m256 __W, __mmask8 __U, __m256i __X, __m256 __Y) {
8136{
8137 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,7809 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
8138 (__v8sf)_mm256_permutexvar_ps(__X, __Y),7810 (__v8sf)_mm256_permutexvar_ps(__X, __Y),
8139 (__v8sf)__W);7811 (__v8sf)__W);
8140}7812}
81417813
8142static __inline__ __m256 __DEFAULT_FN_ATTRS2567814static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8143_mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y)7815_mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y) {
8144{
8145 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,7816 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
8146 (__v8sf)_mm256_permutexvar_ps(__X, __Y),7817 (__v8sf)_mm256_permutexvar_ps(__X, __Y),
8147 (__v8sf)_mm256_setzero_ps());7818 (__v8sf)_mm256_setzero_ps());
...@@ -8149,18 +7820,16 @@ _mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y)...@@ -8149,18 +7820,16 @@ _mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y)
81497820
8150#define _mm256_permutexvar_epi32(A, B) _mm256_permutevar8x32_epi32((B), (A))7821#define _mm256_permutexvar_epi32(A, B) _mm256_permutevar8x32_epi32((B), (A))
81517822
8152static __inline__ __m256i __DEFAULT_FN_ATTRS2567823static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
8153_mm256_mask_permutexvar_epi32(__m256i __W, __mmask8 __M, __m256i __X,7824_mm256_mask_permutexvar_epi32(__m256i __W, __mmask8 __M, __m256i __X,
8154 __m256i __Y)7825 __m256i __Y) {
8155{
8156 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,7826 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
8157 (__v8si)_mm256_permutexvar_epi32(__X, __Y),7827 (__v8si)_mm256_permutexvar_epi32(__X, __Y),
8158 (__v8si)__W);7828 (__v8si)__W);
8159}7829}
81607830
8161static __inline__ __m256i __DEFAULT_FN_ATTRS2567831static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
8162_mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y)7832_mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y) {
8163{
8164 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,7833 return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M,
8165 (__v8si)_mm256_permutexvar_epi32(__X, __Y),7834 (__v8si)_mm256_permutexvar_epi32(__X, __Y),
8166 (__v8si)_mm256_setzero_si256());7835 (__v8si)_mm256_setzero_si256());
...@@ -8222,65 +7891,57 @@ _mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y)...@@ -8222,65 +7891,57 @@ _mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y)
8222 (__v4di)_mm256_alignr_epi64((A), (B), (imm)), \7891 (__v4di)_mm256_alignr_epi64((A), (B), (imm)), \
8223 (__v4di)_mm256_setzero_si256()))7892 (__v4di)_mm256_setzero_si256()))
82247893
8225static __inline__ __m128 __DEFAULT_FN_ATTRS1287894static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8226_mm_mask_movehdup_ps (__m128 __W, __mmask8 __U, __m128 __A)7895_mm_mask_movehdup_ps(__m128 __W, __mmask8 __U, __m128 __A) {
8227{
8228 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,7896 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
8229 (__v4sf)_mm_movehdup_ps(__A),7897 (__v4sf)_mm_movehdup_ps(__A),
8230 (__v4sf)__W);7898 (__v4sf)__W);
8231}7899}
82327900
8233static __inline__ __m128 __DEFAULT_FN_ATTRS1287901static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8234_mm_maskz_movehdup_ps (__mmask8 __U, __m128 __A)7902_mm_maskz_movehdup_ps(__mmask8 __U, __m128 __A) {
8235{
8236 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,7903 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
8237 (__v4sf)_mm_movehdup_ps(__A),7904 (__v4sf)_mm_movehdup_ps(__A),
8238 (__v4sf)_mm_setzero_ps());7905 (__v4sf)_mm_setzero_ps());
8239}7906}
82407907
8241static __inline__ __m256 __DEFAULT_FN_ATTRS2567908static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8242_mm256_mask_movehdup_ps (__m256 __W, __mmask8 __U, __m256 __A)7909_mm256_mask_movehdup_ps(__m256 __W, __mmask8 __U, __m256 __A) {
8243{
8244 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,7910 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
8245 (__v8sf)_mm256_movehdup_ps(__A),7911 (__v8sf)_mm256_movehdup_ps(__A),
8246 (__v8sf)__W);7912 (__v8sf)__W);
8247}7913}
82487914
8249static __inline__ __m256 __DEFAULT_FN_ATTRS2567915static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8250_mm256_maskz_movehdup_ps (__mmask8 __U, __m256 __A)7916_mm256_maskz_movehdup_ps(__mmask8 __U, __m256 __A) {
8251{
8252 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,7917 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
8253 (__v8sf)_mm256_movehdup_ps(__A),7918 (__v8sf)_mm256_movehdup_ps(__A),
8254 (__v8sf)_mm256_setzero_ps());7919 (__v8sf)_mm256_setzero_ps());
8255}7920}
82567921
8257static __inline__ __m128 __DEFAULT_FN_ATTRS1287922static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8258_mm_mask_moveldup_ps (__m128 __W, __mmask8 __U, __m128 __A)7923_mm_mask_moveldup_ps(__m128 __W, __mmask8 __U, __m128 __A) {
8259{
8260 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,7924 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
8261 (__v4sf)_mm_moveldup_ps(__A),7925 (__v4sf)_mm_moveldup_ps(__A),
8262 (__v4sf)__W);7926 (__v4sf)__W);
8263}7927}
82647928
8265static __inline__ __m128 __DEFAULT_FN_ATTRS1287929static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8266_mm_maskz_moveldup_ps (__mmask8 __U, __m128 __A)7930_mm_maskz_moveldup_ps(__mmask8 __U, __m128 __A) {
8267{
8268 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,7931 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
8269 (__v4sf)_mm_moveldup_ps(__A),7932 (__v4sf)_mm_moveldup_ps(__A),
8270 (__v4sf)_mm_setzero_ps());7933 (__v4sf)_mm_setzero_ps());
8271}7934}
82727935
8273static __inline__ __m256 __DEFAULT_FN_ATTRS2567936static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8274_mm256_mask_moveldup_ps (__m256 __W, __mmask8 __U, __m256 __A)7937_mm256_mask_moveldup_ps(__m256 __W, __mmask8 __U, __m256 __A) {
8275{
8276 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,7938 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
8277 (__v8sf)_mm256_moveldup_ps(__A),7939 (__v8sf)_mm256_moveldup_ps(__A),
8278 (__v8sf)__W);7940 (__v8sf)__W);
8279}7941}
82807942
8281static __inline__ __m256 __DEFAULT_FN_ATTRS2567943static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8282_mm256_maskz_moveldup_ps (__mmask8 __U, __m256 __A)7944_mm256_maskz_moveldup_ps(__mmask8 __U, __m256 __A) {
8283{
8284 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,7945 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
8285 (__v8sf)_mm256_moveldup_ps(__A),7946 (__v8sf)_mm256_moveldup_ps(__A),
8286 (__v8sf)_mm256_setzero_ps());7947 (__v8sf)_mm256_setzero_ps());
...@@ -8306,68 +7967,52 @@ _mm256_maskz_moveldup_ps (__mmask8 __U, __m256 __A)...@@ -8306,68 +7967,52 @@ _mm256_maskz_moveldup_ps (__mmask8 __U, __m256 __A)
8306 (__v4si)_mm_shuffle_epi32((A), (I)), \7967 (__v4si)_mm_shuffle_epi32((A), (I)), \
8307 (__v4si)_mm_setzero_si128()))7968 (__v4si)_mm_setzero_si128()))
83087969
8309static __inline__ __m128d __DEFAULT_FN_ATTRS1287970static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
8310_mm_mask_mov_pd (__m128d __W, __mmask8 __U, __m128d __A)7971_mm_mask_mov_pd(__m128d __W, __mmask8 __U, __m128d __A) {
8311{7972 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)__A,
8312 return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U,7973 (__v2df)__W);
8313 (__v2df) __A,
8314 (__v2df) __W);
8315}7974}
83167975
8317static __inline__ __m128d __DEFAULT_FN_ATTRS1287976static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
8318_mm_maskz_mov_pd (__mmask8 __U, __m128d __A)7977_mm_maskz_mov_pd(__mmask8 __U, __m128d __A) {
8319{7978 return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)__A,
8320 return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U,7979 (__v2df)_mm_setzero_pd());
8321 (__v2df) __A,
8322 (__v2df) _mm_setzero_pd ());
8323}7980}
83247981
8325static __inline__ __m256d __DEFAULT_FN_ATTRS2567982static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
8326_mm256_mask_mov_pd (__m256d __W, __mmask8 __U, __m256d __A)7983_mm256_mask_mov_pd(__m256d __W, __mmask8 __U, __m256d __A) {
8327{7984 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)__A,
8328 return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U,7985 (__v4df)__W);
8329 (__v4df) __A,
8330 (__v4df) __W);
8331}7986}
83327987
8333static __inline__ __m256d __DEFAULT_FN_ATTRS2567988static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
8334_mm256_maskz_mov_pd (__mmask8 __U, __m256d __A)7989_mm256_maskz_mov_pd(__mmask8 __U, __m256d __A) {
8335{7990 return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)__A,
8336 return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U,7991 (__v4df)_mm256_setzero_pd());
8337 (__v4df) __A,
8338 (__v4df) _mm256_setzero_pd ());
8339}7992}
83407993
8341static __inline__ __m128 __DEFAULT_FN_ATTRS1287994static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8342_mm_mask_mov_ps (__m128 __W, __mmask8 __U, __m128 __A)7995_mm_mask_mov_ps(__m128 __W, __mmask8 __U, __m128 __A) {
8343{7996 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)__A,
8344 return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U,7997 (__v4sf)__W);
8345 (__v4sf) __A,
8346 (__v4sf) __W);
8347}7998}
83487999
8349static __inline__ __m128 __DEFAULT_FN_ATTRS1288000static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
8350_mm_maskz_mov_ps (__mmask8 __U, __m128 __A)8001_mm_maskz_mov_ps(__mmask8 __U, __m128 __A) {
8351{8002 return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)__A,
8352 return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U,8003 (__v4sf)_mm_setzero_ps());
8353 (__v4sf) __A,
8354 (__v4sf) _mm_setzero_ps ());
8355}8004}
83568005
8357static __inline__ __m256 __DEFAULT_FN_ATTRS2568006static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8358_mm256_mask_mov_ps (__m256 __W, __mmask8 __U, __m256 __A)8007_mm256_mask_mov_ps(__m256 __W, __mmask8 __U, __m256 __A) {
8359{8008 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)__A,
8360 return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U,8009 (__v8sf)__W);
8361 (__v8sf) __A,
8362 (__v8sf) __W);
8363}8010}
83648011
8365static __inline__ __m256 __DEFAULT_FN_ATTRS2568012static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
8366_mm256_maskz_mov_ps (__mmask8 __U, __m256 __A)8013_mm256_maskz_mov_ps(__mmask8 __U, __m256 __A) {
8367{8014 return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)__A,
8368 return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U,8015 (__v8sf)_mm256_setzero_ps());
8369 (__v8sf) __A,
8370 (__v8sf) _mm256_setzero_ps ());
8371}8016}
83728017
8373static __inline__ __m128 __DEFAULT_FN_ATTRS1288018static __inline__ __m128 __DEFAULT_FN_ATTRS128
...@@ -8430,8 +8075,9 @@ _mm256_maskz_cvtph_ps (__mmask8 __U, __m128i __A)...@@ -8430,8 +8075,9 @@ _mm256_maskz_cvtph_ps (__mmask8 __U, __m128i __A)
8430#define _mm256_mask_cvtps_ph _mm256_mask_cvt_roundps_ph8075#define _mm256_mask_cvtps_ph _mm256_mask_cvt_roundps_ph
8431#define _mm256_maskz_cvtps_ph _mm256_maskz_cvt_roundps_ph8076#define _mm256_maskz_cvtps_ph _mm256_maskz_cvt_roundps_ph
84328077
8433
8434#undef __DEFAULT_FN_ATTRS1288078#undef __DEFAULT_FN_ATTRS128
8435#undef __DEFAULT_FN_ATTRS2568079#undef __DEFAULT_FN_ATTRS256
8080#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
8081#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
84368082
8437#endif /* __AVX512VLINTRIN_H */8083#endif /* __AVX512VLINTRIN_H */
lib/include/avx512vlvbmi2intrin.h+78-63
...@@ -17,13 +17,21 @@...@@ -17,13 +17,21 @@
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS128 \18#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \19 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512vl,avx512vbmi2,no-evex512"), \20 __target__("avx512vl,avx512vbmi2"), \
21 __min_vector_width__(128)))21 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \22#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \23 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512vl,avx512vbmi2,no-evex512"), \24 __target__("avx512vl,avx512vbmi2"), \
25 __min_vector_width__(256)))25 __min_vector_width__(256)))
2626
27#if defined(__cplusplus) && (__cplusplus >= 201103L)
28#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
29#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
30#else
31#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
32#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
33#endif
34
27static __inline__ __m128i __DEFAULT_FN_ATTRS12835static __inline__ __m128i __DEFAULT_FN_ATTRS128
28_mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D)36_mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D)
29{37{
...@@ -412,14 +420,14 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)...@@ -412,14 +420,14 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
412 (__v8hi)_mm_shrdi_epi16((A), (B), (I)), \420 (__v8hi)_mm_shrdi_epi16((A), (B), (I)), \
413 (__v8hi)_mm_setzero_si128()))421 (__v8hi)_mm_setzero_si128()))
414422
415static __inline__ __m256i __DEFAULT_FN_ATTRS256423static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
416_mm256_shldv_epi64(__m256i __A, __m256i __B, __m256i __C)424_mm256_shldv_epi64(__m256i __A, __m256i __B, __m256i __C)
417{425{
418 return (__m256i)__builtin_ia32_vpshldvq256((__v4di)__A, (__v4di)__B,426 return (__m256i)__builtin_elementwise_fshl((__v4du)__A, (__v4du)__B,
419 (__v4di)__C);427 (__v4du)__C);
420}428}
421429
422static __inline__ __m256i __DEFAULT_FN_ATTRS256430static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
423_mm256_mask_shldv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)431_mm256_mask_shldv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)
424{432{
425 return (__m256i)__builtin_ia32_selectq_256(__U,433 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -427,7 +435,7 @@ _mm256_mask_shldv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)...@@ -427,7 +435,7 @@ _mm256_mask_shldv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)
427 (__v4di)__A);435 (__v4di)__A);
428}436}
429437
430static __inline__ __m256i __DEFAULT_FN_ATTRS256438static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
431_mm256_maskz_shldv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)439_mm256_maskz_shldv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)
432{440{
433 return (__m256i)__builtin_ia32_selectq_256(__U,441 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -435,14 +443,14 @@ _mm256_maskz_shldv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)...@@ -435,14 +443,14 @@ _mm256_maskz_shldv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)
435 (__v4di)_mm256_setzero_si256());443 (__v4di)_mm256_setzero_si256());
436}444}
437445
438static __inline__ __m128i __DEFAULT_FN_ATTRS128446static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
439_mm_shldv_epi64(__m128i __A, __m128i __B, __m128i __C)447_mm_shldv_epi64(__m128i __A, __m128i __B, __m128i __C)
440{448{
441 return (__m128i)__builtin_ia32_vpshldvq128((__v2di)__A, (__v2di)__B,449 return (__m128i)__builtin_elementwise_fshl((__v2du)__A, (__v2du)__B,
442 (__v2di)__C);450 (__v2du)__C);
443}451}
444452
445static __inline__ __m128i __DEFAULT_FN_ATTRS128453static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
446_mm_mask_shldv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)454_mm_mask_shldv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
447{455{
448 return (__m128i)__builtin_ia32_selectq_128(__U,456 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -450,7 +458,7 @@ _mm_mask_shldv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)...@@ -450,7 +458,7 @@ _mm_mask_shldv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
450 (__v2di)__A);458 (__v2di)__A);
451}459}
452460
453static __inline__ __m128i __DEFAULT_FN_ATTRS128461static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
454_mm_maskz_shldv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)462_mm_maskz_shldv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
455{463{
456 return (__m128i)__builtin_ia32_selectq_128(__U,464 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -458,14 +466,14 @@ _mm_maskz_shldv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)...@@ -458,14 +466,14 @@ _mm_maskz_shldv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
458 (__v2di)_mm_setzero_si128());466 (__v2di)_mm_setzero_si128());
459}467}
460468
461static __inline__ __m256i __DEFAULT_FN_ATTRS256469static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
462_mm256_shldv_epi32(__m256i __A, __m256i __B, __m256i __C)470_mm256_shldv_epi32(__m256i __A, __m256i __B, __m256i __C)
463{471{
464 return (__m256i)__builtin_ia32_vpshldvd256((__v8si)__A, (__v8si)__B,472 return (__m256i)__builtin_elementwise_fshl((__v8su)__A, (__v8su)__B,
465 (__v8si)__C);473 (__v8su)__C);
466}474}
467475
468static __inline__ __m256i __DEFAULT_FN_ATTRS256476static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
469_mm256_mask_shldv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)477_mm256_mask_shldv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)
470{478{
471 return (__m256i)__builtin_ia32_selectd_256(__U,479 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -473,7 +481,7 @@ _mm256_mask_shldv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)...@@ -473,7 +481,7 @@ _mm256_mask_shldv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)
473 (__v8si)__A);481 (__v8si)__A);
474}482}
475483
476static __inline__ __m256i __DEFAULT_FN_ATTRS256484static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
477_mm256_maskz_shldv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)485_mm256_maskz_shldv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)
478{486{
479 return (__m256i)__builtin_ia32_selectd_256(__U,487 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -481,14 +489,14 @@ _mm256_maskz_shldv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)...@@ -481,14 +489,14 @@ _mm256_maskz_shldv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)
481 (__v8si)_mm256_setzero_si256());489 (__v8si)_mm256_setzero_si256());
482}490}
483491
484static __inline__ __m128i __DEFAULT_FN_ATTRS128492static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
485_mm_shldv_epi32(__m128i __A, __m128i __B, __m128i __C)493_mm_shldv_epi32(__m128i __A, __m128i __B, __m128i __C)
486{494{
487 return (__m128i)__builtin_ia32_vpshldvd128((__v4si)__A, (__v4si)__B,495 return (__m128i)__builtin_elementwise_fshl((__v4su)__A, (__v4su)__B,
488 (__v4si)__C);496 (__v4su)__C);
489}497}
490498
491static __inline__ __m128i __DEFAULT_FN_ATTRS128499static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
492_mm_mask_shldv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)500_mm_mask_shldv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
493{501{
494 return (__m128i)__builtin_ia32_selectd_128(__U,502 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -496,7 +504,7 @@ _mm_mask_shldv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)...@@ -496,7 +504,7 @@ _mm_mask_shldv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
496 (__v4si)__A);504 (__v4si)__A);
497}505}
498506
499static __inline__ __m128i __DEFAULT_FN_ATTRS128507static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
500_mm_maskz_shldv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)508_mm_maskz_shldv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
501{509{
502 return (__m128i)__builtin_ia32_selectd_128(__U,510 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -504,14 +512,14 @@ _mm_maskz_shldv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)...@@ -504,14 +512,14 @@ _mm_maskz_shldv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
504 (__v4si)_mm_setzero_si128());512 (__v4si)_mm_setzero_si128());
505}513}
506514
507static __inline__ __m256i __DEFAULT_FN_ATTRS256515static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
508_mm256_shldv_epi16(__m256i __A, __m256i __B, __m256i __C)516_mm256_shldv_epi16(__m256i __A, __m256i __B, __m256i __C)
509{517{
510 return (__m256i)__builtin_ia32_vpshldvw256((__v16hi)__A, (__v16hi)__B,518 return (__m256i)__builtin_elementwise_fshl((__v16hu)__A, (__v16hu)__B,
511 (__v16hi)__C);519 (__v16hu)__C);
512}520}
513521
514static __inline__ __m256i __DEFAULT_FN_ATTRS256522static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
515_mm256_mask_shldv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C)523_mm256_mask_shldv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C)
516{524{
517 return (__m256i)__builtin_ia32_selectw_256(__U,525 return (__m256i)__builtin_ia32_selectw_256(__U,
...@@ -519,7 +527,7 @@ _mm256_mask_shldv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C)...@@ -519,7 +527,7 @@ _mm256_mask_shldv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C)
519 (__v16hi)__A);527 (__v16hi)__A);
520}528}
521529
522static __inline__ __m256i __DEFAULT_FN_ATTRS256530static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
523_mm256_maskz_shldv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C)531_mm256_maskz_shldv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C)
524{532{
525 return (__m256i)__builtin_ia32_selectw_256(__U,533 return (__m256i)__builtin_ia32_selectw_256(__U,
...@@ -527,14 +535,14 @@ _mm256_maskz_shldv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C)...@@ -527,14 +535,14 @@ _mm256_maskz_shldv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C)
527 (__v16hi)_mm256_setzero_si256());535 (__v16hi)_mm256_setzero_si256());
528}536}
529537
530static __inline__ __m128i __DEFAULT_FN_ATTRS128538static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
531_mm_shldv_epi16(__m128i __A, __m128i __B, __m128i __C)539_mm_shldv_epi16(__m128i __A, __m128i __B, __m128i __C)
532{540{
533 return (__m128i)__builtin_ia32_vpshldvw128((__v8hi)__A, (__v8hi)__B,541 return (__m128i)__builtin_elementwise_fshl((__v8hu)__A, (__v8hu)__B,
534 (__v8hi)__C);542 (__v8hu)__C);
535}543}
536544
537static __inline__ __m128i __DEFAULT_FN_ATTRS128545static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
538_mm_mask_shldv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)546_mm_mask_shldv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
539{547{
540 return (__m128i)__builtin_ia32_selectw_128(__U,548 return (__m128i)__builtin_ia32_selectw_128(__U,
...@@ -542,7 +550,7 @@ _mm_mask_shldv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)...@@ -542,7 +550,7 @@ _mm_mask_shldv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
542 (__v8hi)__A);550 (__v8hi)__A);
543}551}
544552
545static __inline__ __m128i __DEFAULT_FN_ATTRS128553static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
546_mm_maskz_shldv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)554_mm_maskz_shldv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
547{555{
548 return (__m128i)__builtin_ia32_selectw_128(__U,556 return (__m128i)__builtin_ia32_selectw_128(__U,
...@@ -550,14 +558,15 @@ _mm_maskz_shldv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)...@@ -550,14 +558,15 @@ _mm_maskz_shldv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
550 (__v8hi)_mm_setzero_si128());558 (__v8hi)_mm_setzero_si128());
551}559}
552560
553static __inline__ __m256i __DEFAULT_FN_ATTRS256561static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
554_mm256_shrdv_epi64(__m256i __A, __m256i __B, __m256i __C)562_mm256_shrdv_epi64(__m256i __A, __m256i __B, __m256i __C)
555{563{
556 return (__m256i)__builtin_ia32_vpshrdvq256((__v4di)__A, (__v4di)__B,564 // Ops __A and __B are swapped.
557 (__v4di)__C);565 return (__m256i)__builtin_elementwise_fshr((__v4du)__B, (__v4du)__A,
566 (__v4du)__C);
558}567}
559568
560static __inline__ __m256i __DEFAULT_FN_ATTRS256569static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
561_mm256_mask_shrdv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)570_mm256_mask_shrdv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)
562{571{
563 return (__m256i)__builtin_ia32_selectq_256(__U,572 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -565,7 +574,7 @@ _mm256_mask_shrdv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)...@@ -565,7 +574,7 @@ _mm256_mask_shrdv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)
565 (__v4di)__A);574 (__v4di)__A);
566}575}
567576
568static __inline__ __m256i __DEFAULT_FN_ATTRS256577static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
569_mm256_maskz_shrdv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)578_mm256_maskz_shrdv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)
570{579{
571 return (__m256i)__builtin_ia32_selectq_256(__U,580 return (__m256i)__builtin_ia32_selectq_256(__U,
...@@ -573,14 +582,15 @@ _mm256_maskz_shrdv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)...@@ -573,14 +582,15 @@ _mm256_maskz_shrdv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)
573 (__v4di)_mm256_setzero_si256());582 (__v4di)_mm256_setzero_si256());
574}583}
575584
576static __inline__ __m128i __DEFAULT_FN_ATTRS128585static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
577_mm_shrdv_epi64(__m128i __A, __m128i __B, __m128i __C)586_mm_shrdv_epi64(__m128i __A, __m128i __B, __m128i __C)
578{587{
579 return (__m128i)__builtin_ia32_vpshrdvq128((__v2di)__A, (__v2di)__B,588 // Ops __A and __B are swapped.
580 (__v2di)__C);589 return (__m128i)__builtin_elementwise_fshr((__v2du)__B, (__v2du)__A,
590 (__v2du)__C);
581}591}
582592
583static __inline__ __m128i __DEFAULT_FN_ATTRS128593static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
584_mm_mask_shrdv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)594_mm_mask_shrdv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
585{595{
586 return (__m128i)__builtin_ia32_selectq_128(__U,596 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -588,7 +598,7 @@ _mm_mask_shrdv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)...@@ -588,7 +598,7 @@ _mm_mask_shrdv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
588 (__v2di)__A);598 (__v2di)__A);
589}599}
590600
591static __inline__ __m128i __DEFAULT_FN_ATTRS128601static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
592_mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)602_mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
593{603{
594 return (__m128i)__builtin_ia32_selectq_128(__U,604 return (__m128i)__builtin_ia32_selectq_128(__U,
...@@ -596,14 +606,15 @@ _mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)...@@ -596,14 +606,15 @@ _mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
596 (__v2di)_mm_setzero_si128());606 (__v2di)_mm_setzero_si128());
597}607}
598608
599static __inline__ __m256i __DEFAULT_FN_ATTRS256609static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
600_mm256_shrdv_epi32(__m256i __A, __m256i __B, __m256i __C)610_mm256_shrdv_epi32(__m256i __A, __m256i __B, __m256i __C)
601{611{
602 return (__m256i)__builtin_ia32_vpshrdvd256((__v8si)__A, (__v8si)__B,612 // Ops __A and __B are swapped.
603 (__v8si)__C);613 return (__m256i)__builtin_elementwise_fshr((__v8su)__B, (__v8su)__A,
614 (__v8su)__C);
604}615}
605616
606static __inline__ __m256i __DEFAULT_FN_ATTRS256617static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
607_mm256_mask_shrdv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)618_mm256_mask_shrdv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)
608{619{
609 return (__m256i)__builtin_ia32_selectd_256(__U,620 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -611,7 +622,7 @@ _mm256_mask_shrdv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)...@@ -611,7 +622,7 @@ _mm256_mask_shrdv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C)
611 (__v8si)__A);622 (__v8si)__A);
612}623}
613624
614static __inline__ __m256i __DEFAULT_FN_ATTRS256625static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
615_mm256_maskz_shrdv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)626_mm256_maskz_shrdv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)
616{627{
617 return (__m256i)__builtin_ia32_selectd_256(__U,628 return (__m256i)__builtin_ia32_selectd_256(__U,
...@@ -619,14 +630,15 @@ _mm256_maskz_shrdv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)...@@ -619,14 +630,15 @@ _mm256_maskz_shrdv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C)
619 (__v8si)_mm256_setzero_si256());630 (__v8si)_mm256_setzero_si256());
620}631}
621632
622static __inline__ __m128i __DEFAULT_FN_ATTRS128633static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
623_mm_shrdv_epi32(__m128i __A, __m128i __B, __m128i __C)634_mm_shrdv_epi32(__m128i __A, __m128i __B, __m128i __C)
624{635{
625 return (__m128i)__builtin_ia32_vpshrdvd128((__v4si)__A, (__v4si)__B,636 // Ops __A and __B are swapped.
626 (__v4si)__C);637 return (__m128i)__builtin_elementwise_fshr((__v4su)__B, (__v4su)__A,
638 (__v4su)__C);
627}639}
628640
629static __inline__ __m128i __DEFAULT_FN_ATTRS128641static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
630_mm_mask_shrdv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)642_mm_mask_shrdv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
631{643{
632 return (__m128i)__builtin_ia32_selectd_128(__U,644 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -634,7 +646,7 @@ _mm_mask_shrdv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)...@@ -634,7 +646,7 @@ _mm_mask_shrdv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
634 (__v4si)__A);646 (__v4si)__A);
635}647}
636648
637static __inline__ __m128i __DEFAULT_FN_ATTRS128649static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
638_mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)650_mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
639{651{
640 return (__m128i)__builtin_ia32_selectd_128(__U,652 return (__m128i)__builtin_ia32_selectd_128(__U,
...@@ -642,14 +654,15 @@ _mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)...@@ -642,14 +654,15 @@ _mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
642 (__v4si)_mm_setzero_si128());654 (__v4si)_mm_setzero_si128());
643}655}
644656
645static __inline__ __m256i __DEFAULT_FN_ATTRS256657static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
646_mm256_shrdv_epi16(__m256i __A, __m256i __B, __m256i __C)658_mm256_shrdv_epi16(__m256i __A, __m256i __B, __m256i __C)
647{659{
648 return (__m256i)__builtin_ia32_vpshrdvw256((__v16hi)__A, (__v16hi)__B,660 // Ops __A and __B are swapped.
649 (__v16hi)__C);661 return (__m256i)__builtin_elementwise_fshr((__v16hu)__B, (__v16hu)__A,
662 (__v16hu)__C);
650}663}
651664
652static __inline__ __m256i __DEFAULT_FN_ATTRS256665static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
653_mm256_mask_shrdv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C)666_mm256_mask_shrdv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C)
654{667{
655 return (__m256i)__builtin_ia32_selectw_256(__U,668 return (__m256i)__builtin_ia32_selectw_256(__U,
...@@ -657,7 +670,7 @@ _mm256_mask_shrdv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C)...@@ -657,7 +670,7 @@ _mm256_mask_shrdv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C)
657 (__v16hi)__A);670 (__v16hi)__A);
658}671}
659672
660static __inline__ __m256i __DEFAULT_FN_ATTRS256673static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
661_mm256_maskz_shrdv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C)674_mm256_maskz_shrdv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C)
662{675{
663 return (__m256i)__builtin_ia32_selectw_256(__U,676 return (__m256i)__builtin_ia32_selectw_256(__U,
...@@ -665,14 +678,15 @@ _mm256_maskz_shrdv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C)...@@ -665,14 +678,15 @@ _mm256_maskz_shrdv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C)
665 (__v16hi)_mm256_setzero_si256());678 (__v16hi)_mm256_setzero_si256());
666}679}
667680
668static __inline__ __m128i __DEFAULT_FN_ATTRS128681static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
669_mm_shrdv_epi16(__m128i __A, __m128i __B, __m128i __C)682_mm_shrdv_epi16(__m128i __A, __m128i __B, __m128i __C)
670{683{
671 return (__m128i)__builtin_ia32_vpshrdvw128((__v8hi)__A, (__v8hi)__B,684 // Ops __A and __B are swapped.
672 (__v8hi)__C);685 return (__m128i)__builtin_elementwise_fshr((__v8hu)__B, (__v8hu)__A,
686 (__v8hu)__C);
673}687}
674688
675static __inline__ __m128i __DEFAULT_FN_ATTRS128689static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
676_mm_mask_shrdv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)690_mm_mask_shrdv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
677{691{
678 return (__m128i)__builtin_ia32_selectw_128(__U,692 return (__m128i)__builtin_ia32_selectw_128(__U,
...@@ -680,7 +694,7 @@ _mm_mask_shrdv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)...@@ -680,7 +694,7 @@ _mm_mask_shrdv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C)
680 (__v8hi)__A);694 (__v8hi)__A);
681}695}
682696
683static __inline__ __m128i __DEFAULT_FN_ATTRS128697static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR
684_mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)698_mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
685{699{
686 return (__m128i)__builtin_ia32_selectw_128(__U,700 return (__m128i)__builtin_ia32_selectw_128(__U,
...@@ -688,8 +702,9 @@ _mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)...@@ -688,8 +702,9 @@ _mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C)
688 (__v8hi)_mm_setzero_si128());702 (__v8hi)_mm_setzero_si128());
689}703}
690704
691
692#undef __DEFAULT_FN_ATTRS128705#undef __DEFAULT_FN_ATTRS128
693#undef __DEFAULT_FN_ATTRS256706#undef __DEFAULT_FN_ATTRS256
707#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
708#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
694709
695#endif710#endif
lib/include/avx512vlvnniintrin.h+21-18
...@@ -17,11 +17,11 @@...@@ -17,11 +17,11 @@
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS128 \18#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \19 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512vl,avx512vnni,no-evex512"), \20 __target__("avx512vl,avx512vnni"), \
21 __min_vector_width__(128)))21 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \22#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \23 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512vl,avx512vnni,no-evex512"), \24 __target__("avx512vl,avx512vnni"), \
25 __min_vector_width__(256)))25 __min_vector_width__(256)))
2626
27/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with27/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with
...@@ -41,8 +41,8 @@...@@ -41,8 +41,8 @@
41/// ENDFOR41/// ENDFOR
42/// DST[MAX:256] := 042/// DST[MAX:256] := 0
43/// \endcode43/// \endcode
44#define _mm256_dpbusd_epi32(S, A, B) \44#define _mm256_dpbusd_epi32(S, A, B) \
45 ((__m256i)__builtin_ia32_vpdpbusd256((__v8si)(S), (__v8si)(A), (__v8si)(B)))45 ((__m256i)__builtin_ia32_vpdpbusd256((__v8si)(S), (__v32qu)(A), (__v32qi)(B)))
4646
47/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with47/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with
48/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed48/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed
...@@ -61,8 +61,9 @@...@@ -61,8 +61,9 @@
61/// ENDFOR61/// ENDFOR
62/// DST[MAX:256] := 062/// DST[MAX:256] := 0
63/// \endcode63/// \endcode
64#define _mm256_dpbusds_epi32(S, A, B) \64#define _mm256_dpbusds_epi32(S, A, B) \
65 ((__m256i)__builtin_ia32_vpdpbusds256((__v8si)(S), (__v8si)(A), (__v8si)(B)))65 ((__m256i)__builtin_ia32_vpdpbusds256((__v8si)(S), (__v32qu)(A), \
66 (__v32qi)(B)))
6667
67/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with68/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with
68/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit69/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit
...@@ -79,8 +80,8 @@...@@ -79,8 +80,8 @@
79/// ENDFOR80/// ENDFOR
80/// DST[MAX:256] := 081/// DST[MAX:256] := 0
81/// \endcode82/// \endcode
82#define _mm256_dpwssd_epi32(S, A, B) \83#define _mm256_dpwssd_epi32(S, A, B) \
83 ((__m256i)__builtin_ia32_vpdpwssd256((__v8si)(S), (__v8si)(A), (__v8si)(B)))84 ((__m256i)__builtin_ia32_vpdpwssd256((__v8si)(S), (__v16hi)(A), (__v16hi)(B)))
8485
85/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with86/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with
86/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit87/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit
...@@ -97,8 +98,9 @@...@@ -97,8 +98,9 @@
97/// ENDFOR98/// ENDFOR
98/// DST[MAX:256] := 099/// DST[MAX:256] := 0
99/// \endcode100/// \endcode
100#define _mm256_dpwssds_epi32(S, A, B) \101#define _mm256_dpwssds_epi32(S, A, B) \
101 ((__m256i)__builtin_ia32_vpdpwssds256((__v8si)(S), (__v8si)(A), (__v8si)(B)))102 ((__m256i)__builtin_ia32_vpdpwssds256((__v8si)(S), (__v16hi)(A), \
103 (__v16hi)(B)))
102104
103/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with105/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with
104/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed106/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed
...@@ -117,8 +119,8 @@...@@ -117,8 +119,8 @@
117/// ENDFOR119/// ENDFOR
118/// DST[MAX:128] := 0120/// DST[MAX:128] := 0
119/// \endcode121/// \endcode
120#define _mm_dpbusd_epi32(S, A, B) \122#define _mm_dpbusd_epi32(S, A, B) \
121 ((__m128i)__builtin_ia32_vpdpbusd128((__v4si)(S), (__v4si)(A), (__v4si)(B)))123 ((__m128i)__builtin_ia32_vpdpbusd128((__v4si)(S), (__v16qu)(A), (__v16qi)(B)))
122124
123/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with125/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with
124/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed126/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed
...@@ -137,8 +139,9 @@...@@ -137,8 +139,9 @@
137/// ENDFOR139/// ENDFOR
138/// DST[MAX:128] := 0140/// DST[MAX:128] := 0
139/// \endcode141/// \endcode
140#define _mm_dpbusds_epi32(S, A, B) \142#define _mm_dpbusds_epi32(S, A, B) \
141 ((__m128i)__builtin_ia32_vpdpbusds128((__v4si)(S), (__v4si)(A), (__v4si)(B)))143 ((__m128i)__builtin_ia32_vpdpbusds128((__v4si)(S), (__v16qu)(A), \
144 (__v16qi)(B)))
142145
143/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with146/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with
144/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit147/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit
...@@ -155,8 +158,8 @@...@@ -155,8 +158,8 @@
155/// ENDFOR158/// ENDFOR
156/// DST[MAX:128] := 0159/// DST[MAX:128] := 0
157/// \endcode160/// \endcode
158#define _mm_dpwssd_epi32(S, A, B) \161#define _mm_dpwssd_epi32(S, A, B) \
159 ((__m128i)__builtin_ia32_vpdpwssd128((__v4si)(S), (__v4si)(A), (__v4si)(B)))162 ((__m128i)__builtin_ia32_vpdpwssd128((__v4si)(S), (__v8hi)(A), (__v8hi)(B)))
160163
161/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with164/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with
162/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit165/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit
...@@ -173,8 +176,8 @@...@@ -173,8 +176,8 @@
173/// ENDFOR176/// ENDFOR
174/// DST[MAX:128] := 0177/// DST[MAX:128] := 0
175/// \endcode178/// \endcode
176#define _mm_dpwssds_epi32(S, A, B) \179#define _mm_dpwssds_epi32(S, A, B) \
177 ((__m128i)__builtin_ia32_vpdpwssds128((__v4si)(S), (__v4si)(A), (__v4si)(B)))180 ((__m128i)__builtin_ia32_vpdpwssds128((__v4si)(S), (__v8hi)(A), (__v8hi)(B)))
178181
179static __inline__ __m256i __DEFAULT_FN_ATTRS256182static __inline__ __m256i __DEFAULT_FN_ATTRS256
180_mm256_mask_dpbusd_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)183_mm256_mask_dpbusd_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
lib/include/avx512vlvp2intersectintrin.h+2-2
...@@ -30,12 +30,12 @@...@@ -30,12 +30,12 @@
3030
31#define __DEFAULT_FN_ATTRS128 \31#define __DEFAULT_FN_ATTRS128 \
32 __attribute__((__always_inline__, __nodebug__, \32 __attribute__((__always_inline__, __nodebug__, \
33 __target__("avx512vl,avx512vp2intersect,no-evex512"), \33 __target__("avx512vl,avx512vp2intersect"), \
34 __min_vector_width__(128)))34 __min_vector_width__(128)))
3535
36#define __DEFAULT_FN_ATTRS256 \36#define __DEFAULT_FN_ATTRS256 \
37 __attribute__((__always_inline__, __nodebug__, \37 __attribute__((__always_inline__, __nodebug__, \
38 __target__("avx512vl,avx512vp2intersect,no-evex512"), \38 __target__("avx512vl,avx512vp2intersect"), \
39 __min_vector_width__(256)))39 __min_vector_width__(256)))
40/// Store, in an even/odd pair of mask registers, the indicators of the40/// Store, in an even/odd pair of mask registers, the indicators of the
41/// locations of value matches between dwords in operands __a and __b.41/// locations of value matches between dwords in operands __a and __b.
lib/include/avx512vnniintrin.h+10-10
...@@ -16,14 +16,14 @@...@@ -16,14 +16,14 @@
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS \18#define __DEFAULT_FN_ATTRS \
19 __attribute__((__always_inline__, __nodebug__, \19 __attribute__((__always_inline__, __nodebug__, __target__("avx512vnni"), \
20 __target__("avx512vnni,evex512"), __min_vector_width__(512)))20 __min_vector_width__(512)))
2121
22static __inline__ __m512i __DEFAULT_FN_ATTRS22static __inline__ __m512i __DEFAULT_FN_ATTRS
23_mm512_dpbusd_epi32(__m512i __S, __m512i __A, __m512i __B)23_mm512_dpbusd_epi32(__m512i __S, __m512i __A, __m512i __B)
24{24{
25 return (__m512i)__builtin_ia32_vpdpbusd512((__v16si)__S, (__v16si)__A,25 return (__m512i)__builtin_ia32_vpdpbusd512((__v16si)__S, (__v64qu)__A,
26 (__v16si)__B);26 (__v64qi)__B);
27}27}
2828
29static __inline__ __m512i __DEFAULT_FN_ATTRS29static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -45,8 +45,8 @@ _mm512_maskz_dpbusd_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B)...@@ -45,8 +45,8 @@ _mm512_maskz_dpbusd_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B)
45static __inline__ __m512i __DEFAULT_FN_ATTRS45static __inline__ __m512i __DEFAULT_FN_ATTRS
46_mm512_dpbusds_epi32(__m512i __S, __m512i __A, __m512i __B)46_mm512_dpbusds_epi32(__m512i __S, __m512i __A, __m512i __B)
47{47{
48 return (__m512i)__builtin_ia32_vpdpbusds512((__v16si)__S, (__v16si)__A,48 return (__m512i)__builtin_ia32_vpdpbusds512((__v16si)__S, (__v64qu)__A,
49 (__v16si)__B);49 (__v64qi)__B);
50}50}
5151
52static __inline__ __m512i __DEFAULT_FN_ATTRS52static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -68,8 +68,8 @@ _mm512_maskz_dpbusds_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B)...@@ -68,8 +68,8 @@ _mm512_maskz_dpbusds_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B)
68static __inline__ __m512i __DEFAULT_FN_ATTRS68static __inline__ __m512i __DEFAULT_FN_ATTRS
69_mm512_dpwssd_epi32(__m512i __S, __m512i __A, __m512i __B)69_mm512_dpwssd_epi32(__m512i __S, __m512i __A, __m512i __B)
70{70{
71 return (__m512i)__builtin_ia32_vpdpwssd512((__v16si)__S, (__v16si)__A,71 return (__m512i)__builtin_ia32_vpdpwssd512((__v16si)__S, (__v32hi)__A,
72 (__v16si)__B);72 (__v32hi)__B);
73}73}
7474
75static __inline__ __m512i __DEFAULT_FN_ATTRS75static __inline__ __m512i __DEFAULT_FN_ATTRS
...@@ -91,8 +91,8 @@ _mm512_maskz_dpwssd_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B)...@@ -91,8 +91,8 @@ _mm512_maskz_dpwssd_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B)
91static __inline__ __m512i __DEFAULT_FN_ATTRS91static __inline__ __m512i __DEFAULT_FN_ATTRS
92_mm512_dpwssds_epi32(__m512i __S, __m512i __A, __m512i __B)92_mm512_dpwssds_epi32(__m512i __S, __m512i __A, __m512i __B)
93{93{
94 return (__m512i)__builtin_ia32_vpdpwssds512((__v16si)__S, (__v16si)__A,94 return (__m512i)__builtin_ia32_vpdpwssds512((__v16si)__S, (__v32hi)__A,
95 (__v16si)__B);95 (__v32hi)__B);
96}96}
9797
98static __inline__ __m512i __DEFAULT_FN_ATTRS98static __inline__ __m512i __DEFAULT_FN_ATTRS
lib/include/avx512vp2intersectintrin.h+1-2
...@@ -30,8 +30,7 @@...@@ -30,8 +30,7 @@
3030
31#define __DEFAULT_FN_ATTRS \31#define __DEFAULT_FN_ATTRS \
32 __attribute__((__always_inline__, __nodebug__, \32 __attribute__((__always_inline__, __nodebug__, \
33 __target__("avx512vp2intersect,evex512"), \33 __target__("avx512vp2intersect"), __min_vector_width__(512)))
34 __min_vector_width__(512)))
3534
36/// Store, in an even/odd pair of mask registers, the indicators of the35/// Store, in an even/odd pair of mask registers, the indicators of the
37/// locations of value matches between dwords in operands __a and __b.36/// locations of value matches between dwords in operands __a and __b.
lib/include/avx512vpopcntdqintrin.h+8-10
...@@ -16,19 +16,18 @@...@@ -16,19 +16,18 @@
16#define __AVX512VPOPCNTDQINTRIN_H16#define __AVX512VPOPCNTDQINTRIN_H
1717
18/* Define the default attributes for the functions in this file. */18/* Define the default attributes for the functions in this file. */
19#if defined(__cplusplus) && (__cplusplus >= 201103L)
19#define __DEFAULT_FN_ATTRS \20#define __DEFAULT_FN_ATTRS \
20 __attribute__((__always_inline__, __nodebug__, \21 __attribute__((__always_inline__, __nodebug__, \
21 __target__("avx512vpopcntdq,evex512"), \22 __target__("avx512vpopcntdq"), \
22 __min_vector_width__(512)))23 __min_vector_width__(512))) constexpr
23
24#if defined(__cplusplus) && (__cplusplus >= 201103L)
25#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
26#else24#else
27#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS25#define __DEFAULT_FN_ATTRS \
26 __attribute__((__always_inline__, __nodebug__, \
27 __target__("avx512vpopcntdq"), __min_vector_width__(512)))
28#endif28#endif
2929
30static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR30static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi64(__m512i __A) {
31_mm512_popcnt_epi64(__m512i __A) {
32 return (__m512i)__builtin_elementwise_popcount((__v8du)__A);31 return (__m512i)__builtin_elementwise_popcount((__v8du)__A);
33}32}
3433
...@@ -43,8 +42,7 @@ _mm512_maskz_popcnt_epi64(__mmask8 __U, __m512i __A) {...@@ -43,8 +42,7 @@ _mm512_maskz_popcnt_epi64(__mmask8 __U, __m512i __A) {
43 return _mm512_mask_popcnt_epi64((__m512i)_mm512_setzero_si512(), __U, __A);42 return _mm512_mask_popcnt_epi64((__m512i)_mm512_setzero_si512(), __U, __A);
44}43}
4544
46static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR45static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi32(__m512i __A) {
47_mm512_popcnt_epi32(__m512i __A) {
48 return (__m512i)__builtin_elementwise_popcount((__v16su)__A);46 return (__m512i)__builtin_elementwise_popcount((__v16su)__A);
49}47}
5048
lib/include/avx512vpopcntdqvlintrin.h+17-15
...@@ -16,25 +16,28 @@...@@ -16,25 +16,28 @@
16#define __AVX512VPOPCNTDQVLINTRIN_H16#define __AVX512VPOPCNTDQVLINTRIN_H
1717
18/* Define the default attributes for the functions in this file. */18/* Define the default attributes for the functions in this file. */
19
20#if defined(__cplusplus) && (__cplusplus >= 201103L)
21#define __DEFAULT_FN_ATTRS128 \
22 __attribute__((__always_inline__, __nodebug__, \
23 __target__("avx512vpopcntdq,avx512vl"), \
24 __min_vector_width__(128))) constexpr
25#define __DEFAULT_FN_ATTRS256 \
26 __attribute__((__always_inline__, __nodebug__, \
27 __target__("avx512vpopcntdq,avx512vl"), \
28 __min_vector_width__(256))) constexpr
29#else
19#define __DEFAULT_FN_ATTRS128 \30#define __DEFAULT_FN_ATTRS128 \
20 __attribute__((__always_inline__, __nodebug__, \31 __attribute__((__always_inline__, __nodebug__, \
21 __target__("avx512vpopcntdq,avx512vl,no-evex512"), \32 __target__("avx512vpopcntdq,avx512vl"), \
22 __min_vector_width__(128)))33 __min_vector_width__(128)))
23#define __DEFAULT_FN_ATTRS256 \34#define __DEFAULT_FN_ATTRS256 \
24 __attribute__((__always_inline__, __nodebug__, \35 __attribute__((__always_inline__, __nodebug__, \
25 __target__("avx512vpopcntdq,avx512vl,no-evex512"), \36 __target__("avx512vpopcntdq,avx512vl"), \
26 __min_vector_width__(256)))37 __min_vector_width__(256)))
27
28#if defined(__cplusplus) && (__cplusplus >= 201103L)
29#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
30#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
31#else
32#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
33#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
34#endif38#endif
3539
36static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR40static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_popcnt_epi64(__m128i __A) {
37_mm_popcnt_epi64(__m128i __A) {
38 return (__m128i)__builtin_elementwise_popcount((__v2du)__A);41 return (__m128i)__builtin_elementwise_popcount((__v2du)__A);
39}42}
4043
...@@ -49,8 +52,7 @@ _mm_maskz_popcnt_epi64(__mmask8 __U, __m128i __A) {...@@ -49,8 +52,7 @@ _mm_maskz_popcnt_epi64(__mmask8 __U, __m128i __A) {
49 return _mm_mask_popcnt_epi64((__m128i)_mm_setzero_si128(), __U, __A);52 return _mm_mask_popcnt_epi64((__m128i)_mm_setzero_si128(), __U, __A);
50}53}
5154
52static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR55static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_popcnt_epi32(__m128i __A) {
53_mm_popcnt_epi32(__m128i __A) {
54 return (__m128i)__builtin_elementwise_popcount((__v4su)__A);56 return (__m128i)__builtin_elementwise_popcount((__v4su)__A);
55}57}
5658
...@@ -65,7 +67,7 @@ _mm_maskz_popcnt_epi32(__mmask8 __U, __m128i __A) {...@@ -65,7 +67,7 @@ _mm_maskz_popcnt_epi32(__mmask8 __U, __m128i __A) {
65 return _mm_mask_popcnt_epi32((__m128i)_mm_setzero_si128(), __U, __A);67 return _mm_mask_popcnt_epi32((__m128i)_mm_setzero_si128(), __U, __A);
66}68}
6769
68static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR70static __inline__ __m256i __DEFAULT_FN_ATTRS256
69_mm256_popcnt_epi64(__m256i __A) {71_mm256_popcnt_epi64(__m256i __A) {
70 return (__m256i)__builtin_elementwise_popcount((__v4du)__A);72 return (__m256i)__builtin_elementwise_popcount((__v4du)__A);
71}73}
...@@ -81,7 +83,7 @@ _mm256_maskz_popcnt_epi64(__mmask8 __U, __m256i __A) {...@@ -81,7 +83,7 @@ _mm256_maskz_popcnt_epi64(__mmask8 __U, __m256i __A) {
81 return _mm256_mask_popcnt_epi64((__m256i)_mm256_setzero_si256(), __U, __A);83 return _mm256_mask_popcnt_epi64((__m256i)_mm256_setzero_si256(), __U, __A);
82}84}
8385
84static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR86static __inline__ __m256i __DEFAULT_FN_ATTRS256
85_mm256_popcnt_epi32(__m256i __A) {87_mm256_popcnt_epi32(__m256i __A) {
86 return (__m256i)__builtin_elementwise_popcount((__v8su)__A);88 return (__m256i)__builtin_elementwise_popcount((__v8su)__A);
87}89}
lib/include/avxifmaintrin.h+16
...@@ -15,12 +15,28 @@...@@ -15,12 +15,28 @@
15#define __AVXIFMAINTRIN_H15#define __AVXIFMAINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#if defined(__cplusplus) && (__cplusplus >= 201103L)
19#define __DEFAULT_FN_ATTRS128 \
20 __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \
21 __min_vector_width__(128))) constexpr
22#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \
24 __min_vector_width__(256))) constexpr
25#else
18#define __DEFAULT_FN_ATTRS128 \26#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \27 __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \
20 __min_vector_width__(128)))28 __min_vector_width__(128)))
21#define __DEFAULT_FN_ATTRS256 \29#define __DEFAULT_FN_ATTRS256 \
22 __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \30 __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \
23 __min_vector_width__(256)))31 __min_vector_width__(256)))
32#endif
33
34#if !defined(__AVX512IFMA__) && defined(__AVXIFMA__)
35#define _mm_madd52hi_epu64(X, Y, Z) _mm_madd52hi_avx_epu64(X, Y, Z)
36#define _mm_madd52lo_epu64(X, Y, Z) _mm_madd52lo_avx_epu64(X, Y, Z)
37#define _mm256_madd52hi_epu64(X, Y, Z) _mm256_madd52hi_avx_epu64(X, Y, Z)
38#define _mm256_madd52lo_epu64(X, Y, Z) _mm256_madd52lo_avx_epu64(X, Y, Z)
39#endif
2440
25// must vex-encoding41// must vex-encoding
2642
lib/include/avxintrin.h+165-241
...@@ -50,28 +50,19 @@ typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32)));...@@ -50,28 +50,19 @@ typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32)));
50#endif50#endif
5151
52/* Define the default attributes for the functions in this file. */52/* Define the default attributes for the functions in this file. */
53#if defined(__EVEX512__) && !defined(__AVX10_1_512__)
54#define __DEFAULT_FN_ATTRS \
55 __attribute__((__always_inline__, __nodebug__, __target__("avx,no-evex512"), \
56 __min_vector_width__(256)))
57#define __DEFAULT_FN_ATTRS128 \
58 __attribute__((__always_inline__, __nodebug__, __target__("avx,no-evex512"), \
59 __min_vector_width__(128)))
60#else
61#define __DEFAULT_FN_ATTRS \53#define __DEFAULT_FN_ATTRS \
62 __attribute__((__always_inline__, __nodebug__, __target__("avx"), \54 __attribute__((__always_inline__, __nodebug__, __target__("avx"), \
63 __min_vector_width__(256)))55 __min_vector_width__(256)))
64#define __DEFAULT_FN_ATTRS128 \56#define __DEFAULT_FN_ATTRS128 \
65 __attribute__((__always_inline__, __nodebug__, __target__("avx"), \57 __attribute__((__always_inline__, __nodebug__, __target__("avx"), \
66 __min_vector_width__(128)))58 __min_vector_width__(128)))
67#endif
6859
69#if defined(__cplusplus) && (__cplusplus >= 201103L)60#if defined(__cplusplus) && (__cplusplus >= 201103L)
70#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr61#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
71#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr62#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
72#else63#else
73#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS12864#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
74#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS65#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
75#endif66#endif
7667
77/* Arithmetic */68/* Arithmetic */
...@@ -87,9 +78,8 @@ typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32)));...@@ -87,9 +78,8 @@ typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32)));
87/// A 256-bit vector of [4 x double] containing one of the source operands.78/// A 256-bit vector of [4 x double] containing one of the source operands.
88/// \returns A 256-bit vector of [4 x double] containing the sums of both79/// \returns A 256-bit vector of [4 x double] containing the sums of both
89/// operands.80/// operands.
90static __inline __m256d __DEFAULT_FN_ATTRS81static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
91_mm256_add_pd(__m256d __a, __m256d __b)82_mm256_add_pd(__m256d __a, __m256d __b) {
92{
93 return (__m256d)((__v4df)__a+(__v4df)__b);83 return (__m256d)((__v4df)__a+(__v4df)__b);
94}84}
9585
...@@ -105,9 +95,8 @@ _mm256_add_pd(__m256d __a, __m256d __b)...@@ -105,9 +95,8 @@ _mm256_add_pd(__m256d __a, __m256d __b)
105/// A 256-bit vector of [8 x float] containing one of the source operands.95/// A 256-bit vector of [8 x float] containing one of the source operands.
106/// \returns A 256-bit vector of [8 x float] containing the sums of both96/// \returns A 256-bit vector of [8 x float] containing the sums of both
107/// operands.97/// operands.
108static __inline __m256 __DEFAULT_FN_ATTRS98static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_add_ps(__m256 __a,
109_mm256_add_ps(__m256 __a, __m256 __b)99 __m256 __b) {
110{
111 return (__m256)((__v8sf)__a+(__v8sf)__b);100 return (__m256)((__v8sf)__a+(__v8sf)__b);
112}101}
113102
...@@ -123,9 +112,8 @@ _mm256_add_ps(__m256 __a, __m256 __b)...@@ -123,9 +112,8 @@ _mm256_add_ps(__m256 __a, __m256 __b)
123/// A 256-bit vector of [4 x double] containing the subtrahend.112/// A 256-bit vector of [4 x double] containing the subtrahend.
124/// \returns A 256-bit vector of [4 x double] containing the differences between113/// \returns A 256-bit vector of [4 x double] containing the differences between
125/// both operands.114/// both operands.
126static __inline __m256d __DEFAULT_FN_ATTRS115static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
127_mm256_sub_pd(__m256d __a, __m256d __b)116_mm256_sub_pd(__m256d __a, __m256d __b) {
128{
129 return (__m256d)((__v4df)__a-(__v4df)__b);117 return (__m256d)((__v4df)__a-(__v4df)__b);
130}118}
131119
...@@ -141,9 +129,8 @@ _mm256_sub_pd(__m256d __a, __m256d __b)...@@ -141,9 +129,8 @@ _mm256_sub_pd(__m256d __a, __m256d __b)
141/// A 256-bit vector of [8 x float] containing the subtrahend.129/// A 256-bit vector of [8 x float] containing the subtrahend.
142/// \returns A 256-bit vector of [8 x float] containing the differences between130/// \returns A 256-bit vector of [8 x float] containing the differences between
143/// both operands.131/// both operands.
144static __inline __m256 __DEFAULT_FN_ATTRS132static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_sub_ps(__m256 __a,
145_mm256_sub_ps(__m256 __a, __m256 __b)133 __m256 __b) {
146{
147 return (__m256)((__v8sf)__a-(__v8sf)__b);134 return (__m256)((__v8sf)__a-(__v8sf)__b);
148}135}
149136
...@@ -160,9 +147,8 @@ _mm256_sub_ps(__m256 __a, __m256 __b)...@@ -160,9 +147,8 @@ _mm256_sub_ps(__m256 __a, __m256 __b)
160/// A 256-bit vector of [4 x double] containing the right source operand.147/// A 256-bit vector of [4 x double] containing the right source operand.
161/// \returns A 256-bit vector of [4 x double] containing the alternating sums148/// \returns A 256-bit vector of [4 x double] containing the alternating sums
162/// and differences between both operands.149/// and differences between both operands.
163static __inline __m256d __DEFAULT_FN_ATTRS150static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
164_mm256_addsub_pd(__m256d __a, __m256d __b)151_mm256_addsub_pd(__m256d __a, __m256d __b) {
165{
166 return (__m256d)__builtin_ia32_addsubpd256((__v4df)__a, (__v4df)__b);152 return (__m256d)__builtin_ia32_addsubpd256((__v4df)__a, (__v4df)__b);
167}153}
168154
...@@ -179,9 +165,8 @@ _mm256_addsub_pd(__m256d __a, __m256d __b)...@@ -179,9 +165,8 @@ _mm256_addsub_pd(__m256d __a, __m256d __b)
179/// A 256-bit vector of [8 x float] containing the right source operand.165/// A 256-bit vector of [8 x float] containing the right source operand.
180/// \returns A 256-bit vector of [8 x float] containing the alternating sums and166/// \returns A 256-bit vector of [8 x float] containing the alternating sums and
181/// differences between both operands.167/// differences between both operands.
182static __inline __m256 __DEFAULT_FN_ATTRS168static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
183_mm256_addsub_ps(__m256 __a, __m256 __b)169_mm256_addsub_ps(__m256 __a, __m256 __b) {
184{
185 return (__m256)__builtin_ia32_addsubps256((__v8sf)__a, (__v8sf)__b);170 return (__m256)__builtin_ia32_addsubps256((__v8sf)__a, (__v8sf)__b);
186}171}
187172
...@@ -197,9 +182,8 @@ _mm256_addsub_ps(__m256 __a, __m256 __b)...@@ -197,9 +182,8 @@ _mm256_addsub_ps(__m256 __a, __m256 __b)
197/// A 256-bit vector of [4 x double] containing the divisor.182/// A 256-bit vector of [4 x double] containing the divisor.
198/// \returns A 256-bit vector of [4 x double] containing the quotients of both183/// \returns A 256-bit vector of [4 x double] containing the quotients of both
199/// operands.184/// operands.
200static __inline __m256d __DEFAULT_FN_ATTRS185static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
201_mm256_div_pd(__m256d __a, __m256d __b)186_mm256_div_pd(__m256d __a, __m256d __b) {
202{
203 return (__m256d)((__v4df)__a/(__v4df)__b);187 return (__m256d)((__v4df)__a/(__v4df)__b);
204}188}
205189
...@@ -215,9 +199,8 @@ _mm256_div_pd(__m256d __a, __m256d __b)...@@ -215,9 +199,8 @@ _mm256_div_pd(__m256d __a, __m256d __b)
215/// A 256-bit vector of [8 x float] containing the divisor.199/// A 256-bit vector of [8 x float] containing the divisor.
216/// \returns A 256-bit vector of [8 x float] containing the quotients of both200/// \returns A 256-bit vector of [8 x float] containing the quotients of both
217/// operands.201/// operands.
218static __inline __m256 __DEFAULT_FN_ATTRS202static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_div_ps(__m256 __a,
219_mm256_div_ps(__m256 __a, __m256 __b)203 __m256 __b) {
220{
221 return (__m256)((__v8sf)__a/(__v8sf)__b);204 return (__m256)((__v8sf)__a/(__v8sf)__b);
222}205}
223206
...@@ -236,9 +219,8 @@ _mm256_div_ps(__m256 __a, __m256 __b)...@@ -236,9 +219,8 @@ _mm256_div_ps(__m256 __a, __m256 __b)
236/// A 256-bit vector of [4 x double] containing one of the operands.219/// A 256-bit vector of [4 x double] containing one of the operands.
237/// \returns A 256-bit vector of [4 x double] containing the maximum values220/// \returns A 256-bit vector of [4 x double] containing the maximum values
238/// between both operands.221/// between both operands.
239static __inline __m256d __DEFAULT_FN_ATTRS222static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
240_mm256_max_pd(__m256d __a, __m256d __b)223_mm256_max_pd(__m256d __a, __m256d __b) {
241{
242 return (__m256d)__builtin_ia32_maxpd256((__v4df)__a, (__v4df)__b);224 return (__m256d)__builtin_ia32_maxpd256((__v4df)__a, (__v4df)__b);
243}225}
244226
...@@ -257,9 +239,8 @@ _mm256_max_pd(__m256d __a, __m256d __b)...@@ -257,9 +239,8 @@ _mm256_max_pd(__m256d __a, __m256d __b)
257/// A 256-bit vector of [8 x float] containing one of the operands.239/// A 256-bit vector of [8 x float] containing one of the operands.
258/// \returns A 256-bit vector of [8 x float] containing the maximum values240/// \returns A 256-bit vector of [8 x float] containing the maximum values
259/// between both operands.241/// between both operands.
260static __inline __m256 __DEFAULT_FN_ATTRS242static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_max_ps(__m256 __a,
261_mm256_max_ps(__m256 __a, __m256 __b)243 __m256 __b) {
262{
263 return (__m256)__builtin_ia32_maxps256((__v8sf)__a, (__v8sf)__b);244 return (__m256)__builtin_ia32_maxps256((__v8sf)__a, (__v8sf)__b);
264}245}
265246
...@@ -278,9 +259,8 @@ _mm256_max_ps(__m256 __a, __m256 __b)...@@ -278,9 +259,8 @@ _mm256_max_ps(__m256 __a, __m256 __b)
278/// A 256-bit vector of [4 x double] containing one of the operands.259/// A 256-bit vector of [4 x double] containing one of the operands.
279/// \returns A 256-bit vector of [4 x double] containing the minimum values260/// \returns A 256-bit vector of [4 x double] containing the minimum values
280/// between both operands.261/// between both operands.
281static __inline __m256d __DEFAULT_FN_ATTRS262static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
282_mm256_min_pd(__m256d __a, __m256d __b)263_mm256_min_pd(__m256d __a, __m256d __b) {
283{
284 return (__m256d)__builtin_ia32_minpd256((__v4df)__a, (__v4df)__b);264 return (__m256d)__builtin_ia32_minpd256((__v4df)__a, (__v4df)__b);
285}265}
286266
...@@ -299,9 +279,8 @@ _mm256_min_pd(__m256d __a, __m256d __b)...@@ -299,9 +279,8 @@ _mm256_min_pd(__m256d __a, __m256d __b)
299/// A 256-bit vector of [8 x float] containing one of the operands.279/// A 256-bit vector of [8 x float] containing one of the operands.
300/// \returns A 256-bit vector of [8 x float] containing the minimum values280/// \returns A 256-bit vector of [8 x float] containing the minimum values
301/// between both operands.281/// between both operands.
302static __inline __m256 __DEFAULT_FN_ATTRS282static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_min_ps(__m256 __a,
303_mm256_min_ps(__m256 __a, __m256 __b)283 __m256 __b) {
304{
305 return (__m256)__builtin_ia32_minps256((__v8sf)__a, (__v8sf)__b);284 return (__m256)__builtin_ia32_minps256((__v8sf)__a, (__v8sf)__b);
306}285}
307286
...@@ -317,9 +296,8 @@ _mm256_min_ps(__m256 __a, __m256 __b)...@@ -317,9 +296,8 @@ _mm256_min_ps(__m256 __a, __m256 __b)
317/// A 256-bit vector of [4 x double] containing one of the operands.296/// A 256-bit vector of [4 x double] containing one of the operands.
318/// \returns A 256-bit vector of [4 x double] containing the products of both297/// \returns A 256-bit vector of [4 x double] containing the products of both
319/// operands.298/// operands.
320static __inline __m256d __DEFAULT_FN_ATTRS299static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
321_mm256_mul_pd(__m256d __a, __m256d __b)300_mm256_mul_pd(__m256d __a, __m256d __b) {
322{
323 return (__m256d)((__v4df)__a * (__v4df)__b);301 return (__m256d)((__v4df)__a * (__v4df)__b);
324}302}
325303
...@@ -335,9 +313,8 @@ _mm256_mul_pd(__m256d __a, __m256d __b)...@@ -335,9 +313,8 @@ _mm256_mul_pd(__m256d __a, __m256d __b)
335/// A 256-bit vector of [8 x float] containing one of the operands.313/// A 256-bit vector of [8 x float] containing one of the operands.
336/// \returns A 256-bit vector of [8 x float] containing the products of both314/// \returns A 256-bit vector of [8 x float] containing the products of both
337/// operands.315/// operands.
338static __inline __m256 __DEFAULT_FN_ATTRS316static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_mul_ps(__m256 __a,
339_mm256_mul_ps(__m256 __a, __m256 __b)317 __m256 __b) {
340{
341 return (__m256)((__v8sf)__a * (__v8sf)__b);318 return (__m256)((__v8sf)__a * (__v8sf)__b);
342}319}
343320
...@@ -352,10 +329,8 @@ _mm256_mul_ps(__m256 __a, __m256 __b)...@@ -352,10 +329,8 @@ _mm256_mul_ps(__m256 __a, __m256 __b)
352/// A 256-bit vector of [4 x double].329/// A 256-bit vector of [4 x double].
353/// \returns A 256-bit vector of [4 x double] containing the square roots of the330/// \returns A 256-bit vector of [4 x double] containing the square roots of the
354/// values in the operand.331/// values in the operand.
355static __inline __m256d __DEFAULT_FN_ATTRS332static __inline __m256d __DEFAULT_FN_ATTRS _mm256_sqrt_pd(__m256d __a) {
356_mm256_sqrt_pd(__m256d __a)333 return __builtin_elementwise_sqrt(__a);
357{
358 return (__m256d)__builtin_ia32_sqrtpd256((__v4df)__a);
359}334}
360335
361/// Calculates the square roots of the values in a 256-bit vector of336/// Calculates the square roots of the values in a 256-bit vector of
...@@ -369,10 +344,8 @@ _mm256_sqrt_pd(__m256d __a)...@@ -369,10 +344,8 @@ _mm256_sqrt_pd(__m256d __a)
369/// A 256-bit vector of [8 x float].344/// A 256-bit vector of [8 x float].
370/// \returns A 256-bit vector of [8 x float] containing the square roots of the345/// \returns A 256-bit vector of [8 x float] containing the square roots of the
371/// values in the operand.346/// values in the operand.
372static __inline __m256 __DEFAULT_FN_ATTRS347static __inline __m256 __DEFAULT_FN_ATTRS _mm256_sqrt_ps(__m256 __a) {
373_mm256_sqrt_ps(__m256 __a)348 return __builtin_elementwise_sqrt(__a);
374{
375 return (__m256)__builtin_ia32_sqrtps256((__v8sf)__a);
376}349}
377350
378/// Calculates the reciprocal square roots of the values in a 256-bit351/// Calculates the reciprocal square roots of the values in a 256-bit
...@@ -555,7 +528,7 @@ _mm256_rcp_ps(__m256 __a)...@@ -555,7 +528,7 @@ _mm256_rcp_ps(__m256 __a)
555/// A 256-bit vector of [4 x double] containing one of the source operands.528/// A 256-bit vector of [4 x double] containing one of the source operands.
556/// \returns A 256-bit vector of [4 x double] containing the bitwise AND of the529/// \returns A 256-bit vector of [4 x double] containing the bitwise AND of the
557/// values between both operands.530/// values between both operands.
558static __inline __m256d __DEFAULT_FN_ATTRS531static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
559_mm256_and_pd(__m256d __a, __m256d __b)532_mm256_and_pd(__m256d __a, __m256d __b)
560{533{
561 return (__m256d)((__v4du)__a & (__v4du)__b);534 return (__m256d)((__v4du)__a & (__v4du)__b);
...@@ -573,7 +546,7 @@ _mm256_and_pd(__m256d __a, __m256d __b)...@@ -573,7 +546,7 @@ _mm256_and_pd(__m256d __a, __m256d __b)
573/// A 256-bit vector of [8 x float] containing one of the source operands.546/// A 256-bit vector of [8 x float] containing one of the source operands.
574/// \returns A 256-bit vector of [8 x float] containing the bitwise AND of the547/// \returns A 256-bit vector of [8 x float] containing the bitwise AND of the
575/// values between both operands.548/// values between both operands.
576static __inline __m256 __DEFAULT_FN_ATTRS549static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
577_mm256_and_ps(__m256 __a, __m256 __b)550_mm256_and_ps(__m256 __a, __m256 __b)
578{551{
579 return (__m256)((__v8su)__a & (__v8su)__b);552 return (__m256)((__v8su)__a & (__v8su)__b);
...@@ -594,7 +567,7 @@ _mm256_and_ps(__m256 __a, __m256 __b)...@@ -594,7 +567,7 @@ _mm256_and_ps(__m256 __a, __m256 __b)
594/// \returns A 256-bit vector of [4 x double] containing the bitwise AND of the567/// \returns A 256-bit vector of [4 x double] containing the bitwise AND of the
595/// values of the second operand and the one's complement of the first568/// values of the second operand and the one's complement of the first
596/// operand.569/// operand.
597static __inline __m256d __DEFAULT_FN_ATTRS570static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
598_mm256_andnot_pd(__m256d __a, __m256d __b)571_mm256_andnot_pd(__m256d __a, __m256d __b)
599{572{
600 return (__m256d)(~(__v4du)__a & (__v4du)__b);573 return (__m256d)(~(__v4du)__a & (__v4du)__b);
...@@ -615,7 +588,7 @@ _mm256_andnot_pd(__m256d __a, __m256d __b)...@@ -615,7 +588,7 @@ _mm256_andnot_pd(__m256d __a, __m256d __b)
615/// \returns A 256-bit vector of [8 x float] containing the bitwise AND of the588/// \returns A 256-bit vector of [8 x float] containing the bitwise AND of the
616/// values of the second operand and the one's complement of the first589/// values of the second operand and the one's complement of the first
617/// operand.590/// operand.
618static __inline __m256 __DEFAULT_FN_ATTRS591static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
619_mm256_andnot_ps(__m256 __a, __m256 __b)592_mm256_andnot_ps(__m256 __a, __m256 __b)
620{593{
621 return (__m256)(~(__v8su)__a & (__v8su)__b);594 return (__m256)(~(__v8su)__a & (__v8su)__b);
...@@ -633,7 +606,7 @@ _mm256_andnot_ps(__m256 __a, __m256 __b)...@@ -633,7 +606,7 @@ _mm256_andnot_ps(__m256 __a, __m256 __b)
633/// A 256-bit vector of [4 x double] containing one of the source operands.606/// A 256-bit vector of [4 x double] containing one of the source operands.
634/// \returns A 256-bit vector of [4 x double] containing the bitwise OR of the607/// \returns A 256-bit vector of [4 x double] containing the bitwise OR of the
635/// values between both operands.608/// values between both operands.
636static __inline __m256d __DEFAULT_FN_ATTRS609static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
637_mm256_or_pd(__m256d __a, __m256d __b)610_mm256_or_pd(__m256d __a, __m256d __b)
638{611{
639 return (__m256d)((__v4du)__a | (__v4du)__b);612 return (__m256d)((__v4du)__a | (__v4du)__b);
...@@ -651,7 +624,7 @@ _mm256_or_pd(__m256d __a, __m256d __b)...@@ -651,7 +624,7 @@ _mm256_or_pd(__m256d __a, __m256d __b)
651/// A 256-bit vector of [8 x float] containing one of the source operands.624/// A 256-bit vector of [8 x float] containing one of the source operands.
652/// \returns A 256-bit vector of [8 x float] containing the bitwise OR of the625/// \returns A 256-bit vector of [8 x float] containing the bitwise OR of the
653/// values between both operands.626/// values between both operands.
654static __inline __m256 __DEFAULT_FN_ATTRS627static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
655_mm256_or_ps(__m256 __a, __m256 __b)628_mm256_or_ps(__m256 __a, __m256 __b)
656{629{
657 return (__m256)((__v8su)__a | (__v8su)__b);630 return (__m256)((__v8su)__a | (__v8su)__b);
...@@ -669,7 +642,7 @@ _mm256_or_ps(__m256 __a, __m256 __b)...@@ -669,7 +642,7 @@ _mm256_or_ps(__m256 __a, __m256 __b)
669/// A 256-bit vector of [4 x double] containing one of the source operands.642/// A 256-bit vector of [4 x double] containing one of the source operands.
670/// \returns A 256-bit vector of [4 x double] containing the bitwise XOR of the643/// \returns A 256-bit vector of [4 x double] containing the bitwise XOR of the
671/// values between both operands.644/// values between both operands.
672static __inline __m256d __DEFAULT_FN_ATTRS645static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
673_mm256_xor_pd(__m256d __a, __m256d __b)646_mm256_xor_pd(__m256d __a, __m256d __b)
674{647{
675 return (__m256d)((__v4du)__a ^ (__v4du)__b);648 return (__m256d)((__v4du)__a ^ (__v4du)__b);
...@@ -687,7 +660,7 @@ _mm256_xor_pd(__m256d __a, __m256d __b)...@@ -687,7 +660,7 @@ _mm256_xor_pd(__m256d __a, __m256d __b)
687/// A 256-bit vector of [8 x float] containing one of the source operands.660/// A 256-bit vector of [8 x float] containing one of the source operands.
688/// \returns A 256-bit vector of [8 x float] containing the bitwise XOR of the661/// \returns A 256-bit vector of [8 x float] containing the bitwise XOR of the
689/// values between both operands.662/// values between both operands.
690static __inline __m256 __DEFAULT_FN_ATTRS663static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
691_mm256_xor_ps(__m256 __a, __m256 __b)664_mm256_xor_ps(__m256 __a, __m256 __b)
692{665{
693 return (__m256)((__v8su)__a ^ (__v8su)__b);666 return (__m256)((__v8su)__a ^ (__v8su)__b);
...@@ -711,9 +684,8 @@ _mm256_xor_ps(__m256 __a, __m256 __b)...@@ -711,9 +684,8 @@ _mm256_xor_ps(__m256 __a, __m256 __b)
711/// elements of a vector of [4 x double].684/// elements of a vector of [4 x double].
712/// \returns A 256-bit vector of [4 x double] containing the horizontal sums of685/// \returns A 256-bit vector of [4 x double] containing the horizontal sums of
713/// both operands.686/// both operands.
714static __inline __m256d __DEFAULT_FN_ATTRS687static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
715_mm256_hadd_pd(__m256d __a, __m256d __b)688_mm256_hadd_pd(__m256d __a, __m256d __b) {
716{
717 return (__m256d)__builtin_ia32_haddpd256((__v4df)__a, (__v4df)__b);689 return (__m256d)__builtin_ia32_haddpd256((__v4df)__a, (__v4df)__b);
718}690}
719691
...@@ -734,9 +706,8 @@ _mm256_hadd_pd(__m256d __a, __m256d __b)...@@ -734,9 +706,8 @@ _mm256_hadd_pd(__m256d __a, __m256d __b)
734/// index 2, 3, 6, 7 of a vector of [8 x float].706/// index 2, 3, 6, 7 of a vector of [8 x float].
735/// \returns A 256-bit vector of [8 x float] containing the horizontal sums of707/// \returns A 256-bit vector of [8 x float] containing the horizontal sums of
736/// both operands.708/// both operands.
737static __inline __m256 __DEFAULT_FN_ATTRS709static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_hadd_ps(__m256 __a,
738_mm256_hadd_ps(__m256 __a, __m256 __b)710 __m256 __b) {
739{
740 return (__m256)__builtin_ia32_haddps256((__v8sf)__a, (__v8sf)__b);711 return (__m256)__builtin_ia32_haddps256((__v8sf)__a, (__v8sf)__b);
741}712}
742713
...@@ -757,9 +728,8 @@ _mm256_hadd_ps(__m256 __a, __m256 __b)...@@ -757,9 +728,8 @@ _mm256_hadd_ps(__m256 __a, __m256 __b)
757/// odd-indexed elements of a vector of [4 x double].728/// odd-indexed elements of a vector of [4 x double].
758/// \returns A 256-bit vector of [4 x double] containing the horizontal729/// \returns A 256-bit vector of [4 x double] containing the horizontal
759/// differences of both operands.730/// differences of both operands.
760static __inline __m256d __DEFAULT_FN_ATTRS731static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
761_mm256_hsub_pd(__m256d __a, __m256d __b)732_mm256_hsub_pd(__m256d __a, __m256d __b) {
762{
763 return (__m256d)__builtin_ia32_hsubpd256((__v4df)__a, (__v4df)__b);733 return (__m256d)__builtin_ia32_hsubpd256((__v4df)__a, (__v4df)__b);
764}734}
765735
...@@ -780,9 +750,8 @@ _mm256_hsub_pd(__m256d __a, __m256d __b)...@@ -780,9 +750,8 @@ _mm256_hsub_pd(__m256d __a, __m256d __b)
780/// elements with index 2, 3, 6, 7 of a vector of [8 x float].750/// elements with index 2, 3, 6, 7 of a vector of [8 x float].
781/// \returns A 256-bit vector of [8 x float] containing the horizontal751/// \returns A 256-bit vector of [8 x float] containing the horizontal
782/// differences of both operands.752/// differences of both operands.
783static __inline __m256 __DEFAULT_FN_ATTRS753static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_hsub_ps(__m256 __a,
784_mm256_hsub_ps(__m256 __a, __m256 __b)754 __m256 __b) {
785{
786 return (__m256)__builtin_ia32_hsubps256((__v8sf)__a, (__v8sf)__b);755 return (__m256)__builtin_ia32_hsubps256((__v8sf)__a, (__v8sf)__b);
787}756}
788757
...@@ -810,9 +779,8 @@ _mm256_hsub_ps(__m256 __a, __m256 __b)...@@ -810,9 +779,8 @@ _mm256_hsub_ps(__m256 __a, __m256 __b)
810/// 1: Bits [127:64] of the source are copied to bits [127:64] of the779/// 1: Bits [127:64] of the source are copied to bits [127:64] of the
811/// returned vector.780/// returned vector.
812/// \returns A 128-bit vector of [2 x double] containing the copied values.781/// \returns A 128-bit vector of [2 x double] containing the copied values.
813static __inline __m128d __DEFAULT_FN_ATTRS128782static __inline __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
814_mm_permutevar_pd(__m128d __a, __m128i __c)783_mm_permutevar_pd(__m128d __a, __m128i __c) {
815{
816 return (__m128d)__builtin_ia32_vpermilvarpd((__v2df)__a, (__v2di)__c);784 return (__m128d)__builtin_ia32_vpermilvarpd((__v2df)__a, (__v2di)__c);
817}785}
818786
...@@ -849,9 +817,8 @@ _mm_permutevar_pd(__m128d __a, __m128i __c)...@@ -849,9 +817,8 @@ _mm_permutevar_pd(__m128d __a, __m128i __c)
849/// 1: Bits [255:192] of the source are copied to bits [255:192] of the817/// 1: Bits [255:192] of the source are copied to bits [255:192] of the
850/// returned vector.818/// returned vector.
851/// \returns A 256-bit vector of [4 x double] containing the copied values.819/// \returns A 256-bit vector of [4 x double] containing the copied values.
852static __inline __m256d __DEFAULT_FN_ATTRS820static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
853_mm256_permutevar_pd(__m256d __a, __m256i __c)821_mm256_permutevar_pd(__m256d __a, __m256i __c) {
854{
855 return (__m256d)__builtin_ia32_vpermilvarpd256((__v4df)__a, (__v4di)__c);822 return (__m256d)__builtin_ia32_vpermilvarpd256((__v4df)__a, (__v4di)__c);
856}823}
857824
...@@ -904,9 +871,8 @@ _mm256_permutevar_pd(__m256d __a, __m256i __c)...@@ -904,9 +871,8 @@ _mm256_permutevar_pd(__m256d __a, __m256i __c)
904/// 11: Bits [127:96] of the source are copied to bits [127:96] of the871/// 11: Bits [127:96] of the source are copied to bits [127:96] of the
905/// returned vector.872/// returned vector.
906/// \returns A 128-bit vector of [4 x float] containing the copied values.873/// \returns A 128-bit vector of [4 x float] containing the copied values.
907static __inline __m128 __DEFAULT_FN_ATTRS128874static __inline __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
908_mm_permutevar_ps(__m128 __a, __m128i __c)875_mm_permutevar_ps(__m128 __a, __m128i __c) {
909{
910 return (__m128)__builtin_ia32_vpermilvarps((__v4sf)__a, (__v4si)__c);876 return (__m128)__builtin_ia32_vpermilvarps((__v4sf)__a, (__v4si)__c);
911}877}
912878
...@@ -995,9 +961,8 @@ _mm_permutevar_ps(__m128 __a, __m128i __c)...@@ -995,9 +961,8 @@ _mm_permutevar_ps(__m128 __a, __m128i __c)
995/// 11: Bits [255:224] of the source are copied to bits [255:224] of the961/// 11: Bits [255:224] of the source are copied to bits [255:224] of the
996/// returned vector.962/// returned vector.
997/// \returns A 256-bit vector of [8 x float] containing the copied values.963/// \returns A 256-bit vector of [8 x float] containing the copied values.
998static __inline __m256 __DEFAULT_FN_ATTRS964static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
999_mm256_permutevar_ps(__m256 __a, __m256i __c)965_mm256_permutevar_ps(__m256 __a, __m256i __c) {
1000{
1001 return (__m256)__builtin_ia32_vpermilvarps256((__v8sf)__a, (__v8si)__c);966 return (__m256)__builtin_ia32_vpermilvarps256((__v8sf)__a, (__v8si)__c);
1002}967}
1003968
...@@ -1419,9 +1384,8 @@ _mm256_permutevar_ps(__m256 __a, __m256i __c)...@@ -1419,9 +1384,8 @@ _mm256_permutevar_ps(__m256 __a, __m256i __c)
1419/// 64-bit element in operand \a __b is copied to the same position in the1384/// 64-bit element in operand \a __b is copied to the same position in the
1420/// destination.1385/// destination.
1421/// \returns A 256-bit vector of [4 x double] containing the copied values.1386/// \returns A 256-bit vector of [4 x double] containing the copied values.
1422static __inline __m256d __DEFAULT_FN_ATTRS1387static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
1423_mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c)1388_mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c) {
1424{
1425 return (__m256d)__builtin_ia32_blendvpd256(1389 return (__m256d)__builtin_ia32_blendvpd256(
1426 (__v4df)__a, (__v4df)__b, (__v4df)__c);1390 (__v4df)__a, (__v4df)__b, (__v4df)__c);
1427}1391}
...@@ -1447,9 +1411,8 @@ _mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c)...@@ -1447,9 +1411,8 @@ _mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c)
1447/// corresponding 32-bit element in operand \a __b is copied to the same1411/// corresponding 32-bit element in operand \a __b is copied to the same
1448/// position in the destination.1412/// position in the destination.
1449/// \returns A 256-bit vector of [8 x float] containing the copied values.1413/// \returns A 256-bit vector of [8 x float] containing the copied values.
1450static __inline __m256 __DEFAULT_FN_ATTRS1414static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
1451_mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c)1415_mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c) {
1452{
1453 return (__m256)__builtin_ia32_blendvps256(1416 return (__m256)__builtin_ia32_blendvps256(
1454 (__v8sf)__a, (__v8sf)__b, (__v8sf)__c);1417 (__v8sf)__a, (__v8sf)__b, (__v8sf)__c);
1455}1418}
...@@ -2190,9 +2153,8 @@ _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c)...@@ -2190,9 +2153,8 @@ _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c)
2190/// \param __a2153/// \param __a
2191/// A 128-bit integer vector of [4 x i32].2154/// A 128-bit integer vector of [4 x i32].
2192/// \returns A 256-bit vector of [4 x double] containing the converted values.2155/// \returns A 256-bit vector of [4 x double] containing the converted values.
2193static __inline __m256d __DEFAULT_FN_ATTRS2156static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
2194_mm256_cvtepi32_pd(__m128i __a)2157_mm256_cvtepi32_pd(__m128i __a) {
2195{
2196 return (__m256d)__builtin_convertvector((__v4si)__a, __v4df);2158 return (__m256d)__builtin_convertvector((__v4si)__a, __v4df);
2197}2159}
21982160
...@@ -2205,9 +2167,8 @@ _mm256_cvtepi32_pd(__m128i __a)...@@ -2205,9 +2167,8 @@ _mm256_cvtepi32_pd(__m128i __a)
2205/// \param __a2167/// \param __a
2206/// A 256-bit integer vector.2168/// A 256-bit integer vector.
2207/// \returns A 256-bit vector of [8 x float] containing the converted values.2169/// \returns A 256-bit vector of [8 x float] containing the converted values.
2208static __inline __m256 __DEFAULT_FN_ATTRS2170static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
2209_mm256_cvtepi32_ps(__m256i __a)2171_mm256_cvtepi32_ps(__m256i __a) {
2210{
2211 return (__m256)__builtin_convertvector((__v8si)__a, __v8sf);2172 return (__m256)__builtin_convertvector((__v8si)__a, __v8sf);
2212}2173}
22132174
...@@ -2221,9 +2182,8 @@ _mm256_cvtepi32_ps(__m256i __a)...@@ -2221,9 +2182,8 @@ _mm256_cvtepi32_ps(__m256i __a)
2221/// \param __a2182/// \param __a
2222/// A 256-bit vector of [4 x double].2183/// A 256-bit vector of [4 x double].
2223/// \returns A 128-bit vector of [4 x float] containing the converted values.2184/// \returns A 128-bit vector of [4 x float] containing the converted values.
2224static __inline __m128 __DEFAULT_FN_ATTRS2185static __inline __m128 __DEFAULT_FN_ATTRS_CONSTEXPR
2225_mm256_cvtpd_ps(__m256d __a)2186_mm256_cvtpd_ps(__m256d __a) {
2226{
2227 return (__m128)__builtin_ia32_cvtpd2ps256((__v4df) __a);2187 return (__m128)__builtin_ia32_cvtpd2ps256((__v4df) __a);
2228}2188}
22292189
...@@ -2256,9 +2216,8 @@ _mm256_cvtps_epi32(__m256 __a)...@@ -2256,9 +2216,8 @@ _mm256_cvtps_epi32(__m256 __a)
2256/// \param __a2216/// \param __a
2257/// A 128-bit vector of [4 x float].2217/// A 128-bit vector of [4 x float].
2258/// \returns A 256-bit vector of [4 x double] containing the converted values.2218/// \returns A 256-bit vector of [4 x double] containing the converted values.
2259static __inline __m256d __DEFAULT_FN_ATTRS2219static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
2260_mm256_cvtps_pd(__m128 __a)2220_mm256_cvtps_pd(__m128 __a) {
2261{
2262 return (__m256d)__builtin_convertvector((__v4sf)__a, __v4df);2221 return (__m256d)__builtin_convertvector((__v4sf)__a, __v4df);
2263}2222}
22642223
...@@ -2333,10 +2292,9 @@ _mm256_cvttps_epi32(__m256 __a)...@@ -2333,10 +2292,9 @@ _mm256_cvttps_epi32(__m256 __a)
2333/// \param __a2292/// \param __a
2334/// A 256-bit vector of [4 x double].2293/// A 256-bit vector of [4 x double].
2335/// \returns A 64 bit double containing the first element of the input vector.2294/// \returns A 64 bit double containing the first element of the input vector.
2336static __inline double __DEFAULT_FN_ATTRS2295static __inline double __DEFAULT_FN_ATTRS_CONSTEXPR
2337_mm256_cvtsd_f64(__m256d __a)2296_mm256_cvtsd_f64(__m256d __a) {
2338{2297 return __a[0];
2339 return __a[0];
2340}2298}
23412299
2342/// Returns the first element of the input vector of [8 x i32].2300/// Returns the first element of the input vector of [8 x i32].
...@@ -2349,11 +2307,10 @@ _mm256_cvtsd_f64(__m256d __a)...@@ -2349,11 +2307,10 @@ _mm256_cvtsd_f64(__m256d __a)
2349/// \param __a2307/// \param __a
2350/// A 256-bit vector of [8 x i32].2308/// A 256-bit vector of [8 x i32].
2351/// \returns A 32 bit integer containing the first element of the input vector.2309/// \returns A 32 bit integer containing the first element of the input vector.
2352static __inline int __DEFAULT_FN_ATTRS2310static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
2353_mm256_cvtsi256_si32(__m256i __a)2311_mm256_cvtsi256_si32(__m256i __a) {
2354{2312 __v8si __b = (__v8si)__a;
2355 __v8si __b = (__v8si)__a;2313 return __b[0];
2356 return __b[0];
2357}2314}
23582315
2359/// Returns the first element of the input vector of [8 x float].2316/// Returns the first element of the input vector of [8 x float].
...@@ -2366,10 +2323,9 @@ _mm256_cvtsi256_si32(__m256i __a)...@@ -2366,10 +2323,9 @@ _mm256_cvtsi256_si32(__m256i __a)
2366/// \param __a2323/// \param __a
2367/// A 256-bit vector of [8 x float].2324/// A 256-bit vector of [8 x float].
2368/// \returns A 32 bit float containing the first element of the input vector.2325/// \returns A 32 bit float containing the first element of the input vector.
2369static __inline float __DEFAULT_FN_ATTRS2326static __inline float __DEFAULT_FN_ATTRS_CONSTEXPR
2370_mm256_cvtss_f32(__m256 __a)2327_mm256_cvtss_f32(__m256 __a) {
2371{2328 return __a[0];
2372 return __a[0];
2373}2329}
23742330
2375/* Vector replicate */2331/* Vector replicate */
...@@ -2392,7 +2348,7 @@ _mm256_cvtss_f32(__m256 __a)...@@ -2392,7 +2348,7 @@ _mm256_cvtss_f32(__m256 __a)
2392/// return value.2348/// return value.
2393/// \returns A 256-bit vector of [8 x float] containing the moved and duplicated2349/// \returns A 256-bit vector of [8 x float] containing the moved and duplicated
2394/// values.2350/// values.
2395static __inline __m256 __DEFAULT_FN_ATTRS2351static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
2396_mm256_movehdup_ps(__m256 __a)2352_mm256_movehdup_ps(__m256 __a)
2397{2353{
2398 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 1, 1, 3, 3, 5, 5, 7, 7);2354 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 1, 1, 3, 3, 5, 5, 7, 7);
...@@ -2417,7 +2373,7 @@ _mm256_movehdup_ps(__m256 __a)...@@ -2417,7 +2373,7 @@ _mm256_movehdup_ps(__m256 __a)
2417/// return value.2373/// return value.
2418/// \returns A 256-bit vector of [8 x float] containing the moved and duplicated2374/// \returns A 256-bit vector of [8 x float] containing the moved and duplicated
2419/// values.2375/// values.
2420static __inline __m256 __DEFAULT_FN_ATTRS2376static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
2421_mm256_moveldup_ps(__m256 __a)2377_mm256_moveldup_ps(__m256 __a)
2422{2378{
2423 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 0, 2, 2, 4, 4, 6, 6);2379 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 0, 2, 2, 4, 4, 6, 6);
...@@ -2439,7 +2395,7 @@ _mm256_moveldup_ps(__m256 __a)...@@ -2439,7 +2395,7 @@ _mm256_moveldup_ps(__m256 __a)
2439/// the return value.2395/// the return value.
2440/// \returns A 256-bit vector of [4 x double] containing the moved and2396/// \returns A 256-bit vector of [4 x double] containing the moved and
2441/// duplicated values.2397/// duplicated values.
2442static __inline __m256d __DEFAULT_FN_ATTRS2398static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
2443_mm256_movedup_pd(__m256d __a)2399_mm256_movedup_pd(__m256d __a)
2444{2400{
2445 return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 0, 2, 2);2401 return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 0, 2, 2);
...@@ -2462,9 +2418,8 @@ _mm256_movedup_pd(__m256d __a)...@@ -2462,9 +2418,8 @@ _mm256_movedup_pd(__m256d __a)
2462/// Bits [127:64] are written to bits [127:64] of the return value. \n2418/// Bits [127:64] are written to bits [127:64] of the return value. \n
2463/// Bits [255:192] are written to bits [255:192] of the return value. \n2419/// Bits [255:192] are written to bits [255:192] of the return value. \n
2464/// \returns A 256-bit vector of [4 x double] containing the interleaved values.2420/// \returns A 256-bit vector of [4 x double] containing the interleaved values.
2465static __inline __m256d __DEFAULT_FN_ATTRS2421static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
2466_mm256_unpackhi_pd(__m256d __a, __m256d __b)2422_mm256_unpackhi_pd(__m256d __a, __m256d __b) {
2467{
2468 return __builtin_shufflevector((__v4df)__a, (__v4df)__b, 1, 5, 1+2, 5+2);2423 return __builtin_shufflevector((__v4df)__a, (__v4df)__b, 1, 5, 1+2, 5+2);
2469}2424}
24702425
...@@ -2484,9 +2439,8 @@ _mm256_unpackhi_pd(__m256d __a, __m256d __b)...@@ -2484,9 +2439,8 @@ _mm256_unpackhi_pd(__m256d __a, __m256d __b)
2484/// Bits [63:0] are written to bits [127:64] of the return value. \n2439/// Bits [63:0] are written to bits [127:64] of the return value. \n
2485/// Bits [191:128] are written to bits [255:192] of the return value. \n2440/// Bits [191:128] are written to bits [255:192] of the return value. \n
2486/// \returns A 256-bit vector of [4 x double] containing the interleaved values.2441/// \returns A 256-bit vector of [4 x double] containing the interleaved values.
2487static __inline __m256d __DEFAULT_FN_ATTRS2442static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
2488_mm256_unpacklo_pd(__m256d __a, __m256d __b)2443_mm256_unpacklo_pd(__m256d __a, __m256d __b) {
2489{
2490 return __builtin_shufflevector((__v4df)__a, (__v4df)__b, 0, 4, 0+2, 4+2);2444 return __builtin_shufflevector((__v4df)__a, (__v4df)__b, 0, 4, 0+2, 4+2);
2491}2445}
24922446
...@@ -2511,9 +2465,8 @@ _mm256_unpacklo_pd(__m256d __a, __m256d __b)...@@ -2511,9 +2465,8 @@ _mm256_unpacklo_pd(__m256d __a, __m256d __b)
2511/// Bits [223:192] are written to bits [191:160] of the return value. \n2465/// Bits [223:192] are written to bits [191:160] of the return value. \n
2512/// Bits [255:224] are written to bits [255:224] of the return value.2466/// Bits [255:224] are written to bits [255:224] of the return value.
2513/// \returns A 256-bit vector of [8 x float] containing the interleaved values.2467/// \returns A 256-bit vector of [8 x float] containing the interleaved values.
2514static __inline __m256 __DEFAULT_FN_ATTRS2468static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
2515_mm256_unpackhi_ps(__m256 __a, __m256 __b)2469_mm256_unpackhi_ps(__m256 __a, __m256 __b) {
2516{
2517 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__b, 2, 10, 2+1, 10+1, 6, 14, 6+1, 14+1);2470 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__b, 2, 10, 2+1, 10+1, 6, 14, 6+1, 14+1);
2518}2471}
25192472
...@@ -2538,9 +2491,8 @@ _mm256_unpackhi_ps(__m256 __a, __m256 __b)...@@ -2538,9 +2491,8 @@ _mm256_unpackhi_ps(__m256 __a, __m256 __b)
2538/// Bits [159:128] are written to bits [191:160] of the return value. \n2491/// Bits [159:128] are written to bits [191:160] of the return value. \n
2539/// Bits [191:160] are written to bits [255:224] of the return value.2492/// Bits [191:160] are written to bits [255:224] of the return value.
2540/// \returns A 256-bit vector of [8 x float] containing the interleaved values.2493/// \returns A 256-bit vector of [8 x float] containing the interleaved values.
2541static __inline __m256 __DEFAULT_FN_ATTRS2494static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
2542_mm256_unpacklo_ps(__m256 __a, __m256 __b)2495_mm256_unpacklo_ps(__m256 __a, __m256 __b) {
2543{
2544 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__b, 0, 8, 0+1, 8+1, 4, 12, 4+1, 12+1);2496 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__b, 0, 8, 0+1, 8+1, 4, 12, 4+1, 12+1);
2545}2497}
25462498
...@@ -2568,9 +2520,8 @@ _mm256_unpacklo_ps(__m256 __a, __m256 __b)...@@ -2568,9 +2520,8 @@ _mm256_unpacklo_ps(__m256 __a, __m256 __b)
2568/// \param __b2520/// \param __b
2569/// A 128-bit vector of [2 x double].2521/// A 128-bit vector of [2 x double].
2570/// \returns the ZF flag in the EFLAGS register.2522/// \returns the ZF flag in the EFLAGS register.
2571static __inline int __DEFAULT_FN_ATTRS1282523static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testz_pd(__m128d __a,
2572_mm_testz_pd(__m128d __a, __m128d __b)2524 __m128d __b) {
2573{
2574 return __builtin_ia32_vtestzpd((__v2df)__a, (__v2df)__b);2525 return __builtin_ia32_vtestzpd((__v2df)__a, (__v2df)__b);
2575}2526}
25762527
...@@ -2597,9 +2548,8 @@ _mm_testz_pd(__m128d __a, __m128d __b)...@@ -2597,9 +2548,8 @@ _mm_testz_pd(__m128d __a, __m128d __b)
2597/// \param __b2548/// \param __b
2598/// A 128-bit vector of [2 x double].2549/// A 128-bit vector of [2 x double].
2599/// \returns the CF flag in the EFLAGS register.2550/// \returns the CF flag in the EFLAGS register.
2600static __inline int __DEFAULT_FN_ATTRS1282551static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testc_pd(__m128d __a,
2601_mm_testc_pd(__m128d __a, __m128d __b)2552 __m128d __b) {
2602{
2603 return __builtin_ia32_vtestcpd((__v2df)__a, (__v2df)__b);2553 return __builtin_ia32_vtestcpd((__v2df)__a, (__v2df)__b);
2604}2554}
26052555
...@@ -2627,9 +2577,8 @@ _mm_testc_pd(__m128d __a, __m128d __b)...@@ -2627,9 +2577,8 @@ _mm_testc_pd(__m128d __a, __m128d __b)
2627/// \param __b2577/// \param __b
2628/// A 128-bit vector of [2 x double].2578/// A 128-bit vector of [2 x double].
2629/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.2579/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
2630static __inline int __DEFAULT_FN_ATTRS1282580static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR
2631_mm_testnzc_pd(__m128d __a, __m128d __b)2581_mm_testnzc_pd(__m128d __a, __m128d __b) {
2632{
2633 return __builtin_ia32_vtestnzcpd((__v2df)__a, (__v2df)__b);2582 return __builtin_ia32_vtestnzcpd((__v2df)__a, (__v2df)__b);
2634}2583}
26352584
...@@ -2656,9 +2605,8 @@ _mm_testnzc_pd(__m128d __a, __m128d __b)...@@ -2656,9 +2605,8 @@ _mm_testnzc_pd(__m128d __a, __m128d __b)
2656/// \param __b2605/// \param __b
2657/// A 128-bit vector of [4 x float].2606/// A 128-bit vector of [4 x float].
2658/// \returns the ZF flag.2607/// \returns the ZF flag.
2659static __inline int __DEFAULT_FN_ATTRS1282608static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testz_ps(__m128 __a,
2660_mm_testz_ps(__m128 __a, __m128 __b)2609 __m128 __b) {
2661{
2662 return __builtin_ia32_vtestzps((__v4sf)__a, (__v4sf)__b);2610 return __builtin_ia32_vtestzps((__v4sf)__a, (__v4sf)__b);
2663}2611}
26642612
...@@ -2685,9 +2633,8 @@ _mm_testz_ps(__m128 __a, __m128 __b)...@@ -2685,9 +2633,8 @@ _mm_testz_ps(__m128 __a, __m128 __b)
2685/// \param __b2633/// \param __b
2686/// A 128-bit vector of [4 x float].2634/// A 128-bit vector of [4 x float].
2687/// \returns the CF flag.2635/// \returns the CF flag.
2688static __inline int __DEFAULT_FN_ATTRS1282636static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testc_ps(__m128 __a,
2689_mm_testc_ps(__m128 __a, __m128 __b)2637 __m128 __b) {
2690{
2691 return __builtin_ia32_vtestcps((__v4sf)__a, (__v4sf)__b);2638 return __builtin_ia32_vtestcps((__v4sf)__a, (__v4sf)__b);
2692}2639}
26932640
...@@ -2715,9 +2662,8 @@ _mm_testc_ps(__m128 __a, __m128 __b)...@@ -2715,9 +2662,8 @@ _mm_testc_ps(__m128 __a, __m128 __b)
2715/// \param __b2662/// \param __b
2716/// A 128-bit vector of [4 x float].2663/// A 128-bit vector of [4 x float].
2717/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.2664/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
2718static __inline int __DEFAULT_FN_ATTRS1282665static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testnzc_ps(__m128 __a,
2719_mm_testnzc_ps(__m128 __a, __m128 __b)2666 __m128 __b) {
2720{
2721 return __builtin_ia32_vtestnzcps((__v4sf)__a, (__v4sf)__b);2667 return __builtin_ia32_vtestnzcps((__v4sf)__a, (__v4sf)__b);
2722}2668}
27232669
...@@ -2744,9 +2690,8 @@ _mm_testnzc_ps(__m128 __a, __m128 __b)...@@ -2744,9 +2690,8 @@ _mm_testnzc_ps(__m128 __a, __m128 __b)
2744/// \param __b2690/// \param __b
2745/// A 256-bit vector of [4 x double].2691/// A 256-bit vector of [4 x double].
2746/// \returns the ZF flag.2692/// \returns the ZF flag.
2747static __inline int __DEFAULT_FN_ATTRS2693static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testz_pd(__m256d __a,
2748_mm256_testz_pd(__m256d __a, __m256d __b)2694 __m256d __b) {
2749{
2750 return __builtin_ia32_vtestzpd256((__v4df)__a, (__v4df)__b);2695 return __builtin_ia32_vtestzpd256((__v4df)__a, (__v4df)__b);
2751}2696}
27522697
...@@ -2773,9 +2718,8 @@ _mm256_testz_pd(__m256d __a, __m256d __b)...@@ -2773,9 +2718,8 @@ _mm256_testz_pd(__m256d __a, __m256d __b)
2773/// \param __b2718/// \param __b
2774/// A 256-bit vector of [4 x double].2719/// A 256-bit vector of [4 x double].
2775/// \returns the CF flag.2720/// \returns the CF flag.
2776static __inline int __DEFAULT_FN_ATTRS2721static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testc_pd(__m256d __a,
2777_mm256_testc_pd(__m256d __a, __m256d __b)2722 __m256d __b) {
2778{
2779 return __builtin_ia32_vtestcpd256((__v4df)__a, (__v4df)__b);2723 return __builtin_ia32_vtestcpd256((__v4df)__a, (__v4df)__b);
2780}2724}
27812725
...@@ -2803,9 +2747,8 @@ _mm256_testc_pd(__m256d __a, __m256d __b)...@@ -2803,9 +2747,8 @@ _mm256_testc_pd(__m256d __a, __m256d __b)
2803/// \param __b2747/// \param __b
2804/// A 256-bit vector of [4 x double].2748/// A 256-bit vector of [4 x double].
2805/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.2749/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
2806static __inline int __DEFAULT_FN_ATTRS2750static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
2807_mm256_testnzc_pd(__m256d __a, __m256d __b)2751_mm256_testnzc_pd(__m256d __a, __m256d __b) {
2808{
2809 return __builtin_ia32_vtestnzcpd256((__v4df)__a, (__v4df)__b);2752 return __builtin_ia32_vtestnzcpd256((__v4df)__a, (__v4df)__b);
2810}2753}
28112754
...@@ -2832,9 +2775,8 @@ _mm256_testnzc_pd(__m256d __a, __m256d __b)...@@ -2832,9 +2775,8 @@ _mm256_testnzc_pd(__m256d __a, __m256d __b)
2832/// \param __b2775/// \param __b
2833/// A 256-bit vector of [8 x float].2776/// A 256-bit vector of [8 x float].
2834/// \returns the ZF flag.2777/// \returns the ZF flag.
2835static __inline int __DEFAULT_FN_ATTRS2778static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testz_ps(__m256 __a,
2836_mm256_testz_ps(__m256 __a, __m256 __b)2779 __m256 __b) {
2837{
2838 return __builtin_ia32_vtestzps256((__v8sf)__a, (__v8sf)__b);2780 return __builtin_ia32_vtestzps256((__v8sf)__a, (__v8sf)__b);
2839}2781}
28402782
...@@ -2861,9 +2803,8 @@ _mm256_testz_ps(__m256 __a, __m256 __b)...@@ -2861,9 +2803,8 @@ _mm256_testz_ps(__m256 __a, __m256 __b)
2861/// \param __b2803/// \param __b
2862/// A 256-bit vector of [8 x float].2804/// A 256-bit vector of [8 x float].
2863/// \returns the CF flag.2805/// \returns the CF flag.
2864static __inline int __DEFAULT_FN_ATTRS2806static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testc_ps(__m256 __a,
2865_mm256_testc_ps(__m256 __a, __m256 __b)2807 __m256 __b) {
2866{
2867 return __builtin_ia32_vtestcps256((__v8sf)__a, (__v8sf)__b);2808 return __builtin_ia32_vtestcps256((__v8sf)__a, (__v8sf)__b);
2868}2809}
28692810
...@@ -2891,9 +2832,8 @@ _mm256_testc_ps(__m256 __a, __m256 __b)...@@ -2891,9 +2832,8 @@ _mm256_testc_ps(__m256 __a, __m256 __b)
2891/// \param __b2832/// \param __b
2892/// A 256-bit vector of [8 x float].2833/// A 256-bit vector of [8 x float].
2893/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.2834/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
2894static __inline int __DEFAULT_FN_ATTRS2835static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testnzc_ps(__m256 __a,
2895_mm256_testnzc_ps(__m256 __a, __m256 __b)2836 __m256 __b) {
2896{
2897 return __builtin_ia32_vtestnzcps256((__v8sf)__a, (__v8sf)__b);2837 return __builtin_ia32_vtestnzcps256((__v8sf)__a, (__v8sf)__b);
2898}2838}
28992839
...@@ -2917,9 +2857,8 @@ _mm256_testnzc_ps(__m256 __a, __m256 __b)...@@ -2917,9 +2857,8 @@ _mm256_testnzc_ps(__m256 __a, __m256 __b)
2917/// \param __b2857/// \param __b
2918/// A 256-bit integer vector.2858/// A 256-bit integer vector.
2919/// \returns the ZF flag.2859/// \returns the ZF flag.
2920static __inline int __DEFAULT_FN_ATTRS2860static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
2921_mm256_testz_si256(__m256i __a, __m256i __b)2861_mm256_testz_si256(__m256i __a, __m256i __b) {
2922{
2923 return __builtin_ia32_ptestz256((__v4di)__a, (__v4di)__b);2862 return __builtin_ia32_ptestz256((__v4di)__a, (__v4di)__b);
2924}2863}
29252864
...@@ -2943,9 +2882,8 @@ _mm256_testz_si256(__m256i __a, __m256i __b)...@@ -2943,9 +2882,8 @@ _mm256_testz_si256(__m256i __a, __m256i __b)
2943/// \param __b2882/// \param __b
2944/// A 256-bit integer vector.2883/// A 256-bit integer vector.
2945/// \returns the CF flag.2884/// \returns the CF flag.
2946static __inline int __DEFAULT_FN_ATTRS2885static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
2947_mm256_testc_si256(__m256i __a, __m256i __b)2886_mm256_testc_si256(__m256i __a, __m256i __b) {
2948{
2949 return __builtin_ia32_ptestc256((__v4di)__a, (__v4di)__b);2887 return __builtin_ia32_ptestc256((__v4di)__a, (__v4di)__b);
2950}2888}
29512889
...@@ -2970,9 +2908,8 @@ _mm256_testc_si256(__m256i __a, __m256i __b)...@@ -2970,9 +2908,8 @@ _mm256_testc_si256(__m256i __a, __m256i __b)
2970/// \param __b2908/// \param __b
2971/// A 256-bit integer vector.2909/// A 256-bit integer vector.
2972/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.2910/// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0.
2973static __inline int __DEFAULT_FN_ATTRS2911static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
2974_mm256_testnzc_si256(__m256i __a, __m256i __b)2912_mm256_testnzc_si256(__m256i __a, __m256i __b) {
2975{
2976 return __builtin_ia32_ptestnzc256((__v4di)__a, (__v4di)__b);2913 return __builtin_ia32_ptestnzc256((__v4di)__a, (__v4di)__b);
2977}2914}
29782915
...@@ -2989,9 +2926,8 @@ _mm256_testnzc_si256(__m256i __a, __m256i __b)...@@ -2989,9 +2926,8 @@ _mm256_testnzc_si256(__m256i __a, __m256i __b)
2989/// A 256-bit vector of [4 x double] containing the double-precision2926/// A 256-bit vector of [4 x double] containing the double-precision
2990/// floating point values with sign bits to be extracted.2927/// floating point values with sign bits to be extracted.
2991/// \returns The sign bits from the operand, written to bits [3:0].2928/// \returns The sign bits from the operand, written to bits [3:0].
2992static __inline int __DEFAULT_FN_ATTRS2929static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
2993_mm256_movemask_pd(__m256d __a)2930_mm256_movemask_pd(__m256d __a) {
2994{
2995 return __builtin_ia32_movmskpd256((__v4df)__a);2931 return __builtin_ia32_movmskpd256((__v4df)__a);
2996}2932}
29972933
...@@ -3007,9 +2943,8 @@ _mm256_movemask_pd(__m256d __a)...@@ -3007,9 +2943,8 @@ _mm256_movemask_pd(__m256d __a)
3007/// A 256-bit vector of [8 x float] containing the single-precision floating2943/// A 256-bit vector of [8 x float] containing the single-precision floating
3008/// point values with sign bits to be extracted.2944/// point values with sign bits to be extracted.
3009/// \returns The sign bits from the operand, written to bits [7:0].2945/// \returns The sign bits from the operand, written to bits [7:0].
3010static __inline int __DEFAULT_FN_ATTRS2946static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR
3011_mm256_movemask_ps(__m256 __a)2947_mm256_movemask_ps(__m256 __a) {
3012{
3013 return __builtin_ia32_movmskps256((__v8sf)__a);2948 return __builtin_ia32_movmskps256((__v8sf)__a);
3014}2949}
30152950
...@@ -3666,9 +3601,7 @@ _mm256_undefined_pd(void)...@@ -3666,9 +3601,7 @@ _mm256_undefined_pd(void)
3666/// This intrinsic has no corresponding instruction.3601/// This intrinsic has no corresponding instruction.
3667///3602///
3668/// \returns A 256-bit vector of [8 x float] containing undefined values.3603/// \returns A 256-bit vector of [8 x float] containing undefined values.
3669static __inline__ __m256 __DEFAULT_FN_ATTRS3604static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_undefined_ps(void) {
3670_mm256_undefined_ps(void)
3671{
3672 return (__m256)__builtin_ia32_undef256();3605 return (__m256)__builtin_ia32_undef256();
3673}3606}
36743607
...@@ -3777,7 +3710,7 @@ _mm256_set_ps(float __a, float __b, float __c, float __d,...@@ -3777,7 +3710,7 @@ _mm256_set_ps(float __a, float __b, float __c, float __d,
3777/// \param __i73710/// \param __i7
3778/// A 32-bit integral value used to initialize bits [31:0] of the result.3711/// A 32-bit integral value used to initialize bits [31:0] of the result.
3779/// \returns An initialized 256-bit integer vector.3712/// \returns An initialized 256-bit integer vector.
3780static __inline __m256i __DEFAULT_FN_ATTRS3713static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
3781_mm256_set_epi32(int __i0, int __i1, int __i2, int __i3,3714_mm256_set_epi32(int __i0, int __i1, int __i2, int __i3,
3782 int __i4, int __i5, int __i6, int __i7)3715 int __i4, int __i5, int __i6, int __i7)
3783{3716{
...@@ -3825,7 +3758,7 @@ _mm256_set_epi32(int __i0, int __i1, int __i2, int __i3,...@@ -3825,7 +3758,7 @@ _mm256_set_epi32(int __i0, int __i1, int __i2, int __i3,
3825/// \param __w003758/// \param __w00
3826/// A 16-bit integral value used to initialize bits [15:0] of the result.3759/// A 16-bit integral value used to initialize bits [15:0] of the result.
3827/// \returns An initialized 256-bit integer vector.3760/// \returns An initialized 256-bit integer vector.
3828static __inline __m256i __DEFAULT_FN_ATTRS3761static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
3829_mm256_set_epi16(short __w15, short __w14, short __w13, short __w12,3762_mm256_set_epi16(short __w15, short __w14, short __w13, short __w12,
3830 short __w11, short __w10, short __w09, short __w08,3763 short __w11, short __w10, short __w09, short __w08,
3831 short __w07, short __w06, short __w05, short __w04,3764 short __w07, short __w06, short __w05, short __w04,
...@@ -3908,7 +3841,7 @@ _mm256_set_epi16(short __w15, short __w14, short __w13, short __w12,...@@ -3908,7 +3841,7 @@ _mm256_set_epi16(short __w15, short __w14, short __w13, short __w12,
3908/// \param __b003841/// \param __b00
3909/// An 8-bit integral value used to initialize bits [7:0] of the result.3842/// An 8-bit integral value used to initialize bits [7:0] of the result.
3910/// \returns An initialized 256-bit integer vector.3843/// \returns An initialized 256-bit integer vector.
3911static __inline __m256i __DEFAULT_FN_ATTRS3844static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
3912_mm256_set_epi8(char __b31, char __b30, char __b29, char __b28,3845_mm256_set_epi8(char __b31, char __b30, char __b29, char __b28,
3913 char __b27, char __b26, char __b25, char __b24,3846 char __b27, char __b26, char __b25, char __b24,
3914 char __b23, char __b22, char __b21, char __b20,3847 char __b23, char __b22, char __b21, char __b20,
...@@ -3943,7 +3876,7 @@ _mm256_set_epi8(char __b31, char __b30, char __b29, char __b28,...@@ -3943,7 +3876,7 @@ _mm256_set_epi8(char __b31, char __b30, char __b29, char __b28,
3943/// \param __d3876/// \param __d
3944/// A 64-bit integral value used to initialize bits [63:0] of the result.3877/// A 64-bit integral value used to initialize bits [63:0] of the result.
3945/// \returns An initialized 256-bit integer vector.3878/// \returns An initialized 256-bit integer vector.
3946static __inline __m256i __DEFAULT_FN_ATTRS3879static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
3947_mm256_set_epi64x(long long __a, long long __b, long long __c, long long __d)3880_mm256_set_epi64x(long long __a, long long __b, long long __c, long long __d)
3948{3881{
3949 return __extension__ (__m256i)(__v4di){ __d, __c, __b, __a };3882 return __extension__ (__m256i)(__v4di){ __d, __c, __b, __a };
...@@ -4044,7 +3977,7 @@ _mm256_setr_ps(float __a, float __b, float __c, float __d,...@@ -4044,7 +3977,7 @@ _mm256_setr_ps(float __a, float __b, float __c, float __d,
4044/// \param __i73977/// \param __i7
4045/// A 32-bit integral value used to initialize bits [255:224] of the result.3978/// A 32-bit integral value used to initialize bits [255:224] of the result.
4046/// \returns An initialized 256-bit integer vector.3979/// \returns An initialized 256-bit integer vector.
4047static __inline __m256i __DEFAULT_FN_ATTRS3980static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4048_mm256_setr_epi32(int __i0, int __i1, int __i2, int __i3,3981_mm256_setr_epi32(int __i0, int __i1, int __i2, int __i3,
4049 int __i4, int __i5, int __i6, int __i7)3982 int __i4, int __i5, int __i6, int __i7)
4050{3983{
...@@ -4092,7 +4025,7 @@ _mm256_setr_epi32(int __i0, int __i1, int __i2, int __i3,...@@ -4092,7 +4025,7 @@ _mm256_setr_epi32(int __i0, int __i1, int __i2, int __i3,
4092/// \param __w004025/// \param __w00
4093/// A 16-bit integral value used to initialize bits [255:240] of the result.4026/// A 16-bit integral value used to initialize bits [255:240] of the result.
4094/// \returns An initialized 256-bit integer vector.4027/// \returns An initialized 256-bit integer vector.
4095static __inline __m256i __DEFAULT_FN_ATTRS4028static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4096_mm256_setr_epi16(short __w15, short __w14, short __w13, short __w12,4029_mm256_setr_epi16(short __w15, short __w14, short __w13, short __w12,
4097 short __w11, short __w10, short __w09, short __w08,4030 short __w11, short __w10, short __w09, short __w08,
4098 short __w07, short __w06, short __w05, short __w04,4031 short __w07, short __w06, short __w05, short __w04,
...@@ -4177,7 +4110,7 @@ _mm256_setr_epi16(short __w15, short __w14, short __w13, short __w12,...@@ -4177,7 +4110,7 @@ _mm256_setr_epi16(short __w15, short __w14, short __w13, short __w12,
4177/// \param __b004110/// \param __b00
4178/// An 8-bit integral value used to initialize bits [255:248] of the result.4111/// An 8-bit integral value used to initialize bits [255:248] of the result.
4179/// \returns An initialized 256-bit integer vector.4112/// \returns An initialized 256-bit integer vector.
4180static __inline __m256i __DEFAULT_FN_ATTRS4113static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4181_mm256_setr_epi8(char __b31, char __b30, char __b29, char __b28,4114_mm256_setr_epi8(char __b31, char __b30, char __b29, char __b28,
4182 char __b27, char __b26, char __b25, char __b24,4115 char __b27, char __b26, char __b25, char __b24,
4183 char __b23, char __b22, char __b21, char __b20,4116 char __b23, char __b22, char __b21, char __b20,
...@@ -4210,7 +4143,7 @@ _mm256_setr_epi8(char __b31, char __b30, char __b29, char __b28,...@@ -4210,7 +4143,7 @@ _mm256_setr_epi8(char __b31, char __b30, char __b29, char __b28,
4210/// \param __d4143/// \param __d
4211/// A 64-bit integral value used to initialize bits [255:192] of the result.4144/// A 64-bit integral value used to initialize bits [255:192] of the result.
4212/// \returns An initialized 256-bit integer vector.4145/// \returns An initialized 256-bit integer vector.
4213static __inline __m256i __DEFAULT_FN_ATTRS4146static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4214_mm256_setr_epi64x(long long __a, long long __b, long long __c, long long __d)4147_mm256_setr_epi64x(long long __a, long long __b, long long __c, long long __d)
4215{4148{
4216 return _mm256_set_epi64x(__d, __c, __b, __a);4149 return _mm256_set_epi64x(__d, __c, __b, __a);
...@@ -4267,7 +4200,7 @@ _mm256_set1_ps(float __w)...@@ -4267,7 +4200,7 @@ _mm256_set1_ps(float __w)
4267/// A 32-bit integral value used to initialize each vector element of the4200/// A 32-bit integral value used to initialize each vector element of the
4268/// result.4201/// result.
4269/// \returns An initialized 256-bit integer vector of [8 x i32].4202/// \returns An initialized 256-bit integer vector of [8 x i32].
4270static __inline __m256i __DEFAULT_FN_ATTRS4203static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4271_mm256_set1_epi32(int __i)4204_mm256_set1_epi32(int __i)
4272{4205{
4273 return _mm256_set_epi32(__i, __i, __i, __i, __i, __i, __i, __i);4206 return _mm256_set_epi32(__i, __i, __i, __i, __i, __i, __i, __i);
...@@ -4285,7 +4218,7 @@ _mm256_set1_epi32(int __i)...@@ -4285,7 +4218,7 @@ _mm256_set1_epi32(int __i)
4285/// A 16-bit integral value used to initialize each vector element of the4218/// A 16-bit integral value used to initialize each vector element of the
4286/// result.4219/// result.
4287/// \returns An initialized 256-bit integer vector of [16 x i16].4220/// \returns An initialized 256-bit integer vector of [16 x i16].
4288static __inline __m256i __DEFAULT_FN_ATTRS4221static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4289_mm256_set1_epi16(short __w)4222_mm256_set1_epi16(short __w)
4290{4223{
4291 return _mm256_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w,4224 return _mm256_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w,
...@@ -4303,7 +4236,7 @@ _mm256_set1_epi16(short __w)...@@ -4303,7 +4236,7 @@ _mm256_set1_epi16(short __w)
4303/// An 8-bit integral value used to initialize each vector element of the4236/// An 8-bit integral value used to initialize each vector element of the
4304/// result.4237/// result.
4305/// \returns An initialized 256-bit integer vector of [32 x i8].4238/// \returns An initialized 256-bit integer vector of [32 x i8].
4306static __inline __m256i __DEFAULT_FN_ATTRS4239static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4307_mm256_set1_epi8(char __b)4240_mm256_set1_epi8(char __b)
4308{4241{
4309 return _mm256_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b,4242 return _mm256_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b,
...@@ -4324,7 +4257,7 @@ _mm256_set1_epi8(char __b)...@@ -4324,7 +4257,7 @@ _mm256_set1_epi8(char __b)
4324/// A 64-bit integral value used to initialize each vector element of the4257/// A 64-bit integral value used to initialize each vector element of the
4325/// result.4258/// result.
4326/// \returns An initialized 256-bit integer vector of [4 x i64].4259/// \returns An initialized 256-bit integer vector of [4 x i64].
4327static __inline __m256i __DEFAULT_FN_ATTRS4260static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4328_mm256_set1_epi64x(long long __q)4261_mm256_set1_epi64x(long long __q)
4329{4262{
4330 return _mm256_set_epi64x(__q, __q, __q, __q);4263 return _mm256_set_epi64x(__q, __q, __q, __q);
...@@ -4379,7 +4312,7 @@ _mm256_setzero_si256(void) {...@@ -4379,7 +4312,7 @@ _mm256_setzero_si256(void) {
4379/// A 256-bit floating-point vector of [4 x double].4312/// A 256-bit floating-point vector of [4 x double].
4380/// \returns A 256-bit floating-point vector of [8 x float] containing the same4313/// \returns A 256-bit floating-point vector of [8 x float] containing the same
4381/// bitwise pattern as the parameter.4314/// bitwise pattern as the parameter.
4382static __inline __m256 __DEFAULT_FN_ATTRS4315static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
4383_mm256_castpd_ps(__m256d __a)4316_mm256_castpd_ps(__m256d __a)
4384{4317{
4385 return (__m256)__a;4318 return (__m256)__a;
...@@ -4396,7 +4329,7 @@ _mm256_castpd_ps(__m256d __a)...@@ -4396,7 +4329,7 @@ _mm256_castpd_ps(__m256d __a)
4396/// A 256-bit floating-point vector of [4 x double].4329/// A 256-bit floating-point vector of [4 x double].
4397/// \returns A 256-bit integer vector containing the same bitwise pattern as the4330/// \returns A 256-bit integer vector containing the same bitwise pattern as the
4398/// parameter.4331/// parameter.
4399static __inline __m256i __DEFAULT_FN_ATTRS4332static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4400_mm256_castpd_si256(__m256d __a)4333_mm256_castpd_si256(__m256d __a)
4401{4334{
4402 return (__m256i)__a;4335 return (__m256i)__a;
...@@ -4413,7 +4346,7 @@ _mm256_castpd_si256(__m256d __a)...@@ -4413,7 +4346,7 @@ _mm256_castpd_si256(__m256d __a)
4413/// A 256-bit floating-point vector of [8 x float].4346/// A 256-bit floating-point vector of [8 x float].
4414/// \returns A 256-bit floating-point vector of [4 x double] containing the same4347/// \returns A 256-bit floating-point vector of [4 x double] containing the same
4415/// bitwise pattern as the parameter.4348/// bitwise pattern as the parameter.
4416static __inline __m256d __DEFAULT_FN_ATTRS4349static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
4417_mm256_castps_pd(__m256 __a)4350_mm256_castps_pd(__m256 __a)
4418{4351{
4419 return (__m256d)__a;4352 return (__m256d)__a;
...@@ -4430,7 +4363,7 @@ _mm256_castps_pd(__m256 __a)...@@ -4430,7 +4363,7 @@ _mm256_castps_pd(__m256 __a)
4430/// A 256-bit floating-point vector of [8 x float].4363/// A 256-bit floating-point vector of [8 x float].
4431/// \returns A 256-bit integer vector containing the same bitwise pattern as the4364/// \returns A 256-bit integer vector containing the same bitwise pattern as the
4432/// parameter.4365/// parameter.
4433static __inline __m256i __DEFAULT_FN_ATTRS4366static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4434_mm256_castps_si256(__m256 __a)4367_mm256_castps_si256(__m256 __a)
4435{4368{
4436 return (__m256i)__a;4369 return (__m256i)__a;
...@@ -4447,7 +4380,7 @@ _mm256_castps_si256(__m256 __a)...@@ -4447,7 +4380,7 @@ _mm256_castps_si256(__m256 __a)
4447/// A 256-bit integer vector.4380/// A 256-bit integer vector.
4448/// \returns A 256-bit floating-point vector of [8 x float] containing the same4381/// \returns A 256-bit floating-point vector of [8 x float] containing the same
4449/// bitwise pattern as the parameter.4382/// bitwise pattern as the parameter.
4450static __inline __m256 __DEFAULT_FN_ATTRS4383static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
4451_mm256_castsi256_ps(__m256i __a)4384_mm256_castsi256_ps(__m256i __a)
4452{4385{
4453 return (__m256)__a;4386 return (__m256)__a;
...@@ -4464,7 +4397,7 @@ _mm256_castsi256_ps(__m256i __a)...@@ -4464,7 +4397,7 @@ _mm256_castsi256_ps(__m256i __a)
4464/// A 256-bit integer vector.4397/// A 256-bit integer vector.
4465/// \returns A 256-bit floating-point vector of [4 x double] containing the same4398/// \returns A 256-bit floating-point vector of [4 x double] containing the same
4466/// bitwise pattern as the parameter.4399/// bitwise pattern as the parameter.
4467static __inline __m256d __DEFAULT_FN_ATTRS4400static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
4468_mm256_castsi256_pd(__m256i __a)4401_mm256_castsi256_pd(__m256i __a)
4469{4402{
4470 return (__m256d)__a;4403 return (__m256d)__a;
...@@ -4481,7 +4414,7 @@ _mm256_castsi256_pd(__m256i __a)...@@ -4481,7 +4414,7 @@ _mm256_castsi256_pd(__m256i __a)
4481/// A 256-bit floating-point vector of [4 x double].4414/// A 256-bit floating-point vector of [4 x double].
4482/// \returns A 128-bit floating-point vector of [2 x double] containing the4415/// \returns A 128-bit floating-point vector of [2 x double] containing the
4483/// lower 128 bits of the parameter.4416/// lower 128 bits of the parameter.
4484static __inline __m128d __DEFAULT_FN_ATTRS4417static __inline __m128d __DEFAULT_FN_ATTRS_CONSTEXPR
4485_mm256_castpd256_pd128(__m256d __a)4418_mm256_castpd256_pd128(__m256d __a)
4486{4419{
4487 return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 1);4420 return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 1);
...@@ -4498,7 +4431,7 @@ _mm256_castpd256_pd128(__m256d __a)...@@ -4498,7 +4431,7 @@ _mm256_castpd256_pd128(__m256d __a)
4498/// A 256-bit floating-point vector of [8 x float].4431/// A 256-bit floating-point vector of [8 x float].
4499/// \returns A 128-bit floating-point vector of [4 x float] containing the4432/// \returns A 128-bit floating-point vector of [4 x float] containing the
4500/// lower 128 bits of the parameter.4433/// lower 128 bits of the parameter.
4501static __inline __m128 __DEFAULT_FN_ATTRS4434static __inline __m128 __DEFAULT_FN_ATTRS_CONSTEXPR
4502_mm256_castps256_ps128(__m256 __a)4435_mm256_castps256_ps128(__m256 __a)
4503{4436{
4504 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 1, 2, 3);4437 return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 1, 2, 3);
...@@ -4514,7 +4447,7 @@ _mm256_castps256_ps128(__m256 __a)...@@ -4514,7 +4447,7 @@ _mm256_castps256_ps128(__m256 __a)
4514/// A 256-bit integer vector.4447/// A 256-bit integer vector.
4515/// \returns A 128-bit integer vector containing the lower 128 bits of the4448/// \returns A 128-bit integer vector containing the lower 128 bits of the
4516/// parameter.4449/// parameter.
4517static __inline __m128i __DEFAULT_FN_ATTRS4450static __inline __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4518_mm256_castsi256_si128(__m256i __a)4451_mm256_castsi256_si128(__m256i __a)
4519{4452{
4520 return __builtin_shufflevector((__v4di)__a, (__v4di)__a, 0, 1);4453 return __builtin_shufflevector((__v4di)__a, (__v4di)__a, 0, 1);
...@@ -4598,9 +4531,8 @@ _mm256_castsi128_si256(__m128i __a)...@@ -4598,9 +4531,8 @@ _mm256_castsi128_si256(__m128i __a)
4598/// A 128-bit vector of [2 x double].4531/// A 128-bit vector of [2 x double].
4599/// \returns A 256-bit floating-point vector of [4 x double]. The lower 128 bits4532/// \returns A 256-bit floating-point vector of [4 x double]. The lower 128 bits
4600/// contain the value of the parameter. The upper 128 bits are set to zero.4533/// contain the value of the parameter. The upper 128 bits are set to zero.
4601static __inline __m256d __DEFAULT_FN_ATTRS4534static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
4602_mm256_zextpd128_pd256(__m128d __a)4535_mm256_zextpd128_pd256(__m128d __a) {
4603{
4604 return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3);4536 return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3);
4605}4537}
46064538
...@@ -4616,9 +4548,8 @@ _mm256_zextpd128_pd256(__m128d __a)...@@ -4616,9 +4548,8 @@ _mm256_zextpd128_pd256(__m128d __a)
4616/// A 128-bit vector of [4 x float].4548/// A 128-bit vector of [4 x float].
4617/// \returns A 256-bit floating-point vector of [8 x float]. The lower 128 bits4549/// \returns A 256-bit floating-point vector of [8 x float]. The lower 128 bits
4618/// contain the value of the parameter. The upper 128 bits are set to zero.4550/// contain the value of the parameter. The upper 128 bits are set to zero.
4619static __inline __m256 __DEFAULT_FN_ATTRS4551static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
4620_mm256_zextps128_ps256(__m128 __a)4552_mm256_zextps128_ps256(__m128 __a) {
4621{
4622 return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7);4553 return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7);
4623}4554}
46244555
...@@ -4634,9 +4565,8 @@ _mm256_zextps128_ps256(__m128 __a)...@@ -4634,9 +4565,8 @@ _mm256_zextps128_ps256(__m128 __a)
4634/// A 128-bit integer vector.4565/// A 128-bit integer vector.
4635/// \returns A 256-bit integer vector. The lower 128 bits contain the value of4566/// \returns A 256-bit integer vector. The lower 128 bits contain the value of
4636/// the parameter. The upper 128 bits are set to zero.4567/// the parameter. The upper 128 bits are set to zero.
4637static __inline __m256i __DEFAULT_FN_ATTRS4568static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4638_mm256_zextsi128_si256(__m128i __a)4569_mm256_zextsi128_si256(__m128i __a) {
4639{
4640 return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3);4570 return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3);
4641}4571}
46424572
...@@ -4851,9 +4781,8 @@ _mm256_zextsi128_si256(__m128i __a)...@@ -4851,9 +4781,8 @@ _mm256_zextsi128_si256(__m128i __a)
4851/// 128 bits of the result.4781/// 128 bits of the result.
4852/// \returns A 256-bit floating-point vector of [8 x float] containing the4782/// \returns A 256-bit floating-point vector of [8 x float] containing the
4853/// concatenated result.4783/// concatenated result.
4854static __inline __m256 __DEFAULT_FN_ATTRS4784static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
4855_mm256_set_m128 (__m128 __hi, __m128 __lo)4785_mm256_set_m128(__m128 __hi, __m128 __lo) {
4856{
4857 return (__m256) __builtin_shufflevector((__v4sf)__lo, (__v4sf)__hi, 0, 1, 2, 3, 4, 5, 6, 7);4786 return (__m256) __builtin_shufflevector((__v4sf)__lo, (__v4sf)__hi, 0, 1, 2, 3, 4, 5, 6, 7);
4858}4787}
48594788
...@@ -4872,9 +4801,8 @@ _mm256_set_m128 (__m128 __hi, __m128 __lo)...@@ -4872,9 +4801,8 @@ _mm256_set_m128 (__m128 __hi, __m128 __lo)
4872/// 128 bits of the result.4801/// 128 bits of the result.
4873/// \returns A 256-bit floating-point vector of [4 x double] containing the4802/// \returns A 256-bit floating-point vector of [4 x double] containing the
4874/// concatenated result.4803/// concatenated result.
4875static __inline __m256d __DEFAULT_FN_ATTRS4804static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
4876_mm256_set_m128d (__m128d __hi, __m128d __lo)4805_mm256_set_m128d(__m128d __hi, __m128d __lo) {
4877{
4878 return (__m256d) __builtin_shufflevector((__v2df)__lo, (__v2df)__hi, 0, 1, 2, 3);4806 return (__m256d) __builtin_shufflevector((__v2df)__lo, (__v2df)__hi, 0, 1, 2, 3);
4879}4807}
48804808
...@@ -4892,9 +4820,8 @@ _mm256_set_m128d (__m128d __hi, __m128d __lo)...@@ -4892,9 +4820,8 @@ _mm256_set_m128d (__m128d __hi, __m128d __lo)
4892/// A 128-bit integer vector to be copied to the lower 128 bits of the4820/// A 128-bit integer vector to be copied to the lower 128 bits of the
4893/// result.4821/// result.
4894/// \returns A 256-bit integer vector containing the concatenated result.4822/// \returns A 256-bit integer vector containing the concatenated result.
4895static __inline __m256i __DEFAULT_FN_ATTRS4823static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4896_mm256_set_m128i (__m128i __hi, __m128i __lo)4824_mm256_set_m128i(__m128i __hi, __m128i __lo) {
4897{
4898 return (__m256i) __builtin_shufflevector((__v2di)__lo, (__v2di)__hi, 0, 1, 2, 3);4825 return (__m256i) __builtin_shufflevector((__v2di)__lo, (__v2di)__hi, 0, 1, 2, 3);
4899}4826}
49004827
...@@ -4915,9 +4842,8 @@ _mm256_set_m128i (__m128i __hi, __m128i __lo)...@@ -4915,9 +4842,8 @@ _mm256_set_m128i (__m128i __hi, __m128i __lo)
4915/// 128 bits of the result.4842/// 128 bits of the result.
4916/// \returns A 256-bit floating-point vector of [8 x float] containing the4843/// \returns A 256-bit floating-point vector of [8 x float] containing the
4917/// concatenated result.4844/// concatenated result.
4918static __inline __m256 __DEFAULT_FN_ATTRS4845static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR
4919_mm256_setr_m128 (__m128 __lo, __m128 __hi)4846_mm256_setr_m128(__m128 __lo, __m128 __hi) {
4920{
4921 return _mm256_set_m128(__hi, __lo);4847 return _mm256_set_m128(__hi, __lo);
4922}4848}
49234849
...@@ -4938,9 +4864,8 @@ _mm256_setr_m128 (__m128 __lo, __m128 __hi)...@@ -4938,9 +4864,8 @@ _mm256_setr_m128 (__m128 __lo, __m128 __hi)
4938/// 128 bits of the result.4864/// 128 bits of the result.
4939/// \returns A 256-bit floating-point vector of [4 x double] containing the4865/// \returns A 256-bit floating-point vector of [4 x double] containing the
4940/// concatenated result.4866/// concatenated result.
4941static __inline __m256d __DEFAULT_FN_ATTRS4867static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR
4942_mm256_setr_m128d (__m128d __lo, __m128d __hi)4868_mm256_setr_m128d(__m128d __lo, __m128d __hi) {
4943{
4944 return (__m256d)_mm256_set_m128d(__hi, __lo);4869 return (__m256d)_mm256_set_m128d(__hi, __lo);
4945}4870}
49464871
...@@ -4959,9 +4884,8 @@ _mm256_setr_m128d (__m128d __lo, __m128d __hi)...@@ -4959,9 +4884,8 @@ _mm256_setr_m128d (__m128d __lo, __m128d __hi)
4959/// A 128-bit integer vector to be copied to the upper 128 bits of the4884/// A 128-bit integer vector to be copied to the upper 128 bits of the
4960/// result.4885/// result.
4961/// \returns A 256-bit integer vector containing the concatenated result.4886/// \returns A 256-bit integer vector containing the concatenated result.
4962static __inline __m256i __DEFAULT_FN_ATTRS4887static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR
4963_mm256_setr_m128i (__m128i __lo, __m128i __hi)4888_mm256_setr_m128i(__m128i __lo, __m128i __hi) {
4964{
4965 return (__m256i)_mm256_set_m128i(__hi, __lo);4889 return (__m256i)_mm256_set_m128i(__hi, __lo);
4966}4890}
49674891
lib/include/avxvnniint16intrin.h+118-99
...@@ -16,9 +16,10 @@...@@ -16,9 +16,10 @@
16#define __AVXVNNIINT16INTRIN_H16#define __AVXVNNIINT16INTRIN_H
1717
18/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with18/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
19/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate19/// corresponding unsigned 16-bit integers in \a __B, producing 2
20/// signed 16-bit results. Sum these 2 results with the corresponding20/// intermediate signed 16-bit results. Sum these 2 results with the
21/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.21/// corresponding 32-bit integer in \a __W, and store the packed 32-bit
22/// results in \a dst.
22///23///
23/// \headerfile <immintrin.h>24/// \headerfile <immintrin.h>
24///25///
...@@ -40,19 +41,21 @@...@@ -40,19 +41,21 @@
40/// \code{.operation}41/// \code{.operation}
41/// FOR j := 0 to 342/// FOR j := 0 to 3
42/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])43/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])
43/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])44/// tmp2.dword :=
45/// SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])
44/// dst.dword[j] := __W.dword[j] + tmp1 + tmp246/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2
45/// ENDFOR47/// ENDFOR
46/// dst[MAX:128] := 048/// dst[MAX:128] := 0
47/// \endcode49/// \endcode
48#define _mm_dpwsud_epi32(__W, __A, __B) \50#define _mm_dpwsud_epi32(__W, __A, __B) \
49 ((__m128i)__builtin_ia32_vpdpwsud128((__v4si)(__W), (__v4si)(__A), \51 ((__m128i)__builtin_ia32_vpdpwsud128((__v4si)(__W), (__v8hi)(__A), \
50 (__v4si)(__B)))52 (__v8hu)(__B)))
5153
52/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with54/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
53/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate55/// corresponding unsigned 16-bit integers in \a __B, producing 2
54/// signed 16-bit results. Sum these 2 results with the corresponding56/// intermediate signed 16-bit results. Sum these 2 results with the
55/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.57/// corresponding 32-bit integer in \a __W, and store the packed 32-bit
58/// results in \a dst.
56///59///
57/// \headerfile <immintrin.h>60/// \headerfile <immintrin.h>
58///61///
...@@ -74,20 +77,21 @@...@@ -74,20 +77,21 @@
74/// \code{.operation}77/// \code{.operation}
75/// FOR j := 0 to 778/// FOR j := 0 to 7
76/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])79/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])
77/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])80/// tmp2.dword :=
78/// dst.dword[j] := __W.dword[j] + tmp1 + tmp281/// SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])
82/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2
79/// ENDFOR83/// ENDFOR
80/// dst[MAX:256] := 084/// dst[MAX:256] := 0
81/// \endcode85/// \endcode
82#define _mm256_dpwsud_epi32(__W, __A, __B) \86#define _mm256_dpwsud_epi32(__W, __A, __B) \
83 ((__m256i)__builtin_ia32_vpdpwsud256((__v8si)(__W), (__v8si)(__A), \87 ((__m256i)__builtin_ia32_vpdpwsud256((__v8si)(__W), (__v16hi)(__A), \
84 (__v8si)(__B)))88 (__v16hu)(__B)))
8589
86/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with90/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
87/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate91/// corresponding unsigned 16-bit integers in \a __B, producing 2
88/// signed 16-bit results. Sum these 2 results with the corresponding92/// intermediate signed 16-bit results. Sum these 2 results with the
89/// 32-bit integer in \a __W with signed saturation, and store the packed93/// corresponding 32-bit integer in \a __W with signed saturation, and store
90/// 32-bit results in \a dst.94/// the packed 32-bit results in \a dst.
91///95///
92/// \headerfile <immintrin.h>96/// \headerfile <immintrin.h>
93///97///
...@@ -109,20 +113,22 @@...@@ -109,20 +113,22 @@
109/// \code{.operation}113/// \code{.operation}
110/// FOR j := 0 to 3114/// FOR j := 0 to 3
111/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])115/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])
112/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])116/// tmp2.dword :=
117/// SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])
113/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)118/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)
114/// ENDFOR119/// ENDFOR
115/// dst[MAX:128] := 0120/// dst[MAX:128] := 0
116/// \endcode121/// \endcode
122/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
117#define _mm_dpwsuds_epi32(__W, __A, __B) \123#define _mm_dpwsuds_epi32(__W, __A, __B) \
118 ((__m128i)__builtin_ia32_vpdpwsuds128((__v4si)(__W), (__v4si)(__A), \124 ((__m128i)__builtin_ia32_vpdpwsuds128((__v4si)(__W), (__v8hi)(__A), \
119 (__v4si)(__B)))125 (__v8hu)(__B)))
120126
121/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with127/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
122/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate128/// corresponding unsigned 16-bit integers in \a __B, producing 2
123/// signed 16-bit results. Sum these 2 results with the corresponding129/// intermediate signed 16-bit results. Sum these 2 results with the
124/// 32-bit integer in \a __W with signed saturation, and store the packed130/// corresponding 32-bit integer in \a __W with signed saturation, and store
125/// 32-bit results in \a dst.131/// the packed 32-bit results in \a dst.
126///132///
127/// \headerfile <immintrin.h>133/// \headerfile <immintrin.h>
128///134///
...@@ -144,19 +150,21 @@...@@ -144,19 +150,21 @@
144/// \code{.operation}150/// \code{.operation}
145/// FOR j := 0 to 7151/// FOR j := 0 to 7
146/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])152/// tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])
147/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])153/// tmp2.dword :=
154/// SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])
148/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)155/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)
149/// ENDFOR156/// ENDFOR
150/// dst[MAX:256] := 0157/// dst[MAX:256] := 0
151/// \endcode158/// \endcode
152#define _mm256_dpwsuds_epi32(__W, __A, __B) \159#define _mm256_dpwsuds_epi32(__W, __A, __B) \
153 ((__m256i)__builtin_ia32_vpdpwsuds256((__v8si)(__W), (__v8si)(__A), \160 ((__m256i)__builtin_ia32_vpdpwsuds256((__v8si)(__W), (__v16hi)(__A), \
154 (__v8si)(__B)))161 (__v16hu)(__B)))
155162
156/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with163/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A
157/// corresponding signed 16-bit integers in \a __B, producing 2 intermediate164/// with corresponding signed 16-bit integers in \a __B, producing 2
158/// signed 16-bit results. Sum these 2 results with the corresponding165/// intermediate signed 16-bit results. Sum these 2 results with the
159/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.166/// corresponding 32-bit integer in \a __W, and store the packed 32-bit
167/// results in \a dst.
160///168///
161/// \headerfile <immintrin.h>169/// \headerfile <immintrin.h>
162///170///
...@@ -178,19 +186,21 @@...@@ -178,19 +186,21 @@
178/// \code{.operation}186/// \code{.operation}
179/// FOR j := 0 to 3187/// FOR j := 0 to 3
180/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])188/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
181/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])189/// tmp2.dword :=
190/// ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
182/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2191/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2
183/// ENDFOR192/// ENDFOR
184/// dst[MAX:128] := 0193/// dst[MAX:128] := 0
185/// \endcode194/// \endcode
186#define _mm_dpwusd_epi32(__W, __A, __B) \195#define _mm_dpwusd_epi32(__W, __A, __B) \
187 ((__m128i)__builtin_ia32_vpdpwusd128((__v4si)(__W), (__v4si)(__A), \196 ((__m128i)__builtin_ia32_vpdpwusd128((__v4si)(__W), (__v8hu)(__A), \
188 (__v4si)(__B)))197 (__v8hi)(__B)))
189198
190/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with199/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A
191/// corresponding signed 16-bit integers in \a __B, producing 2 intermediate200/// with corresponding signed 16-bit integers in \a __B, producing 2
192/// signed 16-bit results. Sum these 2 results with the corresponding201/// intermediate signed 16-bit results. Sum these 2 results with the
193/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.202/// corresponding 32-bit integer in \a __W, and store the packed 32-bit
203/// results in \a dst.
194///204///
195/// \headerfile <immintrin.h>205/// \headerfile <immintrin.h>
196///206///
...@@ -212,20 +222,21 @@...@@ -212,20 +222,21 @@
212/// \code{.operation}222/// \code{.operation}
213/// FOR j := 0 to 7223/// FOR j := 0 to 7
214/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])224/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
215/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])225/// tmp2.dword :=
226/// ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
216/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2227/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2
217/// ENDFOR228/// ENDFOR
218/// dst[MAX:256] := 0229/// dst[MAX:256] := 0
219/// \endcode230/// \endcode
220#define _mm256_dpwusd_epi32(__W, __A, __B) \231#define _mm256_dpwusd_epi32(__W, __A, __B) \
221 ((__m256i)__builtin_ia32_vpdpwusd256((__v8si)(__W), (__v8si)(__A), \232 ((__m256i)__builtin_ia32_vpdpwusd256((__v8si)(__W), (__v16hu)(__A), \
222 (__v8si)(__B)))233 (__v16hi)(__B)))
223234
224/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with235/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A
225/// corresponding signed 16-bit integers in \a __B, producing 2 intermediate236/// with corresponding signed 16-bit integers in \a __B, producing 2
226/// signed 16-bit results. Sum these 2 results with the corresponding237/// intermediate signed 16-bit results. Sum these 2 results with the
227/// 32-bit integer in \a __W with signed saturation, and store the packed238/// corresponding 32-bit integer in \a __W with signed saturation, and
228/// 32-bit results in \a dst.239/// store the packed 32-bit results in \a dst.
229///240///
230/// \headerfile <immintrin.h>241/// \headerfile <immintrin.h>
231///242///
...@@ -233,7 +244,7 @@...@@ -233,7 +244,7 @@
233/// __m128i _mm_dpwusds_epi32(__m128i __W, __m128i __A, __m128i __B)244/// __m128i _mm_dpwusds_epi32(__m128i __W, __m128i __A, __m128i __B)
234/// \endcode245/// \endcode
235///246///
236/// This intrinsic corresponds to the \c VPDPWSUDS instruction.247/// This intrinsic corresponds to the \c VPDPWUSDS instruction.
237///248///
238/// \param __W249/// \param __W
239/// A 128-bit vector of [4 x int].250/// A 128-bit vector of [4 x int].
...@@ -247,20 +258,21 @@...@@ -247,20 +258,21 @@
247/// \code{.operation}258/// \code{.operation}
248/// FOR j := 0 to 3259/// FOR j := 0 to 3
249/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])260/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
250/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])261/// tmp2.dword :=
262/// ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
251/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)263/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)
252/// ENDFOR264/// ENDFOR
253/// dst[MAX:128] := 0265/// dst[MAX:128] := 0
254/// \endcode266/// \endcode
255#define _mm_dpwusds_epi32(__W, __A, __B) \267#define _mm_dpwusds_epi32(__W, __A, __B) \
256 ((__m128i)__builtin_ia32_vpdpwusds128((__v4si)(__W), (__v4si)(__A), \268 ((__m128i)__builtin_ia32_vpdpwusds128((__v4si)(__W), (__v8hu)(__A), \
257 (__v4si)(__B)))269 (__v8hi)(__B)))
258270
259/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with271/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A
260/// corresponding signed 16-bit integers in \a __B, producing 2 intermediate272/// with corresponding signed 16-bit integers in \a __B, producing 2
261/// signed 16-bit results. Sum these 2 results with the corresponding273/// intermediate signed 16-bit results. Sum these 2 results with the
262/// 32-bit integer in \a __W with signed saturation, and store the packed274/// corresponding 32-bit integer in \a __W with signed saturation, and
263/// 32-bit results in \a dst.275/// store the packed 32-bit results in \a dst.
264///276///
265/// \headerfile <immintrin.h>277/// \headerfile <immintrin.h>
266///278///
...@@ -268,7 +280,7 @@...@@ -268,7 +280,7 @@
268/// __m256i _mm256_dpwsuds_epi32(__m256i __W, __m256i __A, __m256i __B)280/// __m256i _mm256_dpwsuds_epi32(__m256i __W, __m256i __A, __m256i __B)
269/// \endcode281/// \endcode
270///282///
271/// This intrinsic corresponds to the \c VPDPWSUDS instruction.283/// This intrinsic corresponds to the \c VPDPWUSDS instruction.
272///284///
273/// \param __W285/// \param __W
274/// A 256-bit vector of [8 x int].286/// A 256-bit vector of [8 x int].
...@@ -282,19 +294,21 @@...@@ -282,19 +294,21 @@
282/// \code{.operation}294/// \code{.operation}
283/// FOR j := 0 to 7295/// FOR j := 0 to 7
284/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])296/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
285/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])297/// tmp2.dword :=
298/// ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
286/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)299/// dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)
287/// ENDFOR300/// ENDFOR
288/// dst[MAX:256] := 0301/// dst[MAX:256] := 0
289/// \endcode302/// \endcode
290#define _mm256_dpwusds_epi32(__W, __A, __B) \303#define _mm256_dpwusds_epi32(__W, __A, __B) \
291 ((__m256i)__builtin_ia32_vpdpwusds256((__v8si)(__W), (__v8si)(__A), \304 ((__m256i)__builtin_ia32_vpdpwusds256((__v8si)(__W), (__v16hu)(__A), \
292 (__v8si)(__B)))305 (__v16hi)(__B)))
293306
294/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with307/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A
295/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate308/// with corresponding unsigned 16-bit integers in \a __B, producing 2
296/// signed 16-bit results. Sum these 2 results with the corresponding309/// intermediate signed 16-bit results. Sum these 2 results with the
297/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.310/// corresponding 32-bit integer in \a __W, and store the packed 32-bit
311/// results in \a dst.
298///312///
299/// \headerfile <immintrin.h>313/// \headerfile <immintrin.h>
300///314///
...@@ -305,30 +319,32 @@...@@ -305,30 +319,32 @@
305/// This intrinsic corresponds to the \c VPDPWUUD instruction.319/// This intrinsic corresponds to the \c VPDPWUUD instruction.
306///320///
307/// \param __W321/// \param __W
308/// A 128-bit vector of [4 x unsigned int].322/// A 128-bit vector of [4 x int].
309/// \param __A323/// \param __A
310/// A 128-bit vector of [8 x unsigned short].324/// A 128-bit vector of [8 x unsigned short].
311/// \param __B325/// \param __B
312/// A 128-bit vector of [8 x unsigned short].326/// A 128-bit vector of [8 x unsigned short].
313/// \returns327/// \returns
314/// A 128-bit vector of [4 x unsigned int].328/// A 128-bit vector of [4 x int].
315///329///
316/// \code{.operation}330/// \code{.operation}
317/// FOR j := 0 to 3331/// FOR j := 0 to 3
318/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])332/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])
319/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])333/// tmp2.dword :=
334/// ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])
320/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2335/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2
321/// ENDFOR336/// ENDFOR
322/// dst[MAX:128] := 0337/// dst[MAX:128] := 0
323/// \endcode338/// \endcode
324#define _mm_dpwuud_epi32(__W, __A, __B) \339#define _mm_dpwuud_epi32(__W, __A, __B) \
325 ((__m128i)__builtin_ia32_vpdpwuud128((__v4si)(__W), (__v4si)(__A), \340 ((__m128i)__builtin_ia32_vpdpwuud128((__v4si)(__W), (__v8hu)(__A), \
326 (__v4si)(__B)))341 (__v8hu)(__B)))
327342
328/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with343/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A
329/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate344/// with corresponding unsigned 16-bit integers in \a __B, producing 2
330/// signed 16-bit results. Sum these 2 results with the corresponding345/// intermediate signed 16-bit results. Sum these 2 results with the
331/// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.346/// corresponding 32-bit integer in \a __W, and store the packed 32-bit
347/// results in \a dst.
332///348///
333/// \headerfile <immintrin.h>349/// \headerfile <immintrin.h>
334///350///
...@@ -339,31 +355,32 @@...@@ -339,31 +355,32 @@
339/// This intrinsic corresponds to the \c VPDPWUUD instruction.355/// This intrinsic corresponds to the \c VPDPWUUD instruction.
340///356///
341/// \param __W357/// \param __W
342/// A 256-bit vector of [8 x unsigned int].358/// A 256-bit vector of [8 x int].
343/// \param __A359/// \param __A
344/// A 256-bit vector of [16 x unsigned short].360/// A 256-bit vector of [16 x unsigned short].
345/// \param __B361/// \param __B
346/// A 256-bit vector of [16 x unsigned short].362/// A 256-bit vector of [16 x unsigned short].
347/// \returns363/// \returns
348/// A 256-bit vector of [8 x unsigned int].364/// A 256-bit vector of [8 x int].
349///365///
350/// \code{.operation}366/// \code{.operation}
351/// FOR j := 0 to 7367/// FOR j := 0 to 7
352/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])368/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])
353/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])369/// tmp2.dword :=
370/// ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])
354/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2371/// dst.dword[j] := __W.dword[j] + tmp1 + tmp2
355/// ENDFOR372/// ENDFOR
356/// dst[MAX:256] := 0373/// dst[MAX:256] := 0
357/// \endcode374/// \endcode
358#define _mm256_dpwuud_epi32(__W, __A, __B) \375#define _mm256_dpwuud_epi32(__W, __A, __B) \
359 ((__m256i)__builtin_ia32_vpdpwuud256((__v8si)(__W), (__v8si)(__A), \376 ((__m256i)__builtin_ia32_vpdpwuud256((__v8si)(__W), (__v16hu)(__A), \
360 (__v8si)(__B)))377 (__v16hu)(__B)))
361378
362/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with379/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A
363/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate380/// with corresponding unsigned 16-bit integers in \a __B, producing 2
364/// signed 16-bit results. Sum these 2 results with the corresponding381/// intermediate signed 16-bit results. Sum these 2 results with the
365/// 32-bit integer in \a __W with signed saturation, and store the packed382/// corresponding 32-bit integer in \a __W with signed saturation, and store
366/// 32-bit results in \a dst.383/// the packed 32-bit results in \a dst.
367///384///
368/// \headerfile <immintrin.h>385/// \headerfile <immintrin.h>
369///386///
...@@ -371,34 +388,35 @@...@@ -371,34 +388,35 @@
371/// __m128i _mm_dpwsuds_epi32(__m128i __W, __m128i __A, __m128i __B)388/// __m128i _mm_dpwsuds_epi32(__m128i __W, __m128i __A, __m128i __B)
372/// \endcode389/// \endcode
373///390///
374/// This intrinsic corresponds to the \c VPDPWSUDS instruction.391/// This intrinsic corresponds to the \c VPDPWUUDS instruction.
375///392///
376/// \param __W393/// \param __W
377/// A 128-bit vector of [4 x unsigned int].394/// A 128-bit vector of [4 x int].
378/// \param __A395/// \param __A
379/// A 128-bit vector of [8 x unsigned short].396/// A 128-bit vector of [8 x unsigned short].
380/// \param __B397/// \param __B
381/// A 128-bit vector of [8 x unsigned short].398/// A 128-bit vector of [8 x unsigned short].
382/// \returns399/// \returns
383/// A 128-bit vector of [4 x unsigned int].400/// A 128-bit vector of [4 x int].
384///401///
385/// \code{.operation}402/// \code{.operation}
386/// FOR j := 0 to 3403/// FOR j := 0 to 3
387/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])404/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])
388/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])405/// tmp2.dword :=
406/// ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])
389/// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)407/// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)
390/// ENDFOR408/// ENDFOR
391/// dst[MAX:128] := 0409/// dst[MAX:128] := 0
392/// \endcode410/// \endcode
393#define _mm_dpwuuds_epi32(__W, __A, __B) \411#define _mm_dpwuuds_epi32(__W, __A, __B) \
394 ((__m128i)__builtin_ia32_vpdpwuuds128((__v4si)(__W), (__v4si)(__A), \412 ((__m128i)__builtin_ia32_vpdpwuuds128((__v4si)(__W), (__v8hu)(__A), \
395 (__v4si)(__B)))413 (__v8hu)(__B)))
396414
397/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with415/// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A
398/// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate416/// with corresponding unsigned 16-bit integers in \a __B, producing 2
399/// signed 16-bit results. Sum these 2 results with the corresponding417/// intermediate signed 16-bit results. Sum these 2 results with the
400/// 32-bit integer in \a __W with signed saturation, and store the packed418/// corresponding 32-bit integer in \a __W with signed saturation, and store
401/// 32-bit results in \a dst.419/// the packed 32-bit results in \a dst.
402///420///
403/// \headerfile <immintrin.h>421/// \headerfile <immintrin.h>
404///422///
...@@ -406,27 +424,28 @@...@@ -406,27 +424,28 @@
406/// __m256i _mm256_dpwuuds_epi32(__m256i __W, __m256i __A, __m256i __B)424/// __m256i _mm256_dpwuuds_epi32(__m256i __W, __m256i __A, __m256i __B)
407/// \endcode425/// \endcode
408///426///
409/// This intrinsic corresponds to the \c VPDPWSUDS instruction.427/// This intrinsic corresponds to the \c VPDPWUUDS instruction.
410///428///
411/// \param __W429/// \param __W
412/// A 256-bit vector of [8 x unsigned int].430/// A 256-bit vector of [8 x int].
413/// \param __A431/// \param __A
414/// A 256-bit vector of [16 x unsigned short].432/// A 256-bit vector of [16 x unsigned short].
415/// \param __B433/// \param __B
416/// A 256-bit vector of [16 x unsigned short].434/// A 256-bit vector of [16 x unsigned short].
417/// \returns435/// \returns
418/// A 256-bit vector of [8 x unsigned int].436/// A 256-bit vector of [8 x int].
419///437///
420/// \code{.operation}438/// \code{.operation}
421/// FOR j := 0 to 7439/// FOR j := 0 to 7
422/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])440/// tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j])
423/// tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])441/// tmp2.dword :=
442/// ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1])
424/// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)443/// dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2)
425/// ENDFOR444/// ENDFOR
426/// dst[MAX:256] := 0445/// dst[MAX:256] := 0
427/// \endcode446/// \endcode
428#define _mm256_dpwuuds_epi32(__W, __A, __B) \447#define _mm256_dpwuuds_epi32(__W, __A, __B) \
429 ((__m256i)__builtin_ia32_vpdpwuuds256((__v8si)(__W), (__v8si)(__A), \448 ((__m256i)__builtin_ia32_vpdpwuuds256((__v8si)(__W), (__v16hu)(__A), \
430 (__v8si)(__B)))449 (__v16hu)(__B)))
431450
432#endif // __AVXVNNIINT16INTRIN_H451#endif // __AVXVNNIINT16INTRIN_H
lib/include/avxvnniint8intrin.h+56-32
...@@ -14,6 +14,7 @@...@@ -14,6 +14,7 @@
14#ifndef __AVXVNNIINT8INTRIN_H14#ifndef __AVXVNNIINT8INTRIN_H
15#define __AVXVNNIINT8INTRIN_H15#define __AVXVNNIINT8INTRIN_H
1616
17// clang-format off
17/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with18/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
18/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate19/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate
19/// signed 16-bit results. Sum these 4 results with the corresponding20/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -44,10 +45,12 @@...@@ -44,10 +45,12 @@
44/// ENDFOR45/// ENDFOR
45/// dst[MAX:128] := 046/// dst[MAX:128] := 0
46/// \endcode47/// \endcode
48// clang-format on
47#define _mm_dpbssd_epi32(__W, __A, __B) \49#define _mm_dpbssd_epi32(__W, __A, __B) \
48 ((__m128i)__builtin_ia32_vpdpbssd128((__v4si)(__W), (__v4si)(__A), \50 ((__m128i)__builtin_ia32_vpdpbssd128((__v4si)(__W), (__v16qi)(__A), \
49 (__v4si)(__B)))51 (__v16qi)(__B)))
5052
53// clang-format off
51/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with54/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
52/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate55/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate
53/// signed 16-bit results. Sum these 4 results with the corresponding56/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -78,10 +81,12 @@...@@ -78,10 +81,12 @@
78/// ENDFOR81/// ENDFOR
79/// dst[MAX:256] := 082/// dst[MAX:256] := 0
80/// \endcode83/// \endcode
84// clang-format on
81#define _mm256_dpbssd_epi32(__W, __A, __B) \85#define _mm256_dpbssd_epi32(__W, __A, __B) \
82 ((__m256i)__builtin_ia32_vpdpbssd256((__v8si)(__W), (__v8si)(__A), \86 ((__m256i)__builtin_ia32_vpdpbssd256((__v8si)(__W), (__v32qi)(__A), \
83 (__v8si)(__B)))87 (__v32qi)(__B)))
8488
89// clang-format off
85/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with90/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
86/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate91/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate
87/// signed 16-bit results. Sum these 4 results with the corresponding92/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -94,7 +99,7 @@...@@ -94,7 +99,7 @@
94/// _mm_dpbssds_epi32( __m128i __W, __m128i __A, __m128i __B);99/// _mm_dpbssds_epi32( __m128i __W, __m128i __A, __m128i __B);
95/// \endcode100/// \endcode
96///101///
97/// This intrinsic corresponds to the \c VPDPBSSD instruction.102/// This intrinsic corresponds to the \c VPDPBSSDS instruction.
98///103///
99/// \param __A104/// \param __A
100/// A 128-bit vector of [16 x char].105/// A 128-bit vector of [16 x char].
...@@ -113,10 +118,12 @@...@@ -113,10 +118,12 @@
113/// ENDFOR118/// ENDFOR
114/// dst[MAX:128] := 0119/// dst[MAX:128] := 0
115/// \endcode120/// \endcode
121// clang-format on
116#define _mm_dpbssds_epi32(__W, __A, __B) \122#define _mm_dpbssds_epi32(__W, __A, __B) \
117 ((__m128i)__builtin_ia32_vpdpbssds128((__v4si)(__W), (__v4si)(__A), \123 ((__m128i)__builtin_ia32_vpdpbssds128((__v4si)(__W), (__v16qi)(__A), \
118 (__v4si)(__B)))124 (__v16qi)(__B)))
119125
126// clang-format off
120/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with127/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
121/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate128/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate
122/// signed 16-bit results. Sum these 4 results with the corresponding129/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -129,7 +136,7 @@...@@ -129,7 +136,7 @@
129/// _mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B);136/// _mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B);
130/// \endcode137/// \endcode
131///138///
132/// This intrinsic corresponds to the \c VPDPBSSD instruction.139/// This intrinsic corresponds to the \c VPDPBSSDS instruction.
133///140///
134/// \param __A141/// \param __A
135/// A 256-bit vector of [32 x char].142/// A 256-bit vector of [32 x char].
...@@ -148,10 +155,12 @@...@@ -148,10 +155,12 @@
148/// ENDFOR155/// ENDFOR
149/// dst[MAX:256] := 0156/// dst[MAX:256] := 0
150/// \endcode157/// \endcode
158// clang-format on
151#define _mm256_dpbssds_epi32(__W, __A, __B) \159#define _mm256_dpbssds_epi32(__W, __A, __B) \
152 ((__m256i)__builtin_ia32_vpdpbssds256((__v8si)(__W), (__v8si)(__A), \160 ((__m256i)__builtin_ia32_vpdpbssds256((__v8si)(__W), (__v32qi)(__A), \
153 (__v8si)(__B)))161 (__v32qi)(__B)))
154162
163// clang-format off
155/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with164/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
156/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate165/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
157/// signed 16-bit results. Sum these 4 results with the corresponding166/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -163,7 +172,7 @@...@@ -163,7 +172,7 @@
163/// _mm_dpbsud_epi32(__m128i __W, __m128i __A, __m128i __B);172/// _mm_dpbsud_epi32(__m128i __W, __m128i __A, __m128i __B);
164/// \endcode173/// \endcode
165///174///
166/// This intrinsic corresponds to the \c VPDPBSSD instruction.175/// This intrinsic corresponds to the \c VPDPBSUD instruction.
167///176///
168/// \param __A177/// \param __A
169/// A 128-bit vector of [16 x char].178/// A 128-bit vector of [16 x char].
...@@ -182,10 +191,12 @@...@@ -182,10 +191,12 @@
182/// ENDFOR191/// ENDFOR
183/// dst[MAX:128] := 0192/// dst[MAX:128] := 0
184/// \endcode193/// \endcode
194// clang-format on
185#define _mm_dpbsud_epi32(__W, __A, __B) \195#define _mm_dpbsud_epi32(__W, __A, __B) \
186 ((__m128i)__builtin_ia32_vpdpbsud128((__v4si)(__W), (__v4si)(__A), \196 ((__m128i)__builtin_ia32_vpdpbsud128((__v4si)(__W), (__v16qi)(__A), \
187 (__v4si)(__B)))197 (__v16qu)(__B)))
188198
199// clang-format off
189/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with200/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
190/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate201/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
191/// signed 16-bit results. Sum these 4 results with the corresponding202/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -197,7 +208,7 @@...@@ -197,7 +208,7 @@
197/// _mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B);208/// _mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B);
198/// \endcode209/// \endcode
199///210///
200/// This intrinsic corresponds to the \c VPDPBSSD instruction.211/// This intrinsic corresponds to the \c VPDPBSUD instruction.
201///212///
202/// \param __A213/// \param __A
203/// A 256-bit vector of [32 x char].214/// A 256-bit vector of [32 x char].
...@@ -216,10 +227,12 @@...@@ -216,10 +227,12 @@
216/// ENDFOR227/// ENDFOR
217/// dst[MAX:256] := 0228/// dst[MAX:256] := 0
218/// \endcode229/// \endcode
230// clang-format on
219#define _mm256_dpbsud_epi32(__W, __A, __B) \231#define _mm256_dpbsud_epi32(__W, __A, __B) \
220 ((__m256i)__builtin_ia32_vpdpbsud256((__v8si)(__W), (__v8si)(__A), \232 ((__m256i)__builtin_ia32_vpdpbsud256((__v8si)(__W), (__v32qi)(__A), \
221 (__v8si)(__B)))233 (__v32qu)(__B)))
222234
235// clang-format off
223/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with236/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
224/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate237/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
225/// signed 16-bit results. Sum these 4 results with the corresponding238/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -232,7 +245,7 @@...@@ -232,7 +245,7 @@
232/// _mm_dpbsuds_epi32( __m128i __W, __m128i __A, __m128i __B);245/// _mm_dpbsuds_epi32( __m128i __W, __m128i __A, __m128i __B);
233/// \endcode246/// \endcode
234///247///
235/// This intrinsic corresponds to the \c VPDPBSSD instruction.248/// This intrinsic corresponds to the \c VPDPBSUDS instruction.
236///249///
237/// \param __A250/// \param __A
238/// A 128-bit vector of [16 x char].251/// A 128-bit vector of [16 x char].
...@@ -251,10 +264,12 @@...@@ -251,10 +264,12 @@
251/// ENDFOR264/// ENDFOR
252/// dst[MAX:128] := 0265/// dst[MAX:128] := 0
253/// \endcode266/// \endcode
267// clang-format on
254#define _mm_dpbsuds_epi32(__W, __A, __B) \268#define _mm_dpbsuds_epi32(__W, __A, __B) \
255 ((__m128i)__builtin_ia32_vpdpbsuds128((__v4si)(__W), (__v4si)(__A), \269 ((__m128i)__builtin_ia32_vpdpbsuds128((__v4si)(__W), (__v16qi)(__A), \
256 (__v4si)(__B)))270 (__v16qu)(__B)))
257271
272// clang-format off
258/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with273/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
259/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate274/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
260/// signed 16-bit results. Sum these 4 results with the corresponding275/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -267,7 +282,7 @@...@@ -267,7 +282,7 @@
267/// _mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B);282/// _mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B);
268/// \endcode283/// \endcode
269///284///
270/// This intrinsic corresponds to the \c VPDPBSSD instruction.285/// This intrinsic corresponds to the \c VPDPBSUDS instruction.
271///286///
272/// \param __A287/// \param __A
273/// A 256-bit vector of [32 x char].288/// A 256-bit vector of [32 x char].
...@@ -286,10 +301,12 @@...@@ -286,10 +301,12 @@
286/// ENDFOR301/// ENDFOR
287/// dst[MAX:256] := 0302/// dst[MAX:256] := 0
288/// \endcode303/// \endcode
304// clang-format on
289#define _mm256_dpbsuds_epi32(__W, __A, __B) \305#define _mm256_dpbsuds_epi32(__W, __A, __B) \
290 ((__m256i)__builtin_ia32_vpdpbsuds256((__v8si)(__W), (__v8si)(__A), \306 ((__m256i)__builtin_ia32_vpdpbsuds256((__v8si)(__W), (__v32qi)(__A), \
291 (__v8si)(__B)))307 (__v32qu)(__B)))
292308
309// clang-format off
293/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with310/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
294/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate311/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
295/// signed 16-bit results. Sum these 4 results with the corresponding312/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -301,7 +318,7 @@...@@ -301,7 +318,7 @@
301/// _mm_dpbuud_epi32(__m128i __W, __m128i __A, __m128i __B);318/// _mm_dpbuud_epi32(__m128i __W, __m128i __A, __m128i __B);
302/// \endcode319/// \endcode
303///320///
304/// This intrinsic corresponds to the \c VPDPBSSD instruction.321/// This intrinsic corresponds to the \c VPDPBUUD instruction.
305///322///
306/// \param __A323/// \param __A
307/// A 128-bit vector of [16 x unsigned char].324/// A 128-bit vector of [16 x unsigned char].
...@@ -320,10 +337,12 @@...@@ -320,10 +337,12 @@
320/// ENDFOR337/// ENDFOR
321/// dst[MAX:128] := 0338/// dst[MAX:128] := 0
322/// \endcode339/// \endcode
340// clang-format on
323#define _mm_dpbuud_epi32(__W, __A, __B) \341#define _mm_dpbuud_epi32(__W, __A, __B) \
324 ((__m128i)__builtin_ia32_vpdpbuud128((__v4si)(__W), (__v4si)(__A), \342 ((__m128i)__builtin_ia32_vpdpbuud128((__v4si)(__W), (__v16qu)(__A), \
325 (__v4si)(__B)))343 (__v16qu)(__B)))
326344
345// clang-format off
327/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with346/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
328/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate347/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
329/// signed 16-bit results. Sum these 4 results with the corresponding348/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -335,7 +354,7 @@...@@ -335,7 +354,7 @@
335/// _mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B);354/// _mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B);
336/// \endcode355/// \endcode
337///356///
338/// This intrinsic corresponds to the \c VPDPBSSD instruction.357/// This intrinsic corresponds to the \c VPDPBUUD instruction.
339///358///
340/// \param __A359/// \param __A
341/// A 256-bit vector of [32 x unsigned char].360/// A 256-bit vector of [32 x unsigned char].
...@@ -354,10 +373,12 @@...@@ -354,10 +373,12 @@
354/// ENDFOR373/// ENDFOR
355/// dst[MAX:256] := 0374/// dst[MAX:256] := 0
356/// \endcode375/// \endcode
376// clang-format on
357#define _mm256_dpbuud_epi32(__W, __A, __B) \377#define _mm256_dpbuud_epi32(__W, __A, __B) \
358 ((__m256i)__builtin_ia32_vpdpbuud256((__v8si)(__W), (__v8si)(__A), \378 ((__m256i)__builtin_ia32_vpdpbuud256((__v8si)(__W), (__v32qu)(__A), \
359 (__v8si)(__B)))379 (__v32qu)(__B)))
360380
381// clang-format off
361/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with382/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
362/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate383/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
363/// signed 16-bit results. Sum these 4 results with the corresponding384/// signed 16-bit results. Sum these 4 results with the corresponding
...@@ -389,10 +410,12 @@...@@ -389,10 +410,12 @@
389/// ENDFOR410/// ENDFOR
390/// dst[MAX:128] := 0411/// dst[MAX:128] := 0
391/// \endcode412/// \endcode
413// clang-format on
392#define _mm_dpbuuds_epi32(__W, __A, __B) \414#define _mm_dpbuuds_epi32(__W, __A, __B) \
393 ((__m128i)__builtin_ia32_vpdpbuuds128((__v4si)(__W), (__v4si)(__A), \415 ((__m128i)__builtin_ia32_vpdpbuuds128((__v4si)(__W), (__v16qu)(__A), \
394 (__v4si)(__B)))416 (__v16qu)(__B)))
395417
418// clang-format off
396/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate419/// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate
397/// signed 16-bit results. Sum these 4 results with the corresponding420/// signed 16-bit results. Sum these 4 results with the corresponding
398/// 32-bit integer in \a __W with signed saturation, and store the packed421/// 32-bit integer in \a __W with signed saturation, and store the packed
...@@ -423,8 +446,9 @@...@@ -423,8 +446,9 @@
423/// ENDFOR446/// ENDFOR
424/// dst[MAX:256] := 0447/// dst[MAX:256] := 0
425/// \endcode448/// \endcode
449// clang-format on
426#define _mm256_dpbuuds_epi32(__W, __A, __B) \450#define _mm256_dpbuuds_epi32(__W, __A, __B) \
427 ((__m256i)__builtin_ia32_vpdpbuuds256((__v8si)(__W), (__v8si)(__A), \451 ((__m256i)__builtin_ia32_vpdpbuuds256((__v8si)(__W), (__v32qu)(__A), \
428 (__v8si)(__B)))452 (__v32qu)(__B)))
429453
430#endif // __AVXVNNIINT8INTRIN_H454#endif // __AVXVNNIINT8INTRIN_H
lib/include/avxvnniintrin.h+16-8
...@@ -63,7 +63,8 @@...@@ -63,7 +63,8 @@
63static __inline__ __m256i __DEFAULT_FN_ATTRS25663static __inline__ __m256i __DEFAULT_FN_ATTRS256
64_mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)64_mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
65{65{
66 return (__m256i)__builtin_ia32_vpdpbusd256((__v8si)__S, (__v8si)__A, (__v8si)__B);66 return (__m256i)__builtin_ia32_vpdpbusd256((__v8si)__S, (__v32qu)__A,
67 (__v32qi)__B);
67}68}
6869
69/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with70/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
...@@ -86,7 +87,8 @@ _mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)...@@ -86,7 +87,8 @@ _mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
86static __inline__ __m256i __DEFAULT_FN_ATTRS25687static __inline__ __m256i __DEFAULT_FN_ATTRS256
87_mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)88_mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
88{89{
89 return (__m256i)__builtin_ia32_vpdpbusds256((__v8si)__S, (__v8si)__A, (__v8si)__B);90 return (__m256i)__builtin_ia32_vpdpbusds256((__v8si)__S, (__v32qu)__A,
91 (__v32qi)__B);
90}92}
9193
92/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with94/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
...@@ -107,7 +109,8 @@ _mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)...@@ -107,7 +109,8 @@ _mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
107static __inline__ __m256i __DEFAULT_FN_ATTRS256109static __inline__ __m256i __DEFAULT_FN_ATTRS256
108_mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)110_mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
109{111{
110 return (__m256i)__builtin_ia32_vpdpwssd256((__v8si)__S, (__v8si)__A, (__v8si)__B);112 return (__m256i)__builtin_ia32_vpdpwssd256((__v8si)__S, (__v16hi)__A,
113 (__v16hi)__B);
111}114}
112115
113/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with116/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
...@@ -128,7 +131,8 @@ _mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)...@@ -128,7 +131,8 @@ _mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
128static __inline__ __m256i __DEFAULT_FN_ATTRS256131static __inline__ __m256i __DEFAULT_FN_ATTRS256
129_mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)132_mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
130{133{
131 return (__m256i)__builtin_ia32_vpdpwssds256((__v8si)__S, (__v8si)__A, (__v8si)__B);134 return (__m256i)__builtin_ia32_vpdpwssds256((__v8si)__S, (__v16hi)__A,
135 (__v16hi)__B);
132}136}
133137
134/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with138/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
...@@ -151,7 +155,8 @@ _mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)...@@ -151,7 +155,8 @@ _mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
151static __inline__ __m128i __DEFAULT_FN_ATTRS128155static __inline__ __m128i __DEFAULT_FN_ATTRS128
152_mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)156_mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
153{157{
154 return (__m128i)__builtin_ia32_vpdpbusd128((__v4si)__S, (__v4si)__A, (__v4si)__B);158 return (__m128i)__builtin_ia32_vpdpbusd128((__v4si)__S, (__v16qu)__A,
159 (__v16qi)__B);
155}160}
156161
157/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with162/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
...@@ -174,7 +179,8 @@ _mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)...@@ -174,7 +179,8 @@ _mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
174static __inline__ __m128i __DEFAULT_FN_ATTRS128179static __inline__ __m128i __DEFAULT_FN_ATTRS128
175_mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)180_mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
176{181{
177 return (__m128i)__builtin_ia32_vpdpbusds128((__v4si)__S, (__v4si)__A, (__v4si)__B);182 return (__m128i)__builtin_ia32_vpdpbusds128((__v4si)__S, (__v16qu)__A,
183 (__v16qi)__B);
178}184}
179185
180/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with186/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
...@@ -195,7 +201,8 @@ _mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)...@@ -195,7 +201,8 @@ _mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
195static __inline__ __m128i __DEFAULT_FN_ATTRS128201static __inline__ __m128i __DEFAULT_FN_ATTRS128
196_mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)202_mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
197{203{
198 return (__m128i)__builtin_ia32_vpdpwssd128((__v4si)__S, (__v4si)__A, (__v4si)__B);204 return (__m128i)__builtin_ia32_vpdpwssd128((__v4si)__S, (__v8hi)__A,
205 (__v8hi)__B);
199}206}
200207
201/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with208/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
...@@ -216,7 +223,8 @@ _mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)...@@ -216,7 +223,8 @@ _mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
216static __inline__ __m128i __DEFAULT_FN_ATTRS128223static __inline__ __m128i __DEFAULT_FN_ATTRS128
217_mm_dpwssds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)224_mm_dpwssds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
218{225{
219 return (__m128i)__builtin_ia32_vpdpwssds128((__v4si)__S, (__v4si)__A, (__v4si)__B);226 return (__m128i)__builtin_ia32_vpdpwssds128((__v4si)__S, (__v8hi)__A,
227 (__v8hi)__B);
220}228}
221229
222#undef __DEFAULT_FN_ATTRS128230#undef __DEFAULT_FN_ATTRS128
lib/include/cpuid.h+101-4
...@@ -253,10 +253,6 @@...@@ -253,10 +253,6 @@
253#define bit_RDPRU 0x00000010253#define bit_RDPRU 0x00000010
254#define bit_WBNOINVD 0x00000200254#define bit_WBNOINVD 0x00000200
255255
256/* Features in %ebx for leaf 0x24 */
257#define bit_AVX10_256 0x00020000
258#define bit_AVX10_512 0x00040000
259
260#ifdef __i386__256#ifdef __i386__
261#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \257#define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \
262 __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \258 __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \
...@@ -282,6 +278,24 @@...@@ -282,6 +278,24 @@
282 : "0"(__leaf), "2"(__count))278 : "0"(__leaf), "2"(__count))
283#endif279#endif
284280
281/// Queries the processor to determine the highest supported \c CPUID leaf.
282/// This intrinsic is only available on x86 and x64.
283///
284/// \headerfile <cpuid.h>
285///
286/// This intrinsic corresponds to the <c> CPUID </c> instruction.
287///
288/// \param __leaf
289/// \a __leaf can be either 0x0 or 0x8000000. If \a __leaf == 0x0, the
290/// highest supported value for basic \c CPUID information is returned.
291/// If \a __leaf == 0x8000000, the highest supported value for extended
292/// \c CPUID information is returned.
293/// \param __sig
294/// If the \a __sig pointer is non-null, the first four bytes of the
295/// signature (as found in the \c EBX register) are returned in the
296/// location pointed to by \a __sig.
297/// \returns Returns 0 if \c CPUID is supported; otherwise returns the value
298/// that \c CPUID returns in the \c EAX register.
285static __inline unsigned int __get_cpuid_max (unsigned int __leaf,299static __inline unsigned int __get_cpuid_max (unsigned int __leaf,
286 unsigned int *__sig)300 unsigned int *__sig)
287{301{
...@@ -315,6 +329,32 @@ static __inline unsigned int __get_cpuid_max (unsigned int __leaf,...@@ -315,6 +329,32 @@ static __inline unsigned int __get_cpuid_max (unsigned int __leaf,
315 return __eax;329 return __eax;
316}330}
317331
332/// For the requested \c CPUID leaf, queries the processor for information
333/// about the CPU type and CPU features (such as processor vendor, supported
334/// instruction sets, CPU capabilities, cache sizes, CPU model and family, and
335/// other hardware details). This intrinsic is only available on x86 and x64.
336///
337/// \headerfile <cpuid.h>
338///
339/// This intrinsic corresponds to the <c> CPUID </c> instruction.
340///
341/// \param __leaf
342/// An unsigned integer that identifies the level (also called "leaf") at
343/// which the \c CPUID instruction will be executed.
344/// \param __eax
345/// A pointer to an integer that corresponds to the \c EAX register where
346/// \c CPUID stores output results.
347/// \param __ebx
348/// A pointer to an integer that corresponds to the \c EBX register where
349/// \c CPUID stores output results.
350/// \param __ecx
351/// A pointer to an integer that corresponds to the \c ECX register where
352/// \c CPUID stores output results.
353/// \param __edx
354/// A pointer to an integer that corresponds to the \c EDX register where
355/// \c CPUID stores output results.
356/// \returns Returns 1 if the requested \c CPUID leaf is supported; otherwise
357/// returns 0.
318static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax,358static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax,
319 unsigned int *__ebx, unsigned int *__ecx,359 unsigned int *__ebx, unsigned int *__ecx,
320 unsigned int *__edx)360 unsigned int *__edx)
...@@ -328,6 +368,36 @@ static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax,...@@ -328,6 +368,36 @@ static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax,
328 return 1;368 return 1;
329}369}
330370
371/// For the requested \c CPUID leaf and subleaf, queries the processor for
372/// information about the CPU type and CPU features (such as processor vendor,
373/// supported instruction sets, CPU capabilities, cache sizes, CPU model and
374/// family, and other hardware details). This intrinsic is only available on
375/// x86 and x64.
376///
377/// \headerfile <cpuid.h>
378///
379/// This intrinsic corresponds to the <c> CPUID </c> instruction.
380///
381/// \param __leaf
382/// An unsigned integer that identifies the level (also called "leaf") at
383/// which the \c CPUID instruction will be executed.
384/// \param __subleaf
385/// An unsigned integer that identifies the sublevel (also called
386/// "subleaf") at which the \c CPUID instruction will be executed.
387/// \param __eax
388/// A pointer to an integer that corresponds to the \c EAX register where
389/// \c CPUID stores output results.
390/// \param __ebx
391/// A pointer to an integer that corresponds to the \c EBX register where
392/// \c CPUID stores output results.
393/// \param __ecx
394/// A pointer to an integer that corresponds to the \c ECX register where
395/// \c CPUID stores output results.
396/// \param __edx
397/// A pointer to an integer that corresponds to the \c EDX register where
398/// \c CPUID stores output results.
399/// \returns Returns 1 if the requested \c CPUID leaf is supported; otherwise
400/// returns 0.
331static __inline int __get_cpuid_count (unsigned int __leaf,401static __inline int __get_cpuid_count (unsigned int __leaf,
332 unsigned int __subleaf,402 unsigned int __subleaf,
333 unsigned int *__eax, unsigned int *__ebx,403 unsigned int *__eax, unsigned int *__ebx,
...@@ -345,10 +415,37 @@ static __inline int __get_cpuid_count (unsigned int __leaf,...@@ -345,10 +415,37 @@ static __inline int __get_cpuid_count (unsigned int __leaf,
345// In some configurations, __cpuidex is defined as a builtin (primarily415// In some configurations, __cpuidex is defined as a builtin (primarily
346// -fms-extensions) which will conflict with the __cpuidex definition below.416// -fms-extensions) which will conflict with the __cpuidex definition below.
347#if !(__has_builtin(__cpuidex))417#if !(__has_builtin(__cpuidex))
418// In some cases, offloading will set the host as the aux triple and define the
419// builtin. Given __has_builtin does not detect builtins on aux triples, we need
420// to explicitly check for some offloading cases.
421#if !defined(__NVPTX__) && !defined(__AMDGPU__) && !defined(__SPIRV__)
422/// Executes the \c CPUID instruction with the specified leaf and subleaf
423/// values, and returns the results from the CPU's registers. This intrinsic
424/// is only available on x86 and x64.
425///
426/// \headerfile <cpuid.h>
427///
428/// This intrinsic corresponds to the <c> CPUID </c> instruction.
429///
430/// \param __cpu_info
431/// An output array of four integers:
432/// <ul>
433/// <li>\a __cpuInfo[0] receives the value of the \c EAX register.</li>
434/// <li>\a __cpuInfo[1] receives the value of the \c EBX register.</li>
435/// <li>\a __cpuInfo[2] receives the value of the \c ECX register.</li>
436/// <li>\a __cpuInfo[3] receives the value of the \c EDX register.</li>
437/// </ul>
438/// \param __leaf
439/// An unsigned integer that identifies the level (also called the "leaf")
440/// at which the \c CPUID instruction will be executed.
441/// \param __subleaf
442/// An unsigned integer that identifies the sublevel (also called the
443/// "subleaf") at which the \c CPUID instruction will be executed.
348static __inline void __cpuidex(int __cpu_info[4], int __leaf, int __subleaf) {444static __inline void __cpuidex(int __cpu_info[4], int __leaf, int __subleaf) {
349 __cpuid_count(__leaf, __subleaf, __cpu_info[0], __cpu_info[1], __cpu_info[2],445 __cpuid_count(__leaf, __subleaf, __cpu_info[0], __cpu_info[1], __cpu_info[2],
350 __cpu_info[3]);446 __cpu_info[3]);
351}447}
352#endif448#endif
449#endif
353450
354#endif /* __CPUID_H */451#endif /* __CPUID_H */
lib/include/emmintrin.h+168-168
...@@ -17,7 +17,6 @@...@@ -17,7 +17,6 @@
17#include <xmmintrin.h>17#include <xmmintrin.h>
1818
19typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));19typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));
20typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16)));
2120
22typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));21typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));
23typedef long long __m128i_u22typedef long long __m128i_u
...@@ -25,14 +24,9 @@ typedef long long __m128i_u...@@ -25,14 +24,9 @@ typedef long long __m128i_u
2524
26/* Type defines. */25/* Type defines. */
27typedef double __v2df __attribute__((__vector_size__(16)));26typedef double __v2df __attribute__((__vector_size__(16)));
28typedef long long __v2di __attribute__((__vector_size__(16)));
29typedef short __v8hi __attribute__((__vector_size__(16)));
30typedef char __v16qi __attribute__((__vector_size__(16)));
3127
32/* Unsigned types */28/* Unsigned types */
33typedef unsigned long long __v2du __attribute__((__vector_size__(16)));29typedef unsigned long long __v2du __attribute__((__vector_size__(16)));
34typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
35typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
3630
37/* We need an explicitly signed variant for char. Note that this shouldn't31/* We need an explicitly signed variant for char. Note that this shouldn't
38 * appear in the interface though. */32 * appear in the interface though. */
...@@ -49,15 +43,9 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));...@@ -49,15 +43,9 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
49#endif43#endif
5044
51/* Define the default attributes for the functions in this file. */45/* Define the default attributes for the functions in this file. */
52#if defined(__EVEX512__) && !defined(__AVX10_1_512__)
53#define __DEFAULT_FN_ATTRS \
54 __attribute__((__always_inline__, __nodebug__, \
55 __target__("sse2,no-evex512"), __min_vector_width__(128)))
56#else
57#define __DEFAULT_FN_ATTRS \46#define __DEFAULT_FN_ATTRS \
58 __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \47 __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \
59 __min_vector_width__(128)))48 __min_vector_width__(128)))
60#endif
6149
62#if defined(__cplusplus) && (__cplusplus >= 201103L)50#if defined(__cplusplus) && (__cplusplus >= 201103L)
63#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr51#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
...@@ -67,6 +55,9 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));...@@ -67,6 +55,9 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
6755
68#define __trunc64(x) \56#define __trunc64(x) \
69 (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0)57 (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0)
58#define __zext128(x) \
59 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \
60 1, 2, 3)
70#define __anyext128(x) \61#define __anyext128(x) \
71 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \62 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \
72 1, -1, -1)63 1, -1, -1)
...@@ -250,8 +241,7 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_div_pd(__m128d __a,...@@ -250,8 +241,7 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_div_pd(__m128d __a,
250/// bits are copied from the upper 64 bits of operand \a __a.241/// bits are copied from the upper 64 bits of operand \a __a.
251static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,242static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,
252 __m128d __b) {243 __m128d __b) {
253 __m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);244 return __extension__(__m128d){__builtin_elementwise_sqrt(__b[0]), __a[1]};
254 return __extension__(__m128d){__c[0], __a[1]};
255}245}
256246
257/// Calculates the square root of the each of two values stored in a247/// Calculates the square root of the each of two values stored in a
...@@ -266,7 +256,7 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,...@@ -266,7 +256,7 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,
266/// \returns A 128-bit vector of [2 x double] containing the square roots of the256/// \returns A 128-bit vector of [2 x double] containing the square roots of the
267/// values in the operand.257/// values in the operand.
268static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) {258static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) {
269 return __builtin_ia32_sqrtpd((__v2df)__a);259 return __builtin_elementwise_sqrt(__a);
270}260}
271261
272/// Compares lower 64-bit double-precision values of both operands, and262/// Compares lower 64-bit double-precision values of both operands, and
...@@ -310,8 +300,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a,...@@ -310,8 +300,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a,
310/// A 128-bit vector of [2 x double] containing one of the operands.300/// A 128-bit vector of [2 x double] containing one of the operands.
311/// \returns A 128-bit vector of [2 x double] containing the minimum values301/// \returns A 128-bit vector of [2 x double] containing the minimum values
312/// between both operands.302/// between both operands.
313static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a,303static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_pd(__m128d __a,
314 __m128d __b) {304 __m128d __b) {
315 return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);305 return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
316}306}
317307
...@@ -356,8 +346,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a,...@@ -356,8 +346,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a,
356/// A 128-bit vector of [2 x double] containing one of the operands.346/// A 128-bit vector of [2 x double] containing one of the operands.
357/// \returns A 128-bit vector of [2 x double] containing the maximum values347/// \returns A 128-bit vector of [2 x double] containing the maximum values
358/// between both operands.348/// between both operands.
359static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a,349static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_pd(__m128d __a,
360 __m128d __b) {350 __m128d __b) {
361 return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);351 return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
362}352}
363353
...@@ -1288,7 +1278,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a,...@@ -1288,7 +1278,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a,
1288/// A 128-bit vector of [2 x double].1278/// A 128-bit vector of [2 x double].
1289/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the1279/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1290/// converted values. The upper 64 bits are set to zero.1280/// converted values. The upper 64 bits are set to zero.
1291static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtpd_ps(__m128d __a) {1281static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR
1282_mm_cvtpd_ps(__m128d __a) {
1292 return __builtin_ia32_cvtpd2ps((__v2df)__a);1283 return __builtin_ia32_cvtpd2ps((__v2df)__a);
1293}1284}
12941285
...@@ -1393,8 +1384,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) {...@@ -1393,8 +1384,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) {
1393/// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the1384/// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
1394/// converted value from the second parameter. The upper 96 bits are copied1385/// converted value from the second parameter. The upper 96 bits are copied
1395/// from the upper 96 bits of the first parameter.1386/// from the upper 96 bits of the first parameter.
1396static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtsd_ss(__m128 __a,1387static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR
1397 __m128d __b) {1388_mm_cvtsd_ss(__m128 __a, __m128d __b) {
1398 return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);1389 return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
1399}1390}
14001391
...@@ -2068,8 +2059,8 @@ static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp,...@@ -2068,8 +2059,8 @@ static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp,
2068/// A 128-bit vector of [16 x i8].2059/// A 128-bit vector of [16 x i8].
2069/// \returns A 128-bit vector of [16 x i8] containing the sums of both2060/// \returns A 128-bit vector of [16 x i8] containing the sums of both
2070/// parameters.2061/// parameters.
2071static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a,2062static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2072 __m128i __b) {2063_mm_add_epi8(__m128i __a, __m128i __b) {
2073 return (__m128i)((__v16qu)__a + (__v16qu)__b);2064 return (__m128i)((__v16qu)__a + (__v16qu)__b);
2074}2065}
20752066
...@@ -2089,8 +2080,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a,...@@ -2089,8 +2080,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a,
2089/// A 128-bit vector of [8 x i16].2080/// A 128-bit vector of [8 x i16].
2090/// \returns A 128-bit vector of [8 x i16] containing the sums of both2081/// \returns A 128-bit vector of [8 x i16] containing the sums of both
2091/// parameters.2082/// parameters.
2092static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi16(__m128i __a,2083static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2093 __m128i __b) {2084_mm_add_epi16(__m128i __a, __m128i __b) {
2094 return (__m128i)((__v8hu)__a + (__v8hu)__b);2085 return (__m128i)((__v8hu)__a + (__v8hu)__b);
2095}2086}
20962087
...@@ -2127,8 +2118,9 @@ _mm_add_epi32(__m128i __a, __m128i __b) {...@@ -2127,8 +2118,9 @@ _mm_add_epi32(__m128i __a, __m128i __b) {
2127/// \param __b2118/// \param __b
2128/// A 64-bit integer.2119/// A 64-bit integer.
2129/// \returns A 64-bit integer containing the sum of both parameters.2120/// \returns A 64-bit integer containing the sum of both parameters.
2130static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_add_si64(__m64 __a, __m64 __b) {2121static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_si64(__m64 __a,
2131 return (__m64)(((unsigned long long)__a) + ((unsigned long long)__b));2122 __m64 __b) {
2123 return (__m64)(((__v1du)__a)[0] + ((__v1du)__b)[0]);
2132}2124}
21332125
2134/// Adds the corresponding elements of two 128-bit vectors of [2 x i64],2126/// Adds the corresponding elements of two 128-bit vectors of [2 x i64],
...@@ -2169,8 +2161,8 @@ _mm_add_epi64(__m128i __a, __m128i __b) {...@@ -2169,8 +2161,8 @@ _mm_add_epi64(__m128i __a, __m128i __b) {
2169/// A 128-bit signed [16 x i8] vector.2161/// A 128-bit signed [16 x i8] vector.
2170/// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of2162/// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
2171/// both parameters.2163/// both parameters.
2172static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a,2164static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2173 __m128i __b) {2165_mm_adds_epi8(__m128i __a, __m128i __b) {
2174 return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b);2166 return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b);
2175}2167}
21762168
...@@ -2191,8 +2183,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a,...@@ -2191,8 +2183,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a,
2191/// A 128-bit signed [8 x i16] vector.2183/// A 128-bit signed [8 x i16] vector.
2192/// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of2184/// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
2193/// both parameters.2185/// both parameters.
2194static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a,2186static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2195 __m128i __b) {2187_mm_adds_epi16(__m128i __a, __m128i __b) {
2196 return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b);2188 return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b);
2197}2189}
21982190
...@@ -2213,8 +2205,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a,...@@ -2213,8 +2205,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a,
2213/// A 128-bit unsigned [16 x i8] vector.2205/// A 128-bit unsigned [16 x i8] vector.
2214/// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums2206/// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
2215/// of both parameters.2207/// of both parameters.
2216static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a,2208static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2217 __m128i __b) {2209_mm_adds_epu8(__m128i __a, __m128i __b) {
2218 return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b);2210 return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b);
2219}2211}
22202212
...@@ -2235,8 +2227,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a,...@@ -2235,8 +2227,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a,
2235/// A 128-bit unsigned [8 x i16] vector.2227/// A 128-bit unsigned [8 x i16] vector.
2236/// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums2228/// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
2237/// of both parameters.2229/// of both parameters.
2238static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a,2230static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2239 __m128i __b) {2231_mm_adds_epu16(__m128i __a, __m128i __b) {
2240 return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b);2232 return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b);
2241}2233}
22422234
...@@ -2254,9 +2246,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a,...@@ -2254,9 +2246,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a,
2254/// A 128-bit unsigned [16 x i8] vector.2246/// A 128-bit unsigned [16 x i8] vector.
2255/// \returns A 128-bit unsigned [16 x i8] vector containing the rounded2247/// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
2256/// averages of both parameters.2248/// averages of both parameters.
2257static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a,2249static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2258 __m128i __b) {2250_mm_avg_epu8(__m128i __a, __m128i __b) {
2259 return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b);2251 return (__m128i)__builtin_ia32_pavgb128((__v16qu)__a, (__v16qu)__b);
2260}2252}
22612253
2262/// Computes the rounded averages of corresponding elements of two2254/// Computes the rounded averages of corresponding elements of two
...@@ -2273,9 +2265,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a,...@@ -2273,9 +2265,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a,
2273/// A 128-bit unsigned [8 x i16] vector.2265/// A 128-bit unsigned [8 x i16] vector.
2274/// \returns A 128-bit unsigned [8 x i16] vector containing the rounded2266/// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
2275/// averages of both parameters.2267/// averages of both parameters.
2276static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a,2268static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2277 __m128i __b) {2269_mm_avg_epu16(__m128i __a, __m128i __b) {
2278 return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b);2270 return (__m128i)__builtin_ia32_pavgw128((__v8hu)__a, (__v8hu)__b);
2279}2271}
22802272
2281/// Multiplies the corresponding elements of two 128-bit signed [8 x i16]2273/// Multiplies the corresponding elements of two 128-bit signed [8 x i16]
...@@ -2298,8 +2290,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a,...@@ -2298,8 +2290,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a,
2298/// A 128-bit signed [8 x i16] vector.2290/// A 128-bit signed [8 x i16] vector.
2299/// \returns A 128-bit signed [4 x i32] vector containing the sums of products2291/// \returns A 128-bit signed [4 x i32] vector containing the sums of products
2300/// of both parameters.2292/// of both parameters.
2301static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a,2293static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2302 __m128i __b) {2294_mm_madd_epi16(__m128i __a, __m128i __b) {
2303 return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);2295 return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
2304}2296}
23052297
...@@ -2317,8 +2309,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a,...@@ -2317,8 +2309,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a,
2317/// A 128-bit signed [8 x i16] vector.2309/// A 128-bit signed [8 x i16] vector.
2318/// \returns A 128-bit signed [8 x i16] vector containing the greater value of2310/// \returns A 128-bit signed [8 x i16] vector containing the greater value of
2319/// each comparison.2311/// each comparison.
2320static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a,2312static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2321 __m128i __b) {2313_mm_max_epi16(__m128i __a, __m128i __b) {
2322 return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b);2314 return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b);
2323}2315}
23242316
...@@ -2336,8 +2328,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a,...@@ -2336,8 +2328,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a,
2336/// A 128-bit unsigned [16 x i8] vector.2328/// A 128-bit unsigned [16 x i8] vector.
2337/// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of2329/// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
2338/// each comparison.2330/// each comparison.
2339static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a,2331static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2340 __m128i __b) {2332_mm_max_epu8(__m128i __a, __m128i __b) {
2341 return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b);2333 return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b);
2342}2334}
23432335
...@@ -2355,8 +2347,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a,...@@ -2355,8 +2347,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a,
2355/// A 128-bit signed [8 x i16] vector.2347/// A 128-bit signed [8 x i16] vector.
2356/// \returns A 128-bit signed [8 x i16] vector containing the smaller value of2348/// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
2357/// each comparison.2349/// each comparison.
2358static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a,2350static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2359 __m128i __b) {2351_mm_min_epi16(__m128i __a, __m128i __b) {
2360 return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b);2352 return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b);
2361}2353}
23622354
...@@ -2374,8 +2366,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a,...@@ -2374,8 +2366,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a,
2374/// A 128-bit unsigned [16 x i8] vector.2366/// A 128-bit unsigned [16 x i8] vector.
2375/// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of2367/// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
2376/// each comparison.2368/// each comparison.
2377static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a,2369static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2378 __m128i __b) {2370_mm_min_epu8(__m128i __a, __m128i __b) {
2379 return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b);2371 return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b);
2380}2372}
23812373
...@@ -2393,8 +2385,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a,...@@ -2393,8 +2385,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a,
2393/// A 128-bit signed [8 x i16] vector.2385/// A 128-bit signed [8 x i16] vector.
2394/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of2386/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
2395/// each of the eight 32-bit products.2387/// each of the eight 32-bit products.
2396static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,2388static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2397 __m128i __b) {2389_mm_mulhi_epi16(__m128i __a, __m128i __b) {
2398 return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);2390 return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
2399}2391}
24002392
...@@ -2412,9 +2404,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,...@@ -2412,9 +2404,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,
2412/// A 128-bit unsigned [8 x i16] vector.2404/// A 128-bit unsigned [8 x i16] vector.
2413/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits2405/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
2414/// of each of the eight 32-bit products.2406/// of each of the eight 32-bit products.
2415static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,2407static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2416 __m128i __b) {2408_mm_mulhi_epu16(__m128i __a, __m128i __b) {
2417 return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);2409 return (__m128i)__builtin_ia32_pmulhuw128((__v8hu)__a, (__v8hu)__b);
2418}2410}
24192411
2420/// Multiplies the corresponding elements of two signed [8 x i16]2412/// Multiplies the corresponding elements of two signed [8 x i16]
...@@ -2431,8 +2423,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,...@@ -2431,8 +2423,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,
2431/// A 128-bit signed [8 x i16] vector.2423/// A 128-bit signed [8 x i16] vector.
2432/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of2424/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
2433/// each of the eight 32-bit products.2425/// each of the eight 32-bit products.
2434static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a,2426static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2435 __m128i __b) {2427_mm_mullo_epi16(__m128i __a, __m128i __b) {
2436 return (__m128i)((__v8hu)__a * (__v8hu)__b);2428 return (__m128i)((__v8hu)__a * (__v8hu)__b);
2437}2429}
24382430
...@@ -2449,9 +2441,10 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a,...@@ -2449,9 +2441,10 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a,
2449/// \param __b2441/// \param __b
2450/// A 64-bit integer containing one of the source operands.2442/// A 64-bit integer containing one of the source operands.
2451/// \returns A 64-bit integer vector containing the product of both operands.2443/// \returns A 64-bit integer vector containing the product of both operands.
2452static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_mul_su32(__m64 __a, __m64 __b) {2444static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_su32(__m64 __a,
2453 return __trunc64(__builtin_ia32_pmuludq128((__v4si)__anyext128(__a),2445 __m64 __b) {
2454 (__v4si)__anyext128(__b)));2446 return __trunc64(__builtin_ia32_pmuludq128((__v4si)__zext128(__a),
2447 (__v4si)__zext128(__b)));
2455}2448}
24562449
2457/// Multiplies 32-bit unsigned integer values contained in the lower2450/// Multiplies 32-bit unsigned integer values contained in the lower
...@@ -2467,8 +2460,8 @@ static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_mul_su32(__m64 __a, __m64 __b) {...@@ -2467,8 +2460,8 @@ static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_mul_su32(__m64 __a, __m64 __b) {
2467/// \param __b2460/// \param __b
2468/// A [2 x i64] vector containing one of the source operands.2461/// A [2 x i64] vector containing one of the source operands.
2469/// \returns A [2 x i64] vector containing the product of both operands.2462/// \returns A [2 x i64] vector containing the product of both operands.
2470static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epu32(__m128i __a,2463static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2471 __m128i __b) {2464_mm_mul_epu32(__m128i __a, __m128i __b) {
2472 return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);2465 return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
2473}2466}
24742467
...@@ -2505,8 +2498,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a,...@@ -2505,8 +2498,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a,
2505/// A 128-bit integer vector containing the subtrahends.2498/// A 128-bit integer vector containing the subtrahends.
2506/// \returns A 128-bit integer vector containing the differences of the values2499/// \returns A 128-bit integer vector containing the differences of the values
2507/// in the operands.2500/// in the operands.
2508static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a,2501static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2509 __m128i __b) {2502_mm_sub_epi8(__m128i __a, __m128i __b) {
2510 return (__m128i)((__v16qu)__a - (__v16qu)__b);2503 return (__m128i)((__v16qu)__a - (__v16qu)__b);
2511}2504}
25122505
...@@ -2522,8 +2515,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a,...@@ -2522,8 +2515,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a,
2522/// A 128-bit integer vector containing the subtrahends.2515/// A 128-bit integer vector containing the subtrahends.
2523/// \returns A 128-bit integer vector containing the differences of the values2516/// \returns A 128-bit integer vector containing the differences of the values
2524/// in the operands.2517/// in the operands.
2525static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi16(__m128i __a,2518static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2526 __m128i __b) {2519_mm_sub_epi16(__m128i __a, __m128i __b) {
2527 return (__m128i)((__v8hu)__a - (__v8hu)__b);2520 return (__m128i)((__v8hu)__a - (__v8hu)__b);
2528}2521}
25292522
...@@ -2557,8 +2550,9 @@ _mm_sub_epi32(__m128i __a, __m128i __b) {...@@ -2557,8 +2550,9 @@ _mm_sub_epi32(__m128i __a, __m128i __b) {
2557/// A 64-bit integer vector containing the subtrahend.2550/// A 64-bit integer vector containing the subtrahend.
2558/// \returns A 64-bit integer vector containing the difference of the values in2551/// \returns A 64-bit integer vector containing the difference of the values in
2559/// the operands.2552/// the operands.
2560static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_sub_si64(__m64 __a, __m64 __b) {2553static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_si64(__m64 __a,
2561 return (__m64)((unsigned long long)__a - (unsigned long long)__b);2554 __m64 __b) {
2555 return (__m64)(((__v1du)__a)[0] - ((__v1du)__b)[0]);
2562}2556}
25632557
2564/// Subtracts the corresponding elements of two [2 x i64] vectors.2558/// Subtracts the corresponding elements of two [2 x i64] vectors.
...@@ -2595,8 +2589,8 @@ _mm_sub_epi64(__m128i __a, __m128i __b) {...@@ -2595,8 +2589,8 @@ _mm_sub_epi64(__m128i __a, __m128i __b) {
2595/// A 128-bit integer vector containing the subtrahends.2589/// A 128-bit integer vector containing the subtrahends.
2596/// \returns A 128-bit integer vector containing the differences of the values2590/// \returns A 128-bit integer vector containing the differences of the values
2597/// in the operands.2591/// in the operands.
2598static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a,2592static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2599 __m128i __b) {2593_mm_subs_epi8(__m128i __a, __m128i __b) {
2600 return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b);2594 return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b);
2601}2595}
26022596
...@@ -2617,8 +2611,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a,...@@ -2617,8 +2611,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a,
2617/// A 128-bit integer vector containing the subtrahends.2611/// A 128-bit integer vector containing the subtrahends.
2618/// \returns A 128-bit integer vector containing the differences of the values2612/// \returns A 128-bit integer vector containing the differences of the values
2619/// in the operands.2613/// in the operands.
2620static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a,2614static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2621 __m128i __b) {2615_mm_subs_epi16(__m128i __a, __m128i __b) {
2622 return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b);2616 return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b);
2623}2617}
26242618
...@@ -2638,8 +2632,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a,...@@ -2638,8 +2632,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a,
2638/// A 128-bit integer vector containing the subtrahends.2632/// A 128-bit integer vector containing the subtrahends.
2639/// \returns A 128-bit integer vector containing the unsigned integer2633/// \returns A 128-bit integer vector containing the unsigned integer
2640/// differences of the values in the operands.2634/// differences of the values in the operands.
2641static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a,2635static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2642 __m128i __b) {2636_mm_subs_epu8(__m128i __a, __m128i __b) {
2643 return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b);2637 return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b);
2644}2638}
26452639
...@@ -2659,8 +2653,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a,...@@ -2659,8 +2653,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a,
2659/// A 128-bit integer vector containing the subtrahends.2653/// A 128-bit integer vector containing the subtrahends.
2660/// \returns A 128-bit integer vector containing the unsigned integer2654/// \returns A 128-bit integer vector containing the unsigned integer
2661/// differences of the values in the operands.2655/// differences of the values in the operands.
2662static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a,2656static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2663 __m128i __b) {2657_mm_subs_epu16(__m128i __a, __m128i __b) {
2664 return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b);2658 return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b);
2665}2659}
26662660
...@@ -2676,8 +2670,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a,...@@ -2676,8 +2670,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a,
2676/// A 128-bit integer vector containing one of the source operands.2670/// A 128-bit integer vector containing one of the source operands.
2677/// \returns A 128-bit integer vector containing the bitwise AND of the values2671/// \returns A 128-bit integer vector containing the bitwise AND of the values
2678/// in both operands.2672/// in both operands.
2679static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a,2673static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2680 __m128i __b) {2674_mm_and_si128(__m128i __a, __m128i __b) {
2681 return (__m128i)((__v2du)__a & (__v2du)__b);2675 return (__m128i)((__v2du)__a & (__v2du)__b);
2682}2676}
26832677
...@@ -2695,8 +2689,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a,...@@ -2695,8 +2689,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a,
2695/// A 128-bit vector containing the right source operand.2689/// A 128-bit vector containing the right source operand.
2696/// \returns A 128-bit integer vector containing the bitwise AND of the one's2690/// \returns A 128-bit integer vector containing the bitwise AND of the one's
2697/// complement of the first operand and the values in the second operand.2691/// complement of the first operand and the values in the second operand.
2698static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a,2692static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2699 __m128i __b) {2693_mm_andnot_si128(__m128i __a, __m128i __b) {
2700 return (__m128i)(~(__v2du)__a & (__v2du)__b);2694 return (__m128i)(~(__v2du)__a & (__v2du)__b);
2701}2695}
2702/// Performs a bitwise OR of two 128-bit integer vectors.2696/// Performs a bitwise OR of two 128-bit integer vectors.
...@@ -2711,8 +2705,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a,...@@ -2711,8 +2705,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a,
2711/// A 128-bit integer vector containing one of the source operands.2705/// A 128-bit integer vector containing one of the source operands.
2712/// \returns A 128-bit integer vector containing the bitwise OR of the values2706/// \returns A 128-bit integer vector containing the bitwise OR of the values
2713/// in both operands.2707/// in both operands.
2714static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a,2708static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2715 __m128i __b) {2709_mm_or_si128(__m128i __a, __m128i __b) {
2716 return (__m128i)((__v2du)__a | (__v2du)__b);2710 return (__m128i)((__v2du)__a | (__v2du)__b);
2717}2711}
27182712
...@@ -2728,8 +2722,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a,...@@ -2728,8 +2722,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a,
2728/// A 128-bit integer vector containing one of the source operands.2722/// A 128-bit integer vector containing one of the source operands.
2729/// \returns A 128-bit integer vector containing the bitwise exclusive OR of the2723/// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
2730/// values in both operands.2724/// values in both operands.
2731static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,2725static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2732 __m128i __b) {2726_mm_xor_si128(__m128i __a, __m128i __b) {
2733 return (__m128i)((__v2du)__a ^ (__v2du)__b);2727 return (__m128i)((__v2du)__a ^ (__v2du)__b);
2734}2728}
27352729
...@@ -2751,11 +2745,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,...@@ -2751,11 +2745,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,
2751/// \a a.2745/// \a a.
2752/// \returns A 128-bit integer vector containing the left-shifted value.2746/// \returns A 128-bit integer vector containing the left-shifted value.
2753#define _mm_slli_si128(a, imm) \2747#define _mm_slli_si128(a, imm) \
2754 ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \2748 ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)(__m128i)(a), \
2755 (int)(imm)))2749 (int)(imm)))
27562750
2757#define _mm_bslli_si128(a, imm) \2751#define _mm_bslli_si128(a, imm) \
2758 ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \2752 ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)(__m128i)(a), \
2759 (int)(imm)))2753 (int)(imm)))
27602754
2761/// Left-shifts each 16-bit value in the 128-bit integer vector operand2755/// Left-shifts each 16-bit value in the 128-bit integer vector operand
...@@ -2771,8 +2765,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,...@@ -2771,8 +2765,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,
2771/// An integer value specifying the number of bits to left-shift each value2765/// An integer value specifying the number of bits to left-shift each value
2772/// in operand \a __a.2766/// in operand \a __a.
2773/// \returns A 128-bit integer vector containing the left-shifted values.2767/// \returns A 128-bit integer vector containing the left-shifted values.
2774static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a,2768static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2775 int __count) {2769_mm_slli_epi16(__m128i __a, int __count) {
2776 return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);2770 return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
2777}2771}
27782772
...@@ -2789,8 +2783,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a,...@@ -2789,8 +2783,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a,
2789/// A 128-bit integer vector in which bits [63:0] specify the number of bits2783/// A 128-bit integer vector in which bits [63:0] specify the number of bits
2790/// to left-shift each value in operand \a __a.2784/// to left-shift each value in operand \a __a.
2791/// \returns A 128-bit integer vector containing the left-shifted values.2785/// \returns A 128-bit integer vector containing the left-shifted values.
2792static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a,2786static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2793 __m128i __count) {2787_mm_sll_epi16(__m128i __a, __m128i __count) {
2794 return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);2788 return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
2795}2789}
27962790
...@@ -2807,8 +2801,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a,...@@ -2807,8 +2801,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a,
2807/// An integer value specifying the number of bits to left-shift each value2801/// An integer value specifying the number of bits to left-shift each value
2808/// in operand \a __a.2802/// in operand \a __a.
2809/// \returns A 128-bit integer vector containing the left-shifted values.2803/// \returns A 128-bit integer vector containing the left-shifted values.
2810static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a,2804static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2811 int __count) {2805_mm_slli_epi32(__m128i __a, int __count) {
2812 return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);2806 return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
2813}2807}
28142808
...@@ -2825,8 +2819,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a,...@@ -2825,8 +2819,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a,
2825/// A 128-bit integer vector in which bits [63:0] specify the number of bits2819/// A 128-bit integer vector in which bits [63:0] specify the number of bits
2826/// to left-shift each value in operand \a __a.2820/// to left-shift each value in operand \a __a.
2827/// \returns A 128-bit integer vector containing the left-shifted values.2821/// \returns A 128-bit integer vector containing the left-shifted values.
2828static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a,2822static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2829 __m128i __count) {2823_mm_sll_epi32(__m128i __a, __m128i __count) {
2830 return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);2824 return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
2831}2825}
28322826
...@@ -2843,8 +2837,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a,...@@ -2843,8 +2837,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a,
2843/// An integer value specifying the number of bits to left-shift each value2837/// An integer value specifying the number of bits to left-shift each value
2844/// in operand \a __a.2838/// in operand \a __a.
2845/// \returns A 128-bit integer vector containing the left-shifted values.2839/// \returns A 128-bit integer vector containing the left-shifted values.
2846static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a,2840static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2847 int __count) {2841_mm_slli_epi64(__m128i __a, int __count) {
2848 return __builtin_ia32_psllqi128((__v2di)__a, __count);2842 return __builtin_ia32_psllqi128((__v2di)__a, __count);
2849}2843}
28502844
...@@ -2861,8 +2855,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a,...@@ -2861,8 +2855,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a,
2861/// A 128-bit integer vector in which bits [63:0] specify the number of bits2855/// A 128-bit integer vector in which bits [63:0] specify the number of bits
2862/// to left-shift each value in operand \a __a.2856/// to left-shift each value in operand \a __a.
2863/// \returns A 128-bit integer vector containing the left-shifted values.2857/// \returns A 128-bit integer vector containing the left-shifted values.
2864static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a,2858static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2865 __m128i __count) {2859_mm_sll_epi64(__m128i __a, __m128i __count) {
2866 return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);2860 return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
2867}2861}
28682862
...@@ -2880,8 +2874,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a,...@@ -2880,8 +2874,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a,
2880/// An integer value specifying the number of bits to right-shift each value2874/// An integer value specifying the number of bits to right-shift each value
2881/// in operand \a __a.2875/// in operand \a __a.
2882/// \returns A 128-bit integer vector containing the right-shifted values.2876/// \returns A 128-bit integer vector containing the right-shifted values.
2883static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a,2877static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2884 int __count) {2878_mm_srai_epi16(__m128i __a, int __count) {
2885 return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);2879 return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
2886}2880}
28872881
...@@ -2899,8 +2893,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a,...@@ -2899,8 +2893,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a,
2899/// A 128-bit integer vector in which bits [63:0] specify the number of bits2893/// A 128-bit integer vector in which bits [63:0] specify the number of bits
2900/// to right-shift each value in operand \a __a.2894/// to right-shift each value in operand \a __a.
2901/// \returns A 128-bit integer vector containing the right-shifted values.2895/// \returns A 128-bit integer vector containing the right-shifted values.
2902static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a,2896static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2903 __m128i __count) {2897_mm_sra_epi16(__m128i __a, __m128i __count) {
2904 return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);2898 return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
2905}2899}
29062900
...@@ -2918,8 +2912,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a,...@@ -2918,8 +2912,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a,
2918/// An integer value specifying the number of bits to right-shift each value2912/// An integer value specifying the number of bits to right-shift each value
2919/// in operand \a __a.2913/// in operand \a __a.
2920/// \returns A 128-bit integer vector containing the right-shifted values.2914/// \returns A 128-bit integer vector containing the right-shifted values.
2921static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a,2915static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2922 int __count) {2916_mm_srai_epi32(__m128i __a, int __count) {
2923 return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);2917 return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
2924}2918}
29252919
...@@ -2937,8 +2931,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a,...@@ -2937,8 +2931,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a,
2937/// A 128-bit integer vector in which bits [63:0] specify the number of bits2931/// A 128-bit integer vector in which bits [63:0] specify the number of bits
2938/// to right-shift each value in operand \a __a.2932/// to right-shift each value in operand \a __a.
2939/// \returns A 128-bit integer vector containing the right-shifted values.2933/// \returns A 128-bit integer vector containing the right-shifted values.
2940static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,2934static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2941 __m128i __count) {2935_mm_sra_epi32(__m128i __a, __m128i __count) {
2942 return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);2936 return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
2943}2937}
29442938
...@@ -2960,11 +2954,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,...@@ -2960,11 +2954,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,
2960/// \a a.2954/// \a a.
2961/// \returns A 128-bit integer vector containing the right-shifted value.2955/// \returns A 128-bit integer vector containing the right-shifted value.
2962#define _mm_srli_si128(a, imm) \2956#define _mm_srli_si128(a, imm) \
2963 ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \2957 ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v16qi)(__m128i)(a), \
2964 (int)(imm)))2958 (int)(imm)))
29652959
2966#define _mm_bsrli_si128(a, imm) \2960#define _mm_bsrli_si128(a, imm) \
2967 ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \2961 ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v16qi)(__m128i)(a), \
2968 (int)(imm)))2962 (int)(imm)))
29692963
2970/// Right-shifts each of 16-bit values in the 128-bit integer vector2964/// Right-shifts each of 16-bit values in the 128-bit integer vector
...@@ -2980,8 +2974,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,...@@ -2980,8 +2974,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,
2980/// An integer value specifying the number of bits to right-shift each value2974/// An integer value specifying the number of bits to right-shift each value
2981/// in operand \a __a.2975/// in operand \a __a.
2982/// \returns A 128-bit integer vector containing the right-shifted values.2976/// \returns A 128-bit integer vector containing the right-shifted values.
2983static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a,2977static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2984 int __count) {2978_mm_srli_epi16(__m128i __a, int __count) {
2985 return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);2979 return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
2986}2980}
29872981
...@@ -2998,8 +2992,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a,...@@ -2998,8 +2992,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a,
2998/// A 128-bit integer vector in which bits [63:0] specify the number of bits2992/// A 128-bit integer vector in which bits [63:0] specify the number of bits
2999/// to right-shift each value in operand \a __a.2993/// to right-shift each value in operand \a __a.
3000/// \returns A 128-bit integer vector containing the right-shifted values.2994/// \returns A 128-bit integer vector containing the right-shifted values.
3001static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a,2995static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3002 __m128i __count) {2996_mm_srl_epi16(__m128i __a, __m128i __count) {
3003 return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);2997 return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
3004}2998}
30052999
...@@ -3016,8 +3010,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a,...@@ -3016,8 +3010,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a,
3016/// An integer value specifying the number of bits to right-shift each value3010/// An integer value specifying the number of bits to right-shift each value
3017/// in operand \a __a.3011/// in operand \a __a.
3018/// \returns A 128-bit integer vector containing the right-shifted values.3012/// \returns A 128-bit integer vector containing the right-shifted values.
3019static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a,3013static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3020 int __count) {3014_mm_srli_epi32(__m128i __a, int __count) {
3021 return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);3015 return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
3022}3016}
30233017
...@@ -3034,8 +3028,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a,...@@ -3034,8 +3028,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a,
3034/// A 128-bit integer vector in which bits [63:0] specify the number of bits3028/// A 128-bit integer vector in which bits [63:0] specify the number of bits
3035/// to right-shift each value in operand \a __a.3029/// to right-shift each value in operand \a __a.
3036/// \returns A 128-bit integer vector containing the right-shifted values.3030/// \returns A 128-bit integer vector containing the right-shifted values.
3037static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a,3031static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3038 __m128i __count) {3032_mm_srl_epi32(__m128i __a, __m128i __count) {
3039 return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);3033 return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
3040}3034}
30413035
...@@ -3052,8 +3046,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a,...@@ -3052,8 +3046,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a,
3052/// An integer value specifying the number of bits to right-shift each value3046/// An integer value specifying the number of bits to right-shift each value
3053/// in operand \a __a.3047/// in operand \a __a.
3054/// \returns A 128-bit integer vector containing the right-shifted values.3048/// \returns A 128-bit integer vector containing the right-shifted values.
3055static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a,3049static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3056 int __count) {3050_mm_srli_epi64(__m128i __a, int __count) {
3057 return __builtin_ia32_psrlqi128((__v2di)__a, __count);3051 return __builtin_ia32_psrlqi128((__v2di)__a, __count);
3058}3052}
30593053
...@@ -3070,8 +3064,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a,...@@ -3070,8 +3064,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a,
3070/// A 128-bit integer vector in which bits [63:0] specify the number of bits3064/// A 128-bit integer vector in which bits [63:0] specify the number of bits
3071/// to right-shift each value in operand \a __a.3065/// to right-shift each value in operand \a __a.
3072/// \returns A 128-bit integer vector containing the right-shifted values.3066/// \returns A 128-bit integer vector containing the right-shifted values.
3073static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a,3067static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3074 __m128i __count) {3068_mm_srl_epi64(__m128i __a, __m128i __count) {
3075 return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);3069 return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
3076}3070}
30773071
...@@ -3089,8 +3083,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a,...@@ -3089,8 +3083,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a,
3089/// \param __b3083/// \param __b
3090/// A 128-bit integer vector.3084/// A 128-bit integer vector.
3091/// \returns A 128-bit integer vector containing the comparison results.3085/// \returns A 128-bit integer vector containing the comparison results.
3092static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a,3086static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3093 __m128i __b) {3087_mm_cmpeq_epi8(__m128i __a, __m128i __b) {
3094 return (__m128i)((__v16qi)__a == (__v16qi)__b);3088 return (__m128i)((__v16qi)__a == (__v16qi)__b);
3095}3089}
30963090
...@@ -3108,8 +3102,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a,...@@ -3108,8 +3102,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a,
3108/// \param __b3102/// \param __b
3109/// A 128-bit integer vector.3103/// A 128-bit integer vector.
3110/// \returns A 128-bit integer vector containing the comparison results.3104/// \returns A 128-bit integer vector containing the comparison results.
3111static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a,3105static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3112 __m128i __b) {3106_mm_cmpeq_epi16(__m128i __a, __m128i __b) {
3113 return (__m128i)((__v8hi)__a == (__v8hi)__b);3107 return (__m128i)((__v8hi)__a == (__v8hi)__b);
3114}3108}
31153109
...@@ -3127,8 +3121,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a,...@@ -3127,8 +3121,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a,
3127/// \param __b3121/// \param __b
3128/// A 128-bit integer vector.3122/// A 128-bit integer vector.
3129/// \returns A 128-bit integer vector containing the comparison results.3123/// \returns A 128-bit integer vector containing the comparison results.
3130static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a,3124static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3131 __m128i __b) {3125_mm_cmpeq_epi32(__m128i __a, __m128i __b) {
3132 return (__m128i)((__v4si)__a == (__v4si)__b);3126 return (__m128i)((__v4si)__a == (__v4si)__b);
3133}3127}
31343128
...@@ -3147,8 +3141,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a,...@@ -3147,8 +3141,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a,
3147/// \param __b3141/// \param __b
3148/// A 128-bit integer vector.3142/// A 128-bit integer vector.
3149/// \returns A 128-bit integer vector containing the comparison results.3143/// \returns A 128-bit integer vector containing the comparison results.
3150static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a,3144static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3151 __m128i __b) {3145_mm_cmpgt_epi8(__m128i __a, __m128i __b) {
3152 /* This function always performs a signed comparison, but __v16qi is a char3146 /* This function always performs a signed comparison, but __v16qi is a char
3153 which may be signed or unsigned, so use __v16qs. */3147 which may be signed or unsigned, so use __v16qs. */
3154 return (__m128i)((__v16qs)__a > (__v16qs)__b);3148 return (__m128i)((__v16qs)__a > (__v16qs)__b);
...@@ -3169,8 +3163,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a,...@@ -3169,8 +3163,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a,
3169/// \param __b3163/// \param __b
3170/// A 128-bit integer vector.3164/// A 128-bit integer vector.
3171/// \returns A 128-bit integer vector containing the comparison results.3165/// \returns A 128-bit integer vector containing the comparison results.
3172static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a,3166static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3173 __m128i __b) {3167_mm_cmpgt_epi16(__m128i __a, __m128i __b) {
3174 return (__m128i)((__v8hi)__a > (__v8hi)__b);3168 return (__m128i)((__v8hi)__a > (__v8hi)__b);
3175}3169}
31763170
...@@ -3189,8 +3183,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a,...@@ -3189,8 +3183,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a,
3189/// \param __b3183/// \param __b
3190/// A 128-bit integer vector.3184/// A 128-bit integer vector.
3191/// \returns A 128-bit integer vector containing the comparison results.3185/// \returns A 128-bit integer vector containing the comparison results.
3192static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a,3186static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3193 __m128i __b) {3187_mm_cmpgt_epi32(__m128i __a, __m128i __b) {
3194 return (__m128i)((__v4si)__a > (__v4si)__b);3188 return (__m128i)((__v4si)__a > (__v4si)__b);
3195}3189}
31963190
...@@ -3209,8 +3203,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a,...@@ -3209,8 +3203,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a,
3209/// \param __b3203/// \param __b
3210/// A 128-bit integer vector.3204/// A 128-bit integer vector.
3211/// \returns A 128-bit integer vector containing the comparison results.3205/// \returns A 128-bit integer vector containing the comparison results.
3212static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a,3206static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3213 __m128i __b) {3207_mm_cmplt_epi8(__m128i __a, __m128i __b) {
3214 return _mm_cmpgt_epi8(__b, __a);3208 return _mm_cmpgt_epi8(__b, __a);
3215}3209}
32163210
...@@ -3229,8 +3223,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a,...@@ -3229,8 +3223,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a,
3229/// \param __b3223/// \param __b
3230/// A 128-bit integer vector.3224/// A 128-bit integer vector.
3231/// \returns A 128-bit integer vector containing the comparison results.3225/// \returns A 128-bit integer vector containing the comparison results.
3232static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a,3226static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3233 __m128i __b) {3227_mm_cmplt_epi16(__m128i __a, __m128i __b) {
3234 return _mm_cmpgt_epi16(__b, __a);3228 return _mm_cmpgt_epi16(__b, __a);
3235}3229}
32363230
...@@ -3249,8 +3243,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a,...@@ -3249,8 +3243,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a,
3249/// \param __b3243/// \param __b
3250/// A 128-bit integer vector.3244/// A 128-bit integer vector.
3251/// \returns A 128-bit integer vector containing the comparison results.3245/// \returns A 128-bit integer vector containing the comparison results.
3252static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi32(__m128i __a,3246static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3253 __m128i __b) {3247_mm_cmplt_epi32(__m128i __a, __m128i __b) {
3254 return _mm_cmpgt_epi32(__b, __a);3248 return _mm_cmpgt_epi32(__b, __a);
3255}3249}
32563250
...@@ -3379,7 +3373,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) {...@@ -3379,7 +3373,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) {
3379/// \param __a3373/// \param __a
3380/// A 32-bit signed integer operand.3374/// A 32-bit signed integer operand.
3381/// \returns A 128-bit vector of [4 x i32].3375/// \returns A 128-bit vector of [4 x i32].
3382static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {3376static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3377_mm_cvtsi32_si128(int __a) {
3383 return __extension__(__m128i)(__v4si){__a, 0, 0, 0};3378 return __extension__(__m128i)(__v4si){__a, 0, 0, 0};
3384}3379}
33853380
...@@ -3394,7 +3389,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {...@@ -3394,7 +3389,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {
3394/// \param __a3389/// \param __a
3395/// A 64-bit signed integer operand containing the value to be converted.3390/// A 64-bit signed integer operand containing the value to be converted.
3396/// \returns A 128-bit vector of [2 x i64] containing the converted value.3391/// \returns A 128-bit vector of [2 x i64] containing the converted value.
3397static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {3392static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
3393_mm_cvtsi64_si128(long long __a) {
3398 return __extension__(__m128i)(__v2di){__a, 0};3394 return __extension__(__m128i)(__v2di){__a, 0};
3399}3395}
34003396
...@@ -3409,7 +3405,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {...@@ -3409,7 +3405,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {
3409/// A vector of [4 x i32]. The least significant 32 bits are moved to the3405/// A vector of [4 x i32]. The least significant 32 bits are moved to the
3410/// destination.3406/// destination.
3411/// \returns A 32-bit signed integer containing the moved value.3407/// \returns A 32-bit signed integer containing the moved value.
3412static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {3408static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
3409_mm_cvtsi128_si32(__m128i __a) {
3413 __v4si __b = (__v4si)__a;3410 __v4si __b = (__v4si)__a;
3414 return __b[0];3411 return __b[0];
3415}3412}
...@@ -3425,7 +3422,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {...@@ -3425,7 +3422,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {
3425/// A vector of [2 x i64]. The least significant 64 bits are moved to the3422/// A vector of [2 x i64]. The least significant 64 bits are moved to the
3426/// destination.3423/// destination.
3427/// \returns A 64-bit signed integer containing the moved value.3424/// \returns A 64-bit signed integer containing the moved value.
3428static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) {3425static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR
3426_mm_cvtsi128_si64(__m128i __a) {
3429 return __a[0];3427 return __a[0];
3430}3428}
34313429
...@@ -4161,8 +4159,8 @@ void _mm_mfence(void);...@@ -4161,8 +4159,8 @@ void _mm_mfence(void);
4161/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are4159/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are
4162/// written to the higher 64 bits of the result.4160/// written to the higher 64 bits of the result.
4163/// \returns A 128-bit vector of [16 x i8] containing the converted values.4161/// \returns A 128-bit vector of [16 x i8] containing the converted values.
4164static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a,4162static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4165 __m128i __b) {4163_mm_packs_epi16(__m128i __a, __m128i __b) {
4166 return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);4164 return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
4167}4165}
41684166
...@@ -4184,8 +4182,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a,...@@ -4184,8 +4182,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a,
4184/// A 128-bit integer vector of [4 x i32]. The converted [4 x i16] values4182/// A 128-bit integer vector of [4 x i32]. The converted [4 x i16] values
4185/// are written to the higher 64 bits of the result.4183/// are written to the higher 64 bits of the result.
4186/// \returns A 128-bit vector of [8 x i16] containing the converted values.4184/// \returns A 128-bit vector of [8 x i16] containing the converted values.
4187static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a,4185static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4188 __m128i __b) {4186_mm_packs_epi32(__m128i __a, __m128i __b) {
4189 return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);4187 return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
4190}4188}
41914189
...@@ -4207,8 +4205,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a,...@@ -4207,8 +4205,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a,
4207/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are4205/// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are
4208/// written to the higher 64 bits of the result.4206/// written to the higher 64 bits of the result.
4209/// \returns A 128-bit vector of [16 x i8] containing the converted values.4207/// \returns A 128-bit vector of [16 x i8] containing the converted values.
4210static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a,4208static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4211 __m128i __b) {4209_mm_packus_epi16(__m128i __a, __m128i __b) {
4212 return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);4210 return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
4213}4211}
42144212
...@@ -4282,7 +4280,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a,...@@ -4282,7 +4280,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a,
4282/// A 128-bit integer vector containing the values with bits to be extracted.4280/// A 128-bit integer vector containing the values with bits to be extracted.
4283/// \returns The most significant bits from each 8-bit element in \a __a,4281/// \returns The most significant bits from each 8-bit element in \a __a,
4284/// written to bits [15:0]. The other bits are assigned zeros.4282/// written to bits [15:0]. The other bits are assigned zeros.
4285static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) {4283static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
4284_mm_movemask_epi8(__m128i __a) {
4286 return __builtin_ia32_pmovmskb128((__v16qi)__a);4285 return __builtin_ia32_pmovmskb128((__v16qi)__a);
4287}4286}
42884287
...@@ -4415,8 +4414,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) {...@@ -4415,8 +4414,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) {
4415/// Bits [119:112] are written to bits [111:104] of the result. \n4414/// Bits [119:112] are written to bits [111:104] of the result. \n
4416/// Bits [127:120] are written to bits [127:120] of the result.4415/// Bits [127:120] are written to bits [127:120] of the result.
4417/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.4416/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4418static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a,4417static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4419 __m128i __b) {4418_mm_unpackhi_epi8(__m128i __a, __m128i __b) {
4420 return (__m128i)__builtin_shufflevector(4419 return (__m128i)__builtin_shufflevector(
4421 (__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11,4420 (__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11,
4422 16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15);4421 16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15);
...@@ -4443,8 +4442,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a,...@@ -4443,8 +4442,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a,
4443/// Bits [111:96] are written to bits [95:80] of the result. \n4442/// Bits [111:96] are written to bits [95:80] of the result. \n
4444/// Bits [127:112] are written to bits [127:112] of the result.4443/// Bits [127:112] are written to bits [127:112] of the result.
4445/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.4444/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4446static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a,4445static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4447 __m128i __b) {4446_mm_unpackhi_epi16(__m128i __a, __m128i __b) {
4448 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5,4447 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5,
4449 8 + 5, 6, 8 + 6, 7, 8 + 7);4448 8 + 5, 6, 8 + 6, 7, 8 + 7);
4450}4449}
...@@ -4466,8 +4465,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a,...@@ -4466,8 +4465,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a,
4466/// Bits [95:64] are written to bits [64:32] of the destination. \n4465/// Bits [95:64] are written to bits [64:32] of the destination. \n
4467/// Bits [127:96] are written to bits [127:96] of the destination.4466/// Bits [127:96] are written to bits [127:96] of the destination.
4468/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.4467/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4469static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a,4468static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4470 __m128i __b) {4469_mm_unpackhi_epi32(__m128i __a, __m128i __b) {
4471 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3,4470 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3,
4472 4 + 3);4471 4 + 3);
4473}4472}
...@@ -4487,8 +4486,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a,...@@ -4487,8 +4486,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a,
4487/// A 128-bit vector of [2 x i64]. \n4486/// A 128-bit vector of [2 x i64]. \n
4488/// Bits [127:64] are written to bits [127:64] of the destination.4487/// Bits [127:64] are written to bits [127:64] of the destination.
4489/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.4488/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4490static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a,4489static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4491 __m128i __b) {4490_mm_unpackhi_epi64(__m128i __a, __m128i __b) {
4492 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1);4491 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1);
4493}4492}
44944493
...@@ -4521,8 +4520,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a,...@@ -4521,8 +4520,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a,
4521/// Bits [55:48] are written to bits [111:104] of the result. \n4520/// Bits [55:48] are written to bits [111:104] of the result. \n
4522/// Bits [63:56] are written to bits [127:120] of the result.4521/// Bits [63:56] are written to bits [127:120] of the result.
4523/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.4522/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4524static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a,4523static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4525 __m128i __b) {4524_mm_unpacklo_epi8(__m128i __a, __m128i __b) {
4526 return (__m128i)__builtin_shufflevector(4525 return (__m128i)__builtin_shufflevector(
4527 (__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4,4526 (__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4,
4528 16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7);4527 16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7);
...@@ -4550,8 +4549,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a,...@@ -4550,8 +4549,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a,
4550/// Bits [47:32] are written to bits [95:80] of the result. \n4549/// Bits [47:32] are written to bits [95:80] of the result. \n
4551/// Bits [63:48] are written to bits [127:112] of the result.4550/// Bits [63:48] are written to bits [127:112] of the result.
4552/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.4551/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4553static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a,4552static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4554 __m128i __b) {4553_mm_unpacklo_epi16(__m128i __a, __m128i __b) {
4555 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1,4554 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1,
4556 8 + 1, 2, 8 + 2, 3, 8 + 3);4555 8 + 1, 2, 8 + 2, 3, 8 + 3);
4557}4556}
...@@ -4573,8 +4572,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a,...@@ -4573,8 +4572,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a,
4573/// Bits [31:0] are written to bits [64:32] of the destination. \n4572/// Bits [31:0] are written to bits [64:32] of the destination. \n
4574/// Bits [63:32] are written to bits [127:96] of the destination.4573/// Bits [63:32] are written to bits [127:96] of the destination.
4575/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.4574/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4576static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a,4575static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4577 __m128i __b) {4576_mm_unpacklo_epi32(__m128i __a, __m128i __b) {
4578 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1,4577 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1,
4579 4 + 1);4578 4 + 1);
4580}4579}
...@@ -4594,8 +4593,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a,...@@ -4594,8 +4593,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a,
4594/// A 128-bit vector of [2 x i64]. \n4593/// A 128-bit vector of [2 x i64]. \n
4595/// Bits [63:0] are written to bits [127:64] of the destination. \n4594/// Bits [63:0] are written to bits [127:64] of the destination. \n
4596/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.4595/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4597static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi64(__m128i __a,4596static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
4598 __m128i __b) {4597_mm_unpacklo_epi64(__m128i __a, __m128i __b) {
4599 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0);4598 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0);
4600}4599}
46014600
...@@ -4701,7 +4700,8 @@ _mm_unpacklo_pd(__m128d __a, __m128d __b) {...@@ -4701,7 +4700,8 @@ _mm_unpacklo_pd(__m128d __a, __m128d __b) {
4701/// be extracted.4700/// be extracted.
4702/// \returns The sign bits from each of the double-precision elements in \a __a,4701/// \returns The sign bits from each of the double-precision elements in \a __a,
4703/// written to bits [1:0]. The remaining bits are assigned values of zero.4702/// written to bits [1:0]. The remaining bits are assigned values of zero.
4704static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_pd(__m128d __a) {4703static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
4704_mm_movemask_pd(__m128d __a) {
4705 return __builtin_ia32_movmskpd((__v2df)__a);4705 return __builtin_ia32_movmskpd((__v2df)__a);
4706}4706}
47074707
lib/include/f16cintrin.h+23-9
...@@ -15,10 +15,21 @@...@@ -15,10 +15,21 @@
15#define __F16CINTRIN_H15#define __F16CINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS128 \18#if defined(__cplusplus) && (__cplusplus >= 201103L)
19 __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(128)))19#define __DEFAULT_FN_ATTRS128 \
20#define __DEFAULT_FN_ATTRS256 \20 __attribute__((__always_inline__, __nodebug__, __target__("f16c"), \
21 __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(256)))21 __min_vector_width__(128))) constexpr
22#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, __target__("f16c"), \
24 __min_vector_width__(256))) constexpr
25#else
26#define __DEFAULT_FN_ATTRS128 \
27 __attribute__((__always_inline__, __nodebug__, __target__("f16c"), \
28 __min_vector_width__(128)))
29#define __DEFAULT_FN_ATTRS256 \
30 __attribute__((__always_inline__, __nodebug__, __target__("f16c"), \
31 __min_vector_width__(256)))
32#endif
2233
23/* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,34/* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
24 * but that's because icc can emulate these without f16c using a library call.35 * but that's because icc can emulate these without f16c using a library call.
...@@ -38,9 +49,7 @@...@@ -38,9 +49,7 @@
38static __inline float __DEFAULT_FN_ATTRS12849static __inline float __DEFAULT_FN_ATTRS128
39_cvtsh_ss(unsigned short __a)50_cvtsh_ss(unsigned short __a)
40{51{
41 __v8hi __v = {(short)__a, 0, 0, 0, 0, 0, 0, 0};52 return (float)__builtin_bit_cast(__fp16, __a);
42 __v4sf __r = __builtin_ia32_vcvtph2ps(__v);
43 return __r[0];
44}53}
4554
46/// Converts a 32-bit single-precision float value to a 16-bit55/// Converts a 32-bit single-precision float value to a 16-bit
...@@ -109,7 +118,10 @@ _cvtsh_ss(unsigned short __a)...@@ -109,7 +118,10 @@ _cvtsh_ss(unsigned short __a)
109static __inline __m128 __DEFAULT_FN_ATTRS128118static __inline __m128 __DEFAULT_FN_ATTRS128
110_mm_cvtph_ps(__m128i __a)119_mm_cvtph_ps(__m128i __a)
111{120{
112 return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a);121 typedef __fp16 __v4fp16 __attribute__((__vector_size__(8)));
122
123 __v4hi __v = __builtin_shufflevector((__v8hi)__a, (__v8hi)__a, 0, 1, 2, 3);
124 return (__m128) __builtin_convertvector((__v4fp16)__v, __v4sf);
113}125}
114126
115/// Converts a 256-bit vector of [8 x float] into a 128-bit vector127/// Converts a 256-bit vector of [8 x float] into a 128-bit vector
...@@ -153,7 +165,9 @@ _mm_cvtph_ps(__m128i __a)...@@ -153,7 +165,9 @@ _mm_cvtph_ps(__m128i __a)
153static __inline __m256 __DEFAULT_FN_ATTRS256165static __inline __m256 __DEFAULT_FN_ATTRS256
154_mm256_cvtph_ps(__m128i __a)166_mm256_cvtph_ps(__m128i __a)
155{167{
156 return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a);168 typedef __fp16 __v8fp16 __attribute__((__vector_size__(16), __aligned__(16)));
169
170 return (__m256) __builtin_convertvector((__v8fp16)__a, __v8sf);
157}171}
158172
159#undef __DEFAULT_FN_ATTRS128173#undef __DEFAULT_FN_ATTRS128
lib/include/float.h+16-155
...@@ -7,13 +7,21 @@...@@ -7,13 +7,21 @@
7 *===-----------------------------------------------------------------------===7 *===-----------------------------------------------------------------------===
8 */8 */
99
10#ifndef __CLANG_FLOAT_H
11#define __CLANG_FLOAT_H
12
13#if defined(__MVS__) && __has_include_next(<float.h>)10#if defined(__MVS__) && __has_include_next(<float.h>)
11#include <__float_header_macro.h>
14#include_next <float.h>12#include_next <float.h>
15#else13#else
1614
15#if !defined(__need_infinity_nan)
16#define __need_float_float
17#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \
18 !defined(__STRICT_ANSI__)
19#define __need_infinity_nan
20#endif
21#include <__float_header_macro.h>
22#endif
23
24#ifdef __need_float_float
17/* If we're on MinGW, fall back to the system's float.h, which might have25/* If we're on MinGW, fall back to the system's float.h, which might have
18 * additional definitions provided for Windows.26 * additional definitions provided for Windows.
19 * For more details see http://msdn.microsoft.com/en-us/library/y0ybw9fy.aspx27 * For more details see http://msdn.microsoft.com/en-us/library/y0ybw9fy.aspx
...@@ -26,162 +34,15 @@...@@ -26,162 +34,15 @@
2634
27# include_next <float.h>35# include_next <float.h>
2836
29/* Undefine anything that we'll be redefining below. */
30# undef FLT_EVAL_METHOD
31# undef FLT_ROUNDS
32# undef FLT_RADIX
33# undef FLT_MANT_DIG
34# undef DBL_MANT_DIG
35# undef LDBL_MANT_DIG
36#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \
37 !defined(__STRICT_ANSI__) || \
38 (defined(__cplusplus) && __cplusplus >= 201103L) || \
39 (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE))
40# undef DECIMAL_DIG
41# endif
42# undef FLT_DIG
43# undef DBL_DIG
44# undef LDBL_DIG
45# undef FLT_MIN_EXP
46# undef DBL_MIN_EXP
47# undef LDBL_MIN_EXP
48# undef FLT_MIN_10_EXP
49# undef DBL_MIN_10_EXP
50# undef LDBL_MIN_10_EXP
51# undef FLT_MAX_EXP
52# undef DBL_MAX_EXP
53# undef LDBL_MAX_EXP
54# undef FLT_MAX_10_EXP
55# undef DBL_MAX_10_EXP
56# undef LDBL_MAX_10_EXP
57# undef FLT_MAX
58# undef DBL_MAX
59# undef LDBL_MAX
60# undef FLT_EPSILON
61# undef DBL_EPSILON
62# undef LDBL_EPSILON
63# undef FLT_MIN
64# undef DBL_MIN
65# undef LDBL_MIN
66#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \
67 !defined(__STRICT_ANSI__) || \
68 (defined(__cplusplus) && __cplusplus >= 201703L) || \
69 (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE))
70# undef FLT_TRUE_MIN
71# undef DBL_TRUE_MIN
72# undef LDBL_TRUE_MIN
73# undef FLT_DECIMAL_DIG
74# undef DBL_DECIMAL_DIG
75# undef LDBL_DECIMAL_DIG
76# undef FLT_HAS_SUBNORM
77# undef DBL_HAS_SUBNORM
78# undef LDBL_HAS_SUBNORM
79# endif
80#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \
81 !defined(__STRICT_ANSI__)
82# undef FLT_NORM_MAX
83# undef DBL_NORM_MAX
84# undef LDBL_NORM_MAX
85#endif
86#endif
87
88#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \
89 !defined(__STRICT_ANSI__)
90# undef INFINITY
91# undef NAN
92#endif
93
94/* Characteristics of floating point types, C99 5.2.4.2.2 */
95
96#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \
97 (defined(__cplusplus) && __cplusplus >= 201103L)
98#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
99#endif37#endif
100#define FLT_ROUNDS (__builtin_flt_rounds())
101#define FLT_RADIX __FLT_RADIX__
102
103#define FLT_MANT_DIG __FLT_MANT_DIG__
104#define DBL_MANT_DIG __DBL_MANT_DIG__
105#define LDBL_MANT_DIG __LDBL_MANT_DIG__
10638
107#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \39#include <__float_float.h>
108 !defined(__STRICT_ANSI__) || \40#undef __need_float_float
109 (defined(__cplusplus) && __cplusplus >= 201103L) || \
110 (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE))
111# define DECIMAL_DIG __DECIMAL_DIG__
112#endif41#endif
11342
114#define FLT_DIG __FLT_DIG__43#ifdef __need_infinity_nan
115#define DBL_DIG __DBL_DIG__44#include <__float_infinity_nan.h>
116#define LDBL_DIG __LDBL_DIG__45#undef __need_infinity_nan
117
118#define FLT_MIN_EXP __FLT_MIN_EXP__
119#define DBL_MIN_EXP __DBL_MIN_EXP__
120#define LDBL_MIN_EXP __LDBL_MIN_EXP__
121
122#define FLT_MIN_10_EXP __FLT_MIN_10_EXP__
123#define DBL_MIN_10_EXP __DBL_MIN_10_EXP__
124#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__
125
126#define FLT_MAX_EXP __FLT_MAX_EXP__
127#define DBL_MAX_EXP __DBL_MAX_EXP__
128#define LDBL_MAX_EXP __LDBL_MAX_EXP__
129
130#define FLT_MAX_10_EXP __FLT_MAX_10_EXP__
131#define DBL_MAX_10_EXP __DBL_MAX_10_EXP__
132#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__
133
134#define FLT_MAX __FLT_MAX__
135#define DBL_MAX __DBL_MAX__
136#define LDBL_MAX __LDBL_MAX__
137
138#define FLT_EPSILON __FLT_EPSILON__
139#define DBL_EPSILON __DBL_EPSILON__
140#define LDBL_EPSILON __LDBL_EPSILON__
141
142#define FLT_MIN __FLT_MIN__
143#define DBL_MIN __DBL_MIN__
144#define LDBL_MIN __LDBL_MIN__
145
146#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \
147 !defined(__STRICT_ANSI__) || \
148 (defined(__cplusplus) && __cplusplus >= 201703L) || \
149 (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE))
150# define FLT_TRUE_MIN __FLT_DENORM_MIN__
151# define DBL_TRUE_MIN __DBL_DENORM_MIN__
152# define LDBL_TRUE_MIN __LDBL_DENORM_MIN__
153# define FLT_DECIMAL_DIG __FLT_DECIMAL_DIG__
154# define DBL_DECIMAL_DIG __DBL_DECIMAL_DIG__
155# define LDBL_DECIMAL_DIG __LDBL_DECIMAL_DIG__
156# define FLT_HAS_SUBNORM __FLT_HAS_DENORM__
157# define DBL_HAS_SUBNORM __DBL_HAS_DENORM__
158# define LDBL_HAS_SUBNORM __LDBL_HAS_DENORM__
159#endif46#endif
16047
161#if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \
162 !defined(__STRICT_ANSI__)
163 /* C23 5.2.5.3.3p29-30 */
164# define INFINITY (__builtin_inff())
165# define NAN (__builtin_nanf(""))
166 /* C23 5.2.5.3.3p32 */
167# define FLT_NORM_MAX __FLT_NORM_MAX__
168# define DBL_NORM_MAX __DBL_NORM_MAX__
169# define LDBL_NORM_MAX __LDBL_NORM_MAX__
170#endif
171
172#ifdef __STDC_WANT_IEC_60559_TYPES_EXT__
173# define FLT16_MANT_DIG __FLT16_MANT_DIG__
174# define FLT16_DECIMAL_DIG __FLT16_DECIMAL_DIG__
175# define FLT16_DIG __FLT16_DIG__
176# define FLT16_MIN_EXP __FLT16_MIN_EXP__
177# define FLT16_MIN_10_EXP __FLT16_MIN_10_EXP__
178# define FLT16_MAX_EXP __FLT16_MAX_EXP__
179# define FLT16_MAX_10_EXP __FLT16_MAX_10_EXP__
180# define FLT16_MAX __FLT16_MAX__
181# define FLT16_EPSILON __FLT16_EPSILON__
182# define FLT16_MIN __FLT16_MIN__
183# define FLT16_TRUE_MIN __FLT16_TRUE_MIN__
184#endif /* __STDC_WANT_IEC_60559_TYPES_EXT__ */
185
186#endif /* __MVS__ */48#endif /* __MVS__ */
187#endif /* __CLANG_FLOAT_H */
lib/include/fma4intrin.h+98-96
...@@ -20,100 +20,100 @@...@@ -20,100 +20,100 @@
20#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(128)))20#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(128)))
21#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(256)))21#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(256)))
2222
23static __inline__ __m128 __DEFAULT_FN_ATTRS12823#if defined(__cplusplus) && (__cplusplus >= 201103L)
24_mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)24#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
25{25#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
26 return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);26#else
27#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
28#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
29#endif
30
31static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
32_mm_macc_ps(__m128 __A, __m128 __B, __m128 __C) {
33 return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B,
34 (__v4sf)__C);
27}35}
2836
29static __inline__ __m128d __DEFAULT_FN_ATTRS12837static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
30_mm_macc_pd(__m128d __A, __m128d __B, __m128d __C)38_mm_macc_pd(__m128d __A, __m128d __B, __m128d __C) {
31{39 return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B,
32 return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C);40 (__v2df)__C);
33}41}
3442
35static __inline__ __m128 __DEFAULT_FN_ATTRS12843static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
36_mm_macc_ss(__m128 __A, __m128 __B, __m128 __C)44_mm_macc_ss(__m128 __A, __m128 __B, __m128 __C) {
37{45 return _mm_set_ss(__builtin_elementwise_fma(__A[0], __B[0], __C[0]));
38 return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
39}46}
4047
41static __inline__ __m128d __DEFAULT_FN_ATTRS12848static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
42_mm_macc_sd(__m128d __A, __m128d __B, __m128d __C)49_mm_macc_sd(__m128d __A, __m128d __B, __m128d __C) {
43{50 return _mm_set_sd(__builtin_elementwise_fma(__A[0], __B[0], __C[0]));
44 return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, (__v2df)__C);
45}51}
4652
47static __inline__ __m128 __DEFAULT_FN_ATTRS12853static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
48_mm_msub_ps(__m128 __A, __m128 __B, __m128 __C)54_mm_msub_ps(__m128 __A, __m128 __B, __m128 __C) {
49{55 return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B,
50 return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);56 -(__v4sf)__C);
51}57}
5258
53static __inline__ __m128d __DEFAULT_FN_ATTRS12859static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
54_mm_msub_pd(__m128d __A, __m128d __B, __m128d __C)60_mm_msub_pd(__m128d __A, __m128d __B, __m128d __C) {
55{61 return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B,
56 return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C);62 -(__v2df)__C);
57}63}
5864
59static __inline__ __m128 __DEFAULT_FN_ATTRS12865static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
60_mm_msub_ss(__m128 __A, __m128 __B, __m128 __C)66_mm_msub_ss(__m128 __A, __m128 __B, __m128 __C) {
61{67 return _mm_set_ss(__builtin_elementwise_fma(__A[0], __B[0], -__C[0]));
62 return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);
63}68}
6469
65static __inline__ __m128d __DEFAULT_FN_ATTRS12870static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
66_mm_msub_sd(__m128d __A, __m128d __B, __m128d __C)71_mm_msub_sd(__m128d __A, __m128d __B, __m128d __C) {
67{72 return _mm_set_sd(__builtin_elementwise_fma(__A[0], __B[0], -__C[0]));
68 return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, -(__v2df)__C);
69}73}
7074
71static __inline__ __m128 __DEFAULT_FN_ATTRS12875static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
72_mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C)76_mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C) {
73{77 return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B,
74 return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C);78 (__v4sf)__C);
75}79}
7680
77static __inline__ __m128d __DEFAULT_FN_ATTRS12881static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
78_mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C)82_mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C) {
79{83 return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B,
80 return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C);84 (__v2df)__C);
81}85}
8286
83static __inline__ __m128 __DEFAULT_FN_ATTRS12887static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
84_mm_nmacc_ss(__m128 __A, __m128 __B, __m128 __C)88_mm_nmacc_ss(__m128 __A, __m128 __B, __m128 __C) {
85{89 return _mm_set_ss(__builtin_elementwise_fma(-__A[0], __B[0], __C[0]));
86 return (__m128)__builtin_ia32_vfmaddss(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
87}90}
8891
89static __inline__ __m128d __DEFAULT_FN_ATTRS12892static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
90_mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C)93_mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C) {
91{94 return _mm_set_sd(__builtin_elementwise_fma(-__A[0], __B[0], __C[0]));
92 return (__m128d)__builtin_ia32_vfmaddsd(-(__v2df)__A, (__v2df)__B, (__v2df)__C);
93}95}
9496
95static __inline__ __m128 __DEFAULT_FN_ATTRS12897static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
96_mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C)98_mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C) {
97{99 return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B,
98 return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);100 -(__v4sf)__C);
99}101}
100102
101static __inline__ __m128d __DEFAULT_FN_ATTRS128103static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
102_mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C)104_mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C) {
103{105 return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B,
104 return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C);106 -(__v2df)__C);
105}107}
106108
107static __inline__ __m128 __DEFAULT_FN_ATTRS128109static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
108_mm_nmsub_ss(__m128 __A, __m128 __B, __m128 __C)110_mm_nmsub_ss(__m128 __A, __m128 __B, __m128 __C) {
109{111 return _mm_set_ss(__builtin_elementwise_fma(-__A[0], __B[0], -__C[0]));
110 return (__m128)__builtin_ia32_vfmaddss(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);
111}112}
112113
113static __inline__ __m128d __DEFAULT_FN_ATTRS128114static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
114_mm_nmsub_sd(__m128d __A, __m128d __B, __m128d __C)115_mm_nmsub_sd(__m128d __A, __m128d __B, __m128d __C) {
115{116 return _mm_set_sd(__builtin_elementwise_fma(-__A[0], __B[0], -__C[0]));
116 return (__m128d)__builtin_ia32_vfmaddsd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C);
117}117}
118118
119static __inline__ __m128 __DEFAULT_FN_ATTRS128119static __inline__ __m128 __DEFAULT_FN_ATTRS128
...@@ -140,52 +140,52 @@ _mm_msubadd_pd(__m128d __A, __m128d __B, __m128d __C)...@@ -140,52 +140,52 @@ _mm_msubadd_pd(__m128d __A, __m128d __B, __m128d __C)
140 return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, -(__v2df)__C);140 return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, -(__v2df)__C);
141}141}
142142
143static __inline__ __m256 __DEFAULT_FN_ATTRS256143static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
144_mm256_macc_ps(__m256 __A, __m256 __B, __m256 __C)144_mm256_macc_ps(__m256 __A, __m256 __B, __m256 __C) {
145{145 return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B,
146 return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);146 (__v8sf)__C);
147}147}
148148
149static __inline__ __m256d __DEFAULT_FN_ATTRS256149static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
150_mm256_macc_pd(__m256d __A, __m256d __B, __m256d __C)150_mm256_macc_pd(__m256d __A, __m256d __B, __m256d __C) {
151{151 return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B,
152 return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);152 (__v4df)__C);
153}153}
154154
155static __inline__ __m256 __DEFAULT_FN_ATTRS256155static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
156_mm256_msub_ps(__m256 __A, __m256 __B, __m256 __C)156_mm256_msub_ps(__m256 __A, __m256 __B, __m256 __C) {
157{157 return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B,
158 return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C);158 -(__v8sf)__C);
159}159}
160160
161static __inline__ __m256d __DEFAULT_FN_ATTRS256161static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
162_mm256_msub_pd(__m256d __A, __m256d __B, __m256d __C)162_mm256_msub_pd(__m256d __A, __m256d __B, __m256d __C) {
163{163 return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B,
164 return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C);164 -(__v4df)__C);
165}165}
166166
167static __inline__ __m256 __DEFAULT_FN_ATTRS256167static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
168_mm256_nmacc_ps(__m256 __A, __m256 __B, __m256 __C)168_mm256_nmacc_ps(__m256 __A, __m256 __B, __m256 __C) {
169{169 return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B,
170 return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C);170 (__v8sf)__C);
171}171}
172172
173static __inline__ __m256d __DEFAULT_FN_ATTRS256173static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
174_mm256_nmacc_pd(__m256d __A, __m256d __B, __m256d __C)174_mm256_nmacc_pd(__m256d __A, __m256d __B, __m256d __C) {
175{175 return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B,
176 return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C);176 (__v4df)__C);
177}177}
178178
179static __inline__ __m256 __DEFAULT_FN_ATTRS256179static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
180_mm256_nmsub_ps(__m256 __A, __m256 __B, __m256 __C)180_mm256_nmsub_ps(__m256 __A, __m256 __B, __m256 __C) {
181{181 return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B,
182 return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C);182 -(__v8sf)__C);
183}183}
184184
185static __inline__ __m256d __DEFAULT_FN_ATTRS256185static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
186_mm256_nmsub_pd(__m256d __A, __m256d __B, __m256d __C)186_mm256_nmsub_pd(__m256d __A, __m256d __B, __m256d __C) {
187{187 return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B,
188 return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C);188 -(__v4df)__C);
189}189}
190190
191static __inline__ __m256 __DEFAULT_FN_ATTRS256191static __inline__ __m256 __DEFAULT_FN_ATTRS256
...@@ -214,5 +214,7 @@ _mm256_msubadd_pd(__m256d __A, __m256d __B, __m256d __C)...@@ -214,5 +214,7 @@ _mm256_msubadd_pd(__m256d __A, __m256d __B, __m256d __C)
214214
215#undef __DEFAULT_FN_ATTRS128215#undef __DEFAULT_FN_ATTRS128
216#undef __DEFAULT_FN_ATTRS256216#undef __DEFAULT_FN_ATTRS256
217#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
218#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
217219
218#endif /* __FMA4INTRIN_H */220#endif /* __FMA4INTRIN_H */
lib/include/fmaintrin.h+96-66
...@@ -15,8 +15,20 @@...@@ -15,8 +15,20 @@
15#define __FMAINTRIN_H15#define __FMAINTRIN_H
1616
17/* Define the default attributes for the functions in this file. */17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma"), __min_vector_width__(128)))18#define __DEFAULT_FN_ATTRS128 \
19#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma"), __min_vector_width__(256)))19 __attribute__((__always_inline__, __nodebug__, __target__("fma"), \
20 __min_vector_width__(128)))
21#define __DEFAULT_FN_ATTRS256 \
22 __attribute__((__always_inline__, __nodebug__, __target__("fma"), \
23 __min_vector_width__(256)))
24
25#if defined(__cplusplus) && (__cplusplus >= 201103L)
26#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr
27#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
28#else
29#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128
30#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
31#endif
2032
21/// Computes a multiply-add of 128-bit vectors of [4 x float].33/// Computes a multiply-add of 128-bit vectors of [4 x float].
22/// For each element, computes <c> (__A * __B) + __C </c>.34/// For each element, computes <c> (__A * __B) + __C </c>.
...@@ -32,10 +44,11 @@...@@ -32,10 +44,11 @@
32/// \param __C44/// \param __C
33/// A 128-bit vector of [4 x float] containing the addend.45/// A 128-bit vector of [4 x float] containing the addend.
34/// \returns A 128-bit vector of [4 x float] containing the result.46/// \returns A 128-bit vector of [4 x float] containing the result.
35static __inline__ __m128 __DEFAULT_FN_ATTRS12847static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
36_mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C)48_mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C)
37{49{
38 return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);50 return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B,
51 (__v4sf)__C);
39}52}
4053
41/// Computes a multiply-add of 128-bit vectors of [2 x double].54/// Computes a multiply-add of 128-bit vectors of [2 x double].
...@@ -52,10 +65,11 @@ _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C)...@@ -52,10 +65,11 @@ _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C)
52/// \param __C65/// \param __C
53/// A 128-bit vector of [2 x double] containing the addend.66/// A 128-bit vector of [2 x double] containing the addend.
54/// \returns A 128-bit [2 x double] vector containing the result.67/// \returns A 128-bit [2 x double] vector containing the result.
55static __inline__ __m128d __DEFAULT_FN_ATTRS12868static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
56_mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C)69_mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C)
57{70{
58 return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C);71 return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B,
72 (__v2df)__C);
59}73}
6074
61/// Computes a scalar multiply-add of the single-precision values in the75/// Computes a scalar multiply-add of the single-precision values in the
...@@ -81,10 +95,10 @@ _mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C)...@@ -81,10 +95,10 @@ _mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C)
81/// 32 bits.95/// 32 bits.
82/// \returns A 128-bit vector of [4 x float] containing the result in the low96/// \returns A 128-bit vector of [4 x float] containing the result in the low
83/// 32 bits and a copy of \a __A[127:32] in the upper 96 bits.97/// 32 bits and a copy of \a __A[127:32] in the upper 96 bits.
84static __inline__ __m128 __DEFAULT_FN_ATTRS12898static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
85_mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C)99_mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C) {
86{100 __A[0] = __builtin_elementwise_fma(__A[0], __B[0], __C[0]);
87 return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);101 return __A;
88}102}
89103
90/// Computes a scalar multiply-add of the double-precision values in the104/// Computes a scalar multiply-add of the double-precision values in the
...@@ -110,10 +124,10 @@ _mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C)...@@ -110,10 +124,10 @@ _mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C)
110/// 64 bits.124/// 64 bits.
111/// \returns A 128-bit vector of [2 x double] containing the result in the low125/// \returns A 128-bit vector of [2 x double] containing the result in the low
112/// 64 bits and a copy of \a __A[127:64] in the upper 64 bits.126/// 64 bits and a copy of \a __A[127:64] in the upper 64 bits.
113static __inline__ __m128d __DEFAULT_FN_ATTRS128127static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
114_mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C)128_mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C) {
115{129 __A[0] = __builtin_elementwise_fma(__A[0], __B[0], __C[0]);
116 return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, (__v2df)__B, (__v2df)__C);130 return __A;
117}131}
118132
119/// Computes a multiply-subtract of 128-bit vectors of [4 x float].133/// Computes a multiply-subtract of 128-bit vectors of [4 x float].
...@@ -130,10 +144,11 @@ _mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C)...@@ -130,10 +144,11 @@ _mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C)
130/// \param __C144/// \param __C
131/// A 128-bit vector of [4 x float] containing the subtrahend.145/// A 128-bit vector of [4 x float] containing the subtrahend.
132/// \returns A 128-bit vector of [4 x float] containing the result.146/// \returns A 128-bit vector of [4 x float] containing the result.
133static __inline__ __m128 __DEFAULT_FN_ATTRS128147static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
134_mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C)148_mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C)
135{149{
136 return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);150 return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B,
151 -(__v4sf)__C);
137}152}
138153
139/// Computes a multiply-subtract of 128-bit vectors of [2 x double].154/// Computes a multiply-subtract of 128-bit vectors of [2 x double].
...@@ -150,10 +165,11 @@ _mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C)...@@ -150,10 +165,11 @@ _mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C)
150/// \param __C165/// \param __C
151/// A 128-bit vector of [2 x double] containing the addend.166/// A 128-bit vector of [2 x double] containing the addend.
152/// \returns A 128-bit vector of [2 x double] containing the result.167/// \returns A 128-bit vector of [2 x double] containing the result.
153static __inline__ __m128d __DEFAULT_FN_ATTRS128168static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
154_mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C)169_mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C)
155{170{
156 return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C);171 return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B,
172 -(__v2df)__C);
157}173}
158174
159/// Computes a scalar multiply-subtract of the single-precision values in175/// Computes a scalar multiply-subtract of the single-precision values in
...@@ -179,10 +195,10 @@ _mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C)...@@ -179,10 +195,10 @@ _mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C)
179/// 32 bits.195/// 32 bits.
180/// \returns A 128-bit vector of [4 x float] containing the result in the low196/// \returns A 128-bit vector of [4 x float] containing the result in the low
181/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits.197/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits.
182static __inline__ __m128 __DEFAULT_FN_ATTRS128198static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
183_mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C)199_mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C) {
184{200 __A[0] = __builtin_elementwise_fma(__A[0], __B[0], -__C[0]);
185 return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);201 return __A;
186}202}
187203
188/// Computes a scalar multiply-subtract of the double-precision values in204/// Computes a scalar multiply-subtract of the double-precision values in
...@@ -208,10 +224,10 @@ _mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C)...@@ -208,10 +224,10 @@ _mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C)
208/// 64 bits.224/// 64 bits.
209/// \returns A 128-bit vector of [2 x double] containing the result in the low225/// \returns A 128-bit vector of [2 x double] containing the result in the low
210/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits.226/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits.
211static __inline__ __m128d __DEFAULT_FN_ATTRS128227static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
212_mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C)228_mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C) {
213{229 __A[0] = __builtin_elementwise_fma(__A[0], __B[0], -__C[0]);
214 return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, (__v2df)__B, -(__v2df)__C);230 return __A;
215}231}
216232
217/// Computes a negated multiply-add of 128-bit vectors of [4 x float].233/// Computes a negated multiply-add of 128-bit vectors of [4 x float].
...@@ -228,10 +244,11 @@ _mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C)...@@ -228,10 +244,11 @@ _mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C)
228/// \param __C244/// \param __C
229/// A 128-bit vector of [4 x float] containing the addend.245/// A 128-bit vector of [4 x float] containing the addend.
230/// \returns A 128-bit [4 x float] vector containing the result.246/// \returns A 128-bit [4 x float] vector containing the result.
231static __inline__ __m128 __DEFAULT_FN_ATTRS128247static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
232_mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C)248_mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C)
233{249{
234 return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C);250 return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B,
251 (__v4sf)__C);
235}252}
236253
237/// Computes a negated multiply-add of 128-bit vectors of [2 x double].254/// Computes a negated multiply-add of 128-bit vectors of [2 x double].
...@@ -248,10 +265,11 @@ _mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C)...@@ -248,10 +265,11 @@ _mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C)
248/// \param __C265/// \param __C
249/// A 128-bit vector of [2 x double] containing the addend.266/// A 128-bit vector of [2 x double] containing the addend.
250/// \returns A 128-bit vector of [2 x double] containing the result.267/// \returns A 128-bit vector of [2 x double] containing the result.
251static __inline__ __m128d __DEFAULT_FN_ATTRS128268static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
252_mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C)269_mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C)
253{270{
254 return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C);271 return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B,
272 (__v2df)__C);
255}273}
256274
257/// Computes a scalar negated multiply-add of the single-precision values in275/// Computes a scalar negated multiply-add of the single-precision values in
...@@ -277,10 +295,10 @@ _mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C)...@@ -277,10 +295,10 @@ _mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C)
277/// 32 bits.295/// 32 bits.
278/// \returns A 128-bit vector of [4 x float] containing the result in the low296/// \returns A 128-bit vector of [4 x float] containing the result in the low
279/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits.297/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits.
280static __inline__ __m128 __DEFAULT_FN_ATTRS128298static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
281_mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C)299_mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C) {
282{300 __A[0] = __builtin_elementwise_fma(__A[0], -__B[0], __C[0]);
283 return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, -(__v4sf)__B, (__v4sf)__C);301 return __A;
284}302}
285303
286/// Computes a scalar negated multiply-add of the double-precision values304/// Computes a scalar negated multiply-add of the double-precision values
...@@ -306,10 +324,10 @@ _mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C)...@@ -306,10 +324,10 @@ _mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C)
306/// 64 bits.324/// 64 bits.
307/// \returns A 128-bit vector of [2 x double] containing the result in the low325/// \returns A 128-bit vector of [2 x double] containing the result in the low
308/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits.326/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits.
309static __inline__ __m128d __DEFAULT_FN_ATTRS128327static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
310_mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C)328_mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C) {
311{329 __A[0] = __builtin_elementwise_fma(__A[0], -__B[0], __C[0]);
312 return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, -(__v2df)__B, (__v2df)__C);330 return __A;
313}331}
314332
315/// Computes a negated multiply-subtract of 128-bit vectors of [4 x float].333/// Computes a negated multiply-subtract of 128-bit vectors of [4 x float].
...@@ -326,10 +344,11 @@ _mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C)...@@ -326,10 +344,11 @@ _mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C)
326/// \param __C344/// \param __C
327/// A 128-bit vector of [4 x float] containing the subtrahend.345/// A 128-bit vector of [4 x float] containing the subtrahend.
328/// \returns A 128-bit vector of [4 x float] containing the result.346/// \returns A 128-bit vector of [4 x float] containing the result.
329static __inline__ __m128 __DEFAULT_FN_ATTRS128347static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
330_mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C)348_mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C)
331{349{
332 return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C);350 return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B,
351 -(__v4sf)__C);
333}352}
334353
335/// Computes a negated multiply-subtract of 128-bit vectors of [2 x double].354/// Computes a negated multiply-subtract of 128-bit vectors of [2 x double].
...@@ -346,10 +365,11 @@ _mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C)...@@ -346,10 +365,11 @@ _mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C)
346/// \param __C365/// \param __C
347/// A 128-bit vector of [2 x double] containing the subtrahend.366/// A 128-bit vector of [2 x double] containing the subtrahend.
348/// \returns A 128-bit vector of [2 x double] containing the result.367/// \returns A 128-bit vector of [2 x double] containing the result.
349static __inline__ __m128d __DEFAULT_FN_ATTRS128368static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
350_mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C)369_mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C)
351{370{
352 return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C);371 return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B,
372 -(__v2df)__C);
353}373}
354374
355/// Computes a scalar negated multiply-subtract of the single-precision375/// Computes a scalar negated multiply-subtract of the single-precision
...@@ -375,10 +395,10 @@ _mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C)...@@ -375,10 +395,10 @@ _mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C)
375/// 32 bits.395/// 32 bits.
376/// \returns A 128-bit vector of [4 x float] containing the result in the low396/// \returns A 128-bit vector of [4 x float] containing the result in the low
377/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits.397/// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits.
378static __inline__ __m128 __DEFAULT_FN_ATTRS128398static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR
379_mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C)399_mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C) {
380{400 __A[0] = __builtin_elementwise_fma(__A[0], -__B[0], -__C[0]);
381 return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, -(__v4sf)__B, -(__v4sf)__C);401 return __A;
382}402}
383403
384/// Computes a scalar negated multiply-subtract of the double-precision404/// Computes a scalar negated multiply-subtract of the double-precision
...@@ -404,10 +424,10 @@ _mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C)...@@ -404,10 +424,10 @@ _mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C)
404/// 64 bits.424/// 64 bits.
405/// \returns A 128-bit vector of [2 x double] containing the result in the low425/// \returns A 128-bit vector of [2 x double] containing the result in the low
406/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits.426/// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits.
407static __inline__ __m128d __DEFAULT_FN_ATTRS128427static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR
408_mm_fnmsub_sd(__m128d __A, __m128d __B, __m128d __C)428_mm_fnmsub_sd(__m128d __A, __m128d __B, __m128d __C) {
409{429 __A[0] = __builtin_elementwise_fma(__A[0], -__B[0], -__C[0]);
410 return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, -(__v2df)__B, -(__v2df)__C);430 return __A;
411}431}
412432
413/// Computes a multiply with alternating add/subtract of 128-bit vectors of433/// Computes a multiply with alternating add/subtract of 128-bit vectors of
...@@ -528,10 +548,11 @@ _mm_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C)...@@ -528,10 +548,11 @@ _mm_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C)
528/// \param __C548/// \param __C
529/// A 256-bit vector of [8 x float] containing the addend.549/// A 256-bit vector of [8 x float] containing the addend.
530/// \returns A 256-bit vector of [8 x float] containing the result.550/// \returns A 256-bit vector of [8 x float] containing the result.
531static __inline__ __m256 __DEFAULT_FN_ATTRS256551static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
532_mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C)552_mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C)
533{553{
534 return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);554 return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B,
555 (__v8sf)__C);
535}556}
536557
537/// Computes a multiply-add of 256-bit vectors of [4 x double].558/// Computes a multiply-add of 256-bit vectors of [4 x double].
...@@ -548,10 +569,11 @@ _mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C)...@@ -548,10 +569,11 @@ _mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C)
548/// \param __C569/// \param __C
549/// A 256-bit vector of [4 x double] containing the addend.570/// A 256-bit vector of [4 x double] containing the addend.
550/// \returns A 256-bit vector of [4 x double] containing the result.571/// \returns A 256-bit vector of [4 x double] containing the result.
551static __inline__ __m256d __DEFAULT_FN_ATTRS256572static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
552_mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C)573_mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C)
553{574{
554 return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);575 return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B,
576 (__v4df)__C);
555}577}
556578
557/// Computes a multiply-subtract of 256-bit vectors of [8 x float].579/// Computes a multiply-subtract of 256-bit vectors of [8 x float].
...@@ -568,10 +590,11 @@ _mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C)...@@ -568,10 +590,11 @@ _mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C)
568/// \param __C590/// \param __C
569/// A 256-bit vector of [8 x float] containing the subtrahend.591/// A 256-bit vector of [8 x float] containing the subtrahend.
570/// \returns A 256-bit vector of [8 x float] containing the result.592/// \returns A 256-bit vector of [8 x float] containing the result.
571static __inline__ __m256 __DEFAULT_FN_ATTRS256593static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
572_mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C)594_mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C)
573{595{
574 return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C);596 return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B,
597 -(__v8sf)__C);
575}598}
576599
577/// Computes a multiply-subtract of 256-bit vectors of [4 x double].600/// Computes a multiply-subtract of 256-bit vectors of [4 x double].
...@@ -588,10 +611,11 @@ _mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C)...@@ -588,10 +611,11 @@ _mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C)
588/// \param __C611/// \param __C
589/// A 256-bit vector of [4 x double] containing the subtrahend.612/// A 256-bit vector of [4 x double] containing the subtrahend.
590/// \returns A 256-bit vector of [4 x double] containing the result.613/// \returns A 256-bit vector of [4 x double] containing the result.
591static __inline__ __m256d __DEFAULT_FN_ATTRS256614static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
592_mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C)615_mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C)
593{616{
594 return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C);617 return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B,
618 -(__v4df)__C);
595}619}
596620
597/// Computes a negated multiply-add of 256-bit vectors of [8 x float].621/// Computes a negated multiply-add of 256-bit vectors of [8 x float].
...@@ -608,10 +632,11 @@ _mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C)...@@ -608,10 +632,11 @@ _mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C)
608/// \param __C632/// \param __C
609/// A 256-bit vector of [8 x float] containing the addend.633/// A 256-bit vector of [8 x float] containing the addend.
610/// \returns A 256-bit vector of [8 x float] containing the result.634/// \returns A 256-bit vector of [8 x float] containing the result.
611static __inline__ __m256 __DEFAULT_FN_ATTRS256635static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
612_mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C)636_mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C)
613{637{
614 return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C);638 return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B,
639 (__v8sf)__C);
615}640}
616641
617/// Computes a negated multiply-add of 256-bit vectors of [4 x double].642/// Computes a negated multiply-add of 256-bit vectors of [4 x double].
...@@ -628,10 +653,11 @@ _mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C)...@@ -628,10 +653,11 @@ _mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C)
628/// \param __C653/// \param __C
629/// A 256-bit vector of [4 x double] containing the addend.654/// A 256-bit vector of [4 x double] containing the addend.
630/// \returns A 256-bit vector of [4 x double] containing the result.655/// \returns A 256-bit vector of [4 x double] containing the result.
631static __inline__ __m256d __DEFAULT_FN_ATTRS256656static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
632_mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C)657_mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C)
633{658{
634 return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C);659 return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B,
660 (__v4df)__C);
635}661}
636662
637/// Computes a negated multiply-subtract of 256-bit vectors of [8 x float].663/// Computes a negated multiply-subtract of 256-bit vectors of [8 x float].
...@@ -648,10 +674,11 @@ _mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C)...@@ -648,10 +674,11 @@ _mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C)
648/// \param __C674/// \param __C
649/// A 256-bit vector of [8 x float] containing the subtrahend.675/// A 256-bit vector of [8 x float] containing the subtrahend.
650/// \returns A 256-bit vector of [8 x float] containing the result.676/// \returns A 256-bit vector of [8 x float] containing the result.
651static __inline__ __m256 __DEFAULT_FN_ATTRS256677static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR
652_mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C)678_mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C)
653{679{
654 return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C);680 return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B,
681 -(__v8sf)__C);
655}682}
656683
657/// Computes a negated multiply-subtract of 256-bit vectors of [4 x double].684/// Computes a negated multiply-subtract of 256-bit vectors of [4 x double].
...@@ -668,10 +695,11 @@ _mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C)...@@ -668,10 +695,11 @@ _mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C)
668/// \param __C695/// \param __C
669/// A 256-bit vector of [4 x double] containing the subtrahend.696/// A 256-bit vector of [4 x double] containing the subtrahend.
670/// \returns A 256-bit vector of [4 x double] containing the result.697/// \returns A 256-bit vector of [4 x double] containing the result.
671static __inline__ __m256d __DEFAULT_FN_ATTRS256698static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR
672_mm256_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C)699_mm256_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C)
673{700{
674 return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C);701 return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B,
702 -(__v4df)__C);
675}703}
676704
677/// Computes a multiply with alternating add/subtract of 256-bit vectors of705/// Computes a multiply with alternating add/subtract of 256-bit vectors of
...@@ -792,5 +820,7 @@ _mm256_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C)...@@ -792,5 +820,7 @@ _mm256_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C)
792820
793#undef __DEFAULT_FN_ATTRS128821#undef __DEFAULT_FN_ATTRS128
794#undef __DEFAULT_FN_ATTRS256822#undef __DEFAULT_FN_ATTRS256
823#undef __DEFAULT_FN_ATTRS128_CONSTEXPR
824#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
795825
796#endif /* __FMAINTRIN_H */826#endif /* __FMAINTRIN_H */
lib/include/gfniintrin.h+21-16
...@@ -14,29 +14,36 @@...@@ -14,29 +14,36 @@
14#ifndef __GFNIINTRIN_H14#ifndef __GFNIINTRIN_H
15#define __GFNIINTRIN_H15#define __GFNIINTRIN_H
1616
17#if defined(__EVEX512__) && !defined(__AVX10_1_512__)
18/* Default attributes for simple form (no masking). */17/* Default attributes for simple form (no masking). */
18#if defined(__cplusplus) && (__cplusplus >= 201103L)
19#define __DEFAULT_FN_ATTRS \19#define __DEFAULT_FN_ATTRS \
20 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, __target__("gfni"), \
21 __target__("gfni,no-evex512"), __min_vector_width__(128)))21 __min_vector_width__(128))) constexpr
2222
23/* Default attributes for YMM unmasked form. */23/* Default attributes for YMM unmasked form. */
24#define __DEFAULT_FN_ATTRS_Y \24#define __DEFAULT_FN_ATTRS_Y \
25 __attribute__((__always_inline__, __nodebug__, \25 __attribute__((__always_inline__, __nodebug__, __target__("avx,gfni"), \
26 __target__("avx,gfni,no-evex512"), \26 __min_vector_width__(256))) constexpr
27 __min_vector_width__(256)))
2827
29/* Default attributes for VLX masked forms. */28/* Default attributes for VLX masked forms. */
30#define __DEFAULT_FN_ATTRS_VL128 \29#define __DEFAULT_FN_ATTRS_VL128 \
31 __attribute__((__always_inline__, __nodebug__, \30 __attribute__((__always_inline__, __nodebug__, \
32 __target__("avx512bw,avx512vl,gfni,no-evex512"), \31 __target__("avx512bw,avx512vl,gfni"), \
33 __min_vector_width__(128)))32 __min_vector_width__(128))) constexpr
34#define __DEFAULT_FN_ATTRS_VL256 \33#define __DEFAULT_FN_ATTRS_VL256 \
35 __attribute__((__always_inline__, __nodebug__, \34 __attribute__((__always_inline__, __nodebug__, \
36 __target__("avx512bw,avx512vl,gfni,no-evex512"), \35 __target__("avx512bw,avx512vl,gfni"), \
37 __min_vector_width__(256)))36 __min_vector_width__(256))) constexpr
37
38/* Default attributes for ZMM unmasked forms. */
39#define __DEFAULT_FN_ATTRS_Z \
40 __attribute__((__always_inline__, __nodebug__, __target__("avx512f,gfni"), \
41 __min_vector_width__(512))) constexpr
42/* Default attributes for ZMM masked forms. */
43#define __DEFAULT_FN_ATTRS_Z_MASK \
44 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,gfni"), \
45 __min_vector_width__(512))) constexpr
38#else46#else
39/* Default attributes for simple form (no masking). */
40#define __DEFAULT_FN_ATTRS \47#define __DEFAULT_FN_ATTRS \
41 __attribute__((__always_inline__, __nodebug__, __target__("gfni"), \48 __attribute__((__always_inline__, __nodebug__, __target__("gfni"), \
42 __min_vector_width__(128)))49 __min_vector_width__(128)))
...@@ -55,18 +62,16 @@...@@ -55,18 +62,16 @@
55 __attribute__((__always_inline__, __nodebug__, \62 __attribute__((__always_inline__, __nodebug__, \
56 __target__("avx512bw,avx512vl,gfni"), \63 __target__("avx512bw,avx512vl,gfni"), \
57 __min_vector_width__(256)))64 __min_vector_width__(256)))
58#endif
5965
60/* Default attributes for ZMM unmasked forms. */66/* Default attributes for ZMM unmasked forms. */
61#define __DEFAULT_FN_ATTRS_Z \67#define __DEFAULT_FN_ATTRS_Z \
62 __attribute__((__always_inline__, __nodebug__, \68 __attribute__((__always_inline__, __nodebug__, __target__("avx512f,gfni"), \
63 __target__("avx512f,evex512,gfni"), \
64 __min_vector_width__(512)))69 __min_vector_width__(512)))
65/* Default attributes for ZMM masked forms. */70/* Default attributes for ZMM masked forms. */
66#define __DEFAULT_FN_ATTRS_Z_MASK \71#define __DEFAULT_FN_ATTRS_Z_MASK \
67 __attribute__((__always_inline__, __nodebug__, \72 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,gfni"), \
68 __target__("avx512bw,evex512,gfni"), \
69 __min_vector_width__(512)))73 __min_vector_width__(512)))
74#endif
7075
71#define _mm_gf2p8affineinv_epi64_epi8(A, B, I) \76#define _mm_gf2p8affineinv_epi64_epi8(A, B, I) \
72 ((__m128i)__builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \77 ((__m128i)__builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \
lib/include/hexagon_types.h+23-20
...@@ -11,6 +11,11 @@...@@ -11,6 +11,11 @@
1111
12#include <hexagon_protos.h>12#include <hexagon_protos.h>
1313
14// Save and undefine B0 to avoid conflicts with POSIX termios.h which
15// defines B0 as a macro for baud rate 0.
16#pragma push_macro("B0")
17#undef B0
18
14/* Hexagon names */19/* Hexagon names */
15#define HEXAGON_Vect HEXAGON_Vect6420#define HEXAGON_Vect HEXAGON_Vect64
16#define HEXAGON_V_GET_D HEXAGON_V64_GET_D21#define HEXAGON_V_GET_D HEXAGON_V64_GET_D
...@@ -697,9 +702,8 @@ public:...@@ -697,9 +702,8 @@ public:
697 };702 };
698703
699 // Extract byte methods704 // Extract byte methods
700 signed char B0(void) {705 signed char b0(void) { return HEXAGON_V64_GET_B0(data); };
701 return HEXAGON_V64_GET_B0(data);706 signed char B0(void) { return b0(); };
702 };
703 signed char B1(void) {707 signed char B1(void) {
704 return HEXAGON_V64_GET_B1(data);708 return HEXAGON_V64_GET_B1(data);
705 };709 };
...@@ -776,9 +780,10 @@ public:...@@ -776,9 +780,10 @@ public:
776 };780 };
777781
778 // Set byte methods782 // Set byte methods
779 HEXAGON_Vect64C B0(signed char b) {783 HEXAGON_Vect64C b0(signed char b) {
780 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B0(data, b));784 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B0(data, b));
781 };785 };
786 HEXAGON_Vect64C B0(signed char b) { return b0(b); };
782 HEXAGON_Vect64C B1(signed char b) {787 HEXAGON_Vect64C B1(signed char b) {
783 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B1(data, b));788 return HEXAGON_Vect64C(HEXAGON_V64_PUT_B1(data, b));
784 };789 };
...@@ -1121,9 +1126,8 @@ public:...@@ -1121,9 +1126,8 @@ public:
1121 };1126 };
11221127
1123 // Extract byte methods1128 // Extract byte methods
1124 signed char B0(void) {1129 signed char b0(void) { return HEXAGON_V32_GET_B0(data); };
1125 return HEXAGON_V32_GET_B0(data);1130 signed char B0(void) { return b0(); };
1126 };
1127 signed char B1(void) {1131 signed char B1(void) {
1128 return HEXAGON_V32_GET_B1(data);1132 return HEXAGON_V32_GET_B1(data);
1129 };1133 };
...@@ -1162,9 +1166,10 @@ public:...@@ -1162,9 +1166,10 @@ public:
1162 };1166 };
11631167
1164 // Set byte methods1168 // Set byte methods
1165 HEXAGON_Vect32C B0(signed char b) {1169 HEXAGON_Vect32C b0(signed char b) {
1166 return HEXAGON_Vect32C(HEXAGON_V32_PUT_B0(data, b));1170 return HEXAGON_Vect32C(HEXAGON_V32_PUT_B0(data, b));
1167 };1171 };
1172 HEXAGON_Vect32C B0(signed char b) { return b0(b); };
1168 HEXAGON_Vect32C B1(signed char b) {1173 HEXAGON_Vect32C B1(signed char b) {
1169 return HEXAGON_Vect32C(HEXAGON_V32_PUT_B1(data, b));1174 return HEXAGON_Vect32C(HEXAGON_V32_PUT_B1(data, b));
1170 };1175 };
...@@ -1924,9 +1929,8 @@ public:...@@ -1924,9 +1929,8 @@ public:
1924 };1929 };
19251930
1926 // Extract byte methods1931 // Extract byte methods
1927 signed char B0(void) {1932 signed char b0(void) { return Q6V64_GET_B0(data); };
1928 return Q6V64_GET_B0(data);1933 signed char B0(void) { return b0(); };
1929 };
1930 signed char B1(void) {1934 signed char B1(void) {
1931 return Q6V64_GET_B1(data);1935 return Q6V64_GET_B1(data);
1932 };1936 };
...@@ -2003,9 +2007,8 @@ public:...@@ -2003,9 +2007,8 @@ public:
2003 };2007 };
20042008
2005 // Set byte methods2009 // Set byte methods
2006 Q6Vect64C B0(signed char b) {2010 Q6Vect64C b0(signed char b) { return Q6Vect64C(Q6V64_PUT_B0(data, b)); };
2007 return Q6Vect64C(Q6V64_PUT_B0(data, b));2011 Q6Vect64C B0(signed char b) { return b0(b); };
2008 };
2009 Q6Vect64C B1(signed char b) {2012 Q6Vect64C B1(signed char b) {
2010 return Q6Vect64C(Q6V64_PUT_B1(data, b));2013 return Q6Vect64C(Q6V64_PUT_B1(data, b));
2011 };2014 };
...@@ -2348,9 +2351,8 @@ public:...@@ -2348,9 +2351,8 @@ public:
2348 };2351 };
23492352
2350 // Extract byte methods2353 // Extract byte methods
2351 signed char B0(void) {2354 signed char b0(void) { return Q6V32_GET_B0(data); };
2352 return Q6V32_GET_B0(data);2355 signed char B0(void) { return b0(); };
2353 };
2354 signed char B1(void) {2356 signed char B1(void) {
2355 return Q6V32_GET_B1(data);2357 return Q6V32_GET_B1(data);
2356 };2358 };
...@@ -2389,9 +2391,8 @@ public:...@@ -2389,9 +2391,8 @@ public:
2389 };2391 };
23902392
2391 // Set byte methods2393 // Set byte methods
2392 Q6Vect32C B0(signed char b) {2394 Q6Vect32C b0(signed char b) { return Q6Vect32C(Q6V32_PUT_B0(data, b)); };
2393 return Q6Vect32C(Q6V32_PUT_B0(data, b));2395 Q6Vect32C B0(signed char b) { return b0(b); };
2394 };
2395 Q6Vect32C B1(signed char b) {2396 Q6Vect32C B1(signed char b) {
2396 return Q6Vect32C(Q6V32_PUT_B1(data, b));2397 return Q6Vect32C(Q6V32_PUT_B1(data, b));
2397 };2398 };
...@@ -2622,4 +2623,6 @@ typedef struct hexagon_udma_descriptor_type1_s...@@ -2622,4 +2623,6 @@ typedef struct hexagon_udma_descriptor_type1_s
2622 unsigned int dstwidthoffset:16;2623 unsigned int dstwidthoffset:16;
2623} hexagon_udma_descriptor_type1_t;2624} hexagon_udma_descriptor_type1_t;
26242625
2626#pragma pop_macro("B0")
2627
2625#endif /* !HEXAGON_TYPES_H */2628#endif /* !HEXAGON_TYPES_H */
lib/include/hvx_hexagon_protos.h+649-860
...@@ -19,7 +19,6 @@...@@ -19,7 +19,6 @@
19#define __BUILTIN_VECTOR_WRAP(a) a19#define __BUILTIN_VECTOR_WRAP(a) a
20#endif20#endif
2121
22#if __HVX_ARCH__ >= 60
23/* ==========================================================================22/* ==========================================================================
24 Assembly Syntax: Rd32=vextract(Vu32,Rs32)23 Assembly Syntax: Rd32=vextract(Vu32,Rs32)
25 C Intrinsic Prototype: Word32 Q6_R_vextract_VR(HVX_Vector Vu, Word32 Rs)24 C Intrinsic Prototype: Word32 Q6_R_vextract_VR(HVX_Vector Vu, Word32 Rs)
...@@ -28,9 +27,7 @@...@@ -28,9 +27,7 @@
28 ========================================================================== */27 ========================================================================== */
2928
30#define Q6_R_vextract_VR(Vu,Rs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_extractw)(Vu,Rs)29#define Q6_R_vextract_VR(Vu,Rs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_extractw)(Vu,Rs)
31#endif /* __HEXAGON_ARCH___ >= 60 */
3230
33#if __HVX_ARCH__ >= 60
34/* ==========================================================================31/* ==========================================================================
35 Assembly Syntax: Vd32=hi(Vss32)32 Assembly Syntax: Vd32=hi(Vss32)
36 C Intrinsic Prototype: HVX_Vector Q6_V_hi_W(HVX_VectorPair Vss)33 C Intrinsic Prototype: HVX_Vector Q6_V_hi_W(HVX_VectorPair Vss)
...@@ -39,9 +36,7 @@...@@ -39,9 +36,7 @@
39 ========================================================================== */36 ========================================================================== */
4037
41#define Q6_V_hi_W(Vss) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_hi)(Vss)38#define Q6_V_hi_W(Vss) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_hi)(Vss)
42#endif /* __HEXAGON_ARCH___ >= 60 */
4339
44#if __HVX_ARCH__ >= 60
45/* ==========================================================================40/* ==========================================================================
46 Assembly Syntax: Vd32=lo(Vss32)41 Assembly Syntax: Vd32=lo(Vss32)
47 C Intrinsic Prototype: HVX_Vector Q6_V_lo_W(HVX_VectorPair Vss)42 C Intrinsic Prototype: HVX_Vector Q6_V_lo_W(HVX_VectorPair Vss)
...@@ -50,9 +45,7 @@...@@ -50,9 +45,7 @@
50 ========================================================================== */45 ========================================================================== */
5146
52#define Q6_V_lo_W(Vss) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lo)(Vss)47#define Q6_V_lo_W(Vss) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lo)(Vss)
53#endif /* __HEXAGON_ARCH___ >= 60 */
5448
55#if __HVX_ARCH__ >= 60
56/* ==========================================================================49/* ==========================================================================
57 Assembly Syntax: Vd32=vsplat(Rt32)50 Assembly Syntax: Vd32=vsplat(Rt32)
58 C Intrinsic Prototype: HVX_Vector Q6_V_vsplat_R(Word32 Rt)51 C Intrinsic Prototype: HVX_Vector Q6_V_vsplat_R(Word32 Rt)
...@@ -61,9 +54,7 @@...@@ -61,9 +54,7 @@
61 ========================================================================== */54 ========================================================================== */
6255
63#define Q6_V_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatw)(Rt)56#define Q6_V_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatw)(Rt)
64#endif /* __HEXAGON_ARCH___ >= 60 */
6557
66#if __HVX_ARCH__ >= 60
67/* ==========================================================================58/* ==========================================================================
68 Assembly Syntax: Qd4=and(Qs4,Qt4)59 Assembly Syntax: Qd4=and(Qs4,Qt4)
69 C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt)60 C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt)
...@@ -72,9 +63,7 @@...@@ -72,9 +63,7 @@
72 ========================================================================== */63 ========================================================================== */
7364
74#define Q6_Q_and_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)65#define Q6_Q_and_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)
75#endif /* __HEXAGON_ARCH___ >= 60 */
7666
77#if __HVX_ARCH__ >= 60
78/* ==========================================================================67/* ==========================================================================
79 Assembly Syntax: Qd4=and(Qs4,!Qt4)68 Assembly Syntax: Qd4=and(Qs4,!Qt4)
80 C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt)69 C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt)
...@@ -83,9 +72,7 @@...@@ -83,9 +72,7 @@
83 ========================================================================== */72 ========================================================================== */
8473
85#define Q6_Q_and_QQn(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and_n)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)74#define Q6_Q_and_QQn(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and_n)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)
86#endif /* __HEXAGON_ARCH___ >= 60 */
8775
88#if __HVX_ARCH__ >= 60
89/* ==========================================================================76/* ==========================================================================
90 Assembly Syntax: Qd4=not(Qs4)77 Assembly Syntax: Qd4=not(Qs4)
91 C Intrinsic Prototype: HVX_VectorPred Q6_Q_not_Q(HVX_VectorPred Qs)78 C Intrinsic Prototype: HVX_VectorPred Q6_Q_not_Q(HVX_VectorPred Qs)
...@@ -94,9 +81,7 @@...@@ -94,9 +81,7 @@
94 ========================================================================== */81 ========================================================================== */
9582
96#define Q6_Q_not_Q(Qs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_not)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1))),-1)83#define Q6_Q_not_Q(Qs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_not)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1))),-1)
97#endif /* __HEXAGON_ARCH___ >= 60 */
9884
99#if __HVX_ARCH__ >= 60
100/* ==========================================================================85/* ==========================================================================
101 Assembly Syntax: Qd4=or(Qs4,Qt4)86 Assembly Syntax: Qd4=or(Qs4,Qt4)
102 C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt)87 C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt)
...@@ -105,9 +90,7 @@...@@ -105,9 +90,7 @@
105 ========================================================================== */90 ========================================================================== */
10691
107#define Q6_Q_or_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)92#define Q6_Q_or_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)
108#endif /* __HEXAGON_ARCH___ >= 60 */
10993
110#if __HVX_ARCH__ >= 60
111/* ==========================================================================94/* ==========================================================================
112 Assembly Syntax: Qd4=or(Qs4,!Qt4)95 Assembly Syntax: Qd4=or(Qs4,!Qt4)
113 C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt)96 C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt)
...@@ -116,9 +99,7 @@...@@ -116,9 +99,7 @@
116 ========================================================================== */99 ========================================================================== */
117100
118#define Q6_Q_or_QQn(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or_n)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)101#define Q6_Q_or_QQn(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or_n)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)
119#endif /* __HEXAGON_ARCH___ >= 60 */
120102
121#if __HVX_ARCH__ >= 60
122/* ==========================================================================103/* ==========================================================================
123 Assembly Syntax: Qd4=vsetq(Rt32)104 Assembly Syntax: Qd4=vsetq(Rt32)
124 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vsetq_R(Word32 Rt)105 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vsetq_R(Word32 Rt)
...@@ -127,9 +108,7 @@...@@ -127,9 +108,7 @@
127 ========================================================================== */108 ========================================================================== */
128109
129#define Q6_Q_vsetq_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2)(Rt)),-1)110#define Q6_Q_vsetq_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2)(Rt)),-1)
130#endif /* __HEXAGON_ARCH___ >= 60 */
131111
132#if __HVX_ARCH__ >= 60
133/* ==========================================================================112/* ==========================================================================
134 Assembly Syntax: Qd4=xor(Qs4,Qt4)113 Assembly Syntax: Qd4=xor(Qs4,Qt4)
135 C Intrinsic Prototype: HVX_VectorPred Q6_Q_xor_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt)114 C Intrinsic Prototype: HVX_VectorPred Q6_Q_xor_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt)
...@@ -138,9 +117,7 @@...@@ -138,9 +117,7 @@
138 ========================================================================== */117 ========================================================================== */
139118
140#define Q6_Q_xor_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)119#define Q6_Q_xor_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)
141#endif /* __HEXAGON_ARCH___ >= 60 */
142120
143#if __HVX_ARCH__ >= 60
144/* ==========================================================================121/* ==========================================================================
145 Assembly Syntax: if (!Qv4) vmem(Rt32+#s4)=Vs32122 Assembly Syntax: if (!Qv4) vmem(Rt32+#s4)=Vs32
146 C Intrinsic Prototype: void Q6_vmem_QnRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs)123 C Intrinsic Prototype: void Q6_vmem_QnRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs)
...@@ -149,9 +126,7 @@...@@ -149,9 +126,7 @@
149 ========================================================================== */126 ========================================================================== */
150127
151#define Q6_vmem_QnRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs)128#define Q6_vmem_QnRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs)
152#endif /* __HEXAGON_ARCH___ >= 60 */
153129
154#if __HVX_ARCH__ >= 60
155/* ==========================================================================130/* ==========================================================================
156 Assembly Syntax: if (!Qv4) vmem(Rt32+#s4):nt=Vs32131 Assembly Syntax: if (!Qv4) vmem(Rt32+#s4):nt=Vs32
157 C Intrinsic Prototype: void Q6_vmem_QnRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs)132 C Intrinsic Prototype: void Q6_vmem_QnRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs)
...@@ -160,9 +135,7 @@...@@ -160,9 +135,7 @@
160 ========================================================================== */135 ========================================================================== */
161136
162#define Q6_vmem_QnRIV_nt(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs)137#define Q6_vmem_QnRIV_nt(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs)
163#endif /* __HEXAGON_ARCH___ >= 60 */
164138
165#if __HVX_ARCH__ >= 60
166/* ==========================================================================139/* ==========================================================================
167 Assembly Syntax: if (Qv4) vmem(Rt32+#s4):nt=Vs32140 Assembly Syntax: if (Qv4) vmem(Rt32+#s4):nt=Vs32
168 C Intrinsic Prototype: void Q6_vmem_QRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs)141 C Intrinsic Prototype: void Q6_vmem_QRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs)
...@@ -171,9 +144,7 @@...@@ -171,9 +144,7 @@
171 ========================================================================== */144 ========================================================================== */
172145
173#define Q6_vmem_QRIV_nt(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_qpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs)146#define Q6_vmem_QRIV_nt(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_qpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs)
174#endif /* __HEXAGON_ARCH___ >= 60 */
175147
176#if __HVX_ARCH__ >= 60
177/* ==========================================================================148/* ==========================================================================
178 Assembly Syntax: if (Qv4) vmem(Rt32+#s4)=Vs32149 Assembly Syntax: if (Qv4) vmem(Rt32+#s4)=Vs32
179 C Intrinsic Prototype: void Q6_vmem_QRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs)150 C Intrinsic Prototype: void Q6_vmem_QRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs)
...@@ -182,9 +153,7 @@...@@ -182,9 +153,7 @@
182 ========================================================================== */153 ========================================================================== */
183154
184#define Q6_vmem_QRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_qpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs)155#define Q6_vmem_QRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_qpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs)
185#endif /* __HEXAGON_ARCH___ >= 60 */
186156
187#if __HVX_ARCH__ >= 60
188/* ==========================================================================157/* ==========================================================================
189 Assembly Syntax: Vd32.uh=vabsdiff(Vu32.h,Vv32.h)158 Assembly Syntax: Vd32.uh=vabsdiff(Vu32.h,Vv32.h)
190 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VhVh(HVX_Vector Vu, HVX_Vector Vv)159 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -193,9 +162,7 @@...@@ -193,9 +162,7 @@
193 ========================================================================== */162 ========================================================================== */
194163
195#define Q6_Vuh_vabsdiff_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffh)(Vu,Vv)164#define Q6_Vuh_vabsdiff_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffh)(Vu,Vv)
196#endif /* __HEXAGON_ARCH___ >= 60 */
197165
198#if __HVX_ARCH__ >= 60
199/* ==========================================================================166/* ==========================================================================
200 Assembly Syntax: Vd32.ub=vabsdiff(Vu32.ub,Vv32.ub)167 Assembly Syntax: Vd32.ub=vabsdiff(Vu32.ub,Vv32.ub)
201 C Intrinsic Prototype: HVX_Vector Q6_Vub_vabsdiff_VubVub(HVX_Vector Vu, HVX_Vector Vv)168 C Intrinsic Prototype: HVX_Vector Q6_Vub_vabsdiff_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -204,9 +171,7 @@...@@ -204,9 +171,7 @@
204 ========================================================================== */171 ========================================================================== */
205172
206#define Q6_Vub_vabsdiff_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffub)(Vu,Vv)173#define Q6_Vub_vabsdiff_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffub)(Vu,Vv)
207#endif /* __HEXAGON_ARCH___ >= 60 */
208174
209#if __HVX_ARCH__ >= 60
210/* ==========================================================================175/* ==========================================================================
211 Assembly Syntax: Vd32.uh=vabsdiff(Vu32.uh,Vv32.uh)176 Assembly Syntax: Vd32.uh=vabsdiff(Vu32.uh,Vv32.uh)
212 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)177 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -215,9 +180,7 @@...@@ -215,9 +180,7 @@
215 ========================================================================== */180 ========================================================================== */
216181
217#define Q6_Vuh_vabsdiff_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffuh)(Vu,Vv)182#define Q6_Vuh_vabsdiff_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffuh)(Vu,Vv)
218#endif /* __HEXAGON_ARCH___ >= 60 */
219183
220#if __HVX_ARCH__ >= 60
221/* ==========================================================================184/* ==========================================================================
222 Assembly Syntax: Vd32.uw=vabsdiff(Vu32.w,Vv32.w)185 Assembly Syntax: Vd32.uw=vabsdiff(Vu32.w,Vv32.w)
223 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vabsdiff_VwVw(HVX_Vector Vu, HVX_Vector Vv)186 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vabsdiff_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -226,9 +189,7 @@...@@ -226,9 +189,7 @@
226 ========================================================================== */189 ========================================================================== */
227190
228#define Q6_Vuw_vabsdiff_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffw)(Vu,Vv)191#define Q6_Vuw_vabsdiff_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffw)(Vu,Vv)
229#endif /* __HEXAGON_ARCH___ >= 60 */
230192
231#if __HVX_ARCH__ >= 60
232/* ==========================================================================193/* ==========================================================================
233 Assembly Syntax: Vd32.h=vabs(Vu32.h)194 Assembly Syntax: Vd32.h=vabs(Vu32.h)
234 C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh(HVX_Vector Vu)195 C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh(HVX_Vector Vu)
...@@ -237,9 +198,7 @@...@@ -237,9 +198,7 @@
237 ========================================================================== */198 ========================================================================== */
238199
239#define Q6_Vh_vabs_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh)(Vu)200#define Q6_Vh_vabs_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh)(Vu)
240#endif /* __HEXAGON_ARCH___ >= 60 */
241201
242#if __HVX_ARCH__ >= 60
243/* ==========================================================================202/* ==========================================================================
244 Assembly Syntax: Vd32.h=vabs(Vu32.h):sat203 Assembly Syntax: Vd32.h=vabs(Vu32.h):sat
245 C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh_sat(HVX_Vector Vu)204 C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh_sat(HVX_Vector Vu)
...@@ -248,9 +207,7 @@...@@ -248,9 +207,7 @@
248 ========================================================================== */207 ========================================================================== */
249208
250#define Q6_Vh_vabs_Vh_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh_sat)(Vu)209#define Q6_Vh_vabs_Vh_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh_sat)(Vu)
251#endif /* __HEXAGON_ARCH___ >= 60 */
252210
253#if __HVX_ARCH__ >= 60
254/* ==========================================================================211/* ==========================================================================
255 Assembly Syntax: Vd32.w=vabs(Vu32.w)212 Assembly Syntax: Vd32.w=vabs(Vu32.w)
256 C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw(HVX_Vector Vu)213 C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw(HVX_Vector Vu)
...@@ -259,9 +216,7 @@...@@ -259,9 +216,7 @@
259 ========================================================================== */216 ========================================================================== */
260217
261#define Q6_Vw_vabs_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw)(Vu)218#define Q6_Vw_vabs_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw)(Vu)
262#endif /* __HEXAGON_ARCH___ >= 60 */
263219
264#if __HVX_ARCH__ >= 60
265/* ==========================================================================220/* ==========================================================================
266 Assembly Syntax: Vd32.w=vabs(Vu32.w):sat221 Assembly Syntax: Vd32.w=vabs(Vu32.w):sat
267 C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw_sat(HVX_Vector Vu)222 C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw_sat(HVX_Vector Vu)
...@@ -270,9 +225,7 @@...@@ -270,9 +225,7 @@
270 ========================================================================== */225 ========================================================================== */
271226
272#define Q6_Vw_vabs_Vw_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw_sat)(Vu)227#define Q6_Vw_vabs_Vw_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw_sat)(Vu)
273#endif /* __HEXAGON_ARCH___ >= 60 */
274228
275#if __HVX_ARCH__ >= 60
276/* ==========================================================================229/* ==========================================================================
277 Assembly Syntax: Vd32.b=vadd(Vu32.b,Vv32.b)230 Assembly Syntax: Vd32.b=vadd(Vu32.b,Vv32.b)
278 C Intrinsic Prototype: HVX_Vector Q6_Vb_vadd_VbVb(HVX_Vector Vu, HVX_Vector Vv)231 C Intrinsic Prototype: HVX_Vector Q6_Vb_vadd_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -281,9 +234,7 @@...@@ -281,9 +234,7 @@
281 ========================================================================== */234 ========================================================================== */
282235
283#define Q6_Vb_vadd_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb)(Vu,Vv)236#define Q6_Vb_vadd_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb)(Vu,Vv)
284#endif /* __HEXAGON_ARCH___ >= 60 */
285237
286#if __HVX_ARCH__ >= 60
287/* ==========================================================================238/* ==========================================================================
288 Assembly Syntax: Vdd32.b=vadd(Vuu32.b,Vvv32.b)239 Assembly Syntax: Vdd32.b=vadd(Vuu32.b,Vvv32.b)
289 C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vadd_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv)240 C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vadd_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -292,9 +243,7 @@...@@ -292,9 +243,7 @@
292 ========================================================================== */243 ========================================================================== */
293244
294#define Q6_Wb_vadd_WbWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb_dv)(Vuu,Vvv)245#define Q6_Wb_vadd_WbWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb_dv)(Vuu,Vvv)
295#endif /* __HEXAGON_ARCH___ >= 60 */
296246
297#if __HVX_ARCH__ >= 60
298/* ==========================================================================247/* ==========================================================================
299 Assembly Syntax: if (!Qv4) Vx32.b+=Vu32.b248 Assembly Syntax: if (!Qv4) Vx32.b+=Vu32.b
300 C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)249 C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -303,9 +252,7 @@...@@ -303,9 +252,7 @@
303 ========================================================================== */252 ========================================================================== */
304253
305#define Q6_Vb_condacc_QnVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)254#define Q6_Vb_condacc_QnVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
306#endif /* __HEXAGON_ARCH___ >= 60 */
307255
308#if __HVX_ARCH__ >= 60
309/* ==========================================================================256/* ==========================================================================
310 Assembly Syntax: if (Qv4) Vx32.b+=Vu32.b257 Assembly Syntax: if (Qv4) Vx32.b+=Vu32.b
311 C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)258 C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -314,9 +261,7 @@...@@ -314,9 +261,7 @@
314 ========================================================================== */261 ========================================================================== */
315262
316#define Q6_Vb_condacc_QVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)263#define Q6_Vb_condacc_QVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
317#endif /* __HEXAGON_ARCH___ >= 60 */
318264
319#if __HVX_ARCH__ >= 60
320/* ==========================================================================265/* ==========================================================================
321 Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h)266 Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h)
322 C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv)267 C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -325,9 +270,7 @@...@@ -325,9 +270,7 @@
325 ========================================================================== */270 ========================================================================== */
326271
327#define Q6_Vh_vadd_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh)(Vu,Vv)272#define Q6_Vh_vadd_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh)(Vu,Vv)
328#endif /* __HEXAGON_ARCH___ >= 60 */
329273
330#if __HVX_ARCH__ >= 60
331/* ==========================================================================274/* ==========================================================================
332 Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h)275 Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h)
333 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv)276 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -336,9 +279,7 @@...@@ -336,9 +279,7 @@
336 ========================================================================== */279 ========================================================================== */
337280
338#define Q6_Wh_vadd_WhWh(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh_dv)(Vuu,Vvv)281#define Q6_Wh_vadd_WhWh(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh_dv)(Vuu,Vvv)
339#endif /* __HEXAGON_ARCH___ >= 60 */
340282
341#if __HVX_ARCH__ >= 60
342/* ==========================================================================283/* ==========================================================================
343 Assembly Syntax: if (!Qv4) Vx32.h+=Vu32.h284 Assembly Syntax: if (!Qv4) Vx32.h+=Vu32.h
344 C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)285 C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -347,9 +288,7 @@...@@ -347,9 +288,7 @@
347 ========================================================================== */288 ========================================================================== */
348289
349#define Q6_Vh_condacc_QnVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)290#define Q6_Vh_condacc_QnVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
350#endif /* __HEXAGON_ARCH___ >= 60 */
351291
352#if __HVX_ARCH__ >= 60
353/* ==========================================================================292/* ==========================================================================
354 Assembly Syntax: if (Qv4) Vx32.h+=Vu32.h293 Assembly Syntax: if (Qv4) Vx32.h+=Vu32.h
355 C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)294 C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -358,9 +297,7 @@...@@ -358,9 +297,7 @@
358 ========================================================================== */297 ========================================================================== */
359298
360#define Q6_Vh_condacc_QVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)299#define Q6_Vh_condacc_QVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
361#endif /* __HEXAGON_ARCH___ >= 60 */
362300
363#if __HVX_ARCH__ >= 60
364/* ==========================================================================301/* ==========================================================================
365 Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h):sat302 Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h):sat
366 C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)303 C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -369,9 +306,7 @@...@@ -369,9 +306,7 @@
369 ========================================================================== */306 ========================================================================== */
370307
371#define Q6_Vh_vadd_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat)(Vu,Vv)308#define Q6_Vh_vadd_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat)(Vu,Vv)
372#endif /* __HEXAGON_ARCH___ >= 60 */
373309
374#if __HVX_ARCH__ >= 60
375/* ==========================================================================310/* ==========================================================================
376 Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h):sat311 Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h):sat
377 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)312 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -380,9 +315,7 @@...@@ -380,9 +315,7 @@
380 ========================================================================== */315 ========================================================================== */
381316
382#define Q6_Wh_vadd_WhWh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat_dv)(Vuu,Vvv)317#define Q6_Wh_vadd_WhWh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat_dv)(Vuu,Vvv)
383#endif /* __HEXAGON_ARCH___ >= 60 */
384318
385#if __HVX_ARCH__ >= 60
386/* ==========================================================================319/* ==========================================================================
387 Assembly Syntax: Vdd32.w=vadd(Vu32.h,Vv32.h)320 Assembly Syntax: Vdd32.w=vadd(Vu32.h,Vv32.h)
388 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv)321 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -391,9 +324,7 @@...@@ -391,9 +324,7 @@
391 ========================================================================== */324 ========================================================================== */
392325
393#define Q6_Ww_vadd_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw)(Vu,Vv)326#define Q6_Ww_vadd_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw)(Vu,Vv)
394#endif /* __HEXAGON_ARCH___ >= 60 */
395327
396#if __HVX_ARCH__ >= 60
397/* ==========================================================================328/* ==========================================================================
398 Assembly Syntax: Vdd32.h=vadd(Vu32.ub,Vv32.ub)329 Assembly Syntax: Vdd32.h=vadd(Vu32.ub,Vv32.ub)
399 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_VubVub(HVX_Vector Vu, HVX_Vector Vv)330 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -402,9 +333,7 @@...@@ -402,9 +333,7 @@
402 ========================================================================== */333 ========================================================================== */
403334
404#define Q6_Wh_vadd_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh)(Vu,Vv)335#define Q6_Wh_vadd_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh)(Vu,Vv)
405#endif /* __HEXAGON_ARCH___ >= 60 */
406336
407#if __HVX_ARCH__ >= 60
408/* ==========================================================================337/* ==========================================================================
409 Assembly Syntax: Vd32.ub=vadd(Vu32.ub,Vv32.ub):sat338 Assembly Syntax: Vd32.ub=vadd(Vu32.ub,Vv32.ub):sat
410 C Intrinsic Prototype: HVX_Vector Q6_Vub_vadd_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv)339 C Intrinsic Prototype: HVX_Vector Q6_Vub_vadd_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -413,9 +342,7 @@...@@ -413,9 +342,7 @@
413 ========================================================================== */342 ========================================================================== */
414343
415#define Q6_Vub_vadd_VubVub_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat)(Vu,Vv)344#define Q6_Vub_vadd_VubVub_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat)(Vu,Vv)
416#endif /* __HEXAGON_ARCH___ >= 60 */
417345
418#if __HVX_ARCH__ >= 60
419/* ==========================================================================346/* ==========================================================================
420 Assembly Syntax: Vdd32.ub=vadd(Vuu32.ub,Vvv32.ub):sat347 Assembly Syntax: Vdd32.ub=vadd(Vuu32.ub,Vvv32.ub):sat
421 C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vadd_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)348 C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vadd_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -424,9 +351,7 @@...@@ -424,9 +351,7 @@
424 ========================================================================== */351 ========================================================================== */
425352
426#define Q6_Wub_vadd_WubWub_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat_dv)(Vuu,Vvv)353#define Q6_Wub_vadd_WubWub_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat_dv)(Vuu,Vvv)
427#endif /* __HEXAGON_ARCH___ >= 60 */
428354
429#if __HVX_ARCH__ >= 60
430/* ==========================================================================355/* ==========================================================================
431 Assembly Syntax: Vd32.uh=vadd(Vu32.uh,Vv32.uh):sat356 Assembly Syntax: Vd32.uh=vadd(Vu32.uh,Vv32.uh):sat
432 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vadd_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv)357 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vadd_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -435,9 +360,7 @@...@@ -435,9 +360,7 @@
435 ========================================================================== */360 ========================================================================== */
436361
437#define Q6_Vuh_vadd_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat)(Vu,Vv)362#define Q6_Vuh_vadd_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat)(Vu,Vv)
438#endif /* __HEXAGON_ARCH___ >= 60 */
439363
440#if __HVX_ARCH__ >= 60
441/* ==========================================================================364/* ==========================================================================
442 Assembly Syntax: Vdd32.uh=vadd(Vuu32.uh,Vvv32.uh):sat365 Assembly Syntax: Vdd32.uh=vadd(Vuu32.uh,Vvv32.uh):sat
443 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vadd_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)366 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vadd_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -446,9 +369,7 @@...@@ -446,9 +369,7 @@
446 ========================================================================== */369 ========================================================================== */
447370
448#define Q6_Wuh_vadd_WuhWuh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat_dv)(Vuu,Vvv)371#define Q6_Wuh_vadd_WuhWuh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat_dv)(Vuu,Vvv)
449#endif /* __HEXAGON_ARCH___ >= 60 */
450372
451#if __HVX_ARCH__ >= 60
452/* ==========================================================================373/* ==========================================================================
453 Assembly Syntax: Vdd32.w=vadd(Vu32.uh,Vv32.uh)374 Assembly Syntax: Vdd32.w=vadd(Vu32.uh,Vv32.uh)
454 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)375 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -457,9 +378,7 @@...@@ -457,9 +378,7 @@
457 ========================================================================== */378 ========================================================================== */
458379
459#define Q6_Ww_vadd_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw)(Vu,Vv)380#define Q6_Ww_vadd_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw)(Vu,Vv)
460#endif /* __HEXAGON_ARCH___ >= 60 */
461381
462#if __HVX_ARCH__ >= 60
463/* ==========================================================================382/* ==========================================================================
464 Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w)383 Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w)
465 C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw(HVX_Vector Vu, HVX_Vector Vv)384 C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -468,9 +387,7 @@...@@ -468,9 +387,7 @@
468 ========================================================================== */387 ========================================================================== */
469388
470#define Q6_Vw_vadd_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw)(Vu,Vv)389#define Q6_Vw_vadd_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw)(Vu,Vv)
471#endif /* __HEXAGON_ARCH___ >= 60 */
472390
473#if __HVX_ARCH__ >= 60
474/* ==========================================================================391/* ==========================================================================
475 Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w)392 Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w)
476 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv)393 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -479,9 +396,7 @@...@@ -479,9 +396,7 @@
479 ========================================================================== */396 ========================================================================== */
480397
481#define Q6_Ww_vadd_WwWw(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw_dv)(Vuu,Vvv)398#define Q6_Ww_vadd_WwWw(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw_dv)(Vuu,Vvv)
482#endif /* __HEXAGON_ARCH___ >= 60 */
483399
484#if __HVX_ARCH__ >= 60
485/* ==========================================================================400/* ==========================================================================
486 Assembly Syntax: if (!Qv4) Vx32.w+=Vu32.w401 Assembly Syntax: if (!Qv4) Vx32.w+=Vu32.w
487 C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)402 C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -490,9 +405,7 @@...@@ -490,9 +405,7 @@
490 ========================================================================== */405 ========================================================================== */
491406
492#define Q6_Vw_condacc_QnVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)407#define Q6_Vw_condacc_QnVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
493#endif /* __HEXAGON_ARCH___ >= 60 */
494408
495#if __HVX_ARCH__ >= 60
496/* ==========================================================================409/* ==========================================================================
497 Assembly Syntax: if (Qv4) Vx32.w+=Vu32.w410 Assembly Syntax: if (Qv4) Vx32.w+=Vu32.w
498 C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)411 C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -501,9 +414,7 @@...@@ -501,9 +414,7 @@
501 ========================================================================== */414 ========================================================================== */
502415
503#define Q6_Vw_condacc_QVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)416#define Q6_Vw_condacc_QVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
504#endif /* __HEXAGON_ARCH___ >= 60 */
505417
506#if __HVX_ARCH__ >= 60
507/* ==========================================================================418/* ==========================================================================
508 Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w):sat419 Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w):sat
509 C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)420 C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -512,9 +423,7 @@...@@ -512,9 +423,7 @@
512 ========================================================================== */423 ========================================================================== */
513424
514#define Q6_Vw_vadd_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat)(Vu,Vv)425#define Q6_Vw_vadd_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat)(Vu,Vv)
515#endif /* __HEXAGON_ARCH___ >= 60 */
516426
517#if __HVX_ARCH__ >= 60
518/* ==========================================================================427/* ==========================================================================
519 Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w):sat428 Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w):sat
520 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)429 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -523,9 +432,7 @@...@@ -523,9 +432,7 @@
523 ========================================================================== */432 ========================================================================== */
524433
525#define Q6_Ww_vadd_WwWw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat_dv)(Vuu,Vvv)434#define Q6_Ww_vadd_WwWw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat_dv)(Vuu,Vvv)
526#endif /* __HEXAGON_ARCH___ >= 60 */
527435
528#if __HVX_ARCH__ >= 60
529/* ==========================================================================436/* ==========================================================================
530 Assembly Syntax: Vd32=valign(Vu32,Vv32,Rt8)437 Assembly Syntax: Vd32=valign(Vu32,Vv32,Rt8)
531 C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)438 C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -534,9 +441,7 @@...@@ -534,9 +441,7 @@
534 ========================================================================== */441 ========================================================================== */
535442
536#define Q6_V_valign_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignb)(Vu,Vv,Rt)443#define Q6_V_valign_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignb)(Vu,Vv,Rt)
537#endif /* __HEXAGON_ARCH___ >= 60 */
538444
539#if __HVX_ARCH__ >= 60
540/* ==========================================================================445/* ==========================================================================
541 Assembly Syntax: Vd32=valign(Vu32,Vv32,#u3)446 Assembly Syntax: Vd32=valign(Vu32,Vv32,#u3)
542 C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3)447 C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3)
...@@ -545,9 +450,7 @@...@@ -545,9 +450,7 @@
545 ========================================================================== */450 ========================================================================== */
546451
547#define Q6_V_valign_VVI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignbi)(Vu,Vv,Iu3)452#define Q6_V_valign_VVI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignbi)(Vu,Vv,Iu3)
548#endif /* __HEXAGON_ARCH___ >= 60 */
549453
550#if __HVX_ARCH__ >= 60
551/* ==========================================================================454/* ==========================================================================
552 Assembly Syntax: Vd32=vand(Vu32,Vv32)455 Assembly Syntax: Vd32=vand(Vu32,Vv32)
553 C Intrinsic Prototype: HVX_Vector Q6_V_vand_VV(HVX_Vector Vu, HVX_Vector Vv)456 C Intrinsic Prototype: HVX_Vector Q6_V_vand_VV(HVX_Vector Vu, HVX_Vector Vv)
...@@ -556,9 +459,7 @@...@@ -556,9 +459,7 @@
556 ========================================================================== */459 ========================================================================== */
557460
558#define Q6_V_vand_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vand)(Vu,Vv)461#define Q6_V_vand_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vand)(Vu,Vv)
559#endif /* __HEXAGON_ARCH___ >= 60 */
560462
561#if __HVX_ARCH__ >= 60
562/* ==========================================================================463/* ==========================================================================
563 Assembly Syntax: Vd32=vand(Qu4,Rt32)464 Assembly Syntax: Vd32=vand(Qu4,Rt32)
564 C Intrinsic Prototype: HVX_Vector Q6_V_vand_QR(HVX_VectorPred Qu, Word32 Rt)465 C Intrinsic Prototype: HVX_Vector Q6_V_vand_QR(HVX_VectorPred Qu, Word32 Rt)
...@@ -567,9 +468,7 @@...@@ -567,9 +468,7 @@
567 ========================================================================== */468 ========================================================================== */
568469
569#define Q6_V_vand_QR(Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt)470#define Q6_V_vand_QR(Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt)
570#endif /* __HEXAGON_ARCH___ >= 60 */
571471
572#if __HVX_ARCH__ >= 60
573/* ==========================================================================472/* ==========================================================================
574 Assembly Syntax: Vx32|=vand(Qu4,Rt32)473 Assembly Syntax: Vx32|=vand(Qu4,Rt32)
575 C Intrinsic Prototype: HVX_Vector Q6_V_vandor_VQR(HVX_Vector Vx, HVX_VectorPred Qu, Word32 Rt)474 C Intrinsic Prototype: HVX_Vector Q6_V_vandor_VQR(HVX_Vector Vx, HVX_VectorPred Qu, Word32 Rt)
...@@ -578,9 +477,7 @@...@@ -578,9 +477,7 @@
578 ========================================================================== */477 ========================================================================== */
579478
580#define Q6_V_vandor_VQR(Vx,Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt_acc)(Vx,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt)479#define Q6_V_vandor_VQR(Vx,Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt_acc)(Vx,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt)
581#endif /* __HEXAGON_ARCH___ >= 60 */
582480
583#if __HVX_ARCH__ >= 60
584/* ==========================================================================481/* ==========================================================================
585 Assembly Syntax: Qd4=vand(Vu32,Rt32)482 Assembly Syntax: Qd4=vand(Vu32,Rt32)
586 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vand_VR(HVX_Vector Vu, Word32 Rt)483 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vand_VR(HVX_Vector Vu, Word32 Rt)
...@@ -589,9 +486,7 @@...@@ -589,9 +486,7 @@
589 ========================================================================== */486 ========================================================================== */
590487
591#define Q6_Q_vand_VR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)(Vu,Rt)),-1)488#define Q6_Q_vand_VR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)(Vu,Rt)),-1)
592#endif /* __HEXAGON_ARCH___ >= 60 */
593489
594#if __HVX_ARCH__ >= 60
595/* ==========================================================================490/* ==========================================================================
596 Assembly Syntax: Qx4|=vand(Vu32,Rt32)491 Assembly Syntax: Qx4|=vand(Vu32,Rt32)
597 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vandor_QVR(HVX_VectorPred Qx, HVX_Vector Vu, Word32 Rt)492 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vandor_QVR(HVX_VectorPred Qx, HVX_Vector Vu, Word32 Rt)
...@@ -600,9 +495,7 @@...@@ -600,9 +495,7 @@
600 ========================================================================== */495 ========================================================================== */
601496
602#define Q6_Q_vandor_QVR(Qx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt_acc)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Rt)),-1)497#define Q6_Q_vandor_QVR(Qx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt_acc)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Rt)),-1)
603#endif /* __HEXAGON_ARCH___ >= 60 */
604498
605#if __HVX_ARCH__ >= 60
606/* ==========================================================================499/* ==========================================================================
607 Assembly Syntax: Vd32.h=vasl(Vu32.h,Rt32)500 Assembly Syntax: Vd32.h=vasl(Vu32.h,Rt32)
608 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhR(HVX_Vector Vu, Word32 Rt)501 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhR(HVX_Vector Vu, Word32 Rt)
...@@ -611,9 +504,7 @@...@@ -611,9 +504,7 @@
611 ========================================================================== */504 ========================================================================== */
612505
613#define Q6_Vh_vasl_VhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh)(Vu,Rt)506#define Q6_Vh_vasl_VhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh)(Vu,Rt)
614#endif /* __HEXAGON_ARCH___ >= 60 */
615507
616#if __HVX_ARCH__ >= 60
617/* ==========================================================================508/* ==========================================================================
618 Assembly Syntax: Vd32.h=vasl(Vu32.h,Vv32.h)509 Assembly Syntax: Vd32.h=vasl(Vu32.h,Vv32.h)
619 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhVh(HVX_Vector Vu, HVX_Vector Vv)510 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -622,9 +513,7 @@...@@ -622,9 +513,7 @@
622 ========================================================================== */513 ========================================================================== */
623514
624#define Q6_Vh_vasl_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslhv)(Vu,Vv)515#define Q6_Vh_vasl_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslhv)(Vu,Vv)
625#endif /* __HEXAGON_ARCH___ >= 60 */
626516
627#if __HVX_ARCH__ >= 60
628/* ==========================================================================517/* ==========================================================================
629 Assembly Syntax: Vd32.w=vasl(Vu32.w,Rt32)518 Assembly Syntax: Vd32.w=vasl(Vu32.w,Rt32)
630 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwR(HVX_Vector Vu, Word32 Rt)519 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwR(HVX_Vector Vu, Word32 Rt)
...@@ -633,9 +522,7 @@...@@ -633,9 +522,7 @@
633 ========================================================================== */522 ========================================================================== */
634523
635#define Q6_Vw_vasl_VwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw)(Vu,Rt)524#define Q6_Vw_vasl_VwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw)(Vu,Rt)
636#endif /* __HEXAGON_ARCH___ >= 60 */
637525
638#if __HVX_ARCH__ >= 60
639/* ==========================================================================526/* ==========================================================================
640 Assembly Syntax: Vx32.w+=vasl(Vu32.w,Rt32)527 Assembly Syntax: Vx32.w+=vasl(Vu32.w,Rt32)
641 C Intrinsic Prototype: HVX_Vector Q6_Vw_vaslacc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)528 C Intrinsic Prototype: HVX_Vector Q6_Vw_vaslacc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -644,9 +531,7 @@...@@ -644,9 +531,7 @@
644 ========================================================================== */531 ========================================================================== */
645532
646#define Q6_Vw_vaslacc_VwVwR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw_acc)(Vx,Vu,Rt)533#define Q6_Vw_vaslacc_VwVwR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw_acc)(Vx,Vu,Rt)
647#endif /* __HEXAGON_ARCH___ >= 60 */
648534
649#if __HVX_ARCH__ >= 60
650/* ==========================================================================535/* ==========================================================================
651 Assembly Syntax: Vd32.w=vasl(Vu32.w,Vv32.w)536 Assembly Syntax: Vd32.w=vasl(Vu32.w,Vv32.w)
652 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwVw(HVX_Vector Vu, HVX_Vector Vv)537 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -655,9 +540,7 @@...@@ -655,9 +540,7 @@
655 ========================================================================== */540 ========================================================================== */
656541
657#define Q6_Vw_vasl_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslwv)(Vu,Vv)542#define Q6_Vw_vasl_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslwv)(Vu,Vv)
658#endif /* __HEXAGON_ARCH___ >= 60 */
659543
660#if __HVX_ARCH__ >= 60
661/* ==========================================================================544/* ==========================================================================
662 Assembly Syntax: Vd32.h=vasr(Vu32.h,Rt32)545 Assembly Syntax: Vd32.h=vasr(Vu32.h,Rt32)
663 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhR(HVX_Vector Vu, Word32 Rt)546 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhR(HVX_Vector Vu, Word32 Rt)
...@@ -666,9 +549,7 @@...@@ -666,9 +549,7 @@
666 ========================================================================== */549 ========================================================================== */
667550
668#define Q6_Vh_vasr_VhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh)(Vu,Rt)551#define Q6_Vh_vasr_VhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh)(Vu,Rt)
669#endif /* __HEXAGON_ARCH___ >= 60 */
670552
671#if __HVX_ARCH__ >= 60
672/* ==========================================================================553/* ==========================================================================
673 Assembly Syntax: Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat554 Assembly Syntax: Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat
674 C Intrinsic Prototype: HVX_Vector Q6_Vb_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)555 C Intrinsic Prototype: HVX_Vector Q6_Vb_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -677,9 +558,7 @@...@@ -677,9 +558,7 @@
677 ========================================================================== */558 ========================================================================== */
678559
679#define Q6_Vb_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbrndsat)(Vu,Vv,Rt)560#define Q6_Vb_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbrndsat)(Vu,Vv,Rt)
680#endif /* __HEXAGON_ARCH___ >= 60 */
681561
682#if __HVX_ARCH__ >= 60
683/* ==========================================================================562/* ==========================================================================
684 Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat563 Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat
685 C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)564 C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -688,9 +567,7 @@...@@ -688,9 +567,7 @@
688 ========================================================================== */567 ========================================================================== */
689568
690#define Q6_Vub_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubrndsat)(Vu,Vv,Rt)569#define Q6_Vub_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubrndsat)(Vu,Vv,Rt)
691#endif /* __HEXAGON_ARCH___ >= 60 */
692570
693#if __HVX_ARCH__ >= 60
694/* ==========================================================================571/* ==========================================================================
695 Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):sat572 Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):sat
696 C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)573 C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -699,9 +576,7 @@...@@ -699,9 +576,7 @@
699 ========================================================================== */576 ========================================================================== */
700577
701#define Q6_Vub_vasr_VhVhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubsat)(Vu,Vv,Rt)578#define Q6_Vub_vasr_VhVhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubsat)(Vu,Vv,Rt)
702#endif /* __HEXAGON_ARCH___ >= 60 */
703579
704#if __HVX_ARCH__ >= 60
705/* ==========================================================================580/* ==========================================================================
706 Assembly Syntax: Vd32.h=vasr(Vu32.h,Vv32.h)581 Assembly Syntax: Vd32.h=vasr(Vu32.h,Vv32.h)
707 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhVh(HVX_Vector Vu, HVX_Vector Vv)582 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -710,9 +585,7 @@...@@ -710,9 +585,7 @@
710 ========================================================================== */585 ========================================================================== */
711586
712#define Q6_Vh_vasr_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhv)(Vu,Vv)587#define Q6_Vh_vasr_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhv)(Vu,Vv)
713#endif /* __HEXAGON_ARCH___ >= 60 */
714588
715#if __HVX_ARCH__ >= 60
716/* ==========================================================================589/* ==========================================================================
717 Assembly Syntax: Vd32.w=vasr(Vu32.w,Rt32)590 Assembly Syntax: Vd32.w=vasr(Vu32.w,Rt32)
718 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwR(HVX_Vector Vu, Word32 Rt)591 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwR(HVX_Vector Vu, Word32 Rt)
...@@ -721,9 +594,7 @@...@@ -721,9 +594,7 @@
721 ========================================================================== */594 ========================================================================== */
722595
723#define Q6_Vw_vasr_VwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw)(Vu,Rt)596#define Q6_Vw_vasr_VwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw)(Vu,Rt)
724#endif /* __HEXAGON_ARCH___ >= 60 */
725597
726#if __HVX_ARCH__ >= 60
727/* ==========================================================================598/* ==========================================================================
728 Assembly Syntax: Vx32.w+=vasr(Vu32.w,Rt32)599 Assembly Syntax: Vx32.w+=vasr(Vu32.w,Rt32)
729 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasracc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)600 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasracc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -732,9 +603,7 @@...@@ -732,9 +603,7 @@
732 ========================================================================== */603 ========================================================================== */
733604
734#define Q6_Vw_vasracc_VwVwR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw_acc)(Vx,Vu,Rt)605#define Q6_Vw_vasracc_VwVwR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw_acc)(Vx,Vu,Rt)
735#endif /* __HEXAGON_ARCH___ >= 60 */
736606
737#if __HVX_ARCH__ >= 60
738/* ==========================================================================607/* ==========================================================================
739 Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8)608 Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8)
740 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)609 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -743,9 +612,7 @@...@@ -743,9 +612,7 @@
743 ========================================================================== */612 ========================================================================== */
744613
745#define Q6_Vh_vasr_VwVwR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwh)(Vu,Vv,Rt)614#define Q6_Vh_vasr_VwVwR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwh)(Vu,Vv,Rt)
746#endif /* __HEXAGON_ARCH___ >= 60 */
747615
748#if __HVX_ARCH__ >= 60
749/* ==========================================================================616/* ==========================================================================
750 Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat617 Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat
751 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)618 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -754,9 +621,7 @@...@@ -754,9 +621,7 @@
754 ========================================================================== */621 ========================================================================== */
755622
756#define Q6_Vh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhrndsat)(Vu,Vv,Rt)623#define Q6_Vh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhrndsat)(Vu,Vv,Rt)
757#endif /* __HEXAGON_ARCH___ >= 60 */
758624
759#if __HVX_ARCH__ >= 60
760/* ==========================================================================625/* ==========================================================================
761 Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):sat626 Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):sat
762 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)627 C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -765,9 +630,7 @@...@@ -765,9 +630,7 @@
765 ========================================================================== */630 ========================================================================== */
766631
767#define Q6_Vh_vasr_VwVwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhsat)(Vu,Vv,Rt)632#define Q6_Vh_vasr_VwVwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhsat)(Vu,Vv,Rt)
768#endif /* __HEXAGON_ARCH___ >= 60 */
769633
770#if __HVX_ARCH__ >= 60
771/* ==========================================================================634/* ==========================================================================
772 Assembly Syntax: Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):sat635 Assembly Syntax: Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):sat
773 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)636 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -776,9 +639,7 @@...@@ -776,9 +639,7 @@
776 ========================================================================== */639 ========================================================================== */
777640
778#define Q6_Vuh_vasr_VwVwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhsat)(Vu,Vv,Rt)641#define Q6_Vuh_vasr_VwVwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhsat)(Vu,Vv,Rt)
779#endif /* __HEXAGON_ARCH___ >= 60 */
780642
781#if __HVX_ARCH__ >= 60
782/* ==========================================================================643/* ==========================================================================
783 Assembly Syntax: Vd32.w=vasr(Vu32.w,Vv32.w)644 Assembly Syntax: Vd32.w=vasr(Vu32.w,Vv32.w)
784 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwVw(HVX_Vector Vu, HVX_Vector Vv)645 C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -787,9 +648,7 @@...@@ -787,9 +648,7 @@
787 ========================================================================== */648 ========================================================================== */
788649
789#define Q6_Vw_vasr_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwv)(Vu,Vv)650#define Q6_Vw_vasr_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwv)(Vu,Vv)
790#endif /* __HEXAGON_ARCH___ >= 60 */
791651
792#if __HVX_ARCH__ >= 60
793/* ==========================================================================652/* ==========================================================================
794 Assembly Syntax: Vd32=Vu32653 Assembly Syntax: Vd32=Vu32
795 C Intrinsic Prototype: HVX_Vector Q6_V_equals_V(HVX_Vector Vu)654 C Intrinsic Prototype: HVX_Vector Q6_V_equals_V(HVX_Vector Vu)
...@@ -798,9 +657,7 @@...@@ -798,9 +657,7 @@
798 ========================================================================== */657 ========================================================================== */
799658
800#define Q6_V_equals_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign)(Vu)659#define Q6_V_equals_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign)(Vu)
801#endif /* __HEXAGON_ARCH___ >= 60 */
802660
803#if __HVX_ARCH__ >= 60
804/* ==========================================================================661/* ==========================================================================
805 Assembly Syntax: Vdd32=Vuu32662 Assembly Syntax: Vdd32=Vuu32
806 C Intrinsic Prototype: HVX_VectorPair Q6_W_equals_W(HVX_VectorPair Vuu)663 C Intrinsic Prototype: HVX_VectorPair Q6_W_equals_W(HVX_VectorPair Vuu)
...@@ -809,9 +666,7 @@...@@ -809,9 +666,7 @@
809 ========================================================================== */666 ========================================================================== */
810667
811#define Q6_W_equals_W(Vuu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassignp)(Vuu)668#define Q6_W_equals_W(Vuu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassignp)(Vuu)
812#endif /* __HEXAGON_ARCH___ >= 60 */
813669
814#if __HVX_ARCH__ >= 60
815/* ==========================================================================670/* ==========================================================================
816 Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h)671 Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h)
817 C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh(HVX_Vector Vu, HVX_Vector Vv)672 C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -820,9 +675,7 @@...@@ -820,9 +675,7 @@
820 ========================================================================== */675 ========================================================================== */
821676
822#define Q6_Vh_vavg_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgh)(Vu,Vv)677#define Q6_Vh_vavg_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgh)(Vu,Vv)
823#endif /* __HEXAGON_ARCH___ >= 60 */
824678
825#if __HVX_ARCH__ >= 60
826/* ==========================================================================679/* ==========================================================================
827 Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h):rnd680 Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h):rnd
828 C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh_rnd(HVX_Vector Vu, HVX_Vector Vv)681 C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh_rnd(HVX_Vector Vu, HVX_Vector Vv)
...@@ -831,9 +684,7 @@...@@ -831,9 +684,7 @@
831 ========================================================================== */684 ========================================================================== */
832685
833#define Q6_Vh_vavg_VhVh_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavghrnd)(Vu,Vv)686#define Q6_Vh_vavg_VhVh_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavghrnd)(Vu,Vv)
834#endif /* __HEXAGON_ARCH___ >= 60 */
835687
836#if __HVX_ARCH__ >= 60
837/* ==========================================================================688/* ==========================================================================
838 Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub)689 Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub)
839 C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub(HVX_Vector Vu, HVX_Vector Vv)690 C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -842,9 +693,7 @@...@@ -842,9 +693,7 @@
842 ========================================================================== */693 ========================================================================== */
843694
844#define Q6_Vub_vavg_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgub)(Vu,Vv)695#define Q6_Vub_vavg_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgub)(Vu,Vv)
845#endif /* __HEXAGON_ARCH___ >= 60 */
846696
847#if __HVX_ARCH__ >= 60
848/* ==========================================================================697/* ==========================================================================
849 Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub):rnd698 Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub):rnd
850 C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub_rnd(HVX_Vector Vu, HVX_Vector Vv)699 C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub_rnd(HVX_Vector Vu, HVX_Vector Vv)
...@@ -853,9 +702,7 @@...@@ -853,9 +702,7 @@
853 ========================================================================== */702 ========================================================================== */
854703
855#define Q6_Vub_vavg_VubVub_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgubrnd)(Vu,Vv)704#define Q6_Vub_vavg_VubVub_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgubrnd)(Vu,Vv)
856#endif /* __HEXAGON_ARCH___ >= 60 */
857705
858#if __HVX_ARCH__ >= 60
859/* ==========================================================================706/* ==========================================================================
860 Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh)707 Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh)
861 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)708 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -864,9 +711,7 @@...@@ -864,9 +711,7 @@
864 ========================================================================== */711 ========================================================================== */
865712
866#define Q6_Vuh_vavg_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguh)(Vu,Vv)713#define Q6_Vuh_vavg_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguh)(Vu,Vv)
867#endif /* __HEXAGON_ARCH___ >= 60 */
868714
869#if __HVX_ARCH__ >= 60
870/* ==========================================================================715/* ==========================================================================
871 Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh):rnd716 Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh):rnd
872 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh_rnd(HVX_Vector Vu, HVX_Vector Vv)717 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh_rnd(HVX_Vector Vu, HVX_Vector Vv)
...@@ -875,9 +720,7 @@...@@ -875,9 +720,7 @@
875 ========================================================================== */720 ========================================================================== */
876721
877#define Q6_Vuh_vavg_VuhVuh_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguhrnd)(Vu,Vv)722#define Q6_Vuh_vavg_VuhVuh_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguhrnd)(Vu,Vv)
878#endif /* __HEXAGON_ARCH___ >= 60 */
879723
880#if __HVX_ARCH__ >= 60
881/* ==========================================================================724/* ==========================================================================
882 Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w)725 Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w)
883 C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw(HVX_Vector Vu, HVX_Vector Vv)726 C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -886,9 +729,7 @@...@@ -886,9 +729,7 @@
886 ========================================================================== */729 ========================================================================== */
887730
888#define Q6_Vw_vavg_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgw)(Vu,Vv)731#define Q6_Vw_vavg_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgw)(Vu,Vv)
889#endif /* __HEXAGON_ARCH___ >= 60 */
890732
891#if __HVX_ARCH__ >= 60
892/* ==========================================================================733/* ==========================================================================
893 Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w):rnd734 Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w):rnd
894 C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw_rnd(HVX_Vector Vu, HVX_Vector Vv)735 C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw_rnd(HVX_Vector Vu, HVX_Vector Vv)
...@@ -897,9 +738,7 @@...@@ -897,9 +738,7 @@
897 ========================================================================== */738 ========================================================================== */
898739
899#define Q6_Vw_vavg_VwVw_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgwrnd)(Vu,Vv)740#define Q6_Vw_vavg_VwVw_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgwrnd)(Vu,Vv)
900#endif /* __HEXAGON_ARCH___ >= 60 */
901741
902#if __HVX_ARCH__ >= 60
903/* ==========================================================================742/* ==========================================================================
904 Assembly Syntax: Vd32.uh=vcl0(Vu32.uh)743 Assembly Syntax: Vd32.uh=vcl0(Vu32.uh)
905 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcl0_Vuh(HVX_Vector Vu)744 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcl0_Vuh(HVX_Vector Vu)
...@@ -908,9 +747,7 @@...@@ -908,9 +747,7 @@
908 ========================================================================== */747 ========================================================================== */
909748
910#define Q6_Vuh_vcl0_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0h)(Vu)749#define Q6_Vuh_vcl0_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0h)(Vu)
911#endif /* __HEXAGON_ARCH___ >= 60 */
912750
913#if __HVX_ARCH__ >= 60
914/* ==========================================================================751/* ==========================================================================
915 Assembly Syntax: Vd32.uw=vcl0(Vu32.uw)752 Assembly Syntax: Vd32.uw=vcl0(Vu32.uw)
916 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vcl0_Vuw(HVX_Vector Vu)753 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vcl0_Vuw(HVX_Vector Vu)
...@@ -919,9 +756,7 @@...@@ -919,9 +756,7 @@
919 ========================================================================== */756 ========================================================================== */
920757
921#define Q6_Vuw_vcl0_Vuw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0w)(Vu)758#define Q6_Vuw_vcl0_Vuw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0w)(Vu)
922#endif /* __HEXAGON_ARCH___ >= 60 */
923759
924#if __HVX_ARCH__ >= 60
925/* ==========================================================================760/* ==========================================================================
926 Assembly Syntax: Vdd32=vcombine(Vu32,Vv32)761 Assembly Syntax: Vdd32=vcombine(Vu32,Vv32)
927 C Intrinsic Prototype: HVX_VectorPair Q6_W_vcombine_VV(HVX_Vector Vu, HVX_Vector Vv)762 C Intrinsic Prototype: HVX_VectorPair Q6_W_vcombine_VV(HVX_Vector Vu, HVX_Vector Vv)
...@@ -930,9 +765,7 @@...@@ -930,9 +765,7 @@
930 ========================================================================== */765 ========================================================================== */
931766
932#define Q6_W_vcombine_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcombine)(Vu,Vv)767#define Q6_W_vcombine_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcombine)(Vu,Vv)
933#endif /* __HEXAGON_ARCH___ >= 60 */
934768
935#if __HVX_ARCH__ >= 60
936/* ==========================================================================769/* ==========================================================================
937 Assembly Syntax: Vd32=#0770 Assembly Syntax: Vd32=#0
938 C Intrinsic Prototype: HVX_Vector Q6_V_vzero()771 C Intrinsic Prototype: HVX_Vector Q6_V_vzero()
...@@ -941,9 +774,7 @@...@@ -941,9 +774,7 @@
941 ========================================================================== */774 ========================================================================== */
942775
943#define Q6_V_vzero() __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vd0)()776#define Q6_V_vzero() __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vd0)()
944#endif /* __HEXAGON_ARCH___ >= 60 */
945777
946#if __HVX_ARCH__ >= 60
947/* ==========================================================================778/* ==========================================================================
948 Assembly Syntax: Vd32.b=vdeal(Vu32.b)779 Assembly Syntax: Vd32.b=vdeal(Vu32.b)
949 C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeal_Vb(HVX_Vector Vu)780 C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeal_Vb(HVX_Vector Vu)
...@@ -952,9 +783,7 @@...@@ -952,9 +783,7 @@
952 ========================================================================== */783 ========================================================================== */
953784
954#define Q6_Vb_vdeal_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb)(Vu)785#define Q6_Vb_vdeal_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb)(Vu)
955#endif /* __HEXAGON_ARCH___ >= 60 */
956786
957#if __HVX_ARCH__ >= 60
958/* ==========================================================================787/* ==========================================================================
959 Assembly Syntax: Vd32.b=vdeale(Vu32.b,Vv32.b)788 Assembly Syntax: Vd32.b=vdeale(Vu32.b,Vv32.b)
960 C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeale_VbVb(HVX_Vector Vu, HVX_Vector Vv)789 C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeale_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -963,9 +792,7 @@...@@ -963,9 +792,7 @@
963 ========================================================================== */792 ========================================================================== */
964793
965#define Q6_Vb_vdeale_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb4w)(Vu,Vv)794#define Q6_Vb_vdeale_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb4w)(Vu,Vv)
966#endif /* __HEXAGON_ARCH___ >= 60 */
967795
968#if __HVX_ARCH__ >= 60
969/* ==========================================================================796/* ==========================================================================
970 Assembly Syntax: Vd32.h=vdeal(Vu32.h)797 Assembly Syntax: Vd32.h=vdeal(Vu32.h)
971 C Intrinsic Prototype: HVX_Vector Q6_Vh_vdeal_Vh(HVX_Vector Vu)798 C Intrinsic Prototype: HVX_Vector Q6_Vh_vdeal_Vh(HVX_Vector Vu)
...@@ -974,9 +801,7 @@...@@ -974,9 +801,7 @@
974 ========================================================================== */801 ========================================================================== */
975802
976#define Q6_Vh_vdeal_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealh)(Vu)803#define Q6_Vh_vdeal_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealh)(Vu)
977#endif /* __HEXAGON_ARCH___ >= 60 */
978804
979#if __HVX_ARCH__ >= 60
980/* ==========================================================================805/* ==========================================================================
981 Assembly Syntax: Vdd32=vdeal(Vu32,Vv32,Rt8)806 Assembly Syntax: Vdd32=vdeal(Vu32,Vv32,Rt8)
982 C Intrinsic Prototype: HVX_VectorPair Q6_W_vdeal_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)807 C Intrinsic Prototype: HVX_VectorPair Q6_W_vdeal_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -985,9 +810,7 @@...@@ -985,9 +810,7 @@
985 ========================================================================== */810 ========================================================================== */
986811
987#define Q6_W_vdeal_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealvdd)(Vu,Vv,Rt)812#define Q6_W_vdeal_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealvdd)(Vu,Vv,Rt)
988#endif /* __HEXAGON_ARCH___ >= 60 */
989813
990#if __HVX_ARCH__ >= 60
991/* ==========================================================================814/* ==========================================================================
992 Assembly Syntax: Vd32=vdelta(Vu32,Vv32)815 Assembly Syntax: Vd32=vdelta(Vu32,Vv32)
993 C Intrinsic Prototype: HVX_Vector Q6_V_vdelta_VV(HVX_Vector Vu, HVX_Vector Vv)816 C Intrinsic Prototype: HVX_Vector Q6_V_vdelta_VV(HVX_Vector Vu, HVX_Vector Vv)
...@@ -996,9 +819,7 @@...@@ -996,9 +819,7 @@
996 ========================================================================== */819 ========================================================================== */
997820
998#define Q6_V_vdelta_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdelta)(Vu,Vv)821#define Q6_V_vdelta_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdelta)(Vu,Vv)
999#endif /* __HEXAGON_ARCH___ >= 60 */
1000822
1001#if __HVX_ARCH__ >= 60
1002/* ==========================================================================823/* ==========================================================================
1003 Assembly Syntax: Vd32.h=vdmpy(Vu32.ub,Rt32.b)824 Assembly Syntax: Vd32.h=vdmpy(Vu32.ub,Rt32.b)
1004 C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpy_VubRb(HVX_Vector Vu, Word32 Rt)825 C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpy_VubRb(HVX_Vector Vu, Word32 Rt)
...@@ -1007,9 +828,7 @@...@@ -1007,9 +828,7 @@
1007 ========================================================================== */828 ========================================================================== */
1008829
1009#define Q6_Vh_vdmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus)(Vu,Rt)830#define Q6_Vh_vdmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus)(Vu,Rt)
1010#endif /* __HEXAGON_ARCH___ >= 60 */
1011831
1012#if __HVX_ARCH__ >= 60
1013/* ==========================================================================832/* ==========================================================================
1014 Assembly Syntax: Vx32.h+=vdmpy(Vu32.ub,Rt32.b)833 Assembly Syntax: Vx32.h+=vdmpy(Vu32.ub,Rt32.b)
1015 C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpyacc_VhVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)834 C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpyacc_VhVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -1018,9 +837,7 @@...@@ -1018,9 +837,7 @@
1018 ========================================================================== */837 ========================================================================== */
1019838
1020#define Q6_Vh_vdmpyacc_VhVubRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_acc)(Vx,Vu,Rt)839#define Q6_Vh_vdmpyacc_VhVubRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_acc)(Vx,Vu,Rt)
1021#endif /* __HEXAGON_ARCH___ >= 60 */
1022840
1023#if __HVX_ARCH__ >= 60
1024/* ==========================================================================841/* ==========================================================================
1025 Assembly Syntax: Vdd32.h=vdmpy(Vuu32.ub,Rt32.b)842 Assembly Syntax: Vdd32.h=vdmpy(Vuu32.ub,Rt32.b)
1026 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt)843 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt)
...@@ -1029,9 +846,7 @@...@@ -1029,9 +846,7 @@
1029 ========================================================================== */846 ========================================================================== */
1030847
1031#define Q6_Wh_vdmpy_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv)(Vuu,Rt)848#define Q6_Wh_vdmpy_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv)(Vuu,Rt)
1032#endif /* __HEXAGON_ARCH___ >= 60 */
1033849
1034#if __HVX_ARCH__ >= 60
1035/* ==========================================================================850/* ==========================================================================
1036 Assembly Syntax: Vxx32.h+=vdmpy(Vuu32.ub,Rt32.b)851 Assembly Syntax: Vxx32.h+=vdmpy(Vuu32.ub,Rt32.b)
1037 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)852 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -1040,9 +855,7 @@...@@ -1040,9 +855,7 @@
1040 ========================================================================== */855 ========================================================================== */
1041856
1042#define Q6_Wh_vdmpyacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv_acc)(Vxx,Vuu,Rt)857#define Q6_Wh_vdmpyacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv_acc)(Vxx,Vuu,Rt)
1043#endif /* __HEXAGON_ARCH___ >= 60 */
1044858
1045#if __HVX_ARCH__ >= 60
1046/* ==========================================================================859/* ==========================================================================
1047 Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.b)860 Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.b)
1048 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRb(HVX_Vector Vu, Word32 Rt)861 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRb(HVX_Vector Vu, Word32 Rt)
...@@ -1051,9 +864,7 @@...@@ -1051,9 +864,7 @@
1051 ========================================================================== */864 ========================================================================== */
1052865
1053#define Q6_Vw_vdmpy_VhRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb)(Vu,Rt)866#define Q6_Vw_vdmpy_VhRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb)(Vu,Rt)
1054#endif /* __HEXAGON_ARCH___ >= 60 */
1055867
1056#if __HVX_ARCH__ >= 60
1057/* ==========================================================================868/* ==========================================================================
1058 Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.b)869 Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.b)
1059 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)870 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -1062,9 +873,7 @@...@@ -1062,9 +873,7 @@
1062 ========================================================================== */873 ========================================================================== */
1063874
1064#define Q6_Vw_vdmpyacc_VwVhRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_acc)(Vx,Vu,Rt)875#define Q6_Vw_vdmpyacc_VwVhRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_acc)(Vx,Vu,Rt)
1065#endif /* __HEXAGON_ARCH___ >= 60 */
1066876
1067#if __HVX_ARCH__ >= 60
1068/* ==========================================================================877/* ==========================================================================
1069 Assembly Syntax: Vdd32.w=vdmpy(Vuu32.h,Rt32.b)878 Assembly Syntax: Vdd32.w=vdmpy(Vuu32.h,Rt32.b)
1070 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt)879 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt)
...@@ -1073,9 +882,7 @@...@@ -1073,9 +882,7 @@
1073 ========================================================================== */882 ========================================================================== */
1074883
1075#define Q6_Ww_vdmpy_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv)(Vuu,Rt)884#define Q6_Ww_vdmpy_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv)(Vuu,Rt)
1076#endif /* __HEXAGON_ARCH___ >= 60 */
1077885
1078#if __HVX_ARCH__ >= 60
1079/* ==========================================================================886/* ==========================================================================
1080 Assembly Syntax: Vxx32.w+=vdmpy(Vuu32.h,Rt32.b)887 Assembly Syntax: Vxx32.w+=vdmpy(Vuu32.h,Rt32.b)
1081 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)888 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -1084,9 +891,7 @@...@@ -1084,9 +891,7 @@
1084 ========================================================================== */891 ========================================================================== */
1085892
1086#define Q6_Ww_vdmpyacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv_acc)(Vxx,Vuu,Rt)893#define Q6_Ww_vdmpyacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv_acc)(Vxx,Vuu,Rt)
1087#endif /* __HEXAGON_ARCH___ >= 60 */
1088894
1089#if __HVX_ARCH__ >= 60
1090/* ==========================================================================895/* ==========================================================================
1091 Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.h):sat896 Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.h):sat
1092 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRh_sat(HVX_VectorPair Vuu, Word32 Rt)897 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRh_sat(HVX_VectorPair Vuu, Word32 Rt)
...@@ -1095,9 +900,7 @@...@@ -1095,9 +900,7 @@
1095 ========================================================================== */900 ========================================================================== */
1096901
1097#define Q6_Vw_vdmpy_WhRh_sat(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat)(Vuu,Rt)902#define Q6_Vw_vdmpy_WhRh_sat(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat)(Vuu,Rt)
1098#endif /* __HEXAGON_ARCH___ >= 60 */
1099903
1100#if __HVX_ARCH__ >= 60
1101/* ==========================================================================904/* ==========================================================================
1102 Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.h):sat905 Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.h):sat
1103 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt)906 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -1106,9 +909,7 @@...@@ -1106,9 +909,7 @@
1106 ========================================================================== */909 ========================================================================== */
1107910
1108#define Q6_Vw_vdmpyacc_VwWhRh_sat(Vx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat_acc)(Vx,Vuu,Rt)911#define Q6_Vw_vdmpyacc_VwWhRh_sat(Vx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat_acc)(Vx,Vuu,Rt)
1109#endif /* __HEXAGON_ARCH___ >= 60 */
1110912
1111#if __HVX_ARCH__ >= 60
1112/* ==========================================================================913/* ==========================================================================
1113 Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.h):sat914 Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.h):sat
1114 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRh_sat(HVX_Vector Vu, Word32 Rt)915 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRh_sat(HVX_Vector Vu, Word32 Rt)
...@@ -1117,9 +918,7 @@...@@ -1117,9 +918,7 @@
1117 ========================================================================== */918 ========================================================================== */
1118919
1119#define Q6_Vw_vdmpy_VhRh_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat)(Vu,Rt)920#define Q6_Vw_vdmpy_VhRh_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat)(Vu,Rt)
1120#endif /* __HEXAGON_ARCH___ >= 60 */
1121921
1122#if __HVX_ARCH__ >= 60
1123/* ==========================================================================922/* ==========================================================================
1124 Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.h):sat923 Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.h):sat
1125 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)924 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -1128,9 +927,7 @@...@@ -1128,9 +927,7 @@
1128 ========================================================================== */927 ========================================================================== */
1129928
1130#define Q6_Vw_vdmpyacc_VwVhRh_sat(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat_acc)(Vx,Vu,Rt)929#define Q6_Vw_vdmpyacc_VwVhRh_sat(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat_acc)(Vx,Vu,Rt)
1131#endif /* __HEXAGON_ARCH___ >= 60 */
1132930
1133#if __HVX_ARCH__ >= 60
1134/* ==========================================================================931/* ==========================================================================
1135 Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.uh,#1):sat932 Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.uh,#1):sat
1136 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRuh_sat(HVX_VectorPair Vuu, Word32 Rt)933 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRuh_sat(HVX_VectorPair Vuu, Word32 Rt)
...@@ -1139,9 +936,7 @@...@@ -1139,9 +936,7 @@
1139 ========================================================================== */936 ========================================================================== */
1140937
1141#define Q6_Vw_vdmpy_WhRuh_sat(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat)(Vuu,Rt)938#define Q6_Vw_vdmpy_WhRuh_sat(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat)(Vuu,Rt)
1142#endif /* __HEXAGON_ARCH___ >= 60 */
1143939
1144#if __HVX_ARCH__ >= 60
1145/* ==========================================================================940/* ==========================================================================
1146 Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.uh,#1):sat941 Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.uh,#1):sat
1147 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRuh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt)942 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRuh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -1150,9 +945,7 @@...@@ -1150,9 +945,7 @@
1150 ========================================================================== */945 ========================================================================== */
1151946
1152#define Q6_Vw_vdmpyacc_VwWhRuh_sat(Vx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat_acc)(Vx,Vuu,Rt)947#define Q6_Vw_vdmpyacc_VwWhRuh_sat(Vx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat_acc)(Vx,Vuu,Rt)
1153#endif /* __HEXAGON_ARCH___ >= 60 */
1154948
1155#if __HVX_ARCH__ >= 60
1156/* ==========================================================================949/* ==========================================================================
1157 Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.uh):sat950 Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.uh):sat
1158 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRuh_sat(HVX_Vector Vu, Word32 Rt)951 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRuh_sat(HVX_Vector Vu, Word32 Rt)
...@@ -1161,9 +954,7 @@...@@ -1161,9 +954,7 @@
1161 ========================================================================== */954 ========================================================================== */
1162955
1163#define Q6_Vw_vdmpy_VhRuh_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat)(Vu,Rt)956#define Q6_Vw_vdmpy_VhRuh_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat)(Vu,Rt)
1164#endif /* __HEXAGON_ARCH___ >= 60 */
1165957
1166#if __HVX_ARCH__ >= 60
1167/* ==========================================================================958/* ==========================================================================
1168 Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.uh):sat959 Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.uh):sat
1169 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)960 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -1172,9 +963,7 @@...@@ -1172,9 +963,7 @@
1172 ========================================================================== */963 ========================================================================== */
1173964
1174#define Q6_Vw_vdmpyacc_VwVhRuh_sat(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat_acc)(Vx,Vu,Rt)965#define Q6_Vw_vdmpyacc_VwVhRuh_sat(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat_acc)(Vx,Vu,Rt)
1175#endif /* __HEXAGON_ARCH___ >= 60 */
1176966
1177#if __HVX_ARCH__ >= 60
1178/* ==========================================================================967/* ==========================================================================
1179 Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Vv32.h):sat968 Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Vv32.h):sat
1180 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)969 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1183,9 +972,7 @@...@@ -1183,9 +972,7 @@
1183 ========================================================================== */972 ========================================================================== */
1184973
1185#define Q6_Vw_vdmpy_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat)(Vu,Vv)974#define Q6_Vw_vdmpy_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat)(Vu,Vv)
1186#endif /* __HEXAGON_ARCH___ >= 60 */
1187975
1188#if __HVX_ARCH__ >= 60
1189/* ==========================================================================976/* ==========================================================================
1190 Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Vv32.h):sat977 Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Vv32.h):sat
1191 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhVh_sat(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)978 C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhVh_sat(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1194,9 +981,7 @@...@@ -1194,9 +981,7 @@
1194 ========================================================================== */981 ========================================================================== */
1195982
1196#define Q6_Vw_vdmpyacc_VwVhVh_sat(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat_acc)(Vx,Vu,Vv)983#define Q6_Vw_vdmpyacc_VwVhVh_sat(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat_acc)(Vx,Vu,Vv)
1197#endif /* __HEXAGON_ARCH___ >= 60 */
1198984
1199#if __HVX_ARCH__ >= 60
1200/* ==========================================================================985/* ==========================================================================
1201 Assembly Syntax: Vdd32.uw=vdsad(Vuu32.uh,Rt32.uh)986 Assembly Syntax: Vdd32.uw=vdsad(Vuu32.uh,Rt32.uh)
1202 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsad_WuhRuh(HVX_VectorPair Vuu, Word32 Rt)987 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsad_WuhRuh(HVX_VectorPair Vuu, Word32 Rt)
...@@ -1205,9 +990,7 @@...@@ -1205,9 +990,7 @@
1205 ========================================================================== */990 ========================================================================== */
1206991
1207#define Q6_Wuw_vdsad_WuhRuh(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh)(Vuu,Rt)992#define Q6_Wuw_vdsad_WuhRuh(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh)(Vuu,Rt)
1208#endif /* __HEXAGON_ARCH___ >= 60 */
1209993
1210#if __HVX_ARCH__ >= 60
1211/* ==========================================================================994/* ==========================================================================
1212 Assembly Syntax: Vxx32.uw+=vdsad(Vuu32.uh,Rt32.uh)995 Assembly Syntax: Vxx32.uw+=vdsad(Vuu32.uh,Rt32.uh)
1213 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsadacc_WuwWuhRuh(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)996 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsadacc_WuwWuhRuh(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -1216,9 +999,7 @@...@@ -1216,9 +999,7 @@
1216 ========================================================================== */999 ========================================================================== */
12171000
1218#define Q6_Wuw_vdsadacc_WuwWuhRuh(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh_acc)(Vxx,Vuu,Rt)1001#define Q6_Wuw_vdsadacc_WuwWuhRuh(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh_acc)(Vxx,Vuu,Rt)
1219#endif /* __HEXAGON_ARCH___ >= 60 */
12201002
1221#if __HVX_ARCH__ >= 60
1222/* ==========================================================================1003/* ==========================================================================
1223 Assembly Syntax: Qd4=vcmp.eq(Vu32.b,Vv32.b)1004 Assembly Syntax: Qd4=vcmp.eq(Vu32.b,Vv32.b)
1224 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VbVb(HVX_Vector Vu, HVX_Vector Vv)1005 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1227,9 +1008,7 @@...@@ -1227,9 +1008,7 @@
1227 ========================================================================== */1008 ========================================================================== */
12281009
1229#define Q6_Q_vcmp_eq_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb)(Vu,Vv)),-1)1010#define Q6_Q_vcmp_eq_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb)(Vu,Vv)),-1)
1230#endif /* __HEXAGON_ARCH___ >= 60 */
12311011
1232#if __HVX_ARCH__ >= 60
1233/* ==========================================================================1012/* ==========================================================================
1234 Assembly Syntax: Qx4&=vcmp.eq(Vu32.b,Vv32.b)1013 Assembly Syntax: Qx4&=vcmp.eq(Vu32.b,Vv32.b)
1235 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1014 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1238,9 +1017,7 @@...@@ -1238,9 +1017,7 @@
1238 ========================================================================== */1017 ========================================================================== */
12391018
1240#define Q6_Q_vcmp_eqand_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1019#define Q6_Q_vcmp_eqand_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1241#endif /* __HEXAGON_ARCH___ >= 60 */
12421020
1243#if __HVX_ARCH__ >= 60
1244/* ==========================================================================1021/* ==========================================================================
1245 Assembly Syntax: Qx4|=vcmp.eq(Vu32.b,Vv32.b)1022 Assembly Syntax: Qx4|=vcmp.eq(Vu32.b,Vv32.b)
1246 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1023 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1249,9 +1026,7 @@...@@ -1249,9 +1026,7 @@
1249 ========================================================================== */1026 ========================================================================== */
12501027
1251#define Q6_Q_vcmp_eqor_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1028#define Q6_Q_vcmp_eqor_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1252#endif /* __HEXAGON_ARCH___ >= 60 */
12531029
1254#if __HVX_ARCH__ >= 60
1255/* ==========================================================================1030/* ==========================================================================
1256 Assembly Syntax: Qx4^=vcmp.eq(Vu32.b,Vv32.b)1031 Assembly Syntax: Qx4^=vcmp.eq(Vu32.b,Vv32.b)
1257 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1032 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1260,9 +1035,7 @@...@@ -1260,9 +1035,7 @@
1260 ========================================================================== */1035 ========================================================================== */
12611036
1262#define Q6_Q_vcmp_eqxacc_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1037#define Q6_Q_vcmp_eqxacc_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1263#endif /* __HEXAGON_ARCH___ >= 60 */
12641038
1265#if __HVX_ARCH__ >= 60
1266/* ==========================================================================1039/* ==========================================================================
1267 Assembly Syntax: Qd4=vcmp.eq(Vu32.h,Vv32.h)1040 Assembly Syntax: Qd4=vcmp.eq(Vu32.h,Vv32.h)
1268 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VhVh(HVX_Vector Vu, HVX_Vector Vv)1041 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1271,9 +1044,7 @@...@@ -1271,9 +1044,7 @@
1271 ========================================================================== */1044 ========================================================================== */
12721045
1273#define Q6_Q_vcmp_eq_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh)(Vu,Vv)),-1)1046#define Q6_Q_vcmp_eq_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh)(Vu,Vv)),-1)
1274#endif /* __HEXAGON_ARCH___ >= 60 */
12751047
1276#if __HVX_ARCH__ >= 60
1277/* ==========================================================================1048/* ==========================================================================
1278 Assembly Syntax: Qx4&=vcmp.eq(Vu32.h,Vv32.h)1049 Assembly Syntax: Qx4&=vcmp.eq(Vu32.h,Vv32.h)
1279 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1050 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1282,9 +1053,7 @@...@@ -1282,9 +1053,7 @@
1282 ========================================================================== */1053 ========================================================================== */
12831054
1284#define Q6_Q_vcmp_eqand_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1055#define Q6_Q_vcmp_eqand_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1285#endif /* __HEXAGON_ARCH___ >= 60 */
12861056
1287#if __HVX_ARCH__ >= 60
1288/* ==========================================================================1057/* ==========================================================================
1289 Assembly Syntax: Qx4|=vcmp.eq(Vu32.h,Vv32.h)1058 Assembly Syntax: Qx4|=vcmp.eq(Vu32.h,Vv32.h)
1290 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1059 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1293,9 +1062,7 @@...@@ -1293,9 +1062,7 @@
1293 ========================================================================== */1062 ========================================================================== */
12941063
1295#define Q6_Q_vcmp_eqor_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1064#define Q6_Q_vcmp_eqor_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1296#endif /* __HEXAGON_ARCH___ >= 60 */
12971065
1298#if __HVX_ARCH__ >= 60
1299/* ==========================================================================1066/* ==========================================================================
1300 Assembly Syntax: Qx4^=vcmp.eq(Vu32.h,Vv32.h)1067 Assembly Syntax: Qx4^=vcmp.eq(Vu32.h,Vv32.h)
1301 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1068 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1304,9 +1071,7 @@...@@ -1304,9 +1071,7 @@
1304 ========================================================================== */1071 ========================================================================== */
13051072
1306#define Q6_Q_vcmp_eqxacc_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1073#define Q6_Q_vcmp_eqxacc_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1307#endif /* __HEXAGON_ARCH___ >= 60 */
13081074
1309#if __HVX_ARCH__ >= 60
1310/* ==========================================================================1075/* ==========================================================================
1311 Assembly Syntax: Qd4=vcmp.eq(Vu32.w,Vv32.w)1076 Assembly Syntax: Qd4=vcmp.eq(Vu32.w,Vv32.w)
1312 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VwVw(HVX_Vector Vu, HVX_Vector Vv)1077 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1315,9 +1080,7 @@...@@ -1315,9 +1080,7 @@
1315 ========================================================================== */1080 ========================================================================== */
13161081
1317#define Q6_Q_vcmp_eq_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw)(Vu,Vv)),-1)1082#define Q6_Q_vcmp_eq_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw)(Vu,Vv)),-1)
1318#endif /* __HEXAGON_ARCH___ >= 60 */
13191083
1320#if __HVX_ARCH__ >= 60
1321/* ==========================================================================1084/* ==========================================================================
1322 Assembly Syntax: Qx4&=vcmp.eq(Vu32.w,Vv32.w)1085 Assembly Syntax: Qx4&=vcmp.eq(Vu32.w,Vv32.w)
1323 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1086 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1326,9 +1089,7 @@...@@ -1326,9 +1089,7 @@
1326 ========================================================================== */1089 ========================================================================== */
13271090
1328#define Q6_Q_vcmp_eqand_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1091#define Q6_Q_vcmp_eqand_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1329#endif /* __HEXAGON_ARCH___ >= 60 */
13301092
1331#if __HVX_ARCH__ >= 60
1332/* ==========================================================================1093/* ==========================================================================
1333 Assembly Syntax: Qx4|=vcmp.eq(Vu32.w,Vv32.w)1094 Assembly Syntax: Qx4|=vcmp.eq(Vu32.w,Vv32.w)
1334 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1095 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1337,9 +1098,7 @@...@@ -1337,9 +1098,7 @@
1337 ========================================================================== */1098 ========================================================================== */
13381099
1339#define Q6_Q_vcmp_eqor_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1100#define Q6_Q_vcmp_eqor_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1340#endif /* __HEXAGON_ARCH___ >= 60 */
13411101
1342#if __HVX_ARCH__ >= 60
1343/* ==========================================================================1102/* ==========================================================================
1344 Assembly Syntax: Qx4^=vcmp.eq(Vu32.w,Vv32.w)1103 Assembly Syntax: Qx4^=vcmp.eq(Vu32.w,Vv32.w)
1345 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1104 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1348,9 +1107,7 @@...@@ -1348,9 +1107,7 @@
1348 ========================================================================== */1107 ========================================================================== */
13491108
1350#define Q6_Q_vcmp_eqxacc_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1109#define Q6_Q_vcmp_eqxacc_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1351#endif /* __HEXAGON_ARCH___ >= 60 */
13521110
1353#if __HVX_ARCH__ >= 60
1354/* ==========================================================================1111/* ==========================================================================
1355 Assembly Syntax: Qd4=vcmp.gt(Vu32.b,Vv32.b)1112 Assembly Syntax: Qd4=vcmp.gt(Vu32.b,Vv32.b)
1356 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VbVb(HVX_Vector Vu, HVX_Vector Vv)1113 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1359,9 +1116,7 @@...@@ -1359,9 +1116,7 @@
1359 ========================================================================== */1116 ========================================================================== */
13601117
1361#define Q6_Q_vcmp_gt_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb)(Vu,Vv)),-1)1118#define Q6_Q_vcmp_gt_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb)(Vu,Vv)),-1)
1362#endif /* __HEXAGON_ARCH___ >= 60 */
13631119
1364#if __HVX_ARCH__ >= 60
1365/* ==========================================================================1120/* ==========================================================================
1366 Assembly Syntax: Qx4&=vcmp.gt(Vu32.b,Vv32.b)1121 Assembly Syntax: Qx4&=vcmp.gt(Vu32.b,Vv32.b)
1367 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1122 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1370,9 +1125,7 @@...@@ -1370,9 +1125,7 @@
1370 ========================================================================== */1125 ========================================================================== */
13711126
1372#define Q6_Q_vcmp_gtand_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1127#define Q6_Q_vcmp_gtand_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1373#endif /* __HEXAGON_ARCH___ >= 60 */
13741128
1375#if __HVX_ARCH__ >= 60
1376/* ==========================================================================1129/* ==========================================================================
1377 Assembly Syntax: Qx4|=vcmp.gt(Vu32.b,Vv32.b)1130 Assembly Syntax: Qx4|=vcmp.gt(Vu32.b,Vv32.b)
1378 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1131 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1381,9 +1134,7 @@...@@ -1381,9 +1134,7 @@
1381 ========================================================================== */1134 ========================================================================== */
13821135
1383#define Q6_Q_vcmp_gtor_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1136#define Q6_Q_vcmp_gtor_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1384#endif /* __HEXAGON_ARCH___ >= 60 */
13851137
1386#if __HVX_ARCH__ >= 60
1387/* ==========================================================================1138/* ==========================================================================
1388 Assembly Syntax: Qx4^=vcmp.gt(Vu32.b,Vv32.b)1139 Assembly Syntax: Qx4^=vcmp.gt(Vu32.b,Vv32.b)
1389 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1140 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1392,9 +1143,7 @@...@@ -1392,9 +1143,7 @@
1392 ========================================================================== */1143 ========================================================================== */
13931144
1394#define Q6_Q_vcmp_gtxacc_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1145#define Q6_Q_vcmp_gtxacc_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1395#endif /* __HEXAGON_ARCH___ >= 60 */
13961146
1397#if __HVX_ARCH__ >= 60
1398/* ==========================================================================1147/* ==========================================================================
1399 Assembly Syntax: Qd4=vcmp.gt(Vu32.h,Vv32.h)1148 Assembly Syntax: Qd4=vcmp.gt(Vu32.h,Vv32.h)
1400 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VhVh(HVX_Vector Vu, HVX_Vector Vv)1149 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1403,9 +1152,7 @@...@@ -1403,9 +1152,7 @@
1403 ========================================================================== */1152 ========================================================================== */
14041153
1405#define Q6_Q_vcmp_gt_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth)(Vu,Vv)),-1)1154#define Q6_Q_vcmp_gt_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth)(Vu,Vv)),-1)
1406#endif /* __HEXAGON_ARCH___ >= 60 */
14071155
1408#if __HVX_ARCH__ >= 60
1409/* ==========================================================================1156/* ==========================================================================
1410 Assembly Syntax: Qx4&=vcmp.gt(Vu32.h,Vv32.h)1157 Assembly Syntax: Qx4&=vcmp.gt(Vu32.h,Vv32.h)
1411 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1158 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1414,9 +1161,7 @@...@@ -1414,9 +1161,7 @@
1414 ========================================================================== */1161 ========================================================================== */
14151162
1416#define Q6_Q_vcmp_gtand_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1163#define Q6_Q_vcmp_gtand_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1417#endif /* __HEXAGON_ARCH___ >= 60 */
14181164
1419#if __HVX_ARCH__ >= 60
1420/* ==========================================================================1165/* ==========================================================================
1421 Assembly Syntax: Qx4|=vcmp.gt(Vu32.h,Vv32.h)1166 Assembly Syntax: Qx4|=vcmp.gt(Vu32.h,Vv32.h)
1422 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1167 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1425,9 +1170,7 @@...@@ -1425,9 +1170,7 @@
1425 ========================================================================== */1170 ========================================================================== */
14261171
1427#define Q6_Q_vcmp_gtor_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1172#define Q6_Q_vcmp_gtor_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1428#endif /* __HEXAGON_ARCH___ >= 60 */
14291173
1430#if __HVX_ARCH__ >= 60
1431/* ==========================================================================1174/* ==========================================================================
1432 Assembly Syntax: Qx4^=vcmp.gt(Vu32.h,Vv32.h)1175 Assembly Syntax: Qx4^=vcmp.gt(Vu32.h,Vv32.h)
1433 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1176 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1436,9 +1179,7 @@...@@ -1436,9 +1179,7 @@
1436 ========================================================================== */1179 ========================================================================== */
14371180
1438#define Q6_Q_vcmp_gtxacc_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1181#define Q6_Q_vcmp_gtxacc_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1439#endif /* __HEXAGON_ARCH___ >= 60 */
14401182
1441#if __HVX_ARCH__ >= 60
1442/* ==========================================================================1183/* ==========================================================================
1443 Assembly Syntax: Qd4=vcmp.gt(Vu32.ub,Vv32.ub)1184 Assembly Syntax: Qd4=vcmp.gt(Vu32.ub,Vv32.ub)
1444 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VubVub(HVX_Vector Vu, HVX_Vector Vv)1185 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1447,9 +1188,7 @@...@@ -1447,9 +1188,7 @@
1447 ========================================================================== */1188 ========================================================================== */
14481189
1449#define Q6_Q_vcmp_gt_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub)(Vu,Vv)),-1)1190#define Q6_Q_vcmp_gt_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub)(Vu,Vv)),-1)
1450#endif /* __HEXAGON_ARCH___ >= 60 */
14511191
1452#if __HVX_ARCH__ >= 60
1453/* ==========================================================================1192/* ==========================================================================
1454 Assembly Syntax: Qx4&=vcmp.gt(Vu32.ub,Vv32.ub)1193 Assembly Syntax: Qx4&=vcmp.gt(Vu32.ub,Vv32.ub)
1455 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1194 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1458,9 +1197,7 @@...@@ -1458,9 +1197,7 @@
1458 ========================================================================== */1197 ========================================================================== */
14591198
1460#define Q6_Q_vcmp_gtand_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1199#define Q6_Q_vcmp_gtand_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1461#endif /* __HEXAGON_ARCH___ >= 60 */
14621200
1463#if __HVX_ARCH__ >= 60
1464/* ==========================================================================1201/* ==========================================================================
1465 Assembly Syntax: Qx4|=vcmp.gt(Vu32.ub,Vv32.ub)1202 Assembly Syntax: Qx4|=vcmp.gt(Vu32.ub,Vv32.ub)
1466 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1203 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1469,9 +1206,7 @@...@@ -1469,9 +1206,7 @@
1469 ========================================================================== */1206 ========================================================================== */
14701207
1471#define Q6_Q_vcmp_gtor_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1208#define Q6_Q_vcmp_gtor_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1472#endif /* __HEXAGON_ARCH___ >= 60 */
14731209
1474#if __HVX_ARCH__ >= 60
1475/* ==========================================================================1210/* ==========================================================================
1476 Assembly Syntax: Qx4^=vcmp.gt(Vu32.ub,Vv32.ub)1211 Assembly Syntax: Qx4^=vcmp.gt(Vu32.ub,Vv32.ub)
1477 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1212 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1480,9 +1215,7 @@...@@ -1480,9 +1215,7 @@
1480 ========================================================================== */1215 ========================================================================== */
14811216
1482#define Q6_Q_vcmp_gtxacc_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1217#define Q6_Q_vcmp_gtxacc_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1483#endif /* __HEXAGON_ARCH___ >= 60 */
14841218
1485#if __HVX_ARCH__ >= 60
1486/* ==========================================================================1219/* ==========================================================================
1487 Assembly Syntax: Qd4=vcmp.gt(Vu32.uh,Vv32.uh)1220 Assembly Syntax: Qd4=vcmp.gt(Vu32.uh,Vv32.uh)
1488 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)1221 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1491,9 +1224,7 @@...@@ -1491,9 +1224,7 @@
1491 ========================================================================== */1224 ========================================================================== */
14921225
1493#define Q6_Q_vcmp_gt_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh)(Vu,Vv)),-1)1226#define Q6_Q_vcmp_gt_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh)(Vu,Vv)),-1)
1494#endif /* __HEXAGON_ARCH___ >= 60 */
14951227
1496#if __HVX_ARCH__ >= 60
1497/* ==========================================================================1228/* ==========================================================================
1498 Assembly Syntax: Qx4&=vcmp.gt(Vu32.uh,Vv32.uh)1229 Assembly Syntax: Qx4&=vcmp.gt(Vu32.uh,Vv32.uh)
1499 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1230 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1502,9 +1233,7 @@...@@ -1502,9 +1233,7 @@
1502 ========================================================================== */1233 ========================================================================== */
15031234
1504#define Q6_Q_vcmp_gtand_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1235#define Q6_Q_vcmp_gtand_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1505#endif /* __HEXAGON_ARCH___ >= 60 */
15061236
1507#if __HVX_ARCH__ >= 60
1508/* ==========================================================================1237/* ==========================================================================
1509 Assembly Syntax: Qx4|=vcmp.gt(Vu32.uh,Vv32.uh)1238 Assembly Syntax: Qx4|=vcmp.gt(Vu32.uh,Vv32.uh)
1510 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1239 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1513,9 +1242,7 @@...@@ -1513,9 +1242,7 @@
1513 ========================================================================== */1242 ========================================================================== */
15141243
1515#define Q6_Q_vcmp_gtor_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1244#define Q6_Q_vcmp_gtor_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1516#endif /* __HEXAGON_ARCH___ >= 60 */
15171245
1518#if __HVX_ARCH__ >= 60
1519/* ==========================================================================1246/* ==========================================================================
1520 Assembly Syntax: Qx4^=vcmp.gt(Vu32.uh,Vv32.uh)1247 Assembly Syntax: Qx4^=vcmp.gt(Vu32.uh,Vv32.uh)
1521 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1248 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1524,9 +1251,7 @@...@@ -1524,9 +1251,7 @@
1524 ========================================================================== */1251 ========================================================================== */
15251252
1526#define Q6_Q_vcmp_gtxacc_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1253#define Q6_Q_vcmp_gtxacc_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1527#endif /* __HEXAGON_ARCH___ >= 60 */
15281254
1529#if __HVX_ARCH__ >= 60
1530/* ==========================================================================1255/* ==========================================================================
1531 Assembly Syntax: Qd4=vcmp.gt(Vu32.uw,Vv32.uw)1256 Assembly Syntax: Qd4=vcmp.gt(Vu32.uw,Vv32.uw)
1532 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuwVuw(HVX_Vector Vu, HVX_Vector Vv)1257 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuwVuw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1535,9 +1260,7 @@...@@ -1535,9 +1260,7 @@
1535 ========================================================================== */1260 ========================================================================== */
15361261
1537#define Q6_Q_vcmp_gt_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw)(Vu,Vv)),-1)1262#define Q6_Q_vcmp_gt_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw)(Vu,Vv)),-1)
1538#endif /* __HEXAGON_ARCH___ >= 60 */
15391263
1540#if __HVX_ARCH__ >= 60
1541/* ==========================================================================1264/* ==========================================================================
1542 Assembly Syntax: Qx4&=vcmp.gt(Vu32.uw,Vv32.uw)1265 Assembly Syntax: Qx4&=vcmp.gt(Vu32.uw,Vv32.uw)
1543 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1266 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1546,9 +1269,7 @@...@@ -1546,9 +1269,7 @@
1546 ========================================================================== */1269 ========================================================================== */
15471270
1548#define Q6_Q_vcmp_gtand_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1271#define Q6_Q_vcmp_gtand_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1549#endif /* __HEXAGON_ARCH___ >= 60 */
15501272
1551#if __HVX_ARCH__ >= 60
1552/* ==========================================================================1273/* ==========================================================================
1553 Assembly Syntax: Qx4|=vcmp.gt(Vu32.uw,Vv32.uw)1274 Assembly Syntax: Qx4|=vcmp.gt(Vu32.uw,Vv32.uw)
1554 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1275 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1557,9 +1278,7 @@...@@ -1557,9 +1278,7 @@
1557 ========================================================================== */1278 ========================================================================== */
15581279
1559#define Q6_Q_vcmp_gtor_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1280#define Q6_Q_vcmp_gtor_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1560#endif /* __HEXAGON_ARCH___ >= 60 */
15611281
1562#if __HVX_ARCH__ >= 60
1563/* ==========================================================================1282/* ==========================================================================
1564 Assembly Syntax: Qx4^=vcmp.gt(Vu32.uw,Vv32.uw)1283 Assembly Syntax: Qx4^=vcmp.gt(Vu32.uw,Vv32.uw)
1565 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1284 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1568,9 +1287,7 @@...@@ -1568,9 +1287,7 @@
1568 ========================================================================== */1287 ========================================================================== */
15691288
1570#define Q6_Q_vcmp_gtxacc_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1289#define Q6_Q_vcmp_gtxacc_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1571#endif /* __HEXAGON_ARCH___ >= 60 */
15721290
1573#if __HVX_ARCH__ >= 60
1574/* ==========================================================================1291/* ==========================================================================
1575 Assembly Syntax: Qd4=vcmp.gt(Vu32.w,Vv32.w)1292 Assembly Syntax: Qd4=vcmp.gt(Vu32.w,Vv32.w)
1576 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VwVw(HVX_Vector Vu, HVX_Vector Vv)1293 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1579,9 +1296,7 @@...@@ -1579,9 +1296,7 @@
1579 ========================================================================== */1296 ========================================================================== */
15801297
1581#define Q6_Q_vcmp_gt_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw)(Vu,Vv)),-1)1298#define Q6_Q_vcmp_gt_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw)(Vu,Vv)),-1)
1582#endif /* __HEXAGON_ARCH___ >= 60 */
15831299
1584#if __HVX_ARCH__ >= 60
1585/* ==========================================================================1300/* ==========================================================================
1586 Assembly Syntax: Qx4&=vcmp.gt(Vu32.w,Vv32.w)1301 Assembly Syntax: Qx4&=vcmp.gt(Vu32.w,Vv32.w)
1587 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1302 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1590,9 +1305,7 @@...@@ -1590,9 +1305,7 @@
1590 ========================================================================== */1305 ========================================================================== */
15911306
1592#define Q6_Q_vcmp_gtand_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1307#define Q6_Q_vcmp_gtand_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1593#endif /* __HEXAGON_ARCH___ >= 60 */
15941308
1595#if __HVX_ARCH__ >= 60
1596/* ==========================================================================1309/* ==========================================================================
1597 Assembly Syntax: Qx4|=vcmp.gt(Vu32.w,Vv32.w)1310 Assembly Syntax: Qx4|=vcmp.gt(Vu32.w,Vv32.w)
1598 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1311 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1601,9 +1314,7 @@...@@ -1601,9 +1314,7 @@
1601 ========================================================================== */1314 ========================================================================== */
16021315
1603#define Q6_Q_vcmp_gtor_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1316#define Q6_Q_vcmp_gtor_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1604#endif /* __HEXAGON_ARCH___ >= 60 */
16051317
1606#if __HVX_ARCH__ >= 60
1607/* ==========================================================================1318/* ==========================================================================
1608 Assembly Syntax: Qx4^=vcmp.gt(Vu32.w,Vv32.w)1319 Assembly Syntax: Qx4^=vcmp.gt(Vu32.w,Vv32.w)
1609 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)1320 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1612,9 +1323,7 @@...@@ -1612,9 +1323,7 @@
1612 ========================================================================== */1323 ========================================================================== */
16131324
1614#define Q6_Q_vcmp_gtxacc_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)1325#define Q6_Q_vcmp_gtxacc_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
1615#endif /* __HEXAGON_ARCH___ >= 60 */
16161326
1617#if __HVX_ARCH__ >= 60
1618/* ==========================================================================1327/* ==========================================================================
1619 Assembly Syntax: Vx32.w=vinsert(Rt32)1328 Assembly Syntax: Vx32.w=vinsert(Rt32)
1620 C Intrinsic Prototype: HVX_Vector Q6_Vw_vinsert_VwR(HVX_Vector Vx, Word32 Rt)1329 C Intrinsic Prototype: HVX_Vector Q6_Vw_vinsert_VwR(HVX_Vector Vx, Word32 Rt)
...@@ -1623,9 +1332,7 @@...@@ -1623,9 +1332,7 @@
1623 ========================================================================== */1332 ========================================================================== */
16241333
1625#define Q6_Vw_vinsert_VwR(Vx,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vinsertwr)(Vx,Rt)1334#define Q6_Vw_vinsert_VwR(Vx,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vinsertwr)(Vx,Rt)
1626#endif /* __HEXAGON_ARCH___ >= 60 */
16271335
1628#if __HVX_ARCH__ >= 60
1629/* ==========================================================================1336/* ==========================================================================
1630 Assembly Syntax: Vd32=vlalign(Vu32,Vv32,Rt8)1337 Assembly Syntax: Vd32=vlalign(Vu32,Vv32,Rt8)
1631 C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)1338 C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -1634,9 +1341,7 @@...@@ -1634,9 +1341,7 @@
1634 ========================================================================== */1341 ========================================================================== */
16351342
1636#define Q6_V_vlalign_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignb)(Vu,Vv,Rt)1343#define Q6_V_vlalign_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignb)(Vu,Vv,Rt)
1637#endif /* __HEXAGON_ARCH___ >= 60 */
16381344
1639#if __HVX_ARCH__ >= 60
1640/* ==========================================================================1345/* ==========================================================================
1641 Assembly Syntax: Vd32=vlalign(Vu32,Vv32,#u3)1346 Assembly Syntax: Vd32=vlalign(Vu32,Vv32,#u3)
1642 C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3)1347 C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3)
...@@ -1645,9 +1350,7 @@...@@ -1645,9 +1350,7 @@
1645 ========================================================================== */1350 ========================================================================== */
16461351
1647#define Q6_V_vlalign_VVI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignbi)(Vu,Vv,Iu3)1352#define Q6_V_vlalign_VVI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignbi)(Vu,Vv,Iu3)
1648#endif /* __HEXAGON_ARCH___ >= 60 */
16491353
1650#if __HVX_ARCH__ >= 60
1651/* ==========================================================================1354/* ==========================================================================
1652 Assembly Syntax: Vd32.uh=vlsr(Vu32.uh,Rt32)1355 Assembly Syntax: Vd32.uh=vlsr(Vu32.uh,Rt32)
1653 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vlsr_VuhR(HVX_Vector Vu, Word32 Rt)1356 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vlsr_VuhR(HVX_Vector Vu, Word32 Rt)
...@@ -1656,9 +1359,7 @@...@@ -1656,9 +1359,7 @@
1656 ========================================================================== */1359 ========================================================================== */
16571360
1658#define Q6_Vuh_vlsr_VuhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrh)(Vu,Rt)1361#define Q6_Vuh_vlsr_VuhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrh)(Vu,Rt)
1659#endif /* __HEXAGON_ARCH___ >= 60 */
16601362
1661#if __HVX_ARCH__ >= 60
1662/* ==========================================================================1363/* ==========================================================================
1663 Assembly Syntax: Vd32.h=vlsr(Vu32.h,Vv32.h)1364 Assembly Syntax: Vd32.h=vlsr(Vu32.h,Vv32.h)
1664 C Intrinsic Prototype: HVX_Vector Q6_Vh_vlsr_VhVh(HVX_Vector Vu, HVX_Vector Vv)1365 C Intrinsic Prototype: HVX_Vector Q6_Vh_vlsr_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1667,9 +1368,7 @@...@@ -1667,9 +1368,7 @@
1667 ========================================================================== */1368 ========================================================================== */
16681369
1669#define Q6_Vh_vlsr_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrhv)(Vu,Vv)1370#define Q6_Vh_vlsr_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrhv)(Vu,Vv)
1670#endif /* __HEXAGON_ARCH___ >= 60 */
16711371
1672#if __HVX_ARCH__ >= 60
1673/* ==========================================================================1372/* ==========================================================================
1674 Assembly Syntax: Vd32.uw=vlsr(Vu32.uw,Rt32)1373 Assembly Syntax: Vd32.uw=vlsr(Vu32.uw,Rt32)
1675 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vlsr_VuwR(HVX_Vector Vu, Word32 Rt)1374 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vlsr_VuwR(HVX_Vector Vu, Word32 Rt)
...@@ -1678,9 +1377,7 @@...@@ -1678,9 +1377,7 @@
1678 ========================================================================== */1377 ========================================================================== */
16791378
1680#define Q6_Vuw_vlsr_VuwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrw)(Vu,Rt)1379#define Q6_Vuw_vlsr_VuwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrw)(Vu,Rt)
1681#endif /* __HEXAGON_ARCH___ >= 60 */
16821380
1683#if __HVX_ARCH__ >= 60
1684/* ==========================================================================1381/* ==========================================================================
1685 Assembly Syntax: Vd32.w=vlsr(Vu32.w,Vv32.w)1382 Assembly Syntax: Vd32.w=vlsr(Vu32.w,Vv32.w)
1686 C Intrinsic Prototype: HVX_Vector Q6_Vw_vlsr_VwVw(HVX_Vector Vu, HVX_Vector Vv)1383 C Intrinsic Prototype: HVX_Vector Q6_Vw_vlsr_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1689,9 +1386,7 @@...@@ -1689,9 +1386,7 @@
1689 ========================================================================== */1386 ========================================================================== */
16901387
1691#define Q6_Vw_vlsr_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrwv)(Vu,Vv)1388#define Q6_Vw_vlsr_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrwv)(Vu,Vv)
1692#endif /* __HEXAGON_ARCH___ >= 60 */
16931389
1694#if __HVX_ARCH__ >= 60
1695/* ==========================================================================1390/* ==========================================================================
1696 Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8)1391 Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8)
1697 C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)1392 C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -1700,9 +1395,7 @@...@@ -1700,9 +1395,7 @@
1700 ========================================================================== */1395 ========================================================================== */
17011396
1702#define Q6_Vb_vlut32_VbVbR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb)(Vu,Vv,Rt)1397#define Q6_Vb_vlut32_VbVbR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb)(Vu,Vv,Rt)
1703#endif /* __HEXAGON_ARCH___ >= 60 */
17041398
1705#if __HVX_ARCH__ >= 60
1706/* ==========================================================================1399/* ==========================================================================
1707 Assembly Syntax: Vx32.b|=vlut32(Vu32.b,Vv32.b,Rt8)1400 Assembly Syntax: Vx32.b|=vlut32(Vu32.b,Vv32.b,Rt8)
1708 C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32or_VbVbVbR(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)1401 C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32or_VbVbVbR(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -1711,9 +1404,7 @@...@@ -1711,9 +1404,7 @@
1711 ========================================================================== */1404 ========================================================================== */
17121405
1713#define Q6_Vb_vlut32or_VbVbVbR(Vx,Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracc)(Vx,Vu,Vv,Rt)1406#define Q6_Vb_vlut32or_VbVbVbR(Vx,Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracc)(Vx,Vu,Vv,Rt)
1714#endif /* __HEXAGON_ARCH___ >= 60 */
17151407
1716#if __HVX_ARCH__ >= 60
1717/* ==========================================================================1408/* ==========================================================================
1718 Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8)1409 Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8)
1719 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)1410 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -1722,9 +1413,7 @@...@@ -1722,9 +1413,7 @@
1722 ========================================================================== */1413 ========================================================================== */
17231414
1724#define Q6_Wh_vlut16_VbVhR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh)(Vu,Vv,Rt)1415#define Q6_Wh_vlut16_VbVhR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh)(Vu,Vv,Rt)
1725#endif /* __HEXAGON_ARCH___ >= 60 */
17261416
1727#if __HVX_ARCH__ >= 60
1728/* ==========================================================================1417/* ==========================================================================
1729 Assembly Syntax: Vxx32.h|=vlut16(Vu32.b,Vv32.h,Rt8)1418 Assembly Syntax: Vxx32.h|=vlut16(Vu32.b,Vv32.h,Rt8)
1730 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16or_WhVbVhR(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)1419 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16or_WhVbVhR(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -1733,9 +1422,7 @@...@@ -1733,9 +1422,7 @@
1733 ========================================================================== */1422 ========================================================================== */
17341423
1735#define Q6_Wh_vlut16or_WhVbVhR(Vxx,Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracc)(Vxx,Vu,Vv,Rt)1424#define Q6_Wh_vlut16or_WhVbVhR(Vxx,Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracc)(Vxx,Vu,Vv,Rt)
1736#endif /* __HEXAGON_ARCH___ >= 60 */
17371425
1738#if __HVX_ARCH__ >= 60
1739/* ==========================================================================1426/* ==========================================================================
1740 Assembly Syntax: Vd32.h=vmax(Vu32.h,Vv32.h)1427 Assembly Syntax: Vd32.h=vmax(Vu32.h,Vv32.h)
1741 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmax_VhVh(HVX_Vector Vu, HVX_Vector Vv)1428 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmax_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1744,9 +1431,7 @@...@@ -1744,9 +1431,7 @@
1744 ========================================================================== */1431 ========================================================================== */
17451432
1746#define Q6_Vh_vmax_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxh)(Vu,Vv)1433#define Q6_Vh_vmax_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxh)(Vu,Vv)
1747#endif /* __HEXAGON_ARCH___ >= 60 */
17481434
1749#if __HVX_ARCH__ >= 60
1750/* ==========================================================================1435/* ==========================================================================
1751 Assembly Syntax: Vd32.ub=vmax(Vu32.ub,Vv32.ub)1436 Assembly Syntax: Vd32.ub=vmax(Vu32.ub,Vv32.ub)
1752 C Intrinsic Prototype: HVX_Vector Q6_Vub_vmax_VubVub(HVX_Vector Vu, HVX_Vector Vv)1437 C Intrinsic Prototype: HVX_Vector Q6_Vub_vmax_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1755,9 +1440,7 @@...@@ -1755,9 +1440,7 @@
1755 ========================================================================== */1440 ========================================================================== */
17561441
1757#define Q6_Vub_vmax_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxub)(Vu,Vv)1442#define Q6_Vub_vmax_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxub)(Vu,Vv)
1758#endif /* __HEXAGON_ARCH___ >= 60 */
17591443
1760#if __HVX_ARCH__ >= 60
1761/* ==========================================================================1444/* ==========================================================================
1762 Assembly Syntax: Vd32.uh=vmax(Vu32.uh,Vv32.uh)1445 Assembly Syntax: Vd32.uh=vmax(Vu32.uh,Vv32.uh)
1763 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmax_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)1446 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmax_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1766,9 +1449,7 @@...@@ -1766,9 +1449,7 @@
1766 ========================================================================== */1449 ========================================================================== */
17671450
1768#define Q6_Vuh_vmax_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxuh)(Vu,Vv)1451#define Q6_Vuh_vmax_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxuh)(Vu,Vv)
1769#endif /* __HEXAGON_ARCH___ >= 60 */
17701452
1771#if __HVX_ARCH__ >= 60
1772/* ==========================================================================1453/* ==========================================================================
1773 Assembly Syntax: Vd32.w=vmax(Vu32.w,Vv32.w)1454 Assembly Syntax: Vd32.w=vmax(Vu32.w,Vv32.w)
1774 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmax_VwVw(HVX_Vector Vu, HVX_Vector Vv)1455 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmax_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1777,9 +1458,7 @@...@@ -1777,9 +1458,7 @@
1777 ========================================================================== */1458 ========================================================================== */
17781459
1779#define Q6_Vw_vmax_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxw)(Vu,Vv)1460#define Q6_Vw_vmax_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxw)(Vu,Vv)
1780#endif /* __HEXAGON_ARCH___ >= 60 */
17811461
1782#if __HVX_ARCH__ >= 60
1783/* ==========================================================================1462/* ==========================================================================
1784 Assembly Syntax: Vd32.h=vmin(Vu32.h,Vv32.h)1463 Assembly Syntax: Vd32.h=vmin(Vu32.h,Vv32.h)
1785 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmin_VhVh(HVX_Vector Vu, HVX_Vector Vv)1464 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmin_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1788,9 +1467,7 @@...@@ -1788,9 +1467,7 @@
1788 ========================================================================== */1467 ========================================================================== */
17891468
1790#define Q6_Vh_vmin_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminh)(Vu,Vv)1469#define Q6_Vh_vmin_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminh)(Vu,Vv)
1791#endif /* __HEXAGON_ARCH___ >= 60 */
17921470
1793#if __HVX_ARCH__ >= 60
1794/* ==========================================================================1471/* ==========================================================================
1795 Assembly Syntax: Vd32.ub=vmin(Vu32.ub,Vv32.ub)1472 Assembly Syntax: Vd32.ub=vmin(Vu32.ub,Vv32.ub)
1796 C Intrinsic Prototype: HVX_Vector Q6_Vub_vmin_VubVub(HVX_Vector Vu, HVX_Vector Vv)1473 C Intrinsic Prototype: HVX_Vector Q6_Vub_vmin_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1799,9 +1476,7 @@...@@ -1799,9 +1476,7 @@
1799 ========================================================================== */1476 ========================================================================== */
18001477
1801#define Q6_Vub_vmin_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminub)(Vu,Vv)1478#define Q6_Vub_vmin_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminub)(Vu,Vv)
1802#endif /* __HEXAGON_ARCH___ >= 60 */
18031479
1804#if __HVX_ARCH__ >= 60
1805/* ==========================================================================1480/* ==========================================================================
1806 Assembly Syntax: Vd32.uh=vmin(Vu32.uh,Vv32.uh)1481 Assembly Syntax: Vd32.uh=vmin(Vu32.uh,Vv32.uh)
1807 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmin_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)1482 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmin_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1810,9 +1485,7 @@...@@ -1810,9 +1485,7 @@
1810 ========================================================================== */1485 ========================================================================== */
18111486
1812#define Q6_Vuh_vmin_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminuh)(Vu,Vv)1487#define Q6_Vuh_vmin_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminuh)(Vu,Vv)
1813#endif /* __HEXAGON_ARCH___ >= 60 */
18141488
1815#if __HVX_ARCH__ >= 60
1816/* ==========================================================================1489/* ==========================================================================
1817 Assembly Syntax: Vd32.w=vmin(Vu32.w,Vv32.w)1490 Assembly Syntax: Vd32.w=vmin(Vu32.w,Vv32.w)
1818 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmin_VwVw(HVX_Vector Vu, HVX_Vector Vv)1491 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmin_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1821,9 +1494,7 @@...@@ -1821,9 +1494,7 @@
1821 ========================================================================== */1494 ========================================================================== */
18221495
1823#define Q6_Vw_vmin_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminw)(Vu,Vv)1496#define Q6_Vw_vmin_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminw)(Vu,Vv)
1824#endif /* __HEXAGON_ARCH___ >= 60 */
18251497
1826#if __HVX_ARCH__ >= 60
1827/* ==========================================================================1498/* ==========================================================================
1828 Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Rt32.b)1499 Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Rt32.b)
1829 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubRb(HVX_VectorPair Vuu, Word32 Rt)1500 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubRb(HVX_VectorPair Vuu, Word32 Rt)
...@@ -1832,9 +1503,7 @@...@@ -1832,9 +1503,7 @@
1832 ========================================================================== */1503 ========================================================================== */
18331504
1834#define Q6_Wh_vmpa_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus)(Vuu,Rt)1505#define Q6_Wh_vmpa_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus)(Vuu,Rt)
1835#endif /* __HEXAGON_ARCH___ >= 60 */
18361506
1837#if __HVX_ARCH__ >= 60
1838/* ==========================================================================1507/* ==========================================================================
1839 Assembly Syntax: Vxx32.h+=vmpa(Vuu32.ub,Rt32.b)1508 Assembly Syntax: Vxx32.h+=vmpa(Vuu32.ub,Rt32.b)
1840 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpaacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)1509 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpaacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -1843,9 +1512,7 @@...@@ -1843,9 +1512,7 @@
1843 ========================================================================== */1512 ========================================================================== */
18441513
1845#define Q6_Wh_vmpaacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus_acc)(Vxx,Vuu,Rt)1514#define Q6_Wh_vmpaacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus_acc)(Vxx,Vuu,Rt)
1846#endif /* __HEXAGON_ARCH___ >= 60 */
18471515
1848#if __HVX_ARCH__ >= 60
1849/* ==========================================================================1516/* ==========================================================================
1850 Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.b)1517 Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.b)
1851 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv)1518 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -1854,9 +1521,7 @@...@@ -1854,9 +1521,7 @@
1854 ========================================================================== */1521 ========================================================================== */
18551522
1856#define Q6_Wh_vmpa_WubWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabusv)(Vuu,Vvv)1523#define Q6_Wh_vmpa_WubWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabusv)(Vuu,Vvv)
1857#endif /* __HEXAGON_ARCH___ >= 60 */
18581524
1859#if __HVX_ARCH__ >= 60
1860/* ==========================================================================1525/* ==========================================================================
1861 Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.ub)1526 Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.ub)
1862 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWub(HVX_VectorPair Vuu, HVX_VectorPair Vvv)1527 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWub(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -1865,9 +1530,7 @@...@@ -1865,9 +1530,7 @@
1865 ========================================================================== */1530 ========================================================================== */
18661531
1867#define Q6_Wh_vmpa_WubWub(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuuv)(Vuu,Vvv)1532#define Q6_Wh_vmpa_WubWub(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuuv)(Vuu,Vvv)
1868#endif /* __HEXAGON_ARCH___ >= 60 */
18691533
1870#if __HVX_ARCH__ >= 60
1871/* ==========================================================================1534/* ==========================================================================
1872 Assembly Syntax: Vdd32.w=vmpa(Vuu32.h,Rt32.b)1535 Assembly Syntax: Vdd32.w=vmpa(Vuu32.h,Rt32.b)
1873 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpa_WhRb(HVX_VectorPair Vuu, Word32 Rt)1536 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpa_WhRb(HVX_VectorPair Vuu, Word32 Rt)
...@@ -1876,9 +1539,7 @@...@@ -1876,9 +1539,7 @@
1876 ========================================================================== */1539 ========================================================================== */
18771540
1878#define Q6_Ww_vmpa_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb)(Vuu,Rt)1541#define Q6_Ww_vmpa_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb)(Vuu,Rt)
1879#endif /* __HEXAGON_ARCH___ >= 60 */
18801542
1881#if __HVX_ARCH__ >= 60
1882/* ==========================================================================1543/* ==========================================================================
1883 Assembly Syntax: Vxx32.w+=vmpa(Vuu32.h,Rt32.b)1544 Assembly Syntax: Vxx32.w+=vmpa(Vuu32.h,Rt32.b)
1884 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpaacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)1545 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpaacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -1887,9 +1548,7 @@...@@ -1887,9 +1548,7 @@
1887 ========================================================================== */1548 ========================================================================== */
18881549
1889#define Q6_Ww_vmpaacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb_acc)(Vxx,Vuu,Rt)1550#define Q6_Ww_vmpaacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb_acc)(Vxx,Vuu,Rt)
1890#endif /* __HEXAGON_ARCH___ >= 60 */
18911551
1892#if __HVX_ARCH__ >= 60
1893/* ==========================================================================1552/* ==========================================================================
1894 Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Rt32.b)1553 Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Rt32.b)
1895 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubRb(HVX_Vector Vu, Word32 Rt)1554 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubRb(HVX_Vector Vu, Word32 Rt)
...@@ -1898,9 +1557,7 @@...@@ -1898,9 +1557,7 @@
1898 ========================================================================== */1557 ========================================================================== */
18991558
1900#define Q6_Wh_vmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus)(Vu,Rt)1559#define Q6_Wh_vmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus)(Vu,Rt)
1901#endif /* __HEXAGON_ARCH___ >= 60 */
19021560
1903#if __HVX_ARCH__ >= 60
1904/* ==========================================================================1561/* ==========================================================================
1905 Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Rt32.b)1562 Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Rt32.b)
1906 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubRb(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt)1563 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubRb(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt)
...@@ -1909,9 +1566,7 @@...@@ -1909,9 +1566,7 @@
1909 ========================================================================== */1566 ========================================================================== */
19101567
1911#define Q6_Wh_vmpyacc_WhVubRb(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus_acc)(Vxx,Vu,Rt)1568#define Q6_Wh_vmpyacc_WhVubRb(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus_acc)(Vxx,Vu,Rt)
1912#endif /* __HEXAGON_ARCH___ >= 60 */
19131569
1914#if __HVX_ARCH__ >= 60
1915/* ==========================================================================1570/* ==========================================================================
1916 Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Vv32.b)1571 Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Vv32.b)
1917 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv)1572 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1920,9 +1575,7 @@...@@ -1920,9 +1575,7 @@
1920 ========================================================================== */1575 ========================================================================== */
19211576
1922#define Q6_Wh_vmpy_VubVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv)(Vu,Vv)1577#define Q6_Wh_vmpy_VubVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv)(Vu,Vv)
1923#endif /* __HEXAGON_ARCH___ >= 60 */
19241578
1925#if __HVX_ARCH__ >= 60
1926/* ==========================================================================1579/* ==========================================================================
1927 Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Vv32.b)1580 Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Vv32.b)
1928 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)1581 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1931,9 +1584,7 @@...@@ -1931,9 +1584,7 @@
1931 ========================================================================== */1584 ========================================================================== */
19321585
1933#define Q6_Wh_vmpyacc_WhVubVb(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv_acc)(Vxx,Vu,Vv)1586#define Q6_Wh_vmpyacc_WhVubVb(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv_acc)(Vxx,Vu,Vv)
1934#endif /* __HEXAGON_ARCH___ >= 60 */
19351587
1936#if __HVX_ARCH__ >= 60
1937/* ==========================================================================1588/* ==========================================================================
1938 Assembly Syntax: Vdd32.h=vmpy(Vu32.b,Vv32.b)1589 Assembly Syntax: Vdd32.h=vmpy(Vu32.b,Vv32.b)
1939 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv)1590 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1942,9 +1593,7 @@...@@ -1942,9 +1593,7 @@
1942 ========================================================================== */1593 ========================================================================== */
19431594
1944#define Q6_Wh_vmpy_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv)(Vu,Vv)1595#define Q6_Wh_vmpy_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv)(Vu,Vv)
1945#endif /* __HEXAGON_ARCH___ >= 60 */
19461596
1947#if __HVX_ARCH__ >= 60
1948/* ==========================================================================1597/* ==========================================================================
1949 Assembly Syntax: Vxx32.h+=vmpy(Vu32.b,Vv32.b)1598 Assembly Syntax: Vxx32.h+=vmpy(Vu32.b,Vv32.b)
1950 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVbVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)1599 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVbVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -1953,9 +1602,7 @@...@@ -1953,9 +1602,7 @@
1953 ========================================================================== */1602 ========================================================================== */
19541603
1955#define Q6_Wh_vmpyacc_WhVbVb(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv_acc)(Vxx,Vu,Vv)1604#define Q6_Wh_vmpyacc_WhVbVb(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv_acc)(Vxx,Vu,Vv)
1956#endif /* __HEXAGON_ARCH___ >= 60 */
19571605
1958#if __HVX_ARCH__ >= 60
1959/* ==========================================================================1606/* ==========================================================================
1960 Assembly Syntax: Vd32.w=vmpye(Vu32.w,Vv32.uh)1607 Assembly Syntax: Vd32.w=vmpye(Vu32.w,Vv32.uh)
1961 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpye_VwVuh(HVX_Vector Vu, HVX_Vector Vv)1608 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpye_VwVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -1964,9 +1611,7 @@...@@ -1964,9 +1611,7 @@
1964 ========================================================================== */1611 ========================================================================== */
19651612
1966#define Q6_Vw_vmpye_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh)(Vu,Vv)1613#define Q6_Vw_vmpye_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh)(Vu,Vv)
1967#endif /* __HEXAGON_ARCH___ >= 60 */
19681614
1969#if __HVX_ARCH__ >= 60
1970/* ==========================================================================1615/* ==========================================================================
1971 Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Rt32.h)1616 Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Rt32.h)
1972 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhRh(HVX_Vector Vu, Word32 Rt)1617 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhRh(HVX_Vector Vu, Word32 Rt)
...@@ -1975,9 +1620,7 @@...@@ -1975,9 +1620,7 @@
1975 ========================================================================== */1620 ========================================================================== */
19761621
1977#define Q6_Ww_vmpy_VhRh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh)(Vu,Rt)1622#define Q6_Ww_vmpy_VhRh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh)(Vu,Rt)
1978#endif /* __HEXAGON_ARCH___ >= 60 */
19791623
1980#if __HVX_ARCH__ >= 60
1981/* ==========================================================================1624/* ==========================================================================
1982 Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Rt32.h):sat1625 Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Rt32.h):sat
1983 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhRh_sat(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt)1626 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhRh_sat(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt)
...@@ -1986,9 +1629,7 @@...@@ -1986,9 +1629,7 @@
1986 ========================================================================== */1629 ========================================================================== */
19871630
1988#define Q6_Ww_vmpyacc_WwVhRh_sat(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsat_acc)(Vxx,Vu,Rt)1631#define Q6_Ww_vmpyacc_WwVhRh_sat(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsat_acc)(Vxx,Vu,Rt)
1989#endif /* __HEXAGON_ARCH___ >= 60 */
19901632
1991#if __HVX_ARCH__ >= 60
1992/* ==========================================================================1633/* ==========================================================================
1993 Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:rnd:sat1634 Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:rnd:sat
1994 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_rnd_sat(HVX_Vector Vu, Word32 Rt)1635 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_rnd_sat(HVX_Vector Vu, Word32 Rt)
...@@ -1997,9 +1638,7 @@...@@ -1997,9 +1638,7 @@
1997 ========================================================================== */1638 ========================================================================== */
19981639
1999#define Q6_Vh_vmpy_VhRh_s1_rnd_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsrs)(Vu,Rt)1640#define Q6_Vh_vmpy_VhRh_s1_rnd_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsrs)(Vu,Rt)
2000#endif /* __HEXAGON_ARCH___ >= 60 */
20011641
2002#if __HVX_ARCH__ >= 60
2003/* ==========================================================================1642/* ==========================================================================
2004 Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:sat1643 Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:sat
2005 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_sat(HVX_Vector Vu, Word32 Rt)1644 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_sat(HVX_Vector Vu, Word32 Rt)
...@@ -2008,9 +1647,7 @@...@@ -2008,9 +1647,7 @@
2008 ========================================================================== */1647 ========================================================================== */
20091648
2010#define Q6_Vh_vmpy_VhRh_s1_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhss)(Vu,Rt)1649#define Q6_Vh_vmpy_VhRh_s1_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhss)(Vu,Rt)
2011#endif /* __HEXAGON_ARCH___ >= 60 */
20121650
2013#if __HVX_ARCH__ >= 60
2014/* ==========================================================================1651/* ==========================================================================
2015 Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.uh)1652 Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.uh)
2016 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVuh(HVX_Vector Vu, HVX_Vector Vv)1653 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2019,9 +1656,7 @@...@@ -2019,9 +1656,7 @@
2019 ========================================================================== */1656 ========================================================================== */
20201657
2021#define Q6_Ww_vmpy_VhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus)(Vu,Vv)1658#define Q6_Ww_vmpy_VhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus)(Vu,Vv)
2022#endif /* __HEXAGON_ARCH___ >= 60 */
20231659
2024#if __HVX_ARCH__ >= 60
2025/* ==========================================================================1660/* ==========================================================================
2026 Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.uh)1661 Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.uh)
2027 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)1662 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2030,9 +1665,7 @@...@@ -2030,9 +1665,7 @@
2030 ========================================================================== */1665 ========================================================================== */
20311666
2032#define Q6_Ww_vmpyacc_WwVhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus_acc)(Vxx,Vu,Vv)1667#define Q6_Ww_vmpyacc_WwVhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus_acc)(Vxx,Vu,Vv)
2033#endif /* __HEXAGON_ARCH___ >= 60 */
20341668
2035#if __HVX_ARCH__ >= 60
2036/* ==========================================================================1669/* ==========================================================================
2037 Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.h)1670 Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.h)
2038 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVh(HVX_Vector Vu, HVX_Vector Vv)1671 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2041,9 +1674,7 @@...@@ -2041,9 +1674,7 @@
2041 ========================================================================== */1674 ========================================================================== */
20421675
2043#define Q6_Ww_vmpy_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv)(Vu,Vv)1676#define Q6_Ww_vmpy_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv)(Vu,Vv)
2044#endif /* __HEXAGON_ARCH___ >= 60 */
20451677
2046#if __HVX_ARCH__ >= 60
2047/* ==========================================================================1678/* ==========================================================================
2048 Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.h)1679 Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.h)
2049 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)1680 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2052,9 +1683,7 @@...@@ -2052,9 +1683,7 @@
2052 ========================================================================== */1683 ========================================================================== */
20531684
2054#define Q6_Ww_vmpyacc_WwVhVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv_acc)(Vxx,Vu,Vv)1685#define Q6_Ww_vmpyacc_WwVhVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv_acc)(Vxx,Vu,Vv)
2055#endif /* __HEXAGON_ARCH___ >= 60 */
20561686
2057#if __HVX_ARCH__ >= 60
2058/* ==========================================================================1687/* ==========================================================================
2059 Assembly Syntax: Vd32.h=vmpy(Vu32.h,Vv32.h):<<1:rnd:sat1688 Assembly Syntax: Vd32.h=vmpy(Vu32.h,Vv32.h):<<1:rnd:sat
2060 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv)1689 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2063,9 +1692,7 @@...@@ -2063,9 +1692,7 @@
2063 ========================================================================== */1692 ========================================================================== */
20641693
2065#define Q6_Vh_vmpy_VhVh_s1_rnd_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhvsrs)(Vu,Vv)1694#define Q6_Vh_vmpy_VhVh_s1_rnd_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhvsrs)(Vu,Vv)
2066#endif /* __HEXAGON_ARCH___ >= 60 */
20671695
2068#if __HVX_ARCH__ >= 60
2069/* ==========================================================================1696/* ==========================================================================
2070 Assembly Syntax: Vd32.w=vmpyieo(Vu32.h,Vv32.h)1697 Assembly Syntax: Vd32.w=vmpyieo(Vu32.h,Vv32.h)
2071 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieo_VhVh(HVX_Vector Vu, HVX_Vector Vv)1698 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieo_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2074,9 +1701,7 @@...@@ -2074,9 +1701,7 @@
2074 ========================================================================== */1701 ========================================================================== */
20751702
2076#define Q6_Vw_vmpyieo_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyieoh)(Vu,Vv)1703#define Q6_Vw_vmpyieo_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyieoh)(Vu,Vv)
2077#endif /* __HEXAGON_ARCH___ >= 60 */
20781704
2079#if __HVX_ARCH__ >= 60
2080/* ==========================================================================1705/* ==========================================================================
2081 Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.h)1706 Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.h)
2082 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)1707 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2085,9 +1710,7 @@...@@ -2085,9 +1710,7 @@
2085 ========================================================================== */1710 ========================================================================== */
20861711
2087#define Q6_Vw_vmpyieacc_VwVwVh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewh_acc)(Vx,Vu,Vv)1712#define Q6_Vw_vmpyieacc_VwVwVh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewh_acc)(Vx,Vu,Vv)
2088#endif /* __HEXAGON_ARCH___ >= 60 */
20891713
2090#if __HVX_ARCH__ >= 60
2091/* ==========================================================================1714/* ==========================================================================
2092 Assembly Syntax: Vd32.w=vmpyie(Vu32.w,Vv32.uh)1715 Assembly Syntax: Vd32.w=vmpyie(Vu32.w,Vv32.uh)
2093 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyie_VwVuh(HVX_Vector Vu, HVX_Vector Vv)1716 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyie_VwVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2096,9 +1719,7 @@...@@ -2096,9 +1719,7 @@
2096 ========================================================================== */1719 ========================================================================== */
20971720
2098#define Q6_Vw_vmpyie_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh)(Vu,Vv)1721#define Q6_Vw_vmpyie_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh)(Vu,Vv)
2099#endif /* __HEXAGON_ARCH___ >= 60 */
21001722
2101#if __HVX_ARCH__ >= 60
2102/* ==========================================================================1723/* ==========================================================================
2103 Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.uh)1724 Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.uh)
2104 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVuh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)1725 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVuh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2107,9 +1728,7 @@...@@ -2107,9 +1728,7 @@
2107 ========================================================================== */1728 ========================================================================== */
21081729
2109#define Q6_Vw_vmpyieacc_VwVwVuh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh_acc)(Vx,Vu,Vv)1730#define Q6_Vw_vmpyieacc_VwVwVuh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh_acc)(Vx,Vu,Vv)
2110#endif /* __HEXAGON_ARCH___ >= 60 */
21111731
2112#if __HVX_ARCH__ >= 60
2113/* ==========================================================================1732/* ==========================================================================
2114 Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Vv32.h)1733 Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Vv32.h)
2115 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhVh(HVX_Vector Vu, HVX_Vector Vv)1734 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2118,9 +1737,7 @@...@@ -2118,9 +1737,7 @@
2118 ========================================================================== */1737 ========================================================================== */
21191738
2120#define Q6_Vh_vmpyi_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih)(Vu,Vv)1739#define Q6_Vh_vmpyi_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih)(Vu,Vv)
2121#endif /* __HEXAGON_ARCH___ >= 60 */
21221740
2123#if __HVX_ARCH__ >= 60
2124/* ==========================================================================1741/* ==========================================================================
2125 Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Vv32.h)1742 Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Vv32.h)
2126 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)1743 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2129,9 +1746,7 @@...@@ -2129,9 +1746,7 @@
2129 ========================================================================== */1746 ========================================================================== */
21301747
2131#define Q6_Vh_vmpyiacc_VhVhVh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih_acc)(Vx,Vu,Vv)1748#define Q6_Vh_vmpyiacc_VhVhVh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih_acc)(Vx,Vu,Vv)
2132#endif /* __HEXAGON_ARCH___ >= 60 */
21331749
2134#if __HVX_ARCH__ >= 60
2135/* ==========================================================================1750/* ==========================================================================
2136 Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Rt32.b)1751 Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Rt32.b)
2137 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhRb(HVX_Vector Vu, Word32 Rt)1752 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhRb(HVX_Vector Vu, Word32 Rt)
...@@ -2140,9 +1755,7 @@...@@ -2140,9 +1755,7 @@
2140 ========================================================================== */1755 ========================================================================== */
21411756
2142#define Q6_Vh_vmpyi_VhRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb)(Vu,Rt)1757#define Q6_Vh_vmpyi_VhRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb)(Vu,Rt)
2143#endif /* __HEXAGON_ARCH___ >= 60 */
21441758
2145#if __HVX_ARCH__ >= 60
2146/* ==========================================================================1759/* ==========================================================================
2147 Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Rt32.b)1760 Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Rt32.b)
2148 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)1761 C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -2151,9 +1764,7 @@...@@ -2151,9 +1764,7 @@
2151 ========================================================================== */1764 ========================================================================== */
21521765
2153#define Q6_Vh_vmpyiacc_VhVhRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb_acc)(Vx,Vu,Rt)1766#define Q6_Vh_vmpyiacc_VhVhRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb_acc)(Vx,Vu,Rt)
2154#endif /* __HEXAGON_ARCH___ >= 60 */
21551767
2156#if __HVX_ARCH__ >= 60
2157/* ==========================================================================1768/* ==========================================================================
2158 Assembly Syntax: Vd32.w=vmpyio(Vu32.w,Vv32.h)1769 Assembly Syntax: Vd32.w=vmpyio(Vu32.w,Vv32.h)
2159 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyio_VwVh(HVX_Vector Vu, HVX_Vector Vv)1770 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyio_VwVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2162,9 +1773,7 @@...@@ -2162,9 +1773,7 @@
2162 ========================================================================== */1773 ========================================================================== */
21631774
2164#define Q6_Vw_vmpyio_VwVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiowh)(Vu,Vv)1775#define Q6_Vw_vmpyio_VwVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiowh)(Vu,Vv)
2165#endif /* __HEXAGON_ARCH___ >= 60 */
21661776
2167#if __HVX_ARCH__ >= 60
2168/* ==========================================================================1777/* ==========================================================================
2169 Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.b)1778 Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.b)
2170 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRb(HVX_Vector Vu, Word32 Rt)1779 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRb(HVX_Vector Vu, Word32 Rt)
...@@ -2173,9 +1782,7 @@...@@ -2173,9 +1782,7 @@
2173 ========================================================================== */1782 ========================================================================== */
21741783
2175#define Q6_Vw_vmpyi_VwRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb)(Vu,Rt)1784#define Q6_Vw_vmpyi_VwRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb)(Vu,Rt)
2176#endif /* __HEXAGON_ARCH___ >= 60 */
21771785
2178#if __HVX_ARCH__ >= 60
2179/* ==========================================================================1786/* ==========================================================================
2180 Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.b)1787 Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.b)
2181 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)1788 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -2184,9 +1791,7 @@...@@ -2184,9 +1791,7 @@
2184 ========================================================================== */1791 ========================================================================== */
21851792
2186#define Q6_Vw_vmpyiacc_VwVwRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb_acc)(Vx,Vu,Rt)1793#define Q6_Vw_vmpyiacc_VwVwRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb_acc)(Vx,Vu,Rt)
2187#endif /* __HEXAGON_ARCH___ >= 60 */
21881794
2189#if __HVX_ARCH__ >= 60
2190/* ==========================================================================1795/* ==========================================================================
2191 Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.h)1796 Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.h)
2192 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRh(HVX_Vector Vu, Word32 Rt)1797 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRh(HVX_Vector Vu, Word32 Rt)
...@@ -2195,9 +1800,7 @@...@@ -2195,9 +1800,7 @@
2195 ========================================================================== */1800 ========================================================================== */
21961801
2197#define Q6_Vw_vmpyi_VwRh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh)(Vu,Rt)1802#define Q6_Vw_vmpyi_VwRh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh)(Vu,Rt)
2198#endif /* __HEXAGON_ARCH___ >= 60 */
21991803
2200#if __HVX_ARCH__ >= 60
2201/* ==========================================================================1804/* ==========================================================================
2202 Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.h)1805 Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.h)
2203 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRh(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)1806 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRh(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -2206,9 +1809,7 @@...@@ -2206,9 +1809,7 @@
2206 ========================================================================== */1809 ========================================================================== */
22071810
2208#define Q6_Vw_vmpyiacc_VwVwRh(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh_acc)(Vx,Vu,Rt)1811#define Q6_Vw_vmpyiacc_VwVwRh(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh_acc)(Vx,Vu,Rt)
2209#endif /* __HEXAGON_ARCH___ >= 60 */
22101812
2211#if __HVX_ARCH__ >= 60
2212/* ==========================================================================1813/* ==========================================================================
2213 Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:sat1814 Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:sat
2214 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_sat(HVX_Vector Vu, HVX_Vector Vv)1815 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2217,9 +1818,7 @@...@@ -2217,9 +1818,7 @@
2217 ========================================================================== */1818 ========================================================================== */
22181819
2219#define Q6_Vw_vmpyo_VwVh_s1_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh)(Vu,Vv)1820#define Q6_Vw_vmpyo_VwVh_s1_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh)(Vu,Vv)
2220#endif /* __HEXAGON_ARCH___ >= 60 */
22211821
2222#if __HVX_ARCH__ >= 60
2223/* ==========================================================================1822/* ==========================================================================
2224 Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat1823 Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat
2225 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv)1824 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2228,9 +1827,7 @@...@@ -2228,9 +1827,7 @@
2228 ========================================================================== */1827 ========================================================================== */
22291828
2230#define Q6_Vw_vmpyo_VwVh_s1_rnd_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd)(Vu,Vv)1829#define Q6_Vw_vmpyo_VwVh_s1_rnd_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd)(Vu,Vv)
2231#endif /* __HEXAGON_ARCH___ >= 60 */
22321830
2233#if __HVX_ARCH__ >= 60
2234/* ==========================================================================1831/* ==========================================================================
2235 Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat:shift1832 Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat:shift
2236 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)1833 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2239,9 +1836,7 @@...@@ -2239,9 +1836,7 @@
2239 ========================================================================== */1836 ========================================================================== */
22401837
2241#define Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd_sacc)(Vx,Vu,Vv)1838#define Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd_sacc)(Vx,Vu,Vv)
2242#endif /* __HEXAGON_ARCH___ >= 60 */
22431839
2244#if __HVX_ARCH__ >= 60
2245/* ==========================================================================1840/* ==========================================================================
2246 Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:sat:shift1841 Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:sat:shift
2247 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)1842 C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2250,9 +1845,7 @@...@@ -2250,9 +1845,7 @@
2250 ========================================================================== */1845 ========================================================================== */
22511846
2252#define Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_sacc)(Vx,Vu,Vv)1847#define Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_sacc)(Vx,Vu,Vv)
2253#endif /* __HEXAGON_ARCH___ >= 60 */
22541848
2255#if __HVX_ARCH__ >= 60
2256/* ==========================================================================1849/* ==========================================================================
2257 Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Rt32.ub)1850 Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Rt32.ub)
2258 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubRub(HVX_Vector Vu, Word32 Rt)1851 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubRub(HVX_Vector Vu, Word32 Rt)
...@@ -2261,9 +1854,7 @@...@@ -2261,9 +1854,7 @@
2261 ========================================================================== */1854 ========================================================================== */
22621855
2263#define Q6_Wuh_vmpy_VubRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub)(Vu,Rt)1856#define Q6_Wuh_vmpy_VubRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub)(Vu,Rt)
2264#endif /* __HEXAGON_ARCH___ >= 60 */
22651857
2266#if __HVX_ARCH__ >= 60
2267/* ==========================================================================1858/* ==========================================================================
2268 Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Rt32.ub)1859 Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Rt32.ub)
2269 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubRub(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt)1860 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubRub(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt)
...@@ -2272,9 +1863,7 @@...@@ -2272,9 +1863,7 @@
2272 ========================================================================== */1863 ========================================================================== */
22731864
2274#define Q6_Wuh_vmpyacc_WuhVubRub(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub_acc)(Vxx,Vu,Rt)1865#define Q6_Wuh_vmpyacc_WuhVubRub(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub_acc)(Vxx,Vu,Rt)
2275#endif /* __HEXAGON_ARCH___ >= 60 */
22761866
2277#if __HVX_ARCH__ >= 60
2278/* ==========================================================================1867/* ==========================================================================
2279 Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Vv32.ub)1868 Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Vv32.ub)
2280 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv)1869 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2283,9 +1872,7 @@...@@ -2283,9 +1872,7 @@
2283 ========================================================================== */1872 ========================================================================== */
22841873
2285#define Q6_Wuh_vmpy_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv)(Vu,Vv)1874#define Q6_Wuh_vmpy_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv)(Vu,Vv)
2286#endif /* __HEXAGON_ARCH___ >= 60 */
22871875
2288#if __HVX_ARCH__ >= 60
2289/* ==========================================================================1876/* ==========================================================================
2290 Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Vv32.ub)1877 Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Vv32.ub)
2291 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubVub(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)1878 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubVub(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2294,9 +1881,7 @@...@@ -2294,9 +1881,7 @@
2294 ========================================================================== */1881 ========================================================================== */
22951882
2296#define Q6_Wuh_vmpyacc_WuhVubVub(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv_acc)(Vxx,Vu,Vv)1883#define Q6_Wuh_vmpyacc_WuhVubVub(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv_acc)(Vxx,Vu,Vv)
2297#endif /* __HEXAGON_ARCH___ >= 60 */
22981884
2299#if __HVX_ARCH__ >= 60
2300/* ==========================================================================1885/* ==========================================================================
2301 Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Rt32.uh)1886 Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Rt32.uh)
2302 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhRuh(HVX_Vector Vu, Word32 Rt)1887 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhRuh(HVX_Vector Vu, Word32 Rt)
...@@ -2305,9 +1890,7 @@...@@ -2305,9 +1890,7 @@
2305 ========================================================================== */1890 ========================================================================== */
23061891
2307#define Q6_Wuw_vmpy_VuhRuh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh)(Vu,Rt)1892#define Q6_Wuw_vmpy_VuhRuh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh)(Vu,Rt)
2308#endif /* __HEXAGON_ARCH___ >= 60 */
23091893
2310#if __HVX_ARCH__ >= 60
2311/* ==========================================================================1894/* ==========================================================================
2312 Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Rt32.uh)1895 Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Rt32.uh)
2313 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhRuh(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt)1896 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhRuh(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt)
...@@ -2316,9 +1899,7 @@...@@ -2316,9 +1899,7 @@
2316 ========================================================================== */1899 ========================================================================== */
23171900
2318#define Q6_Wuw_vmpyacc_WuwVuhRuh(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh_acc)(Vxx,Vu,Rt)1901#define Q6_Wuw_vmpyacc_WuwVuhRuh(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh_acc)(Vxx,Vu,Rt)
2319#endif /* __HEXAGON_ARCH___ >= 60 */
23201902
2321#if __HVX_ARCH__ >= 60
2322/* ==========================================================================1903/* ==========================================================================
2323 Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Vv32.uh)1904 Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Vv32.uh)
2324 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)1905 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2327,9 +1908,7 @@...@@ -2327,9 +1908,7 @@
2327 ========================================================================== */1908 ========================================================================== */
23281909
2329#define Q6_Wuw_vmpy_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv)(Vu,Vv)1910#define Q6_Wuw_vmpy_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv)(Vu,Vv)
2330#endif /* __HEXAGON_ARCH___ >= 60 */
23311911
2332#if __HVX_ARCH__ >= 60
2333/* ==========================================================================1912/* ==========================================================================
2334 Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Vv32.uh)1913 Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Vv32.uh)
2335 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)1914 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2338,9 +1917,7 @@...@@ -2338,9 +1917,7 @@
2338 ========================================================================== */1917 ========================================================================== */
23391918
2340#define Q6_Wuw_vmpyacc_WuwVuhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv_acc)(Vxx,Vu,Vv)1919#define Q6_Wuw_vmpyacc_WuwVuhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv_acc)(Vxx,Vu,Vv)
2341#endif /* __HEXAGON_ARCH___ >= 60 */
23421920
2343#if __HVX_ARCH__ >= 60
2344/* ==========================================================================1921/* ==========================================================================
2345 Assembly Syntax: Vd32=vmux(Qt4,Vu32,Vv32)1922 Assembly Syntax: Vd32=vmux(Qt4,Vu32,Vv32)
2346 C Intrinsic Prototype: HVX_Vector Q6_V_vmux_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv)1923 C Intrinsic Prototype: HVX_Vector Q6_V_vmux_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2349,9 +1926,7 @@...@@ -2349,9 +1926,7 @@
2349 ========================================================================== */1926 ========================================================================== */
23501927
2351#define Q6_V_vmux_QVV(Qt,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmux)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1),Vu,Vv)1928#define Q6_V_vmux_QVV(Qt,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmux)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1),Vu,Vv)
2352#endif /* __HEXAGON_ARCH___ >= 60 */
23531929
2354#if __HVX_ARCH__ >= 60
2355/* ==========================================================================1930/* ==========================================================================
2356 Assembly Syntax: Vd32.h=vnavg(Vu32.h,Vv32.h)1931 Assembly Syntax: Vd32.h=vnavg(Vu32.h,Vv32.h)
2357 C Intrinsic Prototype: HVX_Vector Q6_Vh_vnavg_VhVh(HVX_Vector Vu, HVX_Vector Vv)1932 C Intrinsic Prototype: HVX_Vector Q6_Vh_vnavg_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2360,9 +1935,7 @@...@@ -2360,9 +1935,7 @@
2360 ========================================================================== */1935 ========================================================================== */
23611936
2362#define Q6_Vh_vnavg_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgh)(Vu,Vv)1937#define Q6_Vh_vnavg_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgh)(Vu,Vv)
2363#endif /* __HEXAGON_ARCH___ >= 60 */
23641938
2365#if __HVX_ARCH__ >= 60
2366/* ==========================================================================1939/* ==========================================================================
2367 Assembly Syntax: Vd32.b=vnavg(Vu32.ub,Vv32.ub)1940 Assembly Syntax: Vd32.b=vnavg(Vu32.ub,Vv32.ub)
2368 C Intrinsic Prototype: HVX_Vector Q6_Vb_vnavg_VubVub(HVX_Vector Vu, HVX_Vector Vv)1941 C Intrinsic Prototype: HVX_Vector Q6_Vb_vnavg_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2371,9 +1944,7 @@...@@ -2371,9 +1944,7 @@
2371 ========================================================================== */1944 ========================================================================== */
23721945
2373#define Q6_Vb_vnavg_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgub)(Vu,Vv)1946#define Q6_Vb_vnavg_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgub)(Vu,Vv)
2374#endif /* __HEXAGON_ARCH___ >= 60 */
23751947
2376#if __HVX_ARCH__ >= 60
2377/* ==========================================================================1948/* ==========================================================================
2378 Assembly Syntax: Vd32.w=vnavg(Vu32.w,Vv32.w)1949 Assembly Syntax: Vd32.w=vnavg(Vu32.w,Vv32.w)
2379 C Intrinsic Prototype: HVX_Vector Q6_Vw_vnavg_VwVw(HVX_Vector Vu, HVX_Vector Vv)1950 C Intrinsic Prototype: HVX_Vector Q6_Vw_vnavg_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2382,9 +1953,7 @@...@@ -2382,9 +1953,7 @@
2382 ========================================================================== */1953 ========================================================================== */
23831954
2384#define Q6_Vw_vnavg_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgw)(Vu,Vv)1955#define Q6_Vw_vnavg_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgw)(Vu,Vv)
2385#endif /* __HEXAGON_ARCH___ >= 60 */
23861956
2387#if __HVX_ARCH__ >= 60
2388/* ==========================================================================1957/* ==========================================================================
2389 Assembly Syntax: Vd32.h=vnormamt(Vu32.h)1958 Assembly Syntax: Vd32.h=vnormamt(Vu32.h)
2390 C Intrinsic Prototype: HVX_Vector Q6_Vh_vnormamt_Vh(HVX_Vector Vu)1959 C Intrinsic Prototype: HVX_Vector Q6_Vh_vnormamt_Vh(HVX_Vector Vu)
...@@ -2393,9 +1962,7 @@...@@ -2393,9 +1962,7 @@
2393 ========================================================================== */1962 ========================================================================== */
23941963
2395#define Q6_Vh_vnormamt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamth)(Vu)1964#define Q6_Vh_vnormamt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamth)(Vu)
2396#endif /* __HEXAGON_ARCH___ >= 60 */
23971965
2398#if __HVX_ARCH__ >= 60
2399/* ==========================================================================1966/* ==========================================================================
2400 Assembly Syntax: Vd32.w=vnormamt(Vu32.w)1967 Assembly Syntax: Vd32.w=vnormamt(Vu32.w)
2401 C Intrinsic Prototype: HVX_Vector Q6_Vw_vnormamt_Vw(HVX_Vector Vu)1968 C Intrinsic Prototype: HVX_Vector Q6_Vw_vnormamt_Vw(HVX_Vector Vu)
...@@ -2404,9 +1971,7 @@...@@ -2404,9 +1971,7 @@
2404 ========================================================================== */1971 ========================================================================== */
24051972
2406#define Q6_Vw_vnormamt_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamtw)(Vu)1973#define Q6_Vw_vnormamt_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamtw)(Vu)
2407#endif /* __HEXAGON_ARCH___ >= 60 */
24081974
2409#if __HVX_ARCH__ >= 60
2410/* ==========================================================================1975/* ==========================================================================
2411 Assembly Syntax: Vd32=vnot(Vu32)1976 Assembly Syntax: Vd32=vnot(Vu32)
2412 C Intrinsic Prototype: HVX_Vector Q6_V_vnot_V(HVX_Vector Vu)1977 C Intrinsic Prototype: HVX_Vector Q6_V_vnot_V(HVX_Vector Vu)
...@@ -2415,9 +1980,7 @@...@@ -2415,9 +1980,7 @@
2415 ========================================================================== */1980 ========================================================================== */
24161981
2417#define Q6_V_vnot_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnot)(Vu)1982#define Q6_V_vnot_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnot)(Vu)
2418#endif /* __HEXAGON_ARCH___ >= 60 */
24191983
2420#if __HVX_ARCH__ >= 60
2421/* ==========================================================================1984/* ==========================================================================
2422 Assembly Syntax: Vd32=vor(Vu32,Vv32)1985 Assembly Syntax: Vd32=vor(Vu32,Vv32)
2423 C Intrinsic Prototype: HVX_Vector Q6_V_vor_VV(HVX_Vector Vu, HVX_Vector Vv)1986 C Intrinsic Prototype: HVX_Vector Q6_V_vor_VV(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2426,9 +1989,7 @@...@@ -2426,9 +1989,7 @@
2426 ========================================================================== */1989 ========================================================================== */
24271990
2428#define Q6_V_vor_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vor)(Vu,Vv)1991#define Q6_V_vor_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vor)(Vu,Vv)
2429#endif /* __HEXAGON_ARCH___ >= 60 */
24301992
2431#if __HVX_ARCH__ >= 60
2432/* ==========================================================================1993/* ==========================================================================
2433 Assembly Syntax: Vd32.b=vpacke(Vu32.h,Vv32.h)1994 Assembly Syntax: Vd32.b=vpacke(Vu32.h,Vv32.h)
2434 C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacke_VhVh(HVX_Vector Vu, HVX_Vector Vv)1995 C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacke_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2437,9 +1998,7 @@...@@ -2437,9 +1998,7 @@
2437 ========================================================================== */1998 ========================================================================== */
24381999
2439#define Q6_Vb_vpacke_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeb)(Vu,Vv)2000#define Q6_Vb_vpacke_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeb)(Vu,Vv)
2440#endif /* __HEXAGON_ARCH___ >= 60 */
24412001
2442#if __HVX_ARCH__ >= 60
2443/* ==========================================================================2002/* ==========================================================================
2444 Assembly Syntax: Vd32.h=vpacke(Vu32.w,Vv32.w)2003 Assembly Syntax: Vd32.h=vpacke(Vu32.w,Vv32.w)
2445 C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacke_VwVw(HVX_Vector Vu, HVX_Vector Vv)2004 C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacke_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2448,9 +2007,7 @@...@@ -2448,9 +2007,7 @@
2448 ========================================================================== */2007 ========================================================================== */
24492008
2450#define Q6_Vh_vpacke_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeh)(Vu,Vv)2009#define Q6_Vh_vpacke_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeh)(Vu,Vv)
2451#endif /* __HEXAGON_ARCH___ >= 60 */
24522010
2453#if __HVX_ARCH__ >= 60
2454/* ==========================================================================2011/* ==========================================================================
2455 Assembly Syntax: Vd32.b=vpack(Vu32.h,Vv32.h):sat2012 Assembly Syntax: Vd32.b=vpack(Vu32.h,Vv32.h):sat
2456 C Intrinsic Prototype: HVX_Vector Q6_Vb_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)2013 C Intrinsic Prototype: HVX_Vector Q6_Vb_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2459,9 +2016,7 @@...@@ -2459,9 +2016,7 @@
2459 ========================================================================== */2016 ========================================================================== */
24602017
2461#define Q6_Vb_vpack_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhb_sat)(Vu,Vv)2018#define Q6_Vb_vpack_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhb_sat)(Vu,Vv)
2462#endif /* __HEXAGON_ARCH___ >= 60 */
24632019
2464#if __HVX_ARCH__ >= 60
2465/* ==========================================================================2020/* ==========================================================================
2466 Assembly Syntax: Vd32.ub=vpack(Vu32.h,Vv32.h):sat2021 Assembly Syntax: Vd32.ub=vpack(Vu32.h,Vv32.h):sat
2467 C Intrinsic Prototype: HVX_Vector Q6_Vub_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)2022 C Intrinsic Prototype: HVX_Vector Q6_Vub_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2470,9 +2025,7 @@...@@ -2470,9 +2025,7 @@
2470 ========================================================================== */2025 ========================================================================== */
24712026
2472#define Q6_Vub_vpack_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhub_sat)(Vu,Vv)2027#define Q6_Vub_vpack_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhub_sat)(Vu,Vv)
2473#endif /* __HEXAGON_ARCH___ >= 60 */
24742028
2475#if __HVX_ARCH__ >= 60
2476/* ==========================================================================2029/* ==========================================================================
2477 Assembly Syntax: Vd32.b=vpacko(Vu32.h,Vv32.h)2030 Assembly Syntax: Vd32.b=vpacko(Vu32.h,Vv32.h)
2478 C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacko_VhVh(HVX_Vector Vu, HVX_Vector Vv)2031 C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacko_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2481,9 +2034,7 @@...@@ -2481,9 +2034,7 @@
2481 ========================================================================== */2034 ========================================================================== */
24822035
2483#define Q6_Vb_vpacko_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackob)(Vu,Vv)2036#define Q6_Vb_vpacko_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackob)(Vu,Vv)
2484#endif /* __HEXAGON_ARCH___ >= 60 */
24852037
2486#if __HVX_ARCH__ >= 60
2487/* ==========================================================================2038/* ==========================================================================
2488 Assembly Syntax: Vd32.h=vpacko(Vu32.w,Vv32.w)2039 Assembly Syntax: Vd32.h=vpacko(Vu32.w,Vv32.w)
2489 C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacko_VwVw(HVX_Vector Vu, HVX_Vector Vv)2040 C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacko_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2492,9 +2043,7 @@...@@ -2492,9 +2043,7 @@
2492 ========================================================================== */2043 ========================================================================== */
24932044
2494#define Q6_Vh_vpacko_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackoh)(Vu,Vv)2045#define Q6_Vh_vpacko_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackoh)(Vu,Vv)
2495#endif /* __HEXAGON_ARCH___ >= 60 */
24962046
2497#if __HVX_ARCH__ >= 60
2498/* ==========================================================================2047/* ==========================================================================
2499 Assembly Syntax: Vd32.h=vpack(Vu32.w,Vv32.w):sat2048 Assembly Syntax: Vd32.h=vpack(Vu32.w,Vv32.w):sat
2500 C Intrinsic Prototype: HVX_Vector Q6_Vh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)2049 C Intrinsic Prototype: HVX_Vector Q6_Vh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2503,9 +2052,7 @@...@@ -2503,9 +2052,7 @@
2503 ========================================================================== */2052 ========================================================================== */
25042053
2505#define Q6_Vh_vpack_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwh_sat)(Vu,Vv)2054#define Q6_Vh_vpack_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwh_sat)(Vu,Vv)
2506#endif /* __HEXAGON_ARCH___ >= 60 */
25072055
2508#if __HVX_ARCH__ >= 60
2509/* ==========================================================================2056/* ==========================================================================
2510 Assembly Syntax: Vd32.uh=vpack(Vu32.w,Vv32.w):sat2057 Assembly Syntax: Vd32.uh=vpack(Vu32.w,Vv32.w):sat
2511 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)2058 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2514,9 +2061,7 @@...@@ -2514,9 +2061,7 @@
2514 ========================================================================== */2061 ========================================================================== */
25152062
2516#define Q6_Vuh_vpack_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwuh_sat)(Vu,Vv)2063#define Q6_Vuh_vpack_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwuh_sat)(Vu,Vv)
2517#endif /* __HEXAGON_ARCH___ >= 60 */
25182064
2519#if __HVX_ARCH__ >= 60
2520/* ==========================================================================2065/* ==========================================================================
2521 Assembly Syntax: Vd32.h=vpopcount(Vu32.h)2066 Assembly Syntax: Vd32.h=vpopcount(Vu32.h)
2522 C Intrinsic Prototype: HVX_Vector Q6_Vh_vpopcount_Vh(HVX_Vector Vu)2067 C Intrinsic Prototype: HVX_Vector Q6_Vh_vpopcount_Vh(HVX_Vector Vu)
...@@ -2525,9 +2070,7 @@...@@ -2525,9 +2070,7 @@
2525 ========================================================================== */2070 ========================================================================== */
25262071
2527#define Q6_Vh_vpopcount_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpopcounth)(Vu)2072#define Q6_Vh_vpopcount_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpopcounth)(Vu)
2528#endif /* __HEXAGON_ARCH___ >= 60 */
25292073
2530#if __HVX_ARCH__ >= 60
2531/* ==========================================================================2074/* ==========================================================================
2532 Assembly Syntax: Vd32=vrdelta(Vu32,Vv32)2075 Assembly Syntax: Vd32=vrdelta(Vu32,Vv32)
2533 C Intrinsic Prototype: HVX_Vector Q6_V_vrdelta_VV(HVX_Vector Vu, HVX_Vector Vv)2076 C Intrinsic Prototype: HVX_Vector Q6_V_vrdelta_VV(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2536,9 +2079,7 @@...@@ -2536,9 +2079,7 @@
2536 ========================================================================== */2079 ========================================================================== */
25372080
2538#define Q6_V_vrdelta_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrdelta)(Vu,Vv)2081#define Q6_V_vrdelta_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrdelta)(Vu,Vv)
2539#endif /* __HEXAGON_ARCH___ >= 60 */
25402082
2541#if __HVX_ARCH__ >= 60
2542/* ==========================================================================2083/* ==========================================================================
2543 Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Rt32.b)2084 Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Rt32.b)
2544 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubRb(HVX_Vector Vu, Word32 Rt)2085 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubRb(HVX_Vector Vu, Word32 Rt)
...@@ -2547,9 +2088,7 @@...@@ -2547,9 +2088,7 @@
2547 ========================================================================== */2088 ========================================================================== */
25482089
2549#define Q6_Vw_vrmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus)(Vu,Rt)2090#define Q6_Vw_vrmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus)(Vu,Rt)
2550#endif /* __HEXAGON_ARCH___ >= 60 */
25512091
2552#if __HVX_ARCH__ >= 60
2553/* ==========================================================================2092/* ==========================================================================
2554 Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Rt32.b)2093 Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Rt32.b)
2555 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)2094 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -2558,9 +2097,7 @@...@@ -2558,9 +2097,7 @@
2558 ========================================================================== */2097 ========================================================================== */
25592098
2560#define Q6_Vw_vrmpyacc_VwVubRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus_acc)(Vx,Vu,Rt)2099#define Q6_Vw_vrmpyacc_VwVubRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus_acc)(Vx,Vu,Rt)
2561#endif /* __HEXAGON_ARCH___ >= 60 */
25622100
2563#if __HVX_ARCH__ >= 60
2564/* ==========================================================================2101/* ==========================================================================
2565 Assembly Syntax: Vdd32.w=vrmpy(Vuu32.ub,Rt32.b,#u1)2102 Assembly Syntax: Vdd32.w=vrmpy(Vuu32.ub,Rt32.b,#u1)
2566 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpy_WubRbI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)2103 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpy_WubRbI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)
...@@ -2569,9 +2106,7 @@...@@ -2569,9 +2106,7 @@
2569 ========================================================================== */2106 ========================================================================== */
25702107
2571#define Q6_Ww_vrmpy_WubRbI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi)(Vuu,Rt,Iu1)2108#define Q6_Ww_vrmpy_WubRbI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi)(Vuu,Rt,Iu1)
2572#endif /* __HEXAGON_ARCH___ >= 60 */
25732109
2574#if __HVX_ARCH__ >= 60
2575/* ==========================================================================2110/* ==========================================================================
2576 Assembly Syntax: Vxx32.w+=vrmpy(Vuu32.ub,Rt32.b,#u1)2111 Assembly Syntax: Vxx32.w+=vrmpy(Vuu32.ub,Rt32.b,#u1)
2577 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpyacc_WwWubRbI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)2112 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpyacc_WwWubRbI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)
...@@ -2580,9 +2115,7 @@...@@ -2580,9 +2115,7 @@
2580 ========================================================================== */2115 ========================================================================== */
25812116
2582#define Q6_Ww_vrmpyacc_WwWubRbI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi_acc)(Vxx,Vuu,Rt,Iu1)2117#define Q6_Ww_vrmpyacc_WwWubRbI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi_acc)(Vxx,Vuu,Rt,Iu1)
2583#endif /* __HEXAGON_ARCH___ >= 60 */
25842118
2585#if __HVX_ARCH__ >= 60
2586/* ==========================================================================2119/* ==========================================================================
2587 Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Vv32.b)2120 Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Vv32.b)
2588 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv)2121 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2591,9 +2124,7 @@...@@ -2591,9 +2124,7 @@
2591 ========================================================================== */2124 ========================================================================== */
25922125
2593#define Q6_Vw_vrmpy_VubVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv)(Vu,Vv)2126#define Q6_Vw_vrmpy_VubVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv)(Vu,Vv)
2594#endif /* __HEXAGON_ARCH___ >= 60 */
25952127
2596#if __HVX_ARCH__ >= 60
2597/* ==========================================================================2128/* ==========================================================================
2598 Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Vv32.b)2129 Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Vv32.b)
2599 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)2130 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2602,9 +2133,7 @@...@@ -2602,9 +2133,7 @@
2602 ========================================================================== */2133 ========================================================================== */
26032134
2604#define Q6_Vw_vrmpyacc_VwVubVb(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv_acc)(Vx,Vu,Vv)2135#define Q6_Vw_vrmpyacc_VwVubVb(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv_acc)(Vx,Vu,Vv)
2605#endif /* __HEXAGON_ARCH___ >= 60 */
26062136
2607#if __HVX_ARCH__ >= 60
2608/* ==========================================================================2137/* ==========================================================================
2609 Assembly Syntax: Vd32.w=vrmpy(Vu32.b,Vv32.b)2138 Assembly Syntax: Vd32.w=vrmpy(Vu32.b,Vv32.b)
2610 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv)2139 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2613,9 +2142,7 @@...@@ -2613,9 +2142,7 @@
2613 ========================================================================== */2142 ========================================================================== */
26142143
2615#define Q6_Vw_vrmpy_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv)(Vu,Vv)2144#define Q6_Vw_vrmpy_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv)(Vu,Vv)
2616#endif /* __HEXAGON_ARCH___ >= 60 */
26172145
2618#if __HVX_ARCH__ >= 60
2619/* ==========================================================================2146/* ==========================================================================
2620 Assembly Syntax: Vx32.w+=vrmpy(Vu32.b,Vv32.b)2147 Assembly Syntax: Vx32.w+=vrmpy(Vu32.b,Vv32.b)
2621 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVbVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)2148 C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVbVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2624,9 +2151,7 @@...@@ -2624,9 +2151,7 @@
2624 ========================================================================== */2151 ========================================================================== */
26252152
2626#define Q6_Vw_vrmpyacc_VwVbVb(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv_acc)(Vx,Vu,Vv)2153#define Q6_Vw_vrmpyacc_VwVbVb(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv_acc)(Vx,Vu,Vv)
2627#endif /* __HEXAGON_ARCH___ >= 60 */
26282154
2629#if __HVX_ARCH__ >= 60
2630/* ==========================================================================2155/* ==========================================================================
2631 Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Rt32.ub)2156 Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Rt32.ub)
2632 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubRub(HVX_Vector Vu, Word32 Rt)2157 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubRub(HVX_Vector Vu, Word32 Rt)
...@@ -2635,9 +2160,7 @@...@@ -2635,9 +2160,7 @@
2635 ========================================================================== */2160 ========================================================================== */
26362161
2637#define Q6_Vuw_vrmpy_VubRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub)(Vu,Rt)2162#define Q6_Vuw_vrmpy_VubRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub)(Vu,Rt)
2638#endif /* __HEXAGON_ARCH___ >= 60 */
26392163
2640#if __HVX_ARCH__ >= 60
2641/* ==========================================================================2164/* ==========================================================================
2642 Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Rt32.ub)2165 Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Rt32.ub)
2643 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubRub(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)2166 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubRub(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt)
...@@ -2646,9 +2169,7 @@...@@ -2646,9 +2169,7 @@
2646 ========================================================================== */2169 ========================================================================== */
26472170
2648#define Q6_Vuw_vrmpyacc_VuwVubRub(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub_acc)(Vx,Vu,Rt)2171#define Q6_Vuw_vrmpyacc_VuwVubRub(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub_acc)(Vx,Vu,Rt)
2649#endif /* __HEXAGON_ARCH___ >= 60 */
26502172
2651#if __HVX_ARCH__ >= 60
2652/* ==========================================================================2173/* ==========================================================================
2653 Assembly Syntax: Vdd32.uw=vrmpy(Vuu32.ub,Rt32.ub,#u1)2174 Assembly Syntax: Vdd32.uw=vrmpy(Vuu32.ub,Rt32.ub,#u1)
2654 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpy_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)2175 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpy_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)
...@@ -2657,9 +2178,7 @@...@@ -2657,9 +2178,7 @@
2657 ========================================================================== */2178 ========================================================================== */
26582179
2659#define Q6_Wuw_vrmpy_WubRubI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi)(Vuu,Rt,Iu1)2180#define Q6_Wuw_vrmpy_WubRubI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi)(Vuu,Rt,Iu1)
2660#endif /* __HEXAGON_ARCH___ >= 60 */
26612181
2662#if __HVX_ARCH__ >= 60
2663/* ==========================================================================2182/* ==========================================================================
2664 Assembly Syntax: Vxx32.uw+=vrmpy(Vuu32.ub,Rt32.ub,#u1)2183 Assembly Syntax: Vxx32.uw+=vrmpy(Vuu32.ub,Rt32.ub,#u1)
2665 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpyacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)2184 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpyacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)
...@@ -2668,9 +2187,7 @@...@@ -2668,9 +2187,7 @@
2668 ========================================================================== */2187 ========================================================================== */
26692188
2670#define Q6_Wuw_vrmpyacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi_acc)(Vxx,Vuu,Rt,Iu1)2189#define Q6_Wuw_vrmpyacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi_acc)(Vxx,Vuu,Rt,Iu1)
2671#endif /* __HEXAGON_ARCH___ >= 60 */
26722190
2673#if __HVX_ARCH__ >= 60
2674/* ==========================================================================2191/* ==========================================================================
2675 Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Vv32.ub)2192 Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Vv32.ub)
2676 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv)2193 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2679,9 +2196,7 @@...@@ -2679,9 +2196,7 @@
2679 ========================================================================== */2196 ========================================================================== */
26802197
2681#define Q6_Vuw_vrmpy_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv)(Vu,Vv)2198#define Q6_Vuw_vrmpy_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv)(Vu,Vv)
2682#endif /* __HEXAGON_ARCH___ >= 60 */
26832199
2684#if __HVX_ARCH__ >= 60
2685/* ==========================================================================2200/* ==========================================================================
2686 Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Vv32.ub)2201 Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Vv32.ub)
2687 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubVub(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)2202 C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubVub(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -2690,9 +2205,7 @@...@@ -2690,9 +2205,7 @@
2690 ========================================================================== */2205 ========================================================================== */
26912206
2692#define Q6_Vuw_vrmpyacc_VuwVubVub(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv_acc)(Vx,Vu,Vv)2207#define Q6_Vuw_vrmpyacc_VuwVubVub(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv_acc)(Vx,Vu,Vv)
2693#endif /* __HEXAGON_ARCH___ >= 60 */
26942208
2695#if __HVX_ARCH__ >= 60
2696/* ==========================================================================2209/* ==========================================================================
2697 Assembly Syntax: Vd32=vror(Vu32,Rt32)2210 Assembly Syntax: Vd32=vror(Vu32,Rt32)
2698 C Intrinsic Prototype: HVX_Vector Q6_V_vror_VR(HVX_Vector Vu, Word32 Rt)2211 C Intrinsic Prototype: HVX_Vector Q6_V_vror_VR(HVX_Vector Vu, Word32 Rt)
...@@ -2701,9 +2214,7 @@...@@ -2701,9 +2214,7 @@
2701 ========================================================================== */2214 ========================================================================== */
27022215
2703#define Q6_V_vror_VR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vror)(Vu,Rt)2216#define Q6_V_vror_VR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vror)(Vu,Rt)
2704#endif /* __HEXAGON_ARCH___ >= 60 */
27052217
2706#if __HVX_ARCH__ >= 60
2707/* ==========================================================================2218/* ==========================================================================
2708 Assembly Syntax: Vd32.b=vround(Vu32.h,Vv32.h):sat2219 Assembly Syntax: Vd32.b=vround(Vu32.h,Vv32.h):sat
2709 C Intrinsic Prototype: HVX_Vector Q6_Vb_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)2220 C Intrinsic Prototype: HVX_Vector Q6_Vb_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2712,9 +2223,7 @@...@@ -2712,9 +2223,7 @@
2712 ========================================================================== */2223 ========================================================================== */
27132224
2714#define Q6_Vb_vround_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhb)(Vu,Vv)2225#define Q6_Vb_vround_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhb)(Vu,Vv)
2715#endif /* __HEXAGON_ARCH___ >= 60 */
27162226
2717#if __HVX_ARCH__ >= 60
2718/* ==========================================================================2227/* ==========================================================================
2719 Assembly Syntax: Vd32.ub=vround(Vu32.h,Vv32.h):sat2228 Assembly Syntax: Vd32.ub=vround(Vu32.h,Vv32.h):sat
2720 C Intrinsic Prototype: HVX_Vector Q6_Vub_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)2229 C Intrinsic Prototype: HVX_Vector Q6_Vub_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2723,9 +2232,7 @@...@@ -2723,9 +2232,7 @@
2723 ========================================================================== */2232 ========================================================================== */
27242233
2725#define Q6_Vub_vround_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhub)(Vu,Vv)2234#define Q6_Vub_vround_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhub)(Vu,Vv)
2726#endif /* __HEXAGON_ARCH___ >= 60 */
27272235
2728#if __HVX_ARCH__ >= 60
2729/* ==========================================================================2236/* ==========================================================================
2730 Assembly Syntax: Vd32.h=vround(Vu32.w,Vv32.w):sat2237 Assembly Syntax: Vd32.h=vround(Vu32.w,Vv32.w):sat
2731 C Intrinsic Prototype: HVX_Vector Q6_Vh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)2238 C Intrinsic Prototype: HVX_Vector Q6_Vh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2734,9 +2241,7 @@...@@ -2734,9 +2241,7 @@
2734 ========================================================================== */2241 ========================================================================== */
27352242
2736#define Q6_Vh_vround_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwh)(Vu,Vv)2243#define Q6_Vh_vround_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwh)(Vu,Vv)
2737#endif /* __HEXAGON_ARCH___ >= 60 */
27382244
2739#if __HVX_ARCH__ >= 60
2740/* ==========================================================================2245/* ==========================================================================
2741 Assembly Syntax: Vd32.uh=vround(Vu32.w,Vv32.w):sat2246 Assembly Syntax: Vd32.uh=vround(Vu32.w,Vv32.w):sat
2742 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)2247 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2745,9 +2250,7 @@...@@ -2745,9 +2250,7 @@
2745 ========================================================================== */2250 ========================================================================== */
27462251
2747#define Q6_Vuh_vround_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwuh)(Vu,Vv)2252#define Q6_Vuh_vround_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwuh)(Vu,Vv)
2748#endif /* __HEXAGON_ARCH___ >= 60 */
27492253
2750#if __HVX_ARCH__ >= 60
2751/* ==========================================================================2254/* ==========================================================================
2752 Assembly Syntax: Vdd32.uw=vrsad(Vuu32.ub,Rt32.ub,#u1)2255 Assembly Syntax: Vdd32.uw=vrsad(Vuu32.ub,Rt32.ub,#u1)
2753 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsad_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)2256 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsad_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)
...@@ -2756,9 +2259,7 @@...@@ -2756,9 +2259,7 @@
2756 ========================================================================== */2259 ========================================================================== */
27572260
2758#define Q6_Wuw_vrsad_WubRubI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi)(Vuu,Rt,Iu1)2261#define Q6_Wuw_vrsad_WubRubI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi)(Vuu,Rt,Iu1)
2759#endif /* __HEXAGON_ARCH___ >= 60 */
27602262
2761#if __HVX_ARCH__ >= 60
2762/* ==========================================================================2263/* ==========================================================================
2763 Assembly Syntax: Vxx32.uw+=vrsad(Vuu32.ub,Rt32.ub,#u1)2264 Assembly Syntax: Vxx32.uw+=vrsad(Vuu32.ub,Rt32.ub,#u1)
2764 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsadacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)2265 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsadacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1)
...@@ -2767,9 +2268,7 @@...@@ -2767,9 +2268,7 @@
2767 ========================================================================== */2268 ========================================================================== */
27682269
2769#define Q6_Wuw_vrsadacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi_acc)(Vxx,Vuu,Rt,Iu1)2270#define Q6_Wuw_vrsadacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi_acc)(Vxx,Vuu,Rt,Iu1)
2770#endif /* __HEXAGON_ARCH___ >= 60 */
27712271
2772#if __HVX_ARCH__ >= 60
2773/* ==========================================================================2272/* ==========================================================================
2774 Assembly Syntax: Vd32.ub=vsat(Vu32.h,Vv32.h)2273 Assembly Syntax: Vd32.ub=vsat(Vu32.h,Vv32.h)
2775 C Intrinsic Prototype: HVX_Vector Q6_Vub_vsat_VhVh(HVX_Vector Vu, HVX_Vector Vv)2274 C Intrinsic Prototype: HVX_Vector Q6_Vub_vsat_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2778,9 +2277,7 @@...@@ -2778,9 +2277,7 @@
2778 ========================================================================== */2277 ========================================================================== */
27792278
2780#define Q6_Vub_vsat_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsathub)(Vu,Vv)2279#define Q6_Vub_vsat_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsathub)(Vu,Vv)
2781#endif /* __HEXAGON_ARCH___ >= 60 */
27822280
2783#if __HVX_ARCH__ >= 60
2784/* ==========================================================================2281/* ==========================================================================
2785 Assembly Syntax: Vd32.h=vsat(Vu32.w,Vv32.w)2282 Assembly Syntax: Vd32.h=vsat(Vu32.w,Vv32.w)
2786 C Intrinsic Prototype: HVX_Vector Q6_Vh_vsat_VwVw(HVX_Vector Vu, HVX_Vector Vv)2283 C Intrinsic Prototype: HVX_Vector Q6_Vh_vsat_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2789,9 +2286,7 @@...@@ -2789,9 +2286,7 @@
2789 ========================================================================== */2286 ========================================================================== */
27902287
2791#define Q6_Vh_vsat_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatwh)(Vu,Vv)2288#define Q6_Vh_vsat_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatwh)(Vu,Vv)
2792#endif /* __HEXAGON_ARCH___ >= 60 */
27932289
2794#if __HVX_ARCH__ >= 60
2795/* ==========================================================================2290/* ==========================================================================
2796 Assembly Syntax: Vdd32.h=vsxt(Vu32.b)2291 Assembly Syntax: Vdd32.h=vsxt(Vu32.b)
2797 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsxt_Vb(HVX_Vector Vu)2292 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsxt_Vb(HVX_Vector Vu)
...@@ -2800,9 +2295,7 @@...@@ -2800,9 +2295,7 @@
2800 ========================================================================== */2295 ========================================================================== */
28012296
2802#define Q6_Wh_vsxt_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsb)(Vu)2297#define Q6_Wh_vsxt_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsb)(Vu)
2803#endif /* __HEXAGON_ARCH___ >= 60 */
28042298
2805#if __HVX_ARCH__ >= 60
2806/* ==========================================================================2299/* ==========================================================================
2807 Assembly Syntax: Vdd32.w=vsxt(Vu32.h)2300 Assembly Syntax: Vdd32.w=vsxt(Vu32.h)
2808 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsxt_Vh(HVX_Vector Vu)2301 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsxt_Vh(HVX_Vector Vu)
...@@ -2811,9 +2304,7 @@...@@ -2811,9 +2304,7 @@
2811 ========================================================================== */2304 ========================================================================== */
28122305
2813#define Q6_Ww_vsxt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsh)(Vu)2306#define Q6_Ww_vsxt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsh)(Vu)
2814#endif /* __HEXAGON_ARCH___ >= 60 */
28152307
2816#if __HVX_ARCH__ >= 60
2817/* ==========================================================================2308/* ==========================================================================
2818 Assembly Syntax: Vd32.h=vshuffe(Vu32.h,Vv32.h)2309 Assembly Syntax: Vd32.h=vshuffe(Vu32.h,Vv32.h)
2819 C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffe_VhVh(HVX_Vector Vu, HVX_Vector Vv)2310 C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffe_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2822,9 +2313,7 @@...@@ -2822,9 +2313,7 @@
2822 ========================================================================== */2313 ========================================================================== */
28232314
2824#define Q6_Vh_vshuffe_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufeh)(Vu,Vv)2315#define Q6_Vh_vshuffe_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufeh)(Vu,Vv)
2825#endif /* __HEXAGON_ARCH___ >= 60 */
28262316
2827#if __HVX_ARCH__ >= 60
2828/* ==========================================================================2317/* ==========================================================================
2829 Assembly Syntax: Vd32.b=vshuff(Vu32.b)2318 Assembly Syntax: Vd32.b=vshuff(Vu32.b)
2830 C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuff_Vb(HVX_Vector Vu)2319 C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuff_Vb(HVX_Vector Vu)
...@@ -2833,9 +2322,7 @@...@@ -2833,9 +2322,7 @@
2833 ========================================================================== */2322 ========================================================================== */
28342323
2835#define Q6_Vb_vshuff_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffb)(Vu)2324#define Q6_Vb_vshuff_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffb)(Vu)
2836#endif /* __HEXAGON_ARCH___ >= 60 */
28372325
2838#if __HVX_ARCH__ >= 60
2839/* ==========================================================================2326/* ==========================================================================
2840 Assembly Syntax: Vd32.b=vshuffe(Vu32.b,Vv32.b)2327 Assembly Syntax: Vd32.b=vshuffe(Vu32.b,Vv32.b)
2841 C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffe_VbVb(HVX_Vector Vu, HVX_Vector Vv)2328 C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffe_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2844,9 +2331,7 @@...@@ -2844,9 +2331,7 @@
2844 ========================================================================== */2331 ========================================================================== */
28452332
2846#define Q6_Vb_vshuffe_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffeb)(Vu,Vv)2333#define Q6_Vb_vshuffe_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffeb)(Vu,Vv)
2847#endif /* __HEXAGON_ARCH___ >= 60 */
28482334
2849#if __HVX_ARCH__ >= 60
2850/* ==========================================================================2335/* ==========================================================================
2851 Assembly Syntax: Vd32.h=vshuff(Vu32.h)2336 Assembly Syntax: Vd32.h=vshuff(Vu32.h)
2852 C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuff_Vh(HVX_Vector Vu)2337 C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuff_Vh(HVX_Vector Vu)
...@@ -2855,9 +2340,7 @@...@@ -2855,9 +2340,7 @@
2855 ========================================================================== */2340 ========================================================================== */
28562341
2857#define Q6_Vh_vshuff_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffh)(Vu)2342#define Q6_Vh_vshuff_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffh)(Vu)
2858#endif /* __HEXAGON_ARCH___ >= 60 */
28592343
2860#if __HVX_ARCH__ >= 60
2861/* ==========================================================================2344/* ==========================================================================
2862 Assembly Syntax: Vd32.b=vshuffo(Vu32.b,Vv32.b)2345 Assembly Syntax: Vd32.b=vshuffo(Vu32.b,Vv32.b)
2863 C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffo_VbVb(HVX_Vector Vu, HVX_Vector Vv)2346 C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffo_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2866,9 +2349,7 @@...@@ -2866,9 +2349,7 @@
2866 ========================================================================== */2349 ========================================================================== */
28672350
2868#define Q6_Vb_vshuffo_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffob)(Vu,Vv)2351#define Q6_Vb_vshuffo_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffob)(Vu,Vv)
2869#endif /* __HEXAGON_ARCH___ >= 60 */
28702352
2871#if __HVX_ARCH__ >= 60
2872/* ==========================================================================2353/* ==========================================================================
2873 Assembly Syntax: Vdd32=vshuff(Vu32,Vv32,Rt8)2354 Assembly Syntax: Vdd32=vshuff(Vu32,Vv32,Rt8)
2874 C Intrinsic Prototype: HVX_VectorPair Q6_W_vshuff_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)2355 C Intrinsic Prototype: HVX_VectorPair Q6_W_vshuff_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt)
...@@ -2877,9 +2358,7 @@...@@ -2877,9 +2358,7 @@
2877 ========================================================================== */2358 ========================================================================== */
28782359
2879#define Q6_W_vshuff_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffvdd)(Vu,Vv,Rt)2360#define Q6_W_vshuff_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffvdd)(Vu,Vv,Rt)
2880#endif /* __HEXAGON_ARCH___ >= 60 */
28812361
2882#if __HVX_ARCH__ >= 60
2883/* ==========================================================================2362/* ==========================================================================
2884 Assembly Syntax: Vdd32.b=vshuffoe(Vu32.b,Vv32.b)2363 Assembly Syntax: Vdd32.b=vshuffoe(Vu32.b,Vv32.b)
2885 C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vshuffoe_VbVb(HVX_Vector Vu, HVX_Vector Vv)2364 C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vshuffoe_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2888,9 +2367,7 @@...@@ -2888,9 +2367,7 @@
2888 ========================================================================== */2367 ========================================================================== */
28892368
2890#define Q6_Wb_vshuffoe_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeb)(Vu,Vv)2369#define Q6_Wb_vshuffoe_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeb)(Vu,Vv)
2891#endif /* __HEXAGON_ARCH___ >= 60 */
28922370
2893#if __HVX_ARCH__ >= 60
2894/* ==========================================================================2371/* ==========================================================================
2895 Assembly Syntax: Vdd32.h=vshuffoe(Vu32.h,Vv32.h)2372 Assembly Syntax: Vdd32.h=vshuffoe(Vu32.h,Vv32.h)
2896 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vshuffoe_VhVh(HVX_Vector Vu, HVX_Vector Vv)2373 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vshuffoe_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2899,9 +2376,7 @@...@@ -2899,9 +2376,7 @@
2899 ========================================================================== */2376 ========================================================================== */
29002377
2901#define Q6_Wh_vshuffoe_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeh)(Vu,Vv)2378#define Q6_Wh_vshuffoe_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeh)(Vu,Vv)
2902#endif /* __HEXAGON_ARCH___ >= 60 */
29032379
2904#if __HVX_ARCH__ >= 60
2905/* ==========================================================================2380/* ==========================================================================
2906 Assembly Syntax: Vd32.h=vshuffo(Vu32.h,Vv32.h)2381 Assembly Syntax: Vd32.h=vshuffo(Vu32.h,Vv32.h)
2907 C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffo_VhVh(HVX_Vector Vu, HVX_Vector Vv)2382 C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffo_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2910,9 +2385,7 @@...@@ -2910,9 +2385,7 @@
2910 ========================================================================== */2385 ========================================================================== */
29112386
2912#define Q6_Vh_vshuffo_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoh)(Vu,Vv)2387#define Q6_Vh_vshuffo_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoh)(Vu,Vv)
2913#endif /* __HEXAGON_ARCH___ >= 60 */
29142388
2915#if __HVX_ARCH__ >= 60
2916/* ==========================================================================2389/* ==========================================================================
2917 Assembly Syntax: Vd32.b=vsub(Vu32.b,Vv32.b)2390 Assembly Syntax: Vd32.b=vsub(Vu32.b,Vv32.b)
2918 C Intrinsic Prototype: HVX_Vector Q6_Vb_vsub_VbVb(HVX_Vector Vu, HVX_Vector Vv)2391 C Intrinsic Prototype: HVX_Vector Q6_Vb_vsub_VbVb(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2921,9 +2394,7 @@...@@ -2921,9 +2394,7 @@
2921 ========================================================================== */2394 ========================================================================== */
29222395
2923#define Q6_Vb_vsub_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb)(Vu,Vv)2396#define Q6_Vb_vsub_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb)(Vu,Vv)
2924#endif /* __HEXAGON_ARCH___ >= 60 */
29252397
2926#if __HVX_ARCH__ >= 60
2927/* ==========================================================================2398/* ==========================================================================
2928 Assembly Syntax: Vdd32.b=vsub(Vuu32.b,Vvv32.b)2399 Assembly Syntax: Vdd32.b=vsub(Vuu32.b,Vvv32.b)
2929 C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vsub_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv)2400 C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vsub_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -2932,9 +2403,7 @@...@@ -2932,9 +2403,7 @@
2932 ========================================================================== */2403 ========================================================================== */
29332404
2934#define Q6_Wb_vsub_WbWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb_dv)(Vuu,Vvv)2405#define Q6_Wb_vsub_WbWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb_dv)(Vuu,Vvv)
2935#endif /* __HEXAGON_ARCH___ >= 60 */
29362406
2937#if __HVX_ARCH__ >= 60
2938/* ==========================================================================2407/* ==========================================================================
2939 Assembly Syntax: if (!Qv4) Vx32.b-=Vu32.b2408 Assembly Syntax: if (!Qv4) Vx32.b-=Vu32.b
2940 C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)2409 C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -2943,9 +2412,7 @@...@@ -2943,9 +2412,7 @@
2943 ========================================================================== */2412 ========================================================================== */
29442413
2945#define Q6_Vb_condnac_QnVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)2414#define Q6_Vb_condnac_QnVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
2946#endif /* __HEXAGON_ARCH___ >= 60 */
29472415
2948#if __HVX_ARCH__ >= 60
2949/* ==========================================================================2416/* ==========================================================================
2950 Assembly Syntax: if (Qv4) Vx32.b-=Vu32.b2417 Assembly Syntax: if (Qv4) Vx32.b-=Vu32.b
2951 C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)2418 C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -2954,9 +2421,7 @@...@@ -2954,9 +2421,7 @@
2954 ========================================================================== */2421 ========================================================================== */
29552422
2956#define Q6_Vb_condnac_QVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)2423#define Q6_Vb_condnac_QVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
2957#endif /* __HEXAGON_ARCH___ >= 60 */
29582424
2959#if __HVX_ARCH__ >= 60
2960/* ==========================================================================2425/* ==========================================================================
2961 Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h)2426 Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h)
2962 C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv)2427 C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -2965,9 +2430,7 @@...@@ -2965,9 +2430,7 @@
2965 ========================================================================== */2430 ========================================================================== */
29662431
2967#define Q6_Vh_vsub_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh)(Vu,Vv)2432#define Q6_Vh_vsub_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh)(Vu,Vv)
2968#endif /* __HEXAGON_ARCH___ >= 60 */
29692433
2970#if __HVX_ARCH__ >= 60
2971/* ==========================================================================2434/* ==========================================================================
2972 Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h)2435 Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h)
2973 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv)2436 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -2976,9 +2439,7 @@...@@ -2976,9 +2439,7 @@
2976 ========================================================================== */2439 ========================================================================== */
29772440
2978#define Q6_Wh_vsub_WhWh(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh_dv)(Vuu,Vvv)2441#define Q6_Wh_vsub_WhWh(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh_dv)(Vuu,Vvv)
2979#endif /* __HEXAGON_ARCH___ >= 60 */
29802442
2981#if __HVX_ARCH__ >= 60
2982/* ==========================================================================2443/* ==========================================================================
2983 Assembly Syntax: if (!Qv4) Vx32.h-=Vu32.h2444 Assembly Syntax: if (!Qv4) Vx32.h-=Vu32.h
2984 C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)2445 C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -2987,9 +2448,7 @@...@@ -2987,9 +2448,7 @@
2987 ========================================================================== */2448 ========================================================================== */
29882449
2989#define Q6_Vh_condnac_QnVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)2450#define Q6_Vh_condnac_QnVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
2990#endif /* __HEXAGON_ARCH___ >= 60 */
29912451
2992#if __HVX_ARCH__ >= 60
2993/* ==========================================================================2452/* ==========================================================================
2994 Assembly Syntax: if (Qv4) Vx32.h-=Vu32.h2453 Assembly Syntax: if (Qv4) Vx32.h-=Vu32.h
2995 C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)2454 C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -2998,9 +2457,7 @@...@@ -2998,9 +2457,7 @@
2998 ========================================================================== */2457 ========================================================================== */
29992458
3000#define Q6_Vh_condnac_QVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)2459#define Q6_Vh_condnac_QVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
3001#endif /* __HEXAGON_ARCH___ >= 60 */
30022460
3003#if __HVX_ARCH__ >= 60
3004/* ==========================================================================2461/* ==========================================================================
3005 Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h):sat2462 Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h):sat
3006 C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)2463 C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3009,9 +2466,7 @@...@@ -3009,9 +2466,7 @@
3009 ========================================================================== */2466 ========================================================================== */
30102467
3011#define Q6_Vh_vsub_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat)(Vu,Vv)2468#define Q6_Vh_vsub_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat)(Vu,Vv)
3012#endif /* __HEXAGON_ARCH___ >= 60 */
30132469
3014#if __HVX_ARCH__ >= 60
3015/* ==========================================================================2470/* ==========================================================================
3016 Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h):sat2471 Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h):sat
3017 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)2472 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -3020,9 +2475,7 @@...@@ -3020,9 +2475,7 @@
3020 ========================================================================== */2475 ========================================================================== */
30212476
3022#define Q6_Wh_vsub_WhWh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat_dv)(Vuu,Vvv)2477#define Q6_Wh_vsub_WhWh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat_dv)(Vuu,Vvv)
3023#endif /* __HEXAGON_ARCH___ >= 60 */
30242478
3025#if __HVX_ARCH__ >= 60
3026/* ==========================================================================2479/* ==========================================================================
3027 Assembly Syntax: Vdd32.w=vsub(Vu32.h,Vv32.h)2480 Assembly Syntax: Vdd32.w=vsub(Vu32.h,Vv32.h)
3028 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv)2481 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3031,9 +2484,7 @@...@@ -3031,9 +2484,7 @@
3031 ========================================================================== */2484 ========================================================================== */
30322485
3033#define Q6_Ww_vsub_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhw)(Vu,Vv)2486#define Q6_Ww_vsub_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhw)(Vu,Vv)
3034#endif /* __HEXAGON_ARCH___ >= 60 */
30352487
3036#if __HVX_ARCH__ >= 60
3037/* ==========================================================================2488/* ==========================================================================
3038 Assembly Syntax: Vdd32.h=vsub(Vu32.ub,Vv32.ub)2489 Assembly Syntax: Vdd32.h=vsub(Vu32.ub,Vv32.ub)
3039 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_VubVub(HVX_Vector Vu, HVX_Vector Vv)2490 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_VubVub(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3042,9 +2493,7 @@...@@ -3042,9 +2493,7 @@
3042 ========================================================================== */2493 ========================================================================== */
30432494
3044#define Q6_Wh_vsub_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububh)(Vu,Vv)2495#define Q6_Wh_vsub_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububh)(Vu,Vv)
3045#endif /* __HEXAGON_ARCH___ >= 60 */
30462496
3047#if __HVX_ARCH__ >= 60
3048/* ==========================================================================2497/* ==========================================================================
3049 Assembly Syntax: Vd32.ub=vsub(Vu32.ub,Vv32.ub):sat2498 Assembly Syntax: Vd32.ub=vsub(Vu32.ub,Vv32.ub):sat
3050 C Intrinsic Prototype: HVX_Vector Q6_Vub_vsub_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv)2499 C Intrinsic Prototype: HVX_Vector Q6_Vub_vsub_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3053,9 +2502,7 @@...@@ -3053,9 +2502,7 @@
3053 ========================================================================== */2502 ========================================================================== */
30542503
3055#define Q6_Vub_vsub_VubVub_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat)(Vu,Vv)2504#define Q6_Vub_vsub_VubVub_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat)(Vu,Vv)
3056#endif /* __HEXAGON_ARCH___ >= 60 */
30572505
3058#if __HVX_ARCH__ >= 60
3059/* ==========================================================================2506/* ==========================================================================
3060 Assembly Syntax: Vdd32.ub=vsub(Vuu32.ub,Vvv32.ub):sat2507 Assembly Syntax: Vdd32.ub=vsub(Vuu32.ub,Vvv32.ub):sat
3061 C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vsub_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)2508 C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vsub_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -3064,9 +2511,7 @@...@@ -3064,9 +2511,7 @@
3064 ========================================================================== */2511 ========================================================================== */
30652512
3066#define Q6_Wub_vsub_WubWub_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat_dv)(Vuu,Vvv)2513#define Q6_Wub_vsub_WubWub_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat_dv)(Vuu,Vvv)
3067#endif /* __HEXAGON_ARCH___ >= 60 */
30682514
3069#if __HVX_ARCH__ >= 60
3070/* ==========================================================================2515/* ==========================================================================
3071 Assembly Syntax: Vd32.uh=vsub(Vu32.uh,Vv32.uh):sat2516 Assembly Syntax: Vd32.uh=vsub(Vu32.uh,Vv32.uh):sat
3072 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vsub_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv)2517 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vsub_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3075,9 +2520,7 @@...@@ -3075,9 +2520,7 @@
3075 ========================================================================== */2520 ========================================================================== */
30762521
3077#define Q6_Vuh_vsub_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat)(Vu,Vv)2522#define Q6_Vuh_vsub_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat)(Vu,Vv)
3078#endif /* __HEXAGON_ARCH___ >= 60 */
30792523
3080#if __HVX_ARCH__ >= 60
3081/* ==========================================================================2524/* ==========================================================================
3082 Assembly Syntax: Vdd32.uh=vsub(Vuu32.uh,Vvv32.uh):sat2525 Assembly Syntax: Vdd32.uh=vsub(Vuu32.uh,Vvv32.uh):sat
3083 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vsub_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)2526 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vsub_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -3086,9 +2529,7 @@...@@ -3086,9 +2529,7 @@
3086 ========================================================================== */2529 ========================================================================== */
30872530
3088#define Q6_Wuh_vsub_WuhWuh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat_dv)(Vuu,Vvv)2531#define Q6_Wuh_vsub_WuhWuh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat_dv)(Vuu,Vvv)
3089#endif /* __HEXAGON_ARCH___ >= 60 */
30902532
3091#if __HVX_ARCH__ >= 60
3092/* ==========================================================================2533/* ==========================================================================
3093 Assembly Syntax: Vdd32.w=vsub(Vu32.uh,Vv32.uh)2534 Assembly Syntax: Vdd32.w=vsub(Vu32.uh,Vv32.uh)
3094 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)2535 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VuhVuh(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3097,9 +2538,7 @@...@@ -3097,9 +2538,7 @@
3097 ========================================================================== */2538 ========================================================================== */
30982539
3099#define Q6_Ww_vsub_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhw)(Vu,Vv)2540#define Q6_Ww_vsub_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhw)(Vu,Vv)
3100#endif /* __HEXAGON_ARCH___ >= 60 */
31012541
3102#if __HVX_ARCH__ >= 60
3103/* ==========================================================================2542/* ==========================================================================
3104 Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w)2543 Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w)
3105 C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw(HVX_Vector Vu, HVX_Vector Vv)2544 C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3108,9 +2547,7 @@...@@ -3108,9 +2547,7 @@
3108 ========================================================================== */2547 ========================================================================== */
31092548
3110#define Q6_Vw_vsub_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw)(Vu,Vv)2549#define Q6_Vw_vsub_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw)(Vu,Vv)
3111#endif /* __HEXAGON_ARCH___ >= 60 */
31122550
3113#if __HVX_ARCH__ >= 60
3114/* ==========================================================================2551/* ==========================================================================
3115 Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w)2552 Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w)
3116 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv)2553 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -3119,9 +2556,7 @@...@@ -3119,9 +2556,7 @@
3119 ========================================================================== */2556 ========================================================================== */
31202557
3121#define Q6_Ww_vsub_WwWw(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw_dv)(Vuu,Vvv)2558#define Q6_Ww_vsub_WwWw(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw_dv)(Vuu,Vvv)
3122#endif /* __HEXAGON_ARCH___ >= 60 */
31232559
3124#if __HVX_ARCH__ >= 60
3125/* ==========================================================================2560/* ==========================================================================
3126 Assembly Syntax: if (!Qv4) Vx32.w-=Vu32.w2561 Assembly Syntax: if (!Qv4) Vx32.w-=Vu32.w
3127 C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)2562 C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -3130,9 +2565,7 @@...@@ -3130,9 +2565,7 @@
3130 ========================================================================== */2565 ========================================================================== */
31312566
3132#define Q6_Vw_condnac_QnVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)2567#define Q6_Vw_condnac_QnVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
3133#endif /* __HEXAGON_ARCH___ >= 60 */
31342568
3135#if __HVX_ARCH__ >= 60
3136/* ==========================================================================2569/* ==========================================================================
3137 Assembly Syntax: if (Qv4) Vx32.w-=Vu32.w2570 Assembly Syntax: if (Qv4) Vx32.w-=Vu32.w
3138 C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)2571 C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu)
...@@ -3141,9 +2574,7 @@...@@ -3141,9 +2574,7 @@
3141 ========================================================================== */2574 ========================================================================== */
31422575
3143#define Q6_Vw_condnac_QVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)2576#define Q6_Vw_condnac_QVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu)
3144#endif /* __HEXAGON_ARCH___ >= 60 */
31452577
3146#if __HVX_ARCH__ >= 60
3147/* ==========================================================================2578/* ==========================================================================
3148 Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w):sat2579 Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w):sat
3149 C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)2580 C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3152,9 +2583,7 @@...@@ -3152,9 +2583,7 @@
3152 ========================================================================== */2583 ========================================================================== */
31532584
3154#define Q6_Vw_vsub_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat)(Vu,Vv)2585#define Q6_Vw_vsub_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat)(Vu,Vv)
3155#endif /* __HEXAGON_ARCH___ >= 60 */
31562586
3157#if __HVX_ARCH__ >= 60
3158/* ==========================================================================2587/* ==========================================================================
3159 Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w):sat2588 Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w):sat
3160 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)2589 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv)
...@@ -3163,9 +2592,7 @@...@@ -3163,9 +2592,7 @@
3163 ========================================================================== */2592 ========================================================================== */
31642593
3165#define Q6_Ww_vsub_WwWw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat_dv)(Vuu,Vvv)2594#define Q6_Ww_vsub_WwWw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat_dv)(Vuu,Vvv)
3166#endif /* __HEXAGON_ARCH___ >= 60 */
31672595
3168#if __HVX_ARCH__ >= 60
3169/* ==========================================================================2596/* ==========================================================================
3170 Assembly Syntax: Vdd32=vswap(Qt4,Vu32,Vv32)2597 Assembly Syntax: Vdd32=vswap(Qt4,Vu32,Vv32)
3171 C Intrinsic Prototype: HVX_VectorPair Q6_W_vswap_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv)2598 C Intrinsic Prototype: HVX_VectorPair Q6_W_vswap_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv)
...@@ -3174,9 +2601,7 @@...@@ -3174,9 +2601,7 @@
3174 ========================================================================== */2601 ========================================================================== */
31752602
3176#define Q6_W_vswap_QVV(Qt,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vswap)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1),Vu,Vv)2603#define Q6_W_vswap_QVV(Qt,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vswap)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1),Vu,Vv)
3177#endif /* __HEXAGON_ARCH___ >= 60 */
31782604
3179#if __HVX_ARCH__ >= 60
3180/* ==========================================================================2605/* ==========================================================================
3181 Assembly Syntax: Vdd32.h=vtmpy(Vuu32.b,Rt32.b)2606 Assembly Syntax: Vdd32.h=vtmpy(Vuu32.b,Rt32.b)
3182 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WbRb(HVX_VectorPair Vuu, Word32 Rt)2607 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WbRb(HVX_VectorPair Vuu, Word32 Rt)
...@@ -3185,9 +2610,7 @@...@@ -3185,9 +2610,7 @@
3185 ========================================================================== */2610 ========================================================================== */
31862611
3187#define Q6_Wh_vtmpy_WbRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb)(Vuu,Rt)2612#define Q6_Wh_vtmpy_WbRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb)(Vuu,Rt)
3188#endif /* __HEXAGON_ARCH___ >= 60 */
31892613
3190#if __HVX_ARCH__ >= 60
3191/* ==========================================================================2614/* ==========================================================================
3192 Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.b,Rt32.b)2615 Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.b,Rt32.b)
3193 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWbRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)2616 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWbRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -3196,9 +2619,7 @@...@@ -3196,9 +2619,7 @@
3196 ========================================================================== */2619 ========================================================================== */
31972620
3198#define Q6_Wh_vtmpyacc_WhWbRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb_acc)(Vxx,Vuu,Rt)2621#define Q6_Wh_vtmpyacc_WhWbRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb_acc)(Vxx,Vuu,Rt)
3199#endif /* __HEXAGON_ARCH___ >= 60 */
32002622
3201#if __HVX_ARCH__ >= 60
3202/* ==========================================================================2623/* ==========================================================================
3203 Assembly Syntax: Vdd32.h=vtmpy(Vuu32.ub,Rt32.b)2624 Assembly Syntax: Vdd32.h=vtmpy(Vuu32.ub,Rt32.b)
3204 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt)2625 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt)
...@@ -3207,9 +2628,7 @@...@@ -3207,9 +2628,7 @@
3207 ========================================================================== */2628 ========================================================================== */
32082629
3209#define Q6_Wh_vtmpy_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus)(Vuu,Rt)2630#define Q6_Wh_vtmpy_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus)(Vuu,Rt)
3210#endif /* __HEXAGON_ARCH___ >= 60 */
32112631
3212#if __HVX_ARCH__ >= 60
3213/* ==========================================================================2632/* ==========================================================================
3214 Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.ub,Rt32.b)2633 Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.ub,Rt32.b)
3215 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)2634 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -3218,9 +2637,7 @@...@@ -3218,9 +2637,7 @@
3218 ========================================================================== */2637 ========================================================================== */
32192638
3220#define Q6_Wh_vtmpyacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus_acc)(Vxx,Vuu,Rt)2639#define Q6_Wh_vtmpyacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus_acc)(Vxx,Vuu,Rt)
3221#endif /* __HEXAGON_ARCH___ >= 60 */
32222640
3223#if __HVX_ARCH__ >= 60
3224/* ==========================================================================2641/* ==========================================================================
3225 Assembly Syntax: Vdd32.w=vtmpy(Vuu32.h,Rt32.b)2642 Assembly Syntax: Vdd32.w=vtmpy(Vuu32.h,Rt32.b)
3226 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt)2643 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt)
...@@ -3229,9 +2646,7 @@...@@ -3229,9 +2646,7 @@
3229 ========================================================================== */2646 ========================================================================== */
32302647
3231#define Q6_Ww_vtmpy_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb)(Vuu,Rt)2648#define Q6_Ww_vtmpy_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb)(Vuu,Rt)
3232#endif /* __HEXAGON_ARCH___ >= 60 */
32332649
3234#if __HVX_ARCH__ >= 60
3235/* ==========================================================================2650/* ==========================================================================
3236 Assembly Syntax: Vxx32.w+=vtmpy(Vuu32.h,Rt32.b)2651 Assembly Syntax: Vxx32.w+=vtmpy(Vuu32.h,Rt32.b)
3237 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)2652 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt)
...@@ -3240,9 +2655,7 @@...@@ -3240,9 +2655,7 @@
3240 ========================================================================== */2655 ========================================================================== */
32412656
3242#define Q6_Ww_vtmpyacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb_acc)(Vxx,Vuu,Rt)2657#define Q6_Ww_vtmpyacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb_acc)(Vxx,Vuu,Rt)
3243#endif /* __HEXAGON_ARCH___ >= 60 */
32442658
3245#if __HVX_ARCH__ >= 60
3246/* ==========================================================================2659/* ==========================================================================
3247 Assembly Syntax: Vdd32.h=vunpack(Vu32.b)2660 Assembly Syntax: Vdd32.h=vunpack(Vu32.b)
3248 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpack_Vb(HVX_Vector Vu)2661 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpack_Vb(HVX_Vector Vu)
...@@ -3251,9 +2664,7 @@...@@ -3251,9 +2664,7 @@
3251 ========================================================================== */2664 ========================================================================== */
32522665
3253#define Q6_Wh_vunpack_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackb)(Vu)2666#define Q6_Wh_vunpack_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackb)(Vu)
3254#endif /* __HEXAGON_ARCH___ >= 60 */
32552667
3256#if __HVX_ARCH__ >= 60
3257/* ==========================================================================2668/* ==========================================================================
3258 Assembly Syntax: Vdd32.w=vunpack(Vu32.h)2669 Assembly Syntax: Vdd32.w=vunpack(Vu32.h)
3259 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpack_Vh(HVX_Vector Vu)2670 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpack_Vh(HVX_Vector Vu)
...@@ -3262,9 +2673,7 @@...@@ -3262,9 +2673,7 @@
3262 ========================================================================== */2673 ========================================================================== */
32632674
3264#define Q6_Ww_vunpack_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackh)(Vu)2675#define Q6_Ww_vunpack_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackh)(Vu)
3265#endif /* __HEXAGON_ARCH___ >= 60 */
32662676
3267#if __HVX_ARCH__ >= 60
3268/* ==========================================================================2677/* ==========================================================================
3269 Assembly Syntax: Vxx32.h|=vunpacko(Vu32.b)2678 Assembly Syntax: Vxx32.h|=vunpacko(Vu32.b)
3270 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpackoor_WhVb(HVX_VectorPair Vxx, HVX_Vector Vu)2679 C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpackoor_WhVb(HVX_VectorPair Vxx, HVX_Vector Vu)
...@@ -3273,9 +2682,7 @@...@@ -3273,9 +2682,7 @@
3273 ========================================================================== */2682 ========================================================================== */
32742683
3275#define Q6_Wh_vunpackoor_WhVb(Vxx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackob)(Vxx,Vu)2684#define Q6_Wh_vunpackoor_WhVb(Vxx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackob)(Vxx,Vu)
3276#endif /* __HEXAGON_ARCH___ >= 60 */
32772685
3278#if __HVX_ARCH__ >= 60
3279/* ==========================================================================2686/* ==========================================================================
3280 Assembly Syntax: Vxx32.w|=vunpacko(Vu32.h)2687 Assembly Syntax: Vxx32.w|=vunpacko(Vu32.h)
3281 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpackoor_WwVh(HVX_VectorPair Vxx, HVX_Vector Vu)2688 C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpackoor_WwVh(HVX_VectorPair Vxx, HVX_Vector Vu)
...@@ -3284,9 +2691,7 @@...@@ -3284,9 +2691,7 @@
3284 ========================================================================== */2691 ========================================================================== */
32852692
3286#define Q6_Ww_vunpackoor_WwVh(Vxx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackoh)(Vxx,Vu)2693#define Q6_Ww_vunpackoor_WwVh(Vxx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackoh)(Vxx,Vu)
3287#endif /* __HEXAGON_ARCH___ >= 60 */
32882694
3289#if __HVX_ARCH__ >= 60
3290/* ==========================================================================2695/* ==========================================================================
3291 Assembly Syntax: Vdd32.uh=vunpack(Vu32.ub)2696 Assembly Syntax: Vdd32.uh=vunpack(Vu32.ub)
3292 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vunpack_Vub(HVX_Vector Vu)2697 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vunpack_Vub(HVX_Vector Vu)
...@@ -3295,9 +2700,7 @@...@@ -3295,9 +2700,7 @@
3295 ========================================================================== */2700 ========================================================================== */
32962701
3297#define Q6_Wuh_vunpack_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackub)(Vu)2702#define Q6_Wuh_vunpack_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackub)(Vu)
3298#endif /* __HEXAGON_ARCH___ >= 60 */
32992703
3300#if __HVX_ARCH__ >= 60
3301/* ==========================================================================2704/* ==========================================================================
3302 Assembly Syntax: Vdd32.uw=vunpack(Vu32.uh)2705 Assembly Syntax: Vdd32.uw=vunpack(Vu32.uh)
3303 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vunpack_Vuh(HVX_Vector Vu)2706 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vunpack_Vuh(HVX_Vector Vu)
...@@ -3306,9 +2709,7 @@...@@ -3306,9 +2709,7 @@
3306 ========================================================================== */2709 ========================================================================== */
33072710
3308#define Q6_Wuw_vunpack_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackuh)(Vu)2711#define Q6_Wuw_vunpack_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackuh)(Vu)
3309#endif /* __HEXAGON_ARCH___ >= 60 */
33102712
3311#if __HVX_ARCH__ >= 60
3312/* ==========================================================================2713/* ==========================================================================
3313 Assembly Syntax: Vd32=vxor(Vu32,Vv32)2714 Assembly Syntax: Vd32=vxor(Vu32,Vv32)
3314 C Intrinsic Prototype: HVX_Vector Q6_V_vxor_VV(HVX_Vector Vu, HVX_Vector Vv)2715 C Intrinsic Prototype: HVX_Vector Q6_V_vxor_VV(HVX_Vector Vu, HVX_Vector Vv)
...@@ -3317,9 +2718,7 @@...@@ -3317,9 +2718,7 @@
3317 ========================================================================== */2718 ========================================================================== */
33182719
3319#define Q6_V_vxor_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vxor)(Vu,Vv)2720#define Q6_V_vxor_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vxor)(Vu,Vv)
3320#endif /* __HEXAGON_ARCH___ >= 60 */
33212721
3322#if __HVX_ARCH__ >= 60
3323/* ==========================================================================2722/* ==========================================================================
3324 Assembly Syntax: Vdd32.uh=vzxt(Vu32.ub)2723 Assembly Syntax: Vdd32.uh=vzxt(Vu32.ub)
3325 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vzxt_Vub(HVX_Vector Vu)2724 C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vzxt_Vub(HVX_Vector Vu)
...@@ -3328,9 +2727,7 @@...@@ -3328,9 +2727,7 @@
3328 ========================================================================== */2727 ========================================================================== */
33292728
3330#define Q6_Wuh_vzxt_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzb)(Vu)2729#define Q6_Wuh_vzxt_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzb)(Vu)
3331#endif /* __HEXAGON_ARCH___ >= 60 */
33322730
3333#if __HVX_ARCH__ >= 60
3334/* ==========================================================================2731/* ==========================================================================
3335 Assembly Syntax: Vdd32.uw=vzxt(Vu32.uh)2732 Assembly Syntax: Vdd32.uw=vzxt(Vu32.uh)
3336 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vzxt_Vuh(HVX_Vector Vu)2733 C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vzxt_Vuh(HVX_Vector Vu)
...@@ -3339,7 +2736,6 @@...@@ -3339,7 +2736,6 @@
3339 ========================================================================== */2736 ========================================================================== */
33402737
3341#define Q6_Wuw_vzxt_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzh)(Vu)2738#define Q6_Wuw_vzxt_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzh)(Vu)
3342#endif /* __HEXAGON_ARCH___ >= 60 */
33432739
3344#if __HVX_ARCH__ >= 622740#if __HVX_ARCH__ >= 62
3345/* ==========================================================================2741/* ==========================================================================
...@@ -3350,7 +2746,7 @@...@@ -3350,7 +2746,7 @@
3350 ========================================================================== */2746 ========================================================================== */
33512747
3352#define Q6_Vb_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatb)(Rt)2748#define Q6_Vb_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatb)(Rt)
3353#endif /* __HEXAGON_ARCH___ >= 62 */2749#endif
33542750
3355#if __HVX_ARCH__ >= 622751#if __HVX_ARCH__ >= 62
3356/* ==========================================================================2752/* ==========================================================================
...@@ -3361,7 +2757,7 @@...@@ -3361,7 +2757,7 @@
3361 ========================================================================== */2757 ========================================================================== */
33622758
3363#define Q6_Vh_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplath)(Rt)2759#define Q6_Vh_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplath)(Rt)
3364#endif /* __HEXAGON_ARCH___ >= 62 */2760#endif
33652761
3366#if __HVX_ARCH__ >= 622762#if __HVX_ARCH__ >= 62
3367/* ==========================================================================2763/* ==========================================================================
...@@ -3372,7 +2768,7 @@...@@ -3372,7 +2768,7 @@
3372 ========================================================================== */2768 ========================================================================== */
33732769
3374#define Q6_Q_vsetq2_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2v2)(Rt)),-1)2770#define Q6_Q_vsetq2_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2v2)(Rt)),-1)
3375#endif /* __HEXAGON_ARCH___ >= 62 */2771#endif
33762772
3377#if __HVX_ARCH__ >= 622773#if __HVX_ARCH__ >= 62
3378/* ==========================================================================2774/* ==========================================================================
...@@ -3383,7 +2779,7 @@...@@ -3383,7 +2779,7 @@
3383 ========================================================================== */2779 ========================================================================== */
33842780
3385#define Q6_Qb_vshuffe_QhQh(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqh)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)2781#define Q6_Qb_vshuffe_QhQh(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqh)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)
3386#endif /* __HEXAGON_ARCH___ >= 62 */2782#endif
33872783
3388#if __HVX_ARCH__ >= 622784#if __HVX_ARCH__ >= 62
3389/* ==========================================================================2785/* ==========================================================================
...@@ -3394,7 +2790,7 @@...@@ -3394,7 +2790,7 @@
3394 ========================================================================== */2790 ========================================================================== */
33952791
3396#define Q6_Qh_vshuffe_QwQw(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqw)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)2792#define Q6_Qh_vshuffe_QwQw(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqw)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1)
3397#endif /* __HEXAGON_ARCH___ >= 62 */2793#endif
33982794
3399#if __HVX_ARCH__ >= 622795#if __HVX_ARCH__ >= 62
3400/* ==========================================================================2796/* ==========================================================================
...@@ -3405,7 +2801,7 @@...@@ -3405,7 +2801,7 @@
3405 ========================================================================== */2801 ========================================================================== */
34062802
3407#define Q6_Vb_vadd_VbVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat)(Vu,Vv)2803#define Q6_Vb_vadd_VbVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat)(Vu,Vv)
3408#endif /* __HEXAGON_ARCH___ >= 62 */2804#endif
34092805
3410#if __HVX_ARCH__ >= 622806#if __HVX_ARCH__ >= 62
3411/* ==========================================================================2807/* ==========================================================================
...@@ -3416,7 +2812,7 @@...@@ -3416,7 +2812,7 @@
3416 ========================================================================== */2812 ========================================================================== */
34172813
3418#define Q6_Wb_vadd_WbWb_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat_dv)(Vuu,Vvv)2814#define Q6_Wb_vadd_WbWb_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat_dv)(Vuu,Vvv)
3419#endif /* __HEXAGON_ARCH___ >= 62 */2815#endif
34202816
3421#if __HVX_ARCH__ >= 622817#if __HVX_ARCH__ >= 62
3422/* ==========================================================================2818/* ==========================================================================
...@@ -3427,7 +2823,7 @@...@@ -3427,7 +2823,7 @@
3427 ========================================================================== */2823 ========================================================================== */
34282824
3429#define Q6_Vw_vadd_VwVwQ_carry(Vu,Vv,Qx) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarry)(Vu,Vv,Qx)2825#define Q6_Vw_vadd_VwVwQ_carry(Vu,Vv,Qx) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarry)(Vu,Vv,Qx)
3430#endif /* __HEXAGON_ARCH___ >= 62 */2826#endif
34312827
3432#if __HVX_ARCH__ >= 622828#if __HVX_ARCH__ >= 62
3433/* ==========================================================================2829/* ==========================================================================
...@@ -3438,7 +2834,7 @@...@@ -3438,7 +2834,7 @@
3438 ========================================================================== */2834 ========================================================================== */
34392835
3440#define Q6_Vh_vadd_vclb_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbh)(Vu,Vv)2836#define Q6_Vh_vadd_vclb_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbh)(Vu,Vv)
3441#endif /* __HEXAGON_ARCH___ >= 62 */2837#endif
34422838
3443#if __HVX_ARCH__ >= 622839#if __HVX_ARCH__ >= 62
3444/* ==========================================================================2840/* ==========================================================================
...@@ -3449,7 +2845,7 @@...@@ -3449,7 +2845,7 @@
3449 ========================================================================== */2845 ========================================================================== */
34502846
3451#define Q6_Vw_vadd_vclb_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbw)(Vu,Vv)2847#define Q6_Vw_vadd_vclb_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbw)(Vu,Vv)
3452#endif /* __HEXAGON_ARCH___ >= 62 */2848#endif
34532849
3454#if __HVX_ARCH__ >= 622850#if __HVX_ARCH__ >= 62
3455/* ==========================================================================2851/* ==========================================================================
...@@ -3460,7 +2856,7 @@...@@ -3460,7 +2856,7 @@
3460 ========================================================================== */2856 ========================================================================== */
34612857
3462#define Q6_Ww_vaddacc_WwVhVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw_acc)(Vxx,Vu,Vv)2858#define Q6_Ww_vaddacc_WwVhVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw_acc)(Vxx,Vu,Vv)
3463#endif /* __HEXAGON_ARCH___ >= 62 */2859#endif
34642860
3465#if __HVX_ARCH__ >= 622861#if __HVX_ARCH__ >= 62
3466/* ==========================================================================2862/* ==========================================================================
...@@ -3471,7 +2867,7 @@...@@ -3471,7 +2867,7 @@
3471 ========================================================================== */2867 ========================================================================== */
34722868
3473#define Q6_Wh_vaddacc_WhVubVub(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh_acc)(Vxx,Vu,Vv)2869#define Q6_Wh_vaddacc_WhVubVub(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh_acc)(Vxx,Vu,Vv)
3474#endif /* __HEXAGON_ARCH___ >= 62 */2870#endif
34752871
3476#if __HVX_ARCH__ >= 622872#if __HVX_ARCH__ >= 62
3477/* ==========================================================================2873/* ==========================================================================
...@@ -3482,7 +2878,7 @@...@@ -3482,7 +2878,7 @@
3482 ========================================================================== */2878 ========================================================================== */
34832879
3484#define Q6_Vub_vadd_VubVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddububb_sat)(Vu,Vv)2880#define Q6_Vub_vadd_VubVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddububb_sat)(Vu,Vv)
3485#endif /* __HEXAGON_ARCH___ >= 62 */2881#endif
34862882
3487#if __HVX_ARCH__ >= 622883#if __HVX_ARCH__ >= 62
3488/* ==========================================================================2884/* ==========================================================================
...@@ -3493,7 +2889,7 @@...@@ -3493,7 +2889,7 @@
3493 ========================================================================== */2889 ========================================================================== */
34942890
3495#define Q6_Ww_vaddacc_WwVuhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw_acc)(Vxx,Vu,Vv)2891#define Q6_Ww_vaddacc_WwVuhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw_acc)(Vxx,Vu,Vv)
3496#endif /* __HEXAGON_ARCH___ >= 62 */2892#endif
34972893
3498#if __HVX_ARCH__ >= 622894#if __HVX_ARCH__ >= 62
3499/* ==========================================================================2895/* ==========================================================================
...@@ -3504,7 +2900,7 @@...@@ -3504,7 +2900,7 @@
3504 ========================================================================== */2900 ========================================================================== */
35052901
3506#define Q6_Vuw_vadd_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat)(Vu,Vv)2902#define Q6_Vuw_vadd_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat)(Vu,Vv)
3507#endif /* __HEXAGON_ARCH___ >= 62 */2903#endif
35082904
3509#if __HVX_ARCH__ >= 622905#if __HVX_ARCH__ >= 62
3510/* ==========================================================================2906/* ==========================================================================
...@@ -3515,7 +2911,7 @@...@@ -3515,7 +2911,7 @@
3515 ========================================================================== */2911 ========================================================================== */
35162912
3517#define Q6_Wuw_vadd_WuwWuw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat_dv)(Vuu,Vvv)2913#define Q6_Wuw_vadd_WuwWuw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat_dv)(Vuu,Vvv)
3518#endif /* __HEXAGON_ARCH___ >= 62 */2914#endif
35192915
3520#if __HVX_ARCH__ >= 622916#if __HVX_ARCH__ >= 62
3521/* ==========================================================================2917/* ==========================================================================
...@@ -3526,7 +2922,7 @@...@@ -3526,7 +2922,7 @@
3526 ========================================================================== */2922 ========================================================================== */
35272923
3528#define Q6_V_vand_QnR(Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt)2924#define Q6_V_vand_QnR(Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt)
3529#endif /* __HEXAGON_ARCH___ >= 62 */2925#endif
35302926
3531#if __HVX_ARCH__ >= 622927#if __HVX_ARCH__ >= 62
3532/* ==========================================================================2928/* ==========================================================================
...@@ -3537,7 +2933,7 @@...@@ -3537,7 +2933,7 @@
3537 ========================================================================== */2933 ========================================================================== */
35382934
3539#define Q6_V_vandor_VQnR(Vx,Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt_acc)(Vx,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt)2935#define Q6_V_vandor_VQnR(Vx,Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt_acc)(Vx,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt)
3540#endif /* __HEXAGON_ARCH___ >= 62 */2936#endif
35412937
3542#if __HVX_ARCH__ >= 622938#if __HVX_ARCH__ >= 62
3543/* ==========================================================================2939/* ==========================================================================
...@@ -3548,7 +2944,7 @@...@@ -3548,7 +2944,7 @@
3548 ========================================================================== */2944 ========================================================================== */
35492945
3550#define Q6_V_vand_QnV(Qv,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvnqv)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vu)2946#define Q6_V_vand_QnV(Qv,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvnqv)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vu)
3551#endif /* __HEXAGON_ARCH___ >= 62 */2947#endif
35522948
3553#if __HVX_ARCH__ >= 622949#if __HVX_ARCH__ >= 62
3554/* ==========================================================================2950/* ==========================================================================
...@@ -3559,7 +2955,7 @@...@@ -3559,7 +2955,7 @@
3559 ========================================================================== */2955 ========================================================================== */
35602956
3561#define Q6_V_vand_QV(Qv,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvqv)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vu)2957#define Q6_V_vand_QV(Qv,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvqv)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vu)
3562#endif /* __HEXAGON_ARCH___ >= 62 */2958#endif
35632959
3564#if __HVX_ARCH__ >= 622960#if __HVX_ARCH__ >= 62
3565/* ==========================================================================2961/* ==========================================================================
...@@ -3570,7 +2966,7 @@...@@ -3570,7 +2966,7 @@
3570 ========================================================================== */2966 ========================================================================== */
35712967
3572#define Q6_Vb_vasr_VhVhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbsat)(Vu,Vv,Rt)2968#define Q6_Vb_vasr_VhVhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbsat)(Vu,Vv,Rt)
3573#endif /* __HEXAGON_ARCH___ >= 62 */2969#endif
35742970
3575#if __HVX_ARCH__ >= 622971#if __HVX_ARCH__ >= 62
3576/* ==========================================================================2972/* ==========================================================================
...@@ -3581,7 +2977,7 @@...@@ -3581,7 +2977,7 @@
3581 ========================================================================== */2977 ========================================================================== */
35822978
3583#define Q6_Vuh_vasr_VuwVuwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhrndsat)(Vu,Vv,Rt)2979#define Q6_Vuh_vasr_VuwVuwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhrndsat)(Vu,Vv,Rt)
3584#endif /* __HEXAGON_ARCH___ >= 62 */2980#endif
35852981
3586#if __HVX_ARCH__ >= 622982#if __HVX_ARCH__ >= 62
3587/* ==========================================================================2983/* ==========================================================================
...@@ -3592,7 +2988,7 @@...@@ -3592,7 +2988,7 @@
3592 ========================================================================== */2988 ========================================================================== */
35932989
3594#define Q6_Vuh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhrndsat)(Vu,Vv,Rt)2990#define Q6_Vuh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhrndsat)(Vu,Vv,Rt)
3595#endif /* __HEXAGON_ARCH___ >= 62 */2991#endif
35962992
3597#if __HVX_ARCH__ >= 622993#if __HVX_ARCH__ >= 62
3598/* ==========================================================================2994/* ==========================================================================
...@@ -3603,7 +2999,7 @@...@@ -3603,7 +2999,7 @@
3603 ========================================================================== */2999 ========================================================================== */
36043000
3605#define Q6_Vub_vlsr_VubR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrb)(Vu,Rt)3001#define Q6_Vub_vlsr_VubR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrb)(Vu,Rt)
3606#endif /* __HEXAGON_ARCH___ >= 62 */3002#endif
36073003
3608#if __HVX_ARCH__ >= 623004#if __HVX_ARCH__ >= 62
3609/* ==========================================================================3005/* ==========================================================================
...@@ -3614,7 +3010,7 @@...@@ -3614,7 +3010,7 @@
3614 ========================================================================== */3010 ========================================================================== */
36153011
3616#define Q6_Vb_vlut32_VbVbR_nomatch(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_nm)(Vu,Vv,Rt)3012#define Q6_Vb_vlut32_VbVbR_nomatch(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_nm)(Vu,Vv,Rt)
3617#endif /* __HEXAGON_ARCH___ >= 62 */3013#endif
36183014
3619#if __HVX_ARCH__ >= 623015#if __HVX_ARCH__ >= 62
3620/* ==========================================================================3016/* ==========================================================================
...@@ -3625,7 +3021,7 @@...@@ -3625,7 +3021,7 @@
3625 ========================================================================== */3021 ========================================================================== */
36263022
3627#define Q6_Vb_vlut32or_VbVbVbI(Vx,Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracci)(Vx,Vu,Vv,Iu3)3023#define Q6_Vb_vlut32or_VbVbVbI(Vx,Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracci)(Vx,Vu,Vv,Iu3)
3628#endif /* __HEXAGON_ARCH___ >= 62 */3024#endif
36293025
3630#if __HVX_ARCH__ >= 623026#if __HVX_ARCH__ >= 62
3631/* ==========================================================================3027/* ==========================================================================
...@@ -3636,7 +3032,7 @@...@@ -3636,7 +3032,7 @@
3636 ========================================================================== */3032 ========================================================================== */
36373033
3638#define Q6_Vb_vlut32_VbVbI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvbi)(Vu,Vv,Iu3)3034#define Q6_Vb_vlut32_VbVbI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvbi)(Vu,Vv,Iu3)
3639#endif /* __HEXAGON_ARCH___ >= 62 */3035#endif
36403036
3641#if __HVX_ARCH__ >= 623037#if __HVX_ARCH__ >= 62
3642/* ==========================================================================3038/* ==========================================================================
...@@ -3647,7 +3043,7 @@...@@ -3647,7 +3043,7 @@
3647 ========================================================================== */3043 ========================================================================== */
36483044
3649#define Q6_Wh_vlut16_VbVhR_nomatch(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_nm)(Vu,Vv,Rt)3045#define Q6_Wh_vlut16_VbVhR_nomatch(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_nm)(Vu,Vv,Rt)
3650#endif /* __HEXAGON_ARCH___ >= 62 */3046#endif
36513047
3652#if __HVX_ARCH__ >= 623048#if __HVX_ARCH__ >= 62
3653/* ==========================================================================3049/* ==========================================================================
...@@ -3658,7 +3054,7 @@...@@ -3658,7 +3054,7 @@
3658 ========================================================================== */3054 ========================================================================== */
36593055
3660#define Q6_Wh_vlut16or_WhVbVhI(Vxx,Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracci)(Vxx,Vu,Vv,Iu3)3056#define Q6_Wh_vlut16or_WhVbVhI(Vxx,Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracci)(Vxx,Vu,Vv,Iu3)
3661#endif /* __HEXAGON_ARCH___ >= 62 */3057#endif
36623058
3663#if __HVX_ARCH__ >= 623059#if __HVX_ARCH__ >= 62
3664/* ==========================================================================3060/* ==========================================================================
...@@ -3669,7 +3065,7 @@...@@ -3669,7 +3065,7 @@
3669 ========================================================================== */3065 ========================================================================== */
36703066
3671#define Q6_Wh_vlut16_VbVhI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwhi)(Vu,Vv,Iu3)3067#define Q6_Wh_vlut16_VbVhI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwhi)(Vu,Vv,Iu3)
3672#endif /* __HEXAGON_ARCH___ >= 62 */3068#endif
36733069
3674#if __HVX_ARCH__ >= 623070#if __HVX_ARCH__ >= 62
3675/* ==========================================================================3071/* ==========================================================================
...@@ -3680,7 +3076,7 @@...@@ -3680,7 +3076,7 @@
3680 ========================================================================== */3076 ========================================================================== */
36813077
3682#define Q6_Vb_vmax_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxb)(Vu,Vv)3078#define Q6_Vb_vmax_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxb)(Vu,Vv)
3683#endif /* __HEXAGON_ARCH___ >= 62 */3079#endif
36843080
3685#if __HVX_ARCH__ >= 623081#if __HVX_ARCH__ >= 62
3686/* ==========================================================================3082/* ==========================================================================
...@@ -3691,7 +3087,7 @@...@@ -3691,7 +3087,7 @@
3691 ========================================================================== */3087 ========================================================================== */
36923088
3693#define Q6_Vb_vmin_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminb)(Vu,Vv)3089#define Q6_Vb_vmin_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminb)(Vu,Vv)
3694#endif /* __HEXAGON_ARCH___ >= 62 */3090#endif
36953091
3696#if __HVX_ARCH__ >= 623092#if __HVX_ARCH__ >= 62
3697/* ==========================================================================3093/* ==========================================================================
...@@ -3702,7 +3098,7 @@...@@ -3702,7 +3098,7 @@
3702 ========================================================================== */3098 ========================================================================== */
37033099
3704#define Q6_Ww_vmpa_WuhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb)(Vuu,Rt)3100#define Q6_Ww_vmpa_WuhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb)(Vuu,Rt)
3705#endif /* __HEXAGON_ARCH___ >= 62 */3101#endif
37063102
3707#if __HVX_ARCH__ >= 623103#if __HVX_ARCH__ >= 62
3708/* ==========================================================================3104/* ==========================================================================
...@@ -3713,7 +3109,7 @@...@@ -3713,7 +3109,7 @@
3713 ========================================================================== */3109 ========================================================================== */
37143110
3715#define Q6_Ww_vmpaacc_WwWuhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb_acc)(Vxx,Vuu,Rt)3111#define Q6_Ww_vmpaacc_WwWuhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb_acc)(Vxx,Vuu,Rt)
3716#endif /* __HEXAGON_ARCH___ >= 62 */3112#endif
37173113
3718#if __HVX_ARCH__ >= 623114#if __HVX_ARCH__ >= 62
3719/* ==========================================================================3115/* ==========================================================================
...@@ -3724,7 +3120,7 @@...@@ -3724,7 +3120,7 @@
3724 ========================================================================== */3120 ========================================================================== */
37253121
3726#define Q6_W_vmpye_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh_64)(Vu,Vv)3122#define Q6_W_vmpye_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh_64)(Vu,Vv)
3727#endif /* __HEXAGON_ARCH___ >= 62 */3123#endif
37283124
3729#if __HVX_ARCH__ >= 623125#if __HVX_ARCH__ >= 62
3730/* ==========================================================================3126/* ==========================================================================
...@@ -3735,7 +3131,7 @@...@@ -3735,7 +3131,7 @@
3735 ========================================================================== */3131 ========================================================================== */
37363132
3737#define Q6_Vw_vmpyi_VwRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub)(Vu,Rt)3133#define Q6_Vw_vmpyi_VwRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub)(Vu,Rt)
3738#endif /* __HEXAGON_ARCH___ >= 62 */3134#endif
37393135
3740#if __HVX_ARCH__ >= 623136#if __HVX_ARCH__ >= 62
3741/* ==========================================================================3137/* ==========================================================================
...@@ -3746,7 +3142,7 @@...@@ -3746,7 +3142,7 @@
3746 ========================================================================== */3142 ========================================================================== */
37473143
3748#define Q6_Vw_vmpyiacc_VwVwRub(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub_acc)(Vx,Vu,Rt)3144#define Q6_Vw_vmpyiacc_VwVwRub(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub_acc)(Vx,Vu,Rt)
3749#endif /* __HEXAGON_ARCH___ >= 62 */3145#endif
37503146
3751#if __HVX_ARCH__ >= 623147#if __HVX_ARCH__ >= 62
3752/* ==========================================================================3148/* ==========================================================================
...@@ -3757,7 +3153,7 @@...@@ -3757,7 +3153,7 @@
3757 ========================================================================== */3153 ========================================================================== */
37583154
3759#define Q6_W_vmpyoacc_WVwVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_64_acc)(Vxx,Vu,Vv)3155#define Q6_W_vmpyoacc_WVwVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_64_acc)(Vxx,Vu,Vv)
3760#endif /* __HEXAGON_ARCH___ >= 62 */3156#endif
37613157
3762#if __HVX_ARCH__ >= 623158#if __HVX_ARCH__ >= 62
3763/* ==========================================================================3159/* ==========================================================================
...@@ -3768,7 +3164,7 @@...@@ -3768,7 +3164,7 @@
3768 ========================================================================== */3164 ========================================================================== */
37693165
3770#define Q6_Vub_vround_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduhub)(Vu,Vv)3166#define Q6_Vub_vround_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduhub)(Vu,Vv)
3771#endif /* __HEXAGON_ARCH___ >= 62 */3167#endif
37723168
3773#if __HVX_ARCH__ >= 623169#if __HVX_ARCH__ >= 62
3774/* ==========================================================================3170/* ==========================================================================
...@@ -3779,7 +3175,7 @@...@@ -3779,7 +3175,7 @@
3779 ========================================================================== */3175 ========================================================================== */
37803176
3781#define Q6_Vuh_vround_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduwuh)(Vu,Vv)3177#define Q6_Vuh_vround_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduwuh)(Vu,Vv)
3782#endif /* __HEXAGON_ARCH___ >= 62 */3178#endif
37833179
3784#if __HVX_ARCH__ >= 623180#if __HVX_ARCH__ >= 62
3785/* ==========================================================================3181/* ==========================================================================
...@@ -3790,7 +3186,7 @@...@@ -3790,7 +3186,7 @@
3790 ========================================================================== */3186 ========================================================================== */
37913187
3792#define Q6_Vuh_vsat_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatuwuh)(Vu,Vv)3188#define Q6_Vuh_vsat_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatuwuh)(Vu,Vv)
3793#endif /* __HEXAGON_ARCH___ >= 62 */3189#endif
37943190
3795#if __HVX_ARCH__ >= 623191#if __HVX_ARCH__ >= 62
3796/* ==========================================================================3192/* ==========================================================================
...@@ -3801,7 +3197,7 @@...@@ -3801,7 +3197,7 @@
3801 ========================================================================== */3197 ========================================================================== */
38023198
3803#define Q6_Vb_vsub_VbVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat)(Vu,Vv)3199#define Q6_Vb_vsub_VbVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat)(Vu,Vv)
3804#endif /* __HEXAGON_ARCH___ >= 62 */3200#endif
38053201
3806#if __HVX_ARCH__ >= 623202#if __HVX_ARCH__ >= 62
3807/* ==========================================================================3203/* ==========================================================================
...@@ -3812,7 +3208,7 @@...@@ -3812,7 +3208,7 @@
3812 ========================================================================== */3208 ========================================================================== */
38133209
3814#define Q6_Wb_vsub_WbWb_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat_dv)(Vuu,Vvv)3210#define Q6_Wb_vsub_WbWb_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat_dv)(Vuu,Vvv)
3815#endif /* __HEXAGON_ARCH___ >= 62 */3211#endif
38163212
3817#if __HVX_ARCH__ >= 623213#if __HVX_ARCH__ >= 62
3818/* ==========================================================================3214/* ==========================================================================
...@@ -3823,7 +3219,7 @@...@@ -3823,7 +3219,7 @@
3823 ========================================================================== */3219 ========================================================================== */
38243220
3825#define Q6_Vw_vsub_VwVwQ_carry(Vu,Vv,Qx) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubcarry)(Vu,Vv,Qx)3221#define Q6_Vw_vsub_VwVwQ_carry(Vu,Vv,Qx) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubcarry)(Vu,Vv,Qx)
3826#endif /* __HEXAGON_ARCH___ >= 62 */3222#endif
38273223
3828#if __HVX_ARCH__ >= 623224#if __HVX_ARCH__ >= 62
3829/* ==========================================================================3225/* ==========================================================================
...@@ -3834,7 +3230,7 @@...@@ -3834,7 +3230,7 @@
3834 ========================================================================== */3230 ========================================================================== */
38353231
3836#define Q6_Vub_vsub_VubVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubububb_sat)(Vu,Vv)3232#define Q6_Vub_vsub_VubVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubububb_sat)(Vu,Vv)
3837#endif /* __HEXAGON_ARCH___ >= 62 */3233#endif
38383234
3839#if __HVX_ARCH__ >= 623235#if __HVX_ARCH__ >= 62
3840/* ==========================================================================3236/* ==========================================================================
...@@ -3845,7 +3241,7 @@...@@ -3845,7 +3241,7 @@
3845 ========================================================================== */3241 ========================================================================== */
38463242
3847#define Q6_Vuw_vsub_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat)(Vu,Vv)3243#define Q6_Vuw_vsub_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat)(Vu,Vv)
3848#endif /* __HEXAGON_ARCH___ >= 62 */3244#endif
38493245
3850#if __HVX_ARCH__ >= 623246#if __HVX_ARCH__ >= 62
3851/* ==========================================================================3247/* ==========================================================================
...@@ -3856,7 +3252,7 @@...@@ -3856,7 +3252,7 @@
3856 ========================================================================== */3252 ========================================================================== */
38573253
3858#define Q6_Wuw_vsub_WuwWuw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat_dv)(Vuu,Vvv)3254#define Q6_Wuw_vsub_WuwWuw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat_dv)(Vuu,Vvv)
3859#endif /* __HEXAGON_ARCH___ >= 62 */3255#endif
38603256
3861#if __HVX_ARCH__ >= 653257#if __HVX_ARCH__ >= 65
3862/* ==========================================================================3258/* ==========================================================================
...@@ -3867,7 +3263,7 @@...@@ -3867,7 +3263,7 @@
3867 ========================================================================== */3263 ========================================================================== */
38683264
3869#define Q6_Vb_vabs_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb)(Vu)3265#define Q6_Vb_vabs_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb)(Vu)
3870#endif /* __HEXAGON_ARCH___ >= 65 */3266#endif
38713267
3872#if __HVX_ARCH__ >= 653268#if __HVX_ARCH__ >= 65
3873/* ==========================================================================3269/* ==========================================================================
...@@ -3878,7 +3274,7 @@...@@ -3878,7 +3274,7 @@
3878 ========================================================================== */3274 ========================================================================== */
38793275
3880#define Q6_Vb_vabs_Vb_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb_sat)(Vu)3276#define Q6_Vb_vabs_Vb_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb_sat)(Vu)
3881#endif /* __HEXAGON_ARCH___ >= 65 */3277#endif
38823278
3883#if __HVX_ARCH__ >= 653279#if __HVX_ARCH__ >= 65
3884/* ==========================================================================3280/* ==========================================================================
...@@ -3889,7 +3285,7 @@...@@ -3889,7 +3285,7 @@
3889 ========================================================================== */3285 ========================================================================== */
38903286
3891#define Q6_Vh_vaslacc_VhVhR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh_acc)(Vx,Vu,Rt)3287#define Q6_Vh_vaslacc_VhVhR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh_acc)(Vx,Vu,Rt)
3892#endif /* __HEXAGON_ARCH___ >= 65 */3288#endif
38933289
3894#if __HVX_ARCH__ >= 653290#if __HVX_ARCH__ >= 65
3895/* ==========================================================================3291/* ==========================================================================
...@@ -3900,7 +3296,7 @@...@@ -3900,7 +3296,7 @@
3900 ========================================================================== */3296 ========================================================================== */
39013297
3902#define Q6_Vh_vasracc_VhVhR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh_acc)(Vx,Vu,Rt)3298#define Q6_Vh_vasracc_VhVhR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh_acc)(Vx,Vu,Rt)
3903#endif /* __HEXAGON_ARCH___ >= 65 */3299#endif
39043300
3905#if __HVX_ARCH__ >= 653301#if __HVX_ARCH__ >= 65
3906/* ==========================================================================3302/* ==========================================================================
...@@ -3911,7 +3307,7 @@...@@ -3911,7 +3307,7 @@
3911 ========================================================================== */3307 ========================================================================== */
39123308
3913#define Q6_Vub_vasr_VuhVuhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubrndsat)(Vu,Vv,Rt)3309#define Q6_Vub_vasr_VuhVuhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubrndsat)(Vu,Vv,Rt)
3914#endif /* __HEXAGON_ARCH___ >= 65 */3310#endif
39153311
3916#if __HVX_ARCH__ >= 653312#if __HVX_ARCH__ >= 65
3917/* ==========================================================================3313/* ==========================================================================
...@@ -3922,7 +3318,7 @@...@@ -3922,7 +3318,7 @@
3922 ========================================================================== */3318 ========================================================================== */
39233319
3924#define Q6_Vub_vasr_VuhVuhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubsat)(Vu,Vv,Rt)3320#define Q6_Vub_vasr_VuhVuhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubsat)(Vu,Vv,Rt)
3925#endif /* __HEXAGON_ARCH___ >= 65 */3321#endif
39263322
3927#if __HVX_ARCH__ >= 653323#if __HVX_ARCH__ >= 65
3928/* ==========================================================================3324/* ==========================================================================
...@@ -3933,7 +3329,7 @@...@@ -3933,7 +3329,7 @@
3933 ========================================================================== */3329 ========================================================================== */
39343330
3935#define Q6_Vuh_vasr_VuwVuwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhsat)(Vu,Vv,Rt)3331#define Q6_Vuh_vasr_VuwVuwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhsat)(Vu,Vv,Rt)
3936#endif /* __HEXAGON_ARCH___ >= 65 */3332#endif
39373333
3938#if __HVX_ARCH__ >= 653334#if __HVX_ARCH__ >= 65
3939/* ==========================================================================3335/* ==========================================================================
...@@ -3944,7 +3340,7 @@...@@ -3944,7 +3340,7 @@
3944 ========================================================================== */3340 ========================================================================== */
39453341
3946#define Q6_Vb_vavg_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgb)(Vu,Vv)3342#define Q6_Vb_vavg_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgb)(Vu,Vv)
3947#endif /* __HEXAGON_ARCH___ >= 65 */3343#endif
39483344
3949#if __HVX_ARCH__ >= 653345#if __HVX_ARCH__ >= 65
3950/* ==========================================================================3346/* ==========================================================================
...@@ -3955,7 +3351,7 @@...@@ -3955,7 +3351,7 @@
3955 ========================================================================== */3351 ========================================================================== */
39563352
3957#define Q6_Vb_vavg_VbVb_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgbrnd)(Vu,Vv)3353#define Q6_Vb_vavg_VbVb_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgbrnd)(Vu,Vv)
3958#endif /* __HEXAGON_ARCH___ >= 65 */3354#endif
39593355
3960#if __HVX_ARCH__ >= 653356#if __HVX_ARCH__ >= 65
3961/* ==========================================================================3357/* ==========================================================================
...@@ -3966,7 +3362,7 @@...@@ -3966,7 +3362,7 @@
3966 ========================================================================== */3362 ========================================================================== */
39673363
3968#define Q6_Vuw_vavg_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguw)(Vu,Vv)3364#define Q6_Vuw_vavg_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguw)(Vu,Vv)
3969#endif /* __HEXAGON_ARCH___ >= 65 */3365#endif
39703366
3971#if __HVX_ARCH__ >= 653367#if __HVX_ARCH__ >= 65
3972/* ==========================================================================3368/* ==========================================================================
...@@ -3977,7 +3373,7 @@...@@ -3977,7 +3373,7 @@
3977 ========================================================================== */3373 ========================================================================== */
39783374
3979#define Q6_Vuw_vavg_VuwVuw_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguwrnd)(Vu,Vv)3375#define Q6_Vuw_vavg_VuwVuw_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguwrnd)(Vu,Vv)
3980#endif /* __HEXAGON_ARCH___ >= 65 */3376#endif
39813377
3982#if __HVX_ARCH__ >= 653378#if __HVX_ARCH__ >= 65
3983/* ==========================================================================3379/* ==========================================================================
...@@ -3988,7 +3384,7 @@...@@ -3988,7 +3384,7 @@
3988 ========================================================================== */3384 ========================================================================== */
39893385
3990#define Q6_W_vzero() __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdd0)()3386#define Q6_W_vzero() __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdd0)()
3991#endif /* __HEXAGON_ARCH___ >= 65 */3387#endif
39923388
3993#if __HVX_ARCH__ >= 653389#if __HVX_ARCH__ >= 65
3994/* ==========================================================================3390/* ==========================================================================
...@@ -3999,7 +3395,7 @@...@@ -3999,7 +3395,7 @@
3999 ========================================================================== */3395 ========================================================================== */
40003396
4001#define Q6_vgather_ARMVh(Rs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermh)(Rs,Rt,Mu,Vv)3397#define Q6_vgather_ARMVh(Rs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermh)(Rs,Rt,Mu,Vv)
4002#endif /* __HEXAGON_ARCH___ >= 65 */3398#endif
40033399
4004#if __HVX_ARCH__ >= 653400#if __HVX_ARCH__ >= 65
4005/* ==========================================================================3401/* ==========================================================================
...@@ -4010,7 +3406,7 @@...@@ -4010,7 +3406,7 @@
4010 ========================================================================== */3406 ========================================================================== */
40113407
4012#define Q6_vgather_AQRMVh(Rs,Qs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv)3408#define Q6_vgather_AQRMVh(Rs,Qs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv)
4013#endif /* __HEXAGON_ARCH___ >= 65 */3409#endif
40143410
4015#if __HVX_ARCH__ >= 653411#if __HVX_ARCH__ >= 65
4016/* ==========================================================================3412/* ==========================================================================
...@@ -4021,7 +3417,7 @@...@@ -4021,7 +3417,7 @@
4021 ========================================================================== */3417 ========================================================================== */
40223418
4023#define Q6_vgather_ARMWw(Rs,Rt,Mu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhw)(Rs,Rt,Mu,Vvv)3419#define Q6_vgather_ARMWw(Rs,Rt,Mu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhw)(Rs,Rt,Mu,Vvv)
4024#endif /* __HEXAGON_ARCH___ >= 65 */3420#endif
40253421
4026#if __HVX_ARCH__ >= 653422#if __HVX_ARCH__ >= 65
4027/* ==========================================================================3423/* ==========================================================================
...@@ -4032,7 +3428,7 @@...@@ -4032,7 +3428,7 @@
4032 ========================================================================== */3428 ========================================================================== */
40333429
4034#define Q6_vgather_AQRMWw(Rs,Qs,Rt,Mu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhwq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vvv)3430#define Q6_vgather_AQRMWw(Rs,Qs,Rt,Mu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhwq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vvv)
4035#endif /* __HEXAGON_ARCH___ >= 65 */3431#endif
40363432
4037#if __HVX_ARCH__ >= 653433#if __HVX_ARCH__ >= 65
4038/* ==========================================================================3434/* ==========================================================================
...@@ -4043,7 +3439,7 @@...@@ -4043,7 +3439,7 @@
4043 ========================================================================== */3439 ========================================================================== */
40443440
4045#define Q6_vgather_ARMVw(Rs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermw)(Rs,Rt,Mu,Vv)3441#define Q6_vgather_ARMVw(Rs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermw)(Rs,Rt,Mu,Vv)
4046#endif /* __HEXAGON_ARCH___ >= 65 */3442#endif
40473443
4048#if __HVX_ARCH__ >= 653444#if __HVX_ARCH__ >= 65
4049/* ==========================================================================3445/* ==========================================================================
...@@ -4054,7 +3450,7 @@...@@ -4054,7 +3450,7 @@
4054 ========================================================================== */3450 ========================================================================== */
40553451
4056#define Q6_vgather_AQRMVw(Rs,Qs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermwq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv)3452#define Q6_vgather_AQRMVw(Rs,Qs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermwq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv)
4057#endif /* __HEXAGON_ARCH___ >= 65 */3453#endif
40583454
4059#if __HVX_ARCH__ >= 653455#if __HVX_ARCH__ >= 65
4060/* ==========================================================================3456/* ==========================================================================
...@@ -4065,7 +3461,7 @@...@@ -4065,7 +3461,7 @@
4065 ========================================================================== */3461 ========================================================================== */
40663462
4067#define Q6_Vh_vlut4_VuhPh(Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlut4)(Vu,Rtt)3463#define Q6_Vh_vlut4_VuhPh(Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlut4)(Vu,Rtt)
4068#endif /* __HEXAGON_ARCH___ >= 65 */3464#endif
40693465
4070#if __HVX_ARCH__ >= 653466#if __HVX_ARCH__ >= 65
4071/* ==========================================================================3467/* ==========================================================================
...@@ -4076,7 +3472,7 @@...@@ -4076,7 +3472,7 @@
4076 ========================================================================== */3472 ========================================================================== */
40773473
4078#define Q6_Wh_vmpa_WubRub(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu)(Vuu,Rt)3474#define Q6_Wh_vmpa_WubRub(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu)(Vuu,Rt)
4079#endif /* __HEXAGON_ARCH___ >= 65 */3475#endif
40803476
4081#if __HVX_ARCH__ >= 653477#if __HVX_ARCH__ >= 65
4082/* ==========================================================================3478/* ==========================================================================
...@@ -4087,7 +3483,7 @@...@@ -4087,7 +3483,7 @@
4087 ========================================================================== */3483 ========================================================================== */
40883484
4089#define Q6_Wh_vmpaacc_WhWubRub(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu_acc)(Vxx,Vuu,Rt)3485#define Q6_Wh_vmpaacc_WhWubRub(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu_acc)(Vxx,Vuu,Rt)
4090#endif /* __HEXAGON_ARCH___ >= 65 */3486#endif
40913487
4092#if __HVX_ARCH__ >= 653488#if __HVX_ARCH__ >= 65
4093/* ==========================================================================3489/* ==========================================================================
...@@ -4098,7 +3494,7 @@...@@ -4098,7 +3494,7 @@
4098 ========================================================================== */3494 ========================================================================== */
40993495
4100#define Q6_Vh_vmpa_VhVhVhPh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahhsat)(Vx,Vu,Rtt)3496#define Q6_Vh_vmpa_VhVhVhPh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahhsat)(Vx,Vu,Rtt)
4101#endif /* __HEXAGON_ARCH___ >= 65 */3497#endif
41023498
4103#if __HVX_ARCH__ >= 653499#if __HVX_ARCH__ >= 65
4104/* ==========================================================================3500/* ==========================================================================
...@@ -4109,7 +3505,7 @@...@@ -4109,7 +3505,7 @@
4109 ========================================================================== */3505 ========================================================================== */
41103506
4111#define Q6_Vh_vmpa_VhVhVuhPuh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhuhsat)(Vx,Vu,Rtt)3507#define Q6_Vh_vmpa_VhVhVuhPuh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhuhsat)(Vx,Vu,Rtt)
4112#endif /* __HEXAGON_ARCH___ >= 65 */3508#endif
41133509
4114#if __HVX_ARCH__ >= 653510#if __HVX_ARCH__ >= 65
4115/* ==========================================================================3511/* ==========================================================================
...@@ -4120,7 +3516,7 @@...@@ -4120,7 +3516,7 @@
4120 ========================================================================== */3516 ========================================================================== */
41213517
4122#define Q6_Vh_vmps_VhVhVuhPuh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpsuhuhsat)(Vx,Vu,Rtt)3518#define Q6_Vh_vmps_VhVhVuhPuh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpsuhuhsat)(Vx,Vu,Rtt)
4123#endif /* __HEXAGON_ARCH___ >= 65 */3519#endif
41243520
4125#if __HVX_ARCH__ >= 653521#if __HVX_ARCH__ >= 65
4126/* ==========================================================================3522/* ==========================================================================
...@@ -4131,7 +3527,7 @@...@@ -4131,7 +3527,7 @@
4131 ========================================================================== */3527 ========================================================================== */
41323528
4133#define Q6_Ww_vmpyacc_WwVhRh(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh_acc)(Vxx,Vu,Rt)3529#define Q6_Ww_vmpyacc_WwVhRh(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh_acc)(Vxx,Vu,Rt)
4134#endif /* __HEXAGON_ARCH___ >= 65 */3530#endif
41353531
4136#if __HVX_ARCH__ >= 653532#if __HVX_ARCH__ >= 65
4137/* ==========================================================================3533/* ==========================================================================
...@@ -4142,7 +3538,7 @@...@@ -4142,7 +3538,7 @@
4142 ========================================================================== */3538 ========================================================================== */
41433539
4144#define Q6_Vuw_vmpye_VuhRuh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe)(Vu,Rt)3540#define Q6_Vuw_vmpye_VuhRuh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe)(Vu,Rt)
4145#endif /* __HEXAGON_ARCH___ >= 65 */3541#endif
41463542
4147#if __HVX_ARCH__ >= 653543#if __HVX_ARCH__ >= 65
4148/* ==========================================================================3544/* ==========================================================================
...@@ -4153,7 +3549,7 @@...@@ -4153,7 +3549,7 @@
4153 ========================================================================== */3549 ========================================================================== */
41543550
4155#define Q6_Vuw_vmpyeacc_VuwVuhRuh(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe_acc)(Vx,Vu,Rt)3551#define Q6_Vuw_vmpyeacc_VuwVuhRuh(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe_acc)(Vx,Vu,Rt)
4156#endif /* __HEXAGON_ARCH___ >= 65 */3552#endif
41573553
4158#if __HVX_ARCH__ >= 653554#if __HVX_ARCH__ >= 65
4159/* ==========================================================================3555/* ==========================================================================
...@@ -4164,7 +3560,7 @@...@@ -4164,7 +3560,7 @@
4164 ========================================================================== */3560 ========================================================================== */
41653561
4166#define Q6_Vb_vnavg_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgb)(Vu,Vv)3562#define Q6_Vb_vnavg_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgb)(Vu,Vv)
4167#endif /* __HEXAGON_ARCH___ >= 65 */3563#endif
41683564
4169#if __HVX_ARCH__ >= 653565#if __HVX_ARCH__ >= 65
4170/* ==========================================================================3566/* ==========================================================================
...@@ -4175,7 +3571,7 @@...@@ -4175,7 +3571,7 @@
4175 ========================================================================== */3571 ========================================================================== */
41763572
4177#define Q6_Vb_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqb)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1))3573#define Q6_Vb_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqb)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1))
4178#endif /* __HEXAGON_ARCH___ >= 65 */3574#endif
41793575
4180#if __HVX_ARCH__ >= 653576#if __HVX_ARCH__ >= 65
4181/* ==========================================================================3577/* ==========================================================================
...@@ -4186,7 +3582,7 @@...@@ -4186,7 +3582,7 @@
4186 ========================================================================== */3582 ========================================================================== */
41873583
4188#define Q6_Vh_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqh)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1))3584#define Q6_Vh_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqh)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1))
4189#endif /* __HEXAGON_ARCH___ >= 65 */3585#endif
41903586
4191#if __HVX_ARCH__ >= 653587#if __HVX_ARCH__ >= 65
4192/* ==========================================================================3588/* ==========================================================================
...@@ -4197,7 +3593,7 @@...@@ -4197,7 +3593,7 @@
4197 ========================================================================== */3593 ========================================================================== */
41983594
4199#define Q6_Vw_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqw)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1))3595#define Q6_Vw_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqw)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1))
4200#endif /* __HEXAGON_ARCH___ >= 65 */3596#endif
42013597
4202#if __HVX_ARCH__ >= 653598#if __HVX_ARCH__ >= 65
4203/* ==========================================================================3599/* ==========================================================================
...@@ -4208,7 +3604,7 @@...@@ -4208,7 +3604,7 @@
4208 ========================================================================== */3604 ========================================================================== */
42093605
4210#define Q6_vscatter_RMVhV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh)(Rt,Mu,Vv,Vw)3606#define Q6_vscatter_RMVhV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh)(Rt,Mu,Vv,Vw)
4211#endif /* __HEXAGON_ARCH___ >= 65 */3607#endif
42123608
4213#if __HVX_ARCH__ >= 653609#if __HVX_ARCH__ >= 65
4214/* ==========================================================================3610/* ==========================================================================
...@@ -4219,7 +3615,7 @@...@@ -4219,7 +3615,7 @@
4219 ========================================================================== */3615 ========================================================================== */
42203616
4221#define Q6_vscatteracc_RMVhV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh_add)(Rt,Mu,Vv,Vw)3617#define Q6_vscatteracc_RMVhV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh_add)(Rt,Mu,Vv,Vw)
4222#endif /* __HEXAGON_ARCH___ >= 65 */3618#endif
42233619
4224#if __HVX_ARCH__ >= 653620#if __HVX_ARCH__ >= 65
4225/* ==========================================================================3621/* ==========================================================================
...@@ -4230,7 +3626,7 @@...@@ -4230,7 +3626,7 @@
4230 ========================================================================== */3626 ========================================================================== */
42313627
4232#define Q6_vscatter_QRMVhV(Qs,Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv,Vw)3628#define Q6_vscatter_QRMVhV(Qs,Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv,Vw)
4233#endif /* __HEXAGON_ARCH___ >= 65 */3629#endif
42343630
4235#if __HVX_ARCH__ >= 653631#if __HVX_ARCH__ >= 65
4236/* ==========================================================================3632/* ==========================================================================
...@@ -4241,7 +3637,7 @@...@@ -4241,7 +3637,7 @@
4241 ========================================================================== */3637 ========================================================================== */
42423638
4243#define Q6_vscatter_RMWwV(Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw)(Rt,Mu,Vvv,Vw)3639#define Q6_vscatter_RMWwV(Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw)(Rt,Mu,Vvv,Vw)
4244#endif /* __HEXAGON_ARCH___ >= 65 */3640#endif
42453641
4246#if __HVX_ARCH__ >= 653642#if __HVX_ARCH__ >= 65
4247/* ==========================================================================3643/* ==========================================================================
...@@ -4252,7 +3648,7 @@...@@ -4252,7 +3648,7 @@
4252 ========================================================================== */3648 ========================================================================== */
42533649
4254#define Q6_vscatteracc_RMWwV(Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw_add)(Rt,Mu,Vvv,Vw)3650#define Q6_vscatteracc_RMWwV(Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw_add)(Rt,Mu,Vvv,Vw)
4255#endif /* __HEXAGON_ARCH___ >= 65 */3651#endif
42563652
4257#if __HVX_ARCH__ >= 653653#if __HVX_ARCH__ >= 65
4258/* ==========================================================================3654/* ==========================================================================
...@@ -4263,7 +3659,7 @@...@@ -4263,7 +3659,7 @@
4263 ========================================================================== */3659 ========================================================================== */
42643660
4265#define Q6_vscatter_QRMWwV(Qs,Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vvv,Vw)3661#define Q6_vscatter_QRMWwV(Qs,Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vvv,Vw)
4266#endif /* __HEXAGON_ARCH___ >= 65 */3662#endif
42673663
4268#if __HVX_ARCH__ >= 653664#if __HVX_ARCH__ >= 65
4269/* ==========================================================================3665/* ==========================================================================
...@@ -4274,7 +3670,7 @@...@@ -4274,7 +3670,7 @@
4274 ========================================================================== */3670 ========================================================================== */
42753671
4276#define Q6_vscatter_RMVwV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw)(Rt,Mu,Vv,Vw)3672#define Q6_vscatter_RMVwV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw)(Rt,Mu,Vv,Vw)
4277#endif /* __HEXAGON_ARCH___ >= 65 */3673#endif
42783674
4279#if __HVX_ARCH__ >= 653675#if __HVX_ARCH__ >= 65
4280/* ==========================================================================3676/* ==========================================================================
...@@ -4285,7 +3681,7 @@...@@ -4285,7 +3681,7 @@
4285 ========================================================================== */3681 ========================================================================== */
42863682
4287#define Q6_vscatteracc_RMVwV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw_add)(Rt,Mu,Vv,Vw)3683#define Q6_vscatteracc_RMVwV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw_add)(Rt,Mu,Vv,Vw)
4288#endif /* __HEXAGON_ARCH___ >= 65 */3684#endif
42893685
4290#if __HVX_ARCH__ >= 653686#if __HVX_ARCH__ >= 65
4291/* ==========================================================================3687/* ==========================================================================
...@@ -4296,7 +3692,7 @@...@@ -4296,7 +3692,7 @@
4296 ========================================================================== */3692 ========================================================================== */
42973693
4298#define Q6_vscatter_QRMVwV(Qs,Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv,Vw)3694#define Q6_vscatter_QRMVwV(Qs,Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv,Vw)
4299#endif /* __HEXAGON_ARCH___ >= 65 */3695#endif
43003696
4301#if __HVX_ARCH__ >= 663697#if __HVX_ARCH__ >= 66
4302/* ==========================================================================3698/* ==========================================================================
...@@ -4307,7 +3703,7 @@...@@ -4307,7 +3703,7 @@
4307 ========================================================================== */3703 ========================================================================== */
43083704
4309#define Q6_Vw_vadd_VwVwQ_carry_sat(Vu,Vv,Qs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarrysat)(Vu,Vv,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1))3705#define Q6_Vw_vadd_VwVwQ_carry_sat(Vu,Vv,Qs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarrysat)(Vu,Vv,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1))
4310#endif /* __HEXAGON_ARCH___ >= 66 */3706#endif
43113707
4312#if __HVX_ARCH__ >= 663708#if __HVX_ARCH__ >= 66
4313/* ==========================================================================3709/* ==========================================================================
...@@ -4318,7 +3714,7 @@...@@ -4318,7 +3714,7 @@
4318 ========================================================================== */3714 ========================================================================== */
43193715
4320#define Q6_Ww_vasrinto_WwVwVw(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasr_into)(Vxx,Vu,Vv)3716#define Q6_Ww_vasrinto_WwVwVw(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasr_into)(Vxx,Vu,Vv)
4321#endif /* __HEXAGON_ARCH___ >= 66 */3717#endif
43223718
4323#if __HVX_ARCH__ >= 663719#if __HVX_ARCH__ >= 66
4324/* ==========================================================================3720/* ==========================================================================
...@@ -4329,7 +3725,7 @@...@@ -4329,7 +3725,7 @@
4329 ========================================================================== */3725 ========================================================================== */
43303726
4331#define Q6_Vuw_vrotr_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrotr)(Vu,Vv)3727#define Q6_Vuw_vrotr_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrotr)(Vu,Vv)
4332#endif /* __HEXAGON_ARCH___ >= 66 */3728#endif
43333729
4334#if __HVX_ARCH__ >= 663730#if __HVX_ARCH__ >= 66
4335/* ==========================================================================3731/* ==========================================================================
...@@ -4340,7 +3736,7 @@...@@ -4340,7 +3736,7 @@
4340 ========================================================================== */3736 ========================================================================== */
43413737
4342#define Q6_Vw_vsatdw_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatdw)(Vu,Vv)3738#define Q6_Vw_vsatdw_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatdw)(Vu,Vv)
4343#endif /* __HEXAGON_ARCH___ >= 66 */3739#endif
43443740
4345#if __HVX_ARCH__ >= 683741#if __HVX_ARCH__ >= 68
4346/* ==========================================================================3742/* ==========================================================================
...@@ -4351,7 +3747,7 @@...@@ -4351,7 +3747,7 @@
4351 ========================================================================== */3747 ========================================================================== */
43523748
4353#define Q6_Ww_v6mpy_WubWbI_h(Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10)(Vuu,Vvv,Iu2)3749#define Q6_Ww_v6mpy_WubWbI_h(Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10)(Vuu,Vvv,Iu2)
4354#endif /* __HEXAGON_ARCH___ >= 68 */3750#endif
43553751
4356#if __HVX_ARCH__ >= 683752#if __HVX_ARCH__ >= 68
4357/* ==========================================================================3753/* ==========================================================================
...@@ -4362,7 +3758,7 @@...@@ -4362,7 +3758,7 @@
4362 ========================================================================== */3758 ========================================================================== */
43633759
4364#define Q6_Ww_v6mpyacc_WwWubWbI_h(Vxx,Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10_vxx)(Vxx,Vuu,Vvv,Iu2)3760#define Q6_Ww_v6mpyacc_WwWubWbI_h(Vxx,Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10_vxx)(Vxx,Vuu,Vvv,Iu2)
4365#endif /* __HEXAGON_ARCH___ >= 68 */3761#endif
43663762
4367#if __HVX_ARCH__ >= 683763#if __HVX_ARCH__ >= 68
4368/* ==========================================================================3764/* ==========================================================================
...@@ -4373,7 +3769,7 @@...@@ -4373,7 +3769,7 @@
4373 ========================================================================== */3769 ========================================================================== */
43743770
4375#define Q6_Ww_v6mpy_WubWbI_v(Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10)(Vuu,Vvv,Iu2)3771#define Q6_Ww_v6mpy_WubWbI_v(Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10)(Vuu,Vvv,Iu2)
4376#endif /* __HEXAGON_ARCH___ >= 68 */3772#endif
43773773
4378#if __HVX_ARCH__ >= 683774#if __HVX_ARCH__ >= 68
4379/* ==========================================================================3775/* ==========================================================================
...@@ -4384,9 +3780,9 @@...@@ -4384,9 +3780,9 @@
4384 ========================================================================== */3780 ========================================================================== */
43853781
4386#define Q6_Ww_v6mpyacc_WwWubWbI_v(Vxx,Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10_vxx)(Vxx,Vuu,Vvv,Iu2)3782#define Q6_Ww_v6mpyacc_WwWubWbI_v(Vxx,Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10_vxx)(Vxx,Vuu,Vvv,Iu2)
4387#endif /* __HEXAGON_ARCH___ >= 68 */3783#endif
43883784
4389#if __HVX_ARCH__ >= 683785#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4390/* ==========================================================================3786/* ==========================================================================
4391 Assembly Syntax: Vd32.hf=vabs(Vu32.hf)3787 Assembly Syntax: Vd32.hf=vabs(Vu32.hf)
4392 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vabs_Vhf(HVX_Vector Vu)3788 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vabs_Vhf(HVX_Vector Vu)
...@@ -4395,9 +3791,9 @@...@@ -4395,9 +3791,9 @@
4395 ========================================================================== */3791 ========================================================================== */
43963792
4397#define Q6_Vhf_vabs_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_hf)(Vu)3793#define Q6_Vhf_vabs_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_hf)(Vu)
4398#endif /* __HEXAGON_ARCH___ >= 68 */3794#endif
43993795
4400#if __HVX_ARCH__ >= 683796#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4401/* ==========================================================================3797/* ==========================================================================
4402 Assembly Syntax: Vd32.sf=vabs(Vu32.sf)3798 Assembly Syntax: Vd32.sf=vabs(Vu32.sf)
4403 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vabs_Vsf(HVX_Vector Vu)3799 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vabs_Vsf(HVX_Vector Vu)
...@@ -4406,7 +3802,7 @@...@@ -4406,7 +3802,7 @@
4406 ========================================================================== */3802 ========================================================================== */
44073803
4408#define Q6_Vsf_vabs_Vsf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_sf)(Vu)3804#define Q6_Vsf_vabs_Vsf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_sf)(Vu)
4409#endif /* __HEXAGON_ARCH___ >= 68 */3805#endif
44103806
4411#if __HVX_ARCH__ >= 683807#if __HVX_ARCH__ >= 68
4412/* ==========================================================================3808/* ==========================================================================
...@@ -4417,9 +3813,9 @@...@@ -4417,9 +3813,9 @@
4417 ========================================================================== */3813 ========================================================================== */
44183814
4419#define Q6_Vqf16_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf)(Vu,Vv)3815#define Q6_Vqf16_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf)(Vu,Vv)
4420#endif /* __HEXAGON_ARCH___ >= 68 */3816#endif
44213817
4422#if __HVX_ARCH__ >= 683818#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4423/* ==========================================================================3819/* ==========================================================================
4424 Assembly Syntax: Vd32.hf=vadd(Vu32.hf,Vv32.hf)3820 Assembly Syntax: Vd32.hf=vadd(Vu32.hf,Vv32.hf)
4425 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)3821 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4428,7 +3824,7 @@...@@ -4428,7 +3824,7 @@
4428 ========================================================================== */3824 ========================================================================== */
44293825
4430#define Q6_Vhf_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf_hf)(Vu,Vv)3826#define Q6_Vhf_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf_hf)(Vu,Vv)
4431#endif /* __HEXAGON_ARCH___ >= 68 */3827#endif
44323828
4433#if __HVX_ARCH__ >= 683829#if __HVX_ARCH__ >= 68
4434/* ==========================================================================3830/* ==========================================================================
...@@ -4439,7 +3835,7 @@...@@ -4439,7 +3835,7 @@
4439 ========================================================================== */3835 ========================================================================== */
44403836
4441#define Q6_Vqf16_vadd_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf16)(Vu,Vv)3837#define Q6_Vqf16_vadd_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf16)(Vu,Vv)
4442#endif /* __HEXAGON_ARCH___ >= 68 */3838#endif
44433839
4444#if __HVX_ARCH__ >= 683840#if __HVX_ARCH__ >= 68
4445/* ==========================================================================3841/* ==========================================================================
...@@ -4450,7 +3846,7 @@...@@ -4450,7 +3846,7 @@
4450 ========================================================================== */3846 ========================================================================== */
44513847
4452#define Q6_Vqf16_vadd_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf16_mix)(Vu,Vv)3848#define Q6_Vqf16_vadd_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf16_mix)(Vu,Vv)
4453#endif /* __HEXAGON_ARCH___ >= 68 */3849#endif
44543850
4455#if __HVX_ARCH__ >= 683851#if __HVX_ARCH__ >= 68
4456/* ==========================================================================3852/* ==========================================================================
...@@ -4461,7 +3857,7 @@...@@ -4461,7 +3857,7 @@
4461 ========================================================================== */3857 ========================================================================== */
44623858
4463#define Q6_Vqf32_vadd_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf32)(Vu,Vv)3859#define Q6_Vqf32_vadd_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf32)(Vu,Vv)
4464#endif /* __HEXAGON_ARCH___ >= 68 */3860#endif
44653861
4466#if __HVX_ARCH__ >= 683862#if __HVX_ARCH__ >= 68
4467/* ==========================================================================3863/* ==========================================================================
...@@ -4472,7 +3868,7 @@...@@ -4472,7 +3868,7 @@
4472 ========================================================================== */3868 ========================================================================== */
44733869
4474#define Q6_Vqf32_vadd_Vqf32Vsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf32_mix)(Vu,Vv)3870#define Q6_Vqf32_vadd_Vqf32Vsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf32_mix)(Vu,Vv)
4475#endif /* __HEXAGON_ARCH___ >= 68 */3871#endif
44763872
4477#if __HVX_ARCH__ >= 683873#if __HVX_ARCH__ >= 68
4478/* ==========================================================================3874/* ==========================================================================
...@@ -4483,9 +3879,9 @@...@@ -4483,9 +3879,9 @@
4483 ========================================================================== */3879 ========================================================================== */
44843880
4485#define Q6_Vqf32_vadd_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf)(Vu,Vv)3881#define Q6_Vqf32_vadd_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf)(Vu,Vv)
4486#endif /* __HEXAGON_ARCH___ >= 68 */3882#endif
44873883
4488#if __HVX_ARCH__ >= 683884#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4489/* ==========================================================================3885/* ==========================================================================
4490 Assembly Syntax: Vdd32.sf=vadd(Vu32.hf,Vv32.hf)3886 Assembly Syntax: Vdd32.sf=vadd(Vu32.hf,Vv32.hf)
4491 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)3887 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4494,9 +3890,9 @@...@@ -4494,9 +3890,9 @@
4494 ========================================================================== */3890 ========================================================================== */
44953891
4496#define Q6_Wsf_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_hf)(Vu,Vv)3892#define Q6_Wsf_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_hf)(Vu,Vv)
4497#endif /* __HEXAGON_ARCH___ >= 68 */3893#endif
44983894
4499#if __HVX_ARCH__ >= 683895#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4500/* ==========================================================================3896/* ==========================================================================
4501 Assembly Syntax: Vd32.sf=vadd(Vu32.sf,Vv32.sf)3897 Assembly Syntax: Vd32.sf=vadd(Vu32.sf,Vv32.sf)
4502 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vadd_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)3898 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vadd_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4505,9 +3901,9 @@...@@ -4505,9 +3901,9 @@
4505 ========================================================================== */3901 ========================================================================== */
45063902
4507#define Q6_Vsf_vadd_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_sf)(Vu,Vv)3903#define Q6_Vsf_vadd_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_sf)(Vu,Vv)
4508#endif /* __HEXAGON_ARCH___ >= 68 */3904#endif
45093905
4510#if __HVX_ARCH__ >= 683906#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4511/* ==========================================================================3907/* ==========================================================================
4512 Assembly Syntax: Vd32.w=vfmv(Vu32.w)3908 Assembly Syntax: Vd32.w=vfmv(Vu32.w)
4513 C Intrinsic Prototype: HVX_Vector Q6_Vw_vfmv_Vw(HVX_Vector Vu)3909 C Intrinsic Prototype: HVX_Vector Q6_Vw_vfmv_Vw(HVX_Vector Vu)
...@@ -4516,7 +3912,7 @@...@@ -4516,7 +3912,7 @@
4516 ========================================================================== */3912 ========================================================================== */
45173913
4518#define Q6_Vw_vfmv_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign_fp)(Vu)3914#define Q6_Vw_vfmv_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign_fp)(Vu)
4519#endif /* __HEXAGON_ARCH___ >= 68 */3915#endif
45203916
4521#if __HVX_ARCH__ >= 683917#if __HVX_ARCH__ >= 68
4522/* ==========================================================================3918/* ==========================================================================
...@@ -4527,7 +3923,7 @@...@@ -4527,7 +3923,7 @@
4527 ========================================================================== */3923 ========================================================================== */
45283924
4529#define Q6_Vhf_equals_Vqf16(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_qf16)(Vu)3925#define Q6_Vhf_equals_Vqf16(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_qf16)(Vu)
4530#endif /* __HEXAGON_ARCH___ >= 68 */3926#endif
45313927
4532#if __HVX_ARCH__ >= 683928#if __HVX_ARCH__ >= 68
4533/* ==========================================================================3929/* ==========================================================================
...@@ -4538,7 +3934,7 @@...@@ -4538,7 +3934,7 @@
4538 ========================================================================== */3934 ========================================================================== */
45393935
4540#define Q6_Vhf_equals_Wqf32(Vuu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_qf32)(Vuu)3936#define Q6_Vhf_equals_Wqf32(Vuu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_qf32)(Vuu)
4541#endif /* __HEXAGON_ARCH___ >= 68 */3937#endif
45423938
4543#if __HVX_ARCH__ >= 683939#if __HVX_ARCH__ >= 68
4544/* ==========================================================================3940/* ==========================================================================
...@@ -4549,9 +3945,9 @@...@@ -4549,9 +3945,9 @@
4549 ========================================================================== */3945 ========================================================================== */
45503946
4551#define Q6_Vsf_equals_Vqf32(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_sf_qf32)(Vu)3947#define Q6_Vsf_equals_Vqf32(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_sf_qf32)(Vu)
4552#endif /* __HEXAGON_ARCH___ >= 68 */3948#endif
45533949
4554#if __HVX_ARCH__ >= 683950#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4555/* ==========================================================================3951/* ==========================================================================
4556 Assembly Syntax: Vd32.b=vcvt(Vu32.hf,Vv32.hf)3952 Assembly Syntax: Vd32.b=vcvt(Vu32.hf,Vv32.hf)
4557 C Intrinsic Prototype: HVX_Vector Q6_Vb_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)3953 C Intrinsic Prototype: HVX_Vector Q6_Vb_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4560,9 +3956,9 @@...@@ -4560,9 +3956,9 @@
4560 ========================================================================== */3956 ========================================================================== */
45613957
4562#define Q6_Vb_vcvt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_b_hf)(Vu,Vv)3958#define Q6_Vb_vcvt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_b_hf)(Vu,Vv)
4563#endif /* __HEXAGON_ARCH___ >= 68 */3959#endif
45643960
4565#if __HVX_ARCH__ >= 683961#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4566/* ==========================================================================3962/* ==========================================================================
4567 Assembly Syntax: Vd32.h=vcvt(Vu32.hf)3963 Assembly Syntax: Vd32.h=vcvt(Vu32.hf)
4568 C Intrinsic Prototype: HVX_Vector Q6_Vh_vcvt_Vhf(HVX_Vector Vu)3964 C Intrinsic Prototype: HVX_Vector Q6_Vh_vcvt_Vhf(HVX_Vector Vu)
...@@ -4571,9 +3967,9 @@...@@ -4571,9 +3967,9 @@
4571 ========================================================================== */3967 ========================================================================== */
45723968
4573#define Q6_Vh_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_h_hf)(Vu)3969#define Q6_Vh_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_h_hf)(Vu)
4574#endif /* __HEXAGON_ARCH___ >= 68 */3970#endif
45753971
4576#if __HVX_ARCH__ >= 683972#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4577/* ==========================================================================3973/* ==========================================================================
4578 Assembly Syntax: Vdd32.hf=vcvt(Vu32.b)3974 Assembly Syntax: Vdd32.hf=vcvt(Vu32.b)
4579 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_Vb(HVX_Vector Vu)3975 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_Vb(HVX_Vector Vu)
...@@ -4582,9 +3978,9 @@...@@ -4582,9 +3978,9 @@
4582 ========================================================================== */3978 ========================================================================== */
45833979
4584#define Q6_Whf_vcvt_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_b)(Vu)3980#define Q6_Whf_vcvt_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_b)(Vu)
4585#endif /* __HEXAGON_ARCH___ >= 68 */3981#endif
45863982
4587#if __HVX_ARCH__ >= 683983#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4588/* ==========================================================================3984/* ==========================================================================
4589 Assembly Syntax: Vd32.hf=vcvt(Vu32.h)3985 Assembly Syntax: Vd32.hf=vcvt(Vu32.h)
4590 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_Vh(HVX_Vector Vu)3986 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_Vh(HVX_Vector Vu)
...@@ -4593,9 +3989,9 @@...@@ -4593,9 +3989,9 @@
4593 ========================================================================== */3989 ========================================================================== */
45943990
4595#define Q6_Vhf_vcvt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_h)(Vu)3991#define Q6_Vhf_vcvt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_h)(Vu)
4596#endif /* __HEXAGON_ARCH___ >= 68 */3992#endif
45973993
4598#if __HVX_ARCH__ >= 683994#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4599/* ==========================================================================3995/* ==========================================================================
4600 Assembly Syntax: Vd32.hf=vcvt(Vu32.sf,Vv32.sf)3996 Assembly Syntax: Vd32.hf=vcvt(Vu32.sf,Vv32.sf)
4601 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)3997 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4604,9 +4000,9 @@...@@ -4604,9 +4000,9 @@
4604 ========================================================================== */4000 ========================================================================== */
46054001
4606#define Q6_Vhf_vcvt_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_sf)(Vu,Vv)4002#define Q6_Vhf_vcvt_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_sf)(Vu,Vv)
4607#endif /* __HEXAGON_ARCH___ >= 68 */4003#endif
46084004
4609#if __HVX_ARCH__ >= 684005#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4610/* ==========================================================================4006/* ==========================================================================
4611 Assembly Syntax: Vdd32.hf=vcvt(Vu32.ub)4007 Assembly Syntax: Vdd32.hf=vcvt(Vu32.ub)
4612 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_Vub(HVX_Vector Vu)4008 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_Vub(HVX_Vector Vu)
...@@ -4615,9 +4011,9 @@...@@ -4615,9 +4011,9 @@
4615 ========================================================================== */4011 ========================================================================== */
46164012
4617#define Q6_Whf_vcvt_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_ub)(Vu)4013#define Q6_Whf_vcvt_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_ub)(Vu)
4618#endif /* __HEXAGON_ARCH___ >= 68 */4014#endif
46194015
4620#if __HVX_ARCH__ >= 684016#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4621/* ==========================================================================4017/* ==========================================================================
4622 Assembly Syntax: Vd32.hf=vcvt(Vu32.uh)4018 Assembly Syntax: Vd32.hf=vcvt(Vu32.uh)
4623 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_Vuh(HVX_Vector Vu)4019 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_Vuh(HVX_Vector Vu)
...@@ -4626,9 +4022,9 @@...@@ -4626,9 +4022,9 @@
4626 ========================================================================== */4022 ========================================================================== */
46274023
4628#define Q6_Vhf_vcvt_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_uh)(Vu)4024#define Q6_Vhf_vcvt_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_uh)(Vu)
4629#endif /* __HEXAGON_ARCH___ >= 68 */4025#endif
46304026
4631#if __HVX_ARCH__ >= 684027#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4632/* ==========================================================================4028/* ==========================================================================
4633 Assembly Syntax: Vdd32.sf=vcvt(Vu32.hf)4029 Assembly Syntax: Vdd32.sf=vcvt(Vu32.hf)
4634 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vcvt_Vhf(HVX_Vector Vu)4030 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vcvt_Vhf(HVX_Vector Vu)
...@@ -4637,9 +4033,9 @@...@@ -4637,9 +4033,9 @@
4637 ========================================================================== */4033 ========================================================================== */
46384034
4639#define Q6_Wsf_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_sf_hf)(Vu)4035#define Q6_Wsf_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_sf_hf)(Vu)
4640#endif /* __HEXAGON_ARCH___ >= 68 */4036#endif
46414037
4642#if __HVX_ARCH__ >= 684038#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4643/* ==========================================================================4039/* ==========================================================================
4644 Assembly Syntax: Vd32.ub=vcvt(Vu32.hf,Vv32.hf)4040 Assembly Syntax: Vd32.ub=vcvt(Vu32.hf,Vv32.hf)
4645 C Intrinsic Prototype: HVX_Vector Q6_Vub_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)4041 C Intrinsic Prototype: HVX_Vector Q6_Vub_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4648,9 +4044,9 @@...@@ -4648,9 +4044,9 @@
4648 ========================================================================== */4044 ========================================================================== */
46494045
4650#define Q6_Vub_vcvt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_ub_hf)(Vu,Vv)4046#define Q6_Vub_vcvt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_ub_hf)(Vu,Vv)
4651#endif /* __HEXAGON_ARCH___ >= 68 */4047#endif
46524048
4653#if __HVX_ARCH__ >= 684049#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4654/* ==========================================================================4050/* ==========================================================================
4655 Assembly Syntax: Vd32.uh=vcvt(Vu32.hf)4051 Assembly Syntax: Vd32.uh=vcvt(Vu32.hf)
4656 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcvt_Vhf(HVX_Vector Vu)4052 C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcvt_Vhf(HVX_Vector Vu)
...@@ -4659,9 +4055,9 @@...@@ -4659,9 +4055,9 @@
4659 ========================================================================== */4055 ========================================================================== */
46604056
4661#define Q6_Vuh_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_uh_hf)(Vu)4057#define Q6_Vuh_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_uh_hf)(Vu)
4662#endif /* __HEXAGON_ARCH___ >= 68 */4058#endif
46634059
4664#if __HVX_ARCH__ >= 684060#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4665/* ==========================================================================4061/* ==========================================================================
4666 Assembly Syntax: Vd32.sf=vdmpy(Vu32.hf,Vv32.hf)4062 Assembly Syntax: Vd32.sf=vdmpy(Vu32.hf,Vv32.hf)
4667 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vdmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)4063 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vdmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4670,9 +4066,9 @@...@@ -4670,9 +4066,9 @@
4670 ========================================================================== */4066 ========================================================================== */
46714067
4672#define Q6_Vsf_vdmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpy_sf_hf)(Vu,Vv)4068#define Q6_Vsf_vdmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpy_sf_hf)(Vu,Vv)
4673#endif /* __HEXAGON_ARCH___ >= 68 */4069#endif
46744070
4675#if __HVX_ARCH__ >= 684071#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4676/* ==========================================================================4072/* ==========================================================================
4677 Assembly Syntax: Vx32.sf+=vdmpy(Vu32.hf,Vv32.hf)4073 Assembly Syntax: Vx32.sf+=vdmpy(Vu32.hf,Vv32.hf)
4678 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vdmpyacc_VsfVhfVhf(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)4074 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vdmpyacc_VsfVhfVhf(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -4681,9 +4077,9 @@...@@ -4681,9 +4077,9 @@
4681 ========================================================================== */4077 ========================================================================== */
46824078
4683#define Q6_Vsf_vdmpyacc_VsfVhfVhf(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpy_sf_hf_acc)(Vx,Vu,Vv)4079#define Q6_Vsf_vdmpyacc_VsfVhfVhf(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpy_sf_hf_acc)(Vx,Vu,Vv)
4684#endif /* __HEXAGON_ARCH___ >= 68 */4080#endif
46854081
4686#if __HVX_ARCH__ >= 684082#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4687/* ==========================================================================4083/* ==========================================================================
4688 Assembly Syntax: Vd32.hf=vfmax(Vu32.hf,Vv32.hf)4084 Assembly Syntax: Vd32.hf=vfmax(Vu32.hf,Vv32.hf)
4689 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfmax_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)4085 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfmax_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4692,9 +4088,9 @@...@@ -4692,9 +4088,9 @@
4692 ========================================================================== */4088 ========================================================================== */
46934089
4694#define Q6_Vhf_vfmax_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_hf)(Vu,Vv)4090#define Q6_Vhf_vfmax_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_hf)(Vu,Vv)
4695#endif /* __HEXAGON_ARCH___ >= 68 */4091#endif
46964092
4697#if __HVX_ARCH__ >= 684093#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4698/* ==========================================================================4094/* ==========================================================================
4699 Assembly Syntax: Vd32.sf=vfmax(Vu32.sf,Vv32.sf)4095 Assembly Syntax: Vd32.sf=vfmax(Vu32.sf,Vv32.sf)
4700 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfmax_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)4096 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfmax_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4703,9 +4099,9 @@...@@ -4703,9 +4099,9 @@
4703 ========================================================================== */4099 ========================================================================== */
47044100
4705#define Q6_Vsf_vfmax_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_sf)(Vu,Vv)4101#define Q6_Vsf_vfmax_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_sf)(Vu,Vv)
4706#endif /* __HEXAGON_ARCH___ >= 68 */4102#endif
47074103
4708#if __HVX_ARCH__ >= 684104#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4709/* ==========================================================================4105/* ==========================================================================
4710 Assembly Syntax: Vd32.hf=vfmin(Vu32.hf,Vv32.hf)4106 Assembly Syntax: Vd32.hf=vfmin(Vu32.hf,Vv32.hf)
4711 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfmin_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)4107 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfmin_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4714,9 +4110,9 @@...@@ -4714,9 +4110,9 @@
4714 ========================================================================== */4110 ========================================================================== */
47154111
4716#define Q6_Vhf_vfmin_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_hf)(Vu,Vv)4112#define Q6_Vhf_vfmin_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_hf)(Vu,Vv)
4717#endif /* __HEXAGON_ARCH___ >= 68 */4113#endif
47184114
4719#if __HVX_ARCH__ >= 684115#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4720/* ==========================================================================4116/* ==========================================================================
4721 Assembly Syntax: Vd32.sf=vfmin(Vu32.sf,Vv32.sf)4117 Assembly Syntax: Vd32.sf=vfmin(Vu32.sf,Vv32.sf)
4722 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfmin_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)4118 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfmin_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4725,9 +4121,9 @@...@@ -4725,9 +4121,9 @@
4725 ========================================================================== */4121 ========================================================================== */
47264122
4727#define Q6_Vsf_vfmin_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_sf)(Vu,Vv)4123#define Q6_Vsf_vfmin_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_sf)(Vu,Vv)
4728#endif /* __HEXAGON_ARCH___ >= 68 */4124#endif
47294125
4730#if __HVX_ARCH__ >= 684126#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4731/* ==========================================================================4127/* ==========================================================================
4732 Assembly Syntax: Vd32.hf=vfneg(Vu32.hf)4128 Assembly Syntax: Vd32.hf=vfneg(Vu32.hf)
4733 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfneg_Vhf(HVX_Vector Vu)4129 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfneg_Vhf(HVX_Vector Vu)
...@@ -4736,9 +4132,9 @@...@@ -4736,9 +4132,9 @@
4736 ========================================================================== */4132 ========================================================================== */
47374133
4738#define Q6_Vhf_vfneg_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_hf)(Vu)4134#define Q6_Vhf_vfneg_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_hf)(Vu)
4739#endif /* __HEXAGON_ARCH___ >= 68 */4135#endif
47404136
4741#if __HVX_ARCH__ >= 684137#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4742/* ==========================================================================4138/* ==========================================================================
4743 Assembly Syntax: Vd32.sf=vfneg(Vu32.sf)4139 Assembly Syntax: Vd32.sf=vfneg(Vu32.sf)
4744 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfneg_Vsf(HVX_Vector Vu)4140 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfneg_Vsf(HVX_Vector Vu)
...@@ -4747,7 +4143,7 @@...@@ -4747,7 +4143,7 @@
4747 ========================================================================== */4143 ========================================================================== */
47484144
4749#define Q6_Vsf_vfneg_Vsf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_sf)(Vu)4145#define Q6_Vsf_vfneg_Vsf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_sf)(Vu)
4750#endif /* __HEXAGON_ARCH___ >= 68 */4146#endif
47514147
4752#if __HVX_ARCH__ >= 684148#if __HVX_ARCH__ >= 68
4753/* ==========================================================================4149/* ==========================================================================
...@@ -4758,7 +4154,7 @@...@@ -4758,7 +4154,7 @@
4758 ========================================================================== */4154 ========================================================================== */
47594155
4760#define Q6_Q_vcmp_gt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf)(Vu,Vv)),-1)4156#define Q6_Q_vcmp_gt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf)(Vu,Vv)),-1)
4761#endif /* __HEXAGON_ARCH___ >= 68 */4157#endif
47624158
4763#if __HVX_ARCH__ >= 684159#if __HVX_ARCH__ >= 68
4764/* ==========================================================================4160/* ==========================================================================
...@@ -4769,7 +4165,7 @@...@@ -4769,7 +4165,7 @@
4769 ========================================================================== */4165 ========================================================================== */
47704166
4771#define Q6_Q_vcmp_gtand_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)4167#define Q6_Q_vcmp_gtand_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
4772#endif /* __HEXAGON_ARCH___ >= 68 */4168#endif
47734169
4774#if __HVX_ARCH__ >= 684170#if __HVX_ARCH__ >= 68
4775/* ==========================================================================4171/* ==========================================================================
...@@ -4780,7 +4176,7 @@...@@ -4780,7 +4176,7 @@
4780 ========================================================================== */4176 ========================================================================== */
47814177
4782#define Q6_Q_vcmp_gtor_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)4178#define Q6_Q_vcmp_gtor_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
4783#endif /* __HEXAGON_ARCH___ >= 68 */4179#endif
47844180
4785#if __HVX_ARCH__ >= 684181#if __HVX_ARCH__ >= 68
4786/* ==========================================================================4182/* ==========================================================================
...@@ -4791,7 +4187,7 @@...@@ -4791,7 +4187,7 @@
4791 ========================================================================== */4187 ========================================================================== */
47924188
4793#define Q6_Q_vcmp_gtxacc_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)4189#define Q6_Q_vcmp_gtxacc_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
4794#endif /* __HEXAGON_ARCH___ >= 68 */4190#endif
47954191
4796#if __HVX_ARCH__ >= 684192#if __HVX_ARCH__ >= 68
4797/* ==========================================================================4193/* ==========================================================================
...@@ -4802,7 +4198,7 @@...@@ -4802,7 +4198,7 @@
4802 ========================================================================== */4198 ========================================================================== */
48034199
4804#define Q6_Q_vcmp_gt_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf)(Vu,Vv)),-1)4200#define Q6_Q_vcmp_gt_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf)(Vu,Vv)),-1)
4805#endif /* __HEXAGON_ARCH___ >= 68 */4201#endif
48064202
4807#if __HVX_ARCH__ >= 684203#if __HVX_ARCH__ >= 68
4808/* ==========================================================================4204/* ==========================================================================
...@@ -4813,7 +4209,7 @@...@@ -4813,7 +4209,7 @@
4813 ========================================================================== */4209 ========================================================================== */
48144210
4815#define Q6_Q_vcmp_gtand_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)4211#define Q6_Q_vcmp_gtand_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
4816#endif /* __HEXAGON_ARCH___ >= 68 */4212#endif
48174213
4818#if __HVX_ARCH__ >= 684214#if __HVX_ARCH__ >= 68
4819/* ==========================================================================4215/* ==========================================================================
...@@ -4824,7 +4220,7 @@...@@ -4824,7 +4220,7 @@
4824 ========================================================================== */4220 ========================================================================== */
48254221
4826#define Q6_Q_vcmp_gtor_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)4222#define Q6_Q_vcmp_gtor_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
4827#endif /* __HEXAGON_ARCH___ >= 68 */4223#endif
48284224
4829#if __HVX_ARCH__ >= 684225#if __HVX_ARCH__ >= 68
4830/* ==========================================================================4226/* ==========================================================================
...@@ -4835,7 +4231,7 @@...@@ -4835,7 +4231,7 @@
4835 ========================================================================== */4231 ========================================================================== */
48364232
4837#define Q6_Q_vcmp_gtxacc_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)4233#define Q6_Q_vcmp_gtxacc_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1)
4838#endif /* __HEXAGON_ARCH___ >= 68 */4234#endif
48394235
4840#if __HVX_ARCH__ >= 684236#if __HVX_ARCH__ >= 68
4841/* ==========================================================================4237/* ==========================================================================
...@@ -4846,7 +4242,7 @@...@@ -4846,7 +4242,7 @@
4846 ========================================================================== */4242 ========================================================================== */
48474243
4848#define Q6_Vhf_vmax_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_hf)(Vu,Vv)4244#define Q6_Vhf_vmax_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_hf)(Vu,Vv)
4849#endif /* __HEXAGON_ARCH___ >= 68 */4245#endif
48504246
4851#if __HVX_ARCH__ >= 684247#if __HVX_ARCH__ >= 68
4852/* ==========================================================================4248/* ==========================================================================
...@@ -4857,7 +4253,7 @@...@@ -4857,7 +4253,7 @@
4857 ========================================================================== */4253 ========================================================================== */
48584254
4859#define Q6_Vsf_vmax_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_sf)(Vu,Vv)4255#define Q6_Vsf_vmax_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_sf)(Vu,Vv)
4860#endif /* __HEXAGON_ARCH___ >= 68 */4256#endif
48614257
4862#if __HVX_ARCH__ >= 684258#if __HVX_ARCH__ >= 68
4863/* ==========================================================================4259/* ==========================================================================
...@@ -4868,7 +4264,7 @@...@@ -4868,7 +4264,7 @@
4868 ========================================================================== */4264 ========================================================================== */
48694265
4870#define Q6_Vhf_vmin_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_hf)(Vu,Vv)4266#define Q6_Vhf_vmin_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_hf)(Vu,Vv)
4871#endif /* __HEXAGON_ARCH___ >= 68 */4267#endif
48724268
4873#if __HVX_ARCH__ >= 684269#if __HVX_ARCH__ >= 68
4874/* ==========================================================================4270/* ==========================================================================
...@@ -4879,9 +4275,9 @@...@@ -4879,9 +4275,9 @@
4879 ========================================================================== */4275 ========================================================================== */
48804276
4881#define Q6_Vsf_vmin_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_sf)(Vu,Vv)4277#define Q6_Vsf_vmin_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_sf)(Vu,Vv)
4882#endif /* __HEXAGON_ARCH___ >= 68 */4278#endif
48834279
4884#if __HVX_ARCH__ >= 684280#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4885/* ==========================================================================4281/* ==========================================================================
4886 Assembly Syntax: Vd32.hf=vmpy(Vu32.hf,Vv32.hf)4282 Assembly Syntax: Vd32.hf=vmpy(Vu32.hf,Vv32.hf)
4887 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)4283 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -4890,9 +4286,9 @@...@@ -4890,9 +4286,9 @@
4890 ========================================================================== */4286 ========================================================================== */
48914287
4892#define Q6_Vhf_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_hf)(Vu,Vv)4288#define Q6_Vhf_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_hf)(Vu,Vv)
4893#endif /* __HEXAGON_ARCH___ >= 68 */4289#endif
48944290
4895#if __HVX_ARCH__ >= 684291#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4896/* ==========================================================================4292/* ==========================================================================
4897 Assembly Syntax: Vx32.hf+=vmpy(Vu32.hf,Vv32.hf)4293 Assembly Syntax: Vx32.hf+=vmpy(Vu32.hf,Vv32.hf)
4898 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmpyacc_VhfVhfVhf(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)4294 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmpyacc_VhfVhfVhf(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -4901,7 +4297,7 @@...@@ -4901,7 +4297,7 @@
4901 ========================================================================== */4297 ========================================================================== */
49024298
4903#define Q6_Vhf_vmpyacc_VhfVhfVhf(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_hf_acc)(Vx,Vu,Vv)4299#define Q6_Vhf_vmpyacc_VhfVhfVhf(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_hf_acc)(Vx,Vu,Vv)
4904#endif /* __HEXAGON_ARCH___ >= 68 */4300#endif
49054301
4906#if __HVX_ARCH__ >= 684302#if __HVX_ARCH__ >= 68
4907/* ==========================================================================4303/* ==========================================================================
...@@ -4912,7 +4308,7 @@...@@ -4912,7 +4308,7 @@
4912 ========================================================================== */4308 ========================================================================== */
49134309
4914#define Q6_Vqf16_vmpy_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16)(Vu,Vv)4310#define Q6_Vqf16_vmpy_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16)(Vu,Vv)
4915#endif /* __HEXAGON_ARCH___ >= 68 */4311#endif
49164312
4917#if __HVX_ARCH__ >= 684313#if __HVX_ARCH__ >= 68
4918/* ==========================================================================4314/* ==========================================================================
...@@ -4923,7 +4319,7 @@...@@ -4923,7 +4319,7 @@
4923 ========================================================================== */4319 ========================================================================== */
49244320
4925#define Q6_Vqf16_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16_hf)(Vu,Vv)4321#define Q6_Vqf16_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16_hf)(Vu,Vv)
4926#endif /* __HEXAGON_ARCH___ >= 68 */4322#endif
49274323
4928#if __HVX_ARCH__ >= 684324#if __HVX_ARCH__ >= 68
4929/* ==========================================================================4325/* ==========================================================================
...@@ -4934,7 +4330,7 @@...@@ -4934,7 +4330,7 @@
4934 ========================================================================== */4330 ========================================================================== */
49354331
4936#define Q6_Vqf16_vmpy_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16_mix_hf)(Vu,Vv)4332#define Q6_Vqf16_vmpy_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16_mix_hf)(Vu,Vv)
4937#endif /* __HEXAGON_ARCH___ >= 68 */4333#endif
49384334
4939#if __HVX_ARCH__ >= 684335#if __HVX_ARCH__ >= 68
4940/* ==========================================================================4336/* ==========================================================================
...@@ -4945,7 +4341,7 @@...@@ -4945,7 +4341,7 @@
4945 ========================================================================== */4341 ========================================================================== */
49464342
4947#define Q6_Vqf32_vmpy_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32)(Vu,Vv)4343#define Q6_Vqf32_vmpy_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32)(Vu,Vv)
4948#endif /* __HEXAGON_ARCH___ >= 68 */4344#endif
49494345
4950#if __HVX_ARCH__ >= 684346#if __HVX_ARCH__ >= 68
4951/* ==========================================================================4347/* ==========================================================================
...@@ -4956,7 +4352,7 @@...@@ -4956,7 +4352,7 @@
4956 ========================================================================== */4352 ========================================================================== */
49574353
4958#define Q6_Wqf32_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_hf)(Vu,Vv)4354#define Q6_Wqf32_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_hf)(Vu,Vv)
4959#endif /* __HEXAGON_ARCH___ >= 68 */4355#endif
49604356
4961#if __HVX_ARCH__ >= 684357#if __HVX_ARCH__ >= 68
4962/* ==========================================================================4358/* ==========================================================================
...@@ -4967,7 +4363,7 @@...@@ -4967,7 +4363,7 @@
4967 ========================================================================== */4363 ========================================================================== */
49684364
4969#define Q6_Wqf32_vmpy_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_mix_hf)(Vu,Vv)4365#define Q6_Wqf32_vmpy_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_mix_hf)(Vu,Vv)
4970#endif /* __HEXAGON_ARCH___ >= 68 */4366#endif
49714367
4972#if __HVX_ARCH__ >= 684368#if __HVX_ARCH__ >= 68
4973/* ==========================================================================4369/* ==========================================================================
...@@ -4978,7 +4374,7 @@...@@ -4978,7 +4374,7 @@
4978 ========================================================================== */4374 ========================================================================== */
49794375
4980#define Q6_Wqf32_vmpy_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_qf16)(Vu,Vv)4376#define Q6_Wqf32_vmpy_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_qf16)(Vu,Vv)
4981#endif /* __HEXAGON_ARCH___ >= 68 */4377#endif
49824378
4983#if __HVX_ARCH__ >= 684379#if __HVX_ARCH__ >= 68
4984/* ==========================================================================4380/* ==========================================================================
...@@ -4989,9 +4385,9 @@...@@ -4989,9 +4385,9 @@
4989 ========================================================================== */4385 ========================================================================== */
49904386
4991#define Q6_Vqf32_vmpy_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_sf)(Vu,Vv)4387#define Q6_Vqf32_vmpy_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_sf)(Vu,Vv)
4992#endif /* __HEXAGON_ARCH___ >= 68 */4388#endif
49934389
4994#if __HVX_ARCH__ >= 684390#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
4995/* ==========================================================================4391/* ==========================================================================
4996 Assembly Syntax: Vdd32.sf=vmpy(Vu32.hf,Vv32.hf)4392 Assembly Syntax: Vdd32.sf=vmpy(Vu32.hf,Vv32.hf)
4997 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)4393 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -5000,9 +4396,9 @@...@@ -5000,9 +4396,9 @@
5000 ========================================================================== */4396 ========================================================================== */
50014397
5002#define Q6_Wsf_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_hf)(Vu,Vv)4398#define Q6_Wsf_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_hf)(Vu,Vv)
5003#endif /* __HEXAGON_ARCH___ >= 68 */4399#endif
50044400
5005#if __HVX_ARCH__ >= 684401#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
5006/* ==========================================================================4402/* ==========================================================================
5007 Assembly Syntax: Vxx32.sf+=vmpy(Vu32.hf,Vv32.hf)4403 Assembly Syntax: Vxx32.sf+=vmpy(Vu32.hf,Vv32.hf)
5008 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpyacc_WsfVhfVhf(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)4404 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpyacc_WsfVhfVhf(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv)
...@@ -5011,9 +4407,9 @@...@@ -5011,9 +4407,9 @@
5011 ========================================================================== */4407 ========================================================================== */
50124408
5013#define Q6_Wsf_vmpyacc_WsfVhfVhf(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_hf_acc)(Vxx,Vu,Vv)4409#define Q6_Wsf_vmpyacc_WsfVhfVhf(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_hf_acc)(Vxx,Vu,Vv)
5014#endif /* __HEXAGON_ARCH___ >= 68 */4410#endif
50154411
5016#if __HVX_ARCH__ >= 684412#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
5017/* ==========================================================================4413/* ==========================================================================
5018 Assembly Syntax: Vd32.sf=vmpy(Vu32.sf,Vv32.sf)4414 Assembly Syntax: Vd32.sf=vmpy(Vu32.sf,Vv32.sf)
5019 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vmpy_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)4415 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vmpy_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -5022,7 +4418,7 @@...@@ -5022,7 +4418,7 @@
5022 ========================================================================== */4418 ========================================================================== */
50234419
5024#define Q6_Vsf_vmpy_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_sf)(Vu,Vv)4420#define Q6_Vsf_vmpy_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_sf)(Vu,Vv)
5025#endif /* __HEXAGON_ARCH___ >= 68 */4421#endif
50264422
5027#if __HVX_ARCH__ >= 684423#if __HVX_ARCH__ >= 68
5028/* ==========================================================================4424/* ==========================================================================
...@@ -5033,9 +4429,9 @@...@@ -5033,9 +4429,9 @@
5033 ========================================================================== */4429 ========================================================================== */
50344430
5035#define Q6_Vqf16_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf)(Vu,Vv)4431#define Q6_Vqf16_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf)(Vu,Vv)
5036#endif /* __HEXAGON_ARCH___ >= 68 */4432#endif
50374433
5038#if __HVX_ARCH__ >= 684434#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
5039/* ==========================================================================4435/* ==========================================================================
5040 Assembly Syntax: Vd32.hf=vsub(Vu32.hf,Vv32.hf)4436 Assembly Syntax: Vd32.hf=vsub(Vu32.hf,Vv32.hf)
5041 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)4437 C Intrinsic Prototype: HVX_Vector Q6_Vhf_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -5044,7 +4440,7 @@...@@ -5044,7 +4440,7 @@
5044 ========================================================================== */4440 ========================================================================== */
50454441
5046#define Q6_Vhf_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_hf)(Vu,Vv)4442#define Q6_Vhf_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_hf)(Vu,Vv)
5047#endif /* __HEXAGON_ARCH___ >= 68 */4443#endif
50484444
5049#if __HVX_ARCH__ >= 684445#if __HVX_ARCH__ >= 68
5050/* ==========================================================================4446/* ==========================================================================
...@@ -5055,7 +4451,7 @@...@@ -5055,7 +4451,7 @@
5055 ========================================================================== */4451 ========================================================================== */
50564452
5057#define Q6_Vqf16_vsub_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf16)(Vu,Vv)4453#define Q6_Vqf16_vsub_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf16)(Vu,Vv)
5058#endif /* __HEXAGON_ARCH___ >= 68 */4454#endif
50594455
5060#if __HVX_ARCH__ >= 684456#if __HVX_ARCH__ >= 68
5061/* ==========================================================================4457/* ==========================================================================
...@@ -5066,7 +4462,7 @@...@@ -5066,7 +4462,7 @@
5066 ========================================================================== */4462 ========================================================================== */
50674463
5068#define Q6_Vqf16_vsub_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf16_mix)(Vu,Vv)4464#define Q6_Vqf16_vsub_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf16_mix)(Vu,Vv)
5069#endif /* __HEXAGON_ARCH___ >= 68 */4465#endif
50704466
5071#if __HVX_ARCH__ >= 684467#if __HVX_ARCH__ >= 68
5072/* ==========================================================================4468/* ==========================================================================
...@@ -5077,7 +4473,7 @@...@@ -5077,7 +4473,7 @@
5077 ========================================================================== */4473 ========================================================================== */
50784474
5079#define Q6_Vqf32_vsub_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf32)(Vu,Vv)4475#define Q6_Vqf32_vsub_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf32)(Vu,Vv)
5080#endif /* __HEXAGON_ARCH___ >= 68 */4476#endif
50814477
5082#if __HVX_ARCH__ >= 684478#if __HVX_ARCH__ >= 68
5083/* ==========================================================================4479/* ==========================================================================
...@@ -5088,7 +4484,7 @@...@@ -5088,7 +4484,7 @@
5088 ========================================================================== */4484 ========================================================================== */
50894485
5090#define Q6_Vqf32_vsub_Vqf32Vsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf32_mix)(Vu,Vv)4486#define Q6_Vqf32_vsub_Vqf32Vsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf32_mix)(Vu,Vv)
5091#endif /* __HEXAGON_ARCH___ >= 68 */4487#endif
50924488
5093#if __HVX_ARCH__ >= 684489#if __HVX_ARCH__ >= 68
5094/* ==========================================================================4490/* ==========================================================================
...@@ -5099,9 +4495,9 @@...@@ -5099,9 +4495,9 @@
5099 ========================================================================== */4495 ========================================================================== */
51004496
5101#define Q6_Vqf32_vsub_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf)(Vu,Vv)4497#define Q6_Vqf32_vsub_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf)(Vu,Vv)
5102#endif /* __HEXAGON_ARCH___ >= 68 */4498#endif
51034499
5104#if __HVX_ARCH__ >= 684500#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
5105/* ==========================================================================4501/* ==========================================================================
5106 Assembly Syntax: Vdd32.sf=vsub(Vu32.hf,Vv32.hf)4502 Assembly Syntax: Vdd32.sf=vsub(Vu32.hf,Vv32.hf)
5107 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)4503 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -5110,9 +4506,9 @@...@@ -5110,9 +4506,9 @@
5110 ========================================================================== */4506 ========================================================================== */
51114507
5112#define Q6_Wsf_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_hf)(Vu,Vv)4508#define Q6_Wsf_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_hf)(Vu,Vv)
5113#endif /* __HEXAGON_ARCH___ >= 68 */4509#endif
51144510
5115#if __HVX_ARCH__ >= 684511#if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__
5116/* ==========================================================================4512/* ==========================================================================
5117 Assembly Syntax: Vd32.sf=vsub(Vu32.sf,Vv32.sf)4513 Assembly Syntax: Vd32.sf=vsub(Vu32.sf,Vv32.sf)
5118 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vsub_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)4514 C Intrinsic Prototype: HVX_Vector Q6_Vsf_vsub_VsfVsf(HVX_Vector Vu, HVX_Vector Vv)
...@@ -5121,7 +4517,7 @@...@@ -5121,7 +4517,7 @@
5121 ========================================================================== */4517 ========================================================================== */
51224518
5123#define Q6_Vsf_vsub_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_sf)(Vu,Vv)4519#define Q6_Vsf_vsub_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_sf)(Vu,Vv)
5124#endif /* __HEXAGON_ARCH___ >= 68 */4520#endif
51254521
5126#if __HVX_ARCH__ >= 694522#if __HVX_ARCH__ >= 69
5127/* ==========================================================================4523/* ==========================================================================
...@@ -5132,7 +4528,7 @@...@@ -5132,7 +4528,7 @@
5132 ========================================================================== */4528 ========================================================================== */
51334529
5134#define Q6_Vub_vasr_WuhVub_rnd_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvuhubrndsat)(Vuu,Vv)4530#define Q6_Vub_vasr_WuhVub_rnd_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvuhubrndsat)(Vuu,Vv)
5135#endif /* __HEXAGON_ARCH___ >= 69 */4531#endif
51364532
5137#if __HVX_ARCH__ >= 694533#if __HVX_ARCH__ >= 69
5138/* ==========================================================================4534/* ==========================================================================
...@@ -5143,7 +4539,7 @@...@@ -5143,7 +4539,7 @@
5143 ========================================================================== */4539 ========================================================================== */
51444540
5145#define Q6_Vub_vasr_WuhVub_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvuhubsat)(Vuu,Vv)4541#define Q6_Vub_vasr_WuhVub_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvuhubsat)(Vuu,Vv)
5146#endif /* __HEXAGON_ARCH___ >= 69 */4542#endif
51474543
5148#if __HVX_ARCH__ >= 694544#if __HVX_ARCH__ >= 69
5149/* ==========================================================================4545/* ==========================================================================
...@@ -5154,7 +4550,7 @@...@@ -5154,7 +4550,7 @@
5154 ========================================================================== */4550 ========================================================================== */
51554551
5156#define Q6_Vuh_vasr_WwVuh_rnd_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvwuhrndsat)(Vuu,Vv)4552#define Q6_Vuh_vasr_WwVuh_rnd_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvwuhrndsat)(Vuu,Vv)
5157#endif /* __HEXAGON_ARCH___ >= 69 */4553#endif
51584554
5159#if __HVX_ARCH__ >= 694555#if __HVX_ARCH__ >= 69
5160/* ==========================================================================4556/* ==========================================================================
...@@ -5165,7 +4561,7 @@...@@ -5165,7 +4561,7 @@
5165 ========================================================================== */4561 ========================================================================== */
51664562
5167#define Q6_Vuh_vasr_WwVuh_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvwuhsat)(Vuu,Vv)4563#define Q6_Vuh_vasr_WwVuh_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvwuhsat)(Vuu,Vv)
5168#endif /* __HEXAGON_ARCH___ >= 69 */4564#endif
51694565
5170#if __HVX_ARCH__ >= 694566#if __HVX_ARCH__ >= 69
5171/* ==========================================================================4567/* ==========================================================================
...@@ -5176,9 +4572,9 @@...@@ -5176,9 +4572,9 @@
5176 ========================================================================== */4572 ========================================================================== */
51774573
5178#define Q6_Vuh_vmpy_VuhVuh_rs16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhvs)(Vu,Vv)4574#define Q6_Vuh_vmpy_VuhVuh_rs16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhvs)(Vu,Vv)
5179#endif /* __HEXAGON_ARCH___ >= 69 */4575#endif
51804576
5181#if __HVX_ARCH__ >= 734577#if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__
5182/* ==========================================================================4578/* ==========================================================================
5183 Assembly Syntax: Vdd32.sf=vadd(Vu32.bf,Vv32.bf)4579 Assembly Syntax: Vdd32.sf=vadd(Vu32.bf,Vv32.bf)
5184 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vadd_VbfVbf(HVX_Vector Vu,4580 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vadd_VbfVbf(HVX_Vector Vu,
...@@ -5187,7 +4583,7 @@...@@ -5187,7 +4583,7 @@
51874583
5188#define Q6_Wsf_vadd_VbfVbf(Vu, Vv) \4584#define Q6_Wsf_vadd_VbfVbf(Vu, Vv) \
5189 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_bf)(Vu, Vv)4585 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_bf)(Vu, Vv)
5190#endif /* __HEXAGON_ARCH___ >= 73 */4586#endif
51914587
5192#if __HVX_ARCH__ >= 734588#if __HVX_ARCH__ >= 73
5193/* ==========================================================================4589/* ==========================================================================
...@@ -5199,7 +4595,7 @@...@@ -5199,7 +4595,7 @@
51994595
5200#define Q6_Vh_equals_Vhf(Vu) \4596#define Q6_Vh_equals_Vhf(Vu) \
5201 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_h_hf)(Vu)4597 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_h_hf)(Vu)
5202#endif /* __HEXAGON_ARCH___ >= 73 */4598#endif
52034599
5204#if __HVX_ARCH__ >= 734600#if __HVX_ARCH__ >= 73
5205/* ==========================================================================4601/* ==========================================================================
...@@ -5211,7 +4607,7 @@...@@ -5211,7 +4607,7 @@
52114607
5212#define Q6_Vhf_equals_Vh(Vu) \4608#define Q6_Vhf_equals_Vh(Vu) \
5213 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_h)(Vu)4609 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_h)(Vu)
5214#endif /* __HEXAGON_ARCH___ >= 73 */4610#endif
52154611
5216#if __HVX_ARCH__ >= 734612#if __HVX_ARCH__ >= 73
5217/* ==========================================================================4613/* ==========================================================================
...@@ -5223,7 +4619,7 @@...@@ -5223,7 +4619,7 @@
52234619
5224#define Q6_Vsf_equals_Vw(Vu) \4620#define Q6_Vsf_equals_Vw(Vu) \
5225 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_sf_w)(Vu)4621 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_sf_w)(Vu)
5226#endif /* __HEXAGON_ARCH___ >= 73 */4622#endif
52274623
5228#if __HVX_ARCH__ >= 734624#if __HVX_ARCH__ >= 73
5229/* ==========================================================================4625/* ==========================================================================
...@@ -5235,9 +4631,9 @@...@@ -5235,9 +4631,9 @@
52354631
5236#define Q6_Vw_equals_Vsf(Vu) \4632#define Q6_Vw_equals_Vsf(Vu) \
5237 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_w_sf)(Vu)4633 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_w_sf)(Vu)
5238#endif /* __HEXAGON_ARCH___ >= 73 */4634#endif
52394635
5240#if __HVX_ARCH__ >= 734636#if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__
5241/* ==========================================================================4637/* ==========================================================================
5242 Assembly Syntax: Vd32.bf=vcvt(Vu32.sf,Vv32.sf)4638 Assembly Syntax: Vd32.bf=vcvt(Vu32.sf,Vv32.sf)
5243 C Intrinsic Prototype: HVX_Vector Q6_Vbf_vcvt_VsfVsf(HVX_Vector Vu,4639 C Intrinsic Prototype: HVX_Vector Q6_Vbf_vcvt_VsfVsf(HVX_Vector Vu,
...@@ -5246,7 +4642,7 @@...@@ -5246,7 +4642,7 @@
52464642
5247#define Q6_Vbf_vcvt_VsfVsf(Vu, Vv) \4643#define Q6_Vbf_vcvt_VsfVsf(Vu, Vv) \
5248 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_bf_sf)(Vu, Vv)4644 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_bf_sf)(Vu, Vv)
5249#endif /* __HEXAGON_ARCH___ >= 73 */4645#endif
52504646
5251#if __HVX_ARCH__ >= 734647#if __HVX_ARCH__ >= 73
5252/* ==========================================================================4648/* ==========================================================================
...@@ -5258,7 +4654,7 @@...@@ -5258,7 +4654,7 @@
5258#define Q6_Q_vcmp_gt_VbfVbf(Vu, Vv) \4654#define Q6_Q_vcmp_gt_VbfVbf(Vu, Vv) \
5259 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt) \4655 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt) \
5260 ((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtbf)(Vu, Vv)), -1)4656 ((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtbf)(Vu, Vv)), -1)
5261#endif /* __HEXAGON_ARCH___ >= 73 */4657#endif
52624658
5263#if __HVX_ARCH__ >= 734659#if __HVX_ARCH__ >= 73
5264/* ==========================================================================4660/* ==========================================================================
...@@ -5274,7 +4670,7 @@...@@ -5274,7 +4670,7 @@
5274 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \4670 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5275 Vv)), \4671 Vv)), \
5276 -1)4672 -1)
5277#endif /* __HEXAGON_ARCH___ >= 73 */4673#endif
52784674
5279#if __HVX_ARCH__ >= 734675#if __HVX_ARCH__ >= 73
5280/* ==========================================================================4676/* ==========================================================================
...@@ -5290,7 +4686,7 @@...@@ -5290,7 +4686,7 @@
5290 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \4686 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5291 Vv)), \4687 Vv)), \
5292 -1)4688 -1)
5293#endif /* __HEXAGON_ARCH___ >= 73 */4689#endif
52944690
5295#if __HVX_ARCH__ >= 734691#if __HVX_ARCH__ >= 73
5296/* ==========================================================================4692/* ==========================================================================
...@@ -5306,9 +4702,9 @@...@@ -5306,9 +4702,9 @@
5306 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \4702 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5307 Vv)), \4703 Vv)), \
5308 -1)4704 -1)
5309#endif /* __HEXAGON_ARCH___ >= 73 */4705#endif
53104706
5311#if __HVX_ARCH__ >= 734707#if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__
5312/* ==========================================================================4708/* ==========================================================================
5313 Assembly Syntax: Vd32.bf=vmax(Vu32.bf,Vv32.bf)4709 Assembly Syntax: Vd32.bf=vmax(Vu32.bf,Vv32.bf)
5314 C Intrinsic Prototype: HVX_Vector Q6_Vbf_vmax_VbfVbf(HVX_Vector Vu,4710 C Intrinsic Prototype: HVX_Vector Q6_Vbf_vmax_VbfVbf(HVX_Vector Vu,
...@@ -5317,9 +4713,9 @@...@@ -5317,9 +4713,9 @@
53174713
5318#define Q6_Vbf_vmax_VbfVbf(Vu, Vv) \4714#define Q6_Vbf_vmax_VbfVbf(Vu, Vv) \
5319 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_bf)(Vu, Vv)4715 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_bf)(Vu, Vv)
5320#endif /* __HEXAGON_ARCH___ >= 73 */4716#endif
53214717
5322#if __HVX_ARCH__ >= 734718#if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__
5323/* ==========================================================================4719/* ==========================================================================
5324 Assembly Syntax: Vd32.bf=vmin(Vu32.bf,Vv32.bf)4720 Assembly Syntax: Vd32.bf=vmin(Vu32.bf,Vv32.bf)
5325 C Intrinsic Prototype: HVX_Vector Q6_Vbf_vmin_VbfVbf(HVX_Vector Vu,4721 C Intrinsic Prototype: HVX_Vector Q6_Vbf_vmin_VbfVbf(HVX_Vector Vu,
...@@ -5328,9 +4724,9 @@...@@ -5328,9 +4724,9 @@
53284724
5329#define Q6_Vbf_vmin_VbfVbf(Vu, Vv) \4725#define Q6_Vbf_vmin_VbfVbf(Vu, Vv) \
5330 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_bf)(Vu, Vv)4726 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_bf)(Vu, Vv)
5331#endif /* __HEXAGON_ARCH___ >= 73 */4727#endif
53324728
5333#if __HVX_ARCH__ >= 734729#if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__
5334/* ==========================================================================4730/* ==========================================================================
5335 Assembly Syntax: Vdd32.sf=vmpy(Vu32.bf,Vv32.bf)4731 Assembly Syntax: Vdd32.sf=vmpy(Vu32.bf,Vv32.bf)
5336 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpy_VbfVbf(HVX_Vector Vu,4732 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpy_VbfVbf(HVX_Vector Vu,
...@@ -5339,9 +4735,9 @@...@@ -5339,9 +4735,9 @@
53394735
5340#define Q6_Wsf_vmpy_VbfVbf(Vu, Vv) \4736#define Q6_Wsf_vmpy_VbfVbf(Vu, Vv) \
5341 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_bf)(Vu, Vv)4737 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_bf)(Vu, Vv)
5342#endif /* __HEXAGON_ARCH___ >= 73 */4738#endif
53434739
5344#if __HVX_ARCH__ >= 734740#if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__
5345/* ==========================================================================4741/* ==========================================================================
5346 Assembly Syntax: Vxx32.sf+=vmpy(Vu32.bf,Vv32.bf)4742 Assembly Syntax: Vxx32.sf+=vmpy(Vu32.bf,Vv32.bf)
5347 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpyacc_WsfVbfVbf(HVX_VectorPair4743 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpyacc_WsfVbfVbf(HVX_VectorPair
...@@ -5351,9 +4747,9 @@...@@ -5351,9 +4747,9 @@
53514747
5352#define Q6_Wsf_vmpyacc_WsfVbfVbf(Vxx, Vu, Vv) \4748#define Q6_Wsf_vmpyacc_WsfVbfVbf(Vxx, Vu, Vv) \
5353 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_bf_acc)(Vxx, Vu, Vv)4749 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_bf_acc)(Vxx, Vu, Vv)
5354#endif /* __HEXAGON_ARCH___ >= 73 */4750#endif
53554751
5356#if __HVX_ARCH__ >= 734752#if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__
5357/* ==========================================================================4753/* ==========================================================================
5358 Assembly Syntax: Vdd32.sf=vsub(Vu32.bf,Vv32.bf)4754 Assembly Syntax: Vdd32.sf=vsub(Vu32.bf,Vv32.bf)
5359 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vsub_VbfVbf(HVX_Vector Vu,4755 C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vsub_VbfVbf(HVX_Vector Vu,
...@@ -5362,7 +4758,7 @@...@@ -5362,7 +4758,7 @@
53624758
5363#define Q6_Wsf_vsub_VbfVbf(Vu, Vv) \4759#define Q6_Wsf_vsub_VbfVbf(Vu, Vv) \
5364 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_bf)(Vu, Vv)4760 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_bf)(Vu, Vv)
5365#endif /* __HEXAGON_ARCH___ >= 73 */4761#endif
53664762
5367#if __HVX_ARCH__ >= 794763#if __HVX_ARCH__ >= 79
5368/* ==========================================================================4764/* ==========================================================================
...@@ -5374,7 +4770,7 @@...@@ -5374,7 +4770,7 @@
53744770
5375#define Q6_V_vgetqfext_VR(Vu, Rt) \4771#define Q6_V_vgetqfext_VR(Vu, Rt) \
5376 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_get_qfext)(Vu, Rt)4772 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_get_qfext)(Vu, Rt)
5377#endif /* __HEXAGON_ARCH___ >= 79 */4773#endif
53784774
5379#if __HVX_ARCH__ >= 794775#if __HVX_ARCH__ >= 79
5380/* ==========================================================================4776/* ==========================================================================
...@@ -5386,7 +4782,7 @@...@@ -5386,7 +4782,7 @@
53864782
5387#define Q6_V_vgetqfextor_VVR(Vx, Vu, Rt) \4783#define Q6_V_vgetqfextor_VVR(Vx, Vu, Rt) \
5388 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_get_qfext_oracc)(Vx, Vu, Rt)4784 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_get_qfext_oracc)(Vx, Vu, Rt)
5389#endif /* __HEXAGON_ARCH___ >= 79 */4785#endif
53904786
5391#if __HVX_ARCH__ >= 794787#if __HVX_ARCH__ >= 79
5392/* ==========================================================================4788/* ==========================================================================
...@@ -5398,9 +4794,9 @@...@@ -5398,9 +4794,9 @@
53984794
5399#define Q6_V_vsetqfext_VR(Vu, Rt) \4795#define Q6_V_vsetqfext_VR(Vu, Rt) \
5400 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_set_qfext)(Vu, Rt)4796 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_set_qfext)(Vu, Rt)
5401#endif /* __HEXAGON_ARCH___ >= 79 */4797#endif
54024798
5403#if __HVX_ARCH__ >= 794799#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5404/* ==========================================================================4800/* ==========================================================================
5405 Assembly Syntax: Vd32.f8=vabs(Vu32.f8)4801 Assembly Syntax: Vd32.f8=vabs(Vu32.f8)
5406 C Intrinsic Prototype: HVX_Vector Q6_V_vabs_V(HVX_Vector Vu)4802 C Intrinsic Prototype: HVX_Vector Q6_V_vabs_V(HVX_Vector Vu)
...@@ -5409,9 +4805,9 @@...@@ -5409,9 +4805,9 @@
5409 ========================================================================== */4805 ========================================================================== */
54104806
5411#define Q6_V_vabs_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_f8)(Vu)4807#define Q6_V_vabs_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_f8)(Vu)
5412#endif /* __HEXAGON_ARCH___ >= 79 */4808#endif
54134809
5414#if __HVX_ARCH__ >= 794810#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5415/* ==========================================================================4811/* ==========================================================================
5416 Assembly Syntax: Vdd32.hf=vadd(Vu32.f8,Vv32.f8)4812 Assembly Syntax: Vdd32.hf=vadd(Vu32.f8,Vv32.f8)
5417 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vadd_VV(HVX_Vector Vu,4813 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vadd_VV(HVX_Vector Vu,
...@@ -5420,9 +4816,9 @@...@@ -5420,9 +4816,9 @@
54204816
5421#define Q6_Whf_vadd_VV(Vu, Vv) \4817#define Q6_Whf_vadd_VV(Vu, Vv) \
5422 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf_f8)(Vu, Vv)4818 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf_f8)(Vu, Vv)
5423#endif /* __HEXAGON_ARCH___ >= 79 */4819#endif
54244820
5425#if __HVX_ARCH__ >= 794821#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5426/* ==========================================================================4822/* ==========================================================================
5427 Assembly Syntax: Vd32.b=vcvt2(Vu32.hf,Vv32.hf)4823 Assembly Syntax: Vd32.b=vcvt2(Vu32.hf,Vv32.hf)
5428 C Intrinsic Prototype: HVX_Vector Q6_Vb_vcvt2_VhfVhf(HVX_Vector Vu,4824 C Intrinsic Prototype: HVX_Vector Q6_Vb_vcvt2_VhfVhf(HVX_Vector Vu,
...@@ -5431,9 +4827,9 @@...@@ -5431,9 +4827,9 @@
54314827
5432#define Q6_Vb_vcvt2_VhfVhf(Vu, Vv) \4828#define Q6_Vb_vcvt2_VhfVhf(Vu, Vv) \
5433 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_b_hf)(Vu, Vv)4829 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_b_hf)(Vu, Vv)
5434#endif /* __HEXAGON_ARCH___ >= 79 */4830#endif
54354831
5436#if __HVX_ARCH__ >= 794832#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5437/* ==========================================================================4833/* ==========================================================================
5438 Assembly Syntax: Vdd32.hf=vcvt2(Vu32.b)4834 Assembly Syntax: Vdd32.hf=vcvt2(Vu32.b)
5439 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt2_Vb(HVX_Vector Vu)4835 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt2_Vb(HVX_Vector Vu)
...@@ -5443,9 +4839,9 @@...@@ -5443,9 +4839,9 @@
54434839
5444#define Q6_Whf_vcvt2_Vb(Vu) \4840#define Q6_Whf_vcvt2_Vb(Vu) \
5445 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_hf_b)(Vu)4841 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_hf_b)(Vu)
5446#endif /* __HEXAGON_ARCH___ >= 79 */4842#endif
54474843
5448#if __HVX_ARCH__ >= 794844#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5449/* ==========================================================================4845/* ==========================================================================
5450 Assembly Syntax: Vdd32.hf=vcvt2(Vu32.ub)4846 Assembly Syntax: Vdd32.hf=vcvt2(Vu32.ub)
5451 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt2_Vub(HVX_Vector Vu)4847 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt2_Vub(HVX_Vector Vu)
...@@ -5455,9 +4851,9 @@...@@ -5455,9 +4851,9 @@
54554851
5456#define Q6_Whf_vcvt2_Vub(Vu) \4852#define Q6_Whf_vcvt2_Vub(Vu) \
5457 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_hf_ub)(Vu)4853 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_hf_ub)(Vu)
5458#endif /* __HEXAGON_ARCH___ >= 79 */4854#endif
54594855
5460#if __HVX_ARCH__ >= 794856#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5461/* ==========================================================================4857/* ==========================================================================
5462 Assembly Syntax: Vd32.ub=vcvt2(Vu32.hf,Vv32.hf)4858 Assembly Syntax: Vd32.ub=vcvt2(Vu32.hf,Vv32.hf)
5463 C Intrinsic Prototype: HVX_Vector Q6_Vub_vcvt2_VhfVhf(HVX_Vector Vu,4859 C Intrinsic Prototype: HVX_Vector Q6_Vub_vcvt2_VhfVhf(HVX_Vector Vu,
...@@ -5466,9 +4862,9 @@...@@ -5466,9 +4862,9 @@
54664862
5467#define Q6_Vub_vcvt2_VhfVhf(Vu, Vv) \4863#define Q6_Vub_vcvt2_VhfVhf(Vu, Vv) \
5468 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_ub_hf)(Vu, Vv)4864 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_ub_hf)(Vu, Vv)
5469#endif /* __HEXAGON_ARCH___ >= 79 */4865#endif
54704866
5471#if __HVX_ARCH__ >= 794867#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5472/* ==========================================================================4868/* ==========================================================================
5473 Assembly Syntax: Vd32.f8=vcvt(Vu32.hf,Vv32.hf)4869 Assembly Syntax: Vd32.f8=vcvt(Vu32.hf,Vv32.hf)
5474 C Intrinsic Prototype: HVX_Vector Q6_V_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector4870 C Intrinsic Prototype: HVX_Vector Q6_V_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector
...@@ -5477,9 +4873,9 @@...@@ -5477,9 +4873,9 @@
54774873
5478#define Q6_V_vcvt_VhfVhf(Vu, Vv) \4874#define Q6_V_vcvt_VhfVhf(Vu, Vv) \
5479 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_f8_hf)(Vu, Vv)4875 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_f8_hf)(Vu, Vv)
5480#endif /* __HEXAGON_ARCH___ >= 79 */4876#endif
54814877
5482#if __HVX_ARCH__ >= 794878#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5483/* ==========================================================================4879/* ==========================================================================
5484 Assembly Syntax: Vdd32.hf=vcvt(Vu32.f8)4880 Assembly Syntax: Vdd32.hf=vcvt(Vu32.f8)
5485 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_V(HVX_Vector Vu)4881 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_V(HVX_Vector Vu)
...@@ -5489,9 +4885,9 @@...@@ -5489,9 +4885,9 @@
54894885
5490#define Q6_Whf_vcvt_V(Vu) \4886#define Q6_Whf_vcvt_V(Vu) \
5491 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_f8)(Vu)4887 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_f8)(Vu)
5492#endif /* __HEXAGON_ARCH___ >= 79 */4888#endif
54934889
5494#if __HVX_ARCH__ >= 794890#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5495/* ==========================================================================4891/* ==========================================================================
5496 Assembly Syntax: Vd32.f8=vfmax(Vu32.f8,Vv32.f8)4892 Assembly Syntax: Vd32.f8=vfmax(Vu32.f8,Vv32.f8)
5497 C Intrinsic Prototype: HVX_Vector Q6_V_vfmax_VV(HVX_Vector Vu, HVX_Vector Vv)4893 C Intrinsic Prototype: HVX_Vector Q6_V_vfmax_VV(HVX_Vector Vu, HVX_Vector Vv)
...@@ -5501,9 +4897,9 @@...@@ -5501,9 +4897,9 @@
55014897
5502#define Q6_V_vfmax_VV(Vu, Vv) \4898#define Q6_V_vfmax_VV(Vu, Vv) \
5503 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_f8)(Vu, Vv)4899 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_f8)(Vu, Vv)
5504#endif /* __HEXAGON_ARCH___ >= 79 */4900#endif
55054901
5506#if __HVX_ARCH__ >= 794902#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5507/* ==========================================================================4903/* ==========================================================================
5508 Assembly Syntax: Vd32.f8=vfmin(Vu32.f8,Vv32.f8)4904 Assembly Syntax: Vd32.f8=vfmin(Vu32.f8,Vv32.f8)
5509 C Intrinsic Prototype: HVX_Vector Q6_V_vfmin_VV(HVX_Vector Vu, HVX_Vector Vv)4905 C Intrinsic Prototype: HVX_Vector Q6_V_vfmin_VV(HVX_Vector Vu, HVX_Vector Vv)
...@@ -5513,9 +4909,9 @@...@@ -5513,9 +4909,9 @@
55134909
5514#define Q6_V_vfmin_VV(Vu, Vv) \4910#define Q6_V_vfmin_VV(Vu, Vv) \
5515 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_f8)(Vu, Vv)4911 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_f8)(Vu, Vv)
5516#endif /* __HEXAGON_ARCH___ >= 79 */4912#endif
55174913
5518#if __HVX_ARCH__ >= 794914#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5519/* ==========================================================================4915/* ==========================================================================
5520 Assembly Syntax: Vd32.f8=vfneg(Vu32.f8)4916 Assembly Syntax: Vd32.f8=vfneg(Vu32.f8)
5521 C Intrinsic Prototype: HVX_Vector Q6_V_vfneg_V(HVX_Vector Vu)4917 C Intrinsic Prototype: HVX_Vector Q6_V_vfneg_V(HVX_Vector Vu)
...@@ -5525,7 +4921,7 @@...@@ -5525,7 +4921,7 @@
55254921
5526#define Q6_V_vfneg_V(Vu) \4922#define Q6_V_vfneg_V(Vu) \
5527 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_f8)(Vu)4923 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_f8)(Vu)
5528#endif /* __HEXAGON_ARCH___ >= 79 */4924#endif
55294925
5530#if __HVX_ARCH__ >= 794926#if __HVX_ARCH__ >= 79
5531/* ==========================================================================4927/* ==========================================================================
...@@ -5536,9 +4932,9 @@...@@ -5536,9 +4932,9 @@
55364932
5537#define Q6_V_vmerge_VVw(Vu, Vv) \4933#define Q6_V_vmerge_VVw(Vu, Vv) \
5538 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmerge_qf)(Vu, Vv)4934 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmerge_qf)(Vu, Vv)
5539#endif /* __HEXAGON_ARCH___ >= 79 */4935#endif
55404936
5541#if __HVX_ARCH__ >= 794937#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5542/* ==========================================================================4938/* ==========================================================================
5543 Assembly Syntax: Vdd32.hf=vmpy(Vu32.f8,Vv32.f8)4939 Assembly Syntax: Vdd32.hf=vmpy(Vu32.f8,Vv32.f8)
5544 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vmpy_VV(HVX_Vector Vu,4940 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vmpy_VV(HVX_Vector Vu,
...@@ -5547,9 +4943,9 @@...@@ -5547,9 +4943,9 @@
55474943
5548#define Q6_Whf_vmpy_VV(Vu, Vv) \4944#define Q6_Whf_vmpy_VV(Vu, Vv) \
5549 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_f8)(Vu, Vv)4945 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_f8)(Vu, Vv)
5550#endif /* __HEXAGON_ARCH___ >= 79 */4946#endif
55514947
5552#if __HVX_ARCH__ >= 794948#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5553/* ==========================================================================4949/* ==========================================================================
5554 Assembly Syntax: Vxx32.hf+=vmpy(Vu32.f8,Vv32.f8)4950 Assembly Syntax: Vxx32.hf+=vmpy(Vu32.f8,Vv32.f8)
5555 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vmpyacc_WhfVV(HVX_VectorPair4951 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vmpyacc_WhfVV(HVX_VectorPair
...@@ -5559,7 +4955,7 @@...@@ -5559,7 +4955,7 @@
55594955
5560#define Q6_Whf_vmpyacc_WhfVV(Vxx, Vu, Vv) \4956#define Q6_Whf_vmpyacc_WhfVV(Vxx, Vu, Vv) \
5561 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_f8_acc)(Vxx, Vu, Vv)4957 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_f8_acc)(Vxx, Vu, Vv)
5562#endif /* __HEXAGON_ARCH___ >= 79 */4958#endif
55634959
5564#if __HVX_ARCH__ >= 794960#if __HVX_ARCH__ >= 79
5565/* ==========================================================================4961/* ==========================================================================
...@@ -5570,7 +4966,7 @@...@@ -5570,7 +4966,7 @@
55704966
5571#define Q6_Vqf16_vmpy_VhfRhf(Vu, Rt) \4967#define Q6_Vqf16_vmpy_VhfRhf(Vu, Rt) \
5572 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_hf)(Vu, Rt)4968 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_hf)(Vu, Rt)
5573#endif /* __HEXAGON_ARCH___ >= 79 */4969#endif
55744970
5575#if __HVX_ARCH__ >= 794971#if __HVX_ARCH__ >= 79
5576/* ==========================================================================4972/* ==========================================================================
...@@ -5581,7 +4977,7 @@...@@ -5581,7 +4977,7 @@
55814977
5582#define Q6_Vqf16_vmpy_Vqf16Rhf(Vu, Rt) \4978#define Q6_Vqf16_vmpy_Vqf16Rhf(Vu, Rt) \
5583 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_qf16)(Vu, Rt)4979 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_qf16)(Vu, Rt)
5584#endif /* __HEXAGON_ARCH___ >= 79 */4980#endif
55854981
5586#if __HVX_ARCH__ >= 794982#if __HVX_ARCH__ >= 79
5587/* ==========================================================================4983/* ==========================================================================
...@@ -5592,9 +4988,9 @@...@@ -5592,9 +4988,9 @@
55924988
5593#define Q6_Vqf32_vmpy_VsfRsf(Vu, Rt) \4989#define Q6_Vqf32_vmpy_VsfRsf(Vu, Rt) \
5594 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_sf)(Vu, Rt)4990 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_sf)(Vu, Rt)
5595#endif /* __HEXAGON_ARCH___ >= 79 */4991#endif
55964992
5597#if __HVX_ARCH__ >= 794993#if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__
5598/* ==========================================================================4994/* ==========================================================================
5599 Assembly Syntax: Vdd32.hf=vsub(Vu32.f8,Vv32.f8)4995 Assembly Syntax: Vdd32.hf=vsub(Vu32.f8,Vv32.f8)
5600 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vsub_VV(HVX_Vector Vu,4996 C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vsub_VV(HVX_Vector Vu,
...@@ -5603,7 +4999,400 @@...@@ -5603,7 +4999,400 @@
56034999
5604#define Q6_Whf_vsub_VV(Vu, Vv) \5000#define Q6_Whf_vsub_VV(Vu, Vv) \
5605 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_f8)(Vu, Vv)5001 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_f8)(Vu, Vv)
5606#endif /* __HEXAGON_ARCH___ >= 79 */5002#endif
5003
5004#if __HVX_ARCH__ >= 81
5005/* ==========================================================================
5006 Assembly Syntax: Vd32.qf16=vabs(Vu32.hf)
5007 C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vabs_Vhf(HVX_Vector Vu)
5008 Instruction Type: CVI_VS
5009 Execution Slots: SLOT0123
5010 ========================================================================== */
5011
5012#define Q6_Vqf16_vabs_Vhf(Vu) \
5013 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf16_hf)(Vu)
5014#endif
5015
5016#if __HVX_ARCH__ >= 81
5017/* ==========================================================================
5018 Assembly Syntax: Vd32.qf16=vabs(Vu32.qf16)
5019 C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vabs_Vqf16(HVX_Vector Vu)
5020 Instruction Type: CVI_VS
5021 Execution Slots: SLOT0123
5022 ========================================================================== */
5023
5024#define Q6_Vqf16_vabs_Vqf16(Vu) \
5025 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf16_qf16)(Vu)
5026#endif
5027
5028#if __HVX_ARCH__ >= 81
5029/* ==========================================================================
5030 Assembly Syntax: Vd32.qf32=vabs(Vu32.qf32)
5031 C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vabs_Vqf32(HVX_Vector Vu)
5032 Instruction Type: CVI_VS
5033 Execution Slots: SLOT0123
5034 ========================================================================== */
5035
5036#define Q6_Vqf32_vabs_Vqf32(Vu) \
5037 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf32_qf32)(Vu)
5038#endif
5039
5040#if __HVX_ARCH__ >= 81
5041/* ==========================================================================
5042 Assembly Syntax: Vd32.qf32=vabs(Vu32.sf)
5043 C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vabs_Vsf(HVX_Vector Vu)
5044 Instruction Type: CVI_VS
5045 Execution Slots: SLOT0123
5046 ========================================================================== */
5047
5048#define Q6_Vqf32_vabs_Vsf(Vu) \
5049 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf32_sf)(Vu)
5050#endif
5051
5052#if __HVX_ARCH__ >= 81
5053/* ==========================================================================
5054 Assembly Syntax: Vd32=valign4(Vu32,Vv32,Rt8)
5055 C Intrinsic Prototype: HVX_Vector Q6_V_valign4_VVR(HVX_Vector Vu, HVX_Vector
5056 Vv, Word32 Rt) Instruction Type: CVI_VA Execution Slots: SLOT0123
5057 ========================================================================== */
5058
5059#define Q6_V_valign4_VVR(Vu, Vv, Rt) \
5060 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valign4)(Vu, Vv, Rt)
5061#endif
5062
5063#if __HVX_ARCH__ >= 81
5064/* ==========================================================================
5065 Assembly Syntax: Vd32.bf=Vuu32.qf32
5066 C Intrinsic Prototype: HVX_Vector Q6_Vbf_equals_Wqf32(HVX_VectorPair Vuu)
5067 Instruction Type: CVI_VS
5068 Execution Slots: SLOT0123
5069 ========================================================================== */
5070
5071#define Q6_Vbf_equals_Wqf32(Vuu) \
5072 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_bf_qf32)(Vuu)
5073#endif
5074
5075#if __HVX_ARCH__ >= 81
5076/* ==========================================================================
5077 Assembly Syntax: Vd32.f8=Vu32.qf16
5078 C Intrinsic Prototype: HVX_Vector Q6_V_equals_Vqf16(HVX_Vector Vu)
5079 Instruction Type: CVI_VS
5080 Execution Slots: SLOT0123
5081 ========================================================================== */
5082
5083#define Q6_V_equals_Vqf16(Vu) \
5084 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_f8_qf16)(Vu)
5085#endif
5086
5087#if __HVX_ARCH__ >= 81
5088/* ==========================================================================
5089 Assembly Syntax: Vd32.h=Vu32.hf:rnd
5090 C Intrinsic Prototype: HVX_Vector Q6_Vh_equals_Vhf_rnd(HVX_Vector Vu)
5091 Instruction Type: CVI_VS
5092 Execution Slots: SLOT0123
5093 ========================================================================== */
5094
5095#define Q6_Vh_equals_Vhf_rnd(Vu) \
5096 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_h_hf_rnd)(Vu)
5097#endif
5098
5099#if __HVX_ARCH__ >= 81
5100/* ==========================================================================
5101 Assembly Syntax: Vdd32.qf16=Vu32.f8
5102 C Intrinsic Prototype: HVX_VectorPair Q6_Wqf16_equals_V(HVX_Vector Vu)
5103 Instruction Type: CVI_VP_VS
5104 Execution Slots: SLOT0123
5105 ========================================================================== */
5106
5107#define Q6_Wqf16_equals_V(Vu) \
5108 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_f8)(Vu)
5109#endif
5110
5111#if __HVX_ARCH__ >= 81
5112/* ==========================================================================
5113 Assembly Syntax: Vd32.qf16=Vu32.hf
5114 C Intrinsic Prototype: HVX_Vector Q6_Vqf16_equals_Vhf(HVX_Vector Vu)
5115 Instruction Type: CVI_VS
5116 Execution Slots: SLOT0123
5117 ========================================================================== */
5118
5119#define Q6_Vqf16_equals_Vhf(Vu) \
5120 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_hf)(Vu)
5121#endif
5122
5123#if __HVX_ARCH__ >= 81
5124/* ==========================================================================
5125 Assembly Syntax: Vd32.qf16=Vu32.qf16
5126 C Intrinsic Prototype: HVX_Vector Q6_Vqf16_equals_Vqf16(HVX_Vector Vu)
5127 Instruction Type: CVI_VS
5128 Execution Slots: SLOT0123
5129 ========================================================================== */
5130
5131#define Q6_Vqf16_equals_Vqf16(Vu) \
5132 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_qf16)(Vu)
5133#endif
5134
5135#if __HVX_ARCH__ >= 81
5136/* ==========================================================================
5137 Assembly Syntax: Vd32.qf32=Vu32.qf32
5138 C Intrinsic Prototype: HVX_Vector Q6_Vqf32_equals_Vqf32(HVX_Vector Vu)
5139 Instruction Type: CVI_VS
5140 Execution Slots: SLOT0123
5141 ========================================================================== */
5142
5143#define Q6_Vqf32_equals_Vqf32(Vu) \
5144 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf32_qf32)(Vu)
5145#endif
5146
5147#if __HVX_ARCH__ >= 81
5148/* ==========================================================================
5149 Assembly Syntax: Vd32.qf32=Vu32.sf
5150 C Intrinsic Prototype: HVX_Vector Q6_Vqf32_equals_Vsf(HVX_Vector Vu)
5151 Instruction Type: CVI_VS
5152 Execution Slots: SLOT0123
5153 ========================================================================== */
5154
5155#define Q6_Vqf32_equals_Vsf(Vu) \
5156 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf32_sf)(Vu)
5157#endif
5158
5159#if __HVX_ARCH__ >= 81
5160/* ==========================================================================
5161 Assembly Syntax: Qd4=vcmp.eq(Vu32.hf,Vv32.hf)
5162 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VhfVhf(HVX_Vector Vu,
5163 HVX_Vector Vv) Instruction Type: CVI_VA Execution Slots: SLOT0123
5164 ========================================================================== */
5165
5166#define Q6_Q_vcmp_eq_VhfVhf(Vu, Vv) \
5167 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \
5168 (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf)(Vu, Vv)), -1)
5169#endif
5170
5171#if __HVX_ARCH__ >= 81
5172/* ==========================================================================
5173 Assembly Syntax: Qx4&=vcmp.eq(Vu32.hf,Vv32.hf)
5174 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVhfVhf(HVX_VectorPred
5175 Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution
5176 Slots: SLOT0123
5177 ========================================================================== */
5178
5179#define Q6_Q_vcmp_eqand_QVhfVhf(Qx, Vu, Vv) \
5180 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \
5181 (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_and)( \
5182 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5183 Vv)), \
5184 -1)
5185#endif
5186
5187#if __HVX_ARCH__ >= 81
5188/* ==========================================================================
5189 Assembly Syntax: Qx4|=vcmp.eq(Vu32.hf,Vv32.hf)
5190 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVhfVhf(HVX_VectorPred
5191 Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution
5192 Slots: SLOT0123
5193 ========================================================================== */
5194
5195#define Q6_Q_vcmp_eqor_QVhfVhf(Qx, Vu, Vv) \
5196 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \
5197 (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_or)( \
5198 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5199 Vv)), \
5200 -1)
5201#endif
5202
5203#if __HVX_ARCH__ >= 81
5204/* ==========================================================================
5205 Assembly Syntax: Qx4^=vcmp.eq(Vu32.hf,Vv32.hf)
5206 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVhfVhf(HVX_VectorPred
5207 Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution
5208 Slots: SLOT0123
5209 ========================================================================== */
5210
5211#define Q6_Q_vcmp_eqxacc_QVhfVhf(Qx, Vu, Vv) \
5212 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \
5213 (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_xor)( \
5214 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5215 Vv)), \
5216 -1)
5217#endif
5218
5219#if __HVX_ARCH__ >= 81
5220/* ==========================================================================
5221 Assembly Syntax: Qd4=vcmp.eq(Vu32.sf,Vv32.sf)
5222 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VsfVsf(HVX_Vector Vu,
5223 HVX_Vector Vv) Instruction Type: CVI_VA Execution Slots: SLOT0123
5224 ========================================================================== */
5225
5226#define Q6_Q_vcmp_eq_VsfVsf(Vu, Vv) \
5227 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \
5228 (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf)(Vu, Vv)), -1)
5229#endif
5230
5231#if __HVX_ARCH__ >= 81
5232/* ==========================================================================
5233 Assembly Syntax: Qx4&=vcmp.eq(Vu32.sf,Vv32.sf)
5234 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVsfVsf(HVX_VectorPred
5235 Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution
5236 Slots: SLOT0123
5237 ========================================================================== */
5238
5239#define Q6_Q_vcmp_eqand_QVsfVsf(Qx, Vu, Vv) \
5240 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \
5241 (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_and)( \
5242 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5243 Vv)), \
5244 -1)
5245#endif
5246
5247#if __HVX_ARCH__ >= 81
5248/* ==========================================================================
5249 Assembly Syntax: Qx4|=vcmp.eq(Vu32.sf,Vv32.sf)
5250 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVsfVsf(HVX_VectorPred
5251 Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution
5252 Slots: SLOT0123
5253 ========================================================================== */
5254
5255#define Q6_Q_vcmp_eqor_QVsfVsf(Qx, Vu, Vv) \
5256 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \
5257 (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_or)( \
5258 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5259 Vv)), \
5260 -1)
5261#endif
5262
5263#if __HVX_ARCH__ >= 81
5264/* ==========================================================================
5265 Assembly Syntax: Qx4^=vcmp.eq(Vu32.sf,Vv32.sf)
5266 C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVsfVsf(HVX_VectorPred
5267 Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution
5268 Slots: SLOT0123
5269 ========================================================================== */
5270
5271#define Q6_Q_vcmp_eqxacc_QVsfVsf(Qx, Vu, Vv) \
5272 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \
5273 (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_xor)( \
5274 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \
5275 Vv)), \
5276 -1)
5277#endif
5278
5279#if __HVX_ARCH__ >= 81
5280/* ==========================================================================
5281 Assembly Syntax: Vd32.w=vilog2(Vu32.hf)
5282 C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vhf(HVX_Vector Vu)
5283 Instruction Type: CVI_VS
5284 Execution Slots: SLOT0123
5285 ========================================================================== */
5286
5287#define Q6_Vw_vilog2_Vhf(Vu) \
5288 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_hf)(Vu)
5289#endif
5290
5291#if __HVX_ARCH__ >= 81
5292/* ==========================================================================
5293 Assembly Syntax: Vd32.w=vilog2(Vu32.qf16)
5294 C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vqf16(HVX_Vector Vu)
5295 Instruction Type: CVI_VS
5296 Execution Slots: SLOT0123
5297 ========================================================================== */
5298
5299#define Q6_Vw_vilog2_Vqf16(Vu) \
5300 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_qf16)(Vu)
5301#endif
5302
5303#if __HVX_ARCH__ >= 81
5304/* ==========================================================================
5305 Assembly Syntax: Vd32.w=vilog2(Vu32.qf32)
5306 C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vqf32(HVX_Vector Vu)
5307 Instruction Type: CVI_VS
5308 Execution Slots: SLOT0123
5309 ========================================================================== */
5310
5311#define Q6_Vw_vilog2_Vqf32(Vu) \
5312 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_qf32)(Vu)
5313#endif
5314
5315#if __HVX_ARCH__ >= 81
5316/* ==========================================================================
5317 Assembly Syntax: Vd32.w=vilog2(Vu32.sf)
5318 C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vsf(HVX_Vector Vu)
5319 Instruction Type: CVI_VS
5320 Execution Slots: SLOT0123
5321 ========================================================================== */
5322
5323#define Q6_Vw_vilog2_Vsf(Vu) \
5324 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_sf)(Vu)
5325#endif
5326
5327#if __HVX_ARCH__ >= 81
5328/* ==========================================================================
5329 Assembly Syntax: Vd32.qf16=vneg(Vu32.hf)
5330 C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vneg_Vhf(HVX_Vector Vu)
5331 Instruction Type: CVI_VS
5332 Execution Slots: SLOT0123
5333 ========================================================================== */
5334
5335#define Q6_Vqf16_vneg_Vhf(Vu) \
5336 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf16_hf)(Vu)
5337#endif
5338
5339#if __HVX_ARCH__ >= 81
5340/* ==========================================================================
5341 Assembly Syntax: Vd32.qf16=vneg(Vu32.qf16)
5342 C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vneg_Vqf16(HVX_Vector Vu)
5343 Instruction Type: CVI_VS
5344 Execution Slots: SLOT0123
5345 ========================================================================== */
5346
5347#define Q6_Vqf16_vneg_Vqf16(Vu) \
5348 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf16_qf16)(Vu)
5349#endif
5350
5351#if __HVX_ARCH__ >= 81
5352/* ==========================================================================
5353 Assembly Syntax: Vd32.qf32=vneg(Vu32.qf32)
5354 C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vneg_Vqf32(HVX_Vector Vu)
5355 Instruction Type: CVI_VS
5356 Execution Slots: SLOT0123
5357 ========================================================================== */
5358
5359#define Q6_Vqf32_vneg_Vqf32(Vu) \
5360 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf32_qf32)(Vu)
5361#endif
5362
5363#if __HVX_ARCH__ >= 81
5364/* ==========================================================================
5365 Assembly Syntax: Vd32.qf32=vneg(Vu32.sf)
5366 C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vneg_Vsf(HVX_Vector Vu)
5367 Instruction Type: CVI_VS
5368 Execution Slots: SLOT0123
5369 ========================================================================== */
5370
5371#define Q6_Vqf32_vneg_Vsf(Vu) \
5372 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf32_sf)(Vu)
5373#endif
5374
5375#if __HVX_ARCH__ >= 81
5376/* ==========================================================================
5377 Assembly Syntax: Vd32.qf16=vsub(Vu32.hf,Vv32.qf16)
5378 C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vsub_VhfVqf16(HVX_Vector Vu,
5379 HVX_Vector Vv) Instruction Type: CVI_VS Execution Slots: SLOT0123
5380 ========================================================================== */
5381
5382#define Q6_Vqf16_vsub_VhfVqf16(Vu, Vv) \
5383 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_mix)(Vu, Vv)
5384#endif
5385
5386#if __HVX_ARCH__ >= 81
5387/* ==========================================================================
5388 Assembly Syntax: Vd32.qf32=vsub(Vu32.sf,Vv32.qf32)
5389 C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vsub_VsfVqf32(HVX_Vector Vu,
5390 HVX_Vector Vv) Instruction Type: CVI_VS Execution Slots: SLOT0123
5391 ========================================================================== */
5392
5393#define Q6_Vqf32_vsub_VsfVqf32(Vu, Vv) \
5394 __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_mix)(Vu, Vv)
5395#endif
56075396
5608#endif /* __HVX__ */5397#endif /* __HVX__ */
56095398
lib/include/immintrin.h-12
...@@ -475,24 +475,12 @@ _storebe_i64(void * __P, long long __D) {...@@ -475,24 +475,12 @@ _storebe_i64(void * __P, long long __D) {
475475
476#include <amxfp8intrin.h>476#include <amxfp8intrin.h>
477477
478#include <amxtransposeintrin.h>
479
480#include <amxmovrsintrin.h>478#include <amxmovrsintrin.h>
481479
482#include <amxmovrstransposeintrin.h>
483
484#include <amxavx512intrin.h>480#include <amxavx512intrin.h>
485481
486#include <amxtf32intrin.h>482#include <amxtf32intrin.h>
487483
488#include <amxtf32transposeintrin.h>
489
490#include <amxbf16transposeintrin.h>
491
492#include <amxfp16transposeintrin.h>
493
494#include <amxcomplextransposeintrin.h>
495
496#include <avx512vp2intersectintrin.h>484#include <avx512vp2intersectintrin.h>
497485
498#include <avx512vlvp2intersectintrin.h>486#include <avx512vlvp2intersectintrin.h>
lib/include/intrin.h+4
...@@ -30,6 +30,10 @@...@@ -30,6 +30,10 @@
30#include <arm64intr.h>30#include <arm64intr.h>
31#endif31#endif
3232
33#if defined(__ARM_ACLE)
34#include <arm_acle.h>
35#endif
36
33/* For the definition of jmp_buf. */37/* For the definition of jmp_buf. */
34#if __STDC_HOSTED__38#if __STDC_HOSTED__
35#include <setjmp.h>39#include <setjmp.h>
lib/include/lasxintrin.h+113
...@@ -10,6 +10,8 @@...@@ -10,6 +10,8 @@
10#ifndef _LOONGSON_ASXINTRIN_H10#ifndef _LOONGSON_ASXINTRIN_H
11#define _LOONGSON_ASXINTRIN_H 111#define _LOONGSON_ASXINTRIN_H 1
1212
13#include <lsxintrin.h>
14
13#if defined(__loongarch_asx)15#if defined(__loongarch_asx)
1416
15typedef signed char v32i8 __attribute__((vector_size(32), aligned(32)));17typedef signed char v32i8 __attribute__((vector_size(32), aligned(32)));
...@@ -3882,5 +3884,116 @@ extern __inline...@@ -3882,5 +3884,116 @@ extern __inline
38823884
3883#define __lasx_xvrepli_w(/*si10*/ _1) ((__m256i)__builtin_lasx_xvrepli_w((_1)))3885#define __lasx_xvrepli_w(/*si10*/ _1) ((__m256i)__builtin_lasx_xvrepli_w((_1)))
38843886
3887#if defined(__loongarch_asx_sx_conv)
3888
3889extern __inline
3890 __attribute__((__gnu_inline__, __always_inline__,
3891 __artificial__)) __m256 __lasx_cast_128_s(__m128 _1) {
3892 return (__m256)__builtin_lasx_cast_128_s((v4f32)_1);
3893}
3894
3895extern __inline
3896 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d
3897 __lasx_cast_128_d(__m128d _1) {
3898 return (__m256d)__builtin_lasx_cast_128_d((v2f64)_1);
3899}
3900
3901extern __inline
3902 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i
3903 __lasx_cast_128(__m128i _1) {
3904 return (__m256i)__builtin_lasx_cast_128((v2i64)_1);
3905}
3906
3907extern __inline
3908 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256
3909 __lasx_concat_128_s(__m128 _1, __m128 _2) {
3910 return (__m256)__builtin_lasx_concat_128_s((v4f32)_1, (v4f32)_2);
3911}
3912
3913extern __inline
3914 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d
3915 __lasx_concat_128_d(__m128d _1, __m128d _2) {
3916 return (__m256d)__builtin_lasx_concat_128_d((v2f64)_1, (v2f64)_2);
3917}
3918
3919extern __inline
3920 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i
3921 __lasx_concat_128(__m128i _1, __m128i _2) {
3922 return (__m256i)__builtin_lasx_concat_128((v2i64)_1, (v2i64)_2);
3923}
3924
3925extern __inline
3926 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128
3927 __lasx_extract_128_lo_s(__m256 _1) {
3928 return (__m128)__builtin_lasx_extract_128_lo_s((v8f32)_1);
3929}
3930
3931extern __inline
3932 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d
3933 __lasx_extract_128_lo_d(__m256d _1) {
3934 return (__m128d)__builtin_lasx_extract_128_lo_d((v4f64)_1);
3935}
3936
3937extern __inline
3938 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i
3939 __lasx_extract_128_lo(__m256i _1) {
3940 return (__m128i)__builtin_lasx_extract_128_lo((v4i64)_1);
3941}
3942
3943extern __inline
3944 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128
3945 __lasx_extract_128_hi_s(__m256 _1) {
3946 return (__m128)__builtin_lasx_extract_128_hi_s((v8f32)_1);
3947}
3948
3949extern __inline
3950 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d
3951 __lasx_extract_128_hi_d(__m256d _1) {
3952 return (__m128d)__builtin_lasx_extract_128_hi_d((v4f64)_1);
3953}
3954
3955extern __inline
3956 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i
3957 __lasx_extract_128_hi(__m256i _1) {
3958 return (__m128i)__builtin_lasx_extract_128_hi((v4i64)_1);
3959}
3960
3961extern __inline
3962 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256
3963 __lasx_insert_128_lo_s(__m256 _1, __m128 _2) {
3964 return (__m256)__builtin_lasx_insert_128_lo_s((v8f32)_1, (v4f32)_2);
3965}
3966
3967extern __inline
3968 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d
3969 __lasx_insert_128_lo_d(__m256d _1, __m128d _2) {
3970 return (__m256d)__builtin_lasx_insert_128_lo_d((v4f64)_1, (v2f64)_2);
3971}
3972
3973extern __inline
3974 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i
3975 __lasx_insert_128_lo(__m256i _1, __m128i _2) {
3976 return (__m256i)__builtin_lasx_insert_128_lo((v4i64)_1, (v2i64)_2);
3977}
3978
3979extern __inline
3980 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256
3981 __lasx_insert_128_hi_s(__m256 _1, __m128 _2) {
3982 return (__m256)__builtin_lasx_insert_128_hi_s((v8f32)_1, (v4f32)_2);
3983}
3984
3985extern __inline
3986 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d
3987 __lasx_insert_128_hi_d(__m256d _1, __m128d _2) {
3988 return (__m256d)__builtin_lasx_insert_128_hi_d((v4f64)_1, (v2f64)_2);
3989}
3990
3991extern __inline
3992 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i
3993 __lasx_insert_128_hi(__m256i _1, __m128i _2) {
3994 return (__m256i)__builtin_lasx_insert_128_hi((v4i64)_1, (v2i64)_2);
3995}
3996
3997#endif /* defined(__loongarch_asx_sx_conv). */
3885#endif /* defined(__loongarch_asx). */3998#endif /* defined(__loongarch_asx). */
3886#endif /* _LOONGSON_ASXINTRIN_H. */3999#endif /* _LOONGSON_ASXINTRIN_H. */
lib/include/llvm_libc_wrappers/assert.h+3-5
...@@ -19,13 +19,11 @@...@@ -19,13 +19,11 @@
1919
20#if defined(__HIP__) || defined(__CUDA__)20#if defined(__HIP__) || defined(__CUDA__)
21#define __LIBC_ATTRS __attribute__((device))21#define __LIBC_ATTRS __attribute__((device))
22#else
23#define __LIBC_ATTRS
22#endif24#endif
2325
24#pragma omp begin declare target26// TODO: Define these for CUDA / HIP.
25
26#include <llvm-libc-decls/assert.h>
27
28#pragma omp end declare target
2927
30#undef __LIBC_ATTRS28#undef __LIBC_ATTRS
3129
lib/include/llvm_libc_wrappers/ctype.h+3-115
...@@ -13,128 +13,16 @@...@@ -13,128 +13,16 @@
13#error "This file is for GPU offloading compilation only"13#error "This file is for GPU offloading compilation only"
14#endif14#endif
1515
16// The GNU headers like to define 'toupper' and 'tolower' redundantly. This is
17// necessary to prevent it from doing that and remapping our implementation.
18#if (defined(__NVPTX__) || defined(__AMDGPU__)) && defined(__GLIBC__)
19#pragma push_macro("__USE_EXTERN_INLINES")
20#undef __USE_EXTERN_INLINES
21#endif
22
23#include_next <ctype.h>16#include_next <ctype.h>
2417
25#if (defined(__NVPTX__) || defined(__AMDGPU__)) && defined(__GLIBC__)
26#pragma pop_macro("__USE_EXTERN_INLINES")
27#endif
28
29#if __has_include(<llvm-libc-decls/ctype.h>)
30
31#if defined(__HIP__) || defined(__CUDA__)18#if defined(__HIP__) || defined(__CUDA__)
32#define __LIBC_ATTRS __attribute__((device))19#define __LIBC_ATTRS __attribute__((device))
20#else
21#define __LIBC_ATTRS
33#endif22#endif
3423
35// The GNU headers like to provide these as macros, we need to undefine them so24// TODO: Define these for CUDA / HIP.
36// they do not conflict with the following definitions for the GPU.
37
38#pragma push_macro("isalnum")
39#pragma push_macro("isalpha")
40#pragma push_macro("isascii")
41#pragma push_macro("isblank")
42#pragma push_macro("iscntrl")
43#pragma push_macro("isdigit")
44#pragma push_macro("isgraph")
45#pragma push_macro("islower")
46#pragma push_macro("isprint")
47#pragma push_macro("ispunct")
48#pragma push_macro("isspace")
49#pragma push_macro("isupper")
50#pragma push_macro("isxdigit")
51#pragma push_macro("toascii")
52#pragma push_macro("tolower")
53#pragma push_macro("toupper")
54#pragma push_macro("isalnum_l")
55#pragma push_macro("isalpha_l")
56#pragma push_macro("isascii_l")
57#pragma push_macro("isblank_l")
58#pragma push_macro("iscntrl_l")
59#pragma push_macro("isdigit_l")
60#pragma push_macro("isgraph_l")
61#pragma push_macro("islower_l")
62#pragma push_macro("isprint_l")
63#pragma push_macro("ispunct_l")
64#pragma push_macro("isspace_l")
65#pragma push_macro("isupper_l")
66#pragma push_macro("isxdigit_l")
67
68#undef isalnum
69#undef isalpha
70#undef isascii
71#undef iscntrl
72#undef isdigit
73#undef islower
74#undef isgraph
75#undef isprint
76#undef ispunct
77#undef isspace
78#undef isupper
79#undef isblank
80#undef isxdigit
81#undef toascii
82#undef tolower
83#undef toupper
84#undef isalnum_l
85#undef isalpha_l
86#undef iscntrl_l
87#undef isdigit_l
88#undef islower_l
89#undef isgraph_l
90#undef isprint_l
91#undef ispunct_l
92#undef isspace_l
93#undef isupper_l
94#undef isblank_l
95#undef isxdigit_l
96
97#pragma omp begin declare target
98
99#include <llvm-libc-decls/ctype.h>
100
101#pragma omp end declare target
102
103// Restore the original macros when compiling on the host.
104#if !defined(__NVPTX__) && !defined(__AMDGPU__)
105#pragma pop_macro("isalnum")
106#pragma pop_macro("isalpha")
107#pragma pop_macro("isascii")
108#pragma pop_macro("isblank")
109#pragma pop_macro("iscntrl")
110#pragma pop_macro("isdigit")
111#pragma pop_macro("isgraph")
112#pragma pop_macro("islower")
113#pragma pop_macro("isprint")
114#pragma pop_macro("ispunct")
115#pragma pop_macro("isspace")
116#pragma pop_macro("isupper")
117#pragma pop_macro("isxdigit")
118#pragma pop_macro("toascii")
119#pragma pop_macro("tolower")
120#pragma pop_macro("toupper")
121#pragma pop_macro("isalnum_l")
122#pragma pop_macro("isalpha_l")
123#pragma pop_macro("isascii_l")
124#pragma pop_macro("isblank_l")
125#pragma pop_macro("iscntrl_l")
126#pragma pop_macro("isdigit_l")
127#pragma pop_macro("isgraph_l")
128#pragma pop_macro("islower_l")
129#pragma pop_macro("isprint_l")
130#pragma pop_macro("ispunct_l")
131#pragma pop_macro("isspace_l")
132#pragma pop_macro("isupper_l")
133#pragma pop_macro("isxdigit_l")
134#endif
13525
136#undef __LIBC_ATTRS26#undef __LIBC_ATTRS
13727
138#endif
139
140#endif // __CLANG_LLVM_LIBC_WRAPPERS_CTYPE_H__28#endif // __CLANG_LLVM_LIBC_WRAPPERS_CTYPE_H__
lib/include/llvm_libc_wrappers/inttypes.h+3-5
...@@ -19,13 +19,11 @@...@@ -19,13 +19,11 @@
1919
20#if defined(__HIP__) || defined(__CUDA__)20#if defined(__HIP__) || defined(__CUDA__)
21#define __LIBC_ATTRS __attribute__((device))21#define __LIBC_ATTRS __attribute__((device))
22#else
23#define __LIBC_ATTRS
22#endif24#endif
2325
24#pragma omp begin declare target26// TODO: Define these for CUDA / HIP.
25
26#include <llvm-libc-decls/inttypes.h>
27
28#pragma omp end declare target
2927
30#undef __LIBC_ATTRS28#undef __LIBC_ATTRS
3129
lib/include/llvm_libc_wrappers/stdio.h+10-38
...@@ -6,45 +6,19 @@...@@ -6,45 +6,19 @@
6//6//
7//===----------------------------------------------------------------------===//7//===----------------------------------------------------------------------===//
88
9#ifndef __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__
10#define __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__
11
9#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__)12#if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__)
10#error "This file is for GPU offloading compilation only"13#error "This file is for GPU offloading compilation only"
11#endif14#endif
1215
13#include_next <stdio.h>16#include_next <stdio.h>
1417
15// In some old versions of glibc, other standard headers sometimes define
16// special macros (e.g., __need_FILE) before including stdio.h to cause stdio.h
17// to produce special definitions. Future includes of stdio.h when those
18// special macros are undefined are expected to produce the normal definitions
19// from stdio.h.
20//
21// We do not apply our include guard (__CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__)
22// unconditionally to the above include_next. Otherwise, after an occurrence of
23// the first glibc stdio.h use case described above, the include_next would be
24// skipped for remaining includes of stdio.h, leaving required symbols
25// undefined.
26//
27// We make the following assumptions to handle all use cases:
28//
29// 1. If the above include_next produces special glibc definitions, then (a) it
30// does not produce the normal definitions that we must intercept below, (b)
31// the current file was included from a glibc header that already defined
32// __GLIBC__ (usually by including glibc's <features.h>), and (c) the above
33// include_next does not define _STDIO_H. In that case, we skip the rest of
34// the current file and don't guard against future includes.
35// 2. If the above include_next produces the normal stdio.h definitions, then
36// either (a) __GLIBC__ is not defined because C headers are from some other
37// libc implementation or (b) the above include_next defines _STDIO_H to
38// prevent the above include_next from having any effect in the future.
39#if !defined(__GLIBC__) || defined(_STDIO_H)
40
41#ifndef __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__
42#define __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__
43
44#if __has_include(<llvm-libc-decls/stdio.h>)
45
46#if defined(__HIP__) || defined(__CUDA__)18#if defined(__HIP__) || defined(__CUDA__)
47#define __LIBC_ATTRS __attribute__((device))19#define __LIBC_ATTRS __attribute__((device))
20#else
21#define __LIBC_ATTRS
48#endif22#endif
4923
50// Some headers provide these as macros. Temporarily undefine them so they do24// Some headers provide these as macros. Temporarily undefine them so they do
...@@ -60,21 +34,19 @@...@@ -60,21 +34,19 @@
6034
61#pragma omp begin declare target35#pragma omp begin declare target
6236
63#include <llvm-libc-decls/stdio.h>37__LIBC_ATTRS extern FILE *stderr;
38__LIBC_ATTRS extern FILE *stdin;
39__LIBC_ATTRS extern FILE *stdout;
6440
65#pragma omp end declare target41#pragma omp end declare target
6642
67#undef __LIBC_ATTRS
68
69// Restore the original macros when compiling on the host.43// Restore the original macros when compiling on the host.
70#if !defined(__NVPTX__) && !defined(__AMDGPU__)44#if !defined(__NVPTX__) && !defined(__AMDGPU__)
71#pragma pop_macro("stdout")
72#pragma pop_macro("stderr")45#pragma pop_macro("stderr")
73#pragma pop_macro("stdin")46#pragma pop_macro("stdin")
47#pragma pop_macro("stdout")
74#endif48#endif
7549
76#endif50#undef __LIBC_ATTRS
7751
78#endif // __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__52#endif // __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__
79
80#endif
lib/include/llvm_libc_wrappers/stdlib.h+3-24
...@@ -15,39 +15,18 @@...@@ -15,39 +15,18 @@
1515
16#include_next <stdlib.h>16#include_next <stdlib.h>
1717
18#if __has_include(<llvm-libc-decls/stdlib.h>)
19
20#if defined(__HIP__) || defined(__CUDA__)18#if defined(__HIP__) || defined(__CUDA__)
21#define __LIBC_ATTRS __attribute__((device))19#define __LIBC_ATTRS __attribute__((device))
20#else
21#define __LIBC_ATTRS
22#endif22#endif
2323
24#pragma omp begin declare target24#pragma omp begin declare target
2525
26// The LLVM C library uses these named types so we forward declare them.26// TODO: Define these for CUDA / HIP.
27typedef void (*__atexithandler_t)(void);
28typedef int (*__search_compare_t)(const void *, const void *);
29typedef int (*__qsortcompare_t)(const void *, const void *);
30typedef int (*__qsortrcompare_t)(const void *, const void *, void *);
31
32// Enforce ABI compatibility with the structs used by the LLVM C library.
33_Static_assert(__builtin_offsetof(div_t, quot) == 0, "ABI mismatch!");
34_Static_assert(__builtin_offsetof(ldiv_t, quot) == 0, "ABI mismatch!");
35_Static_assert(__builtin_offsetof(lldiv_t, quot) == 0, "ABI mismatch!");
36
37#if defined(__GLIBC__) && __cplusplus >= 201703L
38#define at_quick_exit atexit
39#endif
40
41#include <llvm-libc-decls/stdlib.h>
42
43#if defined(__GLIBC__) && __cplusplus >= 201703L
44#undef at_quick_exit
45#endif
4627
47#pragma omp end declare target28#pragma omp end declare target
4829
49#undef __LIBC_ATTRS30#undef __LIBC_ATTRS
5031
51#endif
52
53#endif // __CLANG_LLVM_LIBC_WRAPPERS_STDLIB_H__32#endif // __CLANG_LLVM_LIBC_WRAPPERS_STDLIB_H__
lib/include/llvm_libc_wrappers/string.h+2-70
...@@ -15,82 +15,14 @@...@@ -15,82 +15,14 @@
1515
16#include_next <string.h>16#include_next <string.h>
1717
18#if __has_include(<llvm-libc-decls/string.h>)
19
20#if defined(__HIP__) || defined(__CUDA__)18#if defined(__HIP__) || defined(__CUDA__)
21#define __LIBC_ATTRS __attribute__((device))19#define __LIBC_ATTRS __attribute__((device))
22#endif
23
24#pragma omp begin declare target
25
26// The GNU headers provide C++ standard compliant headers when in C++ mode and
27// the LLVM libc does not. We need to manually provide the definitions using the
28// same prototypes.
29#if defined(__cplusplus) && defined(__GLIBC__) && \
30 defined(__CORRECT_ISO_CPP_STRING_H_PROTO)
31
32#ifndef __LIBC_ATTRS
33#define __LIBC_ATTRS
34#endif
35
36extern "C" {
37void *memccpy(void *__restrict, const void *__restrict, int,
38 size_t) __LIBC_ATTRS;
39int memcmp(const void *, const void *, size_t) __LIBC_ATTRS;
40void *memcpy(void *__restrict, const void *__restrict, size_t) __LIBC_ATTRS;
41void *memmem(const void *, size_t, const void *, size_t) __LIBC_ATTRS;
42void *memmove(void *, const void *, size_t) __LIBC_ATTRS;
43void *mempcpy(void *__restrict, const void *__restrict, size_t) __LIBC_ATTRS;
44void *memset(void *, int, size_t) __LIBC_ATTRS;
45char *stpcpy(char *__restrict, const char *__restrict) __LIBC_ATTRS;
46char *stpncpy(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS;
47char *strcat(char *__restrict, const char *__restrict) __LIBC_ATTRS;
48int strcmp(const char *, const char *) __LIBC_ATTRS;
49int strcoll(const char *, const char *) __LIBC_ATTRS;
50char *strcpy(char *__restrict, const char *__restrict) __LIBC_ATTRS;
51size_t strcspn(const char *, const char *) __LIBC_ATTRS;
52char *strdup(const char *) __LIBC_ATTRS;
53size_t strlen(const char *) __LIBC_ATTRS;
54char *strncat(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS;
55int strncmp(const char *, const char *, size_t) __LIBC_ATTRS;
56char *strncpy(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS;
57char *strndup(const char *, size_t) __LIBC_ATTRS;
58size_t strnlen(const char *, size_t) __LIBC_ATTRS;
59size_t strspn(const char *, const char *) __LIBC_ATTRS;
60char *strtok(char *__restrict, const char *__restrict) __LIBC_ATTRS;
61char *strtok_r(char *__restrict, const char *__restrict,
62 char **__restrict) __LIBC_ATTRS;
63size_t strxfrm(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS;
64}
65
66extern "C++" {
67char *strstr(char *, const char *) noexcept __LIBC_ATTRS;
68const char *strstr(const char *, const char *) noexcept __LIBC_ATTRS;
69char *strpbrk(char *, const char *) noexcept __LIBC_ATTRS;
70const char *strpbrk(const char *, const char *) noexcept __LIBC_ATTRS;
71char *strrchr(char *, int) noexcept __LIBC_ATTRS;
72const char *strrchr(const char *, int) noexcept __LIBC_ATTRS;
73char *strchr(char *, int) noexcept __LIBC_ATTRS;
74const char *strchr(const char *, int) noexcept __LIBC_ATTRS;
75char *strchrnul(char *, int) noexcept __LIBC_ATTRS;
76const char *strchrnul(const char *, int) noexcept __LIBC_ATTRS;
77char *strcasestr(char *, const char *) noexcept __LIBC_ATTRS;
78const char *strcasestr(const char *, const char *) noexcept __LIBC_ATTRS;
79void *memrchr(void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS;
80const void *memrchr(const void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS;
81void *memchr(void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS;
82const void *memchr(const void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS;
83}
84
85#else20#else
86#include <llvm-libc-decls/string.h>21#define __LIBC_ATTRS
87
88#endif22#endif
8923
90#pragma omp end declare target24// TODO: Define these for CUDA / HIP.
9125
92#undef __LIBC_ATTRS26#undef __LIBC_ATTRS
9327
94#endif
95
96#endif // __CLANG_LLVM_LIBC_WRAPPERS_STRING_H__28#endif // __CLANG_LLVM_LIBC_WRAPPERS_STRING_H__
lib/include/llvm_libc_wrappers/time.h+4-10
...@@ -15,20 +15,14 @@...@@ -15,20 +15,14 @@
1515
16#include_next <time.h>16#include_next <time.h>
1717
18#if __has_include(<llvm-libc-decls/time.h>)
19
20#if defined(__HIP__) || defined(__CUDA__)18#if defined(__HIP__) || defined(__CUDA__)
21#define __LIBC_ATTRS __attribute__((device))19#define __LIBC_ATTRS __attribute__((device))
20#else
21#define __LIBC_ATTRS
22#endif22#endif
2323
24#pragma omp begin declare target24// TODO: Define these for CUDA / HIP.
25
26_Static_assert(sizeof(clock_t) == sizeof(long), "ABI mismatch!");
27
28#include <llvm-libc-decls/time.h>
2925
30#pragma omp end declare target26#undef __LIBC_ATTRS
31
32#endif
3327
34#endif // __CLANG_LLVM_LIBC_WRAPPERS_TIME_H__28#endif // __CLANG_LLVM_LIBC_WRAPPERS_TIME_H__
lib/include/mmintrin.h+188-257
...@@ -39,27 +39,21 @@ typedef short __v8hi __attribute__((__vector_size__(16)));...@@ -39,27 +39,21 @@ typedef short __v8hi __attribute__((__vector_size__(16)));
39typedef char __v16qi __attribute__((__vector_size__(16)));39typedef char __v16qi __attribute__((__vector_size__(16)));
4040
41/* Define the default attributes for the functions in this file. */41/* Define the default attributes for the functions in this file. */
42#if defined(__EVEX512__) && !defined(__AVX10_1_512__)42#if defined(__cplusplus) && (__cplusplus >= 201103L)
43#define __DEFAULT_FN_ATTRS_SSE2 \43#define __DEFAULT_FN_ATTRS_SSE2 \
44 __attribute__((__always_inline__, __nodebug__, \44 __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \
45 __target__("sse2,no-evex512"), __min_vector_width__(128)))45 __min_vector_width__(128))) constexpr
46#else46#else
47#define __DEFAULT_FN_ATTRS_SSE2 \47#define __DEFAULT_FN_ATTRS_SSE2 \
48 __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \48 __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \
49 __min_vector_width__(128)))49 __min_vector_width__(128)))
50#endif50#endif
5151
52#if defined(__cplusplus) && (__cplusplus >= 201103L)
53#define __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR __DEFAULT_FN_ATTRS_SSE2 constexpr
54#else
55#define __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR __DEFAULT_FN_ATTRS_SSE2
56#endif
57
58#define __trunc64(x) \52#define __trunc64(x) \
59 (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0)53 (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0)
60#define __anyext128(x) \54#define __zext128(x) \
61 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \55 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \
62 1, -1, -1)56 1, 2, 3)
6357
64/// Clears the MMX state by setting the state of the x87 stack registers58/// Clears the MMX state by setting the state of the x87 stack registers
65/// to empty.59/// to empty.
...@@ -68,9 +62,9 @@ typedef char __v16qi __attribute__((__vector_size__(16)));...@@ -68,9 +62,9 @@ typedef char __v16qi __attribute__((__vector_size__(16)));
68///62///
69/// This intrinsic corresponds to the <c> EMMS </c> instruction.63/// This intrinsic corresponds to the <c> EMMS </c> instruction.
70///64///
71static __inline__ void __attribute__((__always_inline__, __nodebug__,65static __inline__ void
72 __target__("mmx,no-evex512")))66 __attribute__((__always_inline__, __nodebug__, __target__("mmx")))
73_mm_empty(void) {67 _mm_empty(void) {
74 __builtin_ia32_emms();68 __builtin_ia32_emms();
75}69}
7670
...@@ -85,10 +79,8 @@ _mm_empty(void) {...@@ -85,10 +79,8 @@ _mm_empty(void) {
85/// A 32-bit integer value.79/// A 32-bit integer value.
86/// \returns A 64-bit integer vector. The lower 32 bits contain the value of the80/// \returns A 64-bit integer vector. The lower 32 bits contain the value of the
87/// parameter. The upper 32 bits are set to 0.81/// parameter. The upper 32 bits are set to 0.
88static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE282static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cvtsi32_si64(int __i) {
89_mm_cvtsi32_si64(int __i)83 return __extension__(__m64)(__v2si){__i, 0};
90{
91 return __extension__ (__m64)(__v2si){__i, 0};
92}84}
9385
94/// Returns the lower 32 bits of a 64-bit integer vector as a 32-bit86/// Returns the lower 32 bits of a 64-bit integer vector as a 32-bit
...@@ -102,10 +94,8 @@ _mm_cvtsi32_si64(int __i)...@@ -102,10 +94,8 @@ _mm_cvtsi32_si64(int __i)
102/// A 64-bit integer vector.94/// A 64-bit integer vector.
103/// \returns A 32-bit signed integer value containing the lower 32 bits of the95/// \returns A 32-bit signed integer value containing the lower 32 bits of the
104/// parameter.96/// parameter.
105static __inline__ int __DEFAULT_FN_ATTRS_SSE297static __inline__ int __DEFAULT_FN_ATTRS_SSE2 _mm_cvtsi64_si32(__m64 __m) {
106_mm_cvtsi64_si32(__m64 __m)98 return ((__v2si)__m)[0];
107{
108 return ((__v2si)__m)[0];
109}99}
110100
111/// Casts a 64-bit signed integer value into a 64-bit integer vector.101/// Casts a 64-bit signed integer value into a 64-bit integer vector.
...@@ -118,10 +108,8 @@ _mm_cvtsi64_si32(__m64 __m)...@@ -118,10 +108,8 @@ _mm_cvtsi64_si32(__m64 __m)
118/// A 64-bit signed integer.108/// A 64-bit signed integer.
119/// \returns A 64-bit integer vector containing the same bitwise pattern as the109/// \returns A 64-bit integer vector containing the same bitwise pattern as the
120/// parameter.110/// parameter.
121static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2111static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cvtsi64_m64(long long __i) {
122_mm_cvtsi64_m64(long long __i)112 return __extension__(__m64)(__v1di){__i};
123{
124 return (__m64)__i;
125}113}
126114
127/// Casts a 64-bit integer vector into a 64-bit signed integer value.115/// Casts a 64-bit integer vector into a 64-bit signed integer value.
...@@ -134,10 +122,8 @@ _mm_cvtsi64_m64(long long __i)...@@ -134,10 +122,8 @@ _mm_cvtsi64_m64(long long __i)
134/// A 64-bit integer vector.122/// A 64-bit integer vector.
135/// \returns A 64-bit signed integer containing the same bitwise pattern as the123/// \returns A 64-bit signed integer containing the same bitwise pattern as the
136/// parameter.124/// parameter.
137static __inline__ long long __DEFAULT_FN_ATTRS_SSE2125static __inline__ long long __DEFAULT_FN_ATTRS_SSE2 _mm_cvtm64_si64(__m64 __m) {
138_mm_cvtm64_si64(__m64 __m)126 return ((__v1di)__m)[0];
139{
140 return (long long)__m;
141}127}
142128
143/// Converts, with saturation, 16-bit signed integers from both 64-bit integer129/// Converts, with saturation, 16-bit signed integers from both 64-bit integer
...@@ -159,11 +145,10 @@ _mm_cvtm64_si64(__m64 __m)...@@ -159,11 +145,10 @@ _mm_cvtm64_si64(__m64 __m)
159/// written to the upper 32 bits of the result.145/// written to the upper 32 bits of the result.
160/// \returns A 64-bit integer vector of [8 x i8] containing the converted146/// \returns A 64-bit integer vector of [8 x i8] containing the converted
161/// values.147/// values.
162static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2148static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_packs_pi16(__m64 __m1,
163_mm_packs_pi16(__m64 __m1, __m64 __m2)149 __m64 __m2) {
164{150 return __trunc64(__builtin_ia32_packsswb128(
165 return __trunc64(__builtin_ia32_packsswb128(151 (__v8hi)__builtin_shufflevector(__m1, __m2, 0, 1), (__v8hi){}));
166 (__v8hi)__builtin_shufflevector(__m1, __m2, 0, 1), (__v8hi){}));
167}152}
168153
169/// Converts, with saturation, 32-bit signed integers from both 64-bit integer154/// Converts, with saturation, 32-bit signed integers from both 64-bit integer
...@@ -185,11 +170,10 @@ _mm_packs_pi16(__m64 __m1, __m64 __m2)...@@ -185,11 +170,10 @@ _mm_packs_pi16(__m64 __m1, __m64 __m2)
185/// written to the upper 32 bits of the result.170/// written to the upper 32 bits of the result.
186/// \returns A 64-bit integer vector of [4 x i16] containing the converted171/// \returns A 64-bit integer vector of [4 x i16] containing the converted
187/// values.172/// values.
188static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2173static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_packs_pi32(__m64 __m1,
189_mm_packs_pi32(__m64 __m1, __m64 __m2)174 __m64 __m2) {
190{175 return __trunc64(__builtin_ia32_packssdw128(
191 return __trunc64(__builtin_ia32_packssdw128(176 (__v4si)__builtin_shufflevector(__m1, __m2, 0, 1), (__v4si){}));
192 (__v4si)__builtin_shufflevector(__m1, __m2, 0, 1), (__v4si){}));
193}177}
194178
195/// Converts, with saturation, 16-bit signed integers from both 64-bit integer179/// Converts, with saturation, 16-bit signed integers from both 64-bit integer
...@@ -211,11 +195,10 @@ _mm_packs_pi32(__m64 __m1, __m64 __m2)...@@ -211,11 +195,10 @@ _mm_packs_pi32(__m64 __m1, __m64 __m2)
211/// written to the upper 32 bits of the result.195/// written to the upper 32 bits of the result.
212/// \returns A 64-bit integer vector of [8 x i8] containing the converted196/// \returns A 64-bit integer vector of [8 x i8] containing the converted
213/// values.197/// values.
214static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2198static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_packs_pu16(__m64 __m1,
215_mm_packs_pu16(__m64 __m1, __m64 __m2)199 __m64 __m2) {
216{200 return __trunc64(__builtin_ia32_packuswb128(
217 return __trunc64(__builtin_ia32_packuswb128(201 (__v8hi)__builtin_shufflevector(__m1, __m2, 0, 1), (__v8hi){}));
218 (__v8hi)__builtin_shufflevector(__m1, __m2, 0, 1), (__v8hi){}));
219}202}
220203
221/// Unpacks the upper 32 bits from two 64-bit integer vectors of [8 x i8]204/// Unpacks the upper 32 bits from two 64-bit integer vectors of [8 x i8]
...@@ -239,11 +222,10 @@ _mm_packs_pu16(__m64 __m1, __m64 __m2)...@@ -239,11 +222,10 @@ _mm_packs_pu16(__m64 __m1, __m64 __m2)
239/// Bits [63:56] are written to bits [63:56] of the result.222/// Bits [63:56] are written to bits [63:56] of the result.
240/// \returns A 64-bit integer vector of [8 x i8] containing the interleaved223/// \returns A 64-bit integer vector of [8 x i8] containing the interleaved
241/// values.224/// values.
242static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2225static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpackhi_pi8(__m64 __m1,
243_mm_unpackhi_pi8(__m64 __m1, __m64 __m2)226 __m64 __m2) {
244{227 return (__m64)__builtin_shufflevector((__v8qi)__m1, (__v8qi)__m2, 4, 12, 5,
245 return (__m64)__builtin_shufflevector((__v8qi)__m1, (__v8qi)__m2,228 13, 6, 14, 7, 15);
246 4, 12, 5, 13, 6, 14, 7, 15);
247}229}
248230
249/// Unpacks the upper 32 bits from two 64-bit integer vectors of231/// Unpacks the upper 32 bits from two 64-bit integer vectors of
...@@ -263,11 +245,9 @@ _mm_unpackhi_pi8(__m64 __m1, __m64 __m2)...@@ -263,11 +245,9 @@ _mm_unpackhi_pi8(__m64 __m1, __m64 __m2)
263/// Bits [63:48] are written to bits [63:48] of the result.245/// Bits [63:48] are written to bits [63:48] of the result.
264/// \returns A 64-bit integer vector of [4 x i16] containing the interleaved246/// \returns A 64-bit integer vector of [4 x i16] containing the interleaved
265/// values.247/// values.
266static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2248static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpackhi_pi16(__m64 __m1,
267_mm_unpackhi_pi16(__m64 __m1, __m64 __m2)249 __m64 __m2) {
268{250 return (__m64)__builtin_shufflevector((__v4hi)__m1, (__v4hi)__m2, 2, 6, 3, 7);
269 return (__m64)__builtin_shufflevector((__v4hi)__m1, (__v4hi)__m2,
270 2, 6, 3, 7);
271}251}
272252
273/// Unpacks the upper 32 bits from two 64-bit integer vectors of253/// Unpacks the upper 32 bits from two 64-bit integer vectors of
...@@ -285,10 +265,9 @@ _mm_unpackhi_pi16(__m64 __m1, __m64 __m2)...@@ -285,10 +265,9 @@ _mm_unpackhi_pi16(__m64 __m1, __m64 __m2)
285/// the upper 32 bits of the result.265/// the upper 32 bits of the result.
286/// \returns A 64-bit integer vector of [2 x i32] containing the interleaved266/// \returns A 64-bit integer vector of [2 x i32] containing the interleaved
287/// values.267/// values.
288static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2268static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpackhi_pi32(__m64 __m1,
289_mm_unpackhi_pi32(__m64 __m1, __m64 __m2)269 __m64 __m2) {
290{270 return (__m64)__builtin_shufflevector((__v2si)__m1, (__v2si)__m2, 1, 3);
291 return (__m64)__builtin_shufflevector((__v2si)__m1, (__v2si)__m2, 1, 3);
292}271}
293272
294/// Unpacks the lower 32 bits from two 64-bit integer vectors of [8 x i8]273/// Unpacks the lower 32 bits from two 64-bit integer vectors of [8 x i8]
...@@ -312,11 +291,10 @@ _mm_unpackhi_pi32(__m64 __m1, __m64 __m2)...@@ -312,11 +291,10 @@ _mm_unpackhi_pi32(__m64 __m1, __m64 __m2)
312/// Bits [31:24] are written to bits [63:56] of the result.291/// Bits [31:24] are written to bits [63:56] of the result.
313/// \returns A 64-bit integer vector of [8 x i8] containing the interleaved292/// \returns A 64-bit integer vector of [8 x i8] containing the interleaved
314/// values.293/// values.
315static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2294static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpacklo_pi8(__m64 __m1,
316_mm_unpacklo_pi8(__m64 __m1, __m64 __m2)295 __m64 __m2) {
317{296 return (__m64)__builtin_shufflevector((__v8qi)__m1, (__v8qi)__m2, 0, 8, 1, 9,
318 return (__m64)__builtin_shufflevector((__v8qi)__m1, (__v8qi)__m2,297 2, 10, 3, 11);
319 0, 8, 1, 9, 2, 10, 3, 11);
320}298}
321299
322/// Unpacks the lower 32 bits from two 64-bit integer vectors of300/// Unpacks the lower 32 bits from two 64-bit integer vectors of
...@@ -336,11 +314,9 @@ _mm_unpacklo_pi8(__m64 __m1, __m64 __m2)...@@ -336,11 +314,9 @@ _mm_unpacklo_pi8(__m64 __m1, __m64 __m2)
336/// Bits [31:16] are written to bits [63:48] of the result.314/// Bits [31:16] are written to bits [63:48] of the result.
337/// \returns A 64-bit integer vector of [4 x i16] containing the interleaved315/// \returns A 64-bit integer vector of [4 x i16] containing the interleaved
338/// values.316/// values.
339static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2317static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpacklo_pi16(__m64 __m1,
340_mm_unpacklo_pi16(__m64 __m1, __m64 __m2)318 __m64 __m2) {
341{319 return (__m64)__builtin_shufflevector((__v4hi)__m1, (__v4hi)__m2, 0, 4, 1, 5);
342 return (__m64)__builtin_shufflevector((__v4hi)__m1, (__v4hi)__m2,
343 0, 4, 1, 5);
344}320}
345321
346/// Unpacks the lower 32 bits from two 64-bit integer vectors of322/// Unpacks the lower 32 bits from two 64-bit integer vectors of
...@@ -358,10 +334,9 @@ _mm_unpacklo_pi16(__m64 __m1, __m64 __m2)...@@ -358,10 +334,9 @@ _mm_unpacklo_pi16(__m64 __m1, __m64 __m2)
358/// the upper 32 bits of the result.334/// the upper 32 bits of the result.
359/// \returns A 64-bit integer vector of [2 x i32] containing the interleaved335/// \returns A 64-bit integer vector of [2 x i32] containing the interleaved
360/// values.336/// values.
361static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2337static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpacklo_pi32(__m64 __m1,
362_mm_unpacklo_pi32(__m64 __m1, __m64 __m2)338 __m64 __m2) {
363{339 return (__m64)__builtin_shufflevector((__v2si)__m1, (__v2si)__m2, 0, 2);
364 return (__m64)__builtin_shufflevector((__v2si)__m1, (__v2si)__m2, 0, 2);
365}340}
366341
367/// Adds each 8-bit integer element of the first 64-bit integer vector342/// Adds each 8-bit integer element of the first 64-bit integer vector
...@@ -379,10 +354,9 @@ _mm_unpacklo_pi32(__m64 __m1, __m64 __m2)...@@ -379,10 +354,9 @@ _mm_unpacklo_pi32(__m64 __m1, __m64 __m2)
379/// A 64-bit integer vector of [8 x i8].354/// A 64-bit integer vector of [8 x i8].
380/// \returns A 64-bit integer vector of [8 x i8] containing the sums of both355/// \returns A 64-bit integer vector of [8 x i8] containing the sums of both
381/// parameters.356/// parameters.
382static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2357static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_add_pi8(__m64 __m1,
383_mm_add_pi8(__m64 __m1, __m64 __m2)358 __m64 __m2) {
384{359 return (__m64)(((__v8qu)__m1) + ((__v8qu)__m2));
385 return (__m64)(((__v8qu)__m1) + ((__v8qu)__m2));
386}360}
387361
388/// Adds each 16-bit integer element of the first 64-bit integer vector362/// Adds each 16-bit integer element of the first 64-bit integer vector
...@@ -400,10 +374,9 @@ _mm_add_pi8(__m64 __m1, __m64 __m2)...@@ -400,10 +374,9 @@ _mm_add_pi8(__m64 __m1, __m64 __m2)
400/// A 64-bit integer vector of [4 x i16].374/// A 64-bit integer vector of [4 x i16].
401/// \returns A 64-bit integer vector of [4 x i16] containing the sums of both375/// \returns A 64-bit integer vector of [4 x i16] containing the sums of both
402/// parameters.376/// parameters.
403static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2377static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_add_pi16(__m64 __m1,
404_mm_add_pi16(__m64 __m1, __m64 __m2)378 __m64 __m2) {
405{379 return (__m64)(((__v4hu)__m1) + ((__v4hu)__m2));
406 return (__m64)(((__v4hu)__m1) + ((__v4hu)__m2));
407}380}
408381
409/// Adds each 32-bit integer element of the first 64-bit integer vector382/// Adds each 32-bit integer element of the first 64-bit integer vector
...@@ -421,10 +394,9 @@ _mm_add_pi16(__m64 __m1, __m64 __m2)...@@ -421,10 +394,9 @@ _mm_add_pi16(__m64 __m1, __m64 __m2)
421/// A 64-bit integer vector of [2 x i32].394/// A 64-bit integer vector of [2 x i32].
422/// \returns A 64-bit integer vector of [2 x i32] containing the sums of both395/// \returns A 64-bit integer vector of [2 x i32] containing the sums of both
423/// parameters.396/// parameters.
424static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2397static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_add_pi32(__m64 __m1,
425_mm_add_pi32(__m64 __m1, __m64 __m2)398 __m64 __m2) {
426{399 return (__m64)(((__v2su)__m1) + ((__v2su)__m2));
427 return (__m64)(((__v2su)__m1) + ((__v2su)__m2));
428}400}
429401
430/// Adds, with saturation, each 8-bit signed integer element of the first402/// Adds, with saturation, each 8-bit signed integer element of the first
...@@ -445,10 +417,9 @@ _mm_add_pi32(__m64 __m1, __m64 __m2)...@@ -445,10 +417,9 @@ _mm_add_pi32(__m64 __m1, __m64 __m2)
445/// A 64-bit integer vector of [8 x i8].417/// A 64-bit integer vector of [8 x i8].
446/// \returns A 64-bit integer vector of [8 x i8] containing the saturated sums418/// \returns A 64-bit integer vector of [8 x i8] containing the saturated sums
447/// of both parameters.419/// of both parameters.
448static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2420static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_adds_pi8(__m64 __m1,
449_mm_adds_pi8(__m64 __m1, __m64 __m2)421 __m64 __m2) {
450{422 return (__m64)__builtin_elementwise_add_sat((__v8qs)__m1, (__v8qs)__m2);
451 return (__m64)__builtin_elementwise_add_sat((__v8qs)__m1, (__v8qs)__m2);
452}423}
453424
454/// Adds, with saturation, each 16-bit signed integer element of the first425/// Adds, with saturation, each 16-bit signed integer element of the first
...@@ -469,10 +440,9 @@ _mm_adds_pi8(__m64 __m1, __m64 __m2)...@@ -469,10 +440,9 @@ _mm_adds_pi8(__m64 __m1, __m64 __m2)
469/// A 64-bit integer vector of [4 x i16].440/// A 64-bit integer vector of [4 x i16].
470/// \returns A 64-bit integer vector of [4 x i16] containing the saturated sums441/// \returns A 64-bit integer vector of [4 x i16] containing the saturated sums
471/// of both parameters.442/// of both parameters.
472static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2443static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_adds_pi16(__m64 __m1,
473_mm_adds_pi16(__m64 __m1, __m64 __m2)444 __m64 __m2) {
474{445 return (__m64)__builtin_elementwise_add_sat((__v4hi)__m1, (__v4hi)__m2);
475 return (__m64)__builtin_elementwise_add_sat((__v4hi)__m1, (__v4hi)__m2);
476}446}
477447
478/// Adds, with saturation, each 8-bit unsigned integer element of the first448/// Adds, with saturation, each 8-bit unsigned integer element of the first
...@@ -492,10 +462,9 @@ _mm_adds_pi16(__m64 __m1, __m64 __m2)...@@ -492,10 +462,9 @@ _mm_adds_pi16(__m64 __m1, __m64 __m2)
492/// A 64-bit integer vector of [8 x i8].462/// A 64-bit integer vector of [8 x i8].
493/// \returns A 64-bit integer vector of [8 x i8] containing the saturated463/// \returns A 64-bit integer vector of [8 x i8] containing the saturated
494/// unsigned sums of both parameters.464/// unsigned sums of both parameters.
495static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2465static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_adds_pu8(__m64 __m1,
496_mm_adds_pu8(__m64 __m1, __m64 __m2)466 __m64 __m2) {
497{467 return (__m64)__builtin_elementwise_add_sat((__v8qu)__m1, (__v8qu)__m2);
498 return (__m64)__builtin_elementwise_add_sat((__v8qu)__m1, (__v8qu)__m2);
499}468}
500469
501/// Adds, with saturation, each 16-bit unsigned integer element of the first470/// Adds, with saturation, each 16-bit unsigned integer element of the first
...@@ -515,10 +484,9 @@ _mm_adds_pu8(__m64 __m1, __m64 __m2)...@@ -515,10 +484,9 @@ _mm_adds_pu8(__m64 __m1, __m64 __m2)
515/// A 64-bit integer vector of [4 x i16].484/// A 64-bit integer vector of [4 x i16].
516/// \returns A 64-bit integer vector of [4 x i16] containing the saturated485/// \returns A 64-bit integer vector of [4 x i16] containing the saturated
517/// unsigned sums of both parameters.486/// unsigned sums of both parameters.
518static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2487static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_adds_pu16(__m64 __m1,
519_mm_adds_pu16(__m64 __m1, __m64 __m2)488 __m64 __m2) {
520{489 return (__m64)__builtin_elementwise_add_sat((__v4hu)__m1, (__v4hu)__m2);
521 return (__m64)__builtin_elementwise_add_sat((__v4hu)__m1, (__v4hu)__m2);
522}490}
523491
524/// Subtracts each 8-bit integer element of the second 64-bit integer492/// Subtracts each 8-bit integer element of the second 64-bit integer
...@@ -536,10 +504,9 @@ _mm_adds_pu16(__m64 __m1, __m64 __m2)...@@ -536,10 +504,9 @@ _mm_adds_pu16(__m64 __m1, __m64 __m2)
536/// A 64-bit integer vector of [8 x i8] containing the subtrahends.504/// A 64-bit integer vector of [8 x i8] containing the subtrahends.
537/// \returns A 64-bit integer vector of [8 x i8] containing the differences of505/// \returns A 64-bit integer vector of [8 x i8] containing the differences of
538/// both parameters.506/// both parameters.
539static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2507static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_sub_pi8(__m64 __m1,
540_mm_sub_pi8(__m64 __m1, __m64 __m2)508 __m64 __m2) {
541{509 return (__m64)(((__v8qu)__m1) - ((__v8qu)__m2));
542 return (__m64)(((__v8qu)__m1) - ((__v8qu)__m2));
543}510}
544511
545/// Subtracts each 16-bit integer element of the second 64-bit integer512/// Subtracts each 16-bit integer element of the second 64-bit integer
...@@ -557,10 +524,9 @@ _mm_sub_pi8(__m64 __m1, __m64 __m2)...@@ -557,10 +524,9 @@ _mm_sub_pi8(__m64 __m1, __m64 __m2)
557/// A 64-bit integer vector of [4 x i16] containing the subtrahends.524/// A 64-bit integer vector of [4 x i16] containing the subtrahends.
558/// \returns A 64-bit integer vector of [4 x i16] containing the differences of525/// \returns A 64-bit integer vector of [4 x i16] containing the differences of
559/// both parameters.526/// both parameters.
560static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2527static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_sub_pi16(__m64 __m1,
561_mm_sub_pi16(__m64 __m1, __m64 __m2)528 __m64 __m2) {
562{529 return (__m64)(((__v4hu)__m1) - ((__v4hu)__m2));
563 return (__m64)(((__v4hu)__m1) - ((__v4hu)__m2));
564}530}
565531
566/// Subtracts each 32-bit integer element of the second 64-bit integer532/// Subtracts each 32-bit integer element of the second 64-bit integer
...@@ -578,10 +544,9 @@ _mm_sub_pi16(__m64 __m1, __m64 __m2)...@@ -578,10 +544,9 @@ _mm_sub_pi16(__m64 __m1, __m64 __m2)
578/// A 64-bit integer vector of [2 x i32] containing the subtrahends.544/// A 64-bit integer vector of [2 x i32] containing the subtrahends.
579/// \returns A 64-bit integer vector of [2 x i32] containing the differences of545/// \returns A 64-bit integer vector of [2 x i32] containing the differences of
580/// both parameters.546/// both parameters.
581static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2547static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_sub_pi32(__m64 __m1,
582_mm_sub_pi32(__m64 __m1, __m64 __m2)548 __m64 __m2) {
583{549 return (__m64)(((__v2su)__m1) - ((__v2su)__m2));
584 return (__m64)(((__v2su)__m1) - ((__v2su)__m2));
585}550}
586551
587/// Subtracts, with saturation, each 8-bit signed integer element of the second552/// Subtracts, with saturation, each 8-bit signed integer element of the second
...@@ -602,10 +567,9 @@ _mm_sub_pi32(__m64 __m1, __m64 __m2)...@@ -602,10 +567,9 @@ _mm_sub_pi32(__m64 __m1, __m64 __m2)
602/// A 64-bit integer vector of [8 x i8] containing the subtrahends.567/// A 64-bit integer vector of [8 x i8] containing the subtrahends.
603/// \returns A 64-bit integer vector of [8 x i8] containing the saturated568/// \returns A 64-bit integer vector of [8 x i8] containing the saturated
604/// differences of both parameters.569/// differences of both parameters.
605static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2570static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_subs_pi8(__m64 __m1,
606_mm_subs_pi8(__m64 __m1, __m64 __m2)571 __m64 __m2) {
607{572 return (__m64)__builtin_elementwise_sub_sat((__v8qs)__m1, (__v8qs)__m2);
608 return (__m64)__builtin_elementwise_sub_sat((__v8qs)__m1, (__v8qs)__m2);
609}573}
610574
611/// Subtracts, with saturation, each 16-bit signed integer element of the575/// Subtracts, with saturation, each 16-bit signed integer element of the
...@@ -626,10 +590,9 @@ _mm_subs_pi8(__m64 __m1, __m64 __m2)...@@ -626,10 +590,9 @@ _mm_subs_pi8(__m64 __m1, __m64 __m2)
626/// A 64-bit integer vector of [4 x i16] containing the subtrahends.590/// A 64-bit integer vector of [4 x i16] containing the subtrahends.
627/// \returns A 64-bit integer vector of [4 x i16] containing the saturated591/// \returns A 64-bit integer vector of [4 x i16] containing the saturated
628/// differences of both parameters.592/// differences of both parameters.
629static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2593static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_subs_pi16(__m64 __m1,
630_mm_subs_pi16(__m64 __m1, __m64 __m2)594 __m64 __m2) {
631{595 return (__m64)__builtin_elementwise_sub_sat((__v4hi)__m1, (__v4hi)__m2);
632 return (__m64)__builtin_elementwise_sub_sat((__v4hi)__m1, (__v4hi)__m2);
633}596}
634597
635/// Subtracts each 8-bit unsigned integer element of the second 64-bit598/// Subtracts each 8-bit unsigned integer element of the second 64-bit
...@@ -650,10 +613,9 @@ _mm_subs_pi16(__m64 __m1, __m64 __m2)...@@ -650,10 +613,9 @@ _mm_subs_pi16(__m64 __m1, __m64 __m2)
650/// A 64-bit integer vector of [8 x i8] containing the subtrahends.613/// A 64-bit integer vector of [8 x i8] containing the subtrahends.
651/// \returns A 64-bit integer vector of [8 x i8] containing the saturated614/// \returns A 64-bit integer vector of [8 x i8] containing the saturated
652/// differences of both parameters.615/// differences of both parameters.
653static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2616static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_subs_pu8(__m64 __m1,
654_mm_subs_pu8(__m64 __m1, __m64 __m2)617 __m64 __m2) {
655{618 return (__m64)__builtin_elementwise_sub_sat((__v8qu)__m1, (__v8qu)__m2);
656 return (__m64)__builtin_elementwise_sub_sat((__v8qu)__m1, (__v8qu)__m2);
657}619}
658620
659/// Subtracts each 16-bit unsigned integer element of the second 64-bit621/// Subtracts each 16-bit unsigned integer element of the second 64-bit
...@@ -674,10 +636,9 @@ _mm_subs_pu8(__m64 __m1, __m64 __m2)...@@ -674,10 +636,9 @@ _mm_subs_pu8(__m64 __m1, __m64 __m2)
674/// A 64-bit integer vector of [4 x i16] containing the subtrahends.636/// A 64-bit integer vector of [4 x i16] containing the subtrahends.
675/// \returns A 64-bit integer vector of [4 x i16] containing the saturated637/// \returns A 64-bit integer vector of [4 x i16] containing the saturated
676/// differences of both parameters.638/// differences of both parameters.
677static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2639static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_subs_pu16(__m64 __m1,
678_mm_subs_pu16(__m64 __m1, __m64 __m2)640 __m64 __m2) {
679{641 return (__m64)__builtin_elementwise_sub_sat((__v4hu)__m1, (__v4hu)__m2);
680 return (__m64)__builtin_elementwise_sub_sat((__v4hu)__m1, (__v4hu)__m2);
681}642}
682643
683/// Multiplies each 16-bit signed integer element of the first 64-bit644/// Multiplies each 16-bit signed integer element of the first 64-bit
...@@ -701,11 +662,10 @@ _mm_subs_pu16(__m64 __m1, __m64 __m2)...@@ -701,11 +662,10 @@ _mm_subs_pu16(__m64 __m1, __m64 __m2)
701/// A 64-bit integer vector of [4 x i16].662/// A 64-bit integer vector of [4 x i16].
702/// \returns A 64-bit integer vector of [2 x i32] containing the sums of663/// \returns A 64-bit integer vector of [2 x i32] containing the sums of
703/// products of both parameters.664/// products of both parameters.
704static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2665static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_madd_pi16(__m64 __m1,
705_mm_madd_pi16(__m64 __m1, __m64 __m2)666 __m64 __m2) {
706{667 return __trunc64(__builtin_ia32_pmaddwd128((__v8hi)__zext128(__m1),
707 return __trunc64(__builtin_ia32_pmaddwd128((__v8hi)__anyext128(__m1),668 (__v8hi)__zext128(__m2)));
708 (__v8hi)__anyext128(__m2)));
709}669}
710670
711/// Multiplies each 16-bit signed integer element of the first 64-bit671/// Multiplies each 16-bit signed integer element of the first 64-bit
...@@ -723,11 +683,10 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2)...@@ -723,11 +683,10 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2)
723/// A 64-bit integer vector of [4 x i16].683/// A 64-bit integer vector of [4 x i16].
724/// \returns A 64-bit integer vector of [4 x i16] containing the upper 16 bits684/// \returns A 64-bit integer vector of [4 x i16] containing the upper 16 bits
725/// of the products of both parameters.685/// of the products of both parameters.
726static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2686static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_mulhi_pi16(__m64 __m1,
727_mm_mulhi_pi16(__m64 __m1, __m64 __m2)687 __m64 __m2) {
728{688 return __trunc64(__builtin_ia32_pmulhw128((__v8hi)__zext128(__m1),
729 return __trunc64(__builtin_ia32_pmulhw128((__v8hi)__anyext128(__m1),689 (__v8hi)__zext128(__m2)));
730 (__v8hi)__anyext128(__m2)));
731}690}
732691
733/// Multiplies each 16-bit signed integer element of the first 64-bit692/// Multiplies each 16-bit signed integer element of the first 64-bit
...@@ -745,10 +704,9 @@ _mm_mulhi_pi16(__m64 __m1, __m64 __m2)...@@ -745,10 +704,9 @@ _mm_mulhi_pi16(__m64 __m1, __m64 __m2)
745/// A 64-bit integer vector of [4 x i16].704/// A 64-bit integer vector of [4 x i16].
746/// \returns A 64-bit integer vector of [4 x i16] containing the lower 16 bits705/// \returns A 64-bit integer vector of [4 x i16] containing the lower 16 bits
747/// of the products of both parameters.706/// of the products of both parameters.
748static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2707static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_mullo_pi16(__m64 __m1,
749_mm_mullo_pi16(__m64 __m1, __m64 __m2)708 __m64 __m2) {
750{709 return (__m64)(((__v4hu)__m1) * ((__v4hu)__m2));
751 return (__m64)(((__v4hu)__m1) * ((__v4hu)__m2));
752}710}
753711
754/// Left-shifts each 16-bit signed integer element of the first712/// Left-shifts each 16-bit signed integer element of the first
...@@ -771,8 +729,8 @@ _mm_mullo_pi16(__m64 __m1, __m64 __m2)...@@ -771,8 +729,8 @@ _mm_mullo_pi16(__m64 __m1, __m64 __m2)
771static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2729static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
772_mm_sll_pi16(__m64 __m, __m64 __count)730_mm_sll_pi16(__m64 __m, __m64 __count)
773{731{
774 return __trunc64(__builtin_ia32_psllw128((__v8hi)__anyext128(__m),732 return __trunc64(__builtin_ia32_psllw128((__v8hi)__zext128(__m),
775 (__v8hi)__anyext128(__count)));733 (__v8hi)__zext128(__count)));
776}734}
777735
778/// Left-shifts each 16-bit signed integer element of a 64-bit integer736/// Left-shifts each 16-bit signed integer element of a 64-bit integer
...@@ -791,11 +749,9 @@ _mm_sll_pi16(__m64 __m, __m64 __count)...@@ -791,11 +749,9 @@ _mm_sll_pi16(__m64 __m, __m64 __count)
791/// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted749/// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted
792/// values. If \a __count is greater or equal to 16, the result is set to all750/// values. If \a __count is greater or equal to 16, the result is set to all
793/// 0.751/// 0.
794static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2752static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_slli_pi16(__m64 __m,
795_mm_slli_pi16(__m64 __m, int __count)753 int __count) {
796{754 return __trunc64(__builtin_ia32_psllwi128((__v8hi)__zext128(__m), __count));
797 return __trunc64(__builtin_ia32_psllwi128((__v8hi)__anyext128(__m),
798 __count));
799}755}
800756
801/// Left-shifts each 32-bit signed integer element of the first757/// Left-shifts each 32-bit signed integer element of the first
...@@ -818,8 +774,8 @@ _mm_slli_pi16(__m64 __m, int __count)...@@ -818,8 +774,8 @@ _mm_slli_pi16(__m64 __m, int __count)
818static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2774static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
819_mm_sll_pi32(__m64 __m, __m64 __count)775_mm_sll_pi32(__m64 __m, __m64 __count)
820{776{
821 return __trunc64(__builtin_ia32_pslld128((__v4si)__anyext128(__m),777 return __trunc64(__builtin_ia32_pslld128((__v4si)__zext128(__m),
822 (__v4si)__anyext128(__count)));778 (__v4si)__zext128(__count)));
823}779}
824780
825/// Left-shifts each 32-bit signed integer element of a 64-bit integer781/// Left-shifts each 32-bit signed integer element of a 64-bit integer
...@@ -838,11 +794,9 @@ _mm_sll_pi32(__m64 __m, __m64 __count)...@@ -838,11 +794,9 @@ _mm_sll_pi32(__m64 __m, __m64 __count)
838/// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted794/// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted
839/// values. If \a __count is greater or equal to 32, the result is set to all795/// values. If \a __count is greater or equal to 32, the result is set to all
840/// 0.796/// 0.
841static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2797static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_slli_pi32(__m64 __m,
842_mm_slli_pi32(__m64 __m, int __count)798 int __count) {
843{799 return __trunc64(__builtin_ia32_pslldi128((__v4si)__zext128(__m), __count));
844 return __trunc64(__builtin_ia32_pslldi128((__v4si)__anyext128(__m),
845 __count));
846}800}
847801
848/// Left-shifts the first 64-bit integer parameter by the number of bits802/// Left-shifts the first 64-bit integer parameter by the number of bits
...@@ -862,8 +816,8 @@ _mm_slli_pi32(__m64 __m, int __count)...@@ -862,8 +816,8 @@ _mm_slli_pi32(__m64 __m, int __count)
862static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2816static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
863_mm_sll_si64(__m64 __m, __m64 __count)817_mm_sll_si64(__m64 __m, __m64 __count)
864{818{
865 return __trunc64(__builtin_ia32_psllq128((__v2di)__anyext128(__m),819 return __trunc64(__builtin_ia32_psllq128((__v2di)__zext128(__m),
866 (__v2di)__anyext128(__count)));820 (__v2di)__zext128(__count)));
867}821}
868822
869/// Left-shifts the first parameter, which is a 64-bit integer, by the823/// Left-shifts the first parameter, which is a 64-bit integer, by the
...@@ -880,11 +834,9 @@ _mm_sll_si64(__m64 __m, __m64 __count)...@@ -880,11 +834,9 @@ _mm_sll_si64(__m64 __m, __m64 __count)
880/// A 32-bit integer value.834/// A 32-bit integer value.
881/// \returns A 64-bit integer vector containing the left-shifted value. If835/// \returns A 64-bit integer vector containing the left-shifted value. If
882/// \a __count is greater or equal to 64, the result is set to 0.836/// \a __count is greater or equal to 64, the result is set to 0.
883static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2837static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_slli_si64(__m64 __m,
884_mm_slli_si64(__m64 __m, int __count)838 int __count) {
885{839 return __trunc64(__builtin_ia32_psllqi128((__v2di)__zext128(__m), __count));
886 return __trunc64(__builtin_ia32_psllqi128((__v2di)__anyext128(__m),
887 __count));
888}840}
889841
890/// Right-shifts each 16-bit integer element of the first parameter,842/// Right-shifts each 16-bit integer element of the first parameter,
...@@ -908,8 +860,8 @@ _mm_slli_si64(__m64 __m, int __count)...@@ -908,8 +860,8 @@ _mm_slli_si64(__m64 __m, int __count)
908static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2860static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
909_mm_sra_pi16(__m64 __m, __m64 __count)861_mm_sra_pi16(__m64 __m, __m64 __count)
910{862{
911 return __trunc64(__builtin_ia32_psraw128((__v8hi)__anyext128(__m),863 return __trunc64(__builtin_ia32_psraw128((__v8hi)__zext128(__m),
912 (__v8hi)__anyext128(__count)));864 (__v8hi)__zext128(__count)));
913}865}
914866
915/// Right-shifts each 16-bit integer element of a 64-bit integer vector867/// Right-shifts each 16-bit integer element of a 64-bit integer vector
...@@ -929,11 +881,9 @@ _mm_sra_pi16(__m64 __m, __m64 __count)...@@ -929,11 +881,9 @@ _mm_sra_pi16(__m64 __m, __m64 __count)
929/// A 32-bit integer value.881/// A 32-bit integer value.
930/// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted882/// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
931/// values.883/// values.
932static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2884static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srai_pi16(__m64 __m,
933_mm_srai_pi16(__m64 __m, int __count)885 int __count) {
934{886 return __trunc64(__builtin_ia32_psrawi128((__v8hi)__zext128(__m), __count));
935 return __trunc64(__builtin_ia32_psrawi128((__v8hi)__anyext128(__m),
936 __count));
937}887}
938888
939/// Right-shifts each 32-bit integer element of the first parameter,889/// Right-shifts each 32-bit integer element of the first parameter,
...@@ -957,8 +907,8 @@ _mm_srai_pi16(__m64 __m, int __count)...@@ -957,8 +907,8 @@ _mm_srai_pi16(__m64 __m, int __count)
957static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2907static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
958_mm_sra_pi32(__m64 __m, __m64 __count)908_mm_sra_pi32(__m64 __m, __m64 __count)
959{909{
960 return __trunc64(__builtin_ia32_psrad128((__v4si)__anyext128(__m),910 return __trunc64(__builtin_ia32_psrad128((__v4si)__zext128(__m),
961 (__v4si)__anyext128(__count)));911 (__v4si)__zext128(__count)));
962}912}
963913
964/// Right-shifts each 32-bit integer element of a 64-bit integer vector914/// Right-shifts each 32-bit integer element of a 64-bit integer vector
...@@ -978,11 +928,9 @@ _mm_sra_pi32(__m64 __m, __m64 __count)...@@ -978,11 +928,9 @@ _mm_sra_pi32(__m64 __m, __m64 __count)
978/// A 32-bit integer value.928/// A 32-bit integer value.
979/// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted929/// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
980/// values.930/// values.
981static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2931static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srai_pi32(__m64 __m,
982_mm_srai_pi32(__m64 __m, int __count)932 int __count) {
983{933 return __trunc64(__builtin_ia32_psradi128((__v4si)__zext128(__m), __count));
984 return __trunc64(__builtin_ia32_psradi128((__v4si)__anyext128(__m),
985 __count));
986}934}
987935
988/// Right-shifts each 16-bit integer element of the first parameter,936/// Right-shifts each 16-bit integer element of the first parameter,
...@@ -1005,8 +953,8 @@ _mm_srai_pi32(__m64 __m, int __count)...@@ -1005,8 +953,8 @@ _mm_srai_pi32(__m64 __m, int __count)
1005static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2953static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
1006_mm_srl_pi16(__m64 __m, __m64 __count)954_mm_srl_pi16(__m64 __m, __m64 __count)
1007{955{
1008 return __trunc64(__builtin_ia32_psrlw128((__v8hi)__anyext128(__m),956 return __trunc64(__builtin_ia32_psrlw128((__v8hi)__zext128(__m),
1009 (__v8hi)__anyext128(__count)));957 (__v8hi)__zext128(__count)));
1010}958}
1011959
1012/// Right-shifts each 16-bit integer element of a 64-bit integer vector960/// Right-shifts each 16-bit integer element of a 64-bit integer vector
...@@ -1025,11 +973,9 @@ _mm_srl_pi16(__m64 __m, __m64 __count)...@@ -1025,11 +973,9 @@ _mm_srl_pi16(__m64 __m, __m64 __count)
1025/// A 32-bit integer value.973/// A 32-bit integer value.
1026/// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted974/// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
1027/// values.975/// values.
1028static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2976static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srli_pi16(__m64 __m,
1029_mm_srli_pi16(__m64 __m, int __count)977 int __count) {
1030{978 return __trunc64(__builtin_ia32_psrlwi128((__v8hi)__zext128(__m), __count));
1031 return __trunc64(__builtin_ia32_psrlwi128((__v8hi)__anyext128(__m),
1032 __count));
1033}979}
1034980
1035/// Right-shifts each 32-bit integer element of the first parameter,981/// Right-shifts each 32-bit integer element of the first parameter,
...@@ -1052,8 +998,8 @@ _mm_srli_pi16(__m64 __m, int __count)...@@ -1052,8 +998,8 @@ _mm_srli_pi16(__m64 __m, int __count)
1052static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2998static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
1053_mm_srl_pi32(__m64 __m, __m64 __count)999_mm_srl_pi32(__m64 __m, __m64 __count)
1054{1000{
1055 return __trunc64(__builtin_ia32_psrld128((__v4si)__anyext128(__m),1001 return __trunc64(__builtin_ia32_psrld128((__v4si)__zext128(__m),
1056 (__v4si)__anyext128(__count)));1002 (__v4si)__zext128(__count)));
1057}1003}
10581004
1059/// Right-shifts each 32-bit integer element of a 64-bit integer vector1005/// Right-shifts each 32-bit integer element of a 64-bit integer vector
...@@ -1072,11 +1018,9 @@ _mm_srl_pi32(__m64 __m, __m64 __count)...@@ -1072,11 +1018,9 @@ _mm_srl_pi32(__m64 __m, __m64 __count)
1072/// A 32-bit integer value.1018/// A 32-bit integer value.
1073/// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted1019/// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
1074/// values.1020/// values.
1075static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21021static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srli_pi32(__m64 __m,
1076_mm_srli_pi32(__m64 __m, int __count)1022 int __count) {
1077{1023 return __trunc64(__builtin_ia32_psrldi128((__v4si)__zext128(__m), __count));
1078 return __trunc64(__builtin_ia32_psrldi128((__v4si)__anyext128(__m),
1079 __count));
1080}1024}
10811025
1082/// Right-shifts the first 64-bit integer parameter by the number of bits1026/// Right-shifts the first 64-bit integer parameter by the number of bits
...@@ -1096,8 +1040,8 @@ _mm_srli_pi32(__m64 __m, int __count)...@@ -1096,8 +1040,8 @@ _mm_srli_pi32(__m64 __m, int __count)
1096static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21040static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
1097_mm_srl_si64(__m64 __m, __m64 __count)1041_mm_srl_si64(__m64 __m, __m64 __count)
1098{1042{
1099 return __trunc64(__builtin_ia32_psrlq128((__v2di)__anyext128(__m),1043 return __trunc64(__builtin_ia32_psrlq128((__v2di)__zext128(__m),
1100 (__v2di)__anyext128(__count)));1044 (__v2di)__zext128(__count)));
1101}1045}
11021046
1103/// Right-shifts the first parameter, which is a 64-bit integer, by the1047/// Right-shifts the first parameter, which is a 64-bit integer, by the
...@@ -1115,11 +1059,9 @@ _mm_srl_si64(__m64 __m, __m64 __count)...@@ -1115,11 +1059,9 @@ _mm_srl_si64(__m64 __m, __m64 __count)
1115/// \param __count1059/// \param __count
1116/// A 32-bit integer value.1060/// A 32-bit integer value.
1117/// \returns A 64-bit integer vector containing the right-shifted value.1061/// \returns A 64-bit integer vector containing the right-shifted value.
1118static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21062static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srli_si64(__m64 __m,
1119_mm_srli_si64(__m64 __m, int __count)1063 int __count) {
1120{1064 return __trunc64(__builtin_ia32_psrlqi128((__v2di)__zext128(__m), __count));
1121 return __trunc64(__builtin_ia32_psrlqi128((__v2di)__anyext128(__m),
1122 __count));
1123}1065}
11241066
1125/// Performs a bitwise AND of two 64-bit integer vectors.1067/// Performs a bitwise AND of two 64-bit integer vectors.
...@@ -1134,10 +1076,9 @@ _mm_srli_si64(__m64 __m, int __count)...@@ -1134,10 +1076,9 @@ _mm_srli_si64(__m64 __m, int __count)
1134/// A 64-bit integer vector.1076/// A 64-bit integer vector.
1135/// \returns A 64-bit integer vector containing the bitwise AND of both1077/// \returns A 64-bit integer vector containing the bitwise AND of both
1136/// parameters.1078/// parameters.
1137static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21079static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_and_si64(__m64 __m1,
1138_mm_and_si64(__m64 __m1, __m64 __m2)1080 __m64 __m2) {
1139{1081 return (__m64)(((__v1du)__m1) & ((__v1du)__m2));
1140 return (__m64)(((__v1du)__m1) & ((__v1du)__m2));
1141}1082}
11421083
1143/// Performs a bitwise NOT of the first 64-bit integer vector, and then1084/// Performs a bitwise NOT of the first 64-bit integer vector, and then
...@@ -1155,10 +1096,9 @@ _mm_and_si64(__m64 __m1, __m64 __m2)...@@ -1155,10 +1096,9 @@ _mm_and_si64(__m64 __m1, __m64 __m2)
1155/// A 64-bit integer vector.1096/// A 64-bit integer vector.
1156/// \returns A 64-bit integer vector containing the bitwise AND of the second1097/// \returns A 64-bit integer vector containing the bitwise AND of the second
1157/// parameter and the one's complement of the first parameter.1098/// parameter and the one's complement of the first parameter.
1158static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21099static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_andnot_si64(__m64 __m1,
1159_mm_andnot_si64(__m64 __m1, __m64 __m2)1100 __m64 __m2) {
1160{1101 return (__m64)(~((__v1du)__m1) & ((__v1du)__m2));
1161 return (__m64)(~((__v1du)__m1) & ((__v1du)__m2));
1162}1102}
11631103
1164/// Performs a bitwise OR of two 64-bit integer vectors.1104/// Performs a bitwise OR of two 64-bit integer vectors.
...@@ -1173,10 +1113,9 @@ _mm_andnot_si64(__m64 __m1, __m64 __m2)...@@ -1173,10 +1113,9 @@ _mm_andnot_si64(__m64 __m1, __m64 __m2)
1173/// A 64-bit integer vector.1113/// A 64-bit integer vector.
1174/// \returns A 64-bit integer vector containing the bitwise OR of both1114/// \returns A 64-bit integer vector containing the bitwise OR of both
1175/// parameters.1115/// parameters.
1176static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21116static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_or_si64(__m64 __m1,
1177_mm_or_si64(__m64 __m1, __m64 __m2)1117 __m64 __m2) {
1178{1118 return (__m64)(((__v1du)__m1) | ((__v1du)__m2));
1179 return (__m64)(((__v1du)__m1) | ((__v1du)__m2));
1180}1119}
11811120
1182/// Performs a bitwise exclusive OR of two 64-bit integer vectors.1121/// Performs a bitwise exclusive OR of two 64-bit integer vectors.
...@@ -1191,10 +1130,9 @@ _mm_or_si64(__m64 __m1, __m64 __m2)...@@ -1191,10 +1130,9 @@ _mm_or_si64(__m64 __m1, __m64 __m2)
1191/// A 64-bit integer vector.1130/// A 64-bit integer vector.
1192/// \returns A 64-bit integer vector containing the bitwise exclusive OR of both1131/// \returns A 64-bit integer vector containing the bitwise exclusive OR of both
1193/// parameters.1132/// parameters.
1194static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21133static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_xor_si64(__m64 __m1,
1195_mm_xor_si64(__m64 __m1, __m64 __m2)1134 __m64 __m2) {
1196{1135 return (__m64)(((__v1du)__m1) ^ ((__v1du)__m2));
1197 return (__m64)(((__v1du)__m1) ^ ((__v1du)__m2));
1198}1136}
11991137
1200/// Compares the 8-bit integer elements of two 64-bit integer vectors of1138/// Compares the 8-bit integer elements of two 64-bit integer vectors of
...@@ -1213,10 +1151,9 @@ _mm_xor_si64(__m64 __m1, __m64 __m2)...@@ -1213,10 +1151,9 @@ _mm_xor_si64(__m64 __m1, __m64 __m2)
1213/// A 64-bit integer vector of [8 x i8].1151/// A 64-bit integer vector of [8 x i8].
1214/// \returns A 64-bit integer vector of [8 x i8] containing the comparison1152/// \returns A 64-bit integer vector of [8 x i8] containing the comparison
1215/// results.1153/// results.
1216static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21154static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpeq_pi8(__m64 __m1,
1217_mm_cmpeq_pi8(__m64 __m1, __m64 __m2)1155 __m64 __m2) {
1218{1156 return (__m64)(((__v8qi)__m1) == ((__v8qi)__m2));
1219 return (__m64)(((__v8qi)__m1) == ((__v8qi)__m2));
1220}1157}
12211158
1222/// Compares the 16-bit integer elements of two 64-bit integer vectors of1159/// Compares the 16-bit integer elements of two 64-bit integer vectors of
...@@ -1235,10 +1172,9 @@ _mm_cmpeq_pi8(__m64 __m1, __m64 __m2)...@@ -1235,10 +1172,9 @@ _mm_cmpeq_pi8(__m64 __m1, __m64 __m2)
1235/// A 64-bit integer vector of [4 x i16].1172/// A 64-bit integer vector of [4 x i16].
1236/// \returns A 64-bit integer vector of [4 x i16] containing the comparison1173/// \returns A 64-bit integer vector of [4 x i16] containing the comparison
1237/// results.1174/// results.
1238static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21175static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpeq_pi16(__m64 __m1,
1239_mm_cmpeq_pi16(__m64 __m1, __m64 __m2)1176 __m64 __m2) {
1240{1177 return (__m64)(((__v4hi)__m1) == ((__v4hi)__m2));
1241 return (__m64)(((__v4hi)__m1) == ((__v4hi)__m2));
1242}1178}
12431179
1244/// Compares the 32-bit integer elements of two 64-bit integer vectors of1180/// Compares the 32-bit integer elements of two 64-bit integer vectors of
...@@ -1257,10 +1193,9 @@ _mm_cmpeq_pi16(__m64 __m1, __m64 __m2)...@@ -1257,10 +1193,9 @@ _mm_cmpeq_pi16(__m64 __m1, __m64 __m2)
1257/// A 64-bit integer vector of [2 x i32].1193/// A 64-bit integer vector of [2 x i32].
1258/// \returns A 64-bit integer vector of [2 x i32] containing the comparison1194/// \returns A 64-bit integer vector of [2 x i32] containing the comparison
1259/// results.1195/// results.
1260static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21196static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpeq_pi32(__m64 __m1,
1261_mm_cmpeq_pi32(__m64 __m1, __m64 __m2)1197 __m64 __m2) {
1262{1198 return (__m64)(((__v2si)__m1) == ((__v2si)__m2));
1263 return (__m64)(((__v2si)__m1) == ((__v2si)__m2));
1264}1199}
12651200
1266/// Compares the 8-bit integer elements of two 64-bit integer vectors of1201/// Compares the 8-bit integer elements of two 64-bit integer vectors of
...@@ -1279,9 +1214,8 @@ _mm_cmpeq_pi32(__m64 __m1, __m64 __m2)...@@ -1279,9 +1214,8 @@ _mm_cmpeq_pi32(__m64 __m1, __m64 __m2)
1279/// A 64-bit integer vector of [8 x i8].1214/// A 64-bit integer vector of [8 x i8].
1280/// \returns A 64-bit integer vector of [8 x i8] containing the comparison1215/// \returns A 64-bit integer vector of [8 x i8] containing the comparison
1281/// results.1216/// results.
1282static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21217static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpgt_pi8(__m64 __m1,
1283_mm_cmpgt_pi8(__m64 __m1, __m64 __m2)1218 __m64 __m2) {
1284{
1285 /* This function always performs a signed comparison, but __v8qi is a char1219 /* This function always performs a signed comparison, but __v8qi is a char
1286 which may be signed or unsigned, so use __v8qs. */1220 which may be signed or unsigned, so use __v8qs. */
1287 return (__m64)((__v8qs)__m1 > (__v8qs)__m2);1221 return (__m64)((__v8qs)__m1 > (__v8qs)__m2);
...@@ -1303,10 +1237,9 @@ _mm_cmpgt_pi8(__m64 __m1, __m64 __m2)...@@ -1303,10 +1237,9 @@ _mm_cmpgt_pi8(__m64 __m1, __m64 __m2)
1303/// A 64-bit integer vector of [4 x i16].1237/// A 64-bit integer vector of [4 x i16].
1304/// \returns A 64-bit integer vector of [4 x i16] containing the comparison1238/// \returns A 64-bit integer vector of [4 x i16] containing the comparison
1305/// results.1239/// results.
1306static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21240static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpgt_pi16(__m64 __m1,
1307_mm_cmpgt_pi16(__m64 __m1, __m64 __m2)1241 __m64 __m2) {
1308{1242 return (__m64)((__v4hi)__m1 > (__v4hi)__m2);
1309 return (__m64)((__v4hi)__m1 > (__v4hi)__m2);
1310}1243}
13111244
1312/// Compares the 32-bit integer elements of two 64-bit integer vectors of1245/// Compares the 32-bit integer elements of two 64-bit integer vectors of
...@@ -1325,10 +1258,9 @@ _mm_cmpgt_pi16(__m64 __m1, __m64 __m2)...@@ -1325,10 +1258,9 @@ _mm_cmpgt_pi16(__m64 __m1, __m64 __m2)
1325/// A 64-bit integer vector of [2 x i32].1258/// A 64-bit integer vector of [2 x i32].
1326/// \returns A 64-bit integer vector of [2 x i32] containing the comparison1259/// \returns A 64-bit integer vector of [2 x i32] containing the comparison
1327/// results.1260/// results.
1328static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE21261static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpgt_pi32(__m64 __m1,
1329_mm_cmpgt_pi32(__m64 __m1, __m64 __m2)1262 __m64 __m2) {
1330{1263 return (__m64)((__v2si)__m1 > (__v2si)__m2);
1331 return (__m64)((__v2si)__m1 > (__v2si)__m2);
1332}1264}
13331265
1334/// Constructs a 64-bit integer vector initialized to zero.1266/// Constructs a 64-bit integer vector initialized to zero.
...@@ -1338,8 +1270,7 @@ _mm_cmpgt_pi32(__m64 __m1, __m64 __m2)...@@ -1338,8 +1270,7 @@ _mm_cmpgt_pi32(__m64 __m1, __m64 __m2)
1338/// This intrinsic corresponds to the <c> PXOR </c> instruction.1270/// This intrinsic corresponds to the <c> PXOR </c> instruction.
1339///1271///
1340/// \returns An initialized 64-bit integer vector with all elements set to zero.1272/// \returns An initialized 64-bit integer vector with all elements set to zero.
1341static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1273static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_setzero_si64(void) {
1342_mm_setzero_si64(void) {
1343 return __extension__(__m64){0LL};1274 return __extension__(__m64){0LL};
1344}1275}
13451276
...@@ -1358,8 +1289,8 @@ _mm_setzero_si64(void) {...@@ -1358,8 +1289,8 @@ _mm_setzero_si64(void) {
1358/// A 32-bit integer value used to initialize the lower 32 bits of the1289/// A 32-bit integer value used to initialize the lower 32 bits of the
1359/// result.1290/// result.
1360/// \returns An initialized 64-bit integer vector.1291/// \returns An initialized 64-bit integer vector.
1361static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1292static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set_pi32(int __i1,
1362_mm_set_pi32(int __i1, int __i0) {1293 int __i0) {
1363 return __extension__(__m64)(__v2si){__i0, __i1};1294 return __extension__(__m64)(__v2si){__i0, __i1};
1364}1295}
13651296
...@@ -1380,8 +1311,10 @@ _mm_set_pi32(int __i1, int __i0) {...@@ -1380,8 +1311,10 @@ _mm_set_pi32(int __i1, int __i0) {
1380/// \param __s01311/// \param __s0
1381/// A 16-bit integer value used to initialize bits [15:0] of the result.1312/// A 16-bit integer value used to initialize bits [15:0] of the result.
1382/// \returns An initialized 64-bit integer vector.1313/// \returns An initialized 64-bit integer vector.
1383static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1314static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set_pi16(short __s3,
1384_mm_set_pi16(short __s3, short __s2, short __s1, short __s0) {1315 short __s2,
1316 short __s1,
1317 short __s0) {
1385 return __extension__(__m64)(__v4hi){__s0, __s1, __s2, __s3};1318 return __extension__(__m64)(__v4hi){__s0, __s1, __s2, __s3};
1386}1319}
13871320
...@@ -1410,7 +1343,7 @@ _mm_set_pi16(short __s3, short __s2, short __s1, short __s0) {...@@ -1410,7 +1343,7 @@ _mm_set_pi16(short __s3, short __s2, short __s1, short __s0) {
1410/// \param __b01343/// \param __b0
1411/// An 8-bit integer value used to initialize bits [7:0] of the result.1344/// An 8-bit integer value used to initialize bits [7:0] of the result.
1412/// \returns An initialized 64-bit integer vector.1345/// \returns An initialized 64-bit integer vector.
1413static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1346static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
1414_mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2,1347_mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2,
1415 char __b1, char __b0) {1348 char __b1, char __b0) {
1416 return __extension__(__m64)(__v8qi){__b0, __b1, __b2, __b3,1349 return __extension__(__m64)(__v8qi){__b0, __b1, __b2, __b3,
...@@ -1430,8 +1363,7 @@ _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2,...@@ -1430,8 +1363,7 @@ _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2,
1430/// A 32-bit integer value used to initialize each vector element of the1363/// A 32-bit integer value used to initialize each vector element of the
1431/// result.1364/// result.
1432/// \returns An initialized 64-bit integer vector of [2 x i32].1365/// \returns An initialized 64-bit integer vector of [2 x i32].
1433static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1366static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set1_pi32(int __i) {
1434_mm_set1_pi32(int __i) {
1435 return _mm_set_pi32(__i, __i);1367 return _mm_set_pi32(__i, __i);
1436}1368}
14371369
...@@ -1448,8 +1380,7 @@ _mm_set1_pi32(int __i) {...@@ -1448,8 +1380,7 @@ _mm_set1_pi32(int __i) {
1448/// A 16-bit integer value used to initialize each vector element of the1380/// A 16-bit integer value used to initialize each vector element of the
1449/// result.1381/// result.
1450/// \returns An initialized 64-bit integer vector of [4 x i16].1382/// \returns An initialized 64-bit integer vector of [4 x i16].
1451static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1383static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set1_pi16(short __w) {
1452_mm_set1_pi16(short __w) {
1453 return _mm_set_pi16(__w, __w, __w, __w);1384 return _mm_set_pi16(__w, __w, __w, __w);
1454}1385}
14551386
...@@ -1465,8 +1396,7 @@ _mm_set1_pi16(short __w) {...@@ -1465,8 +1396,7 @@ _mm_set1_pi16(short __w) {
1465/// An 8-bit integer value used to initialize each vector element of the1396/// An 8-bit integer value used to initialize each vector element of the
1466/// result.1397/// result.
1467/// \returns An initialized 64-bit integer vector of [8 x i8].1398/// \returns An initialized 64-bit integer vector of [8 x i8].
1468static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1399static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set1_pi8(char __b) {
1469_mm_set1_pi8(char __b) {
1470 return _mm_set_pi8(__b, __b, __b, __b, __b, __b, __b, __b);1400 return _mm_set_pi8(__b, __b, __b, __b, __b, __b, __b, __b);
1471}1401}
14721402
...@@ -1485,8 +1415,8 @@ _mm_set1_pi8(char __b) {...@@ -1485,8 +1415,8 @@ _mm_set1_pi8(char __b) {
1485/// A 32-bit integer value used to initialize the upper 32 bits of the1415/// A 32-bit integer value used to initialize the upper 32 bits of the
1486/// result.1416/// result.
1487/// \returns An initialized 64-bit integer vector.1417/// \returns An initialized 64-bit integer vector.
1488static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1418static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_setr_pi32(int __i0,
1489_mm_setr_pi32(int __i0, int __i1) {1419 int __i1) {
1490 return _mm_set_pi32(__i1, __i0);1420 return _mm_set_pi32(__i1, __i0);
1491}1421}
14921422
...@@ -1507,8 +1437,10 @@ _mm_setr_pi32(int __i0, int __i1) {...@@ -1507,8 +1437,10 @@ _mm_setr_pi32(int __i0, int __i1) {
1507/// \param __w31437/// \param __w3
1508/// A 16-bit integer value used to initialize bits [63:48] of the result.1438/// A 16-bit integer value used to initialize bits [63:48] of the result.
1509/// \returns An initialized 64-bit integer vector.1439/// \returns An initialized 64-bit integer vector.
1510static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1440static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_setr_pi16(short __w0,
1511_mm_setr_pi16(short __w0, short __w1, short __w2, short __w3) {1441 short __w1,
1442 short __w2,
1443 short __w3) {
1512 return _mm_set_pi16(__w3, __w2, __w1, __w0);1444 return _mm_set_pi16(__w3, __w2, __w1, __w0);
1513}1445}
15141446
...@@ -1537,13 +1469,12 @@ _mm_setr_pi16(short __w0, short __w1, short __w2, short __w3) {...@@ -1537,13 +1469,12 @@ _mm_setr_pi16(short __w0, short __w1, short __w2, short __w3) {
1537/// \param __b71469/// \param __b7
1538/// An 8-bit integer value used to initialize bits [63:56] of the result.1470/// An 8-bit integer value used to initialize bits [63:56] of the result.
1539/// \returns An initialized 64-bit integer vector.1471/// \returns An initialized 64-bit integer vector.
1540static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR1472static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
1541_mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,1473_mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
1542 char __b6, char __b7) {1474 char __b6, char __b7) {
1543 return _mm_set_pi8(__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);1475 return _mm_set_pi8(__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
1544}1476}
15451477
1546#undef __anyext128
1547#undef __trunc641478#undef __trunc64
1548#undef __DEFAULT_FN_ATTRS_SSE21479#undef __DEFAULT_FN_ATTRS_SSE2
15491480
lib/include/module.modulemap+23-4
...@@ -171,8 +171,22 @@ module _Builtin_intrinsics [system] [extern_c] {...@@ -171,8 +171,22 @@ module _Builtin_intrinsics [system] [extern_c] {
171// that module. The system float.h (if present) will be treated171// that module. The system float.h (if present) will be treated
172// as a textual header in the sytem module.172// as a textual header in the sytem module.
173module _Builtin_float [system] {173module _Builtin_float [system] {
174 header "float.h"174 textual header "float.h"
175 export *175
176 explicit module float {
177 header "__float_float.h"
178 export *
179 }
180
181 explicit module header_macro {
182 header "__float_header_macro.h"
183 export *
184 }
185
186 explicit module infinity_nan {
187 header "__float_infinity_nan.h"
188 export *
189 }
176}190}
177191
178module _Builtin_inttypes [system] {192module _Builtin_inttypes [system] {
...@@ -239,6 +253,11 @@ module _Builtin_stdbool [system] {...@@ -239,6 +253,11 @@ module _Builtin_stdbool [system] {
239 export *253 export *
240}254}
241255
256module _Builtin_stdckdint [system] {
257 header "stdckdint.h"
258 export *
259}
260
242module _Builtin_stdcountof [system] {261module _Builtin_stdcountof [system] {
243 header "stdcountof.h"262 header "stdcountof.h"
244 export *263 export *
...@@ -329,13 +348,13 @@ module _Builtin_unwind [system] {...@@ -329,13 +348,13 @@ module _Builtin_unwind [system] {
329}348}
330// End -fbuiltin-headers-in-system-modules affected modules349// End -fbuiltin-headers-in-system-modules affected modules
331350
332module opencl_c {351module opencl_c [system] {
333 requires opencl352 requires opencl
334 header "opencl-c.h"353 header "opencl-c.h"
335 header "opencl-c-base.h"354 header "opencl-c-base.h"
336}355}
337356
338module ptrauth {357module ptrauth [system] {
339 header "ptrauth.h"358 header "ptrauth.h"
340 export *359 export *
341}360}
lib/include/movrs_avx10_2_512intrin.h+2-2
...@@ -17,8 +17,8 @@...@@ -17,8 +17,8 @@
1717
18/* Define the default attributes for the functions in this file. */18/* Define the default attributes for the functions in this file. */
19#define __DEFAULT_FN_ATTRS512 \19#define __DEFAULT_FN_ATTRS512 \
20 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, __target__("movrs, avx10.2"), \
21 __target__("movrs, avx10.2-512"), __min_vector_width__(512)))21 __min_vector_width__(512)))
2222
23static __inline__ __m512i __DEFAULT_FN_ATTRS51223static __inline__ __m512i __DEFAULT_FN_ATTRS512
24_mm512_loadrs_epi8(void const *__A) {24_mm512_loadrs_epi8(void const *__A) {
lib/include/movrs_avx10_2intrin.h+4-4
...@@ -17,11 +17,11 @@...@@ -17,11 +17,11 @@
1717
18/* Define the default attributes for the functions in this file. */18/* Define the default attributes for the functions in this file. */
19#define __DEFAULT_FN_ATTRS128 \19#define __DEFAULT_FN_ATTRS128 \
20 __attribute__((__always_inline__, __nodebug__, \20 __attribute__((__always_inline__, __nodebug__, __target__("movrs,avx10.2"), \
21 __target__("movrs,avx10.2-256"), __min_vector_width__(128)))21 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \22#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \23 __attribute__((__always_inline__, __nodebug__, __target__("movrs,avx10.2"), \
24 __target__("movrs,avx10.2-256"), __min_vector_width__(256)))24 __min_vector_width__(256)))
2525
26static __inline__ __m128i __DEFAULT_FN_ATTRS12826static __inline__ __m128i __DEFAULT_FN_ATTRS128
27_mm_loadrs_epi8(void const *__A) {27_mm_loadrs_epi8(void const *__A) {
lib/include/pmmintrin.h+12-24
...@@ -17,15 +17,9 @@...@@ -17,15 +17,9 @@
17#include <emmintrin.h>17#include <emmintrin.h>
1818
19/* Define the default attributes for the functions in this file. */19/* Define the default attributes for the functions in this file. */
20#if defined(__EVEX512__) && !defined(__AVX10_1_512__)
21#define __DEFAULT_FN_ATTRS \
22 __attribute__((__always_inline__, __nodebug__, \
23 __target__("sse3,no-evex512"), __min_vector_width__(128)))
24#else
25#define __DEFAULT_FN_ATTRS \20#define __DEFAULT_FN_ATTRS \
26 __attribute__((__always_inline__, __nodebug__, __target__("sse3"), \21 __attribute__((__always_inline__, __nodebug__, __target__("sse3"), \
27 __min_vector_width__(128)))22 __min_vector_width__(128)))
28#endif
2923
30#if defined(__cplusplus) && (__cplusplus >= 201103L)24#if defined(__cplusplus) && (__cplusplus >= 201103L)
31#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr25#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
...@@ -66,9 +60,8 @@ _mm_lddqu_si128(__m128i_u const *__p)...@@ -66,9 +60,8 @@ _mm_lddqu_si128(__m128i_u const *__p)
66/// A 128-bit vector of [4 x float] containing the right source operand.60/// A 128-bit vector of [4 x float] containing the right source operand.
67/// \returns A 128-bit vector of [4 x float] containing the alternating sums and61/// \returns A 128-bit vector of [4 x float] containing the alternating sums and
68/// differences of both operands.62/// differences of both operands.
69static __inline__ __m128 __DEFAULT_FN_ATTRS63static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR
70_mm_addsub_ps(__m128 __a, __m128 __b)64_mm_addsub_ps(__m128 __a, __m128 __b) {
71{
72 return __builtin_ia32_addsubps((__v4sf)__a, (__v4sf)__b);65 return __builtin_ia32_addsubps((__v4sf)__a, (__v4sf)__b);
73}66}
7467
...@@ -89,9 +82,8 @@ _mm_addsub_ps(__m128 __a, __m128 __b)...@@ -89,9 +82,8 @@ _mm_addsub_ps(__m128 __a, __m128 __b)
89/// destination.82/// destination.
90/// \returns A 128-bit vector of [4 x float] containing the horizontal sums of83/// \returns A 128-bit vector of [4 x float] containing the horizontal sums of
91/// both operands.84/// both operands.
92static __inline__ __m128 __DEFAULT_FN_ATTRS85static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadd_ps(__m128 __a,
93_mm_hadd_ps(__m128 __a, __m128 __b)86 __m128 __b) {
94{
95 return __builtin_ia32_haddps((__v4sf)__a, (__v4sf)__b);87 return __builtin_ia32_haddps((__v4sf)__a, (__v4sf)__b);
96}88}
9789
...@@ -112,9 +104,8 @@ _mm_hadd_ps(__m128 __a, __m128 __b)...@@ -112,9 +104,8 @@ _mm_hadd_ps(__m128 __a, __m128 __b)
112/// bits of the destination.104/// bits of the destination.
113/// \returns A 128-bit vector of [4 x float] containing the horizontal105/// \returns A 128-bit vector of [4 x float] containing the horizontal
114/// differences of both operands.106/// differences of both operands.
115static __inline__ __m128 __DEFAULT_FN_ATTRS107static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsub_ps(__m128 __a,
116_mm_hsub_ps(__m128 __a, __m128 __b)108 __m128 __b) {
117{
118 return __builtin_ia32_hsubps((__v4sf)__a, (__v4sf)__b);109 return __builtin_ia32_hsubps((__v4sf)__a, (__v4sf)__b);
119}110}
120111
...@@ -174,9 +165,8 @@ _mm_moveldup_ps(__m128 __a)...@@ -174,9 +165,8 @@ _mm_moveldup_ps(__m128 __a)
174/// A 128-bit vector of [2 x double] containing the right source operand.165/// A 128-bit vector of [2 x double] containing the right source operand.
175/// \returns A 128-bit vector of [2 x double] containing the alternating sums166/// \returns A 128-bit vector of [2 x double] containing the alternating sums
176/// and differences of both operands.167/// and differences of both operands.
177static __inline__ __m128d __DEFAULT_FN_ATTRS168static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR
178_mm_addsub_pd(__m128d __a, __m128d __b)169_mm_addsub_pd(__m128d __a, __m128d __b) {
179{
180 return __builtin_ia32_addsubpd((__v2df)__a, (__v2df)__b);170 return __builtin_ia32_addsubpd((__v2df)__a, (__v2df)__b);
181}171}
182172
...@@ -197,9 +187,8 @@ _mm_addsub_pd(__m128d __a, __m128d __b)...@@ -197,9 +187,8 @@ _mm_addsub_pd(__m128d __a, __m128d __b)
197/// destination.187/// destination.
198/// \returns A 128-bit vector of [2 x double] containing the horizontal sums of188/// \returns A 128-bit vector of [2 x double] containing the horizontal sums of
199/// both operands.189/// both operands.
200static __inline__ __m128d __DEFAULT_FN_ATTRS190static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR
201_mm_hadd_pd(__m128d __a, __m128d __b)191_mm_hadd_pd(__m128d __a, __m128d __b) {
202{
203 return __builtin_ia32_haddpd((__v2df)__a, (__v2df)__b);192 return __builtin_ia32_haddpd((__v2df)__a, (__v2df)__b);
204}193}
205194
...@@ -220,9 +209,8 @@ _mm_hadd_pd(__m128d __a, __m128d __b)...@@ -220,9 +209,8 @@ _mm_hadd_pd(__m128d __a, __m128d __b)
220/// the destination.209/// the destination.
221/// \returns A 128-bit vector of [2 x double] containing the horizontal210/// \returns A 128-bit vector of [2 x double] containing the horizontal
222/// differences of both operands.211/// differences of both operands.
223static __inline__ __m128d __DEFAULT_FN_ATTRS212static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR
224_mm_hsub_pd(__m128d __a, __m128d __b)213_mm_hsub_pd(__m128d __a, __m128d __b) {
225{
226 return __builtin_ia32_hsubpd((__v2df)__a, (__v2df)__b);214 return __builtin_ia32_hsubpd((__v2df)__a, (__v2df)__b);
227}215}
228216
lib/include/ptrauth.h+16-2
...@@ -95,7 +95,7 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t;...@@ -95,7 +95,7 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t;
95 __ptrauth qualifier; the compiler will perform this check95 __ptrauth qualifier; the compiler will perform this check
96 automatically. */96 automatically. */
9797
98#if __has_feature(ptrauth_intrinsics)98#if __has_feature(ptrauth_intrinsics) || defined(__PTRAUTH__)
9999
100/* Strip the signature from a value without authenticating it.100/* Strip the signature from a value without authenticating it.
101101
...@@ -241,6 +241,18 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t;...@@ -241,6 +241,18 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t;
241#define ptrauth_type_discriminator(__type) \241#define ptrauth_type_discriminator(__type) \
242 __builtin_ptrauth_type_discriminator(__type)242 __builtin_ptrauth_type_discriminator(__type)
243243
244/* Compute the constant discriminator used by Clang to sign pointers with the
245 given C function pointer type.
246
247 A call to this function is an integer constant expression. */
248#if __has_feature(ptrauth_function_pointer_type_discrimination)
249#define ptrauth_function_pointer_type_discriminator(__type) \
250 __builtin_ptrauth_type_discriminator(__type)
251#else
252#define ptrauth_function_pointer_type_discriminator(__type) \
253 ((ptrauth_extra_data_t)0)
254#endif
255
244/* Compute a signature for the given pair of pointer-sized values.256/* Compute a signature for the given pair of pointer-sized values.
245 The order of the arguments is significant.257 The order of the arguments is significant.
246258
...@@ -372,6 +384,8 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t;...@@ -372,6 +384,8 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t;
372 })384 })
373385
374#define ptrauth_type_discriminator(__type) ((ptrauth_extra_data_t)0)386#define ptrauth_type_discriminator(__type) ((ptrauth_extra_data_t)0)
387#define ptrauth_function_pointer_type_discriminator(__type) \
388 ((ptrauth_extra_data_t)0)
375389
376#define ptrauth_sign_generic_data(__value, __data) \390#define ptrauth_sign_generic_data(__value, __data) \
377 ({ \391 ({ \
...@@ -388,6 +402,6 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t;...@@ -388,6 +402,6 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t;
388#define __ptrauth_objc_isa_uintptr402#define __ptrauth_objc_isa_uintptr
389#define __ptrauth_objc_super_pointer403#define __ptrauth_objc_super_pointer
390404
391#endif /* __has_feature(ptrauth_intrinsics) */405#endif /* __has_feature(ptrauth_intrinsics) || defined(__PTRAUTH__) */
392406
393#endif /* __PTRAUTH_H */407#endif /* __PTRAUTH_H */
lib/include/riscv_mips.h created+34
...@@ -0,0 +1,34 @@
1//===----- riscv_mips.h - RISC-V MIPS Intrinsic definitions
2//----------------------===//
3//
4// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5// See https://llvm.org/LICENSE.txt for license information.
6// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7//
8//===----------------------------------------------------------------------===//
9
10#ifndef __RISCV_MIPS_H
11#define __RISCV_MIPS_H
12
13#if !defined(__riscv)
14#error "This header is only meant to be used on riscv architecture"
15#endif
16
17#define __DEFAULT_FN_ATTRS \
18 __attribute__((__always_inline__, __nodebug__, __target__("xmipsexectl")))
19
20static __inline__ void __DEFAULT_FN_ATTRS __mips_pause() {
21 __builtin_riscv_mips_pause();
22}
23
24static __inline__ void __DEFAULT_FN_ATTRS __mips_ehb() {
25 __builtin_riscv_mips_ehb();
26}
27
28static __inline__ void __DEFAULT_FN_ATTRS __mips_ihb() {
29 __builtin_riscv_mips_ihb();
30}
31
32#undef __DEFAULT_FN_ATTRS
33
34#endif
lib/include/riscv_nds.h created+89
...@@ -0,0 +1,89 @@
1/*===---- riscv_nds.h - Andes intrinsics -----------------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __RISCV_NDS_H
11#define __RISCV_NDS_H
12
13#include <stdint.h>
14
15#if defined(__cplusplus)
16extern "C" {
17#endif
18
19#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
20
21#if defined(__riscv_xandesperf)
22
23#if __riscv_xlen == 32
24
25static __inline__ int32_t __DEFAULT_FN_ATTRS __riscv_nds_ffb_32(uint32_t __a,
26 uint32_t __b) {
27 return __builtin_riscv_nds_ffb_32(__a, __b);
28}
29
30static __inline__ int32_t __DEFAULT_FN_ATTRS
31__riscv_nds_ffzmism_32(uint32_t __a, uint32_t __b) {
32 return __builtin_riscv_nds_ffzmism_32(__a, __b);
33}
34
35static __inline__ int32_t __DEFAULT_FN_ATTRS
36__riscv_nds_ffmism_32(uint32_t __a, uint32_t __b) {
37 return __builtin_riscv_nds_ffmism_32(__a, __b);
38}
39
40static __inline__ int32_t __DEFAULT_FN_ATTRS
41__riscv_nds_flmism_32(uint32_t __a, uint32_t __b) {
42 return __builtin_riscv_nds_flmism_32(__a, __b);
43}
44
45#endif
46
47#if __riscv_xlen == 64
48
49static __inline__ int64_t __DEFAULT_FN_ATTRS __riscv_nds_ffb_64(uint64_t __a,
50 uint64_t __b) {
51 return __builtin_riscv_nds_ffb_64(__a, __b);
52}
53
54static __inline__ int64_t __DEFAULT_FN_ATTRS
55__riscv_nds_ffzmism_64(uint64_t __a, uint64_t __b) {
56 return __builtin_riscv_nds_ffzmism_64(__a, __b);
57}
58
59static __inline__ int64_t __DEFAULT_FN_ATTRS
60__riscv_nds_ffmism_64(uint64_t __a, uint64_t __b) {
61 return __builtin_riscv_nds_ffmism_64(__a, __b);
62}
63
64static __inline__ int64_t __DEFAULT_FN_ATTRS
65__riscv_nds_flmism_64(uint64_t __a, uint64_t __b) {
66 return __builtin_riscv_nds_flmism_64(__a, __b);
67}
68
69#endif
70
71#endif // defined(__riscv_xandesperf)
72
73#if defined(__riscv_xandesbfhcvt)
74
75static __inline__ float __DEFAULT_FN_ATTRS __riscv_nds_fcvt_s_bf16(__bf16 bf) {
76 return __builtin_riscv_nds_fcvt_s_bf16(bf);
77}
78
79static __inline__ __bf16 __DEFAULT_FN_ATTRS __riscv_nds_fcvt_bf16_s(float sf) {
80 return __builtin_riscv_nds_fcvt_bf16_s(sf);
81}
82
83#endif // defined(__riscv_xandesbfhcvt)
84
85#if defined(__cplusplus)
86}
87#endif
88
89#endif // define __RISCV_NDS_H
lib/include/sifive_vector.h+58-2
...@@ -47,9 +47,9 @@...@@ -47,9 +47,9 @@
47 __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint32_t)rs1, 32, 3, vl)47 __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint32_t)rs1, 32, 3, vl)
4848
49#define __riscv_sf_vc_i_se_u8mf4(p27_26, p24_20, p11_7, simm5, vl) \49#define __riscv_sf_vc_i_se_u8mf4(p27_26, p24_20, p11_7, simm5, vl) \
50 __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 7, vl)
51#define __riscv_sf_vc_i_se_u8mf2(p27_26, p24_20, p11_7, simm5, vl) \
52 __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 6, vl)50 __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 6, vl)
51#define __riscv_sf_vc_i_se_u8mf2(p27_26, p24_20, p11_7, simm5, vl) \
52 __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 7, vl)
53#define __riscv_sf_vc_i_se_u8m1(p27_26, p24_20, p11_7, simm5, vl) \53#define __riscv_sf_vc_i_se_u8m1(p27_26, p24_20, p11_7, simm5, vl) \
54 __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 0, vl)54 __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 0, vl)
55#define __riscv_sf_vc_i_se_u8m2(p27_26, p24_20, p11_7, simm5, vl) \55#define __riscv_sf_vc_i_se_u8m2(p27_26, p24_20, p11_7, simm5, vl) \
...@@ -115,4 +115,60 @@...@@ -115,4 +115,60 @@
115#endif115#endif
116#endif116#endif
117117
118#define __riscv_sf_vsettnt_e8w1(atn) __riscv_sf_vsettnt(atn, 0, 1);
119#define __riscv_sf_vsettnt_e8w2(atn) __riscv_sf_vsettnt(atn, 0, 2);
120#define __riscv_sf_vsettnt_e8w4(atn) __riscv_sf_vsettnt(atn, 0, 3);
121#define __riscv_sf_vsettnt_e16w1(atn) __riscv_sf_vsettnt(atn, 1, 1);
122#define __riscv_sf_vsettnt_e16w2(atn) __riscv_sf_vsettnt(atn, 1, 2);
123#define __riscv_sf_vsettnt_e16w4(atn) __riscv_sf_vsettnt(atn, 1, 3);
124#define __riscv_sf_vsettnt_e32w1(atn) __riscv_sf_vsettnt(atn, 2, 1);
125#define __riscv_sf_vsettnt_e32w2(atn) __riscv_sf_vsettnt(atn, 2, 2);
126#define __riscv_sf_vsettm_e8w1(atm) __riscv_sf_vsettm(atm, 0, 1);
127#define __riscv_sf_vsettm_e8w2(atm) __riscv_sf_vsettm(atm, 0, 2);
128#define __riscv_sf_vsettm_e8w4(atm) __riscv_sf_vsettm(atm, 0, 3);
129#define __riscv_sf_vsettm_e16w1(atm) __riscv_sf_vsettm(atm, 1, 1);
130#define __riscv_sf_vsettm_e16w2(atm) __riscv_sf_vsettm(atm, 1, 2);
131#define __riscv_sf_vsettm_e16w4(atm) __riscv_sf_vsettm(atm, 1, 3);
132#define __riscv_sf_vsettm_e32w1(atm) __riscv_sf_vsettm(atm, 2, 1);
133#define __riscv_sf_vsettm_e32w2(atm) __riscv_sf_vsettm(atm, 2, 2);
134#define __riscv_sf_vsettn_e8w1(atn) __riscv_sf_vsettn(atn, 0, 1);
135#define __riscv_sf_vsettn_e8w2(atn) __riscv_sf_vsettn(atn, 0, 2);
136#define __riscv_sf_vsettn_e8w4(atn) __riscv_sf_vsettn(atn, 0, 3);
137#define __riscv_sf_vsettn_e16w1(atn) __riscv_sf_vsettn(atn, 1, 1);
138#define __riscv_sf_vsettn_e16w2(atn) __riscv_sf_vsettn(atn, 1, 2);
139#define __riscv_sf_vsettn_e16w4(atn) __riscv_sf_vsettn(atn, 1, 3);
140#define __riscv_sf_vsettn_e32w1(atn) __riscv_sf_vsettn(atn, 2, 1);
141#define __riscv_sf_vsettn_e32w2(atn) __riscv_sf_vsettn(atn, 2, 2);
142#define __riscv_sf_vsettk_e8w1(atk) __riscv_sf_vsettk(atk, 0, 1);
143#define __riscv_sf_vsettk_e8w2(atk) __riscv_sf_vsettk(atk, 0, 2);
144#define __riscv_sf_vsettk_e8w4(atk) __riscv_sf_vsettk(atk, 0, 3);
145#define __riscv_sf_vsettk_e16w1(atk) __riscv_sf_vsettk(atk, 1, 1);
146#define __riscv_sf_vsettk_e16w2(atk) __riscv_sf_vsettk(atk, 1, 2);
147#define __riscv_sf_vsettk_e16w4(atk) __riscv_sf_vsettk(atk, 1, 3);
148#define __riscv_sf_vsettk_e32w1(atk) __riscv_sf_vsettk(atk, 2, 1);
149#define __riscv_sf_vsettk_e32w2(atk) __riscv_sf_vsettk(atk, 2, 2);
150#define __riscv_sf_vtzero_t_e8w1(tile, atm, atn) \
151 __riscv_sf_vtzero_t(tile, atm, atn, 3, 1);
152#define __riscv_sf_vtzero_t_e8w2(tile, atm, atn) \
153 __riscv_sf_vtzero_t(tile, atm, atn, 3, 2);
154#define __riscv_sf_vtzero_t_e8w4(tile, atm, atn) \
155 __riscv_sf_vtzero_t(tile, atm, atn, 3, 4);
156#define __riscv_sf_vtzero_t_e16w1(tile, atm, atn) \
157 __riscv_sf_vtzero_t(tile, atm, atn, 4, 1);
158#define __riscv_sf_vtzero_t_e16w2(tile, atm, atn) \
159 __riscv_sf_vtzero_t(tile, atm, atn, 4, 2);
160#define __riscv_sf_vtzero_t_e16w4(tile, atm, atn) \
161 __riscv_sf_vtzero_t(tile, atm, atn, 4, 4);
162#define __riscv_sf_vtzero_t_e32w1(tile, atm, atn) \
163 __riscv_sf_vtzero_t(tile, atm, atn, 5, 1);
164#define __riscv_sf_vtzero_t_e32w2(tile, atm, atn) \
165 __riscv_sf_vtzero_t(tile, atm, atn, 5, 2);
166#if __riscv_v_elen >= 64
167#define __riscv_sf_vsettnt_e64w1(atn) __riscv_sf_vsettnt(atn, 3, 1);
168#define __riscv_sf_vsettm_e64w1(atm) __riscv_sf_vsettm(atm, 3, 1);
169#define __riscv_sf_vsettn_e64w1(atn) __riscv_sf_vsettn(atn, 3, 1);
170#define __riscv_sf_vsettk_e64w1(atk) __riscv_sf_vsettk(atk, 3, 1);
171#define __riscv_sf_vtzero_t_e64w1(tile, atm, atn) \
172 __riscv_sf_vtzero_t(tile, atm, atn, 6, 1);
173#endif
118#endif //_SIFIVE_VECTOR_H_174#endif //_SIFIVE_VECTOR_H_
lib/include/sm4evexintrin.h+2-2
...@@ -14,8 +14,8 @@...@@ -14,8 +14,8 @@
14#define __SM4EVEXINTRIN_H14#define __SM4EVEXINTRIN_H
1515
16#define __DEFAULT_FN_ATTRS512 \16#define __DEFAULT_FN_ATTRS512 \
17 __attribute__((__always_inline__, __nodebug__, \17 __attribute__((__always_inline__, __nodebug__, __target__("sm4,avx10.2"), \
18 __target__("sm4,avx10.2-512"), __min_vector_width__(512)))18 __min_vector_width__(512)))
1919
20static __inline__ __m512i __DEFAULT_FN_ATTRS51220static __inline__ __m512i __DEFAULT_FN_ATTRS512
21_mm512_sm4key4_epi32(__m512i __A, __m512i __B) {21_mm512_sm4key4_epi32(__m512i __A, __m512i __B) {
lib/include/smmintrin.h+77-59
...@@ -17,14 +17,14 @@...@@ -17,14 +17,14 @@
17#include <tmmintrin.h>17#include <tmmintrin.h>
1818
19/* Define the default attributes for the functions in this file. */19/* Define the default attributes for the functions in this file. */
20#if defined(__EVEX512__) && !defined(__AVX10_1_512__)
21#define __DEFAULT_FN_ATTRS \
22 __attribute__((__always_inline__, __nodebug__, \
23 __target__("sse4.1,no-evex512"), __min_vector_width__(128)))
24#else
25#define __DEFAULT_FN_ATTRS \20#define __DEFAULT_FN_ATTRS \
26 __attribute__((__always_inline__, __nodebug__, __target__("sse4.1"), \21 __attribute__((__always_inline__, __nodebug__, __target__("sse4.1"), \
27 __min_vector_width__(128)))22 __min_vector_width__(128)))
23
24#if defined(__cplusplus) && (__cplusplus >= 201103L)
25#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
26#else
27#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
28#endif28#endif
2929
30/* SSE4 Rounding macros. */30/* SSE4 Rounding macros. */
...@@ -439,9 +439,8 @@...@@ -439,9 +439,8 @@
439/// position in the result. When a mask bit is 1, the corresponding 64-bit439/// position in the result. When a mask bit is 1, the corresponding 64-bit
440/// element in operand \a __V2 is copied to the same position in the result.440/// element in operand \a __V2 is copied to the same position in the result.
441/// \returns A 128-bit vector of [2 x double] containing the copied values.441/// \returns A 128-bit vector of [2 x double] containing the copied values.
442static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_blendv_pd(__m128d __V1,442static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR
443 __m128d __V2,443_mm_blendv_pd(__m128d __V1, __m128d __V2, __m128d __M) {
444 __m128d __M) {
445 return (__m128d)__builtin_ia32_blendvpd((__v2df)__V1, (__v2df)__V2,444 return (__m128d)__builtin_ia32_blendvpd((__v2df)__V1, (__v2df)__V2,
446 (__v2df)__M);445 (__v2df)__M);
447}446}
...@@ -466,9 +465,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_blendv_pd(__m128d __V1,...@@ -466,9 +465,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_blendv_pd(__m128d __V1,
466/// position in the result. When a mask bit is 1, the corresponding 32-bit465/// position in the result. When a mask bit is 1, the corresponding 32-bit
467/// element in operand \a __V2 is copied to the same position in the result.466/// element in operand \a __V2 is copied to the same position in the result.
468/// \returns A 128-bit vector of [4 x float] containing the copied values.467/// \returns A 128-bit vector of [4 x float] containing the copied values.
469static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_blendv_ps(__m128 __V1,468static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR
470 __m128 __V2,469_mm_blendv_ps(__m128 __V1, __m128 __V2, __m128 __M) {
471 __m128 __M) {
472 return (__m128)__builtin_ia32_blendvps((__v4sf)__V1, (__v4sf)__V2,470 return (__m128)__builtin_ia32_blendvps((__v4sf)__V1, (__v4sf)__V2,
473 (__v4sf)__M);471 (__v4sf)__M);
474}472}
...@@ -493,9 +491,8 @@ static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_blendv_ps(__m128 __V1,...@@ -493,9 +491,8 @@ static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_blendv_ps(__m128 __V1,
493/// position in the result. When a mask bit is 1, the corresponding 8-bit491/// position in the result. When a mask bit is 1, the corresponding 8-bit
494/// element in operand \a __V2 is copied to the same position in the result.492/// element in operand \a __V2 is copied to the same position in the result.
495/// \returns A 128-bit vector of [16 x i8] containing the copied values.493/// \returns A 128-bit vector of [16 x i8] containing the copied values.
496static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_blendv_epi8(__m128i __V1,494static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
497 __m128i __V2,495_mm_blendv_epi8(__m128i __V1, __m128i __V2, __m128i __M) {
498 __m128i __M) {
499 return (__m128i)__builtin_ia32_pblendvb128((__v16qi)__V1, (__v16qi)__V2,496 return (__m128i)__builtin_ia32_pblendvb128((__v16qi)__V1, (__v16qi)__V2,
500 (__v16qi)__M);497 (__v16qi)__M);
501}498}
...@@ -542,8 +539,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_blendv_epi8(__m128i __V1,...@@ -542,8 +539,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_blendv_epi8(__m128i __V1,
542/// \param __V2539/// \param __V2
543/// A 128-bit integer vector.540/// A 128-bit integer vector.
544/// \returns A 128-bit integer vector containing the products of both operands.541/// \returns A 128-bit integer vector containing the products of both operands.
545static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi32(__m128i __V1,542static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
546 __m128i __V2) {543_mm_mullo_epi32(__m128i __V1, __m128i __V2) {
547 return (__m128i)((__v4su)__V1 * (__v4su)__V2);544 return (__m128i)((__v4su)__V1 * (__v4su)__V2);
548}545}
549546
...@@ -561,8 +558,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi32(__m128i __V1,...@@ -561,8 +558,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi32(__m128i __V1,
561/// A 128-bit vector of [4 x i32].558/// A 128-bit vector of [4 x i32].
562/// \returns A 128-bit vector of [2 x i64] containing the products of both559/// \returns A 128-bit vector of [2 x i64] containing the products of both
563/// operands.560/// operands.
564static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epi32(__m128i __V1,561static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
565 __m128i __V2) {562_mm_mul_epi32(__m128i __V1, __m128i __V2) {
566 return (__m128i)__builtin_ia32_pmuldq128((__v4si)__V1, (__v4si)__V2);563 return (__m128i)__builtin_ia32_pmuldq128((__v4si)__V1, (__v4si)__V2);
567}564}
568565
...@@ -669,8 +666,8 @@ _mm_stream_load_si128(const void *__V) {...@@ -669,8 +666,8 @@ _mm_stream_load_si128(const void *__V) {
669/// \param __V2666/// \param __V2
670/// A 128-bit vector of [16 x i8]667/// A 128-bit vector of [16 x i8]
671/// \returns A 128-bit vector of [16 x i8] containing the lesser values.668/// \returns A 128-bit vector of [16 x i8] containing the lesser values.
672static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi8(__m128i __V1,669static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
673 __m128i __V2) {670_mm_min_epi8(__m128i __V1, __m128i __V2) {
674 return (__m128i)__builtin_elementwise_min((__v16qs)__V1, (__v16qs)__V2);671 return (__m128i)__builtin_elementwise_min((__v16qs)__V1, (__v16qs)__V2);
675}672}
676673
...@@ -687,8 +684,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi8(__m128i __V1,...@@ -687,8 +684,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi8(__m128i __V1,
687/// \param __V2684/// \param __V2
688/// A 128-bit vector of [16 x i8].685/// A 128-bit vector of [16 x i8].
689/// \returns A 128-bit vector of [16 x i8] containing the greater values.686/// \returns A 128-bit vector of [16 x i8] containing the greater values.
690static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi8(__m128i __V1,687static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
691 __m128i __V2) {688_mm_max_epi8(__m128i __V1, __m128i __V2) {
692 return (__m128i)__builtin_elementwise_max((__v16qs)__V1, (__v16qs)__V2);689 return (__m128i)__builtin_elementwise_max((__v16qs)__V1, (__v16qs)__V2);
693}690}
694691
...@@ -705,8 +702,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi8(__m128i __V1,...@@ -705,8 +702,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi8(__m128i __V1,
705/// \param __V2702/// \param __V2
706/// A 128-bit vector of [8 x u16].703/// A 128-bit vector of [8 x u16].
707/// \returns A 128-bit vector of [8 x u16] containing the lesser values.704/// \returns A 128-bit vector of [8 x u16] containing the lesser values.
708static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu16(__m128i __V1,705static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
709 __m128i __V2) {706_mm_min_epu16(__m128i __V1, __m128i __V2) {
710 return (__m128i)__builtin_elementwise_min((__v8hu)__V1, (__v8hu)__V2);707 return (__m128i)__builtin_elementwise_min((__v8hu)__V1, (__v8hu)__V2);
711}708}
712709
...@@ -723,8 +720,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu16(__m128i __V1,...@@ -723,8 +720,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu16(__m128i __V1,
723/// \param __V2720/// \param __V2
724/// A 128-bit vector of [8 x u16].721/// A 128-bit vector of [8 x u16].
725/// \returns A 128-bit vector of [8 x u16] containing the greater values.722/// \returns A 128-bit vector of [8 x u16] containing the greater values.
726static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu16(__m128i __V1,723static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
727 __m128i __V2) {724_mm_max_epu16(__m128i __V1, __m128i __V2) {
728 return (__m128i)__builtin_elementwise_max((__v8hu)__V1, (__v8hu)__V2);725 return (__m128i)__builtin_elementwise_max((__v8hu)__V1, (__v8hu)__V2);
729}726}
730727
...@@ -741,8 +738,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu16(__m128i __V1,...@@ -741,8 +738,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu16(__m128i __V1,
741/// \param __V2738/// \param __V2
742/// A 128-bit vector of [4 x i32].739/// A 128-bit vector of [4 x i32].
743/// \returns A 128-bit vector of [4 x i32] containing the lesser values.740/// \returns A 128-bit vector of [4 x i32] containing the lesser values.
744static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi32(__m128i __V1,741static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
745 __m128i __V2) {742_mm_min_epi32(__m128i __V1, __m128i __V2) {
746 return (__m128i)__builtin_elementwise_min((__v4si)__V1, (__v4si)__V2);743 return (__m128i)__builtin_elementwise_min((__v4si)__V1, (__v4si)__V2);
747}744}
748745
...@@ -759,8 +756,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi32(__m128i __V1,...@@ -759,8 +756,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi32(__m128i __V1,
759/// \param __V2756/// \param __V2
760/// A 128-bit vector of [4 x i32].757/// A 128-bit vector of [4 x i32].
761/// \returns A 128-bit vector of [4 x i32] containing the greater values.758/// \returns A 128-bit vector of [4 x i32] containing the greater values.
762static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi32(__m128i __V1,759static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
763 __m128i __V2) {760_mm_max_epi32(__m128i __V1, __m128i __V2) {
764 return (__m128i)__builtin_elementwise_max((__v4si)__V1, (__v4si)__V2);761 return (__m128i)__builtin_elementwise_max((__v4si)__V1, (__v4si)__V2);
765}762}
766763
...@@ -777,8 +774,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi32(__m128i __V1,...@@ -777,8 +774,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi32(__m128i __V1,
777/// \param __V2774/// \param __V2
778/// A 128-bit vector of [4 x u32].775/// A 128-bit vector of [4 x u32].
779/// \returns A 128-bit vector of [4 x u32] containing the lesser values.776/// \returns A 128-bit vector of [4 x u32] containing the lesser values.
780static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu32(__m128i __V1,777static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
781 __m128i __V2) {778_mm_min_epu32(__m128i __V1, __m128i __V2) {
782 return (__m128i)__builtin_elementwise_min((__v4su)__V1, (__v4su)__V2);779 return (__m128i)__builtin_elementwise_min((__v4su)__V1, (__v4su)__V2);
783}780}
784781
...@@ -795,8 +792,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu32(__m128i __V1,...@@ -795,8 +792,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu32(__m128i __V1,
795/// \param __V2792/// \param __V2
796/// A 128-bit vector of [4 x u32].793/// A 128-bit vector of [4 x u32].
797/// \returns A 128-bit vector of [4 x u32] containing the greater values.794/// \returns A 128-bit vector of [4 x u32] containing the greater values.
798static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1,795static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
799 __m128i __V2) {796_mm_max_epu32(__m128i __V1, __m128i __V2) {
800 return (__m128i)__builtin_elementwise_max((__v4su)__V1, (__v4su)__V2);797 return (__m128i)__builtin_elementwise_max((__v4su)__V1, (__v4su)__V2);
801}798}
802799
...@@ -1096,8 +1093,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1,...@@ -1096,8 +1093,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1,
1096/// \param __V1093/// \param __V
1097/// A 128-bit integer vector selecting which bits to test in operand \a __M.1094/// A 128-bit integer vector selecting which bits to test in operand \a __M.
1098/// \returns TRUE if the specified bits are all zeros; FALSE otherwise.1095/// \returns TRUE if the specified bits are all zeros; FALSE otherwise.
1099static __inline__ int __DEFAULT_FN_ATTRS _mm_testz_si128(__m128i __M,1096static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
1100 __m128i __V) {1097_mm_testz_si128(__m128i __M, __m128i __V) {
1101 return __builtin_ia32_ptestz128((__v2di)__M, (__v2di)__V);1098 return __builtin_ia32_ptestz128((__v2di)__M, (__v2di)__V);
1102}1099}
11031100
...@@ -1113,8 +1110,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testz_si128(__m128i __M,...@@ -1113,8 +1110,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testz_si128(__m128i __M,
1113/// \param __V1110/// \param __V
1114/// A 128-bit integer vector selecting which bits to test in operand \a __M.1111/// A 128-bit integer vector selecting which bits to test in operand \a __M.
1115/// \returns TRUE if the specified bits are all ones; FALSE otherwise.1112/// \returns TRUE if the specified bits are all ones; FALSE otherwise.
1116static __inline__ int __DEFAULT_FN_ATTRS _mm_testc_si128(__m128i __M,1113static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
1117 __m128i __V) {1114_mm_testc_si128(__m128i __M, __m128i __V) {
1118 return __builtin_ia32_ptestc128((__v2di)__M, (__v2di)__V);1115 return __builtin_ia32_ptestc128((__v2di)__M, (__v2di)__V);
1119}1116}
11201117
...@@ -1131,8 +1128,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testc_si128(__m128i __M,...@@ -1131,8 +1128,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testc_si128(__m128i __M,
1131/// A 128-bit integer vector selecting which bits to test in operand \a __M.1128/// A 128-bit integer vector selecting which bits to test in operand \a __M.
1132/// \returns TRUE if the specified bits are neither all zeros nor all ones;1129/// \returns TRUE if the specified bits are neither all zeros nor all ones;
1133/// FALSE otherwise.1130/// FALSE otherwise.
1134static __inline__ int __DEFAULT_FN_ATTRS _mm_testnzc_si128(__m128i __M,1131static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR
1135 __m128i __V) {1132_mm_testnzc_si128(__m128i __M, __m128i __V) {
1136 return __builtin_ia32_ptestnzc128((__v2di)__M, (__v2di)__V);1133 return __builtin_ia32_ptestnzc128((__v2di)__M, (__v2di)__V);
1137}1134}
11381135
...@@ -1205,8 +1202,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testnzc_si128(__m128i __M,...@@ -1205,8 +1202,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testnzc_si128(__m128i __M,
1205/// \param __V21202/// \param __V2
1206/// A 128-bit integer vector.1203/// A 128-bit integer vector.
1207/// \returns A 128-bit integer vector containing the comparison results.1204/// \returns A 128-bit integer vector containing the comparison results.
1208static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi64(__m128i __V1,1205static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1209 __m128i __V2) {1206_mm_cmpeq_epi64(__m128i __V1, __m128i __V2) {
1210 return (__m128i)((__v2di)__V1 == (__v2di)__V2);1207 return (__m128i)((__v2di)__V1 == (__v2di)__V2);
1211}1208}
12121209
...@@ -1224,7 +1221,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi64(__m128i __V1,...@@ -1224,7 +1221,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi64(__m128i __V1,
1224/// A 128-bit vector of [16 x i8]. The lower eight 8-bit elements are1221/// A 128-bit vector of [16 x i8]. The lower eight 8-bit elements are
1225/// sign-extended to 16-bit values.1222/// sign-extended to 16-bit values.
1226/// \returns A 128-bit vector of [8 x i16] containing the sign-extended values.1223/// \returns A 128-bit vector of [8 x i16] containing the sign-extended values.
1227static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi16(__m128i __V) {1224static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1225_mm_cvtepi8_epi16(__m128i __V) {
1228 /* This function always performs a signed extension, but __v16qi is a char1226 /* This function always performs a signed extension, but __v16qi is a char
1229 which may be signed or unsigned, so use __v16qs. */1227 which may be signed or unsigned, so use __v16qs. */
1230 return (__m128i) __builtin_convertvector(1228 return (__m128i) __builtin_convertvector(
...@@ -1246,7 +1244,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi16(__m128i __V) {...@@ -1246,7 +1244,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi16(__m128i __V) {
1246/// A 128-bit vector of [16 x i8]. The lower four 8-bit elements are1244/// A 128-bit vector of [16 x i8]. The lower four 8-bit elements are
1247/// sign-extended to 32-bit values.1245/// sign-extended to 32-bit values.
1248/// \returns A 128-bit vector of [4 x i32] containing the sign-extended values.1246/// \returns A 128-bit vector of [4 x i32] containing the sign-extended values.
1249static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi32(__m128i __V) {1247static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1248_mm_cvtepi8_epi32(__m128i __V) {
1250 /* This function always performs a signed extension, but __v16qi is a char1249 /* This function always performs a signed extension, but __v16qi is a char
1251 which may be signed or unsigned, so use __v16qs. */1250 which may be signed or unsigned, so use __v16qs. */
1252 return (__m128i) __builtin_convertvector(1251 return (__m128i) __builtin_convertvector(
...@@ -1266,7 +1265,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi32(__m128i __V) {...@@ -1266,7 +1265,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi32(__m128i __V) {
1266/// A 128-bit vector of [16 x i8]. The lower two 8-bit elements are1265/// A 128-bit vector of [16 x i8]. The lower two 8-bit elements are
1267/// sign-extended to 64-bit values.1266/// sign-extended to 64-bit values.
1268/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values.1267/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values.
1269static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi64(__m128i __V) {1268static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1269_mm_cvtepi8_epi64(__m128i __V) {
1270 /* This function always performs a signed extension, but __v16qi is a char1270 /* This function always performs a signed extension, but __v16qi is a char
1271 which may be signed or unsigned, so use __v16qs. */1271 which may be signed or unsigned, so use __v16qs. */
1272 return (__m128i) __builtin_convertvector(1272 return (__m128i) __builtin_convertvector(
...@@ -1286,7 +1286,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi64(__m128i __V) {...@@ -1286,7 +1286,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi64(__m128i __V) {
1286/// A 128-bit vector of [8 x i16]. The lower four 16-bit elements are1286/// A 128-bit vector of [8 x i16]. The lower four 16-bit elements are
1287/// sign-extended to 32-bit values.1287/// sign-extended to 32-bit values.
1288/// \returns A 128-bit vector of [4 x i32] containing the sign-extended values.1288/// \returns A 128-bit vector of [4 x i32] containing the sign-extended values.
1289static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi32(__m128i __V) {1289static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1290_mm_cvtepi16_epi32(__m128i __V) {
1290 return (__m128i) __builtin_convertvector(1291 return (__m128i) __builtin_convertvector(
1291 __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4si);1292 __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4si);
1292}1293}
...@@ -1304,7 +1305,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi32(__m128i __V) {...@@ -1304,7 +1305,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi32(__m128i __V) {
1304/// A 128-bit vector of [8 x i16]. The lower two 16-bit elements are1305/// A 128-bit vector of [8 x i16]. The lower two 16-bit elements are
1305/// sign-extended to 64-bit values.1306/// sign-extended to 64-bit values.
1306/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values.1307/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values.
1307static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi64(__m128i __V) {1308static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1309_mm_cvtepi16_epi64(__m128i __V) {
1308 return (__m128i) __builtin_convertvector(1310 return (__m128i) __builtin_convertvector(
1309 __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1), __v2di);1311 __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1), __v2di);
1310}1312}
...@@ -1322,7 +1324,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi64(__m128i __V) {...@@ -1322,7 +1324,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi64(__m128i __V) {
1322/// A 128-bit vector of [4 x i32]. The lower two 32-bit elements are1324/// A 128-bit vector of [4 x i32]. The lower two 32-bit elements are
1323/// sign-extended to 64-bit values.1325/// sign-extended to 64-bit values.
1324/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values.1326/// \returns A 128-bit vector of [2 x i64] containing the sign-extended values.
1325static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi32_epi64(__m128i __V) {1327static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1328_mm_cvtepi32_epi64(__m128i __V) {
1326 return (__m128i) __builtin_convertvector(1329 return (__m128i) __builtin_convertvector(
1327 __builtin_shufflevector((__v4si)__V, (__v4si)__V, 0, 1), __v2di);1330 __builtin_shufflevector((__v4si)__V, (__v4si)__V, 0, 1), __v2di);
1328}1331}
...@@ -1341,7 +1344,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi32_epi64(__m128i __V) {...@@ -1341,7 +1344,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi32_epi64(__m128i __V) {
1341/// A 128-bit vector of [16 x i8]. The lower eight 8-bit elements are1344/// A 128-bit vector of [16 x i8]. The lower eight 8-bit elements are
1342/// zero-extended to 16-bit values.1345/// zero-extended to 16-bit values.
1343/// \returns A 128-bit vector of [8 x i16] containing the zero-extended values.1346/// \returns A 128-bit vector of [8 x i16] containing the zero-extended values.
1344static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi16(__m128i __V) {1347static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1348_mm_cvtepu8_epi16(__m128i __V) {
1345 return (__m128i) __builtin_convertvector(1349 return (__m128i) __builtin_convertvector(
1346 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6,1350 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6,
1347 7),1351 7),
...@@ -1361,7 +1365,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi16(__m128i __V) {...@@ -1361,7 +1365,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi16(__m128i __V) {
1361/// A 128-bit vector of [16 x i8]. The lower four 8-bit elements are1365/// A 128-bit vector of [16 x i8]. The lower four 8-bit elements are
1362/// zero-extended to 32-bit values.1366/// zero-extended to 32-bit values.
1363/// \returns A 128-bit vector of [4 x i32] containing the zero-extended values.1367/// \returns A 128-bit vector of [4 x i32] containing the zero-extended values.
1364static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi32(__m128i __V) {1368static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1369_mm_cvtepu8_epi32(__m128i __V) {
1365 return (__m128i) __builtin_convertvector(1370 return (__m128i) __builtin_convertvector(
1366 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4si);1371 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4si);
1367}1372}
...@@ -1379,7 +1384,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi32(__m128i __V) {...@@ -1379,7 +1384,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi32(__m128i __V) {
1379/// A 128-bit vector of [16 x i8]. The lower two 8-bit elements are1384/// A 128-bit vector of [16 x i8]. The lower two 8-bit elements are
1380/// zero-extended to 64-bit values.1385/// zero-extended to 64-bit values.
1381/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values.1386/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values.
1382static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi64(__m128i __V) {1387static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1388_mm_cvtepu8_epi64(__m128i __V) {
1383 return (__m128i) __builtin_convertvector(1389 return (__m128i) __builtin_convertvector(
1384 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1), __v2di);1390 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1), __v2di);
1385}1391}
...@@ -1397,7 +1403,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi64(__m128i __V) {...@@ -1397,7 +1403,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi64(__m128i __V) {
1397/// A 128-bit vector of [8 x i16]. The lower four 16-bit elements are1403/// A 128-bit vector of [8 x i16]. The lower four 16-bit elements are
1398/// zero-extended to 32-bit values.1404/// zero-extended to 32-bit values.
1399/// \returns A 128-bit vector of [4 x i32] containing the zero-extended values.1405/// \returns A 128-bit vector of [4 x i32] containing the zero-extended values.
1400static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi32(__m128i __V) {1406static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1407_mm_cvtepu16_epi32(__m128i __V) {
1401 return (__m128i) __builtin_convertvector(1408 return (__m128i) __builtin_convertvector(
1402 __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4si);1409 __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4si);
1403}1410}
...@@ -1415,7 +1422,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi32(__m128i __V) {...@@ -1415,7 +1422,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi32(__m128i __V) {
1415/// A 128-bit vector of [8 x i16]. The lower two 16-bit elements are1422/// A 128-bit vector of [8 x i16]. The lower two 16-bit elements are
1416/// zero-extended to 64-bit values.1423/// zero-extended to 64-bit values.
1417/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values.1424/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values.
1418static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi64(__m128i __V) {1425static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1426_mm_cvtepu16_epi64(__m128i __V) {
1419 return (__m128i) __builtin_convertvector(1427 return (__m128i) __builtin_convertvector(
1420 __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1), __v2di);1428 __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1), __v2di);
1421}1429}
...@@ -1433,7 +1441,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi64(__m128i __V) {...@@ -1433,7 +1441,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi64(__m128i __V) {
1433/// A 128-bit vector of [4 x i32]. The lower two 32-bit elements are1441/// A 128-bit vector of [4 x i32]. The lower two 32-bit elements are
1434/// zero-extended to 64-bit values.1442/// zero-extended to 64-bit values.
1435/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values.1443/// \returns A 128-bit vector of [2 x i64] containing the zero-extended values.
1436static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu32_epi64(__m128i __V) {1444static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1445_mm_cvtepu32_epi64(__m128i __V) {
1437 return (__m128i) __builtin_convertvector(1446 return (__m128i) __builtin_convertvector(
1438 __builtin_shufflevector((__v4su)__V, (__v4su)__V, 0, 1), __v2di);1447 __builtin_shufflevector((__v4su)__V, (__v4su)__V, 0, 1), __v2di);
1439}1448}
...@@ -1457,8 +1466,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu32_epi64(__m128i __V) {...@@ -1457,8 +1466,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu32_epi64(__m128i __V) {
1457/// A 128-bit vector of [4 x i32]. The converted [4 x i16] values are1466/// A 128-bit vector of [4 x i32]. The converted [4 x i16] values are
1458/// written to the higher 64 bits of the result.1467/// written to the higher 64 bits of the result.
1459/// \returns A 128-bit vector of [8 x i16] containing the converted values.1468/// \returns A 128-bit vector of [8 x i16] containing the converted values.
1460static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi32(__m128i __V1,1469static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1461 __m128i __V2) {1470_mm_packus_epi32(__m128i __V1, __m128i __V2) {
1462 return (__m128i)__builtin_ia32_packusdw128((__v4si)__V1, (__v4si)__V2);1471 return (__m128i)__builtin_ia32_packusdw128((__v4si)__V1, (__v4si)__V2);
1463}1472}
14641473
...@@ -1515,7 +1524,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi32(__m128i __V1,...@@ -1515,7 +1524,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi32(__m128i __V1,
1515/// \returns A 128-bit value where bits [15:0] contain the minimum value found1524/// \returns A 128-bit value where bits [15:0] contain the minimum value found
1516/// in parameter \a __V, bits [18:16] contain the index of the minimum value1525/// in parameter \a __V, bits [18:16] contain the index of the minimum value
1517/// and the remaining bits are set to 0.1526/// and the remaining bits are set to 0.
1518static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) {1527static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
1528_mm_minpos_epu16(__m128i __V) {
1519 return (__m128i)__builtin_ia32_phminposuw128((__v8hi)__V);1529 return (__m128i)__builtin_ia32_phminposuw128((__v8hi)__V);
1520}1530}
15211531
...@@ -1525,9 +1535,16 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) {...@@ -1525,9 +1535,16 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) {
1525 so we'll do the same. */1535 so we'll do the same. */
15261536
1527#undef __DEFAULT_FN_ATTRS1537#undef __DEFAULT_FN_ATTRS
1538#undef __DEFAULT_FN_ATTRS_CONSTEXPR
1528#define __DEFAULT_FN_ATTRS \1539#define __DEFAULT_FN_ATTRS \
1529 __attribute__((__always_inline__, __nodebug__, __target__("sse4.2")))1540 __attribute__((__always_inline__, __nodebug__, __target__("sse4.2")))
15301541
1542#if defined(__cplusplus) && (__cplusplus >= 201103L)
1543#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
1544#else
1545#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
1546#endif
1547
1531/* These specify the type of data that we're comparing. */1548/* These specify the type of data that we're comparing. */
1532#define _SIDD_UBYTE_OPS 0x001549#define _SIDD_UBYTE_OPS 0x00
1533#define _SIDD_UWORD_OPS 0x011550#define _SIDD_UWORD_OPS 0x01
...@@ -2320,12 +2337,13 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) {...@@ -2320,12 +2337,13 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) {
2320/// \param __V22337/// \param __V2
2321/// A 128-bit integer vector.2338/// A 128-bit integer vector.
2322/// \returns A 128-bit integer vector containing the comparison results.2339/// \returns A 128-bit integer vector containing the comparison results.
2323static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi64(__m128i __V1,2340static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2324 __m128i __V2) {2341_mm_cmpgt_epi64(__m128i __V1, __m128i __V2) {
2325 return (__m128i)((__v2di)__V1 > (__v2di)__V2);2342 return (__m128i)((__v2di)__V1 > (__v2di)__V2);
2326}2343}
23272344
2328#undef __DEFAULT_FN_ATTRS2345#undef __DEFAULT_FN_ATTRS
2346#undef __DEFAULT_FN_ATTRS_CONSTEXPR
23292347
2330#include <popcntintrin.h>2348#include <popcntintrin.h>
23312349
lib/include/spirvintrin.h created+194
...@@ -0,0 +1,194 @@
1//===-- spirvintrin.h - SPIR-V intrinsic functions ------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef __SPIRVINTRIN_H
10#define __SPIRVINTRIN_H
11
12#ifndef __SPIRV__
13#error "This file is intended for SPIR-V targets or offloading to SPIR-V"
14#endif
15
16#ifndef __GPUINTRIN_H
17#error "Never use <spirvintrin.h> directly; include <gpuintrin.h> instead"
18#endif
19
20_Pragma("omp begin declare target device_type(nohost)");
21_Pragma("omp begin declare variant match(device = {arch(spirv64)})");
22
23// Type aliases to the address spaces used by the SPIR-V backend.
24#define __gpu_private __attribute__((address_space(0)))
25#define __gpu_constant __attribute__((address_space(2)))
26#define __gpu_local __attribute__((address_space(3)))
27#define __gpu_global __attribute__((address_space(1)))
28#define __gpu_generic __attribute__((address_space(4)))
29
30// Attribute to declare a function as a kernel.
31#define __gpu_kernel __attribute__((device_kernel, visibility("protected")))
32
33// Returns the number of workgroups in the 'x' dimension of the grid.
34_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_blocks_x(void) {
35 return __builtin_spirv_num_workgroups(0);
36}
37
38// Returns the number of workgroups in the 'y' dimension of the grid.
39_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_blocks_y(void) {
40 return __builtin_spirv_num_workgroups(1);
41}
42
43// Returns the number of workgroups in the 'z' dimension of the grid.
44_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_blocks_z(void) {
45 return __builtin_spirv_num_workgroups(2);
46}
47
48// Returns the 'x' dimension of the current workgroup's id.
49_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_block_id_x(void) {
50 return __builtin_spirv_workgroup_id(0);
51}
52
53// Returns the 'y' dimension of the current workgroup's id.
54_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_block_id_y(void) {
55 return __builtin_spirv_workgroup_id(1);
56}
57
58// Returns the 'z' dimension of the current workgroup's id.
59_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_block_id_z(void) {
60 return __builtin_spirv_workgroup_id(2);
61}
62
63// Returns the number of workitems in the 'x' dimension.
64_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_threads_x(void) {
65 return __builtin_spirv_workgroup_size(0);
66}
67
68// Returns the number of workitems in the 'y' dimension.
69_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_threads_y(void) {
70 return __builtin_spirv_workgroup_size(1);
71}
72
73// Returns the number of workitems in the 'z' dimension.
74_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_threads_z(void) {
75 return __builtin_spirv_workgroup_size(2);
76}
77
78// Returns the 'x' dimension id of the workitem in the current workgroup.
79_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_thread_id_x(void) {
80 return __builtin_spirv_local_invocation_id(0);
81}
82
83// Returns the 'y' dimension id of the workitem in the current workgroup.
84_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_thread_id_y(void) {
85 return __builtin_spirv_local_invocation_id(1);
86}
87
88// Returns the 'z' dimension id of the workitem in the current workgroup.
89_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_thread_id_z(void) {
90 return __builtin_spirv_local_invocation_id(2);
91}
92
93// Returns the size of an wavefront, either 32 or 64 depending on hardware
94// and compilation options.
95_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_lanes(void) {
96 return __builtin_spirv_subgroup_size();
97}
98
99// Returns the id of the thread inside of an wavefront executing together.
100_DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_lane_id(void) {
101 return __builtin_spirv_subgroup_local_invocation_id();
102}
103
104// Returns the bit-mask of active threads in the current wavefront. This
105// implementation is incorrect if the target uses more than 64 lanes.
106_DEFAULT_FN_ATTRS static __inline__ uint64_t __gpu_lane_mask(void) {
107 uint32_t [[clang::ext_vector_type(4)]] __mask =
108 __builtin_spirv_subgroup_ballot(1);
109 return __builtin_bit_cast(uint64_t,
110 __builtin_shufflevector(__mask, __mask, 0, 1));
111}
112
113// Copies the value from the first active thread in the wavefront to the rest.
114_DEFAULT_FN_ATTRS static __inline__ uint32_t
115__gpu_read_first_lane_u32(uint64_t __lane_mask, uint32_t __x) {
116 return __builtin_spirv_subgroup_shuffle(__x,
117 __builtin_ctzg(__gpu_lane_mask()));
118}
119
120// Returns a bitmask of threads in the current lane for which \p x is true. This
121// implementation is incorrect if the target uses more than 64 lanes.
122_DEFAULT_FN_ATTRS static __inline__ uint64_t __gpu_ballot(uint64_t __lane_mask,
123 bool __x) {
124 // The lane_mask & gives the nvptx semantics when lane_mask is a subset of
125 // the active threads.
126 uint32_t [[clang::ext_vector_type(4)]] __mask =
127 __builtin_spirv_subgroup_ballot(__x);
128 return __lane_mask & __builtin_bit_cast(uint64_t, __builtin_shufflevector(
129 __mask, __mask, 0, 1));
130}
131
132// Waits for all the threads in the block to converge and issues a fence.
133_DEFAULT_FN_ATTRS static __inline__ void __gpu_sync_threads(void) {
134 __builtin_spirv_group_barrier();
135}
136
137// Wait for all threads in the wavefront to converge, this is a noop on SPIR-V.
138_DEFAULT_FN_ATTRS static __inline__ void __gpu_sync_lane(uint64_t __lane_mask) {
139}
140
141// Shuffles the the lanes inside the wavefront according to the given index.
142_DEFAULT_FN_ATTRS static __inline__ uint32_t
143__gpu_shuffle_idx_u32(uint64_t __lane_mask, uint32_t __idx, uint32_t __x,
144 uint32_t __width) {
145 uint32_t __lane = __idx + (__gpu_lane_id() & ~(__width - 1));
146 return __builtin_spirv_subgroup_shuffle(__x, __lane);
147}
148
149// Returns a bitmask marking all lanes that have the same value of __x.
150_DEFAULT_FN_ATTRS static __inline__ uint64_t
151__gpu_match_any_u32(uint64_t __lane_mask, uint32_t __x) {
152 return __gpu_match_any_u32_impl(__lane_mask, __x);
153}
154
155// Returns a bitmask marking all lanes that have the same value of __x.
156_DEFAULT_FN_ATTRS static __inline__ uint64_t
157__gpu_match_any_u64(uint64_t __lane_mask, uint64_t __x) {
158 return __gpu_match_any_u64_impl(__lane_mask, __x);
159}
160
161// Returns the current lane mask if every lane contains __x.
162_DEFAULT_FN_ATTRS static __inline__ uint64_t
163__gpu_match_all_u32(uint64_t __lane_mask, uint32_t __x) {
164 return __gpu_match_all_u32_impl(__lane_mask, __x);
165}
166
167// Returns the current lane mask if every lane contains __x.
168_DEFAULT_FN_ATTRS static __inline__ uint64_t
169__gpu_match_all_u64(uint64_t __lane_mask, uint64_t __x) {
170 return __gpu_match_all_u64_impl(__lane_mask, __x);
171}
172
173// SPIR-V does not expose this, always return false.
174_DEFAULT_FN_ATTRS static __inline__ bool __gpu_is_ptr_local(void *ptr) {
175 return 0;
176}
177
178// SPIR-V does not expose this, always return false.
179_DEFAULT_FN_ATTRS static __inline__ bool __gpu_is_ptr_private(void *ptr) {
180 return 0;
181}
182
183// SPIR-V only supports 'OpTerminateInvocation' in fragment shaders.
184_DEFAULT_FN_ATTRS [[noreturn]] static __inline__ void __gpu_exit(void) {
185 __builtin_trap();
186}
187
188// This is a no-op as SPIR-V does not support it.
189_DEFAULT_FN_ATTRS static __inline__ void __gpu_thread_suspend(void) {}
190
191_Pragma("omp end declare variant");
192_Pragma("omp end declare target");
193
194#endif // __SPIRVINTRIN_H
lib/include/stddefer.h created+19
...@@ -0,0 +1,19 @@
1/*===---- stddefer.h - Standard header for 'defer' -------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#ifndef __CLANG_STDDEFER_H
11#define __CLANG_STDDEFER_H
12
13/* Provide 'defer' if '_Defer' is supported. */
14#ifdef __STDC_DEFER_TS25755__
15#define __STDC_VERSION_STDDEFER_H__ 202602L
16#define defer _Defer
17#endif
18
19#endif /* __CLANG_STDDEFER_H */
lib/include/tmmintrin.h+116-147
...@@ -17,21 +17,21 @@...@@ -17,21 +17,21 @@
17#include <pmmintrin.h>17#include <pmmintrin.h>
1818
19/* Define the default attributes for the functions in this file. */19/* Define the default attributes for the functions in this file. */
20#if defined(__EVEX512__) && !defined(__AVX10_1_512__)
21#define __DEFAULT_FN_ATTRS \
22 __attribute__((__always_inline__, __nodebug__, \
23 __target__("ssse3,no-evex512"), __min_vector_width__(128)))
24#else
25#define __DEFAULT_FN_ATTRS \20#define __DEFAULT_FN_ATTRS \
26 __attribute__((__always_inline__, __nodebug__, __target__("ssse3"), \21 __attribute__((__always_inline__, __nodebug__, __target__("ssse3"), \
27 __min_vector_width__(128)))22 __min_vector_width__(128)))
28#endif
2923
30#define __trunc64(x) \24#define __trunc64(x) \
31 (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0)25 (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0)
32#define __anyext128(x) \26#define __zext128(x) \
33 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \27 (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \
34 1, -1, -1)28 1, 2, 3)
29
30#if defined(__cplusplus) && (__cplusplus >= 201103L)
31#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
32#else
33#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
34#endif
3535
36/// Computes the absolute value of each of the packed 8-bit signed36/// Computes the absolute value of each of the packed 8-bit signed
37/// integers in the source operand and stores the 8-bit unsigned integer37/// integers in the source operand and stores the 8-bit unsigned integer
...@@ -45,9 +45,7 @@...@@ -45,9 +45,7 @@
45/// A 64-bit vector of [8 x i8].45/// A 64-bit vector of [8 x i8].
46/// \returns A 64-bit integer vector containing the absolute values of the46/// \returns A 64-bit integer vector containing the absolute values of the
47/// elements in the operand.47/// elements in the operand.
48static __inline__ __m64 __DEFAULT_FN_ATTRS48static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_abs_pi8(__m64 __a) {
49_mm_abs_pi8(__m64 __a)
50{
51 return (__m64)__builtin_elementwise_abs((__v8qs)__a);49 return (__m64)__builtin_elementwise_abs((__v8qs)__a);
52}50}
5351
...@@ -63,10 +61,9 @@ _mm_abs_pi8(__m64 __a)...@@ -63,10 +61,9 @@ _mm_abs_pi8(__m64 __a)
63/// A 128-bit vector of [16 x i8].61/// A 128-bit vector of [16 x i8].
64/// \returns A 128-bit integer vector containing the absolute values of the62/// \returns A 128-bit integer vector containing the absolute values of the
65/// elements in the operand.63/// elements in the operand.
66static __inline__ __m128i __DEFAULT_FN_ATTRS64static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
67_mm_abs_epi8(__m128i __a)65_mm_abs_epi8(__m128i __a) {
68{66 return (__m128i)__builtin_elementwise_abs((__v16qs)__a);
69 return (__m128i)__builtin_elementwise_abs((__v16qs)__a);
70}67}
7168
72/// Computes the absolute value of each of the packed 16-bit signed69/// Computes the absolute value of each of the packed 16-bit signed
...@@ -81,10 +78,8 @@ _mm_abs_epi8(__m128i __a)...@@ -81,10 +78,8 @@ _mm_abs_epi8(__m128i __a)
81/// A 64-bit vector of [4 x i16].78/// A 64-bit vector of [4 x i16].
82/// \returns A 64-bit integer vector containing the absolute values of the79/// \returns A 64-bit integer vector containing the absolute values of the
83/// elements in the operand.80/// elements in the operand.
84static __inline__ __m64 __DEFAULT_FN_ATTRS81static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_abs_pi16(__m64 __a) {
85_mm_abs_pi16(__m64 __a)82 return (__m64)__builtin_elementwise_abs((__v4hi)__a);
86{
87 return (__m64)__builtin_elementwise_abs((__v4hi)__a);
88}83}
8984
90/// Computes the absolute value of each of the packed 16-bit signed85/// Computes the absolute value of each of the packed 16-bit signed
...@@ -99,10 +94,9 @@ _mm_abs_pi16(__m64 __a)...@@ -99,10 +94,9 @@ _mm_abs_pi16(__m64 __a)
99/// A 128-bit vector of [8 x i16].94/// A 128-bit vector of [8 x i16].
100/// \returns A 128-bit integer vector containing the absolute values of the95/// \returns A 128-bit integer vector containing the absolute values of the
101/// elements in the operand.96/// elements in the operand.
102static __inline__ __m128i __DEFAULT_FN_ATTRS97static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
103_mm_abs_epi16(__m128i __a)98_mm_abs_epi16(__m128i __a) {
104{99 return (__m128i)__builtin_elementwise_abs((__v8hi)__a);
105 return (__m128i)__builtin_elementwise_abs((__v8hi)__a);
106}100}
107101
108/// Computes the absolute value of each of the packed 32-bit signed102/// Computes the absolute value of each of the packed 32-bit signed
...@@ -117,10 +111,8 @@ _mm_abs_epi16(__m128i __a)...@@ -117,10 +111,8 @@ _mm_abs_epi16(__m128i __a)
117/// A 64-bit vector of [2 x i32].111/// A 64-bit vector of [2 x i32].
118/// \returns A 64-bit integer vector containing the absolute values of the112/// \returns A 64-bit integer vector containing the absolute values of the
119/// elements in the operand.113/// elements in the operand.
120static __inline__ __m64 __DEFAULT_FN_ATTRS114static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_abs_pi32(__m64 __a) {
121_mm_abs_pi32(__m64 __a)115 return (__m64)__builtin_elementwise_abs((__v2si)__a);
122{
123 return (__m64)__builtin_elementwise_abs((__v2si)__a);
124}116}
125117
126/// Computes the absolute value of each of the packed 32-bit signed118/// Computes the absolute value of each of the packed 32-bit signed
...@@ -135,10 +127,9 @@ _mm_abs_pi32(__m64 __a)...@@ -135,10 +127,9 @@ _mm_abs_pi32(__m64 __a)
135/// A 128-bit vector of [4 x i32].127/// A 128-bit vector of [4 x i32].
136/// \returns A 128-bit integer vector containing the absolute values of the128/// \returns A 128-bit integer vector containing the absolute values of the
137/// elements in the operand.129/// elements in the operand.
138static __inline__ __m128i __DEFAULT_FN_ATTRS130static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
139_mm_abs_epi32(__m128i __a)131_mm_abs_epi32(__m128i __a) {
140{132 return (__m128i)__builtin_elementwise_abs((__v4si)__a);
141 return (__m128i)__builtin_elementwise_abs((__v4si)__a);
142}133}
143134
144/// Concatenates the two 128-bit integer vector operands, and135/// Concatenates the two 128-bit integer vector operands, and
...@@ -184,11 +175,12 @@ _mm_abs_epi32(__m128i __a)...@@ -184,11 +175,12 @@ _mm_abs_epi32(__m128i __a)
184/// An immediate operand specifying how many bytes to right-shift the result.175/// An immediate operand specifying how many bytes to right-shift the result.
185/// \returns A 64-bit integer vector containing the concatenated right-shifted176/// \returns A 64-bit integer vector containing the concatenated right-shifted
186/// value.177/// value.
187#define _mm_alignr_pi8(a, b, n) \178#define _mm_alignr_pi8(a, b, n) \
188 ((__m64)__builtin_shufflevector( \179 ((__m64)__builtin_shufflevector( \
189 __builtin_ia32_psrldqi128_byteshift( \180 (__v2di)__builtin_ia32_psrldqi128_byteshift( \
190 __builtin_shufflevector((__v1di)(a), (__v1di)(b), 1, 0), \181 (__v16qi)__builtin_shufflevector((__v1di)(a), (__v1di)(b), 1, 0), \
191 (n)), __extension__ (__v2di){}, 0))182 (n)), \
183 __extension__(__v2di){}, 0))
192184
193/// Horizontally adds the adjacent pairs of values contained in 2 packed185/// Horizontally adds the adjacent pairs of values contained in 2 packed
194/// 128-bit vectors of [8 x i16].186/// 128-bit vectors of [8 x i16].
...@@ -207,10 +199,9 @@ _mm_abs_epi32(__m128i __a)...@@ -207,10 +199,9 @@ _mm_abs_epi32(__m128i __a)
207/// destination.199/// destination.
208/// \returns A 128-bit vector of [8 x i16] containing the horizontal sums of200/// \returns A 128-bit vector of [8 x i16] containing the horizontal sums of
209/// both operands.201/// both operands.
210static __inline__ __m128i __DEFAULT_FN_ATTRS202static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
211_mm_hadd_epi16(__m128i __a, __m128i __b)203_mm_hadd_epi16(__m128i __a, __m128i __b) {
212{204 return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b);
213 return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b);
214}205}
215206
216/// Horizontally adds the adjacent pairs of values contained in 2 packed207/// Horizontally adds the adjacent pairs of values contained in 2 packed
...@@ -230,10 +221,9 @@ _mm_hadd_epi16(__m128i __a, __m128i __b)...@@ -230,10 +221,9 @@ _mm_hadd_epi16(__m128i __a, __m128i __b)
230/// destination.221/// destination.
231/// \returns A 128-bit vector of [4 x i32] containing the horizontal sums of222/// \returns A 128-bit vector of [4 x i32] containing the horizontal sums of
232/// both operands.223/// both operands.
233static __inline__ __m128i __DEFAULT_FN_ATTRS224static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
234_mm_hadd_epi32(__m128i __a, __m128i __b)225_mm_hadd_epi32(__m128i __a, __m128i __b) {
235{226 return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b);
236 return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b);
237}227}
238228
239/// Horizontally adds the adjacent pairs of values contained in 2 packed229/// Horizontally adds the adjacent pairs of values contained in 2 packed
...@@ -253,11 +243,10 @@ _mm_hadd_epi32(__m128i __a, __m128i __b)...@@ -253,11 +243,10 @@ _mm_hadd_epi32(__m128i __a, __m128i __b)
253/// destination.243/// destination.
254/// \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both244/// \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both
255/// operands.245/// operands.
256static __inline__ __m64 __DEFAULT_FN_ATTRS246static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadd_pi16(__m64 __a,
257_mm_hadd_pi16(__m64 __a, __m64 __b)247 __m64 __b) {
258{248 return __trunc64(__builtin_ia32_phaddw128(
259 return __trunc64(__builtin_ia32_phaddw128(249 (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){}));
260 (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){}));
261}250}
262251
263/// Horizontally adds the adjacent pairs of values contained in 2 packed252/// Horizontally adds the adjacent pairs of values contained in 2 packed
...@@ -277,11 +266,10 @@ _mm_hadd_pi16(__m64 __a, __m64 __b)...@@ -277,11 +266,10 @@ _mm_hadd_pi16(__m64 __a, __m64 __b)
277/// destination.266/// destination.
278/// \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both267/// \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both
279/// operands.268/// operands.
280static __inline__ __m64 __DEFAULT_FN_ATTRS269static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadd_pi32(__m64 __a,
281_mm_hadd_pi32(__m64 __a, __m64 __b)270 __m64 __b) {
282{271 return __trunc64(__builtin_ia32_phaddd128(
283 return __trunc64(__builtin_ia32_phaddd128(272 (__v4si)__builtin_shufflevector(__a, __b, 0, 1), (__v4si){}));
284 (__v4si)__builtin_shufflevector(__a, __b, 0, 1), (__v4si){}));
285}273}
286274
287/// Horizontally adds, with saturation, the adjacent pairs of values contained275/// Horizontally adds, with saturation, the adjacent pairs of values contained
...@@ -304,10 +292,9 @@ _mm_hadd_pi32(__m64 __a, __m64 __b)...@@ -304,10 +292,9 @@ _mm_hadd_pi32(__m64 __a, __m64 __b)
304/// destination.292/// destination.
305/// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated293/// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated
306/// sums of both operands.294/// sums of both operands.
307static __inline__ __m128i __DEFAULT_FN_ATTRS295static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
308_mm_hadds_epi16(__m128i __a, __m128i __b)296_mm_hadds_epi16(__m128i __a, __m128i __b) {
309{297 return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b);
310 return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b);
311}298}
312299
313/// Horizontally adds, with saturation, the adjacent pairs of values contained300/// Horizontally adds, with saturation, the adjacent pairs of values contained
...@@ -330,11 +317,10 @@ _mm_hadds_epi16(__m128i __a, __m128i __b)...@@ -330,11 +317,10 @@ _mm_hadds_epi16(__m128i __a, __m128i __b)
330/// destination.317/// destination.
331/// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated318/// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated
332/// sums of both operands.319/// sums of both operands.
333static __inline__ __m64 __DEFAULT_FN_ATTRS320static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadds_pi16(__m64 __a,
334_mm_hadds_pi16(__m64 __a, __m64 __b)321 __m64 __b) {
335{322 return __trunc64(__builtin_ia32_phaddsw128(
336 return __trunc64(__builtin_ia32_phaddsw128(323 (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){}));
337 (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){}));
338}324}
339325
340/// Horizontally subtracts the adjacent pairs of values contained in 2326/// Horizontally subtracts the adjacent pairs of values contained in 2
...@@ -354,10 +340,9 @@ _mm_hadds_pi16(__m64 __a, __m64 __b)...@@ -354,10 +340,9 @@ _mm_hadds_pi16(__m64 __a, __m64 __b)
354/// the destination.340/// the destination.
355/// \returns A 128-bit vector of [8 x i16] containing the horizontal differences341/// \returns A 128-bit vector of [8 x i16] containing the horizontal differences
356/// of both operands.342/// of both operands.
357static __inline__ __m128i __DEFAULT_FN_ATTRS343static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
358_mm_hsub_epi16(__m128i __a, __m128i __b)344_mm_hsub_epi16(__m128i __a, __m128i __b) {
359{345 return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b);
360 return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b);
361}346}
362347
363/// Horizontally subtracts the adjacent pairs of values contained in 2348/// Horizontally subtracts the adjacent pairs of values contained in 2
...@@ -377,10 +362,9 @@ _mm_hsub_epi16(__m128i __a, __m128i __b)...@@ -377,10 +362,9 @@ _mm_hsub_epi16(__m128i __a, __m128i __b)
377/// the destination.362/// the destination.
378/// \returns A 128-bit vector of [4 x i32] containing the horizontal differences363/// \returns A 128-bit vector of [4 x i32] containing the horizontal differences
379/// of both operands.364/// of both operands.
380static __inline__ __m128i __DEFAULT_FN_ATTRS365static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
381_mm_hsub_epi32(__m128i __a, __m128i __b)366_mm_hsub_epi32(__m128i __a, __m128i __b) {
382{367 return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b);
383 return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b);
384}368}
385369
386/// Horizontally subtracts the adjacent pairs of values contained in 2370/// Horizontally subtracts the adjacent pairs of values contained in 2
...@@ -400,11 +384,10 @@ _mm_hsub_epi32(__m128i __a, __m128i __b)...@@ -400,11 +384,10 @@ _mm_hsub_epi32(__m128i __a, __m128i __b)
400/// the destination.384/// the destination.
401/// \returns A 64-bit vector of [4 x i16] containing the horizontal differences385/// \returns A 64-bit vector of [4 x i16] containing the horizontal differences
402/// of both operands.386/// of both operands.
403static __inline__ __m64 __DEFAULT_FN_ATTRS387static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsub_pi16(__m64 __a,
404_mm_hsub_pi16(__m64 __a, __m64 __b)388 __m64 __b) {
405{389 return __trunc64(__builtin_ia32_phsubw128(
406 return __trunc64(__builtin_ia32_phsubw128(390 (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){}));
407 (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){}));
408}391}
409392
410/// Horizontally subtracts the adjacent pairs of values contained in 2393/// Horizontally subtracts the adjacent pairs of values contained in 2
...@@ -424,11 +407,10 @@ _mm_hsub_pi16(__m64 __a, __m64 __b)...@@ -424,11 +407,10 @@ _mm_hsub_pi16(__m64 __a, __m64 __b)
424/// the destination.407/// the destination.
425/// \returns A 64-bit vector of [2 x i32] containing the horizontal differences408/// \returns A 64-bit vector of [2 x i32] containing the horizontal differences
426/// of both operands.409/// of both operands.
427static __inline__ __m64 __DEFAULT_FN_ATTRS410static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsub_pi32(__m64 __a,
428_mm_hsub_pi32(__m64 __a, __m64 __b)411 __m64 __b) {
429{412 return __trunc64(__builtin_ia32_phsubd128(
430 return __trunc64(__builtin_ia32_phsubd128(413 (__v4si)__builtin_shufflevector(__a, __b, 0, 1), (__v4si){}));
431 (__v4si)__builtin_shufflevector(__a, __b, 0, 1), (__v4si){}));
432}414}
433415
434/// Horizontally subtracts, with saturation, the adjacent pairs of values416/// Horizontally subtracts, with saturation, the adjacent pairs of values
...@@ -451,10 +433,9 @@ _mm_hsub_pi32(__m64 __a, __m64 __b)...@@ -451,10 +433,9 @@ _mm_hsub_pi32(__m64 __a, __m64 __b)
451/// the destination.433/// the destination.
452/// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated434/// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated
453/// differences of both operands.435/// differences of both operands.
454static __inline__ __m128i __DEFAULT_FN_ATTRS436static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
455_mm_hsubs_epi16(__m128i __a, __m128i __b)437_mm_hsubs_epi16(__m128i __a, __m128i __b) {
456{438 return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b);
457 return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b);
458}439}
459440
460/// Horizontally subtracts, with saturation, the adjacent pairs of values441/// Horizontally subtracts, with saturation, the adjacent pairs of values
...@@ -477,11 +458,10 @@ _mm_hsubs_epi16(__m128i __a, __m128i __b)...@@ -477,11 +458,10 @@ _mm_hsubs_epi16(__m128i __a, __m128i __b)
477/// the destination.458/// the destination.
478/// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated459/// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated
479/// differences of both operands.460/// differences of both operands.
480static __inline__ __m64 __DEFAULT_FN_ATTRS461static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsubs_pi16(__m64 __a,
481_mm_hsubs_pi16(__m64 __a, __m64 __b)462 __m64 __b) {
482{463 return __trunc64(__builtin_ia32_phsubsw128(
483 return __trunc64(__builtin_ia32_phsubsw128(464 (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){}));
484 (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){}));
485}465}
486466
487/// Multiplies corresponding pairs of packed 8-bit unsigned integer467/// Multiplies corresponding pairs of packed 8-bit unsigned integer
...@@ -512,10 +492,9 @@ _mm_hsubs_pi16(__m64 __a, __m64 __b)...@@ -512,10 +492,9 @@ _mm_hsubs_pi16(__m64 __a, __m64 __b)
512/// \a R5 := (\a __a10 * \a __b10) + (\a __a11 * \a __b11) \n492/// \a R5 := (\a __a10 * \a __b10) + (\a __a11 * \a __b11) \n
513/// \a R6 := (\a __a12 * \a __b12) + (\a __a13 * \a __b13) \n493/// \a R6 := (\a __a12 * \a __b12) + (\a __a13 * \a __b13) \n
514/// \a R7 := (\a __a14 * \a __b14) + (\a __a15 * \a __b15)494/// \a R7 := (\a __a14 * \a __b14) + (\a __a15 * \a __b15)
515static __inline__ __m128i __DEFAULT_FN_ATTRS495static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
516_mm_maddubs_epi16(__m128i __a, __m128i __b)496_mm_maddubs_epi16(__m128i __a, __m128i __b) {
517{497 return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b);
518 return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b);
519}498}
520499
521/// Multiplies corresponding pairs of packed 8-bit unsigned integer500/// Multiplies corresponding pairs of packed 8-bit unsigned integer
...@@ -542,11 +521,10 @@ _mm_maddubs_epi16(__m128i __a, __m128i __b)...@@ -542,11 +521,10 @@ _mm_maddubs_epi16(__m128i __a, __m128i __b)
542/// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n521/// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n
543/// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n522/// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n
544/// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7)523/// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7)
545static __inline__ __m64 __DEFAULT_FN_ATTRS524static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
546_mm_maddubs_pi16(__m64 __a, __m64 __b)525_mm_maddubs_pi16(__m64 __a, __m64 __b) {
547{526 return __trunc64(__builtin_ia32_pmaddubsw128((__v16qi)__zext128(__a),
548 return __trunc64(__builtin_ia32_pmaddubsw128((__v16qi)__anyext128(__a),527 (__v16qi)__zext128(__b)));
549 (__v16qi)__anyext128(__b)));
550}528}
551529
552/// Multiplies packed 16-bit signed integer values, truncates the 32-bit530/// Multiplies packed 16-bit signed integer values, truncates the 32-bit
...@@ -563,10 +541,9 @@ _mm_maddubs_pi16(__m64 __a, __m64 __b)...@@ -563,10 +541,9 @@ _mm_maddubs_pi16(__m64 __a, __m64 __b)
563/// A 128-bit vector of [8 x i16] containing one of the source operands.541/// A 128-bit vector of [8 x i16] containing one of the source operands.
564/// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled542/// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled
565/// products of both operands.543/// products of both operands.
566static __inline__ __m128i __DEFAULT_FN_ATTRS544static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
567_mm_mulhrs_epi16(__m128i __a, __m128i __b)545_mm_mulhrs_epi16(__m128i __a, __m128i __b) {
568{546 return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b);
569 return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b);
570}547}
571548
572/// Multiplies packed 16-bit signed integer values, truncates the 32-bit549/// Multiplies packed 16-bit signed integer values, truncates the 32-bit
...@@ -583,11 +560,10 @@ _mm_mulhrs_epi16(__m128i __a, __m128i __b)...@@ -583,11 +560,10 @@ _mm_mulhrs_epi16(__m128i __a, __m128i __b)
583/// A 64-bit vector of [4 x i16] containing one of the source operands.560/// A 64-bit vector of [4 x i16] containing one of the source operands.
584/// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled561/// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled
585/// products of both operands.562/// products of both operands.
586static __inline__ __m64 __DEFAULT_FN_ATTRS563static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
587_mm_mulhrs_pi16(__m64 __a, __m64 __b)564_mm_mulhrs_pi16(__m64 __a, __m64 __b) {
588{565 return __trunc64(__builtin_ia32_pmulhrsw128((__v8hi)__zext128(__a),
589 return __trunc64(__builtin_ia32_pmulhrsw128((__v8hi)__anyext128(__a),566 (__v8hi)__zext128(__b)));
590 (__v8hi)__anyext128(__b)));
591}567}
592568
593/// Copies the 8-bit integers from a 128-bit integer vector to the569/// Copies the 8-bit integers from a 128-bit integer vector to the
...@@ -610,10 +586,9 @@ _mm_mulhrs_pi16(__m64 __a, __m64 __b)...@@ -610,10 +586,9 @@ _mm_mulhrs_pi16(__m64 __a, __m64 __b)
610/// Bits [6:4] Reserved. \n586/// Bits [6:4] Reserved. \n
611/// Bits [3:0] select the source byte to be copied.587/// Bits [3:0] select the source byte to be copied.
612/// \returns A 128-bit integer vector containing the copied or cleared values.588/// \returns A 128-bit integer vector containing the copied or cleared values.
613static __inline__ __m128i __DEFAULT_FN_ATTRS589static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
614_mm_shuffle_epi8(__m128i __a, __m128i __b)590_mm_shuffle_epi8(__m128i __a, __m128i __b) {
615{591 return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b);
616 return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b);
617}592}
618593
619/// Copies the 8-bit integers from a 64-bit integer vector to the594/// Copies the 8-bit integers from a 64-bit integer vector to the
...@@ -635,13 +610,12 @@ _mm_shuffle_epi8(__m128i __a, __m128i __b)...@@ -635,13 +610,12 @@ _mm_shuffle_epi8(__m128i __a, __m128i __b)
635/// destination. \n610/// destination. \n
636/// Bits [2:0] select the source byte to be copied.611/// Bits [2:0] select the source byte to be copied.
637/// \returns A 64-bit integer vector containing the copied or cleared values.612/// \returns A 64-bit integer vector containing the copied or cleared values.
638static __inline__ __m64 __DEFAULT_FN_ATTRS613static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
639_mm_shuffle_pi8(__m64 __a, __m64 __b)614_mm_shuffle_pi8(__m64 __a, __m64 __b) {
640{615 return __trunc64(__builtin_ia32_pshufb128(
641 return __trunc64(__builtin_ia32_pshufb128(616 (__v16qi)__builtin_shufflevector((__v2si)(__a), __extension__(__v2si){},
642 (__v16qi)__builtin_shufflevector(617 0, 1, 0, 1),
643 (__v2si)(__a), __extension__ (__v2si){}, 0, 1, 0, 1),618 (__v16qi)__zext128(__b)));
644 (__v16qi)__anyext128(__b)));
645}619}
646620
647/// For each 8-bit integer in the first source operand, perform one of621/// For each 8-bit integer in the first source operand, perform one of
...@@ -664,10 +638,9 @@ _mm_shuffle_pi8(__m64 __a, __m64 __b)...@@ -664,10 +638,9 @@ _mm_shuffle_pi8(__m64 __a, __m64 __b)
664/// A 128-bit integer vector containing control bytes corresponding to638/// A 128-bit integer vector containing control bytes corresponding to
665/// positions in the destination.639/// positions in the destination.
666/// \returns A 128-bit integer vector containing the resultant values.640/// \returns A 128-bit integer vector containing the resultant values.
667static __inline__ __m128i __DEFAULT_FN_ATTRS641static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
668_mm_sign_epi8(__m128i __a, __m128i __b)642_mm_sign_epi8(__m128i __a, __m128i __b) {
669{643 return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b);
670 return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b);
671}644}
672645
673/// For each 16-bit integer in the first source operand, perform one of646/// For each 16-bit integer in the first source operand, perform one of
...@@ -690,10 +663,9 @@ _mm_sign_epi8(__m128i __a, __m128i __b)...@@ -690,10 +663,9 @@ _mm_sign_epi8(__m128i __a, __m128i __b)
690/// A 128-bit integer vector containing control words corresponding to663/// A 128-bit integer vector containing control words corresponding to
691/// positions in the destination.664/// positions in the destination.
692/// \returns A 128-bit integer vector containing the resultant values.665/// \returns A 128-bit integer vector containing the resultant values.
693static __inline__ __m128i __DEFAULT_FN_ATTRS666static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
694_mm_sign_epi16(__m128i __a, __m128i __b)667_mm_sign_epi16(__m128i __a, __m128i __b) {
695{668 return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b);
696 return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b);
697}669}
698670
699/// For each 32-bit integer in the first source operand, perform one of671/// For each 32-bit integer in the first source operand, perform one of
...@@ -716,10 +688,9 @@ _mm_sign_epi16(__m128i __a, __m128i __b)...@@ -716,10 +688,9 @@ _mm_sign_epi16(__m128i __a, __m128i __b)
716/// A 128-bit integer vector containing control doublewords corresponding to688/// A 128-bit integer vector containing control doublewords corresponding to
717/// positions in the destination.689/// positions in the destination.
718/// \returns A 128-bit integer vector containing the resultant values.690/// \returns A 128-bit integer vector containing the resultant values.
719static __inline__ __m128i __DEFAULT_FN_ATTRS691static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
720_mm_sign_epi32(__m128i __a, __m128i __b)692_mm_sign_epi32(__m128i __a, __m128i __b) {
721{693 return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b);
722 return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b);
723}694}
724695
725/// For each 8-bit integer in the first source operand, perform one of696/// For each 8-bit integer in the first source operand, perform one of
...@@ -742,11 +713,10 @@ _mm_sign_epi32(__m128i __a, __m128i __b)...@@ -742,11 +713,10 @@ _mm_sign_epi32(__m128i __a, __m128i __b)
742/// A 64-bit integer vector containing control bytes corresponding to713/// A 64-bit integer vector containing control bytes corresponding to
743/// positions in the destination.714/// positions in the destination.
744/// \returns A 64-bit integer vector containing the resultant values.715/// \returns A 64-bit integer vector containing the resultant values.
745static __inline__ __m64 __DEFAULT_FN_ATTRS716static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sign_pi8(__m64 __a,
746_mm_sign_pi8(__m64 __a, __m64 __b)717 __m64 __b) {
747{718 return __trunc64(__builtin_ia32_psignb128((__v16qi)__zext128(__a),
748 return __trunc64(__builtin_ia32_psignb128((__v16qi)__anyext128(__a),719 (__v16qi)__zext128(__b)));
749 (__v16qi)__anyext128(__b)));
750}720}
751721
752/// For each 16-bit integer in the first source operand, perform one of722/// For each 16-bit integer in the first source operand, perform one of
...@@ -769,11 +739,10 @@ _mm_sign_pi8(__m64 __a, __m64 __b)...@@ -769,11 +739,10 @@ _mm_sign_pi8(__m64 __a, __m64 __b)
769/// A 64-bit integer vector containing control words corresponding to739/// A 64-bit integer vector containing control words corresponding to
770/// positions in the destination.740/// positions in the destination.
771/// \returns A 64-bit integer vector containing the resultant values.741/// \returns A 64-bit integer vector containing the resultant values.
772static __inline__ __m64 __DEFAULT_FN_ATTRS742static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sign_pi16(__m64 __a,
773_mm_sign_pi16(__m64 __a, __m64 __b)743 __m64 __b) {
774{744 return __trunc64(
775 return __trunc64(__builtin_ia32_psignw128((__v8hi)__anyext128(__a),745 __builtin_ia32_psignw128((__v8hi)__zext128(__a), (__v8hi)__zext128(__b)));
776 (__v8hi)__anyext128(__b)));
777}746}
778747
779/// For each 32-bit integer in the first source operand, perform one of748/// For each 32-bit integer in the first source operand, perform one of
...@@ -796,15 +765,15 @@ _mm_sign_pi16(__m64 __a, __m64 __b)...@@ -796,15 +765,15 @@ _mm_sign_pi16(__m64 __a, __m64 __b)
796/// A 64-bit integer vector containing two control doublewords corresponding765/// A 64-bit integer vector containing two control doublewords corresponding
797/// to positions in the destination.766/// to positions in the destination.
798/// \returns A 64-bit integer vector containing the resultant values.767/// \returns A 64-bit integer vector containing the resultant values.
799static __inline__ __m64 __DEFAULT_FN_ATTRS768static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sign_pi32(__m64 __a,
800_mm_sign_pi32(__m64 __a, __m64 __b)769 __m64 __b) {
801{770 return __trunc64(
802 return __trunc64(__builtin_ia32_psignd128((__v4si)__anyext128(__a),771 __builtin_ia32_psignd128((__v4si)__zext128(__a), (__v4si)__zext128(__b)));
803 (__v4si)__anyext128(__b)));
804}772}
805773
806#undef __anyext128774#undef __zext128
807#undef __trunc64775#undef __trunc64
808#undef __DEFAULT_FN_ATTRS776#undef __DEFAULT_FN_ATTRS
777#undef __DEFAULT_FN_ATTRS_CONSTEXPR
809778
810#endif /* __TMMINTRIN_H */779#endif /* __TMMINTRIN_H */
lib/include/vaesintrin.h+1-2
...@@ -19,8 +19,7 @@...@@ -19,8 +19,7 @@
1919
20/* Default attributes for ZMM forms. */20/* Default attributes for ZMM forms. */
21#define __DEFAULT_FN_ATTRS_F \21#define __DEFAULT_FN_ATTRS_F \
22 __attribute__((__always_inline__, __nodebug__, \22 __attribute__((__always_inline__, __nodebug__, __target__("avx512f,vaes"), \
23 __target__("avx512f,evex512,vaes"), \
24 __min_vector_width__(512)))23 __min_vector_width__(512)))
2524
26static __inline__ __m256i __DEFAULT_FN_ATTRS25static __inline__ __m256i __DEFAULT_FN_ATTRS
lib/include/xmmintrin.h+44-70
...@@ -16,7 +16,6 @@...@@ -16,7 +16,6 @@
1616
17#include <mmintrin.h>17#include <mmintrin.h>
1818
19typedef int __v4si __attribute__((__vector_size__(16)));
20typedef float __v4sf __attribute__((__vector_size__(16)));19typedef float __v4sf __attribute__((__vector_size__(16)));
21typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16)));20typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16)));
2221
...@@ -24,6 +23,8 @@ typedef float __m128_u __attribute__((__vector_size__(16), __aligned__(1)));...@@ -24,6 +23,8 @@ typedef float __m128_u __attribute__((__vector_size__(16), __aligned__(1)));
2423
25/* Unsigned types */24/* Unsigned types */
26typedef unsigned int __v4su __attribute__((__vector_size__(16)));25typedef unsigned int __v4su __attribute__((__vector_size__(16)));
26typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
27typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
2728
28/* This header should only be included in a hosted environment as it depends on29/* This header should only be included in a hosted environment as it depends on
29 * a standard library to provide allocation routines. */30 * a standard library to provide allocation routines. */
...@@ -32,21 +33,12 @@ typedef unsigned int __v4su __attribute__((__vector_size__(16)));...@@ -32,21 +33,12 @@ typedef unsigned int __v4su __attribute__((__vector_size__(16)));
32#endif33#endif
3334
34/* Define the default attributes for the functions in this file. */35/* Define the default attributes for the functions in this file. */
35#if defined(__EVEX512__) && !defined(__AVX10_1_512__)
36#define __DEFAULT_FN_ATTRS \
37 __attribute__((__always_inline__, __nodebug__, __target__("sse,no-evex512"), \
38 __min_vector_width__(128)))
39#define __DEFAULT_FN_ATTRS_SSE2 \
40 __attribute__((__always_inline__, __nodebug__, \
41 __target__("sse2,no-evex512"), __min_vector_width__(128)))
42#else
43#define __DEFAULT_FN_ATTRS \36#define __DEFAULT_FN_ATTRS \
44 __attribute__((__always_inline__, __nodebug__, __target__("sse"), \37 __attribute__((__always_inline__, __nodebug__, __target__("sse"), \
45 __min_vector_width__(128)))38 __min_vector_width__(128)))
46#define __DEFAULT_FN_ATTRS_SSE2 \39#define __DEFAULT_FN_ATTRS_SSE2 \
47 __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \40 __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \
48 __min_vector_width__(128)))41 __min_vector_width__(128)))
49#endif
5042
51#if defined(__cplusplus) && (__cplusplus >= 201103L)43#if defined(__cplusplus) && (__cplusplus >= 201103L)
52#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr44#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
...@@ -239,10 +231,9 @@ _mm_div_ps(__m128 __a, __m128 __b) {...@@ -239,10 +231,9 @@ _mm_div_ps(__m128 __a, __m128 __b) {
239/// used in the calculation.231/// used in the calculation.
240/// \returns A 128-bit vector of [4 x float] containing the square root of the232/// \returns A 128-bit vector of [4 x float] containing the square root of the
241/// value in the low-order bits of the operand.233/// value in the low-order bits of the operand.
242static __inline__ __m128 __DEFAULT_FN_ATTRS234static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_sqrt_ss(__m128 __a) {
243_mm_sqrt_ss(__m128 __a)235 __a[0] = __builtin_elementwise_sqrt(__a[0]);
244{236 return __a;
245 return (__m128)__builtin_ia32_sqrtss((__v4sf)__a);
246}237}
247238
248/// Calculates the square roots of the values stored in a 128-bit vector239/// Calculates the square roots of the values stored in a 128-bit vector
...@@ -256,10 +247,8 @@ _mm_sqrt_ss(__m128 __a)...@@ -256,10 +247,8 @@ _mm_sqrt_ss(__m128 __a)
256/// A 128-bit vector of [4 x float].247/// A 128-bit vector of [4 x float].
257/// \returns A 128-bit vector of [4 x float] containing the square roots of the248/// \returns A 128-bit vector of [4 x float] containing the square roots of the
258/// values in the operand.249/// values in the operand.
259static __inline__ __m128 __DEFAULT_FN_ATTRS250static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_sqrt_ps(__m128 __a) {
260_mm_sqrt_ps(__m128 __a)251 return __builtin_elementwise_sqrt(__a);
261{
262 return __builtin_ia32_sqrtps((__v4sf)__a);
263}252}
264253
265/// Calculates the approximate reciprocal of the value stored in the254/// Calculates the approximate reciprocal of the value stored in the
...@@ -352,9 +341,7 @@ _mm_rsqrt_ps(__m128 __a)...@@ -352,9 +341,7 @@ _mm_rsqrt_ps(__m128 __a)
352/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the341/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
353/// minimum value between both operands. The upper 96 bits are copied from342/// minimum value between both operands. The upper 96 bits are copied from
354/// the upper 96 bits of the first source operand.343/// the upper 96 bits of the first source operand.
355static __inline__ __m128 __DEFAULT_FN_ATTRS344static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_min_ss(__m128 __a, __m128 __b) {
356_mm_min_ss(__m128 __a, __m128 __b)
357{
358 return __builtin_ia32_minss((__v4sf)__a, (__v4sf)__b);345 return __builtin_ia32_minss((__v4sf)__a, (__v4sf)__b);
359}346}
360347
...@@ -373,9 +360,8 @@ _mm_min_ss(__m128 __a, __m128 __b)...@@ -373,9 +360,8 @@ _mm_min_ss(__m128 __a, __m128 __b)
373/// A 128-bit vector of [4 x float] containing one of the operands.360/// A 128-bit vector of [4 x float] containing one of the operands.
374/// \returns A 128-bit vector of [4 x float] containing the minimum values361/// \returns A 128-bit vector of [4 x float] containing the minimum values
375/// between both operands.362/// between both operands.
376static __inline__ __m128 __DEFAULT_FN_ATTRS363static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_ps(__m128 __a,
377_mm_min_ps(__m128 __a, __m128 __b)364 __m128 __b) {
378{
379 return __builtin_ia32_minps((__v4sf)__a, (__v4sf)__b);365 return __builtin_ia32_minps((__v4sf)__a, (__v4sf)__b);
380}366}
381367
...@@ -398,9 +384,7 @@ _mm_min_ps(__m128 __a, __m128 __b)...@@ -398,9 +384,7 @@ _mm_min_ps(__m128 __a, __m128 __b)
398/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the384/// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
399/// maximum value between both operands. The upper 96 bits are copied from385/// maximum value between both operands. The upper 96 bits are copied from
400/// the upper 96 bits of the first source operand.386/// the upper 96 bits of the first source operand.
401static __inline__ __m128 __DEFAULT_FN_ATTRS387static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_max_ss(__m128 __a, __m128 __b) {
402_mm_max_ss(__m128 __a, __m128 __b)
403{
404 return __builtin_ia32_maxss((__v4sf)__a, (__v4sf)__b);388 return __builtin_ia32_maxss((__v4sf)__a, (__v4sf)__b);
405}389}
406390
...@@ -419,9 +403,8 @@ _mm_max_ss(__m128 __a, __m128 __b)...@@ -419,9 +403,8 @@ _mm_max_ss(__m128 __a, __m128 __b)
419/// A 128-bit vector of [4 x float] containing one of the operands.403/// A 128-bit vector of [4 x float] containing one of the operands.
420/// \returns A 128-bit vector of [4 x float] containing the maximum values404/// \returns A 128-bit vector of [4 x float] containing the maximum values
421/// between both operands.405/// between both operands.
422static __inline__ __m128 __DEFAULT_FN_ATTRS406static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_ps(__m128 __a,
423_mm_max_ps(__m128 __a, __m128 __b)407 __m128 __b) {
424{
425 return __builtin_ia32_maxps((__v4sf)__a, (__v4sf)__b);408 return __builtin_ia32_maxps((__v4sf)__a, (__v4sf)__b);
426}409}
427410
...@@ -1688,7 +1671,7 @@ _mm_cvtsi64_ss(__m128 __a, long long __b) {...@@ -1688,7 +1671,7 @@ _mm_cvtsi64_ss(__m128 __a, long long __b) {
1688/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the1671/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1689/// converted value of the second operand. The upper 64 bits are copied from1672/// converted value of the second operand. The upper 64 bits are copied from
1690/// the upper 64 bits of the first operand.1673/// the upper 64 bits of the first operand.
1691static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE21674static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
1692_mm_cvtpi32_ps(__m128 __a, __m64 __b)1675_mm_cvtpi32_ps(__m128 __a, __m64 __b)
1693{1676{
1694 return (__m128)__builtin_shufflevector(1677 return (__m128)__builtin_shufflevector(
...@@ -1714,7 +1697,7 @@ _mm_cvtpi32_ps(__m128 __a, __m64 __b)...@@ -1714,7 +1697,7 @@ _mm_cvtpi32_ps(__m128 __a, __m64 __b)
1714/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the1697/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1715/// converted value from the second operand. The upper 64 bits are copied1698/// converted value from the second operand. The upper 64 bits are copied
1716/// from the upper 64 bits of the first operand.1699/// from the upper 64 bits of the first operand.
1717static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE21700static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
1718_mm_cvt_pi2ps(__m128 __a, __m64 __b)1701_mm_cvt_pi2ps(__m128 __a, __m64 __b)
1719{1702{
1720 return _mm_cvtpi32_ps(__a, __b);1703 return _mm_cvtpi32_ps(__a, __b);
...@@ -2353,9 +2336,8 @@ void _mm_sfence(void);...@@ -2353,9 +2336,8 @@ void _mm_sfence(void);
2353/// \param __b2336/// \param __b
2354/// A 64-bit integer vector containing one of the source operands.2337/// A 64-bit integer vector containing one of the source operands.
2355/// \returns A 64-bit integer vector containing the comparison results.2338/// \returns A 64-bit integer vector containing the comparison results.
2356static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE22339static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2357_mm_max_pi16(__m64 __a, __m64 __b)2340_mm_max_pi16(__m64 __a, __m64 __b) {
2358{
2359 return (__m64)__builtin_elementwise_max((__v4hi)__a, (__v4hi)__b);2341 return (__m64)__builtin_elementwise_max((__v4hi)__a, (__v4hi)__b);
2360}2342}
23612343
...@@ -2372,9 +2354,8 @@ _mm_max_pi16(__m64 __a, __m64 __b)...@@ -2372,9 +2354,8 @@ _mm_max_pi16(__m64 __a, __m64 __b)
2372/// \param __b2354/// \param __b
2373/// A 64-bit integer vector containing one of the source operands.2355/// A 64-bit integer vector containing one of the source operands.
2374/// \returns A 64-bit integer vector containing the comparison results.2356/// \returns A 64-bit integer vector containing the comparison results.
2375static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE22357static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2376_mm_max_pu8(__m64 __a, __m64 __b)2358_mm_max_pu8(__m64 __a, __m64 __b) {
2377{
2378 return (__m64)__builtin_elementwise_max((__v8qu)__a, (__v8qu)__b);2359 return (__m64)__builtin_elementwise_max((__v8qu)__a, (__v8qu)__b);
2379}2360}
23802361
...@@ -2391,9 +2372,8 @@ _mm_max_pu8(__m64 __a, __m64 __b)...@@ -2391,9 +2372,8 @@ _mm_max_pu8(__m64 __a, __m64 __b)
2391/// \param __b2372/// \param __b
2392/// A 64-bit integer vector containing one of the source operands.2373/// A 64-bit integer vector containing one of the source operands.
2393/// \returns A 64-bit integer vector containing the comparison results.2374/// \returns A 64-bit integer vector containing the comparison results.
2394static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE22375static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2395_mm_min_pi16(__m64 __a, __m64 __b)2376_mm_min_pi16(__m64 __a, __m64 __b) {
2396{
2397 return (__m64)__builtin_elementwise_min((__v4hi)__a, (__v4hi)__b);2377 return (__m64)__builtin_elementwise_min((__v4hi)__a, (__v4hi)__b);
2398}2378}
23992379
...@@ -2410,9 +2390,8 @@ _mm_min_pi16(__m64 __a, __m64 __b)...@@ -2410,9 +2390,8 @@ _mm_min_pi16(__m64 __a, __m64 __b)
2410/// \param __b2390/// \param __b
2411/// A 64-bit integer vector containing one of the source operands.2391/// A 64-bit integer vector containing one of the source operands.
2412/// \returns A 64-bit integer vector containing the comparison results.2392/// \returns A 64-bit integer vector containing the comparison results.
2413static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE22393static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2414_mm_min_pu8(__m64 __a, __m64 __b)2394_mm_min_pu8(__m64 __a, __m64 __b) {
2415{
2416 return (__m64)__builtin_elementwise_min((__v8qu)__a, (__v8qu)__b);2395 return (__m64)__builtin_elementwise_min((__v8qu)__a, (__v8qu)__b);
2417}2396}
24182397
...@@ -2428,9 +2407,8 @@ _mm_min_pu8(__m64 __a, __m64 __b)...@@ -2428,9 +2407,8 @@ _mm_min_pu8(__m64 __a, __m64 __b)
2428/// A 64-bit integer vector containing the values with bits to be extracted.2407/// A 64-bit integer vector containing the values with bits to be extracted.
2429/// \returns The most significant bit from each 8-bit element in \a __a,2408/// \returns The most significant bit from each 8-bit element in \a __a,
2430/// written to bits [7:0].2409/// written to bits [7:0].
2431static __inline__ int __DEFAULT_FN_ATTRS_SSE22410static __inline__ int __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2432_mm_movemask_pi8(__m64 __a)2411_mm_movemask_pi8(__m64 __a) {
2433{
2434 return __builtin_ia32_pmovmskb128((__v16qi)__zext128(__a));2412 return __builtin_ia32_pmovmskb128((__v16qi)__zext128(__a));
2435}2413}
24362414
...@@ -2447,11 +2425,11 @@ _mm_movemask_pi8(__m64 __a)...@@ -2447,11 +2425,11 @@ _mm_movemask_pi8(__m64 __a)
2447/// \param __b2425/// \param __b
2448/// A 64-bit integer vector containing one of the source operands.2426/// A 64-bit integer vector containing one of the source operands.
2449/// \returns A 64-bit integer vector containing the products of both operands.2427/// \returns A 64-bit integer vector containing the products of both operands.
2450static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE22428static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2451_mm_mulhi_pu16(__m64 __a, __m64 __b)2429_mm_mulhi_pu16(__m64 __a, __m64 __b)
2452{2430{
2453 return __trunc64(__builtin_ia32_pmulhuw128((__v8hi)__anyext128(__a),2431 return __trunc64(__builtin_ia32_pmulhuw128((__v8hu)__zext128(__a),
2454 (__v8hi)__anyext128(__b)));2432 (__v8hu)__zext128(__b)));
2455}2433}
24562434
2457/// Shuffles the 4 16-bit integers from a 64-bit integer vector to the2435/// Shuffles the 4 16-bit integers from a 64-bit integer vector to the
...@@ -2530,8 +2508,8 @@ _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p)...@@ -2530,8 +2508,8 @@ _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p)
2530 // If there's a risk of spurious trap due to a 128-bit write, back up the2508 // If there's a risk of spurious trap due to a 128-bit write, back up the
2531 // pointer by 8 bytes and shift values in registers to match.2509 // pointer by 8 bytes and shift values in registers to match.
2532 __p -= 8;2510 __p -= 8;
2533 __d128 = __builtin_ia32_pslldqi128_byteshift((__v2di)__d128, 8);2511 __d128 = (__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)__d128, 8);
2534 __n128 = __builtin_ia32_pslldqi128_byteshift((__v2di)__n128, 8);2512 __n128 = (__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)__n128, 8);
2535 }2513 }
25362514
2537 __builtin_ia32_maskmovdqu((__v16qi)__d128, (__v16qi)__n128, __p);2515 __builtin_ia32_maskmovdqu((__v16qi)__d128, (__v16qi)__n128, __p);
...@@ -2550,11 +2528,10 @@ _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p)...@@ -2550,11 +2528,10 @@ _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p)
2550/// \param __b2528/// \param __b
2551/// A 64-bit integer vector containing one of the source operands.2529/// A 64-bit integer vector containing one of the source operands.
2552/// \returns A 64-bit integer vector containing the averages of both operands.2530/// \returns A 64-bit integer vector containing the averages of both operands.
2553static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE22531static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2554_mm_avg_pu8(__m64 __a, __m64 __b)2532_mm_avg_pu8(__m64 __a, __m64 __b) {
2555{2533 return __trunc64(__builtin_ia32_pavgb128((__v16qu)__zext128(__a),
2556 return __trunc64(__builtin_ia32_pavgb128((__v16qi)__anyext128(__a),2534 (__v16qu)__zext128(__b)));
2557 (__v16qi)__anyext128(__b)));
2558}2535}
25592536
2560/// Computes the rounded averages of the packed unsigned 16-bit integer2537/// Computes the rounded averages of the packed unsigned 16-bit integer
...@@ -2570,11 +2547,10 @@ _mm_avg_pu8(__m64 __a, __m64 __b)...@@ -2570,11 +2547,10 @@ _mm_avg_pu8(__m64 __a, __m64 __b)
2570/// \param __b2547/// \param __b
2571/// A 64-bit integer vector containing one of the source operands.2548/// A 64-bit integer vector containing one of the source operands.
2572/// \returns A 64-bit integer vector containing the averages of both operands.2549/// \returns A 64-bit integer vector containing the averages of both operands.
2573static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE22550static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2574_mm_avg_pu16(__m64 __a, __m64 __b)2551_mm_avg_pu16(__m64 __a, __m64 __b) {
2575{2552 return __trunc64(
2576 return __trunc64(__builtin_ia32_pavgw128((__v8hi)__anyext128(__a),2553 __builtin_ia32_pavgw128((__v8hu)__zext128(__a), (__v8hu)__zext128(__b)));
2577 (__v8hi)__anyext128(__b)));
2578}2554}
25792555
2580/// Subtracts the corresponding 8-bit unsigned integer values of the two2556/// Subtracts the corresponding 8-bit unsigned integer values of the two
...@@ -2873,7 +2849,7 @@ _mm_movelh_ps(__m128 __a, __m128 __b) {...@@ -2873,7 +2849,7 @@ _mm_movelh_ps(__m128 __a, __m128 __b) {
2873/// from the corresponding elements in this operand.2849/// from the corresponding elements in this operand.
2874/// \returns A 128-bit vector of [4 x float] containing the copied and converted2850/// \returns A 128-bit vector of [4 x float] containing the copied and converted
2875/// values from the operand.2851/// values from the operand.
2876static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE22852static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2877_mm_cvtpi16_ps(__m64 __a)2853_mm_cvtpi16_ps(__m64 __a)
2878{2854{
2879 return __builtin_convertvector((__v4hi)__a, __v4sf);2855 return __builtin_convertvector((__v4hi)__a, __v4sf);
...@@ -2891,7 +2867,7 @@ _mm_cvtpi16_ps(__m64 __a)...@@ -2891,7 +2867,7 @@ _mm_cvtpi16_ps(__m64 __a)
2891/// destination are copied from the corresponding elements in this operand.2867/// destination are copied from the corresponding elements in this operand.
2892/// \returns A 128-bit vector of [4 x float] containing the copied and converted2868/// \returns A 128-bit vector of [4 x float] containing the copied and converted
2893/// values from the operand.2869/// values from the operand.
2894static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE22870static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2895_mm_cvtpu16_ps(__m64 __a)2871_mm_cvtpu16_ps(__m64 __a)
2896{2872{
2897 return __builtin_convertvector((__v4hu)__a, __v4sf);2873 return __builtin_convertvector((__v4hu)__a, __v4sf);
...@@ -2909,7 +2885,7 @@ _mm_cvtpu16_ps(__m64 __a)...@@ -2909,7 +2885,7 @@ _mm_cvtpu16_ps(__m64 __a)
2909/// from the corresponding lower 4 elements in this operand.2885/// from the corresponding lower 4 elements in this operand.
2910/// \returns A 128-bit vector of [4 x float] containing the copied and converted2886/// \returns A 128-bit vector of [4 x float] containing the copied and converted
2911/// values from the operand.2887/// values from the operand.
2912static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE22888static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2913_mm_cvtpi8_ps(__m64 __a)2889_mm_cvtpi8_ps(__m64 __a)
2914{2890{
2915 return __builtin_convertvector(2891 return __builtin_convertvector(
...@@ -2930,7 +2906,7 @@ _mm_cvtpi8_ps(__m64 __a)...@@ -2930,7 +2906,7 @@ _mm_cvtpi8_ps(__m64 __a)
2930/// operand.2906/// operand.
2931/// \returns A 128-bit vector of [4 x float] containing the copied and converted2907/// \returns A 128-bit vector of [4 x float] containing the copied and converted
2932/// values from the source operand.2908/// values from the source operand.
2933static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE22909static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2934_mm_cvtpu8_ps(__m64 __a)2910_mm_cvtpu8_ps(__m64 __a)
2935{2911{
2936 return __builtin_convertvector(2912 return __builtin_convertvector(
...@@ -2954,7 +2930,7 @@ _mm_cvtpu8_ps(__m64 __a)...@@ -2954,7 +2930,7 @@ _mm_cvtpu8_ps(__m64 __a)
2954/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the2930/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
2955/// copied and converted values from the first operand. The upper 64 bits2931/// copied and converted values from the first operand. The upper 64 bits
2956/// contain the copied and converted values from the second operand.2932/// contain the copied and converted values from the second operand.
2957static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE22933static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
2958_mm_cvtpi32x2_ps(__m64 __a, __m64 __b)2934_mm_cvtpi32x2_ps(__m64 __a, __m64 __b)
2959{2935{
2960 return __builtin_convertvector(2936 return __builtin_convertvector(
...@@ -3029,9 +3005,7 @@ _mm_cvtps_pi8(__m128 __a)...@@ -3029,9 +3005,7 @@ _mm_cvtps_pi8(__m128 __a)
3029/// \returns A 32-bit integer value. Bits [3:0] contain the sign bits from each3005/// \returns A 32-bit integer value. Bits [3:0] contain the sign bits from each
3030/// single-precision floating-point element of the parameter. Bits [31:4] are3006/// single-precision floating-point element of the parameter. Bits [31:4] are
3031/// set to zero.3007/// set to zero.
3032static __inline__ int __DEFAULT_FN_ATTRS3008static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR _mm_movemask_ps(__m128 __a) {
3033_mm_movemask_ps(__m128 __a)
3034{
3035 return __builtin_ia32_movmskps((__v4sf)__a);3009 return __builtin_ia32_movmskps((__v4sf)__a);
3036}3010}
30373011
lib/include/xopintrin.h+20-10
...@@ -20,6 +20,14 @@...@@ -20,6 +20,14 @@
20#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xop"), __min_vector_width__(128)))20#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xop"), __min_vector_width__(128)))
21#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("xop"), __min_vector_width__(256)))21#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("xop"), __min_vector_width__(256)))
2222
23#if defined(__cplusplus) && (__cplusplus >= 201103L)
24#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
25#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr
26#else
27#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
28#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256
29#endif
30
23static __inline__ __m128i __DEFAULT_FN_ATTRS31static __inline__ __m128i __DEFAULT_FN_ATTRS
24_mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)32_mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
25{33{
...@@ -182,13 +190,13 @@ _mm_hsubq_epi32(__m128i __A)...@@ -182,13 +190,13 @@ _mm_hsubq_epi32(__m128i __A)
182 return (__m128i)__builtin_ia32_vphsubdq((__v4si)__A);190 return (__m128i)__builtin_ia32_vphsubdq((__v4si)__A);
183}191}
184192
185static __inline__ __m128i __DEFAULT_FN_ATTRS193static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
186_mm_cmov_si128(__m128i __A, __m128i __B, __m128i __C)194_mm_cmov_si128(__m128i __A, __m128i __B, __m128i __C)
187{195{
188 return (__m128i)(((__v2du)__A & (__v2du)__C) | ((__v2du)__B & ~(__v2du)__C));196 return (__m128i)(((__v2du)__A & (__v2du)__C) | ((__v2du)__B & ~(__v2du)__C));
189}197}
190198
191static __inline__ __m256i __DEFAULT_FN_ATTRS256199static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
192_mm256_cmov_si256(__m256i __A, __m256i __B, __m256i __C)200_mm256_cmov_si256(__m256i __A, __m256i __B, __m256i __C)
193{201{
194 return (__m256i)(((__v4du)__A & (__v4du)__C) | ((__v4du)__B & ~(__v4du)__C));202 return (__m256i)(((__v4du)__A & (__v4du)__C) | ((__v4du)__B & ~(__v4du)__C));
...@@ -200,28 +208,28 @@ _mm_perm_epi8(__m128i __A, __m128i __B, __m128i __C)...@@ -200,28 +208,28 @@ _mm_perm_epi8(__m128i __A, __m128i __B, __m128i __C)
200 return (__m128i)__builtin_ia32_vpperm((__v16qi)__A, (__v16qi)__B, (__v16qi)__C);208 return (__m128i)__builtin_ia32_vpperm((__v16qi)__A, (__v16qi)__B, (__v16qi)__C);
201}209}
202210
203static __inline__ __m128i __DEFAULT_FN_ATTRS211static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
204_mm_rot_epi8(__m128i __A, __m128i __B)212_mm_rot_epi8(__m128i __A, __m128i __B)
205{213{
206 return (__m128i)__builtin_ia32_vprotb((__v16qi)__A, (__v16qi)__B);214 return (__m128i)__builtin_elementwise_fshl((__v16qu)__A, (__v16qu)__A, (__v16qu)__B);
207}215}
208216
209static __inline__ __m128i __DEFAULT_FN_ATTRS217static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
210_mm_rot_epi16(__m128i __A, __m128i __B)218_mm_rot_epi16(__m128i __A, __m128i __B)
211{219{
212 return (__m128i)__builtin_ia32_vprotw((__v8hi)__A, (__v8hi)__B);220 return (__m128i)__builtin_elementwise_fshl((__v8hu)__A, (__v8hu)__A, (__v8hu)__B);
213}221}
214222
215static __inline__ __m128i __DEFAULT_FN_ATTRS223static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
216_mm_rot_epi32(__m128i __A, __m128i __B)224_mm_rot_epi32(__m128i __A, __m128i __B)
217{225{
218 return (__m128i)__builtin_ia32_vprotd((__v4si)__A, (__v4si)__B);226 return (__m128i)__builtin_elementwise_fshl((__v4su)__A, (__v4su)__A, (__v4su)__B);
219}227}
220228
221static __inline__ __m128i __DEFAULT_FN_ATTRS229static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
222_mm_rot_epi64(__m128i __A, __m128i __B)230_mm_rot_epi64(__m128i __A, __m128i __B)
223{231{
224 return (__m128i)__builtin_ia32_vprotq((__v2di)__A, (__v2di)__B);232 return (__m128i)__builtin_elementwise_fshl((__v2du)__A, (__v2du)__A, (__v2du)__B);
225}233}
226234
227#define _mm_roti_epi8(A, N) \235#define _mm_roti_epi8(A, N) \
...@@ -766,5 +774,7 @@ _mm256_frcz_pd(__m256d __A)...@@ -766,5 +774,7 @@ _mm256_frcz_pd(__m256d __A)
766774
767#undef __DEFAULT_FN_ATTRS775#undef __DEFAULT_FN_ATTRS
768#undef __DEFAULT_FN_ATTRS256776#undef __DEFAULT_FN_ATTRS256
777#undef __DEFAULT_FN_ATTRS_CONSTEXPR
778#undef __DEFAULT_FN_ATTRS256_CONSTEXPR
769779
770#endif /* __XOPINTRIN_H */780#endif /* __XOPINTRIN_H */