| author | |
| committer | |
| log | 520af6966041b891442ab34ac13b0f6861a09fc0 |
| tree | b0b05df2b2bab08eaa841b372985ba8545ec533e |
| parent | 11807110357b6434e4ee2ae8b3b6948ea45caccb |
| signature |
94 files changed, 11869 insertions(+), 12978 deletions(-)
lib/include/__clang_spirv_builtins.h+12-12| ... | ... | @@ -52,30 +52,30 @@ |
| 52 | 52 | // Builtin IDs and sizes |
| 53 | 53 | |
| 54 | 54 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_num_workgroups) __size_t |
| 55 | __spirv_NumWorkgroups(int); | |
| 55 | __spirv_BuiltInNumWorkgroups(int); | |
| 56 | 56 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_workgroup_size) __size_t |
| 57 | __spirv_WorkgroupSize(int); | |
| 57 | __spirv_BuiltInWorkgroupSize(int); | |
| 58 | 58 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_workgroup_id) __size_t |
| 59 | __spirv_WorkgroupId(int); | |
| 59 | __spirv_BuiltInWorkgroupId(int); | |
| 60 | 60 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_local_invocation_id) __size_t |
| 61 | __spirv_LocalInvocationId(int); | |
| 61 | __spirv_BuiltInLocalInvocationId(int); | |
| 62 | 62 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_invocation_id) __size_t |
| 63 | __spirv_GlobalInvocationId(int); | |
| 63 | __spirv_BuiltInGlobalInvocationId(int); | |
| 64 | 64 | |
| 65 | 65 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_size) __size_t |
| 66 | __spirv_GlobalSize(int); | |
| 66 | __spirv_BuiltInGlobalSize(int); | |
| 67 | 67 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_global_offset) __size_t |
| 68 | __spirv_GlobalOffset(int); | |
| 68 | __spirv_BuiltInGlobalOffset(int); | |
| 69 | 69 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_size) __uint32_t |
| 70 | __spirv_SubgroupSize(); | |
| 70 | __spirv_BuiltInSubgroupSize(); | |
| 71 | 71 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_max_size) __uint32_t |
| 72 | __spirv_SubgroupMaxSize(); | |
| 72 | __spirv_BuiltInSubgroupMaxSize(); | |
| 73 | 73 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_num_subgroups) __uint32_t |
| 74 | __spirv_NumSubgroups(); | |
| 74 | __spirv_BuiltInNumSubgroups(); | |
| 75 | 75 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_id) __uint32_t |
| 76 | __spirv_SubgroupId(); | |
| 76 | __spirv_BuiltInSubgroupId(); | |
| 77 | 77 | extern __SPIRV_BUILTIN_ALIAS(__builtin_spirv_subgroup_local_invocation_id) |
| 78 | __uint32_t __spirv_SubgroupLocalInvocationId(); | |
| 78 | __uint32_t __spirv_BuiltInSubgroupLocalInvocationId(); | |
| 79 | 79 | |
| 80 | 80 | // OpGenericCastToPtrExplicit |
| 81 | 81 |
lib/include/__float_float.h created+176| ... | ... | @@ -0,0 +1,176 @@ |
| 1 | /*===---- __float_float.h --------------------------------------------------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===-----------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __CLANG_FLOAT_FLOAT_H | |
| 11 | #define __CLANG_FLOAT_FLOAT_H | |
| 12 | ||
| 13 | #if (defined(__MINGW32__) || defined(_MSC_VER) || defined(_AIX)) && \ | |
| 14 | __STDC_HOSTED__ | |
| 15 | ||
| 16 | /* Undefine anything that we'll be redefining below. */ | |
| 17 | # undef FLT_EVAL_METHOD | |
| 18 | # undef FLT_ROUNDS | |
| 19 | # undef FLT_RADIX | |
| 20 | # undef FLT_MANT_DIG | |
| 21 | # undef DBL_MANT_DIG | |
| 22 | # undef LDBL_MANT_DIG | |
| 23 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ | |
| 24 | !defined(__STRICT_ANSI__) || \ | |
| 25 | (defined(__cplusplus) && __cplusplus >= 201103L) || \ | |
| 26 | (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) | |
| 27 | # undef DECIMAL_DIG | |
| 28 | # endif | |
| 29 | # undef FLT_DIG | |
| 30 | # undef DBL_DIG | |
| 31 | # undef LDBL_DIG | |
| 32 | # undef FLT_MIN_EXP | |
| 33 | # undef DBL_MIN_EXP | |
| 34 | # undef LDBL_MIN_EXP | |
| 35 | # undef FLT_MIN_10_EXP | |
| 36 | # undef DBL_MIN_10_EXP | |
| 37 | # undef LDBL_MIN_10_EXP | |
| 38 | # undef FLT_MAX_EXP | |
| 39 | # undef DBL_MAX_EXP | |
| 40 | # undef LDBL_MAX_EXP | |
| 41 | # undef FLT_MAX_10_EXP | |
| 42 | # undef DBL_MAX_10_EXP | |
| 43 | # undef LDBL_MAX_10_EXP | |
| 44 | # undef FLT_MAX | |
| 45 | # undef DBL_MAX | |
| 46 | # undef LDBL_MAX | |
| 47 | # undef FLT_EPSILON | |
| 48 | # undef DBL_EPSILON | |
| 49 | # undef LDBL_EPSILON | |
| 50 | # undef FLT_MIN | |
| 51 | # undef DBL_MIN | |
| 52 | # undef LDBL_MIN | |
| 53 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \ | |
| 54 | !defined(__STRICT_ANSI__) || \ | |
| 55 | (defined(__cplusplus) && __cplusplus >= 201703L) || \ | |
| 56 | (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) | |
| 57 | # undef FLT_TRUE_MIN | |
| 58 | # undef DBL_TRUE_MIN | |
| 59 | # undef LDBL_TRUE_MIN | |
| 60 | # undef FLT_DECIMAL_DIG | |
| 61 | # undef DBL_DECIMAL_DIG | |
| 62 | # undef LDBL_DECIMAL_DIG | |
| 63 | # undef FLT_HAS_SUBNORM | |
| 64 | # undef DBL_HAS_SUBNORM | |
| 65 | # undef LDBL_HAS_SUBNORM | |
| 66 | # endif | |
| 67 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ | |
| 68 | !defined(__STRICT_ANSI__) | |
| 69 | # undef FLT_NORM_MAX | |
| 70 | # undef DBL_NORM_MAX | |
| 71 | # undef LDBL_NORM_MAX | |
| 72 | #endif | |
| 73 | #endif | |
| 74 | ||
| 75 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ | |
| 76 | !defined(__STRICT_ANSI__) | |
| 77 | # undef FLT_SNAN | |
| 78 | # undef DBL_SNAN | |
| 79 | # undef LDBL_SNAN | |
| 80 | #endif | |
| 81 | ||
| 82 | /* Characteristics of floating point types, C99 5.2.4.2.2 */ | |
| 83 | ||
| 84 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ | |
| 85 | (defined(__cplusplus) && __cplusplus >= 201103L) | |
| 86 | #define FLT_EVAL_METHOD __FLT_EVAL_METHOD__ | |
| 87 | #endif | |
| 88 | #define FLT_ROUNDS (__builtin_flt_rounds()) | |
| 89 | #define FLT_RADIX __FLT_RADIX__ | |
| 90 | ||
| 91 | #define FLT_MANT_DIG __FLT_MANT_DIG__ | |
| 92 | #define DBL_MANT_DIG __DBL_MANT_DIG__ | |
| 93 | #define LDBL_MANT_DIG __LDBL_MANT_DIG__ | |
| 94 | ||
| 95 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ | |
| 96 | !defined(__STRICT_ANSI__) || \ | |
| 97 | (defined(__cplusplus) && __cplusplus >= 201103L) || \ | |
| 98 | (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) | |
| 99 | # define DECIMAL_DIG __DECIMAL_DIG__ | |
| 100 | #endif | |
| 101 | ||
| 102 | #define FLT_DIG __FLT_DIG__ | |
| 103 | #define DBL_DIG __DBL_DIG__ | |
| 104 | #define LDBL_DIG __LDBL_DIG__ | |
| 105 | ||
| 106 | #define FLT_MIN_EXP __FLT_MIN_EXP__ | |
| 107 | #define DBL_MIN_EXP __DBL_MIN_EXP__ | |
| 108 | #define LDBL_MIN_EXP __LDBL_MIN_EXP__ | |
| 109 | ||
| 110 | #define FLT_MIN_10_EXP __FLT_MIN_10_EXP__ | |
| 111 | #define DBL_MIN_10_EXP __DBL_MIN_10_EXP__ | |
| 112 | #define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__ | |
| 113 | ||
| 114 | #define FLT_MAX_EXP __FLT_MAX_EXP__ | |
| 115 | #define DBL_MAX_EXP __DBL_MAX_EXP__ | |
| 116 | #define LDBL_MAX_EXP __LDBL_MAX_EXP__ | |
| 117 | ||
| 118 | #define FLT_MAX_10_EXP __FLT_MAX_10_EXP__ | |
| 119 | #define DBL_MAX_10_EXP __DBL_MAX_10_EXP__ | |
| 120 | #define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__ | |
| 121 | ||
| 122 | #define FLT_MAX __FLT_MAX__ | |
| 123 | #define DBL_MAX __DBL_MAX__ | |
| 124 | #define LDBL_MAX __LDBL_MAX__ | |
| 125 | ||
| 126 | #define FLT_EPSILON __FLT_EPSILON__ | |
| 127 | #define DBL_EPSILON __DBL_EPSILON__ | |
| 128 | #define LDBL_EPSILON __LDBL_EPSILON__ | |
| 129 | ||
| 130 | #define FLT_MIN __FLT_MIN__ | |
| 131 | #define DBL_MIN __DBL_MIN__ | |
| 132 | #define LDBL_MIN __LDBL_MIN__ | |
| 133 | ||
| 134 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \ | |
| 135 | !defined(__STRICT_ANSI__) || \ | |
| 136 | (defined(__cplusplus) && __cplusplus >= 201703L) || \ | |
| 137 | (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) | |
| 138 | # define FLT_TRUE_MIN __FLT_DENORM_MIN__ | |
| 139 | # define DBL_TRUE_MIN __DBL_DENORM_MIN__ | |
| 140 | # define LDBL_TRUE_MIN __LDBL_DENORM_MIN__ | |
| 141 | # define FLT_DECIMAL_DIG __FLT_DECIMAL_DIG__ | |
| 142 | # define DBL_DECIMAL_DIG __DBL_DECIMAL_DIG__ | |
| 143 | # define LDBL_DECIMAL_DIG __LDBL_DECIMAL_DIG__ | |
| 144 | # define FLT_HAS_SUBNORM __FLT_HAS_DENORM__ | |
| 145 | # define DBL_HAS_SUBNORM __DBL_HAS_DENORM__ | |
| 146 | # define LDBL_HAS_SUBNORM __LDBL_HAS_DENORM__ | |
| 147 | #endif | |
| 148 | ||
| 149 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ | |
| 150 | !defined(__STRICT_ANSI__) | |
| 151 | /* C23 5.2.5.3.2p28 */ | |
| 152 | # define FLT_SNAN (__builtin_nansf("")) | |
| 153 | # define DBL_SNAN (__builtin_nans("")) | |
| 154 | # define LDBL_SNAN (__builtin_nansl("")) | |
| 155 | ||
| 156 | /* C23 5.2.5.3.3p32 */ | |
| 157 | # define FLT_NORM_MAX __FLT_NORM_MAX__ | |
| 158 | # define DBL_NORM_MAX __DBL_NORM_MAX__ | |
| 159 | # define LDBL_NORM_MAX __LDBL_NORM_MAX__ | |
| 160 | #endif | |
| 161 | ||
| 162 | #ifdef __STDC_WANT_IEC_60559_TYPES_EXT__ | |
| 163 | # define FLT16_MANT_DIG __FLT16_MANT_DIG__ | |
| 164 | # define FLT16_DECIMAL_DIG __FLT16_DECIMAL_DIG__ | |
| 165 | # define FLT16_DIG __FLT16_DIG__ | |
| 166 | # define FLT16_MIN_EXP __FLT16_MIN_EXP__ | |
| 167 | # define FLT16_MIN_10_EXP __FLT16_MIN_10_EXP__ | |
| 168 | # define FLT16_MAX_EXP __FLT16_MAX_EXP__ | |
| 169 | # define FLT16_MAX_10_EXP __FLT16_MAX_10_EXP__ | |
| 170 | # define FLT16_MAX __FLT16_MAX__ | |
| 171 | # define FLT16_EPSILON __FLT16_EPSILON__ | |
| 172 | # define FLT16_MIN __FLT16_MIN__ | |
| 173 | # define FLT16_TRUE_MIN __FLT16_TRUE_MIN__ | |
| 174 | #endif /* __STDC_WANT_IEC_60559_TYPES_EXT__ */ | |
| 175 | ||
| 176 | #endif /* __CLANG_FLOAT_FLOAT_H */ |
lib/include/__float_header_macro.h created+12| ... | ... | @@ -0,0 +1,12 @@ |
| 1 | /*===---- __float_header_macro.h -------------------------------------------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===-----------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __CLANG_FLOAT_H | |
| 11 | #define __CLANG_FLOAT_H | |
| 12 | #endif /* __CLANG_FLOAT_H */ |
lib/include/__float_infinity_nan.h created+20| ... | ... | @@ -0,0 +1,20 @@ |
| 1 | /*===---- __float_infinity_nan.h -------------------------------------------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===-----------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __CLANG_FLOAT_INFINITY_NAN_H | |
| 11 | #define __CLANG_FLOAT_INFINITY_NAN_H | |
| 12 | ||
| 13 | /* C23 5.2.5.3.3p29-30 */ | |
| 14 | #undef INFINITY | |
| 15 | #undef NAN | |
| 16 | ||
| 17 | #define INFINITY (__builtin_inff()) | |
| 18 | #define NAN (__builtin_nanf("")) | |
| 19 | ||
| 20 | #endif /* __CLANG_FLOAT_INFINITY_NAN_H */ |
lib/include/amo.h created+131| ... | ... | @@ -0,0 +1,131 @@ |
| 1 | /*===---- amo.h - PowerPC Atomic Memory Operations ------------------------===*\ | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | \*===----------------------------------------------------------------------===*/ | |
| 8 | ||
| 9 | /* This header provides compatibility for GCC's AMO functions. | |
| 10 | * The functions here call Clang's underlying AMO builtins. | |
| 11 | */ | |
| 12 | ||
| 13 | #ifndef _AMO_H | |
| 14 | #define _AMO_H | |
| 15 | ||
| 16 | #include <stdint.h> | |
| 17 | ||
| 18 | #ifdef __cplusplus | |
| 19 | extern "C" { | |
| 20 | #endif | |
| 21 | ||
| 22 | /* AMO Load Operation Codes (FC values) */ | |
| 23 | enum { | |
| 24 | _AMO_LD_ADD = 0x00, /* Fetch and Add */ | |
| 25 | _AMO_LD_XOR = 0x01, /* Fetch and XOR */ | |
| 26 | _AMO_LD_IOR = 0x02, /* Fetch and OR */ | |
| 27 | _AMO_LD_AND = 0x03, /* Fetch and AND */ | |
| 28 | _AMO_LD_UMAX = 0x04, /* Fetch and Maximum Unsigned */ | |
| 29 | _AMO_LD_SMAX = 0x05, /* Fetch and Maximum Signed */ | |
| 30 | _AMO_LD_UMIN = 0x06, /* Fetch and Minimum Unsigned */ | |
| 31 | _AMO_LD_SMIN = 0x07, /* Fetch and Minimum Signed */ | |
| 32 | _AMO_LD_SWAP = 0x08 /* Swap */ | |
| 33 | }; | |
| 34 | ||
| 35 | /* 32-bit unsigned AMO load operations */ | |
| 36 | static inline uint32_t amo_lwat_add(uint32_t *ptr, uint32_t val) { | |
| 37 | return __builtin_amo_lwat(ptr, val, _AMO_LD_ADD); | |
| 38 | } | |
| 39 | ||
| 40 | static inline uint32_t amo_lwat_xor(uint32_t *ptr, uint32_t val) { | |
| 41 | return __builtin_amo_lwat(ptr, val, _AMO_LD_XOR); | |
| 42 | } | |
| 43 | ||
| 44 | static inline uint32_t amo_lwat_ior(uint32_t *ptr, uint32_t val) { | |
| 45 | return __builtin_amo_lwat(ptr, val, _AMO_LD_IOR); | |
| 46 | } | |
| 47 | ||
| 48 | static inline uint32_t amo_lwat_and(uint32_t *ptr, uint32_t val) { | |
| 49 | return __builtin_amo_lwat(ptr, val, _AMO_LD_AND); | |
| 50 | } | |
| 51 | ||
| 52 | static inline uint32_t amo_lwat_umax(uint32_t *ptr, uint32_t val) { | |
| 53 | return __builtin_amo_lwat(ptr, val, _AMO_LD_UMAX); | |
| 54 | } | |
| 55 | ||
| 56 | static inline uint32_t amo_lwat_umin(uint32_t *ptr, uint32_t val) { | |
| 57 | return __builtin_amo_lwat(ptr, val, _AMO_LD_UMIN); | |
| 58 | } | |
| 59 | ||
| 60 | static inline uint32_t amo_lwat_swap(uint32_t *ptr, uint32_t val) { | |
| 61 | return __builtin_amo_lwat(ptr, val, _AMO_LD_SWAP); | |
| 62 | } | |
| 63 | ||
| 64 | /* 32-bit signed AMO load operations */ | |
| 65 | static inline int32_t amo_lwat_sadd(int32_t *ptr, int32_t val) { | |
| 66 | return __builtin_amo_lwat_s(ptr, val, _AMO_LD_ADD); | |
| 67 | } | |
| 68 | ||
| 69 | static inline int32_t amo_lwat_smax(int32_t *ptr, int32_t val) { | |
| 70 | return __builtin_amo_lwat_s(ptr, val, _AMO_LD_SMAX); | |
| 71 | } | |
| 72 | ||
| 73 | static inline int32_t amo_lwat_smin(int32_t *ptr, int32_t val) { | |
| 74 | return __builtin_amo_lwat_s(ptr, val, _AMO_LD_SMIN); | |
| 75 | } | |
| 76 | ||
| 77 | static inline int32_t amo_lwat_sswap(int32_t *ptr, int32_t val) { | |
| 78 | return __builtin_amo_lwat_s(ptr, val, _AMO_LD_SWAP); | |
| 79 | } | |
| 80 | ||
| 81 | /* 64-bit unsigned AMO load operations */ | |
| 82 | static inline uint64_t amo_ldat_add(uint64_t *ptr, uint64_t val) { | |
| 83 | return __builtin_amo_ldat(ptr, val, _AMO_LD_ADD); | |
| 84 | } | |
| 85 | ||
| 86 | static inline uint64_t amo_ldat_xor(uint64_t *ptr, uint64_t val) { | |
| 87 | return __builtin_amo_ldat(ptr, val, _AMO_LD_XOR); | |
| 88 | } | |
| 89 | ||
| 90 | static inline uint64_t amo_ldat_ior(uint64_t *ptr, uint64_t val) { | |
| 91 | return __builtin_amo_ldat(ptr, val, _AMO_LD_IOR); | |
| 92 | } | |
| 93 | ||
| 94 | static inline uint64_t amo_ldat_and(uint64_t *ptr, uint64_t val) { | |
| 95 | return __builtin_amo_ldat(ptr, val, _AMO_LD_AND); | |
| 96 | } | |
| 97 | ||
| 98 | static inline uint64_t amo_ldat_umax(uint64_t *ptr, uint64_t val) { | |
| 99 | return __builtin_amo_ldat(ptr, val, _AMO_LD_UMAX); | |
| 100 | } | |
| 101 | ||
| 102 | static inline uint64_t amo_ldat_umin(uint64_t *ptr, uint64_t val) { | |
| 103 | return __builtin_amo_ldat(ptr, val, _AMO_LD_UMIN); | |
| 104 | } | |
| 105 | ||
| 106 | static inline uint64_t amo_ldat_swap(uint64_t *ptr, uint64_t val) { | |
| 107 | return __builtin_amo_ldat(ptr, val, _AMO_LD_SWAP); | |
| 108 | } | |
| 109 | ||
| 110 | /* 64-bit signed AMO load operations */ | |
| 111 | static inline int64_t amo_ldat_sadd(int64_t *ptr, int64_t val) { | |
| 112 | return __builtin_amo_ldat_s(ptr, val, _AMO_LD_ADD); | |
| 113 | } | |
| 114 | ||
| 115 | static inline int64_t amo_ldat_smax(int64_t *ptr, int64_t val) { | |
| 116 | return __builtin_amo_ldat_s(ptr, val, _AMO_LD_SMAX); | |
| 117 | } | |
| 118 | ||
| 119 | static inline int64_t amo_ldat_smin(int64_t *ptr, int64_t val) { | |
| 120 | return __builtin_amo_ldat_s(ptr, val, _AMO_LD_SMIN); | |
| 121 | } | |
| 122 | ||
| 123 | static inline int64_t amo_ldat_sswap(int64_t *ptr, int64_t val) { | |
| 124 | return __builtin_amo_ldat_s(ptr, val, _AMO_LD_SWAP); | |
| 125 | } | |
| 126 | ||
| 127 | #ifdef __cplusplus | |
| 128 | } | |
| 129 | #endif | |
| 130 | ||
| 131 | #endif /* _AMO_H */ |
lib/include/amxavx512intrin.h+215-1| ... | ... | @@ -16,7 +16,7 @@ |
| 16 | 16 | |
| 17 | 17 | #define __DEFAULT_FN_ATTRS_AVX512 \ |
| 18 | 18 | __attribute__((__always_inline__, __nodebug__, \ |
| 19 | __target__("amx-avx512,avx10.2-512"))) | |
| 19 | __target__("amx-avx512,avx10.2"), __min_vector_width__(512))) | |
| 20 | 20 | |
| 21 | 21 | /// Moves a row from a tile register to a zmm destination register, converting |
| 22 | 22 | /// the int32 source elements to fp32. The row of the tile is selected by a |
| ... | ... | @@ -52,6 +52,40 @@ |
| 52 | 52 | /// The row of the source tile |
| 53 | 53 | #define _tile_cvtrowd2ps(tsrc, row) __builtin_ia32_tcvtrowd2ps(tsrc, row) |
| 54 | 54 | |
| 55 | /// Moves a row from a tile register to a zmm destination register, converting | |
| 56 | /// the int32 source elements to fp32. The row of the tile is selected by a | |
| 57 | /// 8b immediate value. | |
| 58 | /// | |
| 59 | /// \headerfile <x86intrin.h> | |
| 60 | /// | |
| 61 | /// \code | |
| 62 | /// __m512i _tile_cvtrowd2psi(__tile tsrc, const unsigned int imm8); | |
| 63 | /// \endcode | |
| 64 | /// | |
| 65 | /// \code{.operation} | |
| 66 | /// VL := 512 | |
| 67 | /// VL_bytes := VL >> 3 | |
| 68 | /// row_index := imm8 & 0x3f | |
| 69 | /// row_chunk := (imm8 >> 6) * VL_bytes | |
| 70 | /// FOR i := 0 TO (VL_bytes / 4) - 1 | |
| 71 | /// IF i + row_chunk / 4 >= tsrc.colsb / 4 | |
| 72 | /// dst.dword[i] := 0 | |
| 73 | /// ELSE | |
| 74 | /// dst.f32[i] := CONVERT_INT32_TO_FP32(tsrc.row[row_index].dword[row_chunk/4+i], RNE) | |
| 75 | /// FI | |
| 76 | /// ENDFOR | |
| 77 | /// dst[MAX_VL-1:VL] := 0 | |
| 78 | /// zero_tileconfig_start() | |
| 79 | /// \endcode | |
| 80 | /// | |
| 81 | /// This intrinsic corresponds to the \c TCVTROWD2PS instruction. | |
| 82 | /// | |
| 83 | /// \param tsrc | |
| 84 | /// The source tile. Max size is 1024 Bytes. | |
| 85 | /// \param imm8 | |
| 86 | /// The row of the source tile | |
| 87 | #define _tile_cvtrowd2psi(tsrc, imm8) __builtin_ia32_tcvtrowd2psi(tsrc, imm8) | |
| 88 | ||
| 55 | 89 | /// Moves a row from a tile register to a zmm destination register, converting |
| 56 | 90 | /// the fp32 source elements to bf16. It places the resulting bf16 elements |
| 57 | 91 | /// in the high 16 bits within each dword. The row of the tile is selected |
| ... | ... | @@ -89,6 +123,43 @@ |
| 89 | 123 | #define _tile_cvtrowps2bf16h(tsrc, row) \ |
| 90 | 124 | __builtin_ia32_tcvtrowps2bf16h(tsrc, row) |
| 91 | 125 | |
| 126 | /// Moves a row from a tile register to a zmm destination register, converting | |
| 127 | /// the fp32 source elements to bf16. It places the resulting bf16 elements | |
| 128 | /// in the high 16 bits within each dword. The row of the tile is selected | |
| 129 | /// by a 8b immediate value. | |
| 130 | /// | |
| 131 | /// \headerfile <x86intrin.h> | |
| 132 | /// | |
| 133 | /// \code | |
| 134 | /// __m512i _tile_cvtrowps2bf16hi(__tile tsrc, const unsigned int imm8); | |
| 135 | /// \endcode | |
| 136 | /// | |
| 137 | /// \code{.operation} | |
| 138 | /// VL := 512 | |
| 139 | /// VL_bytes := VL >> 3 | |
| 140 | /// row_index := imm8 & 0x3f | |
| 141 | /// row_chunk := (imm8 >> 6) * VL_bytes | |
| 142 | /// FOR i := 0 TO (VL_bytes / 4) - 1 | |
| 143 | /// IF i + row_chunk / 4 >= tsrc.colsb / 4 | |
| 144 | /// dst.dword[i] := 0 | |
| 145 | /// ELSE | |
| 146 | /// dst.word[2*i+0] := 0 | |
| 147 | /// dst.bf16[2*i+1] := CONVERT_FP32_TO_BF16(tsrc.row[row_index].fp32[row_chunk/4+i], RNE) | |
| 148 | /// FI | |
| 149 | /// ENDFOR | |
| 150 | /// dst[MAX_VL-1:VL] := 0 | |
| 151 | /// zero_tileconfig_start() | |
| 152 | /// \endcode | |
| 153 | /// | |
| 154 | /// This intrinsic corresponds to the \c TCVTROWPS2BF16H instruction. | |
| 155 | /// | |
| 156 | /// \param tsrc | |
| 157 | /// The source tile. Max size is 1024 Bytes. | |
| 158 | /// \param imm8 | |
| 159 | /// The the row of the source tile. | |
| 160 | #define _tile_cvtrowps2bf16hi(tsrc, imm8) \ | |
| 161 | __builtin_ia32_tcvtrowps2bf16hi(tsrc, imm8) | |
| 162 | ||
| 92 | 163 | /// Moves a row from a tile register to a zmm destination register, converting |
| 93 | 164 | /// the fp32 source elements to bf16. It places the resulting bf16 elements |
| 94 | 165 | /// in the low 16 bits within each dword. The row of the tile is selected |
| ... | ... | @@ -126,6 +197,43 @@ |
| 126 | 197 | #define _tile_cvtrowps2bf16l(tsrc, row) \ |
| 127 | 198 | __builtin_ia32_tcvtrowps2bf16l(tsrc, row) |
| 128 | 199 | |
| 200 | /// Moves a row from a tile register to a zmm destination register, converting | |
| 201 | /// the fp32 source elements to bf16. It places the resulting bf16 elements | |
| 202 | /// in the low 16 bits within each dword. The row of the tile is selected | |
| 203 | /// by a 8b immediate value. | |
| 204 | /// | |
| 205 | /// \headerfile <x86intrin.h> | |
| 206 | /// | |
| 207 | /// \code | |
| 208 | /// __m512i _tile_cvtrowps2bf16li(__tile tsrc, const unsigned int imm8); | |
| 209 | /// \endcode | |
| 210 | /// | |
| 211 | /// \code{.operation} | |
| 212 | /// VL := 512 | |
| 213 | /// VL_bytes := VL >> 3 | |
| 214 | /// row_index := imm8 & 0x3f | |
| 215 | /// row_chunk := (imm8 >> 6) * VL_bytes | |
| 216 | /// FOR i := 0 TO (VL_bytes / 4) - 1 | |
| 217 | /// IF i + row_chunk / 4 >= tsrc.colsb / 4 | |
| 218 | /// dst.dword[i] := 0 | |
| 219 | /// ELSE | |
| 220 | /// dst.word[2*i+1] := 0 | |
| 221 | /// dst.bf16[2*i+0] := CONVERT_FP32_TO_BF16(tsrc.row[row_index].fp32[row_chunk/4+i], RNE) | |
| 222 | /// FI | |
| 223 | /// ENDFOR | |
| 224 | /// dst[MAX_VL-1:VL] := 0 | |
| 225 | /// zero_tileconfig_start() | |
| 226 | /// \endcode | |
| 227 | /// | |
| 228 | /// This intrinsic corresponds to the \c TCVTROWPS2BF16L instruction. | |
| 229 | /// | |
| 230 | /// \param tsrc | |
| 231 | /// The source tile. Max size is 1024 Bytes. | |
| 232 | /// \param imm8 | |
| 233 | /// The the row of the source tile. | |
| 234 | #define _tile_cvtrowps2bf16li(tsrc, imm8) \ | |
| 235 | __builtin_ia32_tcvtrowps2bf16li(tsrc, imm8) | |
| 236 | ||
| 129 | 237 | /// Moves a row from a tile register to a zmm destination register, converting |
| 130 | 238 | /// the fp32 source elements to fp16. It places the resulting fp16 elements |
| 131 | 239 | /// in the high 16 bits within each dword. The row of the tile is selected |
| ... | ... | @@ -162,6 +270,43 @@ |
| 162 | 270 | /// The the row of the source tile. |
| 163 | 271 | #define _tile_cvtrowps2phh(tsrc, row) __builtin_ia32_tcvtrowps2phh(tsrc, row) |
| 164 | 272 | |
| 273 | /// Moves a row from a tile register to a zmm destination register, converting | |
| 274 | /// the fp32 source elements to fp16. It places the resulting fp16 elements | |
| 275 | /// in the high 16 bits within each dword. The row of the tile is selected | |
| 276 | /// by a 8b immediate value. | |
| 277 | /// | |
| 278 | /// \headerfile <x86intrin.h> | |
| 279 | /// | |
| 280 | /// \code | |
| 281 | /// __m512i _tile_cvtrowps2phhi(__tile tsrc, constunsigned int imm8); | |
| 282 | /// \endcode | |
| 283 | /// | |
| 284 | /// \code{.operation} | |
| 285 | /// VL := 512 | |
| 286 | /// VL_bytes := VL >> 3 | |
| 287 | /// row_index := imm8 & 0x3f | |
| 288 | /// row_chunk := (imm8 >> 6) * VL_bytes | |
| 289 | /// FOR i := 0 TO (VL_bytes / 4) - 1 | |
| 290 | /// IF i + row_chunk / 4 >= tsrc.colsb / 4 | |
| 291 | /// dst.dword[i] := 0 | |
| 292 | /// ELSE | |
| 293 | /// dst.word[2*i+0] := 0 | |
| 294 | /// dst.fp16[2*i+1] := CONVERT_FP32_TO_FP16(tsrc.row[row_index].fp32[row_chunk/4+i], RNE) | |
| 295 | /// FI | |
| 296 | /// ENDFOR | |
| 297 | /// dst[MAX_VL-1:VL] := 0 | |
| 298 | /// zero_tileconfig_start() | |
| 299 | /// \endcode | |
| 300 | /// | |
| 301 | /// This intrinsic corresponds to the \c TCVTROWPS2PHH instruction. | |
| 302 | /// | |
| 303 | /// \param tsrc | |
| 304 | /// The source tile. Max size is 1024 Bytes. | |
| 305 | /// \param imm8 | |
| 306 | /// The the row of the source tile. | |
| 307 | #define _tile_cvtrowps2phhi(tsrc, imm8) \ | |
| 308 | __builtin_ia32_tcvtrowps2phhi(tsrc, imm8) | |
| 309 | ||
| 165 | 310 | /// Moves a row from a tile register to a zmm destination register, converting |
| 166 | 311 | /// the fp32 source elements to fp16. It places the resulting fp16 elements |
| 167 | 312 | /// in the low 16 bits within each dword. The row of the tile is selected |
| ... | ... | @@ -198,6 +343,43 @@ |
| 198 | 343 | /// The the row of the source tile. |
| 199 | 344 | #define _tile_cvtrowps2phl(tsrc, row) __builtin_ia32_tcvtrowps2phl(tsrc, row) |
| 200 | 345 | |
| 346 | /// Moves a row from a tile register to a zmm destination register, converting | |
| 347 | /// the fp32 source elements to fp16. It places the resulting fp16 elements | |
| 348 | /// in the low 16 bits within each dword. The row of the tile is selected | |
| 349 | /// by a 8b immediate value. | |
| 350 | /// | |
| 351 | /// \headerfile <x86intrin.h> | |
| 352 | /// | |
| 353 | /// \code | |
| 354 | /// __m512i _tile_cvtrowps2phli(__tile tsrc, const unsigned int imm8); | |
| 355 | /// \endcode | |
| 356 | /// | |
| 357 | /// \code{.operation} | |
| 358 | /// VL := 512 | |
| 359 | /// VL_bytes := VL >> 3 | |
| 360 | /// row_index := imm8 & 0x3f | |
| 361 | /// row_chunk := (imm8 >> 6) * VL_bytes | |
| 362 | /// FOR i := 0 TO (VL_bytes / 4) - 1 | |
| 363 | /// IF i + row_chunk / 4 >= tsrc.colsb / 4 | |
| 364 | /// dst.dword[i] := 0 | |
| 365 | /// ELSE | |
| 366 | /// dst.word[2*i+1] := 0 | |
| 367 | /// dst.fp16[2*i+0] := CONVERT_FP32_TO_FP16(tsrc.row[row_index].fp32[row_chunk/4+i], RNE) | |
| 368 | /// FI | |
| 369 | /// ENDFOR | |
| 370 | /// dst[MAX_VL-1:VL] := 0 | |
| 371 | /// zero_tileconfig_start() | |
| 372 | /// \endcode | |
| 373 | /// | |
| 374 | /// This intrinsic corresponds to the \c TCVTROWPS2PHL instruction. | |
| 375 | /// | |
| 376 | /// \param tsrc | |
| 377 | /// The source tile. Max size is 1024 Bytes. | |
| 378 | /// \param imm8 | |
| 379 | /// The the row of the source tile. | |
| 380 | #define _tile_cvtrowps2phli(tsrc, imm8) \ | |
| 381 | __builtin_ia32_tcvtrowps2phli(tsrc, imm8) | |
| 382 | ||
| 201 | 383 | /// Move one row of a tile data to a v16f32 data. |
| 202 | 384 | /// The row of the tile is selected by a 32b GPR. |
| 203 | 385 | /// |
| ... | ... | @@ -230,6 +412,38 @@ |
| 230 | 412 | /// \endcode |
| 231 | 413 | #define _tile_movrow(a, b) ((__m512i)__builtin_ia32_tilemovrow(a, b)) |
| 232 | 414 | |
| 415 | /// Move one row of a tile data to a v16f32 data. | |
| 416 | /// The row of the tile is selected by a 8b immediate value. | |
| 417 | /// | |
| 418 | /// \headerfile <immintrin.h> | |
| 419 | /// | |
| 420 | /// \code | |
| 421 | /// __m512 _tile_movrowi(__tile a, const unsigned b); | |
| 422 | /// \endcode | |
| 423 | /// | |
| 424 | /// This intrinsic corresponds to the <c> TILEMOVROW </c> instruction. | |
| 425 | /// | |
| 426 | /// \param a | |
| 427 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 428 | /// \param b | |
| 429 | /// The 2nd source r32. Size is 4 Bytes. | |
| 430 | /// \returns | |
| 431 | /// The destination v16f32 data. Size is 64 Bytes. | |
| 432 | /// | |
| 433 | /// \code{.operation} | |
| 434 | /// VL := 512 | |
| 435 | /// VL_bytes := VL>>3 | |
| 436 | /// row_index := b&0x3f | |
| 437 | /// row_chunk := (b>>6) * VL_bytes | |
| 438 | /// FOR i := 0 TO (VL_bytes-1) | |
| 439 | /// IF (row_chunk + i >= a.colsb) | |
| 440 | /// dst.byte[i] := 0 | |
| 441 | /// ELSE | |
| 442 | /// dst.byte[i] := a.row[row_index].byte[row_chunk+i] | |
| 443 | /// ENDFOR | |
| 444 | /// \endcode | |
| 445 | #define _tile_movrowi(a, b) ((__m512i)__builtin_ia32_tilemovrowi(a, b)) | |
| 446 | ||
| 233 | 447 | /// This is internal intrinsic. C/C++ user should avoid calling it directly. |
| 234 | 448 | |
| 235 | 449 | static __inline__ __m512 __DEFAULT_FN_ATTRS_AVX512 _tile_cvtrowd2ps_internal( |
lib/include/amxbf16transposeintrin.h deleted-94| ... | ... | @@ -1,94 +0,0 @@ |
| 1 | /*===----- amxbf16transposeintrin.h - AMX-BF16 and AMX-TRANSPOSE ------------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===------------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __IMMINTRIN_H | |
| 11 | #error \ | |
| 12 | "Never use <amxbf16transposeintrin.h> directly; use <immintrin.h> instead." | |
| 13 | #endif /* __IMMINTRIN_H */ | |
| 14 | ||
| 15 | #ifndef __AMX_BF16TRANSPOSEINTRIN_H | |
| 16 | #define __AMX_BF16TRANSPOSEINTRIN_H | |
| 17 | #ifdef __x86_64__ | |
| 18 | ||
| 19 | /* Define the default attributes for the functions in this file. */ | |
| 20 | #define __DEFAULT_FN_ATTRS \ | |
| 21 | __attribute__((__always_inline__, __nodebug__, \ | |
| 22 | __target__("amx-bf16,amx-transpose"))) | |
| 23 | ||
| 24 | /// Compute transpose and dot-product of BF16 (16-bit) floating-point pairs in | |
| 25 | /// tiles \a a and \a b, accumulating the intermediate single-precision | |
| 26 | /// (32-bit) floating-point elements with elements in \a dst, and store the | |
| 27 | /// 32-bit result back to tile \a dst. | |
| 28 | /// | |
| 29 | /// \headerfile <immintrin.h> | |
| 30 | /// | |
| 31 | /// \code | |
| 32 | /// void _tile_tdpbf16ps (__tile dst, __tile a, __tile b) | |
| 33 | /// \endcode | |
| 34 | /// | |
| 35 | /// \code{.operation} | |
| 36 | /// FOR m := 0 TO dst.rows - 1 | |
| 37 | ///	tmp := dst.row[m] | |
| 38 | ///	FOR k := 0 TO (a.colsb / 4) - 1 | |
| 39 | ///		FOR n := 0 TO (dst.colsb / 4) - 1 | |
| 40 | ///			tmp.bf32[n] += FP32(a.row[m].bf16[2*k+0]) * | |
| 41 | ///					FP32(b.row[k].bf16[2*n+0]) | |
| 42 | ///			tmp.bf32[n] += FP32(a.row[m].bf16[2*k+1]) * | |
| 43 | ///					FP32(b.row[k].bf16[2*n+1]) | |
| 44 | ///		ENDFOR | |
| 45 | ///	ENDFOR | |
| 46 | ///	write_row_and_zero(dst, m, tmp, dst.colsb) | |
| 47 | /// ENDFOR | |
| 48 | /// zero_upper_rows(dst, dst.rows) | |
| 49 | /// zero_tileconfig_start() | |
| 50 | /// \endcode | |
| 51 | /// | |
| 52 | /// This intrinsic corresponds to the \c TTDPBF16PS instruction. | |
| 53 | /// | |
| 54 | /// \param dst | |
| 55 | /// The destination tile. Max size is 1024 Bytes. | |
| 56 | /// \param a | |
| 57 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 58 | /// \param b | |
| 59 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 60 | #define _tile_tdpbf16ps(dst, a, b) __builtin_ia32_ttdpbf16ps((dst), (a), (b)) | |
| 61 | ||
| 62 | /// This is internal intrinsic. C/C++ user should avoid calling it directly. | |
| 63 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS | |
| 64 | _tile_tdpbf16ps_internal(unsigned short m, unsigned short n, unsigned short k, | |
| 65 | _tile1024i dst, _tile1024i src1, _tile1024i src2) { | |
| 66 | return __builtin_ia32_ttdpbf16ps_internal(m, n, k, dst, src1, src2); | |
| 67 | } | |
| 68 | ||
| 69 | /// Compute transpose and dot-product of BF16 (16-bit) floating-point pairs in | |
| 70 | /// tiles src0 and src1, accumulating the intermediate single-precision | |
| 71 | /// (32-bit) floating-point elements with elements in "dst", and store the | |
| 72 | /// 32-bit result back to tile "dst". | |
| 73 | /// | |
| 74 | /// \headerfile <immintrin.h> | |
| 75 | /// | |
| 76 | /// This intrinsic corresponds to the <c> TTDPBF16PS </c> instruction. | |
| 77 | /// | |
| 78 | /// \param dst | |
| 79 | /// The destination tile. Max size is 1024 Bytes. | |
| 80 | /// \param src0 | |
| 81 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 82 | /// \param src1 | |
| 83 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 84 | __DEFAULT_FN_ATTRS | |
| 85 | static __inline__ void __tile_tdpbf16ps(__tile1024i *dst, __tile1024i src0, | |
| 86 | __tile1024i src1) { | |
| 87 | dst->tile = _tile_tdpbf16ps_internal(src0.row, src1.col, src0.col, dst->tile, | |
| 88 | src0.tile, src1.tile); | |
| 89 | } | |
| 90 | ||
| 91 | #undef __DEFAULT_FN_ATTRS | |
| 92 | ||
| 93 | #endif /* __x86_64__ */ | |
| 94 | #endif /* __AMX_BF16TRANSPOSEINTRIN_H */ |
lib/include/amxcomplextransposeintrin.h deleted-303| ... | ... | @@ -1,303 +0,0 @@ |
| 1 | /*===----- amxcomplextransposeintrin.h - AMX-COMPLEX and AMX-TRANSPOSE ------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===------------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __IMMINTRIN_H | |
| 11 | #error \ | |
| 12 | "Never use <amxcomplextransposeintrin.h> directly; include <immintrin.h> instead." | |
| 13 | #endif // __IMMINTRIN_H | |
| 14 | ||
| 15 | #ifndef __AMX_COMPLEXTRANSPOSEINTRIN_H | |
| 16 | #define __AMX_COMPLEXTRANSPOSEINTRIN_H | |
| 17 | #ifdef __x86_64__ | |
| 18 | ||
| 19 | #define __DEFAULT_FN_ATTRS \ | |
| 20 | __attribute__((__always_inline__, __nodebug__, \ | |
| 21 | __target__("amx-complex,amx-transpose"))) | |
| 22 | ||
| 23 | /// Perform matrix multiplication of two tiles containing complex elements and | |
| 24 | /// accumulate the results into a packed single precision tile. Each dword | |
| 25 | /// element in input tiles \a a and \a b is interpreted as a complex number | |
| 26 | /// with FP16 real part and FP16 imaginary part. | |
| 27 | /// Calculates the imaginary part of the result. For each possible combination | |
| 28 | /// of (transposed column of \a a, column of \a b), it performs a set of | |
| 29 | /// multiplication and accumulations on all corresponding complex numbers | |
| 30 | /// (one from \a a and one from \a b). The imaginary part of the \a a element | |
| 31 | /// is multiplied with the real part of the corresponding \a b element, and | |
| 32 | /// the real part of the \a a element is multiplied with the imaginary part | |
| 33 | /// of the corresponding \a b elements. The two accumulated results are | |
| 34 | /// added, and then accumulated into the corresponding row and column of | |
| 35 | /// \a dst. | |
| 36 | /// | |
| 37 | /// \headerfile <x86intrin.h> | |
| 38 | /// | |
| 39 | /// \code | |
| 40 | /// void _tile_tcmmimfp16ps(__tile dst, __tile a, __tile b); | |
| 41 | /// \endcode | |
| 42 | /// | |
| 43 | /// \code{.operation} | |
| 44 | /// FOR m := 0 TO dst.rows - 1 | |
| 45 | ///	tmp := dst.row[m] | |
| 46 | ///	FOR k := 0 TO a.rows - 1 | |
| 47 | ///		FOR n := 0 TO (dst.colsb / 4) - 1 | |
| 48 | ///			tmp.fp32[n] += FP32(a.row[m].fp16[2*k+0]) * FP32(b.row[k].fp16[2*n+1]) | |
| 49 | ///			tmp.fp32[n] += FP32(a.row[m].fp16[2*k+1]) * FP32(b.row[k].fp16[2*n+0]) | |
| 50 | ///		ENDFOR | |
| 51 | ///	ENDFOR | |
| 52 | ///	write_row_and_zero(dst, m, tmp, dst.colsb) | |
| 53 | /// ENDFOR | |
| 54 | /// zero_upper_rows(dst, dst.rows) | |
| 55 | /// zero_tileconfig_start() | |
| 56 | /// \endcode | |
| 57 | /// | |
| 58 | /// This intrinsic corresponds to the \c TTCMMIMFP16PS instruction. | |
| 59 | /// | |
| 60 | /// \param dst | |
| 61 | /// The destination tile. Max size is 1024 Bytes. | |
| 62 | /// \param a | |
| 63 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 64 | /// \param b | |
| 65 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 66 | #define _tile_tcmmimfp16ps(dst, a, b) \ | |
| 67 | __builtin_ia32_ttcmmimfp16ps((dst), (a), (b)) | |
| 68 | ||
| 69 | /// Perform matrix multiplication of two tiles containing complex elements and | |
| 70 | /// accumulate the results into a packed single precision tile. Each dword | |
| 71 | /// element in input tiles \a a and \a b is interpreted as a complex number | |
| 72 | /// with FP16 real part and FP16 imaginary part. | |
| 73 | /// Calculates the real part of the result. For each possible combination | |
| 74 | /// of (rtransposed colum of \a a, column of \a b), it performs a set of | |
| 75 | /// multiplication and accumulations on all corresponding complex numbers | |
| 76 | /// (one from \a a and one from \a b). The real part of the \a a element is | |
| 77 | /// multiplied with the real part of the corresponding \a b element, and the | |
| 78 | /// negated imaginary part of the \a a element is multiplied with the | |
| 79 | /// imaginary part of the corresponding \a b elements. The two accumulated | |
| 80 | /// results are added, and then accumulated into the corresponding row and | |
| 81 | /// column of \a dst. | |
| 82 | /// | |
| 83 | /// \headerfile <x86intrin.h> | |
| 84 | /// | |
| 85 | /// \code | |
| 86 | /// void _tile_tcmmrlfp16ps(__tile dst, __tile a, __tile b); | |
| 87 | /// \endcode | |
| 88 | /// | |
| 89 | /// \code{.operation} | |
| 90 | /// FOR m := 0 TO dst.rows - 1 | |
| 91 | ///	tmp := dst.row[m] | |
| 92 | ///	FOR k := 0 TO a.rows - 1 | |
| 93 | ///		FOR n := 0 TO (dst.colsb / 4) - 1 | |
| 94 | ///			tmp.fp32[n] += FP32(a.row[m].fp16[2*k+0]) * FP32(b.row[k].fp16[2*n+0]) | |
| 95 | ///			tmp.fp32[n] += FP32(-a.row[m].fp16[2*k+1]) * FP32(b.row[k].fp16[2*n+1]) | |
| 96 | ///		ENDFOR | |
| 97 | ///	ENDFOR | |
| 98 | ///	write_row_and_zero(dst, m, tmp, dst.colsb) | |
| 99 | /// ENDFOR | |
| 100 | /// zero_upper_rows(dst, dst.rows) | |
| 101 | /// zero_tileconfig_start() | |
| 102 | /// \endcode | |
| 103 | /// | |
| 104 | /// This intrinsic corresponds to the \c TTCMMIMFP16PS instruction. | |
| 105 | /// | |
| 106 | /// \param dst | |
| 107 | /// The destination tile. Max size is 1024 Bytes. | |
| 108 | /// \param a | |
| 109 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 110 | /// \param b | |
| 111 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 112 | #define _tile_tcmmrlfp16ps(dst, a, b) \ | |
| 113 | __builtin_ia32_ttcmmrlfp16ps((dst), (a), (b)) | |
| 114 | ||
| 115 | /// Perform matrix conjugate transpose and multiplication of two tiles | |
| 116 | /// containing complex elements and accumulate the results into a packed | |
| 117 | /// single precision tile. Each dword element in input tiles \a a and \a b | |
| 118 | /// is interpreted as a complex number with FP16 real part and FP16 imaginary | |
| 119 | /// part. | |
| 120 | /// Calculates the imaginary part of the result. For each possible combination | |
| 121 | /// of (transposed column of \a a, column of \a b), it performs a set of | |
| 122 | /// multiplication and accumulations on all corresponding complex numbers | |
| 123 | /// (one from \a a and one from \a b). The negated imaginary part of the \a a | |
| 124 | /// element is multiplied with the real part of the corresponding \a b | |
| 125 | /// element, and the real part of the \a a element is multiplied with the | |
| 126 | /// imaginary part of the corresponding \a b elements. The two accumulated | |
| 127 | /// results are added, and then accumulated into the corresponding row and | |
| 128 | /// column of \a dst. | |
| 129 | /// | |
| 130 | /// \headerfile <x86intrin.h> | |
| 131 | /// | |
| 132 | /// \code | |
| 133 | /// void _tile_conjtcmmimfp16ps(__tile dst, __tile a, __tile b); | |
| 134 | /// \endcode | |
| 135 | /// | |
| 136 | /// \code{.operation} | |
| 137 | /// FOR m := 0 TO dst.rows - 1 | |
| 138 | ///	tmp := dst.row[m] | |
| 139 | ///	FOR k := 0 TO a.rows - 1 | |
| 140 | ///		FOR n := 0 TO (dst.colsb / 4) - 1 | |
| 141 | ///			tmp.fp32[n] += FP32(a.row[m].fp16[2*k+0]) * FP32(b.row[k].fp16[2*n+1]) | |
| 142 | ///			tmp.fp32[n] += FP32(-a.row[m].fp16[2*k+1]) * FP32(b.row[k].fp16[2*n+0]) | |
| 143 | ///		ENDFOR | |
| 144 | ///	ENDFOR | |
| 145 | ///	write_row_and_zero(dst, m, tmp, dst.colsb) | |
| 146 | /// ENDFOR | |
| 147 | /// zero_upper_rows(dst, dst.rows) | |
| 148 | /// zero_tileconfig_start() | |
| 149 | /// \endcode | |
| 150 | /// | |
| 151 | /// This intrinsic corresponds to the \c TCONJTCMMIMFP16PS instruction. | |
| 152 | /// | |
| 153 | /// \param dst | |
| 154 | /// The destination tile. Max size is 1024 Bytes. | |
| 155 | /// \param a | |
| 156 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 157 | /// \param b | |
| 158 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 159 | #define _tile_conjtcmmimfp16ps(dst, a, b) \ | |
| 160 | __builtin_ia32_tconjtcmmimfp16ps((dst), (a), (b)) | |
| 161 | ||
| 162 | /// Perform conjugate transpose of an FP16-pair of complex elements from \a a | |
| 163 | /// and writes the result to \a dst. | |
| 164 | /// | |
| 165 | /// \headerfile <x86intrin.h> | |
| 166 | /// | |
| 167 | /// \code | |
| 168 | /// void _tile_conjtfp16(__tile dst, __tile a); | |
| 169 | /// \endcode | |
| 170 | /// | |
| 171 | /// \code{.operation} | |
| 172 | /// FOR i := 0 TO dst.rows - 1 | |
| 173 | ///	FOR j := 0 TO (dst.colsb / 4) - 1 | |
| 174 | ///		tmp.fp16[2*j+0] := a.row[j].fp16[2*i+0] | |
| 175 | ///		tmp.fp16[2*j+1] := -a.row[j].fp16[2*i+1] | |
| 176 | ///	ENDFOR | |
| 177 | ///	write_row_and_zero(dst, i, tmp, dst.colsb) | |
| 178 | /// ENDFOR | |
| 179 | /// zero_upper_rows(dst, dst.rows) | |
| 180 | /// zero_tileconfig_start() | |
| 181 | /// \endcode | |
| 182 | /// | |
| 183 | /// This intrinsic corresponds to the \c TCONJTFP16 instruction. | |
| 184 | /// | |
| 185 | /// \param dst | |
| 186 | /// The destination tile. Max size is 1024 Bytes. | |
| 187 | /// \param a | |
| 188 | /// The source tile. Max size is 1024 Bytes. | |
| 189 | #define _tile_conjtfp16(dst, a) __builtin_ia32_tconjtfp16((dst), (a)) | |
| 190 | ||
| 191 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS _tile_tcmmimfp16ps_internal( | |
| 192 | unsigned short m, unsigned short n, unsigned short k, _tile1024i dst, | |
| 193 | _tile1024i src1, _tile1024i src2) { | |
| 194 | return __builtin_ia32_ttcmmimfp16ps_internal(m, n, k, dst, src1, src2); | |
| 195 | } | |
| 196 | ||
| 197 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS _tile_tcmmrlfp16ps_internal( | |
| 198 | unsigned short m, unsigned short n, unsigned short k, _tile1024i dst, | |
| 199 | _tile1024i src1, _tile1024i src2) { | |
| 200 | return __builtin_ia32_ttcmmrlfp16ps_internal(m, n, k, dst, src1, src2); | |
| 201 | } | |
| 202 | ||
| 203 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS _tile_conjtcmmimfp16ps_internal( | |
| 204 | unsigned short m, unsigned short n, unsigned short k, _tile1024i dst, | |
| 205 | _tile1024i src1, _tile1024i src2) { | |
| 206 | return __builtin_ia32_tconjtcmmimfp16ps_internal(m, n, k, dst, src1, src2); | |
| 207 | } | |
| 208 | ||
| 209 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS | |
| 210 | _tile_conjtfp16_internal(unsigned short m, unsigned short n, _tile1024i src) { | |
| 211 | return __builtin_ia32_tconjtfp16_internal(m, n, src); | |
| 212 | } | |
| 213 | ||
| 214 | /// Perform matrix multiplication of two tiles containing complex elements and | |
| 215 | /// accumulate the results into a packed single precision tile. Each dword | |
| 216 | /// element in input tiles src0 and src1 is interpreted as a complex number | |
| 217 | /// with FP16 real part and FP16 imaginary part. | |
| 218 | /// This function calculates the imaginary part of the result. | |
| 219 | /// | |
| 220 | /// \headerfile <immintrin.h> | |
| 221 | /// | |
| 222 | /// This intrinsic corresponds to the <c> TTCMMIMFP16PS </c> instruction. | |
| 223 | /// | |
| 224 | /// \param dst | |
| 225 | /// The destination tile. Max size is 1024 Bytes. | |
| 226 | /// \param src0 | |
| 227 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 228 | /// \param src1 | |
| 229 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 230 | __DEFAULT_FN_ATTRS | |
| 231 | static void __tile_tcmmimfp16ps(__tile1024i *dst, __tile1024i src0, | |
| 232 | __tile1024i src1) { | |
| 233 | dst->tile = _tile_tcmmimfp16ps_internal(src0.row, src1.col, src0.col, | |
| 234 | dst->tile, src0.tile, src1.tile); | |
| 235 | } | |
| 236 | ||
| 237 | /// Perform matrix multiplication of two tiles containing complex elements and | |
| 238 | /// accumulate the results into a packed single precision tile. Each dword | |
| 239 | /// element in input tiles src0 and src1 is interpreted as a complex number | |
| 240 | /// with FP16 real part and FP16 imaginary part. | |
| 241 | /// This function calculates the real part of the result. | |
| 242 | /// | |
| 243 | /// \headerfile <immintrin.h> | |
| 244 | /// | |
| 245 | /// This intrinsic corresponds to the <c> TTCMMRLFP16PS </c> instruction. | |
| 246 | /// | |
| 247 | /// \param dst | |
| 248 | /// The destination tile. Max size is 1024 Bytes. | |
| 249 | /// \param src0 | |
| 250 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 251 | /// \param src1 | |
| 252 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 253 | __DEFAULT_FN_ATTRS | |
| 254 | static void __tile_tcmmrlfp16ps(__tile1024i *dst, __tile1024i src0, | |
| 255 | __tile1024i src1) { | |
| 256 | dst->tile = _tile_tcmmrlfp16ps_internal(src0.row, src1.col, src0.col, | |
| 257 | dst->tile, src0.tile, src1.tile); | |
| 258 | } | |
| 259 | ||
| 260 | /// Perform matrix conjugate transpose and multiplication of two tiles | |
| 261 | /// containing complex elements and accumulate the results into a packed | |
| 262 | /// single precision tile. Each dword element in input tiles src0 and src1 | |
| 263 | /// is interpreted as a complex number with FP16 real part and FP16 imaginary | |
| 264 | /// part. | |
| 265 | /// This function calculates the imaginary part of the result. | |
| 266 | /// | |
| 267 | /// \headerfile <immintrin.h> | |
| 268 | /// | |
| 269 | /// This intrinsic corresponds to the <c> TCONJTCMMIMFP16PS </c> instruction. | |
| 270 | /// | |
| 271 | /// \param dst | |
| 272 | /// The destination tile. Max size is 1024 Bytes. | |
| 273 | /// \param src0 | |
| 274 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 275 | /// \param src1 | |
| 276 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 277 | __DEFAULT_FN_ATTRS | |
| 278 | static void __tile_conjtcmmimfp16ps(__tile1024i *dst, __tile1024i src0, | |
| 279 | __tile1024i src1) { | |
| 280 | dst->tile = _tile_conjtcmmimfp16ps_internal(src0.row, src1.col, src0.col, | |
| 281 | dst->tile, src0.tile, src1.tile); | |
| 282 | } | |
| 283 | ||
| 284 | /// Perform conjugate transpose of an FP16-pair of complex elements from src and | |
| 285 | /// writes the result to dst. | |
| 286 | /// | |
| 287 | /// \headerfile <immintrin.h> | |
| 288 | /// | |
| 289 | /// This intrinsic corresponds to the <c> TCONJTFP16 </c> instruction. | |
| 290 | /// | |
| 291 | /// \param dst | |
| 292 | /// The destination tile. Max size is 1024 Bytes. | |
| 293 | /// \param src | |
| 294 | /// The source tile. Max size is 1024 Bytes. | |
| 295 | __DEFAULT_FN_ATTRS | |
| 296 | static void __tile_conjtfp16(__tile1024i *dst, __tile1024i src) { | |
| 297 | dst->tile = _tile_conjtfp16_internal(src.row, src.col, src.tile); | |
| 298 | } | |
| 299 | ||
| 300 | #undef __DEFAULT_FN_ATTRS | |
| 301 | ||
| 302 | #endif // __x86_64__ | |
| 303 | #endif // __AMX_COMPLEXTRANSPOSEINTRIN_H |
lib/include/amxfp16transposeintrin.h deleted-94| ... | ... | @@ -1,94 +0,0 @@ |
| 1 | /*===----- amxfp16transposeintrin.h - AMX-FP16 and AMX-TRANSPOSE ------------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===------------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __IMMINTRIN_H | |
| 11 | #error \ | |
| 12 | "Never use <amxfp16transposeintrin.h> directly; use <immintrin.h> instead." | |
| 13 | #endif /* __IMMINTRIN_H */ | |
| 14 | ||
| 15 | #ifndef __AMX_FP16TRANSPOSEINTRIN_H | |
| 16 | #define __AMX_FP16TRANSPOSEINTRIN_H | |
| 17 | #ifdef __x86_64__ | |
| 18 | ||
| 19 | /* Define the default attributes for the functions in this file. */ | |
| 20 | #define __DEFAULT_FN_ATTRS \ | |
| 21 | __attribute__((__always_inline__, __nodebug__, \ | |
| 22 | __target__("amx-fp16,amx-transpose"))) | |
| 23 | ||
| 24 | /// Compute transpose and dot-product of FP16 (16-bit) floating-point pairs in | |
| 25 | /// tiles \a a and \a b, accumulating the intermediate single-precision | |
| 26 | /// (32-bit) floating-point elements with elements in \a dst, and store the | |
| 27 | /// 32-bit result back to tile \a dst. | |
| 28 | /// | |
| 29 | /// \headerfile <immintrin.h> | |
| 30 | /// | |
| 31 | /// \code | |
| 32 | /// void _tile_tdpfp16ps (__tile dst, __tile a, __tile b) | |
| 33 | /// \endcode | |
| 34 | /// | |
| 35 | /// \code{.operation} | |
| 36 | /// FOR m := 0 TO dst.rows - 1 | |
| 37 | ///	tmp := dst.row[m] | |
| 38 | ///	FOR k := 0 TO (a.colsb / 4) - 1 | |
| 39 | ///		FOR n := 0 TO (dst.colsb / 4) - 1 | |
| 40 | ///			tmp.fp32[n] += FP32(a.row[m].fp16[2*k+0]) * | |
| 41 | ///					FP32(b.row[k].fp16[2*n+0]) | |
| 42 | ///			tmp.fp32[n] += FP32(a.row[m].fp16[2*k+1]) * | |
| 43 | ///					FP32(b.row[k].fp16[2*n+1]) | |
| 44 | ///		ENDFOR | |
| 45 | ///	ENDFOR | |
| 46 | ///	write_row_and_zero(dst, m, tmp, dst.colsb) | |
| 47 | /// ENDFOR | |
| 48 | /// zero_upper_rows(dst, dst.rows) | |
| 49 | /// zero_tileconfig_start() | |
| 50 | /// \endcode | |
| 51 | /// | |
| 52 | /// This intrinsic corresponds to the \c TTDPFP16PS instruction. | |
| 53 | /// | |
| 54 | /// \param dst | |
| 55 | /// The destination tile. Max size is 1024 Bytes. | |
| 56 | /// \param a | |
| 57 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 58 | /// \param b | |
| 59 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 60 | #define _tile_tdpfp16ps(dst, a, b) __builtin_ia32_ttdpfp16ps((dst), (a), (b)) | |
| 61 | ||
| 62 | /// This is internal intrinsic. C/C++ user should avoid calling it directly. | |
| 63 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS | |
| 64 | _tile_tdpfp16ps_internal(unsigned short m, unsigned short n, unsigned short k, | |
| 65 | _tile1024i dst, _tile1024i src1, _tile1024i src2) { | |
| 66 | return __builtin_ia32_ttdpfp16ps_internal(m, n, k, dst, src1, src2); | |
| 67 | } | |
| 68 | ||
| 69 | /// Compute transpose and dot-product of FP16 (16-bit) floating-point pairs in | |
| 70 | /// tiles src0 and src1, accumulating the intermediate single-precision | |
| 71 | /// (32-bit) floating-point elements with elements in "dst", and store the | |
| 72 | /// 32-bit result back to tile "dst". | |
| 73 | /// | |
| 74 | /// \headerfile <immintrin.h> | |
| 75 | /// | |
| 76 | /// This intrinsic corresponds to the <c> TTDPFP16PS </c> instruction. | |
| 77 | /// | |
| 78 | /// \param dst | |
| 79 | /// The destination tile. Max size is 1024 Bytes. | |
| 80 | /// \param src0 | |
| 81 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 82 | /// \param src1 | |
| 83 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 84 | __DEFAULT_FN_ATTRS | |
| 85 | static __inline__ void __tile_tdpfp16ps(__tile1024i *dst, __tile1024i src0, | |
| 86 | __tile1024i src1) { | |
| 87 | dst->tile = _tile_tdpfp16ps_internal(src0.row, src1.col, src0.col, dst->tile, | |
| 88 | src0.tile, src1.tile); | |
| 89 | } | |
| 90 | ||
| 91 | #undef __DEFAULT_FN_ATTRS | |
| 92 | ||
| 93 | #endif /* __x86_64__ */ | |
| 94 | #endif /* __AMX_FP16TRANSPOSEINTRIN_H */ |
lib/include/amxintrin.h-2| ... | ... | @@ -230,8 +230,6 @@ static __inline__ void __DEFAULT_FN_ATTRS_TILE _tile_release(void) { |
| 230 | 230 | /// bytes. Since there is no 2D type in llvm IR, we use vector type to |
| 231 | 231 | /// represent 2D tile and the fixed size is maximum amx tile register size. |
| 232 | 232 | typedef int _tile1024i __attribute__((__vector_size__(1024), __aligned__(64))); |
| 233 | typedef int _tile1024i_1024a | |
| 234 | __attribute__((__vector_size__(1024), __aligned__(1024))); | |
| 235 | 233 | |
| 236 | 234 | /// This is internal intrinsic. C/C++ user should avoid calling it directly. |
| 237 | 235 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TILE |
lib/include/amxmovrstransposeintrin.h deleted-200| ... | ... | @@ -1,200 +0,0 @@ |
| 1 | /* ===--- amxmovrstransposeintrin.h - AMX_MOVRS_TRANSPOSE intrinsics --------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | * ===-----------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __IMMINTRIN_H | |
| 11 | #error \ | |
| 12 | "Never use <amxmovrstransposeintrin.h> directly; use <immintrin.h> instead." | |
| 13 | #endif /* __IMMINTRIN_H */ | |
| 14 | ||
| 15 | #ifndef __AMX_MOVRS_TRANSPOSEINTRIN_H | |
| 16 | #define __AMX_MOVRS_TRANSPOSEINTRIN_H | |
| 17 | #ifdef __x86_64__ | |
| 18 | ||
| 19 | #define __DEFAULT_FN_ATTRS \ | |
| 20 | __attribute__((__always_inline__, __nodebug__, \ | |
| 21 | __target__("amx-transpose,amx-movrs"))) | |
| 22 | ||
| 23 | #define _tile_2rpntlvwz0rs(tdst, base, stride) \ | |
| 24 | __builtin_ia32_t2rpntlvwz0rs(tdst, base, stride) | |
| 25 | #define _tile_2rpntlvwz0rst1(tdst, base, stride) \ | |
| 26 | __builtin_ia32_t2rpntlvwz0rst1(tdst, base, stride) | |
| 27 | #define _tile_2rpntlvwz1rs(tdst, base, stride) \ | |
| 28 | __builtin_ia32_t2rpntlvwz1rs(tdst, base, stride) | |
| 29 | #define _tile_2rpntlvwz1rst1(tdst, base, stride) \ | |
| 30 | __builtin_ia32_t2rpntlvwz1rst1(tdst, base, stride) | |
| 31 | ||
| 32 | static __inline__ void __DEFAULT_FN_ATTRS _tile_2rpntlvwz0rs_internal( | |
| 33 | unsigned short row, unsigned short col0, unsigned short col1, | |
| 34 | _tile1024i *dst0, _tile1024i *dst1, const void *base, | |
| 35 | __SIZE_TYPE__ stride) { | |
| 36 | // Use __tile1024i_1024a* to escape the alignment check in | |
| 37 | // clang/test/Headers/x86-intrinsics-headers-clean.cpp | |
| 38 | __builtin_ia32_t2rpntlvwz0rs_internal( | |
| 39 | row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base, | |
| 40 | (__SIZE_TYPE__)(stride)); | |
| 41 | } | |
| 42 | ||
| 43 | static __inline__ void __DEFAULT_FN_ATTRS _tile_2rpntlvwz0rst1_internal( | |
| 44 | unsigned short row, unsigned short col0, unsigned short col1, | |
| 45 | _tile1024i *dst0, _tile1024i *dst1, const void *base, | |
| 46 | __SIZE_TYPE__ stride) { | |
| 47 | __builtin_ia32_t2rpntlvwz0rst1_internal( | |
| 48 | row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base, | |
| 49 | (__SIZE_TYPE__)(stride)); | |
| 50 | } | |
| 51 | ||
| 52 | static __inline__ void __DEFAULT_FN_ATTRS _tile_2rpntlvwz1rs_internal( | |
| 53 | unsigned short row, unsigned short col0, unsigned short col1, | |
| 54 | _tile1024i *dst0, _tile1024i *dst1, const void *base, | |
| 55 | __SIZE_TYPE__ stride) { | |
| 56 | __builtin_ia32_t2rpntlvwz1rs_internal( | |
| 57 | row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base, | |
| 58 | (__SIZE_TYPE__)(stride)); | |
| 59 | } | |
| 60 | ||
| 61 | static __inline__ void __DEFAULT_FN_ATTRS _tile_2rpntlvwz1rst1_internal( | |
| 62 | unsigned short row, unsigned short col0, unsigned short col1, | |
| 63 | _tile1024i *dst0, _tile1024i *dst1, const void *base, | |
| 64 | __SIZE_TYPE__ stride) { | |
| 65 | __builtin_ia32_t2rpntlvwz1rst1_internal( | |
| 66 | row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base, | |
| 67 | (__SIZE_TYPE__)(stride)); | |
| 68 | } | |
| 69 | ||
| 70 | /// Converts a pair of tiles from memory into VNNI format, and places the | |
| 71 | /// results in a pair of destinations specified by dst. The pair of tiles | |
| 72 | /// in memory is specified via a tsib; the second tile is after the first | |
| 73 | /// one, separated by the same stride that separates each row. | |
| 74 | /// The tile configuration for the destination tiles indicates the amount | |
| 75 | /// of data to read from memory. The instruction will load a number of rows | |
| 76 | /// that is equal to twice the number of rows in tmm1. The size of each row | |
| 77 | /// is equal to the average width of the destination tiles. If the second | |
| 78 | /// tile is configured with zero rows and columns, only the first tile will | |
| 79 | /// be written. | |
| 80 | /// Provides a hint to the implementation that the data will likely become | |
| 81 | /// read shared in the near future and the data caching can be optimized. | |
| 82 | /// | |
| 83 | /// \headerfile <immintrin.h> | |
| 84 | /// | |
| 85 | /// This intrinsic corresponds to the <c> T2RPNTLVWZ0RS </c> instruction. | |
| 86 | /// | |
| 87 | /// \param dst0 | |
| 88 | /// First tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 89 | /// \param dst1 | |
| 90 | /// Second tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 91 | /// \param base | |
| 92 | /// A pointer to base address. | |
| 93 | /// \param stride | |
| 94 | /// The stride between the rows' data to be loaded in memory. | |
| 95 | __DEFAULT_FN_ATTRS | |
| 96 | static void __tile_2rpntlvwz0rs(__tile1024i *dst0, __tile1024i *dst1, | |
| 97 | const void *base, __SIZE_TYPE__ stride) { | |
| 98 | _tile_2rpntlvwz0rs_internal(dst0->row, dst0->col, dst1->col, &dst0->tile, | |
| 99 | &dst1->tile, base, stride); | |
| 100 | } | |
| 101 | ||
| 102 | /// Converts a pair of tiles from memory into VNNI format, and places the | |
| 103 | /// results in a pair of destinations specified by dst. The pair of tiles | |
| 104 | /// in memory is specified via a tsib; the second tile is after the first | |
| 105 | /// one, separated by the same stride that separates each row. | |
| 106 | /// The tile configuration for the destination tiles indicates the amount | |
| 107 | /// of data to read from memory. The instruction will load a number of rows | |
| 108 | /// that is equal to twice the number of rows in tmm1. The size of each row | |
| 109 | /// is equal to the average width of the destination tiles. If the second | |
| 110 | /// tile is configured with zero rows and columns, only the first tile will | |
| 111 | /// be written. | |
| 112 | /// | |
| 113 | /// \headerfile <immintrin.h> | |
| 114 | /// | |
| 115 | /// This intrinsic corresponds to the <c> T2RPNTLVWZ0T1RS </c> instruction. | |
| 116 | /// | |
| 117 | /// \param dst0 | |
| 118 | /// First tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 119 | /// \param dst1 | |
| 120 | /// Second tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 121 | /// \param base | |
| 122 | /// A pointer to base address. | |
| 123 | /// \param stride | |
| 124 | /// The stride between the rows' data to be loaded in memory. | |
| 125 | __DEFAULT_FN_ATTRS | |
| 126 | static void __tile_2rpntlvwz0rst1(__tile1024i *dst0, __tile1024i *dst1, | |
| 127 | const void *base, __SIZE_TYPE__ stride) { | |
| 128 | _tile_2rpntlvwz0rst1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile, | |
| 129 | &dst1->tile, base, stride); | |
| 130 | } | |
| 131 | ||
| 132 | /// Converts a pair of tiles from memory into VNNI format, and places the | |
| 133 | /// results in a pair of destinations specified by dst. The pair of tiles | |
| 134 | /// in memory is specified via a tsib; the second tile is after the first | |
| 135 | /// one, separated by the same stride that separates each row. | |
| 136 | /// The tile configuration for the destination tiles indicates the amount | |
| 137 | /// of data to read from memory. The instruction will load a number of rows | |
| 138 | /// that is equal to twice the number of rows in tmm1. The size of each row | |
| 139 | /// is equal to the average width of the destination tiles. If the second | |
| 140 | /// tile is configured with zero rows and columns, only the first tile will | |
| 141 | /// be written. The last row will be not be read from memory but instead | |
| 142 | /// filled with zeros. | |
| 143 | /// Provides a hint to the implementation that the data will likely become | |
| 144 | /// read shared in the near future and the data caching can be optimized. | |
| 145 | /// | |
| 146 | /// \headerfile <immintrin.h> | |
| 147 | /// | |
| 148 | /// This intrinsic corresponds to the <c> T2RPNTLVWZ1 </c> instruction. | |
| 149 | /// | |
| 150 | /// \param dst0 | |
| 151 | /// First tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 152 | /// \param dst1 | |
| 153 | /// Second tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 154 | /// \param base | |
| 155 | /// A pointer to base address. | |
| 156 | /// \param stride | |
| 157 | /// The stride between the rows' data to be loaded in memory. | |
| 158 | __DEFAULT_FN_ATTRS | |
| 159 | static void __tile_2rpntlvwz1rs(__tile1024i *dst0, __tile1024i *dst1, | |
| 160 | const void *base, __SIZE_TYPE__ stride) { | |
| 161 | _tile_2rpntlvwz1rs_internal(dst0->row, dst0->col, dst1->col, &dst0->tile, | |
| 162 | &dst1->tile, base, stride); | |
| 163 | } | |
| 164 | ||
| 165 | /// Converts a pair of tiles from memory into VNNI format, and places the | |
| 166 | /// results in a pair of destinations specified by dst. The pair of tiles | |
| 167 | /// in memory is specified via a tsib; the second tile is after the first | |
| 168 | /// one, separated by the same stride that separates each row. | |
| 169 | /// The tile configuration for the destination tiles indicates the amount | |
| 170 | /// of data to read from memory. The instruction will load a number of rows | |
| 171 | /// that is equal to twice the number of rows in tmm1. The size of each row | |
| 172 | /// is equal to the average width of the destination tiles. If the second | |
| 173 | /// tile is configured with zero rows and columns, only the first tile will | |
| 174 | /// be written. The last row will be not be read from memory but instead | |
| 175 | /// filled with zeros. | |
| 176 | /// Provides a hint to the implementation that the data will likely become | |
| 177 | /// read shared in the near future and the data caching can be optimized. | |
| 178 | /// | |
| 179 | /// \headerfile <immintrin.h> | |
| 180 | /// | |
| 181 | /// This intrinsic corresponds to the <c> T2RPNTLVWZ1T1RS </c> instruction. | |
| 182 | /// | |
| 183 | /// \param dst0 | |
| 184 | /// First tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 185 | /// \param dst1 | |
| 186 | /// Second tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 187 | /// \param base | |
| 188 | /// A pointer to base address. | |
| 189 | /// \param stride | |
| 190 | /// The stride between the rows' data to be loaded in memory. | |
| 191 | __DEFAULT_FN_ATTRS | |
| 192 | static void __tile_2rpntlvwz1rst1(__tile1024i *dst0, __tile1024i *dst1, | |
| 193 | const void *base, __SIZE_TYPE__ stride) { | |
| 194 | _tile_2rpntlvwz1rst1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile, | |
| 195 | &dst1->tile, base, stride); | |
| 196 | } | |
| 197 | ||
| 198 | #undef __DEFAULT_FN_ATTRS | |
| 199 | #endif /* __x86_64__ */ | |
| 200 | #endif /* __AMX_MOVRS_TRANSPOSEINTRIN_H */ |
lib/include/amxtf32transposeintrin.h deleted-105| ... | ... | @@ -1,105 +0,0 @@ |
| 1 | /*===--------- amxtf32transposeintrin.h - AMX-TF32 and AMX-TRANSPOSE --------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===------------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | #ifndef __IMMINTRIN_H | |
| 10 | #error \ | |
| 11 | "Never use <amxtf32transposeintrin.h> directly; include <immintrin.h> instead." | |
| 12 | #endif // __IMMINTRIN_H | |
| 13 | ||
| 14 | #ifndef __AMX_TF32TRANSPOSEINTRIN_H | |
| 15 | #define __AMX_TF32TRANSPOSEINTRIN_H | |
| 16 | #ifdef __x86_64__ | |
| 17 | ||
| 18 | #define __DEFAULT_FN_ATTRS_TF32_TRANSPOSE \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, \ | |
| 20 | __target__("amx-tf32,amx-transpose"))) | |
| 21 | ||
| 22 | /// \code | |
| 23 | /// void _tile_tmmultf32ps(constexpr int srcdst, constexpr int a, \ | |
| 24 | /// constexpr int b); | |
| 25 | /// \endcode | |
| 26 | /// | |
| 27 | /// This intrinsic corresponds to the <c> TTMMULTF32PS </c> instruction. | |
| 28 | /// | |
| 29 | /// \param srcdst | |
| 30 | /// 	The destination tile. Max size is 1024 Bytes. | |
| 31 | /// \param a | |
| 32 | /// 	The 1st source tile. Max size is 1024 Bytes. | |
| 33 | /// \param b | |
| 34 | /// 	The 2nd source tile. Max size is 1024 Bytes. | |
| 35 | /// | |
| 36 | /// \code{.operation} | |
| 37 | /// DEFINE zero_lower_mantissa_bits_fp32(x[31:0]) { | |
| 38 | /// 	dword[12:0] := 0 | |
| 39 | /// 	dword[31:13] := x[31:13] | |
| 40 | /// 	return dword | |
| 41 | /// } | |
| 42 | /// | |
| 43 | /// DEFINE silence_snan_fp32(x[31:0]) { | |
| 44 | /// 	IF (x.exponent == 255 and x.fraction != 0 and x.fraction[22] == 0) | |
| 45 | /// 		x.fraction[22] := 1 | |
| 46 | /// 	return x | |
| 47 | /// } | |
| 48 | /// | |
| 49 | /// elements_dest:= srcdst.colsb/4 | |
| 50 | /// | |
| 51 | /// FOR m := 0 TO (srcdst.rows-1) | |
| 52 | /// 	tmp[511:0] := 0 | |
| 53 | /// 	FOR k := 0 TO (a.rows-1) | |
| 54 | /// 		FOR n := 0 TO (elements_dest-1) | |
| 55 | /// 			a1e := silence_snan_fp32(a.row[k].fp32[m]) | |
| 56 | /// 			a2e := silence_snan_fp32(b.row[k].fp32[n]) | |
| 57 | /// 			s1e := zero_lower_mantissa_bits_fp32(a1e) | |
| 58 | /// 			s2e := zero_lower_mantissa_bits_fp32(a2e) | |
| 59 | /// 			tmp.fp32[n] += s1e * s2e | |
| 60 | /// 		ENDFOR | |
| 61 | /// 	ENDFOR | |
| 62 | /// | |
| 63 | /// 	FOR n := 0 TO (elements_dest-1) | |
| 64 | /// 		tmp.fp32[n] += srcdst.row[m].fp32[n] | |
| 65 | /// 	ENDFOR | |
| 66 | ///	write_row_and_zero(srcdst, m, tmp, srcdst.colsb) | |
| 67 | /// | |
| 68 | /// ENDFOR | |
| 69 | /// | |
| 70 | /// zero_upper_rows(srcdst, srcdst.rows) | |
| 71 | /// zero_tileconfig_start() | |
| 72 | /// \endcode | |
| 73 | #define _tile_tmmultf32ps(srcdst, a, b) \ | |
| 74 | __builtin_ia32_ttmmultf32ps((srcdst), (a), (b)) | |
| 75 | ||
| 76 | // dst = m x n (srcdest), src1 = k x m, src2 = k x n | |
| 77 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TF32_TRANSPOSE | |
| 78 | _tile_tmmultf32ps_internal(unsigned short m, unsigned short n, unsigned short k, | |
| 79 | _tile1024i dst, _tile1024i src1, _tile1024i src2) { | |
| 80 | return __builtin_ia32_ttmmultf32ps_internal(m, n, k, dst, src1, src2); | |
| 81 | } | |
| 82 | ||
| 83 | /// Compute transpose and do Matrix Multiplication of src0 and src1, and then do | |
| 84 | /// Matrix Plus with dst. All the calculation is base on float32 but with the | |
| 85 | /// lower 13-bit set to 0. | |
| 86 | /// | |
| 87 | /// \headerfile <immintrin.h> | |
| 88 | /// | |
| 89 | /// This intrinsic corresponds to the <c> TTMMULTF32PS </c> instruction. | |
| 90 | /// | |
| 91 | /// \param dst | |
| 92 | /// The destination tile. Max size is 1024 Bytes. | |
| 93 | /// \param src0 | |
| 94 | /// The 1st source tile. Max size is 1024 Bytes. | |
| 95 | /// \param src1 | |
| 96 | /// The 2nd source tile. Max size is 1024 Bytes. | |
| 97 | __DEFAULT_FN_ATTRS_TF32_TRANSPOSE | |
| 98 | static void __tile_tmmultf32ps(__tile1024i *dst, __tile1024i src0, | |
| 99 | __tile1024i src1) { | |
| 100 | dst->tile = _tile_tmmultf32ps_internal(src0.row, src1.col, src0.col, | |
| 101 | dst->tile, src0.tile, src1.tile); | |
| 102 | } | |
| 103 | ||
| 104 | #endif // __x86_64__ | |
| 105 | #endif // __AMX_TF32TRANSPOSEINTRIN_H |
lib/include/amxtransposeintrin.h deleted-248| ... | ... | @@ -1,248 +0,0 @@ |
| 1 | /* ===--- amxtransposeintrin.h - AMX_TRANSPOSE intrinsics -*- C++ -*---------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | * ===-----------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __IMMINTRIN_H | |
| 11 | #error "Never use <amxtransposeintrin.h> directly; use <immintrin.h> instead." | |
| 12 | #endif /* __IMMINTRIN_H */ | |
| 13 | ||
| 14 | #ifndef __AMX_TRANSPOSEINTRIN_H | |
| 15 | #define __AMX_TRANSPOSEINTRIN_H | |
| 16 | #ifdef __x86_64__ | |
| 17 | ||
| 18 | #define __DEFAULT_FN_ATTRS_TRANSPOSE \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("amx-transpose"))) | |
| 20 | ||
| 21 | #define _tile_2rpntlvwz0(tdst, base, stride) \ | |
| 22 | __builtin_ia32_t2rpntlvwz0(tdst, base, stride) | |
| 23 | #define _tile_2rpntlvwz0t1(tdst, base, stride) \ | |
| 24 | __builtin_ia32_t2rpntlvwz0t1(tdst, base, stride) | |
| 25 | #define _tile_2rpntlvwz1(tdst, base, stride) \ | |
| 26 | __builtin_ia32_t2rpntlvwz1(tdst, base, stride) | |
| 27 | #define _tile_2rpntlvwz1t1(tdst, base, stride) \ | |
| 28 | __builtin_ia32_t2rpntlvwz1t1(tdst, base, stride) | |
| 29 | ||
| 30 | /// Transpose 32-bit elements from \a src and write the result to \a dst. | |
| 31 | /// | |
| 32 | /// \headerfile <immintrin.h> | |
| 33 | /// | |
| 34 | /// \code | |
| 35 | /// void _tile_transposed(__tile dst, __tile src); | |
| 36 | /// \endcode | |
| 37 | /// | |
| 38 | /// This intrinsic corresponds to the <c> TTRANSPOSED </c> instruction. | |
| 39 | /// | |
| 40 | /// \param dst | |
| 41 | /// 	The destination tile. Max size is 1024 Bytes. | |
| 42 | /// \param src | |
| 43 | /// 	The source tile. Max size is 1024 Bytes. | |
| 44 | /// | |
| 45 | /// \code{.operation} | |
| 46 | /// | |
| 47 | /// FOR i := 0 TO (dst.rows-1) | |
| 48 | /// 	tmp[511:0] := 0 | |
| 49 | /// 	FOR j := 0 TO (dst.colsb/4-1) | |
| 50 | /// 		tmp.dword[j] := src.row[j].dword[i] | |
| 51 | /// 	ENDFOR | |
| 52 | /// 	dst.row[i] := tmp | |
| 53 | /// ENDFOR | |
| 54 | /// | |
| 55 | /// zero_upper_rows(dst, dst.rows) | |
| 56 | /// zero_tileconfig_start() | |
| 57 | /// \endcode | |
| 58 | #define _tile_transposed(dst, src) __builtin_ia32_ttransposed(dst, src) | |
| 59 | ||
| 60 | static __inline__ void __DEFAULT_FN_ATTRS_TRANSPOSE _tile_2rpntlvwz0_internal( | |
| 61 | unsigned short row, unsigned short col0, unsigned short col1, | |
| 62 | _tile1024i *dst0, _tile1024i *dst1, const void *base, | |
| 63 | __SIZE_TYPE__ stride) { | |
| 64 | // Use __tile1024i_1024a* to escape the alignment check in | |
| 65 | // clang/test/Headers/x86-intrinsics-headers-clean.cpp | |
| 66 | __builtin_ia32_t2rpntlvwz0_internal(row, col0, col1, (_tile1024i_1024a *)dst0, | |
| 67 | (_tile1024i_1024a *)dst1, base, | |
| 68 | (__SIZE_TYPE__)(stride)); | |
| 69 | } | |
| 70 | ||
| 71 | static __inline__ void __DEFAULT_FN_ATTRS_TRANSPOSE _tile_2rpntlvwz0t1_internal( | |
| 72 | unsigned short row, unsigned short col0, unsigned short col1, | |
| 73 | _tile1024i *dst0, _tile1024i *dst1, const void *base, | |
| 74 | __SIZE_TYPE__ stride) { | |
| 75 | __builtin_ia32_t2rpntlvwz0t1_internal( | |
| 76 | row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base, | |
| 77 | (__SIZE_TYPE__)(stride)); | |
| 78 | } | |
| 79 | ||
| 80 | static __inline__ void __DEFAULT_FN_ATTRS_TRANSPOSE _tile_2rpntlvwz1_internal( | |
| 81 | unsigned short row, unsigned short col0, unsigned short col1, | |
| 82 | _tile1024i *dst0, _tile1024i *dst1, const void *base, | |
| 83 | __SIZE_TYPE__ stride) { | |
| 84 | __builtin_ia32_t2rpntlvwz1_internal(row, col0, col1, (_tile1024i_1024a *)dst0, | |
| 85 | (_tile1024i_1024a *)dst1, base, | |
| 86 | (__SIZE_TYPE__)(stride)); | |
| 87 | } | |
| 88 | ||
| 89 | static __inline__ void __DEFAULT_FN_ATTRS_TRANSPOSE _tile_2rpntlvwz1t1_internal( | |
| 90 | unsigned short row, unsigned short col0, unsigned short col1, | |
| 91 | _tile1024i *dst0, _tile1024i *dst1, const void *base, | |
| 92 | __SIZE_TYPE__ stride) { | |
| 93 | __builtin_ia32_t2rpntlvwz1t1_internal( | |
| 94 | row, col0, col1, (_tile1024i_1024a *)dst0, (_tile1024i_1024a *)dst1, base, | |
| 95 | (__SIZE_TYPE__)(stride)); | |
| 96 | } | |
| 97 | ||
| 98 | // This is internal intrinsic. C/C++ user should avoid calling it directly. | |
| 99 | static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TRANSPOSE | |
| 100 | _tile_transposed_internal(unsigned short m, unsigned short n, _tile1024i src) { | |
| 101 | return __builtin_ia32_ttransposed_internal(m, n, src); | |
| 102 | } | |
| 103 | ||
| 104 | /// Converts a pair of tiles from memory into VNNI format, and places the | |
| 105 | /// results in a pair of destinations specified by dst. The pair of tiles | |
| 106 | /// in memory is specified via a tsib; the second tile is after the first | |
| 107 | /// one, separated by the same stride that separates each row. | |
| 108 | /// The tile configuration for the destination tiles indicates the amount | |
| 109 | /// of data to read from memory. The instruction will load a number of rows | |
| 110 | /// that is equal to twice the number of rows in tmm1. The size of each row | |
| 111 | /// is equal to the average width of the destination tiles. If the second | |
| 112 | /// tile is configured with zero rows and columns, only the first tile will | |
| 113 | /// be written. | |
| 114 | /// Provides a hint to the implementation that the data will likely not be | |
| 115 | /// reused in the near future and the data caching can be optimized. | |
| 116 | /// | |
| 117 | /// \headerfile <immintrin.h> | |
| 118 | /// | |
| 119 | /// This intrinsic corresponds to the <c> T2RPNTLVWZ0 </c> instruction. | |
| 120 | /// | |
| 121 | /// \param dst0 | |
| 122 | /// First tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 123 | /// \param dst1 | |
| 124 | /// Second tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 125 | /// \param base | |
| 126 | /// A pointer to base address. | |
| 127 | /// \param stride | |
| 128 | /// The stride between the rows' data to be loaded in memory. | |
| 129 | __DEFAULT_FN_ATTRS_TRANSPOSE | |
| 130 | static void __tile_2rpntlvwz0(__tile1024i *dst0, __tile1024i *dst1, | |
| 131 | const void *base, __SIZE_TYPE__ stride) { | |
| 132 | _tile_2rpntlvwz0_internal(dst0->row, dst0->col, dst1->col, &dst0->tile, | |
| 133 | &dst1->tile, base, stride); | |
| 134 | } | |
| 135 | ||
| 136 | /// Converts a pair of tiles from memory into VNNI format, and places the | |
| 137 | /// results in a pair of destinations specified by dst. The pair of tiles | |
| 138 | /// in memory is specified via a tsib; the second tile is after the first | |
| 139 | /// one, separated by the same stride that separates each row. | |
| 140 | /// The tile configuration for the destination tiles indicates the amount | |
| 141 | /// of data to read from memory. The instruction will load a number of rows | |
| 142 | /// that is equal to twice the number of rows in tmm1. The size of each row | |
| 143 | /// is equal to the average width of the destination tiles. If the second | |
| 144 | /// tile is configured with zero rows and columns, only the first tile will | |
| 145 | /// be written. | |
| 146 | /// | |
| 147 | /// \headerfile <immintrin.h> | |
| 148 | /// | |
| 149 | /// This intrinsic corresponds to the <c> T2RPNTLVWZ0T1 </c> instruction. | |
| 150 | /// | |
| 151 | /// \param dst0 | |
| 152 | /// First tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 153 | /// \param dst1 | |
| 154 | /// Second tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 155 | /// \param base | |
| 156 | /// A pointer to base address. | |
| 157 | /// \param stride | |
| 158 | /// The stride between the rows' data to be loaded in memory. | |
| 159 | __DEFAULT_FN_ATTRS_TRANSPOSE | |
| 160 | static void __tile_2rpntlvwz0t1(__tile1024i *dst0, __tile1024i *dst1, | |
| 161 | const void *base, __SIZE_TYPE__ stride) { | |
| 162 | _tile_2rpntlvwz0t1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile, | |
| 163 | &dst1->tile, base, stride); | |
| 164 | } | |
| 165 | ||
| 166 | /// Converts a pair of tiles from memory into VNNI format, and places the | |
| 167 | /// results in a pair of destinations specified by dst. The pair of tiles | |
| 168 | /// in memory is specified via a tsib; the second tile is after the first | |
| 169 | /// one, separated by the same stride that separates each row. | |
| 170 | /// The tile configuration for the destination tiles indicates the amount | |
| 171 | /// of data to read from memory. The instruction will load a number of rows | |
| 172 | /// that is equal to twice the number of rows in tmm1. The size of each row | |
| 173 | /// is equal to the average width of the destination tiles. If the second | |
| 174 | /// tile is configured with zero rows and columns, only the first tile will | |
| 175 | /// be written. The last row will be not be read from memory but instead | |
| 176 | /// filled with zeros. | |
| 177 | /// Provides a hint to the implementation that the data will likely not be | |
| 178 | /// reused in the near future and the data caching can be optimized. | |
| 179 | /// | |
| 180 | /// \headerfile <immintrin.h> | |
| 181 | /// | |
| 182 | /// This intrinsic corresponds to the <c> T2RPNTLVWZ1 </c> instruction. | |
| 183 | /// | |
| 184 | /// \param dst0 | |
| 185 | /// First tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 186 | /// \param dst1 | |
| 187 | /// Second tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 188 | /// \param base | |
| 189 | /// A pointer to base address. | |
| 190 | /// \param stride | |
| 191 | /// The stride between the rows' data to be loaded in memory. | |
| 192 | __DEFAULT_FN_ATTRS_TRANSPOSE | |
| 193 | static void __tile_2rpntlvwz1(__tile1024i *dst0, __tile1024i *dst1, | |
| 194 | const void *base, __SIZE_TYPE__ stride) { | |
| 195 | _tile_2rpntlvwz1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile, | |
| 196 | &dst1->tile, base, stride); | |
| 197 | } | |
| 198 | ||
| 199 | /// Converts a pair of tiles from memory into VNNI format, and places the | |
| 200 | /// results in a pair of destinations specified by dst. The pair of tiles | |
| 201 | /// in memory is specified via a tsib; the second tile is after the first | |
| 202 | /// one, separated by the same stride that separates each row. | |
| 203 | /// The tile configuration for the destination tiles indicates the amount | |
| 204 | /// of data to read from memory. The instruction will load a number of rows | |
| 205 | /// that is equal to twice the number of rows in tmm1. The size of each row | |
| 206 | /// is equal to the average width of the destination tiles. If the second | |
| 207 | /// tile is configured with zero rows and columns, only the first tile will | |
| 208 | /// be written. The last row will be not be read from memory but instead | |
| 209 | /// filled with zeros. | |
| 210 | /// Provides a hint to the implementation that the data will likely not be | |
| 211 | /// reused in the near future and the data caching can be optimized. | |
| 212 | /// | |
| 213 | /// \headerfile <immintrin.h> | |
| 214 | /// | |
| 215 | /// This intrinsic corresponds to the <c> T2RPNTLVWZ1T1 </c> instruction. | |
| 216 | /// | |
| 217 | /// \param dst0 | |
| 218 | /// First tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 219 | /// \param dst1 | |
| 220 | /// Second tile of destination tile pair. Max size is 1024i*2 Bytes. | |
| 221 | /// \param base | |
| 222 | /// A pointer to base address. | |
| 223 | /// \param stride | |
| 224 | /// The stride between the rows' data to be loaded in memory. | |
| 225 | __DEFAULT_FN_ATTRS_TRANSPOSE | |
| 226 | static void __tile_2rpntlvwz1t1(__tile1024i *dst0, __tile1024i *dst1, | |
| 227 | const void *base, __SIZE_TYPE__ stride) { | |
| 228 | _tile_2rpntlvwz1t1_internal(dst0->row, dst0->col, dst1->col, &dst0->tile, | |
| 229 | &dst1->tile, base, stride); | |
| 230 | } | |
| 231 | ||
| 232 | /// Transpose 32-bit elements from src and write the result to dst. | |
| 233 | /// | |
| 234 | /// \headerfile <immintrin.h> | |
| 235 | /// | |
| 236 | /// This intrinsic corresponds to the <c> TTRANSPOSED </c> instruction. | |
| 237 | /// | |
| 238 | /// \param dst | |
| 239 | /// The destination tile. Max size is 1024 Bytes. | |
| 240 | /// \param src | |
| 241 | /// The source tile. Max size is 1024 Bytes. | |
| 242 | __DEFAULT_FN_ATTRS_TRANSPOSE | |
| 243 | static void __tile_transposed(__tile1024i *dst, __tile1024i src) { | |
| 244 | dst->tile = _tile_transposed_internal(dst->row, dst->col, src.tile); | |
| 245 | } | |
| 246 | ||
| 247 | #endif /* __x86_64__ */ | |
| 248 | #endif /* __AMX_TRANSPOSEINTRIN_H */ |
lib/include/arm_acle.h+37-27| ... | ... | @@ -55,11 +55,37 @@ __chkfeat(uint64_t __features) { |
| 55 | 55 | /* 7.5 Swap */ |
| 56 | 56 | static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__)) |
| 57 | 57 | __swp(uint32_t __x, volatile uint32_t *__p) { |
| 58 | uint32_t v; | |
| 59 | do | |
| 60 | v = __builtin_arm_ldrex(__p); | |
| 61 | while (__builtin_arm_strex(__x, __p)); | |
| 62 | return v; | |
| 58 | uint32_t __v; | |
| 59 | #if (__ARM_FEATURE_LDREX & 4) || __ARM_ARCH_6M__ || __linux__ | |
| 60 | /* | |
| 61 | * Using this clang builtin is sensible in most situations. Where | |
| 62 | * LDREX and STREX are available, it will compile to a loop using | |
| 63 | * them. Otherwise it will compile to a libcall, requiring the | |
| 64 | * runtime to provide that library function. | |
| 65 | * | |
| 66 | * That's unavoidable on Armv6-M, which has no atomic instructions | |
| 67 | * at all (not even SWP), so in that situation the user will just | |
| 68 | * have to provide an implementation of __atomic_exchange_4 (perhaps | |
| 69 | * it would temporarily disable interrupts, and then do a separate | |
| 70 | * load and store). | |
| 71 | * | |
| 72 | * We also use the libcall strategy on pre-Armv7 Linux targets, on | |
| 73 | * the theory that Linux's runtime support library _will_ provide a | |
| 74 | * suitable libcall, and it's better to use that than the SWP | |
| 75 | * instruction because then when the same binary is run on a later | |
| 76 | * Linux system the libcall implementation will use LDREX instead. | |
| 77 | */ | |
| 78 | __v = __atomic_exchange_n(__p, __x, __ATOMIC_RELAXED); | |
| 79 | #else | |
| 80 | /* | |
| 81 | * But for older Arm architectures when the target is not Linux, we | |
| 82 | * fall back to using the SWP instruction via inline assembler. ACLE | |
| 83 | * is clear that we're allowed to do this, but shouldn't do it if we | |
| 84 | * have a better alternative. | |
| 85 | */ | |
| 86 | __asm__("swp %0, %1, [%2]" : "=r"(__v) : "r"(__x), "r"(__p) : "memory"); | |
| 87 | #endif | |
| 88 | return __v; | |
| 63 | 89 | } |
| 64 | 90 | |
| 65 | 91 | /* 7.6 Memory prefetch intrinsics */ |
| ... | ... | @@ -72,6 +98,12 @@ __swp(uint32_t __x, volatile uint32_t *__p) { |
| 72 | 98 | #else |
| 73 | 99 | #define __pldx(access_kind, cache_level, retention_policy, addr) \ |
| 74 | 100 | __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1) |
| 101 | #define __pldx_range(access_kind, retention_policy, length, count, stride, \ | |
| 102 | reuse_distance, addr) \ | |
| 103 | __builtin_arm_range_prefetch_x(addr, access_kind, retention_policy, length, \ | |
| 104 | count, stride, reuse_distance) | |
| 105 | #define __pld_range(access_kind, retention_policy, metadata, addr) \ | |
| 106 | __builtin_arm_range_prefetch(addr, access_kind, retention_policy, metadata) | |
| 75 | 107 | #endif |
| 76 | 108 | |
| 77 | 109 | /* 7.6.2 Instruction prefetch */ |
| ... | ... | @@ -795,28 +827,6 @@ __arm_st64bv0(void *__addr, data512_t __value) { |
| 795 | 827 | |
| 796 | 828 | #endif // __ARM_FEATURE_COPROC |
| 797 | 829 | |
| 798 | /* 17 Transactional Memory Extension (TME) Intrinsics */ | |
| 799 | #if defined(__ARM_FEATURE_TME) && __ARM_FEATURE_TME | |
| 800 | ||
| 801 | #define _TMFAILURE_REASON 0x00007fffu | |
| 802 | #define _TMFAILURE_RTRY 0x00008000u | |
| 803 | #define _TMFAILURE_CNCL 0x00010000u | |
| 804 | #define _TMFAILURE_MEM 0x00020000u | |
| 805 | #define _TMFAILURE_IMP 0x00040000u | |
| 806 | #define _TMFAILURE_ERR 0x00080000u | |
| 807 | #define _TMFAILURE_SIZE 0x00100000u | |
| 808 | #define _TMFAILURE_NEST 0x00200000u | |
| 809 | #define _TMFAILURE_DBG 0x00400000u | |
| 810 | #define _TMFAILURE_INT 0x00800000u | |
| 811 | #define _TMFAILURE_TRIVIAL 0x01000000u | |
| 812 | ||
| 813 | #define __tstart() __builtin_arm_tstart() | |
| 814 | #define __tcommit() __builtin_arm_tcommit() | |
| 815 | #define __tcancel(__arg) __builtin_arm_tcancel(__arg) | |
| 816 | #define __ttest() __builtin_arm_ttest() | |
| 817 | ||
| 818 | #endif /* __ARM_FEATURE_TME */ | |
| 819 | ||
| 820 | 830 | /* 8.7 Armv8.5-A Random number generation intrinsics */ |
| 821 | 831 | #if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE |
| 822 | 832 | static __inline__ int __attribute__((__always_inline__, __nodebug__, target("rand"))) |
lib/include/arm_neon.h+218-82| ... | ... | @@ -10562,7 +10562,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t |
| 10562 | 10562 | #define vget_lane_p8(__p0, __p1) __extension__ ({ \ |
| 10563 | 10563 | poly8_t __ret; \ |
| 10564 | 10564 | poly8x8_t __s0 = __p0; \ |
| 10565 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__s0, __p1)); \ | |
| 10565 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__builtin_bit_cast(int8x8_t, __s0), __p1)); \ | |
| 10566 | 10566 | __ret; \ |
| 10567 | 10567 | }) |
| 10568 | 10568 | #else |
| ... | ... | @@ -10570,13 +10570,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t |
| 10570 | 10570 | poly8_t __ret; \ |
| 10571 | 10571 | poly8x8_t __s0 = __p0; \ |
| 10572 | 10572 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_8); \ |
| 10573 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__rev0, __p1)); \ | |
| 10573 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__builtin_bit_cast(int8x8_t, __rev0), __p1)); \ | |
| 10574 | 10574 | __ret; \ |
| 10575 | 10575 | }) |
| 10576 | 10576 | #define __noswap_vget_lane_p8(__p0, __p1) __extension__ ({ \ |
| 10577 | 10577 | poly8_t __ret; \ |
| 10578 | 10578 | poly8x8_t __s0 = __p0; \ |
| 10579 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__s0, __p1)); \ | |
| 10579 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vget_lane_i8(__builtin_bit_cast(int8x8_t, __s0), __p1)); \ | |
| 10580 | 10580 | __ret; \ |
| 10581 | 10581 | }) |
| 10582 | 10582 | #endif |
| ... | ... | @@ -10585,7 +10585,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t |
| 10585 | 10585 | #define vget_lane_p16(__p0, __p1) __extension__ ({ \ |
| 10586 | 10586 | poly16_t __ret; \ |
| 10587 | 10587 | poly16x4_t __s0 = __p0; \ |
| 10588 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__s0, __p1)); \ | |
| 10588 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__builtin_bit_cast(int16x4_t, __s0), __p1)); \ | |
| 10589 | 10589 | __ret; \ |
| 10590 | 10590 | }) |
| 10591 | 10591 | #else |
| ... | ... | @@ -10593,13 +10593,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t |
| 10593 | 10593 | poly16_t __ret; \ |
| 10594 | 10594 | poly16x4_t __s0 = __p0; \ |
| 10595 | 10595 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_16); \ |
| 10596 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__rev0, __p1)); \ | |
| 10596 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__builtin_bit_cast(int16x4_t, __rev0), __p1)); \ | |
| 10597 | 10597 | __ret; \ |
| 10598 | 10598 | }) |
| 10599 | 10599 | #define __noswap_vget_lane_p16(__p0, __p1) __extension__ ({ \ |
| 10600 | 10600 | poly16_t __ret; \ |
| 10601 | 10601 | poly16x4_t __s0 = __p0; \ |
| 10602 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__s0, __p1)); \ | |
| 10602 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vget_lane_i16(__builtin_bit_cast(int16x4_t, __s0), __p1)); \ | |
| 10603 | 10603 | __ret; \ |
| 10604 | 10604 | }) |
| 10605 | 10605 | #endif |
| ... | ... | @@ -10608,7 +10608,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t |
| 10608 | 10608 | #define vgetq_lane_p8(__p0, __p1) __extension__ ({ \ |
| 10609 | 10609 | poly8_t __ret; \ |
| 10610 | 10610 | poly8x16_t __s0 = __p0; \ |
| 10611 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__s0, __p1)); \ | |
| 10611 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__builtin_bit_cast(int8x16_t, __s0), __p1)); \ | |
| 10612 | 10612 | __ret; \ |
| 10613 | 10613 | }) |
| 10614 | 10614 | #else |
| ... | ... | @@ -10616,13 +10616,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t |
| 10616 | 10616 | poly8_t __ret; \ |
| 10617 | 10617 | poly8x16_t __s0 = __p0; \ |
| 10618 | 10618 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_8); \ |
| 10619 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__rev0, __p1)); \ | |
| 10619 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__builtin_bit_cast(int8x16_t, __rev0), __p1)); \ | |
| 10620 | 10620 | __ret; \ |
| 10621 | 10621 | }) |
| 10622 | 10622 | #define __noswap_vgetq_lane_p8(__p0, __p1) __extension__ ({ \ |
| 10623 | 10623 | poly8_t __ret; \ |
| 10624 | 10624 | poly8x16_t __s0 = __p0; \ |
| 10625 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__s0, __p1)); \ | |
| 10625 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vgetq_lane_i8(__builtin_bit_cast(int8x16_t, __s0), __p1)); \ | |
| 10626 | 10626 | __ret; \ |
| 10627 | 10627 | }) |
| 10628 | 10628 | #endif |
| ... | ... | @@ -10631,7 +10631,7 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t |
| 10631 | 10631 | #define vgetq_lane_p16(__p0, __p1) __extension__ ({ \ |
| 10632 | 10632 | poly16_t __ret; \ |
| 10633 | 10633 | poly16x8_t __s0 = __p0; \ |
| 10634 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__s0, __p1)); \ | |
| 10634 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__builtin_bit_cast(int16x8_t, __s0), __p1)); \ | |
| 10635 | 10635 | __ret; \ |
| 10636 | 10636 | }) |
| 10637 | 10637 | #else |
| ... | ... | @@ -10639,13 +10639,13 @@ __ai __attribute__((target("neon"))) int16x4_t __noswap_vget_high_s16(int16x8_t |
| 10639 | 10639 | poly16_t __ret; \ |
| 10640 | 10640 | poly16x8_t __s0 = __p0; \ |
| 10641 | 10641 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_16); \ |
| 10642 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__rev0, __p1)); \ | |
| 10642 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__builtin_bit_cast(int16x8_t, __rev0), __p1)); \ | |
| 10643 | 10643 | __ret; \ |
| 10644 | 10644 | }) |
| 10645 | 10645 | #define __noswap_vgetq_lane_p16(__p0, __p1) __extension__ ({ \ |
| 10646 | 10646 | poly16_t __ret; \ |
| 10647 | 10647 | poly16x8_t __s0 = __p0; \ |
| 10648 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__s0, __p1)); \ | |
| 10648 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vgetq_lane_i16(__builtin_bit_cast(int16x8_t, __s0), __p1)); \ | |
| 10649 | 10649 | __ret; \ |
| 10650 | 10650 | }) |
| 10651 | 10651 | #endif |
| ... | ... | @@ -27027,7 +27027,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27027 | 27027 | poly8x8_t __ret; \ |
| 27028 | 27028 | poly8_t __s0 = __p0; \ |
| 27029 | 27029 | poly8x8_t __s1 = __p1; \ |
| 27030 | __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __s1, __p2)); \ | |
| 27030 | __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __builtin_bit_cast(int8x8_t, __s1), __p2)); \ | |
| 27031 | 27031 | __ret; \ |
| 27032 | 27032 | }) |
| 27033 | 27033 | #else |
| ... | ... | @@ -27036,7 +27036,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27036 | 27036 | poly8_t __s0 = __p0; \ |
| 27037 | 27037 | poly8x8_t __s1 = __p1; \ |
| 27038 | 27038 | poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_64_8); \ |
| 27039 | __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __rev1, __p2)); \ | |
| 27039 | __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __builtin_bit_cast(int8x8_t, __rev1), __p2)); \ | |
| 27040 | 27040 | __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_64_8); \ |
| 27041 | 27041 | __ret; \ |
| 27042 | 27042 | }) |
| ... | ... | @@ -27044,7 +27044,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27044 | 27044 | poly8x8_t __ret; \ |
| 27045 | 27045 | poly8_t __s0 = __p0; \ |
| 27046 | 27046 | poly8x8_t __s1 = __p1; \ |
| 27047 | __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __s1, __p2)); \ | |
| 27047 | __ret = __builtin_bit_cast(poly8x8_t, __builtin_neon_vset_lane_i8(__s0, __builtin_bit_cast(int8x8_t, __s1), __p2)); \ | |
| 27048 | 27048 | __ret; \ |
| 27049 | 27049 | }) |
| 27050 | 27050 | #endif |
| ... | ... | @@ -27054,7 +27054,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27054 | 27054 | poly16x4_t __ret; \ |
| 27055 | 27055 | poly16_t __s0 = __p0; \ |
| 27056 | 27056 | poly16x4_t __s1 = __p1; \ |
| 27057 | __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __s1, __p2)); \ | |
| 27057 | __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __builtin_bit_cast(int16x4_t, __s1), __p2)); \ | |
| 27058 | 27058 | __ret; \ |
| 27059 | 27059 | }) |
| 27060 | 27060 | #else |
| ... | ... | @@ -27063,7 +27063,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27063 | 27063 | poly16_t __s0 = __p0; \ |
| 27064 | 27064 | poly16x4_t __s1 = __p1; \ |
| 27065 | 27065 | poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_64_16); \ |
| 27066 | __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __rev1, __p2)); \ | |
| 27066 | __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __builtin_bit_cast(int16x4_t, __rev1), __p2)); \ | |
| 27067 | 27067 | __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_64_16); \ |
| 27068 | 27068 | __ret; \ |
| 27069 | 27069 | }) |
| ... | ... | @@ -27071,7 +27071,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27071 | 27071 | poly16x4_t __ret; \ |
| 27072 | 27072 | poly16_t __s0 = __p0; \ |
| 27073 | 27073 | poly16x4_t __s1 = __p1; \ |
| 27074 | __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __s1, __p2)); \ | |
| 27074 | __ret = __builtin_bit_cast(poly16x4_t, __builtin_neon_vset_lane_i16(__s0, __builtin_bit_cast(int16x4_t, __s1), __p2)); \ | |
| 27075 | 27075 | __ret; \ |
| 27076 | 27076 | }) |
| 27077 | 27077 | #endif |
| ... | ... | @@ -27081,7 +27081,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27081 | 27081 | poly8x16_t __ret; \ |
| 27082 | 27082 | poly8_t __s0 = __p0; \ |
| 27083 | 27083 | poly8x16_t __s1 = __p1; \ |
| 27084 | __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __s1, __p2)); \ | |
| 27084 | __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __builtin_bit_cast(int8x16_t, __s1), __p2)); \ | |
| 27085 | 27085 | __ret; \ |
| 27086 | 27086 | }) |
| 27087 | 27087 | #else |
| ... | ... | @@ -27090,7 +27090,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27090 | 27090 | poly8_t __s0 = __p0; \ |
| 27091 | 27091 | poly8x16_t __s1 = __p1; \ |
| 27092 | 27092 | poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_8); \ |
| 27093 | __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __rev1, __p2)); \ | |
| 27093 | __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __builtin_bit_cast(int8x16_t, __rev1), __p2)); \ | |
| 27094 | 27094 | __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_8); \ |
| 27095 | 27095 | __ret; \ |
| 27096 | 27096 | }) |
| ... | ... | @@ -27098,7 +27098,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27098 | 27098 | poly8x16_t __ret; \ |
| 27099 | 27099 | poly8_t __s0 = __p0; \ |
| 27100 | 27100 | poly8x16_t __s1 = __p1; \ |
| 27101 | __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __s1, __p2)); \ | |
| 27101 | __ret = __builtin_bit_cast(poly8x16_t, __builtin_neon_vsetq_lane_i8(__s0, __builtin_bit_cast(int8x16_t, __s1), __p2)); \ | |
| 27102 | 27102 | __ret; \ |
| 27103 | 27103 | }) |
| 27104 | 27104 | #endif |
| ... | ... | @@ -27108,7 +27108,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27108 | 27108 | poly16x8_t __ret; \ |
| 27109 | 27109 | poly16_t __s0 = __p0; \ |
| 27110 | 27110 | poly16x8_t __s1 = __p1; \ |
| 27111 | __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __s1, __p2)); \ | |
| 27111 | __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __builtin_bit_cast(int16x8_t, __s1), __p2)); \ | |
| 27112 | 27112 | __ret; \ |
| 27113 | 27113 | }) |
| 27114 | 27114 | #else |
| ... | ... | @@ -27117,7 +27117,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27117 | 27117 | poly16_t __s0 = __p0; \ |
| 27118 | 27118 | poly16x8_t __s1 = __p1; \ |
| 27119 | 27119 | poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_16); \ |
| 27120 | __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __rev1, __p2)); \ | |
| 27120 | __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __builtin_bit_cast(int16x8_t, __rev1), __p2)); \ | |
| 27121 | 27121 | __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_16); \ |
| 27122 | 27122 | __ret; \ |
| 27123 | 27123 | }) |
| ... | ... | @@ -27125,7 +27125,7 @@ __ai __attribute__((target("neon"))) int8x8_t __noswap_vrsubhn_s16(int16x8_t __p |
| 27125 | 27125 | poly16x8_t __ret; \ |
| 27126 | 27126 | poly16_t __s0 = __p0; \ |
| 27127 | 27127 | poly16x8_t __s1 = __p1; \ |
| 27128 | __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __s1, __p2)); \ | |
| 27128 | __ret = __builtin_bit_cast(poly16x8_t, __builtin_neon_vsetq_lane_i16(__s0, __builtin_bit_cast(int16x8_t, __s1), __p2)); \ | |
| 27129 | 27129 | __ret; \ |
| 27130 | 27130 | }) |
| 27131 | 27131 | #endif |
| ... | ... | @@ -41141,6 +41141,42 @@ __ai __attribute__((target("neon"))) float32x2_t vfms_f32(float32x2_t __p0, floa |
| 41141 | 41141 | |
| 41142 | 41142 | #endif |
| 41143 | 41143 | #if defined(__aarch64__) |
| 41144 | #ifdef __LITTLE_ENDIAN__ | |
| 41145 | __ai __attribute__((target("f8f16mm,neon"))) float16x8_t vmmlaq_f16_mf8_fpm(float16x8_t __p0, mfloat8x16_t __p1, mfloat8x16_t __p2, fpm_t __p3) { | |
| 41146 | float16x8_t __ret; | |
| 41147 | __ret = __builtin_bit_cast(float16x8_t, __builtin_neon_vmmlaq_f16_mf8_fpm(__builtin_bit_cast(int8x16_t, __p0), __p1, __p2, __p3)); | |
| 41148 | return __ret; | |
| 41149 | } | |
| 41150 | #else | |
| 41151 | __ai __attribute__((target("f8f16mm,neon"))) float16x8_t vmmlaq_f16_mf8_fpm(float16x8_t __p0, mfloat8x16_t __p1, mfloat8x16_t __p2, fpm_t __p3) { | |
| 41152 | float16x8_t __ret; | |
| 41153 | float16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, __lane_reverse_128_16); | |
| 41154 | mfloat8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, __lane_reverse_128_8); | |
| 41155 | mfloat8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, __lane_reverse_128_8); | |
| 41156 | __ret = __builtin_bit_cast(float16x8_t, __builtin_neon_vmmlaq_f16_mf8_fpm(__builtin_bit_cast(int8x16_t, __rev0), __rev1, __rev2, __p3)); | |
| 41157 | __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_16); | |
| 41158 | return __ret; | |
| 41159 | } | |
| 41160 | #endif | |
| 41161 | ||
| 41162 | #ifdef __LITTLE_ENDIAN__ | |
| 41163 | __ai __attribute__((target("f8f32mm,neon"))) float32x4_t vmmlaq_f32_mf8_fpm(float32x4_t __p0, mfloat8x16_t __p1, mfloat8x16_t __p2, fpm_t __p3) { | |
| 41164 | float32x4_t __ret; | |
| 41165 | __ret = __builtin_bit_cast(float32x4_t, __builtin_neon_vmmlaq_f32_mf8_fpm(__p0, __p1, __p2, __p3)); | |
| 41166 | return __ret; | |
| 41167 | } | |
| 41168 | #else | |
| 41169 | __ai __attribute__((target("f8f32mm,neon"))) float32x4_t vmmlaq_f32_mf8_fpm(float32x4_t __p0, mfloat8x16_t __p1, mfloat8x16_t __p2, fpm_t __p3) { | |
| 41170 | float32x4_t __ret; | |
| 41171 | float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, __lane_reverse_128_32); | |
| 41172 | mfloat8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, __lane_reverse_128_8); | |
| 41173 | mfloat8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, __lane_reverse_128_8); | |
| 41174 | __ret = __builtin_bit_cast(float32x4_t, __builtin_neon_vmmlaq_f32_mf8_fpm(__rev0, __rev1, __rev2, __p3)); | |
| 41175 | __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_32); | |
| 41176 | return __ret; | |
| 41177 | } | |
| 41178 | #endif | |
| 41179 | ||
| 41144 | 41180 | #ifdef __LITTLE_ENDIAN__ |
| 41145 | 41181 | __ai __attribute__((target("fp8,neon"))) bfloat16x8_t vcvt1_bf16_mf8_fpm(mfloat8x8_t __p0, fpm_t __p1) { |
| 41146 | 41182 | bfloat16x8_t __ret; |
| ... | ... | @@ -49847,6 +49883,16 @@ __ai __attribute__((target("neon"))) int32_t vcvts_s32_f32(float32_t __p0) { |
| 49847 | 49883 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvts_s32_f32(__p0)); |
| 49848 | 49884 | return __ret; |
| 49849 | 49885 | } |
| 49886 | __ai __attribute__((target("neon"))) int32_t vcvtd_s32_f64(float64_t __p0) { | |
| 49887 | int32_t __ret; | |
| 49888 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtd_s32_f64(__p0)); | |
| 49889 | return __ret; | |
| 49890 | } | |
| 49891 | __ai __attribute__((target("neon"))) int64_t vcvts_s64_f32(float32_t __p0) { | |
| 49892 | int64_t __ret; | |
| 49893 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvts_s64_f32(__p0)); | |
| 49894 | return __ret; | |
| 49895 | } | |
| 49850 | 49896 | __ai __attribute__((target("neon"))) int64_t vcvtd_s64_f64(float64_t __p0) { |
| 49851 | 49897 | int64_t __ret; |
| 49852 | 49898 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtd_s64_f64(__p0)); |
| ... | ... | @@ -49878,6 +49924,16 @@ __ai __attribute__((target("neon"))) uint32_t vcvts_u32_f32(float32_t __p0) { |
| 49878 | 49924 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvts_u32_f32(__p0)); |
| 49879 | 49925 | return __ret; |
| 49880 | 49926 | } |
| 49927 | __ai __attribute__((target("neon"))) uint32_t vcvtd_u32_f64(float64_t __p0) { | |
| 49928 | uint32_t __ret; | |
| 49929 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtd_u32_f64(__p0)); | |
| 49930 | return __ret; | |
| 49931 | } | |
| 49932 | __ai __attribute__((target("neon"))) uint64_t vcvts_u64_f32(float32_t __p0) { | |
| 49933 | uint64_t __ret; | |
| 49934 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvts_u64_f32(__p0)); | |
| 49935 | return __ret; | |
| 49936 | } | |
| 49881 | 49937 | __ai __attribute__((target("neon"))) uint64_t vcvtd_u64_f64(float64_t __p0) { |
| 49882 | 49938 | uint64_t __ret; |
| 49883 | 49939 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtd_u64_f64(__p0)); |
| ... | ... | @@ -49909,6 +49965,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtas_s32_f32(float32_t __p0) { |
| 49909 | 49965 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtas_s32_f32(__p0)); |
| 49910 | 49966 | return __ret; |
| 49911 | 49967 | } |
| 49968 | __ai __attribute__((target("neon"))) int32_t vcvtad_s32_f64(float64_t __p0) { | |
| 49969 | int32_t __ret; | |
| 49970 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtad_s32_f64(__p0)); | |
| 49971 | return __ret; | |
| 49972 | } | |
| 49912 | 49973 | #ifdef __LITTLE_ENDIAN__ |
| 49913 | 49974 | __ai __attribute__((target("neon"))) int64x2_t vcvtaq_s64_f64(float64x2_t __p0) { |
| 49914 | 49975 | int64x2_t __ret; |
| ... | ... | @@ -49930,6 +49991,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvta_s64_f64(float64x1_t __p0) { |
| 49930 | 49991 | __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvta_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3)); |
| 49931 | 49992 | return __ret; |
| 49932 | 49993 | } |
| 49994 | __ai __attribute__((target("neon"))) int64_t vcvtas_s64_f32(float32_t __p0) { | |
| 49995 | int64_t __ret; | |
| 49996 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtas_s64_f32(__p0)); | |
| 49997 | return __ret; | |
| 49998 | } | |
| 49933 | 49999 | __ai __attribute__((target("neon"))) int64_t vcvtad_s64_f64(float64_t __p0) { |
| 49934 | 50000 | int64_t __ret; |
| 49935 | 50001 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtad_s64_f64(__p0)); |
| ... | ... | @@ -49940,6 +50006,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtas_u32_f32(float32_t __p0) { |
| 49940 | 50006 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtas_u32_f32(__p0)); |
| 49941 | 50007 | return __ret; |
| 49942 | 50008 | } |
| 50009 | __ai __attribute__((target("neon"))) uint32_t vcvtad_u32_f64(float64_t __p0) { | |
| 50010 | uint32_t __ret; | |
| 50011 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtad_u32_f64(__p0)); | |
| 50012 | return __ret; | |
| 50013 | } | |
| 49943 | 50014 | #ifdef __LITTLE_ENDIAN__ |
| 49944 | 50015 | __ai __attribute__((target("neon"))) uint64x2_t vcvtaq_u64_f64(float64x2_t __p0) { |
| 49945 | 50016 | uint64x2_t __ret; |
| ... | ... | @@ -49961,6 +50032,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvta_u64_f64(float64x1_t __p0) |
| 49961 | 50032 | __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvta_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19)); |
| 49962 | 50033 | return __ret; |
| 49963 | 50034 | } |
| 50035 | __ai __attribute__((target("neon"))) uint64_t vcvtas_u64_f32(float32_t __p0) { | |
| 50036 | uint64_t __ret; | |
| 50037 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtas_u64_f32(__p0)); | |
| 50038 | return __ret; | |
| 50039 | } | |
| 49964 | 50040 | __ai __attribute__((target("neon"))) uint64_t vcvtad_u64_f64(float64_t __p0) { |
| 49965 | 50041 | uint64_t __ret; |
| 49966 | 50042 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtad_u64_f64(__p0)); |
| ... | ... | @@ -49971,6 +50047,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtms_s32_f32(float32_t __p0) { |
| 49971 | 50047 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtms_s32_f32(__p0)); |
| 49972 | 50048 | return __ret; |
| 49973 | 50049 | } |
| 50050 | __ai __attribute__((target("neon"))) int32_t vcvtmd_s32_f64(float64_t __p0) { | |
| 50051 | int32_t __ret; | |
| 50052 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtmd_s32_f64(__p0)); | |
| 50053 | return __ret; | |
| 50054 | } | |
| 49974 | 50055 | #ifdef __LITTLE_ENDIAN__ |
| 49975 | 50056 | __ai __attribute__((target("neon"))) int64x2_t vcvtmq_s64_f64(float64x2_t __p0) { |
| 49976 | 50057 | int64x2_t __ret; |
| ... | ... | @@ -49992,6 +50073,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtm_s64_f64(float64x1_t __p0) { |
| 49992 | 50073 | __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtm_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3)); |
| 49993 | 50074 | return __ret; |
| 49994 | 50075 | } |
| 50076 | __ai __attribute__((target("neon"))) int64_t vcvtms_s64_f32(float32_t __p0) { | |
| 50077 | int64_t __ret; | |
| 50078 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtms_s64_f32(__p0)); | |
| 50079 | return __ret; | |
| 50080 | } | |
| 49995 | 50081 | __ai __attribute__((target("neon"))) int64_t vcvtmd_s64_f64(float64_t __p0) { |
| 49996 | 50082 | int64_t __ret; |
| 49997 | 50083 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtmd_s64_f64(__p0)); |
| ... | ... | @@ -50002,6 +50088,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtms_u32_f32(float32_t __p0) { |
| 50002 | 50088 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtms_u32_f32(__p0)); |
| 50003 | 50089 | return __ret; |
| 50004 | 50090 | } |
| 50091 | __ai __attribute__((target("neon"))) uint32_t vcvtmd_u32_f64(float64_t __p0) { | |
| 50092 | uint32_t __ret; | |
| 50093 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtmd_u32_f64(__p0)); | |
| 50094 | return __ret; | |
| 50095 | } | |
| 50005 | 50096 | #ifdef __LITTLE_ENDIAN__ |
| 50006 | 50097 | __ai __attribute__((target("neon"))) uint64x2_t vcvtmq_u64_f64(float64x2_t __p0) { |
| 50007 | 50098 | uint64x2_t __ret; |
| ... | ... | @@ -50023,6 +50114,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtm_u64_f64(float64x1_t __p0) |
| 50023 | 50114 | __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtm_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19)); |
| 50024 | 50115 | return __ret; |
| 50025 | 50116 | } |
| 50117 | __ai __attribute__((target("neon"))) uint64_t vcvtms_u64_f32(float32_t __p0) { | |
| 50118 | uint64_t __ret; | |
| 50119 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtms_u64_f32(__p0)); | |
| 50120 | return __ret; | |
| 50121 | } | |
| 50026 | 50122 | __ai __attribute__((target("neon"))) uint64_t vcvtmd_u64_f64(float64_t __p0) { |
| 50027 | 50123 | uint64_t __ret; |
| 50028 | 50124 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtmd_u64_f64(__p0)); |
| ... | ... | @@ -50033,6 +50129,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtns_s32_f32(float32_t __p0) { |
| 50033 | 50129 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtns_s32_f32(__p0)); |
| 50034 | 50130 | return __ret; |
| 50035 | 50131 | } |
| 50132 | __ai __attribute__((target("neon"))) int32_t vcvtnd_s32_f64(float64_t __p0) { | |
| 50133 | int32_t __ret; | |
| 50134 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtnd_s32_f64(__p0)); | |
| 50135 | return __ret; | |
| 50136 | } | |
| 50036 | 50137 | #ifdef __LITTLE_ENDIAN__ |
| 50037 | 50138 | __ai __attribute__((target("neon"))) int64x2_t vcvtnq_s64_f64(float64x2_t __p0) { |
| 50038 | 50139 | int64x2_t __ret; |
| ... | ... | @@ -50054,6 +50155,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtn_s64_f64(float64x1_t __p0) { |
| 50054 | 50155 | __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtn_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3)); |
| 50055 | 50156 | return __ret; |
| 50056 | 50157 | } |
| 50158 | __ai __attribute__((target("neon"))) int64_t vcvtns_s64_f32(float32_t __p0) { | |
| 50159 | int64_t __ret; | |
| 50160 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtns_s64_f32(__p0)); | |
| 50161 | return __ret; | |
| 50162 | } | |
| 50057 | 50163 | __ai __attribute__((target("neon"))) int64_t vcvtnd_s64_f64(float64_t __p0) { |
| 50058 | 50164 | int64_t __ret; |
| 50059 | 50165 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtnd_s64_f64(__p0)); |
| ... | ... | @@ -50064,6 +50170,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtns_u32_f32(float32_t __p0) { |
| 50064 | 50170 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtns_u32_f32(__p0)); |
| 50065 | 50171 | return __ret; |
| 50066 | 50172 | } |
| 50173 | __ai __attribute__((target("neon"))) uint32_t vcvtnd_u32_f64(float64_t __p0) { | |
| 50174 | uint32_t __ret; | |
| 50175 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtnd_u32_f64(__p0)); | |
| 50176 | return __ret; | |
| 50177 | } | |
| 50067 | 50178 | #ifdef __LITTLE_ENDIAN__ |
| 50068 | 50179 | __ai __attribute__((target("neon"))) uint64x2_t vcvtnq_u64_f64(float64x2_t __p0) { |
| 50069 | 50180 | uint64x2_t __ret; |
| ... | ... | @@ -50085,6 +50196,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtn_u64_f64(float64x1_t __p0) |
| 50085 | 50196 | __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtn_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19)); |
| 50086 | 50197 | return __ret; |
| 50087 | 50198 | } |
| 50199 | __ai __attribute__((target("neon"))) uint64_t vcvtns_u64_f32(float32_t __p0) { | |
| 50200 | uint64_t __ret; | |
| 50201 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtns_u64_f32(__p0)); | |
| 50202 | return __ret; | |
| 50203 | } | |
| 50088 | 50204 | __ai __attribute__((target("neon"))) uint64_t vcvtnd_u64_f64(float64_t __p0) { |
| 50089 | 50205 | uint64_t __ret; |
| 50090 | 50206 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtnd_u64_f64(__p0)); |
| ... | ... | @@ -50095,6 +50211,11 @@ __ai __attribute__((target("neon"))) int32_t vcvtps_s32_f32(float32_t __p0) { |
| 50095 | 50211 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtps_s32_f32(__p0)); |
| 50096 | 50212 | return __ret; |
| 50097 | 50213 | } |
| 50214 | __ai __attribute__((target("neon"))) int32_t vcvtpd_s32_f64(float64_t __p0) { | |
| 50215 | int32_t __ret; | |
| 50216 | __ret = __builtin_bit_cast(int32_t, __builtin_neon_vcvtpd_s32_f64(__p0)); | |
| 50217 | return __ret; | |
| 50218 | } | |
| 50098 | 50219 | #ifdef __LITTLE_ENDIAN__ |
| 50099 | 50220 | __ai __attribute__((target("neon"))) int64x2_t vcvtpq_s64_f64(float64x2_t __p0) { |
| 50100 | 50221 | int64x2_t __ret; |
| ... | ... | @@ -50116,6 +50237,11 @@ __ai __attribute__((target("neon"))) int64x1_t vcvtp_s64_f64(float64x1_t __p0) { |
| 50116 | 50237 | __ret = __builtin_bit_cast(int64x1_t, __builtin_neon_vcvtp_s64_v(__builtin_bit_cast(int8x8_t, __p0), 3)); |
| 50117 | 50238 | return __ret; |
| 50118 | 50239 | } |
| 50240 | __ai __attribute__((target("neon"))) int64_t vcvtps_s64_f32(float32_t __p0) { | |
| 50241 | int64_t __ret; | |
| 50242 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtps_s64_f32(__p0)); | |
| 50243 | return __ret; | |
| 50244 | } | |
| 50119 | 50245 | __ai __attribute__((target("neon"))) int64_t vcvtpd_s64_f64(float64_t __p0) { |
| 50120 | 50246 | int64_t __ret; |
| 50121 | 50247 | __ret = __builtin_bit_cast(int64_t, __builtin_neon_vcvtpd_s64_f64(__p0)); |
| ... | ... | @@ -50126,6 +50252,11 @@ __ai __attribute__((target("neon"))) uint32_t vcvtps_u32_f32(float32_t __p0) { |
| 50126 | 50252 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtps_u32_f32(__p0)); |
| 50127 | 50253 | return __ret; |
| 50128 | 50254 | } |
| 50255 | __ai __attribute__((target("neon"))) uint32_t vcvtpd_u32_f64(float64_t __p0) { | |
| 50256 | uint32_t __ret; | |
| 50257 | __ret = __builtin_bit_cast(uint32_t, __builtin_neon_vcvtpd_u32_f64(__p0)); | |
| 50258 | return __ret; | |
| 50259 | } | |
| 50129 | 50260 | #ifdef __LITTLE_ENDIAN__ |
| 50130 | 50261 | __ai __attribute__((target("neon"))) uint64x2_t vcvtpq_u64_f64(float64x2_t __p0) { |
| 50131 | 50262 | uint64x2_t __ret; |
| ... | ... | @@ -50147,6 +50278,11 @@ __ai __attribute__((target("neon"))) uint64x1_t vcvtp_u64_f64(float64x1_t __p0) |
| 50147 | 50278 | __ret = __builtin_bit_cast(uint64x1_t, __builtin_neon_vcvtp_u64_v(__builtin_bit_cast(int8x8_t, __p0), 19)); |
| 50148 | 50279 | return __ret; |
| 50149 | 50280 | } |
| 50281 | __ai __attribute__((target("neon"))) uint64_t vcvtps_u64_f32(float32_t __p0) { | |
| 50282 | uint64_t __ret; | |
| 50283 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtps_u64_f32(__p0)); | |
| 50284 | return __ret; | |
| 50285 | } | |
| 50150 | 50286 | __ai __attribute__((target("neon"))) uint64_t vcvtpd_u64_f64(float64_t __p0) { |
| 50151 | 50287 | uint64_t __ret; |
| 50152 | 50288 | __ret = __builtin_bit_cast(uint64_t, __builtin_neon_vcvtpd_u64_f64(__p0)); |
| ... | ... | @@ -50255,7 +50391,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa |
| 50255 | 50391 | #define vdupb_lane_p8(__p0, __p1) __extension__ ({ \ |
| 50256 | 50392 | poly8_t __ret; \ |
| 50257 | 50393 | poly8x8_t __s0 = __p0; \ |
| 50258 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_lane_i8(__s0, __p1)); \ | |
| 50394 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_lane_i8(__builtin_bit_cast(int8x8_t, __s0), __p1)); \ | |
| 50259 | 50395 | __ret; \ |
| 50260 | 50396 | }) |
| 50261 | 50397 | #else |
| ... | ... | @@ -50263,7 +50399,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa |
| 50263 | 50399 | poly8_t __ret; \ |
| 50264 | 50400 | poly8x8_t __s0 = __p0; \ |
| 50265 | 50401 | poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_8); \ |
| 50266 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_lane_i8(__rev0, __p1)); \ | |
| 50402 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_lane_i8(__builtin_bit_cast(int8x8_t, __rev0), __p1)); \ | |
| 50267 | 50403 | __ret; \ |
| 50268 | 50404 | }) |
| 50269 | 50405 | #endif |
| ... | ... | @@ -50272,7 +50408,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa |
| 50272 | 50408 | #define vduph_lane_p16(__p0, __p1) __extension__ ({ \ |
| 50273 | 50409 | poly16_t __ret; \ |
| 50274 | 50410 | poly16x4_t __s0 = __p0; \ |
| 50275 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_lane_i16(__s0, __p1)); \ | |
| 50411 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_lane_i16(__builtin_bit_cast(int16x4_t, __s0), __p1)); \ | |
| 50276 | 50412 | __ret; \ |
| 50277 | 50413 | }) |
| 50278 | 50414 | #else |
| ... | ... | @@ -50280,7 +50416,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa |
| 50280 | 50416 | poly16_t __ret; \ |
| 50281 | 50417 | poly16x4_t __s0 = __p0; \ |
| 50282 | 50418 | poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_64_16); \ |
| 50283 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_lane_i16(__rev0, __p1)); \ | |
| 50419 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_lane_i16(__builtin_bit_cast(int16x4_t, __rev0), __p1)); \ | |
| 50284 | 50420 | __ret; \ |
| 50285 | 50421 | }) |
| 50286 | 50422 | #endif |
| ... | ... | @@ -50506,7 +50642,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa |
| 50506 | 50642 | #define vdupb_laneq_p8(__p0, __p1) __extension__ ({ \ |
| 50507 | 50643 | poly8_t __ret; \ |
| 50508 | 50644 | poly8x16_t __s0 = __p0; \ |
| 50509 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_laneq_i8(__s0, __p1)); \ | |
| 50645 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_laneq_i8(__builtin_bit_cast(int8x16_t, __s0), __p1)); \ | |
| 50510 | 50646 | __ret; \ |
| 50511 | 50647 | }) |
| 50512 | 50648 | #else |
| ... | ... | @@ -50514,7 +50650,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa |
| 50514 | 50650 | poly8_t __ret; \ |
| 50515 | 50651 | poly8x16_t __s0 = __p0; \ |
| 50516 | 50652 | poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_8); \ |
| 50517 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_laneq_i8(__rev0, __p1)); \ | |
| 50653 | __ret = __builtin_bit_cast(poly8_t, __builtin_neon_vdupb_laneq_i8(__builtin_bit_cast(int8x16_t, __rev0), __p1)); \ | |
| 50518 | 50654 | __ret; \ |
| 50519 | 50655 | }) |
| 50520 | 50656 | #endif |
| ... | ... | @@ -50523,7 +50659,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa |
| 50523 | 50659 | #define vduph_laneq_p16(__p0, __p1) __extension__ ({ \ |
| 50524 | 50660 | poly16_t __ret; \ |
| 50525 | 50661 | poly16x8_t __s0 = __p0; \ |
| 50526 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_laneq_i16(__s0, __p1)); \ | |
| 50662 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_laneq_i16(__builtin_bit_cast(int16x8_t, __s0), __p1)); \ | |
| 50527 | 50663 | __ret; \ |
| 50528 | 50664 | }) |
| 50529 | 50665 | #else |
| ... | ... | @@ -50531,7 +50667,7 @@ __ai __attribute__((target("neon"))) float32x2_t vdiv_f32(float32x2_t __p0, floa |
| 50531 | 50667 | poly16_t __ret; \ |
| 50532 | 50668 | poly16x8_t __s0 = __p0; \ |
| 50533 | 50669 | poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_16); \ |
| 50534 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_laneq_i16(__rev0, __p1)); \ | |
| 50670 | __ret = __builtin_bit_cast(poly16_t, __builtin_neon_vduph_laneq_i16(__builtin_bit_cast(int16x8_t, __rev0), __p1)); \ | |
| 50535 | 50671 | __ret; \ |
| 50536 | 50672 | }) |
| 50537 | 50673 | #endif |
| ... | ... | @@ -52105,14 +52241,14 @@ __ai __attribute__((target("neon"))) float64x1_t vget_high_f64(float64x2_t __p0) |
| 52105 | 52241 | #define vget_lane_p64(__p0, __p1) __extension__ ({ \ |
| 52106 | 52242 | poly64_t __ret; \ |
| 52107 | 52243 | poly64x1_t __s0 = __p0; \ |
| 52108 | __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vget_lane_i64(__s0, __p1)); \ | |
| 52244 | __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vget_lane_i64(__builtin_bit_cast(int64x1_t, __s0), __p1)); \ | |
| 52109 | 52245 | __ret; \ |
| 52110 | 52246 | }) |
| 52111 | 52247 | #ifdef __LITTLE_ENDIAN__ |
| 52112 | 52248 | #define vgetq_lane_p64(__p0, __p1) __extension__ ({ \ |
| 52113 | 52249 | poly64_t __ret; \ |
| 52114 | 52250 | poly64x2_t __s0 = __p0; \ |
| 52115 | __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__s0, __p1)); \ | |
| 52251 | __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__builtin_bit_cast(int64x2_t, __s0), __p1)); \ | |
| 52116 | 52252 | __ret; \ |
| 52117 | 52253 | }) |
| 52118 | 52254 | #else |
| ... | ... | @@ -52120,13 +52256,13 @@ __ai __attribute__((target("neon"))) float64x1_t vget_high_f64(float64x2_t __p0) |
| 52120 | 52256 | poly64_t __ret; \ |
| 52121 | 52257 | poly64x2_t __s0 = __p0; \ |
| 52122 | 52258 | poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, __lane_reverse_128_64); \ |
| 52123 | __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__rev0, __p1)); \ | |
| 52259 | __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__builtin_bit_cast(int64x2_t, __rev0), __p1)); \ | |
| 52124 | 52260 | __ret; \ |
| 52125 | 52261 | }) |
| 52126 | 52262 | #define __noswap_vgetq_lane_p64(__p0, __p1) __extension__ ({ \ |
| 52127 | 52263 | poly64_t __ret; \ |
| 52128 | 52264 | poly64x2_t __s0 = __p0; \ |
| 52129 | __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__s0, __p1)); \ | |
| 52265 | __ret = __builtin_bit_cast(poly64_t, __builtin_neon_vgetq_lane_i64(__builtin_bit_cast(int64x2_t, __s0), __p1)); \ | |
| 52130 | 52266 | __ret; \ |
| 52131 | 52267 | }) |
| 52132 | 52268 | #endif |
| ... | ... | @@ -59743,20 +59879,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _ |
| 59743 | 59879 | }) |
| 59744 | 59880 | #ifdef __LITTLE_ENDIAN__ |
| 59745 | 59881 | #define vqrshrun_high_n_s32(__p0_716, __p1_716, __p2_716) __extension__ ({ \ |
| 59746 | int16x8_t __ret_716; \ | |
| 59747 | int16x4_t __s0_716 = __p0_716; \ | |
| 59882 | uint16x8_t __ret_716; \ | |
| 59883 | uint16x4_t __s0_716 = __p0_716; \ | |
| 59748 | 59884 | int32x4_t __s1_716 = __p1_716; \ |
| 59749 | __ret_716 = __builtin_bit_cast(int16x8_t, vcombine_s16(__builtin_bit_cast(int16x4_t, __s0_716), __builtin_bit_cast(int16x4_t, vqrshrun_n_s32(__s1_716, __p2_716)))); \ | |
| 59885 | __ret_716 = __builtin_bit_cast(uint16x8_t, vcombine_u16(__builtin_bit_cast(uint16x4_t, __s0_716), __builtin_bit_cast(uint16x4_t, vqrshrun_n_s32(__s1_716, __p2_716)))); \ | |
| 59750 | 59886 | __ret_716; \ |
| 59751 | 59887 | }) |
| 59752 | 59888 | #else |
| 59753 | 59889 | #define vqrshrun_high_n_s32(__p0_717, __p1_717, __p2_717) __extension__ ({ \ |
| 59754 | int16x8_t __ret_717; \ | |
| 59755 | int16x4_t __s0_717 = __p0_717; \ | |
| 59890 | uint16x8_t __ret_717; \ | |
| 59891 | uint16x4_t __s0_717 = __p0_717; \ | |
| 59756 | 59892 | int32x4_t __s1_717 = __p1_717; \ |
| 59757 | int16x4_t __rev0_717; __rev0_717 = __builtin_shufflevector(__s0_717, __s0_717, __lane_reverse_64_16); \ | |
| 59893 | uint16x4_t __rev0_717; __rev0_717 = __builtin_shufflevector(__s0_717, __s0_717, __lane_reverse_64_16); \ | |
| 59758 | 59894 | int32x4_t __rev1_717; __rev1_717 = __builtin_shufflevector(__s1_717, __s1_717, __lane_reverse_128_32); \ |
| 59759 | __ret_717 = __builtin_bit_cast(int16x8_t, __noswap_vcombine_s16(__builtin_bit_cast(int16x4_t, __rev0_717), __builtin_bit_cast(int16x4_t, __noswap_vqrshrun_n_s32(__rev1_717, __p2_717)))); \ | |
| 59895 | __ret_717 = __builtin_bit_cast(uint16x8_t, __noswap_vcombine_u16(__builtin_bit_cast(uint16x4_t, __rev0_717), __builtin_bit_cast(uint16x4_t, __noswap_vqrshrun_n_s32(__rev1_717, __p2_717)))); \ | |
| 59760 | 59896 | __ret_717 = __builtin_shufflevector(__ret_717, __ret_717, __lane_reverse_128_16); \ |
| 59761 | 59897 | __ret_717; \ |
| 59762 | 59898 | }) |
| ... | ... | @@ -59764,20 +59900,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _ |
| 59764 | 59900 | |
| 59765 | 59901 | #ifdef __LITTLE_ENDIAN__ |
| 59766 | 59902 | #define vqrshrun_high_n_s64(__p0_718, __p1_718, __p2_718) __extension__ ({ \ |
| 59767 | int32x4_t __ret_718; \ | |
| 59768 | int32x2_t __s0_718 = __p0_718; \ | |
| 59903 | uint32x4_t __ret_718; \ | |
| 59904 | uint32x2_t __s0_718 = __p0_718; \ | |
| 59769 | 59905 | int64x2_t __s1_718 = __p1_718; \ |
| 59770 | __ret_718 = __builtin_bit_cast(int32x4_t, vcombine_s32(__builtin_bit_cast(int32x2_t, __s0_718), __builtin_bit_cast(int32x2_t, vqrshrun_n_s64(__s1_718, __p2_718)))); \ | |
| 59906 | __ret_718 = __builtin_bit_cast(uint32x4_t, vcombine_u32(__builtin_bit_cast(uint32x2_t, __s0_718), __builtin_bit_cast(uint32x2_t, vqrshrun_n_s64(__s1_718, __p2_718)))); \ | |
| 59771 | 59907 | __ret_718; \ |
| 59772 | 59908 | }) |
| 59773 | 59909 | #else |
| 59774 | 59910 | #define vqrshrun_high_n_s64(__p0_719, __p1_719, __p2_719) __extension__ ({ \ |
| 59775 | int32x4_t __ret_719; \ | |
| 59776 | int32x2_t __s0_719 = __p0_719; \ | |
| 59911 | uint32x4_t __ret_719; \ | |
| 59912 | uint32x2_t __s0_719 = __p0_719; \ | |
| 59777 | 59913 | int64x2_t __s1_719 = __p1_719; \ |
| 59778 | int32x2_t __rev0_719; __rev0_719 = __builtin_shufflevector(__s0_719, __s0_719, __lane_reverse_64_32); \ | |
| 59914 | uint32x2_t __rev0_719; __rev0_719 = __builtin_shufflevector(__s0_719, __s0_719, __lane_reverse_64_32); \ | |
| 59779 | 59915 | int64x2_t __rev1_719; __rev1_719 = __builtin_shufflevector(__s1_719, __s1_719, __lane_reverse_128_64); \ |
| 59780 | __ret_719 = __builtin_bit_cast(int32x4_t, __noswap_vcombine_s32(__builtin_bit_cast(int32x2_t, __rev0_719), __builtin_bit_cast(int32x2_t, __noswap_vqrshrun_n_s64(__rev1_719, __p2_719)))); \ | |
| 59916 | __ret_719 = __builtin_bit_cast(uint32x4_t, __noswap_vcombine_u32(__builtin_bit_cast(uint32x2_t, __rev0_719), __builtin_bit_cast(uint32x2_t, __noswap_vqrshrun_n_s64(__rev1_719, __p2_719)))); \ | |
| 59781 | 59917 | __ret_719 = __builtin_shufflevector(__ret_719, __ret_719, __lane_reverse_128_32); \ |
| 59782 | 59918 | __ret_719; \ |
| 59783 | 59919 | }) |
| ... | ... | @@ -59785,20 +59921,20 @@ __ai __attribute__((target("neon"))) int16_t vqrshlh_s16(int16_t __p0, int16_t _ |
| 59785 | 59921 | |
| 59786 | 59922 | #ifdef __LITTLE_ENDIAN__ |
| 59787 | 59923 | #define vqrshrun_high_n_s16(__p0_720, __p1_720, __p2_720) __extension__ ({ \ |
| 59788 | int8x16_t __ret_720; \ | |
| 59789 | int8x8_t __s0_720 = __p0_720; \ | |
| 59924 | uint8x16_t __ret_720; \ | |
| 59925 | uint8x8_t __s0_720 = __p0_720; \ | |
| 59790 | 59926 | int16x8_t __s1_720 = __p1_720; \ |
| 59791 | __ret_720 = __builtin_bit_cast(int8x16_t, vcombine_s8(__builtin_bit_cast(int8x8_t, __s0_720), __builtin_bit_cast(int8x8_t, vqrshrun_n_s16(__s1_720, __p2_720)))); \ | |
| 59927 | __ret_720 = __builtin_bit_cast(uint8x16_t, vcombine_u8(__builtin_bit_cast(uint8x8_t, __s0_720), __builtin_bit_cast(uint8x8_t, vqrshrun_n_s16(__s1_720, __p2_720)))); \ | |
| 59792 | 59928 | __ret_720; \ |
| 59793 | 59929 | }) |
| 59794 | 59930 | #else |
| 59795 | 59931 | #define vqrshrun_high_n_s16(__p0_721, __p1_721, __p2_721) __extension__ ({ \ |
| 59796 | int8x16_t __ret_721; \ | |
| 59797 | int8x8_t __s0_721 = __p0_721; \ | |
| 59932 | uint8x16_t __ret_721; \ | |
| 59933 | uint8x8_t __s0_721 = __p0_721; \ | |
| 59798 | 59934 | int16x8_t __s1_721 = __p1_721; \ |
| 59799 | int8x8_t __rev0_721; __rev0_721 = __builtin_shufflevector(__s0_721, __s0_721, __lane_reverse_64_8); \ | |
| 59935 | uint8x8_t __rev0_721; __rev0_721 = __builtin_shufflevector(__s0_721, __s0_721, __lane_reverse_64_8); \ | |
| 59800 | 59936 | int16x8_t __rev1_721; __rev1_721 = __builtin_shufflevector(__s1_721, __s1_721, __lane_reverse_128_16); \ |
| 59801 | __ret_721 = __builtin_bit_cast(int8x16_t, __noswap_vcombine_s8(__builtin_bit_cast(int8x8_t, __rev0_721), __builtin_bit_cast(int8x8_t, __noswap_vqrshrun_n_s16(__rev1_721, __p2_721)))); \ | |
| 59937 | __ret_721 = __builtin_bit_cast(uint8x16_t, __noswap_vcombine_u8(__builtin_bit_cast(uint8x8_t, __rev0_721), __builtin_bit_cast(uint8x8_t, __noswap_vqrshrun_n_s16(__rev1_721, __p2_721)))); \ | |
| 59802 | 59938 | __ret_721 = __builtin_shufflevector(__ret_721, __ret_721, __lane_reverse_128_8); \ |
| 59803 | 59939 | __ret_721; \ |
| 59804 | 59940 | }) |
| ... | ... | @@ -60098,20 +60234,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __ |
| 60098 | 60234 | }) |
| 60099 | 60235 | #ifdef __LITTLE_ENDIAN__ |
| 60100 | 60236 | #define vqshrun_high_n_s32(__p0_734, __p1_734, __p2_734) __extension__ ({ \ |
| 60101 | int16x8_t __ret_734; \ | |
| 60102 | int16x4_t __s0_734 = __p0_734; \ | |
| 60237 | uint16x8_t __ret_734; \ | |
| 60238 | uint16x4_t __s0_734 = __p0_734; \ | |
| 60103 | 60239 | int32x4_t __s1_734 = __p1_734; \ |
| 60104 | __ret_734 = __builtin_bit_cast(int16x8_t, vcombine_s16(__builtin_bit_cast(int16x4_t, __s0_734), __builtin_bit_cast(int16x4_t, vqshrun_n_s32(__s1_734, __p2_734)))); \ | |
| 60240 | __ret_734 = __builtin_bit_cast(uint16x8_t, vcombine_u16(__builtin_bit_cast(uint16x4_t, __s0_734), __builtin_bit_cast(uint16x4_t, vqshrun_n_s32(__s1_734, __p2_734)))); \ | |
| 60105 | 60241 | __ret_734; \ |
| 60106 | 60242 | }) |
| 60107 | 60243 | #else |
| 60108 | 60244 | #define vqshrun_high_n_s32(__p0_735, __p1_735, __p2_735) __extension__ ({ \ |
| 60109 | int16x8_t __ret_735; \ | |
| 60110 | int16x4_t __s0_735 = __p0_735; \ | |
| 60245 | uint16x8_t __ret_735; \ | |
| 60246 | uint16x4_t __s0_735 = __p0_735; \ | |
| 60111 | 60247 | int32x4_t __s1_735 = __p1_735; \ |
| 60112 | int16x4_t __rev0_735; __rev0_735 = __builtin_shufflevector(__s0_735, __s0_735, __lane_reverse_64_16); \ | |
| 60248 | uint16x4_t __rev0_735; __rev0_735 = __builtin_shufflevector(__s0_735, __s0_735, __lane_reverse_64_16); \ | |
| 60113 | 60249 | int32x4_t __rev1_735; __rev1_735 = __builtin_shufflevector(__s1_735, __s1_735, __lane_reverse_128_32); \ |
| 60114 | __ret_735 = __builtin_bit_cast(int16x8_t, __noswap_vcombine_s16(__builtin_bit_cast(int16x4_t, __rev0_735), __builtin_bit_cast(int16x4_t, __noswap_vqshrun_n_s32(__rev1_735, __p2_735)))); \ | |
| 60250 | __ret_735 = __builtin_bit_cast(uint16x8_t, __noswap_vcombine_u16(__builtin_bit_cast(uint16x4_t, __rev0_735), __builtin_bit_cast(uint16x4_t, __noswap_vqshrun_n_s32(__rev1_735, __p2_735)))); \ | |
| 60115 | 60251 | __ret_735 = __builtin_shufflevector(__ret_735, __ret_735, __lane_reverse_128_16); \ |
| 60116 | 60252 | __ret_735; \ |
| 60117 | 60253 | }) |
| ... | ... | @@ -60119,20 +60255,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __ |
| 60119 | 60255 | |
| 60120 | 60256 | #ifdef __LITTLE_ENDIAN__ |
| 60121 | 60257 | #define vqshrun_high_n_s64(__p0_736, __p1_736, __p2_736) __extension__ ({ \ |
| 60122 | int32x4_t __ret_736; \ | |
| 60123 | int32x2_t __s0_736 = __p0_736; \ | |
| 60258 | uint32x4_t __ret_736; \ | |
| 60259 | uint32x2_t __s0_736 = __p0_736; \ | |
| 60124 | 60260 | int64x2_t __s1_736 = __p1_736; \ |
| 60125 | __ret_736 = __builtin_bit_cast(int32x4_t, vcombine_s32(__builtin_bit_cast(int32x2_t, __s0_736), __builtin_bit_cast(int32x2_t, vqshrun_n_s64(__s1_736, __p2_736)))); \ | |
| 60261 | __ret_736 = __builtin_bit_cast(uint32x4_t, vcombine_u32(__builtin_bit_cast(uint32x2_t, __s0_736), __builtin_bit_cast(uint32x2_t, vqshrun_n_s64(__s1_736, __p2_736)))); \ | |
| 60126 | 60262 | __ret_736; \ |
| 60127 | 60263 | }) |
| 60128 | 60264 | #else |
| 60129 | 60265 | #define vqshrun_high_n_s64(__p0_737, __p1_737, __p2_737) __extension__ ({ \ |
| 60130 | int32x4_t __ret_737; \ | |
| 60131 | int32x2_t __s0_737 = __p0_737; \ | |
| 60266 | uint32x4_t __ret_737; \ | |
| 60267 | uint32x2_t __s0_737 = __p0_737; \ | |
| 60132 | 60268 | int64x2_t __s1_737 = __p1_737; \ |
| 60133 | int32x2_t __rev0_737; __rev0_737 = __builtin_shufflevector(__s0_737, __s0_737, __lane_reverse_64_32); \ | |
| 60269 | uint32x2_t __rev0_737; __rev0_737 = __builtin_shufflevector(__s0_737, __s0_737, __lane_reverse_64_32); \ | |
| 60134 | 60270 | int64x2_t __rev1_737; __rev1_737 = __builtin_shufflevector(__s1_737, __s1_737, __lane_reverse_128_64); \ |
| 60135 | __ret_737 = __builtin_bit_cast(int32x4_t, __noswap_vcombine_s32(__builtin_bit_cast(int32x2_t, __rev0_737), __builtin_bit_cast(int32x2_t, __noswap_vqshrun_n_s64(__rev1_737, __p2_737)))); \ | |
| 60271 | __ret_737 = __builtin_bit_cast(uint32x4_t, __noswap_vcombine_u32(__builtin_bit_cast(uint32x2_t, __rev0_737), __builtin_bit_cast(uint32x2_t, __noswap_vqshrun_n_s64(__rev1_737, __p2_737)))); \ | |
| 60136 | 60272 | __ret_737 = __builtin_shufflevector(__ret_737, __ret_737, __lane_reverse_128_32); \ |
| 60137 | 60273 | __ret_737; \ |
| 60138 | 60274 | }) |
| ... | ... | @@ -60140,20 +60276,20 @@ __ai __attribute__((target("neon"))) int16_t vqshlh_s16(int16_t __p0, int16_t __ |
| 60140 | 60276 | |
| 60141 | 60277 | #ifdef __LITTLE_ENDIAN__ |
| 60142 | 60278 | #define vqshrun_high_n_s16(__p0_738, __p1_738, __p2_738) __extension__ ({ \ |
| 60143 | int8x16_t __ret_738; \ | |
| 60144 | int8x8_t __s0_738 = __p0_738; \ | |
| 60279 | uint8x16_t __ret_738; \ | |
| 60280 | uint8x8_t __s0_738 = __p0_738; \ | |
| 60145 | 60281 | int16x8_t __s1_738 = __p1_738; \ |
| 60146 | __ret_738 = __builtin_bit_cast(int8x16_t, vcombine_s8(__builtin_bit_cast(int8x8_t, __s0_738), __builtin_bit_cast(int8x8_t, vqshrun_n_s16(__s1_738, __p2_738)))); \ | |
| 60282 | __ret_738 = __builtin_bit_cast(uint8x16_t, vcombine_u8(__builtin_bit_cast(uint8x8_t, __s0_738), __builtin_bit_cast(uint8x8_t, vqshrun_n_s16(__s1_738, __p2_738)))); \ | |
| 60147 | 60283 | __ret_738; \ |
| 60148 | 60284 | }) |
| 60149 | 60285 | #else |
| 60150 | 60286 | #define vqshrun_high_n_s16(__p0_739, __p1_739, __p2_739) __extension__ ({ \ |
| 60151 | int8x16_t __ret_739; \ | |
| 60152 | int8x8_t __s0_739 = __p0_739; \ | |
| 60287 | uint8x16_t __ret_739; \ | |
| 60288 | uint8x8_t __s0_739 = __p0_739; \ | |
| 60153 | 60289 | int16x8_t __s1_739 = __p1_739; \ |
| 60154 | int8x8_t __rev0_739; __rev0_739 = __builtin_shufflevector(__s0_739, __s0_739, __lane_reverse_64_8); \ | |
| 60290 | uint8x8_t __rev0_739; __rev0_739 = __builtin_shufflevector(__s0_739, __s0_739, __lane_reverse_64_8); \ | |
| 60155 | 60291 | int16x8_t __rev1_739; __rev1_739 = __builtin_shufflevector(__s1_739, __s1_739, __lane_reverse_128_16); \ |
| 60156 | __ret_739 = __builtin_bit_cast(int8x16_t, __noswap_vcombine_s8(__builtin_bit_cast(int8x8_t, __rev0_739), __builtin_bit_cast(int8x8_t, __noswap_vqshrun_n_s16(__rev1_739, __p2_739)))); \ | |
| 60292 | __ret_739 = __builtin_bit_cast(uint8x16_t, __noswap_vcombine_u8(__builtin_bit_cast(uint8x8_t, __rev0_739), __builtin_bit_cast(uint8x8_t, __noswap_vqshrun_n_s16(__rev1_739, __p2_739)))); \ | |
| 60157 | 60293 | __ret_739 = __builtin_shufflevector(__ret_739, __ret_739, __lane_reverse_128_8); \ |
| 60158 | 60294 | __ret_739; \ |
| 60159 | 60295 | }) |
| ... | ... | @@ -64345,7 +64481,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i |
| 64345 | 64481 | poly64x1_t __ret; \ |
| 64346 | 64482 | poly64_t __s0 = __p0; \ |
| 64347 | 64483 | poly64x1_t __s1 = __p1; \ |
| 64348 | __ret = __builtin_bit_cast(poly64x1_t, __builtin_neon_vset_lane_i64(__s0, __s1, __p2)); \ | |
| 64484 | __ret = __builtin_bit_cast(poly64x1_t, __builtin_neon_vset_lane_i64(__s0, __builtin_bit_cast(int64x1_t, __s1), __p2)); \ | |
| 64349 | 64485 | __ret; \ |
| 64350 | 64486 | }) |
| 64351 | 64487 | #ifdef __LITTLE_ENDIAN__ |
| ... | ... | @@ -64353,7 +64489,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i |
| 64353 | 64489 | poly64x2_t __ret; \ |
| 64354 | 64490 | poly64_t __s0 = __p0; \ |
| 64355 | 64491 | poly64x2_t __s1 = __p1; \ |
| 64356 | __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __s1, __p2)); \ | |
| 64492 | __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __builtin_bit_cast(int64x2_t, __s1), __p2)); \ | |
| 64357 | 64493 | __ret; \ |
| 64358 | 64494 | }) |
| 64359 | 64495 | #else |
| ... | ... | @@ -64362,7 +64498,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i |
| 64362 | 64498 | poly64_t __s0 = __p0; \ |
| 64363 | 64499 | poly64x2_t __s1 = __p1; \ |
| 64364 | 64500 | poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, __lane_reverse_128_64); \ |
| 64365 | __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __rev1, __p2)); \ | |
| 64501 | __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __builtin_bit_cast(int64x2_t, __rev1), __p2)); \ | |
| 64366 | 64502 | __ret = __builtin_shufflevector(__ret, __ret, __lane_reverse_128_64); \ |
| 64367 | 64503 | __ret; \ |
| 64368 | 64504 | }) |
| ... | ... | @@ -64370,7 +64506,7 @@ __ai __attribute__((target("neon"))) int8x16_t vrsubhn_high_s16(int8x8_t __p0, i |
| 64370 | 64506 | poly64x2_t __ret; \ |
| 64371 | 64507 | poly64_t __s0 = __p0; \ |
| 64372 | 64508 | poly64x2_t __s1 = __p1; \ |
| 64373 | __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __s1, __p2)); \ | |
| 64509 | __ret = __builtin_bit_cast(poly64x2_t, __builtin_neon_vsetq_lane_i64(__s0, __builtin_bit_cast(int64x2_t, __s1), __p2)); \ | |
| 64374 | 64510 | __ret; \ |
| 64375 | 64511 | }) |
| 64376 | 64512 | #endif |
lib/include/arm_sme.h+8-8| ... | ... | @@ -796,8 +796,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x2 |
| 796 | 796 | void svdot_za16_mf8_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t); |
| 797 | 797 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x4_fpm))) |
| 798 | 798 | void svdot_za16_mf8_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t); |
| 799 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x1_fpm))) | |
| 800 | void svmla_single_za16_mf8_vg2x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 801 | 799 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x2_fpm))) |
| 802 | 800 | void svmla_single_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t); |
| 803 | 801 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x4_fpm))) |
| ... | ... | @@ -808,6 +806,8 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_ |
| 808 | 806 | void svmla_lane_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t); |
| 809 | 807 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_vg2x4_fpm))) |
| 810 | 808 | void svmla_lane_za16_mf8_vg2x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t); |
| 809 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x1_fpm))) | |
| 810 | void svmla_za16_mf8_vg2x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 811 | 811 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x2_fpm))) |
| 812 | 812 | void svmla_za16_mf8_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t); |
| 813 | 813 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x4_fpm))) |
| ... | ... | @@ -828,8 +828,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x |
| 828 | 828 | void svdot_za16_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t); |
| 829 | 829 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za16_mf8_vg1x4_fpm))) |
| 830 | 830 | void svdot_za16_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t); |
| 831 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x1_fpm))) | |
| 832 | void svmla_za16_vg2x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 833 | 831 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x2_fpm))) |
| 834 | 832 | void svmla_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t); |
| 835 | 833 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za16_mf8_vg2x4_fpm))) |
| ... | ... | @@ -840,6 +838,8 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8 |
| 840 | 838 | void svmla_lane_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t); |
| 841 | 839 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za16_mf8_vg2x4_fpm))) |
| 842 | 840 | void svmla_lane_za16_vg2x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t); |
| 841 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x1_fpm))) | |
| 842 | void svmla_za16_vg2x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 843 | 843 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x2_fpm))) |
| 844 | 844 | void svmla_za16_vg2x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t); |
| 845 | 845 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za16_mf8_vg2x4_fpm))) |
| ... | ... | @@ -860,8 +860,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x2 |
| 860 | 860 | void svdot_za32_mf8_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t); |
| 861 | 861 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x4_fpm))) |
| 862 | 862 | void svdot_za32_mf8_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t); |
| 863 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x1_fpm))) | |
| 864 | void svmla_single_za32_mf8_vg4x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 865 | 863 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x2_fpm))) |
| 866 | 864 | void svmla_single_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t); |
| 867 | 865 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x4_fpm))) |
| ... | ... | @@ -872,6 +870,8 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_ |
| 872 | 870 | void svmla_lane_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t); |
| 873 | 871 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_vg4x4_fpm))) |
| 874 | 872 | void svmla_lane_za32_mf8_vg4x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t); |
| 873 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x1_fpm))) | |
| 874 | void svmla_za32_mf8_vg4x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 875 | 875 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x2_fpm))) |
| 876 | 876 | void svmla_za32_mf8_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t); |
| 877 | 877 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x4_fpm))) |
| ... | ... | @@ -894,8 +894,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x |
| 894 | 894 | void svdot_za32_vg1x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t); |
| 895 | 895 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svdot_za32_mf8_vg1x4_fpm))) |
| 896 | 896 | void svdot_za32_vg1x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8x4_t, fpm_t); |
| 897 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x1_fpm))) | |
| 898 | void svmla_za32_vg4x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 899 | 897 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x2_fpm))) |
| 900 | 898 | void svmla_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, fpm_t); |
| 901 | 899 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_single_za32_mf8_vg4x4_fpm))) |
| ... | ... | @@ -906,6 +904,8 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8 |
| 906 | 904 | void svmla_lane_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8_t, uint64_t, fpm_t); |
| 907 | 905 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_lane_za32_mf8_vg4x4_fpm))) |
| 908 | 906 | void svmla_lane_za32_vg4x4_fpm(uint32_t, svmfloat8x4_t, svmfloat8_t, uint64_t, fpm_t); |
| 907 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x1_fpm))) | |
| 908 | void svmla_za32_vg4x1_fpm(uint32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 909 | 909 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x2_fpm))) |
| 910 | 910 | void svmla_za32_vg4x2_fpm(uint32_t, svmfloat8x2_t, svmfloat8x2_t, fpm_t); |
| 911 | 911 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sme_svmla_za32_mf8_vg4x4_fpm))) |
lib/include/arm_sve.h+4162-3782| ... | ... | @@ -4617,6 +4617,86 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x2))) |
| 4617 | 4617 | svbfloat16x2_t svminnm(svbfloat16x2_t, svbfloat16x2_t); |
| 4618 | 4618 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x4))) |
| 4619 | 4619 | svbfloat16x4_t svminnm(svbfloat16x4_t, svbfloat16x4_t); |
| 4620 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_bf16_x2))) | |
| 4621 | svbfloat16x2_t svmul_single_bf16_x2(svbfloat16x2_t, svbfloat16_t); | |
| 4622 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_bf16_x4))) | |
| 4623 | svbfloat16x4_t svmul_single_bf16_x4(svbfloat16x4_t, svbfloat16_t); | |
| 4624 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x2))) | |
| 4625 | svbfloat16x2_t svmul_bf16_x2(svbfloat16x2_t, svbfloat16x2_t); | |
| 4626 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x4))) | |
| 4627 | svbfloat16x4_t svmul_bf16_x4(svbfloat16x4_t, svbfloat16x4_t); | |
| 4628 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_single_bf16_x2))) | |
| 4629 | svbfloat16x2_t svscale_single_bf16_x2(svbfloat16x2_t, svint16_t); | |
| 4630 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_single_bf16_x4))) | |
| 4631 | svbfloat16x4_t svscale_single_bf16_x4(svbfloat16x4_t, svint16_t); | |
| 4632 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x2))) | |
| 4633 | svbfloat16x2_t svscale_bf16_x2(svbfloat16x2_t, svint16x2_t); | |
| 4634 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x4))) | |
| 4635 | svbfloat16x4_t svscale_bf16_x4(svbfloat16x4_t, svint16x4_t); | |
| 4636 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_bf16_x2))) | |
| 4637 | svbfloat16x2_t svmul(svbfloat16x2_t, svbfloat16_t); | |
| 4638 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_bf16_x4))) | |
| 4639 | svbfloat16x4_t svmul(svbfloat16x4_t, svbfloat16_t); | |
| 4640 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x2))) | |
| 4641 | svbfloat16x2_t svmul(svbfloat16x2_t, svbfloat16x2_t); | |
| 4642 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x4))) | |
| 4643 | svbfloat16x4_t svmul(svbfloat16x4_t, svbfloat16x4_t); | |
| 4644 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_single_bf16_x2))) | |
| 4645 | svbfloat16x2_t svscale(svbfloat16x2_t, svint16_t); | |
| 4646 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_single_bf16_x4))) | |
| 4647 | svbfloat16x4_t svscale(svbfloat16x4_t, svint16_t); | |
| 4648 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x2))) | |
| 4649 | svbfloat16x2_t svscale(svbfloat16x2_t, svint16x2_t); | |
| 4650 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x4))) | |
| 4651 | svbfloat16x4_t svscale(svbfloat16x4_t, svint16x4_t); | |
| 4652 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f64_x2))) | |
| 4653 | svfloat64x2_t svmul_single_f64_x2(svfloat64x2_t, svfloat64_t); | |
| 4654 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f32_x2))) | |
| 4655 | svfloat32x2_t svmul_single_f32_x2(svfloat32x2_t, svfloat32_t); | |
| 4656 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f16_x2))) | |
| 4657 | svfloat16x2_t svmul_single_f16_x2(svfloat16x2_t, svfloat16_t); | |
| 4658 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f64_x4))) | |
| 4659 | svfloat64x4_t svmul_single_f64_x4(svfloat64x4_t, svfloat64_t); | |
| 4660 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f32_x4))) | |
| 4661 | svfloat32x4_t svmul_single_f32_x4(svfloat32x4_t, svfloat32_t); | |
| 4662 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f16_x4))) | |
| 4663 | svfloat16x4_t svmul_single_f16_x4(svfloat16x4_t, svfloat16_t); | |
| 4664 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f64_x2))) | |
| 4665 | svfloat64x2_t svmul_f64_x2(svfloat64x2_t, svfloat64x2_t); | |
| 4666 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f32_x2))) | |
| 4667 | svfloat32x2_t svmul_f32_x2(svfloat32x2_t, svfloat32x2_t); | |
| 4668 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f16_x2))) | |
| 4669 | svfloat16x2_t svmul_f16_x2(svfloat16x2_t, svfloat16x2_t); | |
| 4670 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f64_x4))) | |
| 4671 | svfloat64x4_t svmul_f64_x4(svfloat64x4_t, svfloat64x4_t); | |
| 4672 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f32_x4))) | |
| 4673 | svfloat32x4_t svmul_f32_x4(svfloat32x4_t, svfloat32x4_t); | |
| 4674 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f16_x4))) | |
| 4675 | svfloat16x4_t svmul_f16_x4(svfloat16x4_t, svfloat16x4_t); | |
| 4676 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f64_x2))) | |
| 4677 | svfloat64x2_t svmul(svfloat64x2_t, svfloat64_t); | |
| 4678 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f32_x2))) | |
| 4679 | svfloat32x2_t svmul(svfloat32x2_t, svfloat32_t); | |
| 4680 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f16_x2))) | |
| 4681 | svfloat16x2_t svmul(svfloat16x2_t, svfloat16_t); | |
| 4682 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f64_x4))) | |
| 4683 | svfloat64x4_t svmul(svfloat64x4_t, svfloat64_t); | |
| 4684 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f32_x4))) | |
| 4685 | svfloat32x4_t svmul(svfloat32x4_t, svfloat32_t); | |
| 4686 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_single_f16_x4))) | |
| 4687 | svfloat16x4_t svmul(svfloat16x4_t, svfloat16_t); | |
| 4688 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f64_x2))) | |
| 4689 | svfloat64x2_t svmul(svfloat64x2_t, svfloat64x2_t); | |
| 4690 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f32_x2))) | |
| 4691 | svfloat32x2_t svmul(svfloat32x2_t, svfloat32x2_t); | |
| 4692 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f16_x2))) | |
| 4693 | svfloat16x2_t svmul(svfloat16x2_t, svfloat16x2_t); | |
| 4694 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f64_x4))) | |
| 4695 | svfloat64x4_t svmul(svfloat64x4_t, svfloat64x4_t); | |
| 4696 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f32_x4))) | |
| 4697 | svfloat32x4_t svmul(svfloat32x4_t, svfloat32x4_t); | |
| 4698 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_f16_x4))) | |
| 4699 | svfloat16x4_t svmul(svfloat16x4_t, svfloat16x4_t); | |
| 4620 | 4700 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadda_f64))) |
| 4621 | 4701 | float64_t svadda_f64(svbool_t, float64_t, svfloat64_t); |
| 4622 | 4702 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadda_f32))) |
| ... | ... | @@ -4655,18 +4735,6 @@ __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u32base_s32in |
| 4655 | 4735 | svuint32_t svadrw_u32base_s32index(svuint32_t, svint32_t); |
| 4656 | 4736 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u64base_s64index))) |
| 4657 | 4737 | svuint64_t svadrw_u64base_s64index(svuint64_t, svint64_t); |
| 4658 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u32))) | |
| 4659 | svuint32_t svcompact_u32(svbool_t, svuint32_t); | |
| 4660 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u64))) | |
| 4661 | svuint64_t svcompact_u64(svbool_t, svuint64_t); | |
| 4662 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f64))) | |
| 4663 | svfloat64_t svcompact_f64(svbool_t, svfloat64_t); | |
| 4664 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f32))) | |
| 4665 | svfloat32_t svcompact_f32(svbool_t, svfloat32_t); | |
| 4666 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s32))) | |
| 4667 | svint32_t svcompact_s32(svbool_t, svint32_t); | |
| 4668 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s64))) | |
| 4669 | svint64_t svcompact_s64(svbool_t, svint64_t); | |
| 4670 | 4738 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u32base_index_u32))) |
| 4671 | 4739 | svuint32_t svld1_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t); |
| 4672 | 4740 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u64base_index_u64))) |
| ... | ... | @@ -5923,18 +5991,6 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u32base_s32i |
| 5923 | 5991 | svuint32_t svadrw_index(svuint32_t, svint32_t); |
| 5924 | 5992 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadrw_u64base_s64index))) |
| 5925 | 5993 | svuint64_t svadrw_index(svuint64_t, svint64_t); |
| 5926 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u32))) | |
| 5927 | svuint32_t svcompact(svbool_t, svuint32_t); | |
| 5928 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u64))) | |
| 5929 | svuint64_t svcompact(svbool_t, svuint64_t); | |
| 5930 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f64))) | |
| 5931 | svfloat64_t svcompact(svbool_t, svfloat64_t); | |
| 5932 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f32))) | |
| 5933 | svfloat32_t svcompact(svbool_t, svfloat32_t); | |
| 5934 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s32))) | |
| 5935 | svint32_t svcompact(svbool_t, svint32_t); | |
| 5936 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s64))) | |
| 5937 | svint64_t svcompact(svbool_t, svint64_t); | |
| 5938 | 5994 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u32base_index_u32))) |
| 5939 | 5995 | svuint32_t svld1_gather_index_u32(svbool_t, svuint32_t, int64_t); |
| 5940 | 5996 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_gather_u64base_index_u64))) |
| ... | ... | @@ -8777,3764 +8833,222 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzipq2_mf8))) |
| 8777 | 8833 | svmfloat8_t svzipq2(svmfloat8_t, svmfloat8_t); |
| 8778 | 8834 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzipq2_s16))) |
| 8779 | 8835 | svint16_t svzipq2(svint16_t, svint16_t); |
| 8780 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmmla_f32))) | |
| 8781 | svfloat32_t svbfmmla_f32(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 8782 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmmla_f32))) | |
| 8783 | svfloat32_t svbfmmla(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 8784 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_n_f32))) | |
| 8785 | svfloat32_t svbfdot_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 8786 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_f32))) | |
| 8787 | svfloat32_t svbfdot_f32(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 8788 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_lane_f32))) | |
| 8789 | svfloat32_t svbfdot_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 8790 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_n_f32))) | |
| 8791 | svfloat32_t svbfmlalb_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 8792 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_f32))) | |
| 8793 | svfloat32_t svbfmlalb_f32(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 8794 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_lane_f32))) | |
| 8795 | svfloat32_t svbfmlalb_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 8796 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_n_f32))) | |
| 8797 | svfloat32_t svbfmlalt_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 8798 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_f32))) | |
| 8799 | svfloat32_t svbfmlalt_f32(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 8800 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_lane_f32))) | |
| 8801 | svfloat32_t svbfmlalt_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 8802 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_m))) | |
| 8803 | svbfloat16_t svcvt_bf16_f32_m(svbfloat16_t, svbool_t, svfloat32_t); | |
| 8804 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_x))) | |
| 8805 | svbfloat16_t svcvt_bf16_f32_x(svbool_t, svfloat32_t); | |
| 8806 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_z))) | |
| 8807 | svbfloat16_t svcvt_bf16_f32_z(svbool_t, svfloat32_t); | |
| 8808 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_m))) | |
| 8809 | svbfloat16_t svcvtnt_bf16_f32_m(svbfloat16_t, svbool_t, svfloat32_t); | |
| 8810 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_n_f32))) | |
| 8811 | svfloat32_t svbfdot(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 8812 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_f32))) | |
| 8813 | svfloat32_t svbfdot(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 8814 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_lane_f32))) | |
| 8815 | svfloat32_t svbfdot_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 8816 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_n_f32))) | |
| 8817 | svfloat32_t svbfmlalb(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 8818 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_f32))) | |
| 8819 | svfloat32_t svbfmlalb(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 8820 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_lane_f32))) | |
| 8821 | svfloat32_t svbfmlalb_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 8822 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_n_f32))) | |
| 8823 | svfloat32_t svbfmlalt(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 8824 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_f32))) | |
| 8825 | svfloat32_t svbfmlalt(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 8826 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_lane_f32))) | |
| 8827 | svfloat32_t svbfmlalt_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 8828 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_m))) | |
| 8829 | svbfloat16_t svcvt_bf16_m(svbfloat16_t, svbool_t, svfloat32_t); | |
| 8830 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_x))) | |
| 8831 | svbfloat16_t svcvt_bf16_x(svbool_t, svfloat32_t); | |
| 8832 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_z))) | |
| 8833 | svbfloat16_t svcvt_bf16_z(svbool_t, svfloat32_t); | |
| 8834 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_m))) | |
| 8835 | svbfloat16_t svcvtnt_bf16_m(svbfloat16_t, svbool_t, svfloat32_t); | |
| 8836 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32))) | |
| 8837 | svfloat32_t svmmla_f32(svfloat32_t, svfloat32_t, svfloat32_t); | |
| 8838 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32))) | |
| 8839 | svfloat32_t svmmla(svfloat32_t, svfloat32_t, svfloat32_t); | |
| 8840 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u8))) | |
| 8841 | svuint8_t svld1ro_u8(svbool_t, uint8_t const *); | |
| 8842 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u32))) | |
| 8843 | svuint32_t svld1ro_u32(svbool_t, uint32_t const *); | |
| 8844 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u64))) | |
| 8845 | svuint64_t svld1ro_u64(svbool_t, uint64_t const *); | |
| 8846 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u16))) | |
| 8847 | svuint16_t svld1ro_u16(svbool_t, uint16_t const *); | |
| 8848 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_bf16))) | |
| 8849 | svbfloat16_t svld1ro_bf16(svbool_t, bfloat16_t const *); | |
| 8850 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s8))) | |
| 8851 | svint8_t svld1ro_s8(svbool_t, int8_t const *); | |
| 8852 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f64))) | |
| 8853 | svfloat64_t svld1ro_f64(svbool_t, float64_t const *); | |
| 8854 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f32))) | |
| 8855 | svfloat32_t svld1ro_f32(svbool_t, float32_t const *); | |
| 8856 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f16))) | |
| 8857 | svfloat16_t svld1ro_f16(svbool_t, float16_t const *); | |
| 8858 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s32))) | |
| 8859 | svint32_t svld1ro_s32(svbool_t, int32_t const *); | |
| 8860 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s64))) | |
| 8861 | svint64_t svld1ro_s64(svbool_t, int64_t const *); | |
| 8862 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_mf8))) | |
| 8863 | svmfloat8_t svld1ro_mf8(svbool_t, mfloat8_t const *); | |
| 8864 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s16))) | |
| 8865 | svint16_t svld1ro_s16(svbool_t, int16_t const *); | |
| 8866 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f64))) | |
| 8867 | svfloat64_t svmmla_f64(svfloat64_t, svfloat64_t, svfloat64_t); | |
| 8868 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u8))) | |
| 8869 | svuint8_t svtrn1q_u8(svuint8_t, svuint8_t); | |
| 8870 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u32))) | |
| 8871 | svuint32_t svtrn1q_u32(svuint32_t, svuint32_t); | |
| 8872 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u64))) | |
| 8873 | svuint64_t svtrn1q_u64(svuint64_t, svuint64_t); | |
| 8874 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u16))) | |
| 8875 | svuint16_t svtrn1q_u16(svuint16_t, svuint16_t); | |
| 8876 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_bf16))) | |
| 8877 | svbfloat16_t svtrn1q_bf16(svbfloat16_t, svbfloat16_t); | |
| 8878 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s8))) | |
| 8879 | svint8_t svtrn1q_s8(svint8_t, svint8_t); | |
| 8880 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f64))) | |
| 8881 | svfloat64_t svtrn1q_f64(svfloat64_t, svfloat64_t); | |
| 8882 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f32))) | |
| 8883 | svfloat32_t svtrn1q_f32(svfloat32_t, svfloat32_t); | |
| 8884 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f16))) | |
| 8885 | svfloat16_t svtrn1q_f16(svfloat16_t, svfloat16_t); | |
| 8886 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s32))) | |
| 8887 | svint32_t svtrn1q_s32(svint32_t, svint32_t); | |
| 8888 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s64))) | |
| 8889 | svint64_t svtrn1q_s64(svint64_t, svint64_t); | |
| 8890 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s16))) | |
| 8891 | svint16_t svtrn1q_s16(svint16_t, svint16_t); | |
| 8892 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u8))) | |
| 8893 | svuint8_t svtrn2q_u8(svuint8_t, svuint8_t); | |
| 8894 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u32))) | |
| 8895 | svuint32_t svtrn2q_u32(svuint32_t, svuint32_t); | |
| 8896 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u64))) | |
| 8897 | svuint64_t svtrn2q_u64(svuint64_t, svuint64_t); | |
| 8898 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u16))) | |
| 8899 | svuint16_t svtrn2q_u16(svuint16_t, svuint16_t); | |
| 8900 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_bf16))) | |
| 8901 | svbfloat16_t svtrn2q_bf16(svbfloat16_t, svbfloat16_t); | |
| 8902 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s8))) | |
| 8903 | svint8_t svtrn2q_s8(svint8_t, svint8_t); | |
| 8904 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f64))) | |
| 8905 | svfloat64_t svtrn2q_f64(svfloat64_t, svfloat64_t); | |
| 8906 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f32))) | |
| 8907 | svfloat32_t svtrn2q_f32(svfloat32_t, svfloat32_t); | |
| 8908 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f16))) | |
| 8909 | svfloat16_t svtrn2q_f16(svfloat16_t, svfloat16_t); | |
| 8910 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s32))) | |
| 8911 | svint32_t svtrn2q_s32(svint32_t, svint32_t); | |
| 8912 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s64))) | |
| 8913 | svint64_t svtrn2q_s64(svint64_t, svint64_t); | |
| 8914 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s16))) | |
| 8915 | svint16_t svtrn2q_s16(svint16_t, svint16_t); | |
| 8916 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u8))) | |
| 8917 | svuint8_t svuzp1q_u8(svuint8_t, svuint8_t); | |
| 8918 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u32))) | |
| 8919 | svuint32_t svuzp1q_u32(svuint32_t, svuint32_t); | |
| 8920 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u64))) | |
| 8921 | svuint64_t svuzp1q_u64(svuint64_t, svuint64_t); | |
| 8922 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u16))) | |
| 8923 | svuint16_t svuzp1q_u16(svuint16_t, svuint16_t); | |
| 8924 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_bf16))) | |
| 8925 | svbfloat16_t svuzp1q_bf16(svbfloat16_t, svbfloat16_t); | |
| 8926 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s8))) | |
| 8927 | svint8_t svuzp1q_s8(svint8_t, svint8_t); | |
| 8928 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f64))) | |
| 8929 | svfloat64_t svuzp1q_f64(svfloat64_t, svfloat64_t); | |
| 8930 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f32))) | |
| 8931 | svfloat32_t svuzp1q_f32(svfloat32_t, svfloat32_t); | |
| 8932 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f16))) | |
| 8933 | svfloat16_t svuzp1q_f16(svfloat16_t, svfloat16_t); | |
| 8934 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s32))) | |
| 8935 | svint32_t svuzp1q_s32(svint32_t, svint32_t); | |
| 8936 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s64))) | |
| 8937 | svint64_t svuzp1q_s64(svint64_t, svint64_t); | |
| 8938 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s16))) | |
| 8939 | svint16_t svuzp1q_s16(svint16_t, svint16_t); | |
| 8940 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u8))) | |
| 8941 | svuint8_t svuzp2q_u8(svuint8_t, svuint8_t); | |
| 8942 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u32))) | |
| 8943 | svuint32_t svuzp2q_u32(svuint32_t, svuint32_t); | |
| 8944 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u64))) | |
| 8945 | svuint64_t svuzp2q_u64(svuint64_t, svuint64_t); | |
| 8946 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u16))) | |
| 8947 | svuint16_t svuzp2q_u16(svuint16_t, svuint16_t); | |
| 8948 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_bf16))) | |
| 8949 | svbfloat16_t svuzp2q_bf16(svbfloat16_t, svbfloat16_t); | |
| 8950 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s8))) | |
| 8951 | svint8_t svuzp2q_s8(svint8_t, svint8_t); | |
| 8952 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f64))) | |
| 8953 | svfloat64_t svuzp2q_f64(svfloat64_t, svfloat64_t); | |
| 8954 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f32))) | |
| 8955 | svfloat32_t svuzp2q_f32(svfloat32_t, svfloat32_t); | |
| 8956 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f16))) | |
| 8957 | svfloat16_t svuzp2q_f16(svfloat16_t, svfloat16_t); | |
| 8958 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s32))) | |
| 8959 | svint32_t svuzp2q_s32(svint32_t, svint32_t); | |
| 8960 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s64))) | |
| 8961 | svint64_t svuzp2q_s64(svint64_t, svint64_t); | |
| 8962 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s16))) | |
| 8963 | svint16_t svuzp2q_s16(svint16_t, svint16_t); | |
| 8964 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u8))) | |
| 8965 | svuint8_t svzip1q_u8(svuint8_t, svuint8_t); | |
| 8966 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u32))) | |
| 8967 | svuint32_t svzip1q_u32(svuint32_t, svuint32_t); | |
| 8968 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u64))) | |
| 8969 | svuint64_t svzip1q_u64(svuint64_t, svuint64_t); | |
| 8970 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u16))) | |
| 8971 | svuint16_t svzip1q_u16(svuint16_t, svuint16_t); | |
| 8972 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_bf16))) | |
| 8973 | svbfloat16_t svzip1q_bf16(svbfloat16_t, svbfloat16_t); | |
| 8974 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s8))) | |
| 8975 | svint8_t svzip1q_s8(svint8_t, svint8_t); | |
| 8976 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f64))) | |
| 8977 | svfloat64_t svzip1q_f64(svfloat64_t, svfloat64_t); | |
| 8978 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f32))) | |
| 8979 | svfloat32_t svzip1q_f32(svfloat32_t, svfloat32_t); | |
| 8980 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f16))) | |
| 8981 | svfloat16_t svzip1q_f16(svfloat16_t, svfloat16_t); | |
| 8982 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s32))) | |
| 8983 | svint32_t svzip1q_s32(svint32_t, svint32_t); | |
| 8984 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s64))) | |
| 8985 | svint64_t svzip1q_s64(svint64_t, svint64_t); | |
| 8986 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s16))) | |
| 8987 | svint16_t svzip1q_s16(svint16_t, svint16_t); | |
| 8988 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u8))) | |
| 8989 | svuint8_t svzip2q_u8(svuint8_t, svuint8_t); | |
| 8990 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u32))) | |
| 8991 | svuint32_t svzip2q_u32(svuint32_t, svuint32_t); | |
| 8992 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u64))) | |
| 8993 | svuint64_t svzip2q_u64(svuint64_t, svuint64_t); | |
| 8994 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u16))) | |
| 8995 | svuint16_t svzip2q_u16(svuint16_t, svuint16_t); | |
| 8996 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_bf16))) | |
| 8997 | svbfloat16_t svzip2q_bf16(svbfloat16_t, svbfloat16_t); | |
| 8998 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s8))) | |
| 8999 | svint8_t svzip2q_s8(svint8_t, svint8_t); | |
| 9000 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f64))) | |
| 9001 | svfloat64_t svzip2q_f64(svfloat64_t, svfloat64_t); | |
| 9002 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f32))) | |
| 9003 | svfloat32_t svzip2q_f32(svfloat32_t, svfloat32_t); | |
| 9004 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f16))) | |
| 9005 | svfloat16_t svzip2q_f16(svfloat16_t, svfloat16_t); | |
| 9006 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s32))) | |
| 9007 | svint32_t svzip2q_s32(svint32_t, svint32_t); | |
| 9008 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s64))) | |
| 9009 | svint64_t svzip2q_s64(svint64_t, svint64_t); | |
| 9010 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s16))) | |
| 9011 | svint16_t svzip2q_s16(svint16_t, svint16_t); | |
| 9012 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u8))) | |
| 9013 | svuint8_t svld1ro(svbool_t, uint8_t const *); | |
| 9014 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u32))) | |
| 9015 | svuint32_t svld1ro(svbool_t, uint32_t const *); | |
| 9016 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u64))) | |
| 9017 | svuint64_t svld1ro(svbool_t, uint64_t const *); | |
| 9018 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u16))) | |
| 9019 | svuint16_t svld1ro(svbool_t, uint16_t const *); | |
| 9020 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_bf16))) | |
| 9021 | svbfloat16_t svld1ro(svbool_t, bfloat16_t const *); | |
| 9022 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s8))) | |
| 9023 | svint8_t svld1ro(svbool_t, int8_t const *); | |
| 9024 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f64))) | |
| 9025 | svfloat64_t svld1ro(svbool_t, float64_t const *); | |
| 9026 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f32))) | |
| 9027 | svfloat32_t svld1ro(svbool_t, float32_t const *); | |
| 9028 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f16))) | |
| 9029 | svfloat16_t svld1ro(svbool_t, float16_t const *); | |
| 9030 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s32))) | |
| 9031 | svint32_t svld1ro(svbool_t, int32_t const *); | |
| 9032 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s64))) | |
| 9033 | svint64_t svld1ro(svbool_t, int64_t const *); | |
| 9034 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_mf8))) | |
| 9035 | svmfloat8_t svld1ro(svbool_t, mfloat8_t const *); | |
| 9036 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s16))) | |
| 9037 | svint16_t svld1ro(svbool_t, int16_t const *); | |
| 9038 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f64))) | |
| 9039 | svfloat64_t svmmla(svfloat64_t, svfloat64_t, svfloat64_t); | |
| 9040 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u8))) | |
| 9041 | svuint8_t svtrn1q(svuint8_t, svuint8_t); | |
| 9042 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u32))) | |
| 9043 | svuint32_t svtrn1q(svuint32_t, svuint32_t); | |
| 9044 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u64))) | |
| 9045 | svuint64_t svtrn1q(svuint64_t, svuint64_t); | |
| 9046 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u16))) | |
| 9047 | svuint16_t svtrn1q(svuint16_t, svuint16_t); | |
| 9048 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_bf16))) | |
| 9049 | svbfloat16_t svtrn1q(svbfloat16_t, svbfloat16_t); | |
| 9050 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s8))) | |
| 9051 | svint8_t svtrn1q(svint8_t, svint8_t); | |
| 9052 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f64))) | |
| 9053 | svfloat64_t svtrn1q(svfloat64_t, svfloat64_t); | |
| 9054 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f32))) | |
| 9055 | svfloat32_t svtrn1q(svfloat32_t, svfloat32_t); | |
| 9056 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f16))) | |
| 9057 | svfloat16_t svtrn1q(svfloat16_t, svfloat16_t); | |
| 9058 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s32))) | |
| 9059 | svint32_t svtrn1q(svint32_t, svint32_t); | |
| 9060 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s64))) | |
| 9061 | svint64_t svtrn1q(svint64_t, svint64_t); | |
| 9062 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s16))) | |
| 9063 | svint16_t svtrn1q(svint16_t, svint16_t); | |
| 9064 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u8))) | |
| 9065 | svuint8_t svtrn2q(svuint8_t, svuint8_t); | |
| 9066 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u32))) | |
| 9067 | svuint32_t svtrn2q(svuint32_t, svuint32_t); | |
| 9068 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u64))) | |
| 9069 | svuint64_t svtrn2q(svuint64_t, svuint64_t); | |
| 9070 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u16))) | |
| 9071 | svuint16_t svtrn2q(svuint16_t, svuint16_t); | |
| 9072 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_bf16))) | |
| 9073 | svbfloat16_t svtrn2q(svbfloat16_t, svbfloat16_t); | |
| 9074 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s8))) | |
| 9075 | svint8_t svtrn2q(svint8_t, svint8_t); | |
| 9076 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f64))) | |
| 9077 | svfloat64_t svtrn2q(svfloat64_t, svfloat64_t); | |
| 9078 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f32))) | |
| 9079 | svfloat32_t svtrn2q(svfloat32_t, svfloat32_t); | |
| 9080 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f16))) | |
| 9081 | svfloat16_t svtrn2q(svfloat16_t, svfloat16_t); | |
| 9082 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s32))) | |
| 9083 | svint32_t svtrn2q(svint32_t, svint32_t); | |
| 9084 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s64))) | |
| 9085 | svint64_t svtrn2q(svint64_t, svint64_t); | |
| 9086 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s16))) | |
| 9087 | svint16_t svtrn2q(svint16_t, svint16_t); | |
| 9088 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u8))) | |
| 9089 | svuint8_t svuzp1q(svuint8_t, svuint8_t); | |
| 9090 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u32))) | |
| 9091 | svuint32_t svuzp1q(svuint32_t, svuint32_t); | |
| 9092 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u64))) | |
| 9093 | svuint64_t svuzp1q(svuint64_t, svuint64_t); | |
| 9094 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u16))) | |
| 9095 | svuint16_t svuzp1q(svuint16_t, svuint16_t); | |
| 9096 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_bf16))) | |
| 9097 | svbfloat16_t svuzp1q(svbfloat16_t, svbfloat16_t); | |
| 9098 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s8))) | |
| 9099 | svint8_t svuzp1q(svint8_t, svint8_t); | |
| 9100 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f64))) | |
| 9101 | svfloat64_t svuzp1q(svfloat64_t, svfloat64_t); | |
| 9102 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f32))) | |
| 9103 | svfloat32_t svuzp1q(svfloat32_t, svfloat32_t); | |
| 9104 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f16))) | |
| 9105 | svfloat16_t svuzp1q(svfloat16_t, svfloat16_t); | |
| 9106 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s32))) | |
| 9107 | svint32_t svuzp1q(svint32_t, svint32_t); | |
| 9108 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s64))) | |
| 9109 | svint64_t svuzp1q(svint64_t, svint64_t); | |
| 9110 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s16))) | |
| 9111 | svint16_t svuzp1q(svint16_t, svint16_t); | |
| 9112 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u8))) | |
| 9113 | svuint8_t svuzp2q(svuint8_t, svuint8_t); | |
| 9114 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u32))) | |
| 9115 | svuint32_t svuzp2q(svuint32_t, svuint32_t); | |
| 9116 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u64))) | |
| 9117 | svuint64_t svuzp2q(svuint64_t, svuint64_t); | |
| 9118 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u16))) | |
| 9119 | svuint16_t svuzp2q(svuint16_t, svuint16_t); | |
| 9120 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_bf16))) | |
| 9121 | svbfloat16_t svuzp2q(svbfloat16_t, svbfloat16_t); | |
| 9122 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s8))) | |
| 9123 | svint8_t svuzp2q(svint8_t, svint8_t); | |
| 9124 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f64))) | |
| 9125 | svfloat64_t svuzp2q(svfloat64_t, svfloat64_t); | |
| 9126 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f32))) | |
| 9127 | svfloat32_t svuzp2q(svfloat32_t, svfloat32_t); | |
| 9128 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f16))) | |
| 9129 | svfloat16_t svuzp2q(svfloat16_t, svfloat16_t); | |
| 9130 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s32))) | |
| 9131 | svint32_t svuzp2q(svint32_t, svint32_t); | |
| 9132 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s64))) | |
| 9133 | svint64_t svuzp2q(svint64_t, svint64_t); | |
| 9134 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s16))) | |
| 9135 | svint16_t svuzp2q(svint16_t, svint16_t); | |
| 9136 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u8))) | |
| 9137 | svuint8_t svzip1q(svuint8_t, svuint8_t); | |
| 9138 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u32))) | |
| 9139 | svuint32_t svzip1q(svuint32_t, svuint32_t); | |
| 9140 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u64))) | |
| 9141 | svuint64_t svzip1q(svuint64_t, svuint64_t); | |
| 9142 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u16))) | |
| 9143 | svuint16_t svzip1q(svuint16_t, svuint16_t); | |
| 9144 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_bf16))) | |
| 9145 | svbfloat16_t svzip1q(svbfloat16_t, svbfloat16_t); | |
| 9146 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s8))) | |
| 9147 | svint8_t svzip1q(svint8_t, svint8_t); | |
| 9148 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f64))) | |
| 9149 | svfloat64_t svzip1q(svfloat64_t, svfloat64_t); | |
| 9150 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f32))) | |
| 9151 | svfloat32_t svzip1q(svfloat32_t, svfloat32_t); | |
| 9152 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f16))) | |
| 9153 | svfloat16_t svzip1q(svfloat16_t, svfloat16_t); | |
| 9154 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s32))) | |
| 9155 | svint32_t svzip1q(svint32_t, svint32_t); | |
| 9156 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s64))) | |
| 9157 | svint64_t svzip1q(svint64_t, svint64_t); | |
| 9158 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s16))) | |
| 9159 | svint16_t svzip1q(svint16_t, svint16_t); | |
| 9160 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u8))) | |
| 9161 | svuint8_t svzip2q(svuint8_t, svuint8_t); | |
| 9162 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u32))) | |
| 9163 | svuint32_t svzip2q(svuint32_t, svuint32_t); | |
| 9164 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u64))) | |
| 9165 | svuint64_t svzip2q(svuint64_t, svuint64_t); | |
| 9166 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u16))) | |
| 9167 | svuint16_t svzip2q(svuint16_t, svuint16_t); | |
| 9168 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_bf16))) | |
| 9169 | svbfloat16_t svzip2q(svbfloat16_t, svbfloat16_t); | |
| 9170 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s8))) | |
| 9171 | svint8_t svzip2q(svint8_t, svint8_t); | |
| 9172 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f64))) | |
| 9173 | svfloat64_t svzip2q(svfloat64_t, svfloat64_t); | |
| 9174 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f32))) | |
| 9175 | svfloat32_t svzip2q(svfloat32_t, svfloat32_t); | |
| 9176 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f16))) | |
| 9177 | svfloat16_t svzip2q(svfloat16_t, svfloat16_t); | |
| 9178 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s32))) | |
| 9179 | svint32_t svzip2q(svint32_t, svint32_t); | |
| 9180 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s64))) | |
| 9181 | svint64_t svzip2q(svint64_t, svint64_t); | |
| 9182 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s16))) | |
| 9183 | svint16_t svzip2q(svint16_t, svint16_t); | |
| 9184 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_s32))) | |
| 9185 | svint32_t svmmla_s32(svint32_t, svint8_t, svint8_t); | |
| 9186 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_u32))) | |
| 9187 | svuint32_t svmmla_u32(svuint32_t, svuint8_t, svuint8_t); | |
| 9188 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusmmla_s32))) | |
| 9189 | svint32_t svusmmla_s32(svint32_t, svuint8_t, svint8_t); | |
| 9190 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_s32))) | |
| 9191 | svint32_t svmmla(svint32_t, svint8_t, svint8_t); | |
| 9192 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_u32))) | |
| 9193 | svuint32_t svmmla(svuint32_t, svuint8_t, svuint8_t); | |
| 9194 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusmmla_s32))) | |
| 9195 | svint32_t svusmmla(svint32_t, svuint8_t, svint8_t); | |
| 9196 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_n_s32))) | |
| 9197 | svint32_t svsudot_n_s32(svint32_t, svint8_t, uint8_t); | |
| 9198 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_s32))) | |
| 9199 | svint32_t svsudot_s32(svint32_t, svint8_t, svuint8_t); | |
| 9200 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_lane_s32))) | |
| 9201 | svint32_t svsudot_lane_s32(svint32_t, svint8_t, svuint8_t, uint64_t); | |
| 9202 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_n_s32))) | |
| 9203 | svint32_t svusdot_n_s32(svint32_t, svuint8_t, int8_t); | |
| 9204 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_s32))) | |
| 9205 | svint32_t svusdot_s32(svint32_t, svuint8_t, svint8_t); | |
| 9206 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_lane_s32))) | |
| 9207 | svint32_t svusdot_lane_s32(svint32_t, svuint8_t, svint8_t, uint64_t); | |
| 9208 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_n_s32))) | |
| 9209 | svint32_t svsudot(svint32_t, svint8_t, uint8_t); | |
| 9210 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_s32))) | |
| 9211 | svint32_t svsudot(svint32_t, svint8_t, svuint8_t); | |
| 9212 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_lane_s32))) | |
| 9213 | svint32_t svsudot_lane(svint32_t, svint8_t, svuint8_t, uint64_t); | |
| 9214 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_n_s32))) | |
| 9215 | svint32_t svusdot(svint32_t, svuint8_t, int8_t); | |
| 9216 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_s32))) | |
| 9217 | svint32_t svusdot(svint32_t, svuint8_t, svint8_t); | |
| 9218 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_lane_s32))) | |
| 9219 | svint32_t svusdot_lane(svint32_t, svuint8_t, svint8_t, uint64_t); | |
| 9220 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_u64))) | |
| 9221 | svuint64_t svrax1_u64(svuint64_t, svuint64_t); | |
| 9222 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_s64))) | |
| 9223 | svint64_t svrax1_s64(svint64_t, svint64_t); | |
| 9224 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_u64))) | |
| 9225 | svuint64_t svrax1(svuint64_t, svuint64_t); | |
| 9226 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_s64))) | |
| 9227 | svint64_t svrax1(svint64_t, svint64_t); | |
| 9228 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u32_z))) | |
| 9229 | svuint32_t svhistcnt_u32_z(svbool_t, svuint32_t, svuint32_t); | |
| 9230 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u64_z))) | |
| 9231 | svuint64_t svhistcnt_u64_z(svbool_t, svuint64_t, svuint64_t); | |
| 9232 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s32_z))) | |
| 9233 | svuint32_t svhistcnt_s32_z(svbool_t, svint32_t, svint32_t); | |
| 9234 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s64_z))) | |
| 9235 | svuint64_t svhistcnt_s64_z(svbool_t, svint64_t, svint64_t); | |
| 9236 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_u8))) | |
| 9237 | svuint8_t svhistseg_u8(svuint8_t, svuint8_t); | |
| 9238 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_s8))) | |
| 9239 | svuint8_t svhistseg_s8(svint8_t, svint8_t); | |
| 9240 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_u32))) | |
| 9241 | svuint32_t svldnt1_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t); | |
| 9242 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_u64))) | |
| 9243 | svuint64_t svldnt1_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9244 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_f64))) | |
| 9245 | svfloat64_t svldnt1_gather_u64base_index_f64(svbool_t, svuint64_t, int64_t); | |
| 9246 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_f32))) | |
| 9247 | svfloat32_t svldnt1_gather_u32base_index_f32(svbool_t, svuint32_t, int64_t); | |
| 9248 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_s32))) | |
| 9249 | svint32_t svldnt1_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t); | |
| 9250 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_s64))) | |
| 9251 | svint64_t svldnt1_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9252 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_u32))) | |
| 9253 | svuint32_t svldnt1_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9254 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_u64))) | |
| 9255 | svuint64_t svldnt1_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9256 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_f64))) | |
| 9257 | svfloat64_t svldnt1_gather_u64base_offset_f64(svbool_t, svuint64_t, int64_t); | |
| 9258 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_f32))) | |
| 9259 | svfloat32_t svldnt1_gather_u32base_offset_f32(svbool_t, svuint32_t, int64_t); | |
| 9260 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_s32))) | |
| 9261 | svint32_t svldnt1_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9262 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_s64))) | |
| 9263 | svint64_t svldnt1_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9264 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_u32))) | |
| 9265 | svuint32_t svldnt1_gather_u32base_u32(svbool_t, svuint32_t); | |
| 9266 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_u64))) | |
| 9267 | svuint64_t svldnt1_gather_u64base_u64(svbool_t, svuint64_t); | |
| 9268 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_f64))) | |
| 9269 | svfloat64_t svldnt1_gather_u64base_f64(svbool_t, svuint64_t); | |
| 9270 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_f32))) | |
| 9271 | svfloat32_t svldnt1_gather_u32base_f32(svbool_t, svuint32_t); | |
| 9272 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_s32))) | |
| 9273 | svint32_t svldnt1_gather_u32base_s32(svbool_t, svuint32_t); | |
| 9274 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_s64))) | |
| 9275 | svint64_t svldnt1_gather_u64base_s64(svbool_t, svuint64_t); | |
| 9276 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_u64))) | |
| 9277 | svuint64_t svldnt1_gather_s64index_u64(svbool_t, uint64_t const *, svint64_t); | |
| 9278 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_f64))) | |
| 9279 | svfloat64_t svldnt1_gather_s64index_f64(svbool_t, float64_t const *, svint64_t); | |
| 9280 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_s64))) | |
| 9281 | svint64_t svldnt1_gather_s64index_s64(svbool_t, int64_t const *, svint64_t); | |
| 9282 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_u64))) | |
| 9283 | svuint64_t svldnt1_gather_u64index_u64(svbool_t, uint64_t const *, svuint64_t); | |
| 9284 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_f64))) | |
| 9285 | svfloat64_t svldnt1_gather_u64index_f64(svbool_t, float64_t const *, svuint64_t); | |
| 9286 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_s64))) | |
| 9287 | svint64_t svldnt1_gather_u64index_s64(svbool_t, int64_t const *, svuint64_t); | |
| 9288 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_u32))) | |
| 9289 | svuint32_t svldnt1_gather_u32offset_u32(svbool_t, uint32_t const *, svuint32_t); | |
| 9290 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_f32))) | |
| 9291 | svfloat32_t svldnt1_gather_u32offset_f32(svbool_t, float32_t const *, svuint32_t); | |
| 9292 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_s32))) | |
| 9293 | svint32_t svldnt1_gather_u32offset_s32(svbool_t, int32_t const *, svuint32_t); | |
| 9294 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_u64))) | |
| 9295 | svuint64_t svldnt1_gather_s64offset_u64(svbool_t, uint64_t const *, svint64_t); | |
| 9296 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_f64))) | |
| 9297 | svfloat64_t svldnt1_gather_s64offset_f64(svbool_t, float64_t const *, svint64_t); | |
| 9298 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_s64))) | |
| 9299 | svint64_t svldnt1_gather_s64offset_s64(svbool_t, int64_t const *, svint64_t); | |
| 9300 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_u64))) | |
| 9301 | svuint64_t svldnt1_gather_u64offset_u64(svbool_t, uint64_t const *, svuint64_t); | |
| 9302 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_f64))) | |
| 9303 | svfloat64_t svldnt1_gather_u64offset_f64(svbool_t, float64_t const *, svuint64_t); | |
| 9304 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_s64))) | |
| 9305 | svint64_t svldnt1_gather_u64offset_s64(svbool_t, int64_t const *, svuint64_t); | |
| 9306 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_u32))) | |
| 9307 | svuint32_t svldnt1sb_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9308 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_u64))) | |
| 9309 | svuint64_t svldnt1sb_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9310 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_s32))) | |
| 9311 | svint32_t svldnt1sb_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9312 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_s64))) | |
| 9313 | svint64_t svldnt1sb_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9314 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_u32))) | |
| 9315 | svuint32_t svldnt1sb_gather_u32base_u32(svbool_t, svuint32_t); | |
| 9316 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_u64))) | |
| 9317 | svuint64_t svldnt1sb_gather_u64base_u64(svbool_t, svuint64_t); | |
| 9318 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_s32))) | |
| 9319 | svint32_t svldnt1sb_gather_u32base_s32(svbool_t, svuint32_t); | |
| 9320 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_s64))) | |
| 9321 | svint64_t svldnt1sb_gather_u64base_s64(svbool_t, svuint64_t); | |
| 9322 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_u32))) | |
| 9323 | svuint32_t svldnt1sb_gather_u32offset_u32(svbool_t, int8_t const *, svuint32_t); | |
| 9324 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_s32))) | |
| 9325 | svint32_t svldnt1sb_gather_u32offset_s32(svbool_t, int8_t const *, svuint32_t); | |
| 9326 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_u64))) | |
| 9327 | svuint64_t svldnt1sb_gather_s64offset_u64(svbool_t, int8_t const *, svint64_t); | |
| 9328 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_s64))) | |
| 9329 | svint64_t svldnt1sb_gather_s64offset_s64(svbool_t, int8_t const *, svint64_t); | |
| 9330 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_u64))) | |
| 9331 | svuint64_t svldnt1sb_gather_u64offset_u64(svbool_t, int8_t const *, svuint64_t); | |
| 9332 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_s64))) | |
| 9333 | svint64_t svldnt1sb_gather_u64offset_s64(svbool_t, int8_t const *, svuint64_t); | |
| 9334 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_u32))) | |
| 9335 | svuint32_t svldnt1sh_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t); | |
| 9336 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_u64))) | |
| 9337 | svuint64_t svldnt1sh_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9338 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_s32))) | |
| 9339 | svint32_t svldnt1sh_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t); | |
| 9340 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_s64))) | |
| 9341 | svint64_t svldnt1sh_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9342 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_u32))) | |
| 9343 | svuint32_t svldnt1sh_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9344 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_u64))) | |
| 9345 | svuint64_t svldnt1sh_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9346 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_s32))) | |
| 9347 | svint32_t svldnt1sh_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9348 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_s64))) | |
| 9349 | svint64_t svldnt1sh_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9350 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_u32))) | |
| 9351 | svuint32_t svldnt1sh_gather_u32base_u32(svbool_t, svuint32_t); | |
| 9352 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_u64))) | |
| 9353 | svuint64_t svldnt1sh_gather_u64base_u64(svbool_t, svuint64_t); | |
| 9354 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_s32))) | |
| 9355 | svint32_t svldnt1sh_gather_u32base_s32(svbool_t, svuint32_t); | |
| 9356 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_s64))) | |
| 9357 | svint64_t svldnt1sh_gather_u64base_s64(svbool_t, svuint64_t); | |
| 9358 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_u64))) | |
| 9359 | svuint64_t svldnt1sh_gather_s64index_u64(svbool_t, int16_t const *, svint64_t); | |
| 9360 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_s64))) | |
| 9361 | svint64_t svldnt1sh_gather_s64index_s64(svbool_t, int16_t const *, svint64_t); | |
| 9362 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_u64))) | |
| 9363 | svuint64_t svldnt1sh_gather_u64index_u64(svbool_t, int16_t const *, svuint64_t); | |
| 9364 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_s64))) | |
| 9365 | svint64_t svldnt1sh_gather_u64index_s64(svbool_t, int16_t const *, svuint64_t); | |
| 9366 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_u32))) | |
| 9367 | svuint32_t svldnt1sh_gather_u32offset_u32(svbool_t, int16_t const *, svuint32_t); | |
| 9368 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_s32))) | |
| 9369 | svint32_t svldnt1sh_gather_u32offset_s32(svbool_t, int16_t const *, svuint32_t); | |
| 9370 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_u64))) | |
| 9371 | svuint64_t svldnt1sh_gather_s64offset_u64(svbool_t, int16_t const *, svint64_t); | |
| 9372 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_s64))) | |
| 9373 | svint64_t svldnt1sh_gather_s64offset_s64(svbool_t, int16_t const *, svint64_t); | |
| 9374 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_u64))) | |
| 9375 | svuint64_t svldnt1sh_gather_u64offset_u64(svbool_t, int16_t const *, svuint64_t); | |
| 9376 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_s64))) | |
| 9377 | svint64_t svldnt1sh_gather_u64offset_s64(svbool_t, int16_t const *, svuint64_t); | |
| 9378 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_u64))) | |
| 9379 | svuint64_t svldnt1sw_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9380 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_s64))) | |
| 9381 | svint64_t svldnt1sw_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9382 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_u64))) | |
| 9383 | svuint64_t svldnt1sw_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9384 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_s64))) | |
| 9385 | svint64_t svldnt1sw_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9386 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_u64))) | |
| 9387 | svuint64_t svldnt1sw_gather_u64base_u64(svbool_t, svuint64_t); | |
| 9388 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_s64))) | |
| 9389 | svint64_t svldnt1sw_gather_u64base_s64(svbool_t, svuint64_t); | |
| 9390 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_u64))) | |
| 9391 | svuint64_t svldnt1sw_gather_s64index_u64(svbool_t, int32_t const *, svint64_t); | |
| 9392 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_s64))) | |
| 9393 | svint64_t svldnt1sw_gather_s64index_s64(svbool_t, int32_t const *, svint64_t); | |
| 9394 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_u64))) | |
| 9395 | svuint64_t svldnt1sw_gather_u64index_u64(svbool_t, int32_t const *, svuint64_t); | |
| 9396 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_s64))) | |
| 9397 | svint64_t svldnt1sw_gather_u64index_s64(svbool_t, int32_t const *, svuint64_t); | |
| 9398 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_u64))) | |
| 9399 | svuint64_t svldnt1sw_gather_s64offset_u64(svbool_t, int32_t const *, svint64_t); | |
| 9400 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_s64))) | |
| 9401 | svint64_t svldnt1sw_gather_s64offset_s64(svbool_t, int32_t const *, svint64_t); | |
| 9402 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_u64))) | |
| 9403 | svuint64_t svldnt1sw_gather_u64offset_u64(svbool_t, int32_t const *, svuint64_t); | |
| 9404 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_s64))) | |
| 9405 | svint64_t svldnt1sw_gather_u64offset_s64(svbool_t, int32_t const *, svuint64_t); | |
| 9406 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_u32))) | |
| 9407 | svuint32_t svldnt1ub_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9408 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_u64))) | |
| 9409 | svuint64_t svldnt1ub_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9410 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_s32))) | |
| 9411 | svint32_t svldnt1ub_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9412 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_s64))) | |
| 9413 | svint64_t svldnt1ub_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9414 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_u32))) | |
| 9415 | svuint32_t svldnt1ub_gather_u32base_u32(svbool_t, svuint32_t); | |
| 9416 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_u64))) | |
| 9417 | svuint64_t svldnt1ub_gather_u64base_u64(svbool_t, svuint64_t); | |
| 9418 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_s32))) | |
| 9419 | svint32_t svldnt1ub_gather_u32base_s32(svbool_t, svuint32_t); | |
| 9420 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_s64))) | |
| 9421 | svint64_t svldnt1ub_gather_u64base_s64(svbool_t, svuint64_t); | |
| 9422 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_u32))) | |
| 9423 | svuint32_t svldnt1ub_gather_u32offset_u32(svbool_t, uint8_t const *, svuint32_t); | |
| 9424 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_s32))) | |
| 9425 | svint32_t svldnt1ub_gather_u32offset_s32(svbool_t, uint8_t const *, svuint32_t); | |
| 9426 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_u64))) | |
| 9427 | svuint64_t svldnt1ub_gather_s64offset_u64(svbool_t, uint8_t const *, svint64_t); | |
| 9428 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_s64))) | |
| 9429 | svint64_t svldnt1ub_gather_s64offset_s64(svbool_t, uint8_t const *, svint64_t); | |
| 9430 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_u64))) | |
| 9431 | svuint64_t svldnt1ub_gather_u64offset_u64(svbool_t, uint8_t const *, svuint64_t); | |
| 9432 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_s64))) | |
| 9433 | svint64_t svldnt1ub_gather_u64offset_s64(svbool_t, uint8_t const *, svuint64_t); | |
| 9434 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_u32))) | |
| 9435 | svuint32_t svldnt1uh_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t); | |
| 9436 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_u64))) | |
| 9437 | svuint64_t svldnt1uh_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9438 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_s32))) | |
| 9439 | svint32_t svldnt1uh_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t); | |
| 9440 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_s64))) | |
| 9441 | svint64_t svldnt1uh_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9442 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_u32))) | |
| 9443 | svuint32_t svldnt1uh_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9444 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_u64))) | |
| 9445 | svuint64_t svldnt1uh_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9446 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_s32))) | |
| 9447 | svint32_t svldnt1uh_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9448 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_s64))) | |
| 9449 | svint64_t svldnt1uh_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9450 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_u32))) | |
| 9451 | svuint32_t svldnt1uh_gather_u32base_u32(svbool_t, svuint32_t); | |
| 9452 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_u64))) | |
| 9453 | svuint64_t svldnt1uh_gather_u64base_u64(svbool_t, svuint64_t); | |
| 9454 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_s32))) | |
| 9455 | svint32_t svldnt1uh_gather_u32base_s32(svbool_t, svuint32_t); | |
| 9456 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_s64))) | |
| 9457 | svint64_t svldnt1uh_gather_u64base_s64(svbool_t, svuint64_t); | |
| 9458 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_u64))) | |
| 9459 | svuint64_t svldnt1uh_gather_s64index_u64(svbool_t, uint16_t const *, svint64_t); | |
| 9460 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_s64))) | |
| 9461 | svint64_t svldnt1uh_gather_s64index_s64(svbool_t, uint16_t const *, svint64_t); | |
| 9462 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_u64))) | |
| 9463 | svuint64_t svldnt1uh_gather_u64index_u64(svbool_t, uint16_t const *, svuint64_t); | |
| 9464 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_s64))) | |
| 9465 | svint64_t svldnt1uh_gather_u64index_s64(svbool_t, uint16_t const *, svuint64_t); | |
| 9466 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_u32))) | |
| 9467 | svuint32_t svldnt1uh_gather_u32offset_u32(svbool_t, uint16_t const *, svuint32_t); | |
| 9468 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_s32))) | |
| 9469 | svint32_t svldnt1uh_gather_u32offset_s32(svbool_t, uint16_t const *, svuint32_t); | |
| 9470 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_u64))) | |
| 9471 | svuint64_t svldnt1uh_gather_s64offset_u64(svbool_t, uint16_t const *, svint64_t); | |
| 9472 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_s64))) | |
| 9473 | svint64_t svldnt1uh_gather_s64offset_s64(svbool_t, uint16_t const *, svint64_t); | |
| 9474 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_u64))) | |
| 9475 | svuint64_t svldnt1uh_gather_u64offset_u64(svbool_t, uint16_t const *, svuint64_t); | |
| 9476 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_s64))) | |
| 9477 | svint64_t svldnt1uh_gather_u64offset_s64(svbool_t, uint16_t const *, svuint64_t); | |
| 9478 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_u64))) | |
| 9479 | svuint64_t svldnt1uw_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9480 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_s64))) | |
| 9481 | svint64_t svldnt1uw_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9482 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_u64))) | |
| 9483 | svuint64_t svldnt1uw_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9484 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_s64))) | |
| 9485 | svint64_t svldnt1uw_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9486 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_u64))) | |
| 9487 | svuint64_t svldnt1uw_gather_u64base_u64(svbool_t, svuint64_t); | |
| 9488 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_s64))) | |
| 9489 | svint64_t svldnt1uw_gather_u64base_s64(svbool_t, svuint64_t); | |
| 9490 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_u64))) | |
| 9491 | svuint64_t svldnt1uw_gather_s64index_u64(svbool_t, uint32_t const *, svint64_t); | |
| 9492 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_s64))) | |
| 9493 | svint64_t svldnt1uw_gather_s64index_s64(svbool_t, uint32_t const *, svint64_t); | |
| 9494 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_u64))) | |
| 9495 | svuint64_t svldnt1uw_gather_u64index_u64(svbool_t, uint32_t const *, svuint64_t); | |
| 9496 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_s64))) | |
| 9497 | svint64_t svldnt1uw_gather_u64index_s64(svbool_t, uint32_t const *, svuint64_t); | |
| 9498 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_u64))) | |
| 9499 | svuint64_t svldnt1uw_gather_s64offset_u64(svbool_t, uint32_t const *, svint64_t); | |
| 9500 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_s64))) | |
| 9501 | svint64_t svldnt1uw_gather_s64offset_s64(svbool_t, uint32_t const *, svint64_t); | |
| 9502 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_u64))) | |
| 9503 | svuint64_t svldnt1uw_gather_u64offset_u64(svbool_t, uint32_t const *, svuint64_t); | |
| 9504 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_s64))) | |
| 9505 | svint64_t svldnt1uw_gather_u64offset_s64(svbool_t, uint32_t const *, svuint64_t); | |
| 9506 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u8))) | |
| 9507 | svbool_t svmatch_u8(svbool_t, svuint8_t, svuint8_t); | |
| 9508 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u16))) | |
| 9509 | svbool_t svmatch_u16(svbool_t, svuint16_t, svuint16_t); | |
| 9510 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s8))) | |
| 9511 | svbool_t svmatch_s8(svbool_t, svint8_t, svint8_t); | |
| 9512 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s16))) | |
| 9513 | svbool_t svmatch_s16(svbool_t, svint16_t, svint16_t); | |
| 9514 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u8))) | |
| 9515 | svbool_t svnmatch_u8(svbool_t, svuint8_t, svuint8_t); | |
| 9516 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u16))) | |
| 9517 | svbool_t svnmatch_u16(svbool_t, svuint16_t, svuint16_t); | |
| 9518 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s8))) | |
| 9519 | svbool_t svnmatch_s8(svbool_t, svint8_t, svint8_t); | |
| 9520 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s16))) | |
| 9521 | svbool_t svnmatch_s16(svbool_t, svint16_t, svint16_t); | |
| 9522 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_u32))) | |
| 9523 | void svstnt1_scatter_u32base_index_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 9524 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_u64))) | |
| 9525 | void svstnt1_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9526 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_f64))) | |
| 9527 | void svstnt1_scatter_u64base_index_f64(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 9528 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_f32))) | |
| 9529 | void svstnt1_scatter_u32base_index_f32(svbool_t, svuint32_t, int64_t, svfloat32_t); | |
| 9530 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_s32))) | |
| 9531 | void svstnt1_scatter_u32base_index_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 9532 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_s64))) | |
| 9533 | void svstnt1_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 9534 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_u32))) | |
| 9535 | void svstnt1_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 9536 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_u64))) | |
| 9537 | void svstnt1_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9538 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_f64))) | |
| 9539 | void svstnt1_scatter_u64base_offset_f64(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 9540 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_f32))) | |
| 9541 | void svstnt1_scatter_u32base_offset_f32(svbool_t, svuint32_t, int64_t, svfloat32_t); | |
| 9542 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_s32))) | |
| 9543 | void svstnt1_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 9544 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_s64))) | |
| 9545 | void svstnt1_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 9546 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_u32))) | |
| 9547 | void svstnt1_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t); | |
| 9548 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_u64))) | |
| 9549 | void svstnt1_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 9550 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_f64))) | |
| 9551 | void svstnt1_scatter_u64base_f64(svbool_t, svuint64_t, svfloat64_t); | |
| 9552 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_f32))) | |
| 9553 | void svstnt1_scatter_u32base_f32(svbool_t, svuint32_t, svfloat32_t); | |
| 9554 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_s32))) | |
| 9555 | void svstnt1_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t); | |
| 9556 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_s64))) | |
| 9557 | void svstnt1_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 9558 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_u64))) | |
| 9559 | void svstnt1_scatter_s64index_u64(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 9560 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_f64))) | |
| 9561 | void svstnt1_scatter_s64index_f64(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 9562 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_s64))) | |
| 9563 | void svstnt1_scatter_s64index_s64(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 9564 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_u64))) | |
| 9565 | void svstnt1_scatter_u64index_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 9566 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_f64))) | |
| 9567 | void svstnt1_scatter_u64index_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 9568 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_s64))) | |
| 9569 | void svstnt1_scatter_u64index_s64(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 9570 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_u32))) | |
| 9571 | void svstnt1_scatter_u32offset_u32(svbool_t, uint32_t *, svuint32_t, svuint32_t); | |
| 9572 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_f32))) | |
| 9573 | void svstnt1_scatter_u32offset_f32(svbool_t, float32_t *, svuint32_t, svfloat32_t); | |
| 9574 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_s32))) | |
| 9575 | void svstnt1_scatter_u32offset_s32(svbool_t, int32_t *, svuint32_t, svint32_t); | |
| 9576 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_u64))) | |
| 9577 | void svstnt1_scatter_s64offset_u64(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 9578 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_f64))) | |
| 9579 | void svstnt1_scatter_s64offset_f64(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 9580 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_s64))) | |
| 9581 | void svstnt1_scatter_s64offset_s64(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 9582 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_u64))) | |
| 9583 | void svstnt1_scatter_u64offset_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 9584 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_f64))) | |
| 9585 | void svstnt1_scatter_u64offset_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 9586 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_s64))) | |
| 9587 | void svstnt1_scatter_u64offset_s64(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 9588 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_u32))) | |
| 9589 | void svstnt1b_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 9590 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_u64))) | |
| 9591 | void svstnt1b_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9592 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_s32))) | |
| 9593 | void svstnt1b_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 9594 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_s64))) | |
| 9595 | void svstnt1b_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 9596 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_u32))) | |
| 9597 | void svstnt1b_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t); | |
| 9598 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_u64))) | |
| 9599 | void svstnt1b_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 9600 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_s32))) | |
| 9601 | void svstnt1b_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t); | |
| 9602 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_s64))) | |
| 9603 | void svstnt1b_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 9604 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_s32))) | |
| 9605 | void svstnt1b_scatter_u32offset_s32(svbool_t, int8_t *, svuint32_t, svint32_t); | |
| 9606 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_u32))) | |
| 9607 | void svstnt1b_scatter_u32offset_u32(svbool_t, uint8_t *, svuint32_t, svuint32_t); | |
| 9608 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_s64))) | |
| 9609 | void svstnt1b_scatter_s64offset_s64(svbool_t, int8_t *, svint64_t, svint64_t); | |
| 9610 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_u64))) | |
| 9611 | void svstnt1b_scatter_s64offset_u64(svbool_t, uint8_t *, svint64_t, svuint64_t); | |
| 9612 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_s64))) | |
| 9613 | void svstnt1b_scatter_u64offset_s64(svbool_t, int8_t *, svuint64_t, svint64_t); | |
| 9614 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_u64))) | |
| 9615 | void svstnt1b_scatter_u64offset_u64(svbool_t, uint8_t *, svuint64_t, svuint64_t); | |
| 9616 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_u32))) | |
| 9617 | void svstnt1h_scatter_u32base_index_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 9618 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_u64))) | |
| 9619 | void svstnt1h_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9620 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_s32))) | |
| 9621 | void svstnt1h_scatter_u32base_index_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 9622 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_s64))) | |
| 9623 | void svstnt1h_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 9624 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_u32))) | |
| 9625 | void svstnt1h_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 9626 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_u64))) | |
| 9627 | void svstnt1h_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9628 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_s32))) | |
| 9629 | void svstnt1h_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 9630 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_s64))) | |
| 9631 | void svstnt1h_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 9632 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_u32))) | |
| 9633 | void svstnt1h_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t); | |
| 9634 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_u64))) | |
| 9635 | void svstnt1h_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 9636 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_s32))) | |
| 9637 | void svstnt1h_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t); | |
| 9638 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_s64))) | |
| 9639 | void svstnt1h_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 9640 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_s64))) | |
| 9641 | void svstnt1h_scatter_s64index_s64(svbool_t, int16_t *, svint64_t, svint64_t); | |
| 9642 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_u64))) | |
| 9643 | void svstnt1h_scatter_s64index_u64(svbool_t, uint16_t *, svint64_t, svuint64_t); | |
| 9644 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_s64))) | |
| 9645 | void svstnt1h_scatter_u64index_s64(svbool_t, int16_t *, svuint64_t, svint64_t); | |
| 9646 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_u64))) | |
| 9647 | void svstnt1h_scatter_u64index_u64(svbool_t, uint16_t *, svuint64_t, svuint64_t); | |
| 9648 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_s32))) | |
| 9649 | void svstnt1h_scatter_u32offset_s32(svbool_t, int16_t *, svuint32_t, svint32_t); | |
| 9650 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_u32))) | |
| 9651 | void svstnt1h_scatter_u32offset_u32(svbool_t, uint16_t *, svuint32_t, svuint32_t); | |
| 9652 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_s64))) | |
| 9653 | void svstnt1h_scatter_s64offset_s64(svbool_t, int16_t *, svint64_t, svint64_t); | |
| 9654 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_u64))) | |
| 9655 | void svstnt1h_scatter_s64offset_u64(svbool_t, uint16_t *, svint64_t, svuint64_t); | |
| 9656 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_s64))) | |
| 9657 | void svstnt1h_scatter_u64offset_s64(svbool_t, int16_t *, svuint64_t, svint64_t); | |
| 9658 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_u64))) | |
| 9659 | void svstnt1h_scatter_u64offset_u64(svbool_t, uint16_t *, svuint64_t, svuint64_t); | |
| 9660 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_u64))) | |
| 9661 | void svstnt1w_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9662 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_s64))) | |
| 9663 | void svstnt1w_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 9664 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_u64))) | |
| 9665 | void svstnt1w_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9666 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_s64))) | |
| 9667 | void svstnt1w_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 9668 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_u64))) | |
| 9669 | void svstnt1w_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 9670 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_s64))) | |
| 9671 | void svstnt1w_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 9672 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_s64))) | |
| 9673 | void svstnt1w_scatter_s64index_s64(svbool_t, int32_t *, svint64_t, svint64_t); | |
| 9674 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_u64))) | |
| 9675 | void svstnt1w_scatter_s64index_u64(svbool_t, uint32_t *, svint64_t, svuint64_t); | |
| 9676 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_s64))) | |
| 9677 | void svstnt1w_scatter_u64index_s64(svbool_t, int32_t *, svuint64_t, svint64_t); | |
| 9678 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_u64))) | |
| 9679 | void svstnt1w_scatter_u64index_u64(svbool_t, uint32_t *, svuint64_t, svuint64_t); | |
| 9680 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_s64))) | |
| 9681 | void svstnt1w_scatter_s64offset_s64(svbool_t, int32_t *, svint64_t, svint64_t); | |
| 9682 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_u64))) | |
| 9683 | void svstnt1w_scatter_s64offset_u64(svbool_t, uint32_t *, svint64_t, svuint64_t); | |
| 9684 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_s64))) | |
| 9685 | void svstnt1w_scatter_u64offset_s64(svbool_t, int32_t *, svuint64_t, svint64_t); | |
| 9686 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_u64))) | |
| 9687 | void svstnt1w_scatter_u64offset_u64(svbool_t, uint32_t *, svuint64_t, svuint64_t); | |
| 9688 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u32_z))) | |
| 9689 | svuint32_t svhistcnt_z(svbool_t, svuint32_t, svuint32_t); | |
| 9690 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u64_z))) | |
| 9691 | svuint64_t svhistcnt_z(svbool_t, svuint64_t, svuint64_t); | |
| 9692 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s32_z))) | |
| 9693 | svuint32_t svhistcnt_z(svbool_t, svint32_t, svint32_t); | |
| 9694 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s64_z))) | |
| 9695 | svuint64_t svhistcnt_z(svbool_t, svint64_t, svint64_t); | |
| 9696 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_u8))) | |
| 9697 | svuint8_t svhistseg(svuint8_t, svuint8_t); | |
| 9698 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_s8))) | |
| 9699 | svuint8_t svhistseg(svint8_t, svint8_t); | |
| 9700 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_u32))) | |
| 9701 | svuint32_t svldnt1_gather_index_u32(svbool_t, svuint32_t, int64_t); | |
| 9702 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_u64))) | |
| 9703 | svuint64_t svldnt1_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9704 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_f64))) | |
| 9705 | svfloat64_t svldnt1_gather_index_f64(svbool_t, svuint64_t, int64_t); | |
| 9706 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_f32))) | |
| 9707 | svfloat32_t svldnt1_gather_index_f32(svbool_t, svuint32_t, int64_t); | |
| 9708 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_s32))) | |
| 9709 | svint32_t svldnt1_gather_index_s32(svbool_t, svuint32_t, int64_t); | |
| 9710 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_s64))) | |
| 9711 | svint64_t svldnt1_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9712 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_u32))) | |
| 9713 | svuint32_t svldnt1_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9714 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_u64))) | |
| 9715 | svuint64_t svldnt1_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9716 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_f64))) | |
| 9717 | svfloat64_t svldnt1_gather_offset_f64(svbool_t, svuint64_t, int64_t); | |
| 9718 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_f32))) | |
| 9719 | svfloat32_t svldnt1_gather_offset_f32(svbool_t, svuint32_t, int64_t); | |
| 9720 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_s32))) | |
| 9721 | svint32_t svldnt1_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9722 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_s64))) | |
| 9723 | svint64_t svldnt1_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9724 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_u32))) | |
| 9725 | svuint32_t svldnt1_gather_u32(svbool_t, svuint32_t); | |
| 9726 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_u64))) | |
| 9727 | svuint64_t svldnt1_gather_u64(svbool_t, svuint64_t); | |
| 9728 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_f64))) | |
| 9729 | svfloat64_t svldnt1_gather_f64(svbool_t, svuint64_t); | |
| 9730 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_f32))) | |
| 9731 | svfloat32_t svldnt1_gather_f32(svbool_t, svuint32_t); | |
| 9732 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_s32))) | |
| 9733 | svint32_t svldnt1_gather_s32(svbool_t, svuint32_t); | |
| 9734 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_s64))) | |
| 9735 | svint64_t svldnt1_gather_s64(svbool_t, svuint64_t); | |
| 9736 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_u64))) | |
| 9737 | svuint64_t svldnt1_gather_index(svbool_t, uint64_t const *, svint64_t); | |
| 9738 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_f64))) | |
| 9739 | svfloat64_t svldnt1_gather_index(svbool_t, float64_t const *, svint64_t); | |
| 9740 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_s64))) | |
| 9741 | svint64_t svldnt1_gather_index(svbool_t, int64_t const *, svint64_t); | |
| 9742 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_u64))) | |
| 9743 | svuint64_t svldnt1_gather_index(svbool_t, uint64_t const *, svuint64_t); | |
| 9744 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_f64))) | |
| 9745 | svfloat64_t svldnt1_gather_index(svbool_t, float64_t const *, svuint64_t); | |
| 9746 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_s64))) | |
| 9747 | svint64_t svldnt1_gather_index(svbool_t, int64_t const *, svuint64_t); | |
| 9748 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_u32))) | |
| 9749 | svuint32_t svldnt1_gather_offset(svbool_t, uint32_t const *, svuint32_t); | |
| 9750 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_f32))) | |
| 9751 | svfloat32_t svldnt1_gather_offset(svbool_t, float32_t const *, svuint32_t); | |
| 9752 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_s32))) | |
| 9753 | svint32_t svldnt1_gather_offset(svbool_t, int32_t const *, svuint32_t); | |
| 9754 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_u64))) | |
| 9755 | svuint64_t svldnt1_gather_offset(svbool_t, uint64_t const *, svint64_t); | |
| 9756 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_f64))) | |
| 9757 | svfloat64_t svldnt1_gather_offset(svbool_t, float64_t const *, svint64_t); | |
| 9758 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_s64))) | |
| 9759 | svint64_t svldnt1_gather_offset(svbool_t, int64_t const *, svint64_t); | |
| 9760 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_u64))) | |
| 9761 | svuint64_t svldnt1_gather_offset(svbool_t, uint64_t const *, svuint64_t); | |
| 9762 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_f64))) | |
| 9763 | svfloat64_t svldnt1_gather_offset(svbool_t, float64_t const *, svuint64_t); | |
| 9764 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_s64))) | |
| 9765 | svint64_t svldnt1_gather_offset(svbool_t, int64_t const *, svuint64_t); | |
| 9766 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_u32))) | |
| 9767 | svuint32_t svldnt1sb_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9768 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_u64))) | |
| 9769 | svuint64_t svldnt1sb_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9770 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_s32))) | |
| 9771 | svint32_t svldnt1sb_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9772 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_s64))) | |
| 9773 | svint64_t svldnt1sb_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9774 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_u32))) | |
| 9775 | svuint32_t svldnt1sb_gather_u32(svbool_t, svuint32_t); | |
| 9776 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_u64))) | |
| 9777 | svuint64_t svldnt1sb_gather_u64(svbool_t, svuint64_t); | |
| 9778 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_s32))) | |
| 9779 | svint32_t svldnt1sb_gather_s32(svbool_t, svuint32_t); | |
| 9780 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_s64))) | |
| 9781 | svint64_t svldnt1sb_gather_s64(svbool_t, svuint64_t); | |
| 9782 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_u32))) | |
| 9783 | svuint32_t svldnt1sb_gather_offset_u32(svbool_t, int8_t const *, svuint32_t); | |
| 9784 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_s32))) | |
| 9785 | svint32_t svldnt1sb_gather_offset_s32(svbool_t, int8_t const *, svuint32_t); | |
| 9786 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_u64))) | |
| 9787 | svuint64_t svldnt1sb_gather_offset_u64(svbool_t, int8_t const *, svint64_t); | |
| 9788 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_s64))) | |
| 9789 | svint64_t svldnt1sb_gather_offset_s64(svbool_t, int8_t const *, svint64_t); | |
| 9790 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_u64))) | |
| 9791 | svuint64_t svldnt1sb_gather_offset_u64(svbool_t, int8_t const *, svuint64_t); | |
| 9792 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_s64))) | |
| 9793 | svint64_t svldnt1sb_gather_offset_s64(svbool_t, int8_t const *, svuint64_t); | |
| 9794 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_u32))) | |
| 9795 | svuint32_t svldnt1sh_gather_index_u32(svbool_t, svuint32_t, int64_t); | |
| 9796 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_u64))) | |
| 9797 | svuint64_t svldnt1sh_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9798 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_s32))) | |
| 9799 | svint32_t svldnt1sh_gather_index_s32(svbool_t, svuint32_t, int64_t); | |
| 9800 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_s64))) | |
| 9801 | svint64_t svldnt1sh_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9802 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_u32))) | |
| 9803 | svuint32_t svldnt1sh_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9804 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_u64))) | |
| 9805 | svuint64_t svldnt1sh_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9806 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_s32))) | |
| 9807 | svint32_t svldnt1sh_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9808 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_s64))) | |
| 9809 | svint64_t svldnt1sh_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9810 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_u32))) | |
| 9811 | svuint32_t svldnt1sh_gather_u32(svbool_t, svuint32_t); | |
| 9812 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_u64))) | |
| 9813 | svuint64_t svldnt1sh_gather_u64(svbool_t, svuint64_t); | |
| 9814 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_s32))) | |
| 9815 | svint32_t svldnt1sh_gather_s32(svbool_t, svuint32_t); | |
| 9816 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_s64))) | |
| 9817 | svint64_t svldnt1sh_gather_s64(svbool_t, svuint64_t); | |
| 9818 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_u64))) | |
| 9819 | svuint64_t svldnt1sh_gather_index_u64(svbool_t, int16_t const *, svint64_t); | |
| 9820 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_s64))) | |
| 9821 | svint64_t svldnt1sh_gather_index_s64(svbool_t, int16_t const *, svint64_t); | |
| 9822 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_u64))) | |
| 9823 | svuint64_t svldnt1sh_gather_index_u64(svbool_t, int16_t const *, svuint64_t); | |
| 9824 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_s64))) | |
| 9825 | svint64_t svldnt1sh_gather_index_s64(svbool_t, int16_t const *, svuint64_t); | |
| 9826 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_u32))) | |
| 9827 | svuint32_t svldnt1sh_gather_offset_u32(svbool_t, int16_t const *, svuint32_t); | |
| 9828 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_s32))) | |
| 9829 | svint32_t svldnt1sh_gather_offset_s32(svbool_t, int16_t const *, svuint32_t); | |
| 9830 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_u64))) | |
| 9831 | svuint64_t svldnt1sh_gather_offset_u64(svbool_t, int16_t const *, svint64_t); | |
| 9832 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_s64))) | |
| 9833 | svint64_t svldnt1sh_gather_offset_s64(svbool_t, int16_t const *, svint64_t); | |
| 9834 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_u64))) | |
| 9835 | svuint64_t svldnt1sh_gather_offset_u64(svbool_t, int16_t const *, svuint64_t); | |
| 9836 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_s64))) | |
| 9837 | svint64_t svldnt1sh_gather_offset_s64(svbool_t, int16_t const *, svuint64_t); | |
| 9838 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_u64))) | |
| 9839 | svuint64_t svldnt1sw_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9840 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_s64))) | |
| 9841 | svint64_t svldnt1sw_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9842 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_u64))) | |
| 9843 | svuint64_t svldnt1sw_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9844 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_s64))) | |
| 9845 | svint64_t svldnt1sw_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9846 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_u64))) | |
| 9847 | svuint64_t svldnt1sw_gather_u64(svbool_t, svuint64_t); | |
| 9848 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_s64))) | |
| 9849 | svint64_t svldnt1sw_gather_s64(svbool_t, svuint64_t); | |
| 9850 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_u64))) | |
| 9851 | svuint64_t svldnt1sw_gather_index_u64(svbool_t, int32_t const *, svint64_t); | |
| 9852 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_s64))) | |
| 9853 | svint64_t svldnt1sw_gather_index_s64(svbool_t, int32_t const *, svint64_t); | |
| 9854 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_u64))) | |
| 9855 | svuint64_t svldnt1sw_gather_index_u64(svbool_t, int32_t const *, svuint64_t); | |
| 9856 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_s64))) | |
| 9857 | svint64_t svldnt1sw_gather_index_s64(svbool_t, int32_t const *, svuint64_t); | |
| 9858 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_u64))) | |
| 9859 | svuint64_t svldnt1sw_gather_offset_u64(svbool_t, int32_t const *, svint64_t); | |
| 9860 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_s64))) | |
| 9861 | svint64_t svldnt1sw_gather_offset_s64(svbool_t, int32_t const *, svint64_t); | |
| 9862 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_u64))) | |
| 9863 | svuint64_t svldnt1sw_gather_offset_u64(svbool_t, int32_t const *, svuint64_t); | |
| 9864 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_s64))) | |
| 9865 | svint64_t svldnt1sw_gather_offset_s64(svbool_t, int32_t const *, svuint64_t); | |
| 9866 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_u32))) | |
| 9867 | svuint32_t svldnt1ub_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9868 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_u64))) | |
| 9869 | svuint64_t svldnt1ub_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9870 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_s32))) | |
| 9871 | svint32_t svldnt1ub_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9872 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_s64))) | |
| 9873 | svint64_t svldnt1ub_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9874 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_u32))) | |
| 9875 | svuint32_t svldnt1ub_gather_u32(svbool_t, svuint32_t); | |
| 9876 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_u64))) | |
| 9877 | svuint64_t svldnt1ub_gather_u64(svbool_t, svuint64_t); | |
| 9878 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_s32))) | |
| 9879 | svint32_t svldnt1ub_gather_s32(svbool_t, svuint32_t); | |
| 9880 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_s64))) | |
| 9881 | svint64_t svldnt1ub_gather_s64(svbool_t, svuint64_t); | |
| 9882 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_u32))) | |
| 9883 | svuint32_t svldnt1ub_gather_offset_u32(svbool_t, uint8_t const *, svuint32_t); | |
| 9884 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_s32))) | |
| 9885 | svint32_t svldnt1ub_gather_offset_s32(svbool_t, uint8_t const *, svuint32_t); | |
| 9886 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_u64))) | |
| 9887 | svuint64_t svldnt1ub_gather_offset_u64(svbool_t, uint8_t const *, svint64_t); | |
| 9888 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_s64))) | |
| 9889 | svint64_t svldnt1ub_gather_offset_s64(svbool_t, uint8_t const *, svint64_t); | |
| 9890 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_u64))) | |
| 9891 | svuint64_t svldnt1ub_gather_offset_u64(svbool_t, uint8_t const *, svuint64_t); | |
| 9892 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_s64))) | |
| 9893 | svint64_t svldnt1ub_gather_offset_s64(svbool_t, uint8_t const *, svuint64_t); | |
| 9894 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_u32))) | |
| 9895 | svuint32_t svldnt1uh_gather_index_u32(svbool_t, svuint32_t, int64_t); | |
| 9896 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_u64))) | |
| 9897 | svuint64_t svldnt1uh_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9898 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_s32))) | |
| 9899 | svint32_t svldnt1uh_gather_index_s32(svbool_t, svuint32_t, int64_t); | |
| 9900 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_s64))) | |
| 9901 | svint64_t svldnt1uh_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9902 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_u32))) | |
| 9903 | svuint32_t svldnt1uh_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 9904 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_u64))) | |
| 9905 | svuint64_t svldnt1uh_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9906 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_s32))) | |
| 9907 | svint32_t svldnt1uh_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 9908 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_s64))) | |
| 9909 | svint64_t svldnt1uh_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9910 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_u32))) | |
| 9911 | svuint32_t svldnt1uh_gather_u32(svbool_t, svuint32_t); | |
| 9912 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_u64))) | |
| 9913 | svuint64_t svldnt1uh_gather_u64(svbool_t, svuint64_t); | |
| 9914 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_s32))) | |
| 9915 | svint32_t svldnt1uh_gather_s32(svbool_t, svuint32_t); | |
| 9916 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_s64))) | |
| 9917 | svint64_t svldnt1uh_gather_s64(svbool_t, svuint64_t); | |
| 9918 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_u64))) | |
| 9919 | svuint64_t svldnt1uh_gather_index_u64(svbool_t, uint16_t const *, svint64_t); | |
| 9920 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_s64))) | |
| 9921 | svint64_t svldnt1uh_gather_index_s64(svbool_t, uint16_t const *, svint64_t); | |
| 9922 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_u64))) | |
| 9923 | svuint64_t svldnt1uh_gather_index_u64(svbool_t, uint16_t const *, svuint64_t); | |
| 9924 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_s64))) | |
| 9925 | svint64_t svldnt1uh_gather_index_s64(svbool_t, uint16_t const *, svuint64_t); | |
| 9926 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_u32))) | |
| 9927 | svuint32_t svldnt1uh_gather_offset_u32(svbool_t, uint16_t const *, svuint32_t); | |
| 9928 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_s32))) | |
| 9929 | svint32_t svldnt1uh_gather_offset_s32(svbool_t, uint16_t const *, svuint32_t); | |
| 9930 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_u64))) | |
| 9931 | svuint64_t svldnt1uh_gather_offset_u64(svbool_t, uint16_t const *, svint64_t); | |
| 9932 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_s64))) | |
| 9933 | svint64_t svldnt1uh_gather_offset_s64(svbool_t, uint16_t const *, svint64_t); | |
| 9934 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_u64))) | |
| 9935 | svuint64_t svldnt1uh_gather_offset_u64(svbool_t, uint16_t const *, svuint64_t); | |
| 9936 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_s64))) | |
| 9937 | svint64_t svldnt1uh_gather_offset_s64(svbool_t, uint16_t const *, svuint64_t); | |
| 9938 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_u64))) | |
| 9939 | svuint64_t svldnt1uw_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 9940 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_s64))) | |
| 9941 | svint64_t svldnt1uw_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 9942 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_u64))) | |
| 9943 | svuint64_t svldnt1uw_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 9944 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_s64))) | |
| 9945 | svint64_t svldnt1uw_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 9946 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_u64))) | |
| 9947 | svuint64_t svldnt1uw_gather_u64(svbool_t, svuint64_t); | |
| 9948 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_s64))) | |
| 9949 | svint64_t svldnt1uw_gather_s64(svbool_t, svuint64_t); | |
| 9950 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_u64))) | |
| 9951 | svuint64_t svldnt1uw_gather_index_u64(svbool_t, uint32_t const *, svint64_t); | |
| 9952 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_s64))) | |
| 9953 | svint64_t svldnt1uw_gather_index_s64(svbool_t, uint32_t const *, svint64_t); | |
| 9954 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_u64))) | |
| 9955 | svuint64_t svldnt1uw_gather_index_u64(svbool_t, uint32_t const *, svuint64_t); | |
| 9956 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_s64))) | |
| 9957 | svint64_t svldnt1uw_gather_index_s64(svbool_t, uint32_t const *, svuint64_t); | |
| 9958 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_u64))) | |
| 9959 | svuint64_t svldnt1uw_gather_offset_u64(svbool_t, uint32_t const *, svint64_t); | |
| 9960 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_s64))) | |
| 9961 | svint64_t svldnt1uw_gather_offset_s64(svbool_t, uint32_t const *, svint64_t); | |
| 9962 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_u64))) | |
| 9963 | svuint64_t svldnt1uw_gather_offset_u64(svbool_t, uint32_t const *, svuint64_t); | |
| 9964 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_s64))) | |
| 9965 | svint64_t svldnt1uw_gather_offset_s64(svbool_t, uint32_t const *, svuint64_t); | |
| 9966 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u8))) | |
| 9967 | svbool_t svmatch(svbool_t, svuint8_t, svuint8_t); | |
| 9968 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u16))) | |
| 9969 | svbool_t svmatch(svbool_t, svuint16_t, svuint16_t); | |
| 9970 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s8))) | |
| 9971 | svbool_t svmatch(svbool_t, svint8_t, svint8_t); | |
| 9972 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s16))) | |
| 9973 | svbool_t svmatch(svbool_t, svint16_t, svint16_t); | |
| 9974 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u8))) | |
| 9975 | svbool_t svnmatch(svbool_t, svuint8_t, svuint8_t); | |
| 9976 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u16))) | |
| 9977 | svbool_t svnmatch(svbool_t, svuint16_t, svuint16_t); | |
| 9978 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s8))) | |
| 9979 | svbool_t svnmatch(svbool_t, svint8_t, svint8_t); | |
| 9980 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s16))) | |
| 9981 | svbool_t svnmatch(svbool_t, svint16_t, svint16_t); | |
| 9982 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_u32))) | |
| 9983 | void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 9984 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_u64))) | |
| 9985 | void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9986 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_f64))) | |
| 9987 | void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 9988 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_f32))) | |
| 9989 | void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svfloat32_t); | |
| 9990 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_s32))) | |
| 9991 | void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 9992 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_s64))) | |
| 9993 | void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 9994 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_u32))) | |
| 9995 | void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 9996 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_u64))) | |
| 9997 | void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 9998 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_f64))) | |
| 9999 | void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 10000 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_f32))) | |
| 10001 | void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svfloat32_t); | |
| 10002 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_s32))) | |
| 10003 | void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 10004 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_s64))) | |
| 10005 | void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 10006 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_u32))) | |
| 10007 | void svstnt1_scatter(svbool_t, svuint32_t, svuint32_t); | |
| 10008 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_u64))) | |
| 10009 | void svstnt1_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 10010 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_f64))) | |
| 10011 | void svstnt1_scatter(svbool_t, svuint64_t, svfloat64_t); | |
| 10012 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_f32))) | |
| 10013 | void svstnt1_scatter(svbool_t, svuint32_t, svfloat32_t); | |
| 10014 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_s32))) | |
| 10015 | void svstnt1_scatter(svbool_t, svuint32_t, svint32_t); | |
| 10016 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_s64))) | |
| 10017 | void svstnt1_scatter(svbool_t, svuint64_t, svint64_t); | |
| 10018 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_u64))) | |
| 10019 | void svstnt1_scatter_index(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 10020 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_f64))) | |
| 10021 | void svstnt1_scatter_index(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 10022 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_s64))) | |
| 10023 | void svstnt1_scatter_index(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 10024 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_u64))) | |
| 10025 | void svstnt1_scatter_index(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 10026 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_f64))) | |
| 10027 | void svstnt1_scatter_index(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 10028 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_s64))) | |
| 10029 | void svstnt1_scatter_index(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 10030 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_u32))) | |
| 10031 | void svstnt1_scatter_offset(svbool_t, uint32_t *, svuint32_t, svuint32_t); | |
| 10032 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_f32))) | |
| 10033 | void svstnt1_scatter_offset(svbool_t, float32_t *, svuint32_t, svfloat32_t); | |
| 10034 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_s32))) | |
| 10035 | void svstnt1_scatter_offset(svbool_t, int32_t *, svuint32_t, svint32_t); | |
| 10036 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_u64))) | |
| 10037 | void svstnt1_scatter_offset(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 10038 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_f64))) | |
| 10039 | void svstnt1_scatter_offset(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 10040 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_s64))) | |
| 10041 | void svstnt1_scatter_offset(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 10042 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_u64))) | |
| 10043 | void svstnt1_scatter_offset(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 10044 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_f64))) | |
| 10045 | void svstnt1_scatter_offset(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 10046 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_s64))) | |
| 10047 | void svstnt1_scatter_offset(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 10048 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_u32))) | |
| 10049 | void svstnt1b_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 10050 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_u64))) | |
| 10051 | void svstnt1b_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 10052 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_s32))) | |
| 10053 | void svstnt1b_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 10054 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_s64))) | |
| 10055 | void svstnt1b_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 10056 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_u32))) | |
| 10057 | void svstnt1b_scatter(svbool_t, svuint32_t, svuint32_t); | |
| 10058 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_u64))) | |
| 10059 | void svstnt1b_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 10060 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_s32))) | |
| 10061 | void svstnt1b_scatter(svbool_t, svuint32_t, svint32_t); | |
| 10062 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_s64))) | |
| 10063 | void svstnt1b_scatter(svbool_t, svuint64_t, svint64_t); | |
| 10064 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_s32))) | |
| 10065 | void svstnt1b_scatter_offset(svbool_t, int8_t *, svuint32_t, svint32_t); | |
| 10066 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_u32))) | |
| 10067 | void svstnt1b_scatter_offset(svbool_t, uint8_t *, svuint32_t, svuint32_t); | |
| 10068 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_s64))) | |
| 10069 | void svstnt1b_scatter_offset(svbool_t, int8_t *, svint64_t, svint64_t); | |
| 10070 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_u64))) | |
| 10071 | void svstnt1b_scatter_offset(svbool_t, uint8_t *, svint64_t, svuint64_t); | |
| 10072 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_s64))) | |
| 10073 | void svstnt1b_scatter_offset(svbool_t, int8_t *, svuint64_t, svint64_t); | |
| 10074 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_u64))) | |
| 10075 | void svstnt1b_scatter_offset(svbool_t, uint8_t *, svuint64_t, svuint64_t); | |
| 10076 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_u32))) | |
| 10077 | void svstnt1h_scatter_index(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 10078 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_u64))) | |
| 10079 | void svstnt1h_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 10080 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_s32))) | |
| 10081 | void svstnt1h_scatter_index(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 10082 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_s64))) | |
| 10083 | void svstnt1h_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 10084 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_u32))) | |
| 10085 | void svstnt1h_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 10086 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_u64))) | |
| 10087 | void svstnt1h_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 10088 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_s32))) | |
| 10089 | void svstnt1h_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 10090 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_s64))) | |
| 10091 | void svstnt1h_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 10092 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_u32))) | |
| 10093 | void svstnt1h_scatter(svbool_t, svuint32_t, svuint32_t); | |
| 10094 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_u64))) | |
| 10095 | void svstnt1h_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 10096 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_s32))) | |
| 10097 | void svstnt1h_scatter(svbool_t, svuint32_t, svint32_t); | |
| 10098 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_s64))) | |
| 10099 | void svstnt1h_scatter(svbool_t, svuint64_t, svint64_t); | |
| 10100 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_s64))) | |
| 10101 | void svstnt1h_scatter_index(svbool_t, int16_t *, svint64_t, svint64_t); | |
| 10102 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_u64))) | |
| 10103 | void svstnt1h_scatter_index(svbool_t, uint16_t *, svint64_t, svuint64_t); | |
| 10104 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_s64))) | |
| 10105 | void svstnt1h_scatter_index(svbool_t, int16_t *, svuint64_t, svint64_t); | |
| 10106 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_u64))) | |
| 10107 | void svstnt1h_scatter_index(svbool_t, uint16_t *, svuint64_t, svuint64_t); | |
| 10108 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_s32))) | |
| 10109 | void svstnt1h_scatter_offset(svbool_t, int16_t *, svuint32_t, svint32_t); | |
| 10110 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_u32))) | |
| 10111 | void svstnt1h_scatter_offset(svbool_t, uint16_t *, svuint32_t, svuint32_t); | |
| 10112 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_s64))) | |
| 10113 | void svstnt1h_scatter_offset(svbool_t, int16_t *, svint64_t, svint64_t); | |
| 10114 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_u64))) | |
| 10115 | void svstnt1h_scatter_offset(svbool_t, uint16_t *, svint64_t, svuint64_t); | |
| 10116 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_s64))) | |
| 10117 | void svstnt1h_scatter_offset(svbool_t, int16_t *, svuint64_t, svint64_t); | |
| 10118 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_u64))) | |
| 10119 | void svstnt1h_scatter_offset(svbool_t, uint16_t *, svuint64_t, svuint64_t); | |
| 10120 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_u64))) | |
| 10121 | void svstnt1w_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 10122 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_s64))) | |
| 10123 | void svstnt1w_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 10124 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_u64))) | |
| 10125 | void svstnt1w_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 10126 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_s64))) | |
| 10127 | void svstnt1w_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 10128 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_u64))) | |
| 10129 | void svstnt1w_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 10130 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_s64))) | |
| 10131 | void svstnt1w_scatter(svbool_t, svuint64_t, svint64_t); | |
| 10132 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_s64))) | |
| 10133 | void svstnt1w_scatter_index(svbool_t, int32_t *, svint64_t, svint64_t); | |
| 10134 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_u64))) | |
| 10135 | void svstnt1w_scatter_index(svbool_t, uint32_t *, svint64_t, svuint64_t); | |
| 10136 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_s64))) | |
| 10137 | void svstnt1w_scatter_index(svbool_t, int32_t *, svuint64_t, svint64_t); | |
| 10138 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_u64))) | |
| 10139 | void svstnt1w_scatter_index(svbool_t, uint32_t *, svuint64_t, svuint64_t); | |
| 10140 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_s64))) | |
| 10141 | void svstnt1w_scatter_offset(svbool_t, int32_t *, svint64_t, svint64_t); | |
| 10142 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_u64))) | |
| 10143 | void svstnt1w_scatter_offset(svbool_t, uint32_t *, svint64_t, svuint64_t); | |
| 10144 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_s64))) | |
| 10145 | void svstnt1w_scatter_offset(svbool_t, int32_t *, svuint64_t, svint64_t); | |
| 10146 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_u64))) | |
| 10147 | void svstnt1w_scatter_offset(svbool_t, uint32_t *, svuint64_t, svuint64_t); | |
| 10148 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_m))) | |
| 10149 | svfloat64_t svamax_n_f64_m(svbool_t, svfloat64_t, float64_t); | |
| 10150 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_m))) | |
| 10151 | svfloat32_t svamax_n_f32_m(svbool_t, svfloat32_t, float32_t); | |
| 10152 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_m))) | |
| 10153 | svfloat16_t svamax_n_f16_m(svbool_t, svfloat16_t, float16_t); | |
| 10154 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_x))) | |
| 10155 | svfloat64_t svamax_n_f64_x(svbool_t, svfloat64_t, float64_t); | |
| 10156 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_x))) | |
| 10157 | svfloat32_t svamax_n_f32_x(svbool_t, svfloat32_t, float32_t); | |
| 10158 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_x))) | |
| 10159 | svfloat16_t svamax_n_f16_x(svbool_t, svfloat16_t, float16_t); | |
| 10160 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_z))) | |
| 10161 | svfloat64_t svamax_n_f64_z(svbool_t, svfloat64_t, float64_t); | |
| 10162 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_z))) | |
| 10163 | svfloat32_t svamax_n_f32_z(svbool_t, svfloat32_t, float32_t); | |
| 10164 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_z))) | |
| 10165 | svfloat16_t svamax_n_f16_z(svbool_t, svfloat16_t, float16_t); | |
| 10166 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_m))) | |
| 10167 | svfloat64_t svamax_f64_m(svbool_t, svfloat64_t, svfloat64_t); | |
| 10168 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_m))) | |
| 10169 | svfloat32_t svamax_f32_m(svbool_t, svfloat32_t, svfloat32_t); | |
| 10170 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_m))) | |
| 10171 | svfloat16_t svamax_f16_m(svbool_t, svfloat16_t, svfloat16_t); | |
| 10172 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_x))) | |
| 10173 | svfloat64_t svamax_f64_x(svbool_t, svfloat64_t, svfloat64_t); | |
| 10174 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_x))) | |
| 10175 | svfloat32_t svamax_f32_x(svbool_t, svfloat32_t, svfloat32_t); | |
| 10176 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_x))) | |
| 10177 | svfloat16_t svamax_f16_x(svbool_t, svfloat16_t, svfloat16_t); | |
| 10178 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_z))) | |
| 10179 | svfloat64_t svamax_f64_z(svbool_t, svfloat64_t, svfloat64_t); | |
| 10180 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_z))) | |
| 10181 | svfloat32_t svamax_f32_z(svbool_t, svfloat32_t, svfloat32_t); | |
| 10182 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_z))) | |
| 10183 | svfloat16_t svamax_f16_z(svbool_t, svfloat16_t, svfloat16_t); | |
| 10184 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_m))) | |
| 10185 | svfloat64_t svamin_n_f64_m(svbool_t, svfloat64_t, float64_t); | |
| 10186 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_m))) | |
| 10187 | svfloat32_t svamin_n_f32_m(svbool_t, svfloat32_t, float32_t); | |
| 10188 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_m))) | |
| 10189 | svfloat16_t svamin_n_f16_m(svbool_t, svfloat16_t, float16_t); | |
| 10190 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_x))) | |
| 10191 | svfloat64_t svamin_n_f64_x(svbool_t, svfloat64_t, float64_t); | |
| 10192 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_x))) | |
| 10193 | svfloat32_t svamin_n_f32_x(svbool_t, svfloat32_t, float32_t); | |
| 10194 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_x))) | |
| 10195 | svfloat16_t svamin_n_f16_x(svbool_t, svfloat16_t, float16_t); | |
| 10196 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_z))) | |
| 10197 | svfloat64_t svamin_n_f64_z(svbool_t, svfloat64_t, float64_t); | |
| 10198 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_z))) | |
| 10199 | svfloat32_t svamin_n_f32_z(svbool_t, svfloat32_t, float32_t); | |
| 10200 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_z))) | |
| 10201 | svfloat16_t svamin_n_f16_z(svbool_t, svfloat16_t, float16_t); | |
| 10202 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_m))) | |
| 10203 | svfloat64_t svamin_f64_m(svbool_t, svfloat64_t, svfloat64_t); | |
| 10204 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_m))) | |
| 10205 | svfloat32_t svamin_f32_m(svbool_t, svfloat32_t, svfloat32_t); | |
| 10206 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_m))) | |
| 10207 | svfloat16_t svamin_f16_m(svbool_t, svfloat16_t, svfloat16_t); | |
| 10208 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_x))) | |
| 10209 | svfloat64_t svamin_f64_x(svbool_t, svfloat64_t, svfloat64_t); | |
| 10210 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_x))) | |
| 10211 | svfloat32_t svamin_f32_x(svbool_t, svfloat32_t, svfloat32_t); | |
| 10212 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_x))) | |
| 10213 | svfloat16_t svamin_f16_x(svbool_t, svfloat16_t, svfloat16_t); | |
| 10214 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_z))) | |
| 10215 | svfloat64_t svamin_f64_z(svbool_t, svfloat64_t, svfloat64_t); | |
| 10216 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_z))) | |
| 10217 | svfloat32_t svamin_f32_z(svbool_t, svfloat32_t, svfloat32_t); | |
| 10218 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_z))) | |
| 10219 | svfloat16_t svamin_f16_z(svbool_t, svfloat16_t, svfloat16_t); | |
| 10220 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_m))) | |
| 10221 | svfloat64_t svamax_m(svbool_t, svfloat64_t, float64_t); | |
| 10222 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_m))) | |
| 10223 | svfloat32_t svamax_m(svbool_t, svfloat32_t, float32_t); | |
| 10224 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_m))) | |
| 10225 | svfloat16_t svamax_m(svbool_t, svfloat16_t, float16_t); | |
| 10226 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_x))) | |
| 10227 | svfloat64_t svamax_x(svbool_t, svfloat64_t, float64_t); | |
| 10228 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_x))) | |
| 10229 | svfloat32_t svamax_x(svbool_t, svfloat32_t, float32_t); | |
| 10230 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_x))) | |
| 10231 | svfloat16_t svamax_x(svbool_t, svfloat16_t, float16_t); | |
| 10232 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_z))) | |
| 10233 | svfloat64_t svamax_z(svbool_t, svfloat64_t, float64_t); | |
| 10234 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_z))) | |
| 10235 | svfloat32_t svamax_z(svbool_t, svfloat32_t, float32_t); | |
| 10236 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_z))) | |
| 10237 | svfloat16_t svamax_z(svbool_t, svfloat16_t, float16_t); | |
| 10238 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_m))) | |
| 10239 | svfloat64_t svamax_m(svbool_t, svfloat64_t, svfloat64_t); | |
| 10240 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_m))) | |
| 10241 | svfloat32_t svamax_m(svbool_t, svfloat32_t, svfloat32_t); | |
| 10242 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_m))) | |
| 10243 | svfloat16_t svamax_m(svbool_t, svfloat16_t, svfloat16_t); | |
| 10244 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_x))) | |
| 10245 | svfloat64_t svamax_x(svbool_t, svfloat64_t, svfloat64_t); | |
| 10246 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_x))) | |
| 10247 | svfloat32_t svamax_x(svbool_t, svfloat32_t, svfloat32_t); | |
| 10248 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_x))) | |
| 10249 | svfloat16_t svamax_x(svbool_t, svfloat16_t, svfloat16_t); | |
| 10250 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_z))) | |
| 10251 | svfloat64_t svamax_z(svbool_t, svfloat64_t, svfloat64_t); | |
| 10252 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_z))) | |
| 10253 | svfloat32_t svamax_z(svbool_t, svfloat32_t, svfloat32_t); | |
| 10254 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_z))) | |
| 10255 | svfloat16_t svamax_z(svbool_t, svfloat16_t, svfloat16_t); | |
| 10256 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_m))) | |
| 10257 | svfloat64_t svamin_m(svbool_t, svfloat64_t, float64_t); | |
| 10258 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_m))) | |
| 10259 | svfloat32_t svamin_m(svbool_t, svfloat32_t, float32_t); | |
| 10260 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_m))) | |
| 10261 | svfloat16_t svamin_m(svbool_t, svfloat16_t, float16_t); | |
| 10262 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_x))) | |
| 10263 | svfloat64_t svamin_x(svbool_t, svfloat64_t, float64_t); | |
| 10264 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_x))) | |
| 10265 | svfloat32_t svamin_x(svbool_t, svfloat32_t, float32_t); | |
| 10266 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_x))) | |
| 10267 | svfloat16_t svamin_x(svbool_t, svfloat16_t, float16_t); | |
| 10268 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_z))) | |
| 10269 | svfloat64_t svamin_z(svbool_t, svfloat64_t, float64_t); | |
| 10270 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_z))) | |
| 10271 | svfloat32_t svamin_z(svbool_t, svfloat32_t, float32_t); | |
| 10272 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_z))) | |
| 10273 | svfloat16_t svamin_z(svbool_t, svfloat16_t, float16_t); | |
| 10274 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_m))) | |
| 10275 | svfloat64_t svamin_m(svbool_t, svfloat64_t, svfloat64_t); | |
| 10276 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_m))) | |
| 10277 | svfloat32_t svamin_m(svbool_t, svfloat32_t, svfloat32_t); | |
| 10278 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_m))) | |
| 10279 | svfloat16_t svamin_m(svbool_t, svfloat16_t, svfloat16_t); | |
| 10280 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_x))) | |
| 10281 | svfloat64_t svamin_x(svbool_t, svfloat64_t, svfloat64_t); | |
| 10282 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_x))) | |
| 10283 | svfloat32_t svamin_x(svbool_t, svfloat32_t, svfloat32_t); | |
| 10284 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_x))) | |
| 10285 | svfloat16_t svamin_x(svbool_t, svfloat16_t, svfloat16_t); | |
| 10286 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_z))) | |
| 10287 | svfloat64_t svamin_z(svbool_t, svfloat64_t, svfloat64_t); | |
| 10288 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_z))) | |
| 10289 | svfloat32_t svamin_z(svbool_t, svfloat32_t, svfloat32_t); | |
| 10290 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_z))) | |
| 10291 | svfloat16_t svamin_z(svbool_t, svfloat16_t, svfloat16_t); | |
| 10292 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f16_mf8_fpm))) | |
| 10293 | svfloat16_t svdot_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10294 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f16_mf8_fpm))) | |
| 10295 | svfloat16_t svdot_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10296 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f16_mf8_fpm))) | |
| 10297 | svfloat16_t svdot_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10298 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f16_mf8_fpm))) | |
| 10299 | svfloat16_t svdot_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10300 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f16_mf8_fpm))) | |
| 10301 | svfloat16_t svdot_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10302 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f16_mf8_fpm))) | |
| 10303 | svfloat16_t svdot_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10304 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f32_mf8_fpm))) | |
| 10305 | svfloat32_t svdot_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10306 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f32_mf8_fpm))) | |
| 10307 | svfloat32_t svdot_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10308 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f32_mf8_fpm))) | |
| 10309 | svfloat32_t svdot_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10310 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f32_mf8_fpm))) | |
| 10311 | svfloat32_t svdot_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10312 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f32_mf8_fpm))) | |
| 10313 | svfloat32_t svdot_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10314 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f32_mf8_fpm))) | |
| 10315 | svfloat32_t svdot_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10316 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_f16_mf8_fpm))) | |
| 10317 | svfloat16_t svmlalb_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10318 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_n_f16_mf8_fpm))) | |
| 10319 | svfloat16_t svmlalb_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10320 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_lane_f16_mf8_fpm))) | |
| 10321 | svfloat16_t svmlalb_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10322 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_f32_mf8_fpm))) | |
| 10323 | svfloat32_t svmlallbb_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10324 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_n_f32_mf8_fpm))) | |
| 10325 | svfloat32_t svmlallbb_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10326 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_lane_f32_mf8_fpm))) | |
| 10327 | svfloat32_t svmlallbb_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10328 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_f32_mf8_fpm))) | |
| 10329 | svfloat32_t svmlallbt_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10330 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_n_f32_mf8_fpm))) | |
| 10331 | svfloat32_t svmlallbt_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10332 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_lane_f32_mf8_fpm))) | |
| 10333 | svfloat32_t svmlallbt_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10334 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_f32_mf8_fpm))) | |
| 10335 | svfloat32_t svmlalltb_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10336 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_n_f32_mf8_fpm))) | |
| 10337 | svfloat32_t svmlalltb_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10338 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_lane_f32_mf8_fpm))) | |
| 10339 | svfloat32_t svmlalltb_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10340 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_f32_mf8_fpm))) | |
| 10341 | svfloat32_t svmlalltt_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10342 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_n_f32_mf8_fpm))) | |
| 10343 | svfloat32_t svmlalltt_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10344 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_lane_f32_mf8_fpm))) | |
| 10345 | svfloat32_t svmlalltt_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10346 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_f16_mf8_fpm))) | |
| 10347 | svfloat16_t svmlalt_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10348 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_n_f16_mf8_fpm))) | |
| 10349 | svfloat16_t svmlalt_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10350 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_lane_f16_mf8_fpm))) | |
| 10351 | svfloat16_t svmlalt_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10352 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_f16_mf8_fpm))) | |
| 10353 | svfloat16_t svmlalb_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10354 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_n_f16_mf8_fpm))) | |
| 10355 | svfloat16_t svmlalb_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10356 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_lane_f16_mf8_fpm))) | |
| 10357 | svfloat16_t svmlalb_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10358 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_f32_mf8_fpm))) | |
| 10359 | svfloat32_t svmlallbb_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10360 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_n_f32_mf8_fpm))) | |
| 10361 | svfloat32_t svmlallbb_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10362 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_lane_f32_mf8_fpm))) | |
| 10363 | svfloat32_t svmlallbb_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10364 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_f32_mf8_fpm))) | |
| 10365 | svfloat32_t svmlallbt_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10366 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_n_f32_mf8_fpm))) | |
| 10367 | svfloat32_t svmlallbt_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10368 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_lane_f32_mf8_fpm))) | |
| 10369 | svfloat32_t svmlallbt_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10370 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_f32_mf8_fpm))) | |
| 10371 | svfloat32_t svmlalltb_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10372 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_n_f32_mf8_fpm))) | |
| 10373 | svfloat32_t svmlalltb_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10374 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_lane_f32_mf8_fpm))) | |
| 10375 | svfloat32_t svmlalltb_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10376 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_f32_mf8_fpm))) | |
| 10377 | svfloat32_t svmlalltt_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10378 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_n_f32_mf8_fpm))) | |
| 10379 | svfloat32_t svmlalltt_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10380 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_lane_f32_mf8_fpm))) | |
| 10381 | svfloat32_t svmlalltt_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10382 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_f16_mf8_fpm))) | |
| 10383 | svfloat16_t svmlalt_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 10384 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_n_f16_mf8_fpm))) | |
| 10385 | svfloat16_t svmlalt_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 10386 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_lane_f16_mf8_fpm))) | |
| 10387 | svfloat16_t svmlalt_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 10388 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_bf16_mf8_fpm))) | |
| 10389 | svbfloat16_t svcvt1_bf16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 10390 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_f16_mf8_fpm))) | |
| 10391 | svfloat16_t svcvt1_f16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 10392 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_bf16_mf8_fpm))) | |
| 10393 | svbfloat16_t svcvt2_bf16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 10394 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_f16_mf8_fpm))) | |
| 10395 | svfloat16_t svcvt2_f16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 10396 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_bf16_mf8_fpm))) | |
| 10397 | svbfloat16_t svcvtlt1_bf16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 10398 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_f16_mf8_fpm))) | |
| 10399 | svfloat16_t svcvtlt1_f16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 10400 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_bf16_mf8_fpm))) | |
| 10401 | svbfloat16_t svcvtlt2_bf16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 10402 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_f16_mf8_fpm))) | |
| 10403 | svfloat16_t svcvtlt2_f16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 10404 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_bf16_x2_fpm))) | |
| 10405 | svmfloat8_t svcvtn_mf8_bf16_x2_fpm(svbfloat16x2_t, fpm_t); | |
| 10406 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_f16_x2_fpm))) | |
| 10407 | svmfloat8_t svcvtn_mf8_f16_x2_fpm(svfloat16x2_t, fpm_t); | |
| 10408 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnb_mf8_f32_x2_fpm))) | |
| 10409 | svmfloat8_t svcvtnb_mf8_f32_x2_fpm(svfloat32x2_t, fpm_t); | |
| 10410 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_mf8_f32_x2_fpm))) | |
| 10411 | svmfloat8_t svcvtnt_mf8_f32_x2_fpm(svmfloat8_t, svfloat32x2_t, fpm_t); | |
| 10412 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_bf16_mf8_fpm))) | |
| 10413 | svbfloat16_t svcvt1_bf16_fpm(svmfloat8_t, fpm_t); | |
| 10414 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_f16_mf8_fpm))) | |
| 10415 | svfloat16_t svcvt1_f16_fpm(svmfloat8_t, fpm_t); | |
| 10416 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_bf16_mf8_fpm))) | |
| 10417 | svbfloat16_t svcvt2_bf16_fpm(svmfloat8_t, fpm_t); | |
| 10418 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_f16_mf8_fpm))) | |
| 10419 | svfloat16_t svcvt2_f16_fpm(svmfloat8_t, fpm_t); | |
| 10420 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_bf16_mf8_fpm))) | |
| 10421 | svbfloat16_t svcvtlt1_bf16_fpm(svmfloat8_t, fpm_t); | |
| 10422 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_f16_mf8_fpm))) | |
| 10423 | svfloat16_t svcvtlt1_f16_fpm(svmfloat8_t, fpm_t); | |
| 10424 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_bf16_mf8_fpm))) | |
| 10425 | svbfloat16_t svcvtlt2_bf16_fpm(svmfloat8_t, fpm_t); | |
| 10426 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_f16_mf8_fpm))) | |
| 10427 | svfloat16_t svcvtlt2_f16_fpm(svmfloat8_t, fpm_t); | |
| 10428 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_bf16_x2_fpm))) | |
| 10429 | svmfloat8_t svcvtn_mf8_fpm(svbfloat16x2_t, fpm_t); | |
| 10430 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_f16_x2_fpm))) | |
| 10431 | svmfloat8_t svcvtn_mf8_fpm(svfloat16x2_t, fpm_t); | |
| 10432 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnb_mf8_f32_x2_fpm))) | |
| 10433 | svmfloat8_t svcvtnb_mf8_fpm(svfloat32x2_t, fpm_t); | |
| 10434 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_mf8_f32_x2_fpm))) | |
| 10435 | svmfloat8_t svcvtnt_mf8_fpm(svmfloat8_t, svfloat32x2_t, fpm_t); | |
| 10436 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u8))) | |
| 10437 | svuint8_t svluti2_lane_u8(svuint8_t, svuint8_t, uint64_t); | |
| 10438 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s8))) | |
| 10439 | svint8_t svluti2_lane_s8(svint8_t, svuint8_t, uint64_t); | |
| 10440 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u16))) | |
| 10441 | svuint16_t svluti2_lane_u16(svuint16_t, svuint8_t, uint64_t); | |
| 10442 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_bf16))) | |
| 10443 | svbfloat16_t svluti2_lane_bf16(svbfloat16_t, svuint8_t, uint64_t); | |
| 10444 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_f16))) | |
| 10445 | svfloat16_t svluti2_lane_f16(svfloat16_t, svuint8_t, uint64_t); | |
| 10446 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s16))) | |
| 10447 | svint16_t svluti2_lane_s16(svint16_t, svuint8_t, uint64_t); | |
| 10448 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u8))) | |
| 10449 | svuint8_t svluti4_lane_u8(svuint8_t, svuint8_t, uint64_t); | |
| 10450 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s8))) | |
| 10451 | svint8_t svluti4_lane_s8(svint8_t, svuint8_t, uint64_t); | |
| 10452 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16))) | |
| 10453 | svuint16_t svluti4_lane_u16(svuint16_t, svuint8_t, uint64_t); | |
| 10454 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16))) | |
| 10455 | svbfloat16_t svluti4_lane_bf16(svbfloat16_t, svuint8_t, uint64_t); | |
| 10456 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16))) | |
| 10457 | svfloat16_t svluti4_lane_f16(svfloat16_t, svuint8_t, uint64_t); | |
| 10458 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16))) | |
| 10459 | svint16_t svluti4_lane_s16(svint16_t, svuint8_t, uint64_t); | |
| 10460 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16_x2))) | |
| 10461 | svuint16_t svluti4_lane_u16_x2(svuint16x2_t, svuint8_t, uint64_t); | |
| 10462 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16_x2))) | |
| 10463 | svbfloat16_t svluti4_lane_bf16_x2(svbfloat16x2_t, svuint8_t, uint64_t); | |
| 10464 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16_x2))) | |
| 10465 | svfloat16_t svluti4_lane_f16_x2(svfloat16x2_t, svuint8_t, uint64_t); | |
| 10466 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16_x2))) | |
| 10467 | svint16_t svluti4_lane_s16_x2(svint16x2_t, svuint8_t, uint64_t); | |
| 10468 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u8))) | |
| 10469 | svuint8_t svluti2_lane(svuint8_t, svuint8_t, uint64_t); | |
| 10470 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s8))) | |
| 10471 | svint8_t svluti2_lane(svint8_t, svuint8_t, uint64_t); | |
| 10472 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u16))) | |
| 10473 | svuint16_t svluti2_lane(svuint16_t, svuint8_t, uint64_t); | |
| 10474 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_bf16))) | |
| 10475 | svbfloat16_t svluti2_lane(svbfloat16_t, svuint8_t, uint64_t); | |
| 10476 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_f16))) | |
| 10477 | svfloat16_t svluti2_lane(svfloat16_t, svuint8_t, uint64_t); | |
| 10478 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s16))) | |
| 10479 | svint16_t svluti2_lane(svint16_t, svuint8_t, uint64_t); | |
| 10480 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u8))) | |
| 10481 | svuint8_t svluti4_lane(svuint8_t, svuint8_t, uint64_t); | |
| 10482 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s8))) | |
| 10483 | svint8_t svluti4_lane(svint8_t, svuint8_t, uint64_t); | |
| 10484 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16))) | |
| 10485 | svuint16_t svluti4_lane(svuint16_t, svuint8_t, uint64_t); | |
| 10486 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16))) | |
| 10487 | svbfloat16_t svluti4_lane(svbfloat16_t, svuint8_t, uint64_t); | |
| 10488 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16))) | |
| 10489 | svfloat16_t svluti4_lane(svfloat16_t, svuint8_t, uint64_t); | |
| 10490 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16))) | |
| 10491 | svint16_t svluti4_lane(svint16_t, svuint8_t, uint64_t); | |
| 10492 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16_x2))) | |
| 10493 | svuint16_t svluti4_lane(svuint16x2_t, svuint8_t, uint64_t); | |
| 10494 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16_x2))) | |
| 10495 | svbfloat16_t svluti4_lane(svbfloat16x2_t, svuint8_t, uint64_t); | |
| 10496 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16_x2))) | |
| 10497 | svfloat16_t svluti4_lane(svfloat16x2_t, svuint8_t, uint64_t); | |
| 10498 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16_x2))) | |
| 10499 | svint16_t svluti4_lane(svint16x2_t, svuint8_t, uint64_t); | |
| 10500 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_u8))) | |
| 10501 | svuint8_t svaesd_u8(svuint8_t, svuint8_t); | |
| 10502 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_u8))) | |
| 10503 | svuint8_t svaese_u8(svuint8_t, svuint8_t); | |
| 10504 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesimc_u8))) | |
| 10505 | svuint8_t svaesimc_u8(svuint8_t); | |
| 10506 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesmc_u8))) | |
| 10507 | svuint8_t svaesmc_u8(svuint8_t); | |
| 10508 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_n_u64))) | |
| 10509 | svuint64_t svpmullb_pair_n_u64(svuint64_t, uint64_t); | |
| 10510 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_u64))) | |
| 10511 | svuint64_t svpmullb_pair_u64(svuint64_t, svuint64_t); | |
| 10512 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_n_u64))) | |
| 10513 | svuint64_t svpmullt_pair_n_u64(svuint64_t, uint64_t); | |
| 10514 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_u64))) | |
| 10515 | svuint64_t svpmullt_pair_u64(svuint64_t, svuint64_t); | |
| 10516 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_u8))) | |
| 10517 | svuint8_t svaesd(svuint8_t, svuint8_t); | |
| 10518 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_u8))) | |
| 10519 | svuint8_t svaese(svuint8_t, svuint8_t); | |
| 10520 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesimc_u8))) | |
| 10521 | svuint8_t svaesimc(svuint8_t); | |
| 10522 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesmc_u8))) | |
| 10523 | svuint8_t svaesmc(svuint8_t); | |
| 10524 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_n_u64))) | |
| 10525 | svuint64_t svpmullb_pair(svuint64_t, uint64_t); | |
| 10526 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_u64))) | |
| 10527 | svuint64_t svpmullb_pair(svuint64_t, svuint64_t); | |
| 10528 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_n_u64))) | |
| 10529 | svuint64_t svpmullt_pair(svuint64_t, uint64_t); | |
| 10530 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_u64))) | |
| 10531 | svuint64_t svpmullt_pair(svuint64_t, svuint64_t); | |
| 10532 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_m))) | |
| 10533 | svbfloat16_t svadd_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10534 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_x))) | |
| 10535 | svbfloat16_t svadd_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10536 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_z))) | |
| 10537 | svbfloat16_t svadd_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10538 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_m))) | |
| 10539 | svbfloat16_t svadd_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10540 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_x))) | |
| 10541 | svbfloat16_t svadd_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10542 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_z))) | |
| 10543 | svbfloat16_t svadd_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10544 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svclamp_bf16))) | |
| 10545 | svbfloat16_t svclamp_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10546 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_m))) | |
| 10547 | svbfloat16_t svmax_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10548 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_x))) | |
| 10549 | svbfloat16_t svmax_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10550 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_z))) | |
| 10551 | svbfloat16_t svmax_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10552 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_m))) | |
| 10553 | svbfloat16_t svmax_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10554 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_x))) | |
| 10555 | svbfloat16_t svmax_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10556 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_z))) | |
| 10557 | svbfloat16_t svmax_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10558 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_m))) | |
| 10559 | svbfloat16_t svmaxnm_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10560 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_x))) | |
| 10561 | svbfloat16_t svmaxnm_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10562 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_z))) | |
| 10563 | svbfloat16_t svmaxnm_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10564 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_m))) | |
| 10565 | svbfloat16_t svmaxnm_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10566 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_x))) | |
| 10567 | svbfloat16_t svmaxnm_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10568 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_z))) | |
| 10569 | svbfloat16_t svmaxnm_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10570 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_m))) | |
| 10571 | svbfloat16_t svmin_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10572 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_x))) | |
| 10573 | svbfloat16_t svmin_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10574 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_z))) | |
| 10575 | svbfloat16_t svmin_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10576 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_m))) | |
| 10577 | svbfloat16_t svmin_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10578 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_x))) | |
| 10579 | svbfloat16_t svmin_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10580 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_z))) | |
| 10581 | svbfloat16_t svmin_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10582 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_m))) | |
| 10583 | svbfloat16_t svminnm_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10584 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_x))) | |
| 10585 | svbfloat16_t svminnm_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10586 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_z))) | |
| 10587 | svbfloat16_t svminnm_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10588 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_m))) | |
| 10589 | svbfloat16_t svminnm_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10590 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x))) | |
| 10591 | svbfloat16_t svminnm_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10592 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_z))) | |
| 10593 | svbfloat16_t svminnm_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10594 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_m))) | |
| 10595 | svbfloat16_t svmla_n_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10596 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_x))) | |
| 10597 | svbfloat16_t svmla_n_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10598 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_z))) | |
| 10599 | svbfloat16_t svmla_n_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10600 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_m))) | |
| 10601 | svbfloat16_t svmla_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10602 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_x))) | |
| 10603 | svbfloat16_t svmla_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10604 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_z))) | |
| 10605 | svbfloat16_t svmla_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10606 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_lane_bf16))) | |
| 10607 | svbfloat16_t svmla_lane_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 10608 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_m))) | |
| 10609 | svbfloat16_t svmls_n_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10610 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_x))) | |
| 10611 | svbfloat16_t svmls_n_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10612 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_z))) | |
| 10613 | svbfloat16_t svmls_n_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10614 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_m))) | |
| 10615 | svbfloat16_t svmls_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10616 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_x))) | |
| 10617 | svbfloat16_t svmls_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10618 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_z))) | |
| 10619 | svbfloat16_t svmls_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10620 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_lane_bf16))) | |
| 10621 | svbfloat16_t svmls_lane_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 10622 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_m))) | |
| 10623 | svbfloat16_t svmul_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10624 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_x))) | |
| 10625 | svbfloat16_t svmul_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10626 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_z))) | |
| 10627 | svbfloat16_t svmul_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10628 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_m))) | |
| 10629 | svbfloat16_t svmul_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10630 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x))) | |
| 10631 | svbfloat16_t svmul_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10632 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_z))) | |
| 10633 | svbfloat16_t svmul_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10634 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_lane_bf16))) | |
| 10635 | svbfloat16_t svmul_lane_bf16(svbfloat16_t, svbfloat16_t, uint64_t); | |
| 10636 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_m))) | |
| 10637 | svbfloat16_t svsub_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10638 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_x))) | |
| 10639 | svbfloat16_t svsub_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10640 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_z))) | |
| 10641 | svbfloat16_t svsub_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10642 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_m))) | |
| 10643 | svbfloat16_t svsub_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10644 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_x))) | |
| 10645 | svbfloat16_t svsub_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10646 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_z))) | |
| 10647 | svbfloat16_t svsub_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10648 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_m))) | |
| 10649 | svbfloat16_t svadd_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10650 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_x))) | |
| 10651 | svbfloat16_t svadd_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10652 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_z))) | |
| 10653 | svbfloat16_t svadd_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10654 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_m))) | |
| 10655 | svbfloat16_t svadd_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10656 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_x))) | |
| 10657 | svbfloat16_t svadd_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10658 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_z))) | |
| 10659 | svbfloat16_t svadd_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10660 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svclamp_bf16))) | |
| 10661 | svbfloat16_t svclamp(svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10662 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_m))) | |
| 10663 | svbfloat16_t svmax_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10664 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_x))) | |
| 10665 | svbfloat16_t svmax_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10666 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_z))) | |
| 10667 | svbfloat16_t svmax_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10668 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_m))) | |
| 10669 | svbfloat16_t svmax_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10670 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_x))) | |
| 10671 | svbfloat16_t svmax_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10672 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_z))) | |
| 10673 | svbfloat16_t svmax_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10674 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_m))) | |
| 10675 | svbfloat16_t svmaxnm_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10676 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_x))) | |
| 10677 | svbfloat16_t svmaxnm_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10678 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_z))) | |
| 10679 | svbfloat16_t svmaxnm_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10680 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_m))) | |
| 10681 | svbfloat16_t svmaxnm_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10682 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_x))) | |
| 10683 | svbfloat16_t svmaxnm_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10684 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_z))) | |
| 10685 | svbfloat16_t svmaxnm_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10686 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_m))) | |
| 10687 | svbfloat16_t svmin_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10688 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_x))) | |
| 10689 | svbfloat16_t svmin_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10690 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_z))) | |
| 10691 | svbfloat16_t svmin_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10692 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_m))) | |
| 10693 | svbfloat16_t svmin_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10694 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_x))) | |
| 10695 | svbfloat16_t svmin_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10696 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_z))) | |
| 10697 | svbfloat16_t svmin_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10698 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_m))) | |
| 10699 | svbfloat16_t svminnm_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10700 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_x))) | |
| 10701 | svbfloat16_t svminnm_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10702 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_z))) | |
| 10703 | svbfloat16_t svminnm_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10704 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_m))) | |
| 10705 | svbfloat16_t svminnm_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10706 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x))) | |
| 10707 | svbfloat16_t svminnm_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10708 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_z))) | |
| 10709 | svbfloat16_t svminnm_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10710 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_m))) | |
| 10711 | svbfloat16_t svmla_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10712 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_x))) | |
| 10713 | svbfloat16_t svmla_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10714 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_z))) | |
| 10715 | svbfloat16_t svmla_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10716 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_m))) | |
| 10717 | svbfloat16_t svmla_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10718 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_x))) | |
| 10719 | svbfloat16_t svmla_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10720 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_z))) | |
| 10721 | svbfloat16_t svmla_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10722 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_lane_bf16))) | |
| 10723 | svbfloat16_t svmla_lane(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 10724 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_m))) | |
| 10725 | svbfloat16_t svmls_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10726 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_x))) | |
| 10727 | svbfloat16_t svmls_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10728 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_z))) | |
| 10729 | svbfloat16_t svmls_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 10730 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_m))) | |
| 10731 | svbfloat16_t svmls_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10732 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_x))) | |
| 10733 | svbfloat16_t svmls_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10734 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_z))) | |
| 10735 | svbfloat16_t svmls_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 10736 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_lane_bf16))) | |
| 10737 | svbfloat16_t svmls_lane(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 10738 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_m))) | |
| 10739 | svbfloat16_t svmul_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10740 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_x))) | |
| 10741 | svbfloat16_t svmul_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10742 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_z))) | |
| 10743 | svbfloat16_t svmul_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10744 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_m))) | |
| 10745 | svbfloat16_t svmul_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10746 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x))) | |
| 10747 | svbfloat16_t svmul_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10748 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_z))) | |
| 10749 | svbfloat16_t svmul_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10750 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_lane_bf16))) | |
| 10751 | svbfloat16_t svmul_lane(svbfloat16_t, svbfloat16_t, uint64_t); | |
| 10752 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_m))) | |
| 10753 | svbfloat16_t svsub_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10754 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_x))) | |
| 10755 | svbfloat16_t svsub_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10756 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_z))) | |
| 10757 | svbfloat16_t svsub_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 10758 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_m))) | |
| 10759 | svbfloat16_t svsub_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10760 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_x))) | |
| 10761 | svbfloat16_t svsub_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10762 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_z))) | |
| 10763 | svbfloat16_t svsub_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 10764 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u8))) | |
| 10765 | svuint8_t svbdep_n_u8(svuint8_t, uint8_t); | |
| 10766 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u32))) | |
| 10767 | svuint32_t svbdep_n_u32(svuint32_t, uint32_t); | |
| 10768 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u64))) | |
| 10769 | svuint64_t svbdep_n_u64(svuint64_t, uint64_t); | |
| 10770 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u16))) | |
| 10771 | svuint16_t svbdep_n_u16(svuint16_t, uint16_t); | |
| 10772 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u8))) | |
| 10773 | svuint8_t svbdep_u8(svuint8_t, svuint8_t); | |
| 10774 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u32))) | |
| 10775 | svuint32_t svbdep_u32(svuint32_t, svuint32_t); | |
| 10776 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u64))) | |
| 10777 | svuint64_t svbdep_u64(svuint64_t, svuint64_t); | |
| 10778 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u16))) | |
| 10779 | svuint16_t svbdep_u16(svuint16_t, svuint16_t); | |
| 10780 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u8))) | |
| 10781 | svuint8_t svbext_n_u8(svuint8_t, uint8_t); | |
| 10782 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u32))) | |
| 10783 | svuint32_t svbext_n_u32(svuint32_t, uint32_t); | |
| 10784 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u64))) | |
| 10785 | svuint64_t svbext_n_u64(svuint64_t, uint64_t); | |
| 10786 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u16))) | |
| 10787 | svuint16_t svbext_n_u16(svuint16_t, uint16_t); | |
| 10788 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u8))) | |
| 10789 | svuint8_t svbext_u8(svuint8_t, svuint8_t); | |
| 10790 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u32))) | |
| 10791 | svuint32_t svbext_u32(svuint32_t, svuint32_t); | |
| 10792 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u64))) | |
| 10793 | svuint64_t svbext_u64(svuint64_t, svuint64_t); | |
| 10794 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u16))) | |
| 10795 | svuint16_t svbext_u16(svuint16_t, svuint16_t); | |
| 10796 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u8))) | |
| 10797 | svuint8_t svbgrp_n_u8(svuint8_t, uint8_t); | |
| 10798 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u32))) | |
| 10799 | svuint32_t svbgrp_n_u32(svuint32_t, uint32_t); | |
| 10800 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u64))) | |
| 10801 | svuint64_t svbgrp_n_u64(svuint64_t, uint64_t); | |
| 10802 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u16))) | |
| 10803 | svuint16_t svbgrp_n_u16(svuint16_t, uint16_t); | |
| 10804 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u8))) | |
| 10805 | svuint8_t svbgrp_u8(svuint8_t, svuint8_t); | |
| 10806 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u32))) | |
| 10807 | svuint32_t svbgrp_u32(svuint32_t, svuint32_t); | |
| 10808 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u64))) | |
| 10809 | svuint64_t svbgrp_u64(svuint64_t, svuint64_t); | |
| 10810 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u16))) | |
| 10811 | svuint16_t svbgrp_u16(svuint16_t, svuint16_t); | |
| 10812 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u8))) | |
| 10813 | svuint8_t svbdep(svuint8_t, uint8_t); | |
| 10814 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u32))) | |
| 10815 | svuint32_t svbdep(svuint32_t, uint32_t); | |
| 10816 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u64))) | |
| 10817 | svuint64_t svbdep(svuint64_t, uint64_t); | |
| 10818 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u16))) | |
| 10819 | svuint16_t svbdep(svuint16_t, uint16_t); | |
| 10820 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u8))) | |
| 10821 | svuint8_t svbdep(svuint8_t, svuint8_t); | |
| 10822 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u32))) | |
| 10823 | svuint32_t svbdep(svuint32_t, svuint32_t); | |
| 10824 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u64))) | |
| 10825 | svuint64_t svbdep(svuint64_t, svuint64_t); | |
| 10826 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u16))) | |
| 10827 | svuint16_t svbdep(svuint16_t, svuint16_t); | |
| 10828 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u8))) | |
| 10829 | svuint8_t svbext(svuint8_t, uint8_t); | |
| 10830 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u32))) | |
| 10831 | svuint32_t svbext(svuint32_t, uint32_t); | |
| 10832 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u64))) | |
| 10833 | svuint64_t svbext(svuint64_t, uint64_t); | |
| 10834 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u16))) | |
| 10835 | svuint16_t svbext(svuint16_t, uint16_t); | |
| 10836 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u8))) | |
| 10837 | svuint8_t svbext(svuint8_t, svuint8_t); | |
| 10838 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u32))) | |
| 10839 | svuint32_t svbext(svuint32_t, svuint32_t); | |
| 10840 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u64))) | |
| 10841 | svuint64_t svbext(svuint64_t, svuint64_t); | |
| 10842 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u16))) | |
| 10843 | svuint16_t svbext(svuint16_t, svuint16_t); | |
| 10844 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u8))) | |
| 10845 | svuint8_t svbgrp(svuint8_t, uint8_t); | |
| 10846 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u32))) | |
| 10847 | svuint32_t svbgrp(svuint32_t, uint32_t); | |
| 10848 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u64))) | |
| 10849 | svuint64_t svbgrp(svuint64_t, uint64_t); | |
| 10850 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u16))) | |
| 10851 | svuint16_t svbgrp(svuint16_t, uint16_t); | |
| 10852 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u8))) | |
| 10853 | svuint8_t svbgrp(svuint8_t, svuint8_t); | |
| 10854 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u32))) | |
| 10855 | svuint32_t svbgrp(svuint32_t, svuint32_t); | |
| 10856 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u64))) | |
| 10857 | svuint64_t svbgrp(svuint64_t, svuint64_t); | |
| 10858 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u16))) | |
| 10859 | svuint16_t svbgrp(svuint16_t, svuint16_t); | |
| 10860 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4e_u32))) | |
| 10861 | svuint32_t svsm4e_u32(svuint32_t, svuint32_t); | |
| 10862 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4ekey_u32))) | |
| 10863 | svuint32_t svsm4ekey_u32(svuint32_t, svuint32_t); | |
| 10864 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4e_u32))) | |
| 10865 | svuint32_t svsm4e(svuint32_t, svuint32_t); | |
| 10866 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4ekey_u32))) | |
| 10867 | svuint32_t svsm4ekey(svuint32_t, svuint32_t); | |
| 10868 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u32))) | |
| 10869 | svuint32_t svld1q_gather_u64base_index_u32(svbool_t, svuint64_t, int64_t); | |
| 10870 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u64))) | |
| 10871 | svuint64_t svld1q_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 10872 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u16))) | |
| 10873 | svuint16_t svld1q_gather_u64base_index_u16(svbool_t, svuint64_t, int64_t); | |
| 10874 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_bf16))) | |
| 10875 | svbfloat16_t svld1q_gather_u64base_index_bf16(svbool_t, svuint64_t, int64_t); | |
| 10876 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f64))) | |
| 10877 | svfloat64_t svld1q_gather_u64base_index_f64(svbool_t, svuint64_t, int64_t); | |
| 10878 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f32))) | |
| 10879 | svfloat32_t svld1q_gather_u64base_index_f32(svbool_t, svuint64_t, int64_t); | |
| 10880 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f16))) | |
| 10881 | svfloat16_t svld1q_gather_u64base_index_f16(svbool_t, svuint64_t, int64_t); | |
| 10882 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s32))) | |
| 10883 | svint32_t svld1q_gather_u64base_index_s32(svbool_t, svuint64_t, int64_t); | |
| 10884 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s64))) | |
| 10885 | svint64_t svld1q_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 10886 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s16))) | |
| 10887 | svint16_t svld1q_gather_u64base_index_s16(svbool_t, svuint64_t, int64_t); | |
| 10888 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u8))) | |
| 10889 | svuint8_t svld1q_gather_u64base_offset_u8(svbool_t, svuint64_t, int64_t); | |
| 10890 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u32))) | |
| 10891 | svuint32_t svld1q_gather_u64base_offset_u32(svbool_t, svuint64_t, int64_t); | |
| 10892 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u64))) | |
| 10893 | svuint64_t svld1q_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 10894 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u16))) | |
| 10895 | svuint16_t svld1q_gather_u64base_offset_u16(svbool_t, svuint64_t, int64_t); | |
| 10896 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_bf16))) | |
| 10897 | svbfloat16_t svld1q_gather_u64base_offset_bf16(svbool_t, svuint64_t, int64_t); | |
| 10898 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s8))) | |
| 10899 | svint8_t svld1q_gather_u64base_offset_s8(svbool_t, svuint64_t, int64_t); | |
| 10900 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f64))) | |
| 10901 | svfloat64_t svld1q_gather_u64base_offset_f64(svbool_t, svuint64_t, int64_t); | |
| 10902 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f32))) | |
| 10903 | svfloat32_t svld1q_gather_u64base_offset_f32(svbool_t, svuint64_t, int64_t); | |
| 10904 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f16))) | |
| 10905 | svfloat16_t svld1q_gather_u64base_offset_f16(svbool_t, svuint64_t, int64_t); | |
| 10906 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s32))) | |
| 10907 | svint32_t svld1q_gather_u64base_offset_s32(svbool_t, svuint64_t, int64_t); | |
| 10908 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s64))) | |
| 10909 | svint64_t svld1q_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 10910 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_mf8))) | |
| 10911 | svmfloat8_t svld1q_gather_u64base_offset_mf8(svbool_t, svuint64_t, int64_t); | |
| 10912 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s16))) | |
| 10913 | svint16_t svld1q_gather_u64base_offset_s16(svbool_t, svuint64_t, int64_t); | |
| 10914 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u8))) | |
| 10915 | svuint8_t svld1q_gather_u64base_u8(svbool_t, svuint64_t); | |
| 10916 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u32))) | |
| 10917 | svuint32_t svld1q_gather_u64base_u32(svbool_t, svuint64_t); | |
| 10918 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u64))) | |
| 10919 | svuint64_t svld1q_gather_u64base_u64(svbool_t, svuint64_t); | |
| 10920 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u16))) | |
| 10921 | svuint16_t svld1q_gather_u64base_u16(svbool_t, svuint64_t); | |
| 10922 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_bf16))) | |
| 10923 | svbfloat16_t svld1q_gather_u64base_bf16(svbool_t, svuint64_t); | |
| 10924 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s8))) | |
| 10925 | svint8_t svld1q_gather_u64base_s8(svbool_t, svuint64_t); | |
| 10926 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f64))) | |
| 10927 | svfloat64_t svld1q_gather_u64base_f64(svbool_t, svuint64_t); | |
| 10928 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f32))) | |
| 10929 | svfloat32_t svld1q_gather_u64base_f32(svbool_t, svuint64_t); | |
| 10930 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f16))) | |
| 10931 | svfloat16_t svld1q_gather_u64base_f16(svbool_t, svuint64_t); | |
| 10932 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s32))) | |
| 10933 | svint32_t svld1q_gather_u64base_s32(svbool_t, svuint64_t); | |
| 10934 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s64))) | |
| 10935 | svint64_t svld1q_gather_u64base_s64(svbool_t, svuint64_t); | |
| 10936 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_mf8))) | |
| 10937 | svmfloat8_t svld1q_gather_u64base_mf8(svbool_t, svuint64_t); | |
| 10938 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s16))) | |
| 10939 | svint16_t svld1q_gather_u64base_s16(svbool_t, svuint64_t); | |
| 10940 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u32))) | |
| 10941 | svuint32_t svld1q_gather_u64index_u32(svbool_t, uint32_t const *, svuint64_t); | |
| 10942 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u64))) | |
| 10943 | svuint64_t svld1q_gather_u64index_u64(svbool_t, uint64_t const *, svuint64_t); | |
| 10944 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u16))) | |
| 10945 | svuint16_t svld1q_gather_u64index_u16(svbool_t, uint16_t const *, svuint64_t); | |
| 10946 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_bf16))) | |
| 10947 | svbfloat16_t svld1q_gather_u64index_bf16(svbool_t, bfloat16_t const *, svuint64_t); | |
| 10948 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f64))) | |
| 10949 | svfloat64_t svld1q_gather_u64index_f64(svbool_t, float64_t const *, svuint64_t); | |
| 10950 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f32))) | |
| 10951 | svfloat32_t svld1q_gather_u64index_f32(svbool_t, float32_t const *, svuint64_t); | |
| 10952 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f16))) | |
| 10953 | svfloat16_t svld1q_gather_u64index_f16(svbool_t, float16_t const *, svuint64_t); | |
| 10954 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s32))) | |
| 10955 | svint32_t svld1q_gather_u64index_s32(svbool_t, int32_t const *, svuint64_t); | |
| 10956 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s64))) | |
| 10957 | svint64_t svld1q_gather_u64index_s64(svbool_t, int64_t const *, svuint64_t); | |
| 10958 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s16))) | |
| 10959 | svint16_t svld1q_gather_u64index_s16(svbool_t, int16_t const *, svuint64_t); | |
| 10960 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u8))) | |
| 10961 | svuint8_t svld1q_gather_u64offset_u8(svbool_t, uint8_t const *, svuint64_t); | |
| 10962 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u32))) | |
| 10963 | svuint32_t svld1q_gather_u64offset_u32(svbool_t, uint32_t const *, svuint64_t); | |
| 10964 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u64))) | |
| 10965 | svuint64_t svld1q_gather_u64offset_u64(svbool_t, uint64_t const *, svuint64_t); | |
| 10966 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u16))) | |
| 10967 | svuint16_t svld1q_gather_u64offset_u16(svbool_t, uint16_t const *, svuint64_t); | |
| 10968 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_bf16))) | |
| 10969 | svbfloat16_t svld1q_gather_u64offset_bf16(svbool_t, bfloat16_t const *, svuint64_t); | |
| 10970 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s8))) | |
| 10971 | svint8_t svld1q_gather_u64offset_s8(svbool_t, int8_t const *, svuint64_t); | |
| 10972 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f64))) | |
| 10973 | svfloat64_t svld1q_gather_u64offset_f64(svbool_t, float64_t const *, svuint64_t); | |
| 10974 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f32))) | |
| 10975 | svfloat32_t svld1q_gather_u64offset_f32(svbool_t, float32_t const *, svuint64_t); | |
| 10976 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f16))) | |
| 10977 | svfloat16_t svld1q_gather_u64offset_f16(svbool_t, float16_t const *, svuint64_t); | |
| 10978 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s32))) | |
| 10979 | svint32_t svld1q_gather_u64offset_s32(svbool_t, int32_t const *, svuint64_t); | |
| 10980 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s64))) | |
| 10981 | svint64_t svld1q_gather_u64offset_s64(svbool_t, int64_t const *, svuint64_t); | |
| 10982 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_mf8))) | |
| 10983 | svmfloat8_t svld1q_gather_u64offset_mf8(svbool_t, mfloat8_t const *, svuint64_t); | |
| 10984 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s16))) | |
| 10985 | svint16_t svld1q_gather_u64offset_s16(svbool_t, int16_t const *, svuint64_t); | |
| 10986 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_u64))) | |
| 10987 | svuint64_t svld1udq_u64(svbool_t, uint64_t const *); | |
| 10988 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_f64))) | |
| 10989 | svfloat64_t svld1udq_f64(svbool_t, float64_t const *); | |
| 10990 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_s64))) | |
| 10991 | svint64_t svld1udq_s64(svbool_t, int64_t const *); | |
| 10992 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_u64))) | |
| 10993 | svuint64_t svld1udq_vnum_u64(svbool_t, uint64_t const *, int64_t); | |
| 10994 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_f64))) | |
| 10995 | svfloat64_t svld1udq_vnum_f64(svbool_t, float64_t const *, int64_t); | |
| 10996 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_s64))) | |
| 10997 | svint64_t svld1udq_vnum_s64(svbool_t, int64_t const *, int64_t); | |
| 10998 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_u32))) | |
| 10999 | svuint32_t svld1uwq_u32(svbool_t, uint32_t const *); | |
| 11000 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_f32))) | |
| 11001 | svfloat32_t svld1uwq_f32(svbool_t, float32_t const *); | |
| 11002 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_s32))) | |
| 11003 | svint32_t svld1uwq_s32(svbool_t, int32_t const *); | |
| 11004 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_u32))) | |
| 11005 | svuint32_t svld1uwq_vnum_u32(svbool_t, uint32_t const *, int64_t); | |
| 11006 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_f32))) | |
| 11007 | svfloat32_t svld1uwq_vnum_f32(svbool_t, float32_t const *, int64_t); | |
| 11008 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_s32))) | |
| 11009 | svint32_t svld1uwq_vnum_s32(svbool_t, int32_t const *, int64_t); | |
| 11010 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_u64))) | |
| 11011 | void svst1dq_u64(svbool_t, uint64_t *, svuint64_t); | |
| 11012 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_f64))) | |
| 11013 | void svst1dq_f64(svbool_t, float64_t *, svfloat64_t); | |
| 11014 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_s64))) | |
| 11015 | void svst1dq_s64(svbool_t, int64_t *, svint64_t); | |
| 11016 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_u64))) | |
| 11017 | void svst1dq_vnum_u64(svbool_t, uint64_t *, int64_t, svuint64_t); | |
| 11018 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_f64))) | |
| 11019 | void svst1dq_vnum_f64(svbool_t, float64_t *, int64_t, svfloat64_t); | |
| 11020 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_s64))) | |
| 11021 | void svst1dq_vnum_s64(svbool_t, int64_t *, int64_t, svint64_t); | |
| 11022 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u8))) | |
| 11023 | void svst1q_scatter_u64base_u8(svbool_t, svuint64_t, svuint8_t); | |
| 11024 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u32))) | |
| 11025 | void svst1q_scatter_u64base_u32(svbool_t, svuint64_t, svuint32_t); | |
| 11026 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u64))) | |
| 11027 | void svst1q_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 11028 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u16))) | |
| 11029 | void svst1q_scatter_u64base_u16(svbool_t, svuint64_t, svuint16_t); | |
| 11030 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_bf16))) | |
| 11031 | void svst1q_scatter_u64base_bf16(svbool_t, svuint64_t, svbfloat16_t); | |
| 11032 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s8))) | |
| 11033 | void svst1q_scatter_u64base_s8(svbool_t, svuint64_t, svint8_t); | |
| 11034 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f64))) | |
| 11035 | void svst1q_scatter_u64base_f64(svbool_t, svuint64_t, svfloat64_t); | |
| 11036 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f32))) | |
| 11037 | void svst1q_scatter_u64base_f32(svbool_t, svuint64_t, svfloat32_t); | |
| 11038 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f16))) | |
| 11039 | void svst1q_scatter_u64base_f16(svbool_t, svuint64_t, svfloat16_t); | |
| 11040 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s32))) | |
| 11041 | void svst1q_scatter_u64base_s32(svbool_t, svuint64_t, svint32_t); | |
| 11042 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s64))) | |
| 11043 | void svst1q_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 11044 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_mf8))) | |
| 11045 | void svst1q_scatter_u64base_mf8(svbool_t, svuint64_t, svmfloat8_t); | |
| 11046 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s16))) | |
| 11047 | void svst1q_scatter_u64base_s16(svbool_t, svuint64_t, svint16_t); | |
| 11048 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u32))) | |
| 11049 | void svst1q_scatter_u64base_index_u32(svbool_t, svuint64_t, int64_t, svuint32_t); | |
| 11050 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u64))) | |
| 11051 | void svst1q_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 11052 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u16))) | |
| 11053 | void svst1q_scatter_u64base_index_u16(svbool_t, svuint64_t, int64_t, svuint16_t); | |
| 11054 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_bf16))) | |
| 11055 | void svst1q_scatter_u64base_index_bf16(svbool_t, svuint64_t, int64_t, svbfloat16_t); | |
| 11056 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f64))) | |
| 11057 | void svst1q_scatter_u64base_index_f64(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 11058 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f32))) | |
| 11059 | void svst1q_scatter_u64base_index_f32(svbool_t, svuint64_t, int64_t, svfloat32_t); | |
| 11060 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f16))) | |
| 11061 | void svst1q_scatter_u64base_index_f16(svbool_t, svuint64_t, int64_t, svfloat16_t); | |
| 11062 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s32))) | |
| 11063 | void svst1q_scatter_u64base_index_s32(svbool_t, svuint64_t, int64_t, svint32_t); | |
| 11064 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s64))) | |
| 11065 | void svst1q_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 11066 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s16))) | |
| 11067 | void svst1q_scatter_u64base_index_s16(svbool_t, svuint64_t, int64_t, svint16_t); | |
| 11068 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u8))) | |
| 11069 | void svst1q_scatter_u64base_offset_u8(svbool_t, svuint64_t, int64_t, svuint8_t); | |
| 11070 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u32))) | |
| 11071 | void svst1q_scatter_u64base_offset_u32(svbool_t, svuint64_t, int64_t, svuint32_t); | |
| 11072 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u64))) | |
| 11073 | void svst1q_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 11074 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u16))) | |
| 11075 | void svst1q_scatter_u64base_offset_u16(svbool_t, svuint64_t, int64_t, svuint16_t); | |
| 11076 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_bf16))) | |
| 11077 | void svst1q_scatter_u64base_offset_bf16(svbool_t, svuint64_t, int64_t, svbfloat16_t); | |
| 11078 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s8))) | |
| 11079 | void svst1q_scatter_u64base_offset_s8(svbool_t, svuint64_t, int64_t, svint8_t); | |
| 11080 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f64))) | |
| 11081 | void svst1q_scatter_u64base_offset_f64(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 11082 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f32))) | |
| 11083 | void svst1q_scatter_u64base_offset_f32(svbool_t, svuint64_t, int64_t, svfloat32_t); | |
| 11084 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f16))) | |
| 11085 | void svst1q_scatter_u64base_offset_f16(svbool_t, svuint64_t, int64_t, svfloat16_t); | |
| 11086 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s32))) | |
| 11087 | void svst1q_scatter_u64base_offset_s32(svbool_t, svuint64_t, int64_t, svint32_t); | |
| 11088 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s64))) | |
| 11089 | void svst1q_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 11090 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_mf8))) | |
| 11091 | void svst1q_scatter_u64base_offset_mf8(svbool_t, svuint64_t, int64_t, svmfloat8_t); | |
| 11092 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s16))) | |
| 11093 | void svst1q_scatter_u64base_offset_s16(svbool_t, svuint64_t, int64_t, svint16_t); | |
| 11094 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u32))) | |
| 11095 | void svst1q_scatter_s64index_u32(svbool_t, uint32_t *, svint64_t, svuint32_t); | |
| 11096 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u64))) | |
| 11097 | void svst1q_scatter_s64index_u64(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 11098 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u16))) | |
| 11099 | void svst1q_scatter_s64index_u16(svbool_t, uint16_t *, svint64_t, svuint16_t); | |
| 11100 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_bf16))) | |
| 11101 | void svst1q_scatter_s64index_bf16(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t); | |
| 11102 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f64))) | |
| 11103 | void svst1q_scatter_s64index_f64(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 11104 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f32))) | |
| 11105 | void svst1q_scatter_s64index_f32(svbool_t, float32_t *, svint64_t, svfloat32_t); | |
| 11106 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f16))) | |
| 11107 | void svst1q_scatter_s64index_f16(svbool_t, float16_t *, svint64_t, svfloat16_t); | |
| 11108 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s32))) | |
| 11109 | void svst1q_scatter_s64index_s32(svbool_t, int32_t *, svint64_t, svint32_t); | |
| 11110 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s64))) | |
| 11111 | void svst1q_scatter_s64index_s64(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 11112 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s16))) | |
| 11113 | void svst1q_scatter_s64index_s16(svbool_t, int16_t *, svint64_t, svint16_t); | |
| 11114 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u32))) | |
| 11115 | void svst1q_scatter_u64index_u32(svbool_t, uint32_t *, svuint64_t, svuint32_t); | |
| 11116 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u64))) | |
| 11117 | void svst1q_scatter_u64index_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 11118 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u16))) | |
| 11119 | void svst1q_scatter_u64index_u16(svbool_t, uint16_t *, svuint64_t, svuint16_t); | |
| 11120 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_bf16))) | |
| 11121 | void svst1q_scatter_u64index_bf16(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t); | |
| 11122 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f64))) | |
| 11123 | void svst1q_scatter_u64index_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 11124 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f32))) | |
| 11125 | void svst1q_scatter_u64index_f32(svbool_t, float32_t *, svuint64_t, svfloat32_t); | |
| 11126 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f16))) | |
| 11127 | void svst1q_scatter_u64index_f16(svbool_t, float16_t *, svuint64_t, svfloat16_t); | |
| 11128 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s32))) | |
| 11129 | void svst1q_scatter_u64index_s32(svbool_t, int32_t *, svuint64_t, svint32_t); | |
| 11130 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s64))) | |
| 11131 | void svst1q_scatter_u64index_s64(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 11132 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s16))) | |
| 11133 | void svst1q_scatter_u64index_s16(svbool_t, int16_t *, svuint64_t, svint16_t); | |
| 11134 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u8))) | |
| 11135 | void svst1q_scatter_s64offset_u8(svbool_t, uint8_t *, svint64_t, svuint8_t); | |
| 11136 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u32))) | |
| 11137 | void svst1q_scatter_s64offset_u32(svbool_t, uint32_t *, svint64_t, svuint32_t); | |
| 11138 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u64))) | |
| 11139 | void svst1q_scatter_s64offset_u64(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 11140 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u16))) | |
| 11141 | void svst1q_scatter_s64offset_u16(svbool_t, uint16_t *, svint64_t, svuint16_t); | |
| 11142 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_bf16))) | |
| 11143 | void svst1q_scatter_s64offset_bf16(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t); | |
| 11144 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s8))) | |
| 11145 | void svst1q_scatter_s64offset_s8(svbool_t, int8_t *, svint64_t, svint8_t); | |
| 11146 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f64))) | |
| 11147 | void svst1q_scatter_s64offset_f64(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 11148 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f32))) | |
| 11149 | void svst1q_scatter_s64offset_f32(svbool_t, float32_t *, svint64_t, svfloat32_t); | |
| 11150 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f16))) | |
| 11151 | void svst1q_scatter_s64offset_f16(svbool_t, float16_t *, svint64_t, svfloat16_t); | |
| 11152 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s32))) | |
| 11153 | void svst1q_scatter_s64offset_s32(svbool_t, int32_t *, svint64_t, svint32_t); | |
| 11154 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s64))) | |
| 11155 | void svst1q_scatter_s64offset_s64(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 11156 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_mf8))) | |
| 11157 | void svst1q_scatter_s64offset_mf8(svbool_t, mfloat8_t *, svint64_t, svmfloat8_t); | |
| 11158 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s16))) | |
| 11159 | void svst1q_scatter_s64offset_s16(svbool_t, int16_t *, svint64_t, svint16_t); | |
| 11160 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u8))) | |
| 11161 | void svst1q_scatter_u64offset_u8(svbool_t, uint8_t *, svuint64_t, svuint8_t); | |
| 11162 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u32))) | |
| 11163 | void svst1q_scatter_u64offset_u32(svbool_t, uint32_t *, svuint64_t, svuint32_t); | |
| 11164 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u64))) | |
| 11165 | void svst1q_scatter_u64offset_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 11166 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u16))) | |
| 11167 | void svst1q_scatter_u64offset_u16(svbool_t, uint16_t *, svuint64_t, svuint16_t); | |
| 11168 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_bf16))) | |
| 11169 | void svst1q_scatter_u64offset_bf16(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t); | |
| 11170 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s8))) | |
| 11171 | void svst1q_scatter_u64offset_s8(svbool_t, int8_t *, svuint64_t, svint8_t); | |
| 11172 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f64))) | |
| 11173 | void svst1q_scatter_u64offset_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 11174 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f32))) | |
| 11175 | void svst1q_scatter_u64offset_f32(svbool_t, float32_t *, svuint64_t, svfloat32_t); | |
| 11176 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f16))) | |
| 11177 | void svst1q_scatter_u64offset_f16(svbool_t, float16_t *, svuint64_t, svfloat16_t); | |
| 11178 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s32))) | |
| 11179 | void svst1q_scatter_u64offset_s32(svbool_t, int32_t *, svuint64_t, svint32_t); | |
| 11180 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s64))) | |
| 11181 | void svst1q_scatter_u64offset_s64(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 11182 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_mf8))) | |
| 11183 | void svst1q_scatter_u64offset_mf8(svbool_t, mfloat8_t *, svuint64_t, svmfloat8_t); | |
| 11184 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s16))) | |
| 11185 | void svst1q_scatter_u64offset_s16(svbool_t, int16_t *, svuint64_t, svint16_t); | |
| 11186 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_u32))) | |
| 11187 | void svst1wq_u32(svbool_t, uint32_t *, svuint32_t); | |
| 11188 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_f32))) | |
| 11189 | void svst1wq_f32(svbool_t, float32_t *, svfloat32_t); | |
| 11190 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_s32))) | |
| 11191 | void svst1wq_s32(svbool_t, int32_t *, svint32_t); | |
| 11192 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_u32))) | |
| 11193 | void svst1wq_vnum_u32(svbool_t, uint32_t *, int64_t, svuint32_t); | |
| 11194 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_f32))) | |
| 11195 | void svst1wq_vnum_f32(svbool_t, float32_t *, int64_t, svfloat32_t); | |
| 11196 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_s32))) | |
| 11197 | void svst1wq_vnum_s32(svbool_t, int32_t *, int64_t, svint32_t); | |
| 11198 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u32))) | |
| 11199 | svuint32_t svld1q_gather_index_u32(svbool_t, svuint64_t, int64_t); | |
| 11200 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u64))) | |
| 11201 | svuint64_t svld1q_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 11202 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u16))) | |
| 11203 | svuint16_t svld1q_gather_index_u16(svbool_t, svuint64_t, int64_t); | |
| 11204 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_bf16))) | |
| 11205 | svbfloat16_t svld1q_gather_index_bf16(svbool_t, svuint64_t, int64_t); | |
| 11206 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f64))) | |
| 11207 | svfloat64_t svld1q_gather_index_f64(svbool_t, svuint64_t, int64_t); | |
| 11208 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f32))) | |
| 11209 | svfloat32_t svld1q_gather_index_f32(svbool_t, svuint64_t, int64_t); | |
| 11210 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f16))) | |
| 11211 | svfloat16_t svld1q_gather_index_f16(svbool_t, svuint64_t, int64_t); | |
| 11212 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s32))) | |
| 11213 | svint32_t svld1q_gather_index_s32(svbool_t, svuint64_t, int64_t); | |
| 11214 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s64))) | |
| 11215 | svint64_t svld1q_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 11216 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s16))) | |
| 11217 | svint16_t svld1q_gather_index_s16(svbool_t, svuint64_t, int64_t); | |
| 11218 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u8))) | |
| 11219 | svuint8_t svld1q_gather_offset_u8(svbool_t, svuint64_t, int64_t); | |
| 11220 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u32))) | |
| 11221 | svuint32_t svld1q_gather_offset_u32(svbool_t, svuint64_t, int64_t); | |
| 11222 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u64))) | |
| 11223 | svuint64_t svld1q_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 11224 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u16))) | |
| 11225 | svuint16_t svld1q_gather_offset_u16(svbool_t, svuint64_t, int64_t); | |
| 11226 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_bf16))) | |
| 11227 | svbfloat16_t svld1q_gather_offset_bf16(svbool_t, svuint64_t, int64_t); | |
| 11228 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s8))) | |
| 11229 | svint8_t svld1q_gather_offset_s8(svbool_t, svuint64_t, int64_t); | |
| 11230 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f64))) | |
| 11231 | svfloat64_t svld1q_gather_offset_f64(svbool_t, svuint64_t, int64_t); | |
| 11232 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f32))) | |
| 11233 | svfloat32_t svld1q_gather_offset_f32(svbool_t, svuint64_t, int64_t); | |
| 11234 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f16))) | |
| 11235 | svfloat16_t svld1q_gather_offset_f16(svbool_t, svuint64_t, int64_t); | |
| 11236 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s32))) | |
| 11237 | svint32_t svld1q_gather_offset_s32(svbool_t, svuint64_t, int64_t); | |
| 11238 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s64))) | |
| 11239 | svint64_t svld1q_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 11240 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_mf8))) | |
| 11241 | svmfloat8_t svld1q_gather_offset_mf8(svbool_t, svuint64_t, int64_t); | |
| 11242 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s16))) | |
| 11243 | svint16_t svld1q_gather_offset_s16(svbool_t, svuint64_t, int64_t); | |
| 11244 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u8))) | |
| 11245 | svuint8_t svld1q_gather_u8(svbool_t, svuint64_t); | |
| 11246 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u32))) | |
| 11247 | svuint32_t svld1q_gather_u32(svbool_t, svuint64_t); | |
| 11248 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u64))) | |
| 11249 | svuint64_t svld1q_gather_u64(svbool_t, svuint64_t); | |
| 11250 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u16))) | |
| 11251 | svuint16_t svld1q_gather_u16(svbool_t, svuint64_t); | |
| 11252 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_bf16))) | |
| 11253 | svbfloat16_t svld1q_gather_bf16(svbool_t, svuint64_t); | |
| 11254 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s8))) | |
| 11255 | svint8_t svld1q_gather_s8(svbool_t, svuint64_t); | |
| 11256 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f64))) | |
| 11257 | svfloat64_t svld1q_gather_f64(svbool_t, svuint64_t); | |
| 11258 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f32))) | |
| 11259 | svfloat32_t svld1q_gather_f32(svbool_t, svuint64_t); | |
| 11260 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f16))) | |
| 11261 | svfloat16_t svld1q_gather_f16(svbool_t, svuint64_t); | |
| 11262 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s32))) | |
| 11263 | svint32_t svld1q_gather_s32(svbool_t, svuint64_t); | |
| 11264 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s64))) | |
| 11265 | svint64_t svld1q_gather_s64(svbool_t, svuint64_t); | |
| 11266 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_mf8))) | |
| 11267 | svmfloat8_t svld1q_gather_mf8(svbool_t, svuint64_t); | |
| 11268 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s16))) | |
| 11269 | svint16_t svld1q_gather_s16(svbool_t, svuint64_t); | |
| 11270 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u32))) | |
| 11271 | svuint32_t svld1q_gather_index(svbool_t, uint32_t const *, svuint64_t); | |
| 11272 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u64))) | |
| 11273 | svuint64_t svld1q_gather_index(svbool_t, uint64_t const *, svuint64_t); | |
| 11274 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u16))) | |
| 11275 | svuint16_t svld1q_gather_index(svbool_t, uint16_t const *, svuint64_t); | |
| 11276 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_bf16))) | |
| 11277 | svbfloat16_t svld1q_gather_index(svbool_t, bfloat16_t const *, svuint64_t); | |
| 11278 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f64))) | |
| 11279 | svfloat64_t svld1q_gather_index(svbool_t, float64_t const *, svuint64_t); | |
| 11280 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f32))) | |
| 11281 | svfloat32_t svld1q_gather_index(svbool_t, float32_t const *, svuint64_t); | |
| 11282 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f16))) | |
| 11283 | svfloat16_t svld1q_gather_index(svbool_t, float16_t const *, svuint64_t); | |
| 11284 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s32))) | |
| 11285 | svint32_t svld1q_gather_index(svbool_t, int32_t const *, svuint64_t); | |
| 11286 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s64))) | |
| 11287 | svint64_t svld1q_gather_index(svbool_t, int64_t const *, svuint64_t); | |
| 11288 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s16))) | |
| 11289 | svint16_t svld1q_gather_index(svbool_t, int16_t const *, svuint64_t); | |
| 11290 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u8))) | |
| 11291 | svuint8_t svld1q_gather_offset(svbool_t, uint8_t const *, svuint64_t); | |
| 11292 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u32))) | |
| 11293 | svuint32_t svld1q_gather_offset(svbool_t, uint32_t const *, svuint64_t); | |
| 11294 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u64))) | |
| 11295 | svuint64_t svld1q_gather_offset(svbool_t, uint64_t const *, svuint64_t); | |
| 11296 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u16))) | |
| 11297 | svuint16_t svld1q_gather_offset(svbool_t, uint16_t const *, svuint64_t); | |
| 11298 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_bf16))) | |
| 11299 | svbfloat16_t svld1q_gather_offset(svbool_t, bfloat16_t const *, svuint64_t); | |
| 11300 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s8))) | |
| 11301 | svint8_t svld1q_gather_offset(svbool_t, int8_t const *, svuint64_t); | |
| 11302 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f64))) | |
| 11303 | svfloat64_t svld1q_gather_offset(svbool_t, float64_t const *, svuint64_t); | |
| 11304 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f32))) | |
| 11305 | svfloat32_t svld1q_gather_offset(svbool_t, float32_t const *, svuint64_t); | |
| 11306 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f16))) | |
| 11307 | svfloat16_t svld1q_gather_offset(svbool_t, float16_t const *, svuint64_t); | |
| 11308 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s32))) | |
| 11309 | svint32_t svld1q_gather_offset(svbool_t, int32_t const *, svuint64_t); | |
| 11310 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s64))) | |
| 11311 | svint64_t svld1q_gather_offset(svbool_t, int64_t const *, svuint64_t); | |
| 11312 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_mf8))) | |
| 11313 | svmfloat8_t svld1q_gather_offset(svbool_t, mfloat8_t const *, svuint64_t); | |
| 11314 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s16))) | |
| 11315 | svint16_t svld1q_gather_offset(svbool_t, int16_t const *, svuint64_t); | |
| 11316 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_u64))) | |
| 11317 | svuint64_t svld1udq(svbool_t, uint64_t const *); | |
| 11318 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_f64))) | |
| 11319 | svfloat64_t svld1udq(svbool_t, float64_t const *); | |
| 11320 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_s64))) | |
| 11321 | svint64_t svld1udq(svbool_t, int64_t const *); | |
| 11322 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_u64))) | |
| 11323 | svuint64_t svld1udq_vnum(svbool_t, uint64_t const *, int64_t); | |
| 11324 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_f64))) | |
| 11325 | svfloat64_t svld1udq_vnum(svbool_t, float64_t const *, int64_t); | |
| 11326 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_s64))) | |
| 11327 | svint64_t svld1udq_vnum(svbool_t, int64_t const *, int64_t); | |
| 11328 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_u32))) | |
| 11329 | svuint32_t svld1uwq(svbool_t, uint32_t const *); | |
| 11330 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_f32))) | |
| 11331 | svfloat32_t svld1uwq(svbool_t, float32_t const *); | |
| 11332 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_s32))) | |
| 11333 | svint32_t svld1uwq(svbool_t, int32_t const *); | |
| 11334 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_u32))) | |
| 11335 | svuint32_t svld1uwq_vnum(svbool_t, uint32_t const *, int64_t); | |
| 11336 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_f32))) | |
| 11337 | svfloat32_t svld1uwq_vnum(svbool_t, float32_t const *, int64_t); | |
| 11338 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_s32))) | |
| 11339 | svint32_t svld1uwq_vnum(svbool_t, int32_t const *, int64_t); | |
| 11340 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_u64))) | |
| 11341 | void svst1dq(svbool_t, uint64_t *, svuint64_t); | |
| 11342 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_f64))) | |
| 11343 | void svst1dq(svbool_t, float64_t *, svfloat64_t); | |
| 11344 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_s64))) | |
| 11345 | void svst1dq(svbool_t, int64_t *, svint64_t); | |
| 11346 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_u64))) | |
| 11347 | void svst1dq_vnum(svbool_t, uint64_t *, int64_t, svuint64_t); | |
| 11348 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_f64))) | |
| 11349 | void svst1dq_vnum(svbool_t, float64_t *, int64_t, svfloat64_t); | |
| 11350 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_s64))) | |
| 11351 | void svst1dq_vnum(svbool_t, int64_t *, int64_t, svint64_t); | |
| 11352 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u8))) | |
| 11353 | void svst1q_scatter(svbool_t, svuint64_t, svuint8_t); | |
| 11354 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u32))) | |
| 11355 | void svst1q_scatter(svbool_t, svuint64_t, svuint32_t); | |
| 11356 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u64))) | |
| 11357 | void svst1q_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 11358 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u16))) | |
| 11359 | void svst1q_scatter(svbool_t, svuint64_t, svuint16_t); | |
| 11360 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_bf16))) | |
| 11361 | void svst1q_scatter(svbool_t, svuint64_t, svbfloat16_t); | |
| 11362 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s8))) | |
| 11363 | void svst1q_scatter(svbool_t, svuint64_t, svint8_t); | |
| 11364 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f64))) | |
| 11365 | void svst1q_scatter(svbool_t, svuint64_t, svfloat64_t); | |
| 11366 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f32))) | |
| 11367 | void svst1q_scatter(svbool_t, svuint64_t, svfloat32_t); | |
| 11368 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f16))) | |
| 11369 | void svst1q_scatter(svbool_t, svuint64_t, svfloat16_t); | |
| 11370 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s32))) | |
| 11371 | void svst1q_scatter(svbool_t, svuint64_t, svint32_t); | |
| 11372 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s64))) | |
| 11373 | void svst1q_scatter(svbool_t, svuint64_t, svint64_t); | |
| 11374 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_mf8))) | |
| 11375 | void svst1q_scatter(svbool_t, svuint64_t, svmfloat8_t); | |
| 11376 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s16))) | |
| 11377 | void svst1q_scatter(svbool_t, svuint64_t, svint16_t); | |
| 11378 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u32))) | |
| 11379 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint32_t); | |
| 11380 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u64))) | |
| 11381 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 11382 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u16))) | |
| 11383 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint16_t); | |
| 11384 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_bf16))) | |
| 11385 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svbfloat16_t); | |
| 11386 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f64))) | |
| 11387 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 11388 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f32))) | |
| 11389 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat32_t); | |
| 11390 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f16))) | |
| 11391 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat16_t); | |
| 11392 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s32))) | |
| 11393 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint32_t); | |
| 11394 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s64))) | |
| 11395 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 11396 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s16))) | |
| 11397 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint16_t); | |
| 11398 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u8))) | |
| 11399 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint8_t); | |
| 11400 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u32))) | |
| 11401 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint32_t); | |
| 11402 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u64))) | |
| 11403 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 11404 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u16))) | |
| 11405 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint16_t); | |
| 11406 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_bf16))) | |
| 11407 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svbfloat16_t); | |
| 11408 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s8))) | |
| 11409 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint8_t); | |
| 11410 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f64))) | |
| 11411 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 11412 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f32))) | |
| 11413 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat32_t); | |
| 11414 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f16))) | |
| 11415 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat16_t); | |
| 11416 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s32))) | |
| 11417 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint32_t); | |
| 11418 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s64))) | |
| 11419 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 11420 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_mf8))) | |
| 11421 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svmfloat8_t); | |
| 11422 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s16))) | |
| 11423 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint16_t); | |
| 11424 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u32))) | |
| 11425 | void svst1q_scatter_index(svbool_t, uint32_t *, svint64_t, svuint32_t); | |
| 11426 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u64))) | |
| 11427 | void svst1q_scatter_index(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 11428 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u16))) | |
| 11429 | void svst1q_scatter_index(svbool_t, uint16_t *, svint64_t, svuint16_t); | |
| 11430 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_bf16))) | |
| 11431 | void svst1q_scatter_index(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t); | |
| 11432 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f64))) | |
| 11433 | void svst1q_scatter_index(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 11434 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f32))) | |
| 11435 | void svst1q_scatter_index(svbool_t, float32_t *, svint64_t, svfloat32_t); | |
| 11436 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f16))) | |
| 11437 | void svst1q_scatter_index(svbool_t, float16_t *, svint64_t, svfloat16_t); | |
| 11438 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s32))) | |
| 11439 | void svst1q_scatter_index(svbool_t, int32_t *, svint64_t, svint32_t); | |
| 11440 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s64))) | |
| 11441 | void svst1q_scatter_index(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 11442 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s16))) | |
| 11443 | void svst1q_scatter_index(svbool_t, int16_t *, svint64_t, svint16_t); | |
| 11444 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u32))) | |
| 11445 | void svst1q_scatter_index(svbool_t, uint32_t *, svuint64_t, svuint32_t); | |
| 11446 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u64))) | |
| 11447 | void svst1q_scatter_index(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 11448 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u16))) | |
| 11449 | void svst1q_scatter_index(svbool_t, uint16_t *, svuint64_t, svuint16_t); | |
| 11450 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_bf16))) | |
| 11451 | void svst1q_scatter_index(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t); | |
| 11452 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f64))) | |
| 11453 | void svst1q_scatter_index(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 11454 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f32))) | |
| 11455 | void svst1q_scatter_index(svbool_t, float32_t *, svuint64_t, svfloat32_t); | |
| 11456 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f16))) | |
| 11457 | void svst1q_scatter_index(svbool_t, float16_t *, svuint64_t, svfloat16_t); | |
| 11458 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s32))) | |
| 11459 | void svst1q_scatter_index(svbool_t, int32_t *, svuint64_t, svint32_t); | |
| 11460 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s64))) | |
| 11461 | void svst1q_scatter_index(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 11462 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s16))) | |
| 11463 | void svst1q_scatter_index(svbool_t, int16_t *, svuint64_t, svint16_t); | |
| 11464 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u8))) | |
| 11465 | void svst1q_scatter_offset(svbool_t, uint8_t *, svint64_t, svuint8_t); | |
| 11466 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u32))) | |
| 11467 | void svst1q_scatter_offset(svbool_t, uint32_t *, svint64_t, svuint32_t); | |
| 11468 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u64))) | |
| 11469 | void svst1q_scatter_offset(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 11470 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u16))) | |
| 11471 | void svst1q_scatter_offset(svbool_t, uint16_t *, svint64_t, svuint16_t); | |
| 11472 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_bf16))) | |
| 11473 | void svst1q_scatter_offset(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t); | |
| 11474 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s8))) | |
| 11475 | void svst1q_scatter_offset(svbool_t, int8_t *, svint64_t, svint8_t); | |
| 11476 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f64))) | |
| 11477 | void svst1q_scatter_offset(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 11478 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f32))) | |
| 11479 | void svst1q_scatter_offset(svbool_t, float32_t *, svint64_t, svfloat32_t); | |
| 11480 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f16))) | |
| 11481 | void svst1q_scatter_offset(svbool_t, float16_t *, svint64_t, svfloat16_t); | |
| 11482 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s32))) | |
| 11483 | void svst1q_scatter_offset(svbool_t, int32_t *, svint64_t, svint32_t); | |
| 11484 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s64))) | |
| 11485 | void svst1q_scatter_offset(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 11486 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_mf8))) | |
| 11487 | void svst1q_scatter_offset(svbool_t, mfloat8_t *, svint64_t, svmfloat8_t); | |
| 11488 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s16))) | |
| 11489 | void svst1q_scatter_offset(svbool_t, int16_t *, svint64_t, svint16_t); | |
| 11490 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u8))) | |
| 11491 | void svst1q_scatter_offset(svbool_t, uint8_t *, svuint64_t, svuint8_t); | |
| 11492 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u32))) | |
| 11493 | void svst1q_scatter_offset(svbool_t, uint32_t *, svuint64_t, svuint32_t); | |
| 11494 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u64))) | |
| 11495 | void svst1q_scatter_offset(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 11496 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u16))) | |
| 11497 | void svst1q_scatter_offset(svbool_t, uint16_t *, svuint64_t, svuint16_t); | |
| 11498 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_bf16))) | |
| 11499 | void svst1q_scatter_offset(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t); | |
| 11500 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s8))) | |
| 11501 | void svst1q_scatter_offset(svbool_t, int8_t *, svuint64_t, svint8_t); | |
| 11502 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f64))) | |
| 11503 | void svst1q_scatter_offset(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 11504 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f32))) | |
| 11505 | void svst1q_scatter_offset(svbool_t, float32_t *, svuint64_t, svfloat32_t); | |
| 11506 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f16))) | |
| 11507 | void svst1q_scatter_offset(svbool_t, float16_t *, svuint64_t, svfloat16_t); | |
| 11508 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s32))) | |
| 11509 | void svst1q_scatter_offset(svbool_t, int32_t *, svuint64_t, svint32_t); | |
| 11510 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s64))) | |
| 11511 | void svst1q_scatter_offset(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 11512 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_mf8))) | |
| 11513 | void svst1q_scatter_offset(svbool_t, mfloat8_t *, svuint64_t, svmfloat8_t); | |
| 11514 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s16))) | |
| 11515 | void svst1q_scatter_offset(svbool_t, int16_t *, svuint64_t, svint16_t); | |
| 11516 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_u32))) | |
| 11517 | void svst1wq(svbool_t, uint32_t *, svuint32_t); | |
| 11518 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_f32))) | |
| 11519 | void svst1wq(svbool_t, float32_t *, svfloat32_t); | |
| 11520 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_s32))) | |
| 11521 | void svst1wq(svbool_t, int32_t *, svint32_t); | |
| 11522 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_u32))) | |
| 11523 | void svst1wq_vnum(svbool_t, uint32_t *, int64_t, svuint32_t); | |
| 11524 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_f32))) | |
| 11525 | void svst1wq_vnum(svbool_t, float32_t *, int64_t, svfloat32_t); | |
| 11526 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_s32))) | |
| 11527 | void svst1wq_vnum(svbool_t, int32_t *, int64_t, svint32_t); | |
| 11528 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c8))) | |
| 11529 | uint64_t svcntp_c8(svcount_t, uint64_t); | |
| 11530 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c32))) | |
| 11531 | uint64_t svcntp_c32(svcount_t, uint64_t); | |
| 11532 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c64))) | |
| 11533 | uint64_t svcntp_c64(svcount_t, uint64_t); | |
| 11534 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c16))) | |
| 11535 | uint64_t svcntp_c16(svcount_t, uint64_t); | |
| 11536 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x2))) | |
| 11537 | svuint8x2_t svld1_u8_x2(svcount_t, uint8_t const *); | |
| 11538 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x2))) | |
| 11539 | svint8x2_t svld1_s8_x2(svcount_t, int8_t const *); | |
| 11540 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x2))) | |
| 11541 | svmfloat8x2_t svld1_mf8_x2(svcount_t, mfloat8_t const *); | |
| 11542 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x2))) | |
| 11543 | svuint64x2_t svld1_u64_x2(svcount_t, uint64_t const *); | |
| 11544 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x2))) | |
| 11545 | svfloat64x2_t svld1_f64_x2(svcount_t, float64_t const *); | |
| 11546 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x2))) | |
| 11547 | svint64x2_t svld1_s64_x2(svcount_t, int64_t const *); | |
| 11548 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x2))) | |
| 11549 | svuint16x2_t svld1_u16_x2(svcount_t, uint16_t const *); | |
| 11550 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x2))) | |
| 11551 | svbfloat16x2_t svld1_bf16_x2(svcount_t, bfloat16_t const *); | |
| 11552 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x2))) | |
| 11553 | svfloat16x2_t svld1_f16_x2(svcount_t, float16_t const *); | |
| 11554 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x2))) | |
| 11555 | svint16x2_t svld1_s16_x2(svcount_t, int16_t const *); | |
| 11556 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x2))) | |
| 11557 | svuint32x2_t svld1_u32_x2(svcount_t, uint32_t const *); | |
| 11558 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x2))) | |
| 11559 | svfloat32x2_t svld1_f32_x2(svcount_t, float32_t const *); | |
| 11560 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x2))) | |
| 11561 | svint32x2_t svld1_s32_x2(svcount_t, int32_t const *); | |
| 11562 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x4))) | |
| 11563 | svuint8x4_t svld1_u8_x4(svcount_t, uint8_t const *); | |
| 11564 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x4))) | |
| 11565 | svint8x4_t svld1_s8_x4(svcount_t, int8_t const *); | |
| 11566 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x4))) | |
| 11567 | svmfloat8x4_t svld1_mf8_x4(svcount_t, mfloat8_t const *); | |
| 11568 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x4))) | |
| 11569 | svuint64x4_t svld1_u64_x4(svcount_t, uint64_t const *); | |
| 11570 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x4))) | |
| 11571 | svfloat64x4_t svld1_f64_x4(svcount_t, float64_t const *); | |
| 11572 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x4))) | |
| 11573 | svint64x4_t svld1_s64_x4(svcount_t, int64_t const *); | |
| 11574 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x4))) | |
| 11575 | svuint16x4_t svld1_u16_x4(svcount_t, uint16_t const *); | |
| 11576 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x4))) | |
| 11577 | svbfloat16x4_t svld1_bf16_x4(svcount_t, bfloat16_t const *); | |
| 11578 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x4))) | |
| 11579 | svfloat16x4_t svld1_f16_x4(svcount_t, float16_t const *); | |
| 11580 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x4))) | |
| 11581 | svint16x4_t svld1_s16_x4(svcount_t, int16_t const *); | |
| 11582 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x4))) | |
| 11583 | svuint32x4_t svld1_u32_x4(svcount_t, uint32_t const *); | |
| 11584 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x4))) | |
| 11585 | svfloat32x4_t svld1_f32_x4(svcount_t, float32_t const *); | |
| 11586 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x4))) | |
| 11587 | svint32x4_t svld1_s32_x4(svcount_t, int32_t const *); | |
| 11588 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x2))) | |
| 11589 | svuint8x2_t svld1_vnum_u8_x2(svcount_t, uint8_t const *, int64_t); | |
| 11590 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x2))) | |
| 11591 | svint8x2_t svld1_vnum_s8_x2(svcount_t, int8_t const *, int64_t); | |
| 11592 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x2))) | |
| 11593 | svmfloat8x2_t svld1_vnum_mf8_x2(svcount_t, mfloat8_t const *, int64_t); | |
| 11594 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x2))) | |
| 11595 | svuint64x2_t svld1_vnum_u64_x2(svcount_t, uint64_t const *, int64_t); | |
| 11596 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x2))) | |
| 11597 | svfloat64x2_t svld1_vnum_f64_x2(svcount_t, float64_t const *, int64_t); | |
| 11598 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x2))) | |
| 11599 | svint64x2_t svld1_vnum_s64_x2(svcount_t, int64_t const *, int64_t); | |
| 11600 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x2))) | |
| 11601 | svuint16x2_t svld1_vnum_u16_x2(svcount_t, uint16_t const *, int64_t); | |
| 11602 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x2))) | |
| 11603 | svbfloat16x2_t svld1_vnum_bf16_x2(svcount_t, bfloat16_t const *, int64_t); | |
| 11604 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x2))) | |
| 11605 | svfloat16x2_t svld1_vnum_f16_x2(svcount_t, float16_t const *, int64_t); | |
| 11606 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x2))) | |
| 11607 | svint16x2_t svld1_vnum_s16_x2(svcount_t, int16_t const *, int64_t); | |
| 11608 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x2))) | |
| 11609 | svuint32x2_t svld1_vnum_u32_x2(svcount_t, uint32_t const *, int64_t); | |
| 11610 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x2))) | |
| 11611 | svfloat32x2_t svld1_vnum_f32_x2(svcount_t, float32_t const *, int64_t); | |
| 11612 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x2))) | |
| 11613 | svint32x2_t svld1_vnum_s32_x2(svcount_t, int32_t const *, int64_t); | |
| 11614 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x4))) | |
| 11615 | svuint8x4_t svld1_vnum_u8_x4(svcount_t, uint8_t const *, int64_t); | |
| 11616 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x4))) | |
| 11617 | svint8x4_t svld1_vnum_s8_x4(svcount_t, int8_t const *, int64_t); | |
| 11618 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x4))) | |
| 11619 | svmfloat8x4_t svld1_vnum_mf8_x4(svcount_t, mfloat8_t const *, int64_t); | |
| 11620 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x4))) | |
| 11621 | svuint64x4_t svld1_vnum_u64_x4(svcount_t, uint64_t const *, int64_t); | |
| 11622 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x4))) | |
| 11623 | svfloat64x4_t svld1_vnum_f64_x4(svcount_t, float64_t const *, int64_t); | |
| 11624 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x4))) | |
| 11625 | svint64x4_t svld1_vnum_s64_x4(svcount_t, int64_t const *, int64_t); | |
| 11626 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x4))) | |
| 11627 | svuint16x4_t svld1_vnum_u16_x4(svcount_t, uint16_t const *, int64_t); | |
| 11628 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x4))) | |
| 11629 | svbfloat16x4_t svld1_vnum_bf16_x4(svcount_t, bfloat16_t const *, int64_t); | |
| 11630 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x4))) | |
| 11631 | svfloat16x4_t svld1_vnum_f16_x4(svcount_t, float16_t const *, int64_t); | |
| 11632 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x4))) | |
| 11633 | svint16x4_t svld1_vnum_s16_x4(svcount_t, int16_t const *, int64_t); | |
| 11634 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x4))) | |
| 11635 | svuint32x4_t svld1_vnum_u32_x4(svcount_t, uint32_t const *, int64_t); | |
| 11636 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x4))) | |
| 11637 | svfloat32x4_t svld1_vnum_f32_x4(svcount_t, float32_t const *, int64_t); | |
| 11638 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x4))) | |
| 11639 | svint32x4_t svld1_vnum_s32_x4(svcount_t, int32_t const *, int64_t); | |
| 11640 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x2))) | |
| 11641 | svuint8x2_t svldnt1_u8_x2(svcount_t, uint8_t const *); | |
| 11642 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x2))) | |
| 11643 | svint8x2_t svldnt1_s8_x2(svcount_t, int8_t const *); | |
| 11644 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x2))) | |
| 11645 | svmfloat8x2_t svldnt1_mf8_x2(svcount_t, mfloat8_t const *); | |
| 11646 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x2))) | |
| 11647 | svuint64x2_t svldnt1_u64_x2(svcount_t, uint64_t const *); | |
| 11648 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x2))) | |
| 11649 | svfloat64x2_t svldnt1_f64_x2(svcount_t, float64_t const *); | |
| 11650 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x2))) | |
| 11651 | svint64x2_t svldnt1_s64_x2(svcount_t, int64_t const *); | |
| 11652 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x2))) | |
| 11653 | svuint16x2_t svldnt1_u16_x2(svcount_t, uint16_t const *); | |
| 11654 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x2))) | |
| 11655 | svbfloat16x2_t svldnt1_bf16_x2(svcount_t, bfloat16_t const *); | |
| 11656 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x2))) | |
| 11657 | svfloat16x2_t svldnt1_f16_x2(svcount_t, float16_t const *); | |
| 11658 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x2))) | |
| 11659 | svint16x2_t svldnt1_s16_x2(svcount_t, int16_t const *); | |
| 11660 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x2))) | |
| 11661 | svuint32x2_t svldnt1_u32_x2(svcount_t, uint32_t const *); | |
| 11662 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x2))) | |
| 11663 | svfloat32x2_t svldnt1_f32_x2(svcount_t, float32_t const *); | |
| 11664 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x2))) | |
| 11665 | svint32x2_t svldnt1_s32_x2(svcount_t, int32_t const *); | |
| 11666 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x4))) | |
| 11667 | svuint8x4_t svldnt1_u8_x4(svcount_t, uint8_t const *); | |
| 11668 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x4))) | |
| 11669 | svint8x4_t svldnt1_s8_x4(svcount_t, int8_t const *); | |
| 11670 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x4))) | |
| 11671 | svmfloat8x4_t svldnt1_mf8_x4(svcount_t, mfloat8_t const *); | |
| 11672 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x4))) | |
| 11673 | svuint64x4_t svldnt1_u64_x4(svcount_t, uint64_t const *); | |
| 11674 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x4))) | |
| 11675 | svfloat64x4_t svldnt1_f64_x4(svcount_t, float64_t const *); | |
| 11676 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x4))) | |
| 11677 | svint64x4_t svldnt1_s64_x4(svcount_t, int64_t const *); | |
| 11678 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x4))) | |
| 11679 | svuint16x4_t svldnt1_u16_x4(svcount_t, uint16_t const *); | |
| 11680 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x4))) | |
| 11681 | svbfloat16x4_t svldnt1_bf16_x4(svcount_t, bfloat16_t const *); | |
| 11682 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x4))) | |
| 11683 | svfloat16x4_t svldnt1_f16_x4(svcount_t, float16_t const *); | |
| 11684 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x4))) | |
| 11685 | svint16x4_t svldnt1_s16_x4(svcount_t, int16_t const *); | |
| 11686 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x4))) | |
| 11687 | svuint32x4_t svldnt1_u32_x4(svcount_t, uint32_t const *); | |
| 11688 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x4))) | |
| 11689 | svfloat32x4_t svldnt1_f32_x4(svcount_t, float32_t const *); | |
| 11690 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x4))) | |
| 11691 | svint32x4_t svldnt1_s32_x4(svcount_t, int32_t const *); | |
| 11692 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x2))) | |
| 11693 | svuint8x2_t svldnt1_vnum_u8_x2(svcount_t, uint8_t const *, int64_t); | |
| 11694 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x2))) | |
| 11695 | svint8x2_t svldnt1_vnum_s8_x2(svcount_t, int8_t const *, int64_t); | |
| 11696 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x2))) | |
| 11697 | svmfloat8x2_t svldnt1_vnum_mf8_x2(svcount_t, mfloat8_t const *, int64_t); | |
| 11698 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x2))) | |
| 11699 | svuint64x2_t svldnt1_vnum_u64_x2(svcount_t, uint64_t const *, int64_t); | |
| 11700 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x2))) | |
| 11701 | svfloat64x2_t svldnt1_vnum_f64_x2(svcount_t, float64_t const *, int64_t); | |
| 11702 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x2))) | |
| 11703 | svint64x2_t svldnt1_vnum_s64_x2(svcount_t, int64_t const *, int64_t); | |
| 11704 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x2))) | |
| 11705 | svuint16x2_t svldnt1_vnum_u16_x2(svcount_t, uint16_t const *, int64_t); | |
| 11706 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x2))) | |
| 11707 | svbfloat16x2_t svldnt1_vnum_bf16_x2(svcount_t, bfloat16_t const *, int64_t); | |
| 11708 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x2))) | |
| 11709 | svfloat16x2_t svldnt1_vnum_f16_x2(svcount_t, float16_t const *, int64_t); | |
| 11710 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x2))) | |
| 11711 | svint16x2_t svldnt1_vnum_s16_x2(svcount_t, int16_t const *, int64_t); | |
| 11712 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x2))) | |
| 11713 | svuint32x2_t svldnt1_vnum_u32_x2(svcount_t, uint32_t const *, int64_t); | |
| 11714 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x2))) | |
| 11715 | svfloat32x2_t svldnt1_vnum_f32_x2(svcount_t, float32_t const *, int64_t); | |
| 11716 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x2))) | |
| 11717 | svint32x2_t svldnt1_vnum_s32_x2(svcount_t, int32_t const *, int64_t); | |
| 11718 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x4))) | |
| 11719 | svuint8x4_t svldnt1_vnum_u8_x4(svcount_t, uint8_t const *, int64_t); | |
| 11720 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x4))) | |
| 11721 | svint8x4_t svldnt1_vnum_s8_x4(svcount_t, int8_t const *, int64_t); | |
| 11722 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x4))) | |
| 11723 | svmfloat8x4_t svldnt1_vnum_mf8_x4(svcount_t, mfloat8_t const *, int64_t); | |
| 11724 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x4))) | |
| 11725 | svuint64x4_t svldnt1_vnum_u64_x4(svcount_t, uint64_t const *, int64_t); | |
| 11726 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x4))) | |
| 11727 | svfloat64x4_t svldnt1_vnum_f64_x4(svcount_t, float64_t const *, int64_t); | |
| 11728 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x4))) | |
| 11729 | svint64x4_t svldnt1_vnum_s64_x4(svcount_t, int64_t const *, int64_t); | |
| 11730 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x4))) | |
| 11731 | svuint16x4_t svldnt1_vnum_u16_x4(svcount_t, uint16_t const *, int64_t); | |
| 11732 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x4))) | |
| 11733 | svbfloat16x4_t svldnt1_vnum_bf16_x4(svcount_t, bfloat16_t const *, int64_t); | |
| 11734 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x4))) | |
| 11735 | svfloat16x4_t svldnt1_vnum_f16_x4(svcount_t, float16_t const *, int64_t); | |
| 11736 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x4))) | |
| 11737 | svint16x4_t svldnt1_vnum_s16_x4(svcount_t, int16_t const *, int64_t); | |
| 11738 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x4))) | |
| 11739 | svuint32x4_t svldnt1_vnum_u32_x4(svcount_t, uint32_t const *, int64_t); | |
| 11740 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x4))) | |
| 11741 | svfloat32x4_t svldnt1_vnum_f32_x4(svcount_t, float32_t const *, int64_t); | |
| 11742 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x4))) | |
| 11743 | svint32x4_t svldnt1_vnum_s32_x4(svcount_t, int32_t const *, int64_t); | |
| 11744 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c8))) | |
| 11745 | svbool_t svpext_lane_c8(svcount_t, uint64_t); | |
| 11746 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c32))) | |
| 11747 | svbool_t svpext_lane_c32(svcount_t, uint64_t); | |
| 11748 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c64))) | |
| 11749 | svbool_t svpext_lane_c64(svcount_t, uint64_t); | |
| 11750 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c16))) | |
| 11751 | svbool_t svpext_lane_c16(svcount_t, uint64_t); | |
| 11752 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c8_x2))) | |
| 11753 | svboolx2_t svpext_lane_c8_x2(svcount_t, uint64_t); | |
| 11754 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c32_x2))) | |
| 11755 | svboolx2_t svpext_lane_c32_x2(svcount_t, uint64_t); | |
| 11756 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c64_x2))) | |
| 11757 | svboolx2_t svpext_lane_c64_x2(svcount_t, uint64_t); | |
| 11758 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c16_x2))) | |
| 11759 | svboolx2_t svpext_lane_c16_x2(svcount_t, uint64_t); | |
| 11760 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpfalse_c))) | |
| 11761 | svcount_t svpfalse_c(void); | |
| 11762 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c16))) | |
| 11763 | svcount_t svpsel_lane_c16(svcount_t, svbool_t, uint32_t); | |
| 11764 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c32))) | |
| 11765 | svcount_t svpsel_lane_c32(svcount_t, svbool_t, uint32_t); | |
| 11766 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c64))) | |
| 11767 | svcount_t svpsel_lane_c64(svcount_t, svbool_t, uint32_t); | |
| 11768 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c8))) | |
| 11769 | svcount_t svpsel_lane_c8(svcount_t, svbool_t, uint32_t); | |
| 11770 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c8))) | |
| 11771 | svcount_t svptrue_c8(void); | |
| 11772 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c32))) | |
| 11773 | svcount_t svptrue_c32(void); | |
| 11774 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c64))) | |
| 11775 | svcount_t svptrue_c64(void); | |
| 11776 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c16))) | |
| 11777 | svcount_t svptrue_c16(void); | |
| 11778 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_b))) | |
| 11779 | svbool_t svreinterpret_b(svcount_t); | |
| 11780 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_c))) | |
| 11781 | svcount_t svreinterpret_c(svbool_t); | |
| 11782 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x2))) | |
| 11783 | void svst1_u8_x2(svcount_t, uint8_t *, svuint8x2_t); | |
| 11784 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x2))) | |
| 11785 | void svst1_s8_x2(svcount_t, int8_t *, svint8x2_t); | |
| 11786 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x2))) | |
| 11787 | void svst1_mf8_x2(svcount_t, mfloat8_t *, svmfloat8x2_t); | |
| 11788 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x2))) | |
| 11789 | void svst1_u64_x2(svcount_t, uint64_t *, svuint64x2_t); | |
| 11790 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x2))) | |
| 11791 | void svst1_f64_x2(svcount_t, float64_t *, svfloat64x2_t); | |
| 11792 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x2))) | |
| 11793 | void svst1_s64_x2(svcount_t, int64_t *, svint64x2_t); | |
| 11794 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x2))) | |
| 11795 | void svst1_u16_x2(svcount_t, uint16_t *, svuint16x2_t); | |
| 11796 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x2))) | |
| 11797 | void svst1_bf16_x2(svcount_t, bfloat16_t *, svbfloat16x2_t); | |
| 11798 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x2))) | |
| 11799 | void svst1_f16_x2(svcount_t, float16_t *, svfloat16x2_t); | |
| 11800 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x2))) | |
| 11801 | void svst1_s16_x2(svcount_t, int16_t *, svint16x2_t); | |
| 11802 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x2))) | |
| 11803 | void svst1_u32_x2(svcount_t, uint32_t *, svuint32x2_t); | |
| 11804 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x2))) | |
| 11805 | void svst1_f32_x2(svcount_t, float32_t *, svfloat32x2_t); | |
| 11806 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x2))) | |
| 11807 | void svst1_s32_x2(svcount_t, int32_t *, svint32x2_t); | |
| 11808 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x4))) | |
| 11809 | void svst1_u8_x4(svcount_t, uint8_t *, svuint8x4_t); | |
| 11810 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x4))) | |
| 11811 | void svst1_s8_x4(svcount_t, int8_t *, svint8x4_t); | |
| 11812 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x4))) | |
| 11813 | void svst1_mf8_x4(svcount_t, mfloat8_t *, svmfloat8x4_t); | |
| 11814 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x4))) | |
| 11815 | void svst1_u64_x4(svcount_t, uint64_t *, svuint64x4_t); | |
| 11816 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x4))) | |
| 11817 | void svst1_f64_x4(svcount_t, float64_t *, svfloat64x4_t); | |
| 11818 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x4))) | |
| 11819 | void svst1_s64_x4(svcount_t, int64_t *, svint64x4_t); | |
| 11820 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x4))) | |
| 11821 | void svst1_u16_x4(svcount_t, uint16_t *, svuint16x4_t); | |
| 11822 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x4))) | |
| 11823 | void svst1_bf16_x4(svcount_t, bfloat16_t *, svbfloat16x4_t); | |
| 11824 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x4))) | |
| 11825 | void svst1_f16_x4(svcount_t, float16_t *, svfloat16x4_t); | |
| 11826 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x4))) | |
| 11827 | void svst1_s16_x4(svcount_t, int16_t *, svint16x4_t); | |
| 11828 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x4))) | |
| 11829 | void svst1_u32_x4(svcount_t, uint32_t *, svuint32x4_t); | |
| 11830 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x4))) | |
| 11831 | void svst1_f32_x4(svcount_t, float32_t *, svfloat32x4_t); | |
| 11832 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x4))) | |
| 11833 | void svst1_s32_x4(svcount_t, int32_t *, svint32x4_t); | |
| 11834 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x2))) | |
| 11835 | void svst1_vnum_u8_x2(svcount_t, uint8_t *, int64_t, svuint8x2_t); | |
| 11836 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x2))) | |
| 11837 | void svst1_vnum_s8_x2(svcount_t, int8_t *, int64_t, svint8x2_t); | |
| 11838 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x2))) | |
| 11839 | void svst1_vnum_mf8_x2(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t); | |
| 11840 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x2))) | |
| 11841 | void svst1_vnum_u64_x2(svcount_t, uint64_t *, int64_t, svuint64x2_t); | |
| 11842 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x2))) | |
| 11843 | void svst1_vnum_f64_x2(svcount_t, float64_t *, int64_t, svfloat64x2_t); | |
| 11844 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x2))) | |
| 11845 | void svst1_vnum_s64_x2(svcount_t, int64_t *, int64_t, svint64x2_t); | |
| 11846 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x2))) | |
| 11847 | void svst1_vnum_u16_x2(svcount_t, uint16_t *, int64_t, svuint16x2_t); | |
| 11848 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x2))) | |
| 11849 | void svst1_vnum_bf16_x2(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t); | |
| 11850 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x2))) | |
| 11851 | void svst1_vnum_f16_x2(svcount_t, float16_t *, int64_t, svfloat16x2_t); | |
| 11852 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x2))) | |
| 11853 | void svst1_vnum_s16_x2(svcount_t, int16_t *, int64_t, svint16x2_t); | |
| 11854 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x2))) | |
| 11855 | void svst1_vnum_u32_x2(svcount_t, uint32_t *, int64_t, svuint32x2_t); | |
| 11856 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x2))) | |
| 11857 | void svst1_vnum_f32_x2(svcount_t, float32_t *, int64_t, svfloat32x2_t); | |
| 11858 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x2))) | |
| 11859 | void svst1_vnum_s32_x2(svcount_t, int32_t *, int64_t, svint32x2_t); | |
| 11860 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x4))) | |
| 11861 | void svst1_vnum_u8_x4(svcount_t, uint8_t *, int64_t, svuint8x4_t); | |
| 11862 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x4))) | |
| 11863 | void svst1_vnum_s8_x4(svcount_t, int8_t *, int64_t, svint8x4_t); | |
| 11864 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x4))) | |
| 11865 | void svst1_vnum_mf8_x4(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t); | |
| 11866 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x4))) | |
| 11867 | void svst1_vnum_u64_x4(svcount_t, uint64_t *, int64_t, svuint64x4_t); | |
| 11868 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x4))) | |
| 11869 | void svst1_vnum_f64_x4(svcount_t, float64_t *, int64_t, svfloat64x4_t); | |
| 11870 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x4))) | |
| 11871 | void svst1_vnum_s64_x4(svcount_t, int64_t *, int64_t, svint64x4_t); | |
| 11872 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x4))) | |
| 11873 | void svst1_vnum_u16_x4(svcount_t, uint16_t *, int64_t, svuint16x4_t); | |
| 11874 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x4))) | |
| 11875 | void svst1_vnum_bf16_x4(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t); | |
| 11876 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x4))) | |
| 11877 | void svst1_vnum_f16_x4(svcount_t, float16_t *, int64_t, svfloat16x4_t); | |
| 11878 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x4))) | |
| 11879 | void svst1_vnum_s16_x4(svcount_t, int16_t *, int64_t, svint16x4_t); | |
| 11880 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x4))) | |
| 11881 | void svst1_vnum_u32_x4(svcount_t, uint32_t *, int64_t, svuint32x4_t); | |
| 11882 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x4))) | |
| 11883 | void svst1_vnum_f32_x4(svcount_t, float32_t *, int64_t, svfloat32x4_t); | |
| 11884 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x4))) | |
| 11885 | void svst1_vnum_s32_x4(svcount_t, int32_t *, int64_t, svint32x4_t); | |
| 11886 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x2))) | |
| 11887 | void svstnt1_u8_x2(svcount_t, uint8_t *, svuint8x2_t); | |
| 11888 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x2))) | |
| 11889 | void svstnt1_s8_x2(svcount_t, int8_t *, svint8x2_t); | |
| 11890 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x2))) | |
| 11891 | void svstnt1_mf8_x2(svcount_t, mfloat8_t *, svmfloat8x2_t); | |
| 11892 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x2))) | |
| 11893 | void svstnt1_u64_x2(svcount_t, uint64_t *, svuint64x2_t); | |
| 11894 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x2))) | |
| 11895 | void svstnt1_f64_x2(svcount_t, float64_t *, svfloat64x2_t); | |
| 11896 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x2))) | |
| 11897 | void svstnt1_s64_x2(svcount_t, int64_t *, svint64x2_t); | |
| 11898 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x2))) | |
| 11899 | void svstnt1_u16_x2(svcount_t, uint16_t *, svuint16x2_t); | |
| 11900 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x2))) | |
| 11901 | void svstnt1_bf16_x2(svcount_t, bfloat16_t *, svbfloat16x2_t); | |
| 11902 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x2))) | |
| 11903 | void svstnt1_f16_x2(svcount_t, float16_t *, svfloat16x2_t); | |
| 11904 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x2))) | |
| 11905 | void svstnt1_s16_x2(svcount_t, int16_t *, svint16x2_t); | |
| 11906 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x2))) | |
| 11907 | void svstnt1_u32_x2(svcount_t, uint32_t *, svuint32x2_t); | |
| 11908 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x2))) | |
| 11909 | void svstnt1_f32_x2(svcount_t, float32_t *, svfloat32x2_t); | |
| 11910 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x2))) | |
| 11911 | void svstnt1_s32_x2(svcount_t, int32_t *, svint32x2_t); | |
| 11912 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x4))) | |
| 11913 | void svstnt1_u8_x4(svcount_t, uint8_t *, svuint8x4_t); | |
| 11914 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x4))) | |
| 11915 | void svstnt1_s8_x4(svcount_t, int8_t *, svint8x4_t); | |
| 11916 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x4))) | |
| 11917 | void svstnt1_mf8_x4(svcount_t, mfloat8_t *, svmfloat8x4_t); | |
| 11918 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x4))) | |
| 11919 | void svstnt1_u64_x4(svcount_t, uint64_t *, svuint64x4_t); | |
| 11920 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x4))) | |
| 11921 | void svstnt1_f64_x4(svcount_t, float64_t *, svfloat64x4_t); | |
| 11922 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x4))) | |
| 11923 | void svstnt1_s64_x4(svcount_t, int64_t *, svint64x4_t); | |
| 11924 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x4))) | |
| 11925 | void svstnt1_u16_x4(svcount_t, uint16_t *, svuint16x4_t); | |
| 11926 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x4))) | |
| 11927 | void svstnt1_bf16_x4(svcount_t, bfloat16_t *, svbfloat16x4_t); | |
| 11928 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x4))) | |
| 11929 | void svstnt1_f16_x4(svcount_t, float16_t *, svfloat16x4_t); | |
| 11930 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x4))) | |
| 11931 | void svstnt1_s16_x4(svcount_t, int16_t *, svint16x4_t); | |
| 11932 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x4))) | |
| 11933 | void svstnt1_u32_x4(svcount_t, uint32_t *, svuint32x4_t); | |
| 11934 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x4))) | |
| 11935 | void svstnt1_f32_x4(svcount_t, float32_t *, svfloat32x4_t); | |
| 11936 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x4))) | |
| 11937 | void svstnt1_s32_x4(svcount_t, int32_t *, svint32x4_t); | |
| 11938 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x2))) | |
| 11939 | void svstnt1_vnum_u8_x2(svcount_t, uint8_t *, int64_t, svuint8x2_t); | |
| 11940 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x2))) | |
| 11941 | void svstnt1_vnum_s8_x2(svcount_t, int8_t *, int64_t, svint8x2_t); | |
| 11942 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x2))) | |
| 11943 | void svstnt1_vnum_mf8_x2(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t); | |
| 11944 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x2))) | |
| 11945 | void svstnt1_vnum_u64_x2(svcount_t, uint64_t *, int64_t, svuint64x2_t); | |
| 11946 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x2))) | |
| 11947 | void svstnt1_vnum_f64_x2(svcount_t, float64_t *, int64_t, svfloat64x2_t); | |
| 11948 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x2))) | |
| 11949 | void svstnt1_vnum_s64_x2(svcount_t, int64_t *, int64_t, svint64x2_t); | |
| 11950 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x2))) | |
| 11951 | void svstnt1_vnum_u16_x2(svcount_t, uint16_t *, int64_t, svuint16x2_t); | |
| 11952 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x2))) | |
| 11953 | void svstnt1_vnum_bf16_x2(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t); | |
| 11954 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x2))) | |
| 11955 | void svstnt1_vnum_f16_x2(svcount_t, float16_t *, int64_t, svfloat16x2_t); | |
| 11956 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x2))) | |
| 11957 | void svstnt1_vnum_s16_x2(svcount_t, int16_t *, int64_t, svint16x2_t); | |
| 11958 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x2))) | |
| 11959 | void svstnt1_vnum_u32_x2(svcount_t, uint32_t *, int64_t, svuint32x2_t); | |
| 11960 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x2))) | |
| 11961 | void svstnt1_vnum_f32_x2(svcount_t, float32_t *, int64_t, svfloat32x2_t); | |
| 11962 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x2))) | |
| 11963 | void svstnt1_vnum_s32_x2(svcount_t, int32_t *, int64_t, svint32x2_t); | |
| 11964 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x4))) | |
| 11965 | void svstnt1_vnum_u8_x4(svcount_t, uint8_t *, int64_t, svuint8x4_t); | |
| 11966 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x4))) | |
| 11967 | void svstnt1_vnum_s8_x4(svcount_t, int8_t *, int64_t, svint8x4_t); | |
| 11968 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x4))) | |
| 11969 | void svstnt1_vnum_mf8_x4(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t); | |
| 11970 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x4))) | |
| 11971 | void svstnt1_vnum_u64_x4(svcount_t, uint64_t *, int64_t, svuint64x4_t); | |
| 11972 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x4))) | |
| 11973 | void svstnt1_vnum_f64_x4(svcount_t, float64_t *, int64_t, svfloat64x4_t); | |
| 11974 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x4))) | |
| 11975 | void svstnt1_vnum_s64_x4(svcount_t, int64_t *, int64_t, svint64x4_t); | |
| 11976 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x4))) | |
| 11977 | void svstnt1_vnum_u16_x4(svcount_t, uint16_t *, int64_t, svuint16x4_t); | |
| 11978 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x4))) | |
| 11979 | void svstnt1_vnum_bf16_x4(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t); | |
| 11980 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x4))) | |
| 11981 | void svstnt1_vnum_f16_x4(svcount_t, float16_t *, int64_t, svfloat16x4_t); | |
| 11982 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x4))) | |
| 11983 | void svstnt1_vnum_s16_x4(svcount_t, int16_t *, int64_t, svint16x4_t); | |
| 11984 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x4))) | |
| 11985 | void svstnt1_vnum_u32_x4(svcount_t, uint32_t *, int64_t, svuint32x4_t); | |
| 11986 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x4))) | |
| 11987 | void svstnt1_vnum_f32_x4(svcount_t, float32_t *, int64_t, svfloat32x4_t); | |
| 11988 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x4))) | |
| 11989 | void svstnt1_vnum_s32_x4(svcount_t, int32_t *, int64_t, svint32x4_t); | |
| 11990 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_s64))) | |
| 11991 | svcount_t svwhilege_c8_s64(int64_t, int64_t, uint64_t); | |
| 11992 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_s64))) | |
| 11993 | svcount_t svwhilege_c32_s64(int64_t, int64_t, uint64_t); | |
| 11994 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_s64))) | |
| 11995 | svcount_t svwhilege_c64_s64(int64_t, int64_t, uint64_t); | |
| 11996 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_s64))) | |
| 11997 | svcount_t svwhilege_c16_s64(int64_t, int64_t, uint64_t); | |
| 11998 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_u64))) | |
| 11999 | svcount_t svwhilege_c8_u64(uint64_t, uint64_t, uint64_t); | |
| 12000 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_u64))) | |
| 12001 | svcount_t svwhilege_c32_u64(uint64_t, uint64_t, uint64_t); | |
| 12002 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_u64))) | |
| 12003 | svcount_t svwhilege_c64_u64(uint64_t, uint64_t, uint64_t); | |
| 12004 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_u64))) | |
| 12005 | svcount_t svwhilege_c16_u64(uint64_t, uint64_t, uint64_t); | |
| 12006 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_s64))) | |
| 12007 | svcount_t svwhilegt_c8_s64(int64_t, int64_t, uint64_t); | |
| 12008 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_s64))) | |
| 12009 | svcount_t svwhilegt_c32_s64(int64_t, int64_t, uint64_t); | |
| 12010 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_s64))) | |
| 12011 | svcount_t svwhilegt_c64_s64(int64_t, int64_t, uint64_t); | |
| 12012 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_s64))) | |
| 12013 | svcount_t svwhilegt_c16_s64(int64_t, int64_t, uint64_t); | |
| 12014 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_u64))) | |
| 12015 | svcount_t svwhilegt_c8_u64(uint64_t, uint64_t, uint64_t); | |
| 12016 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_u64))) | |
| 12017 | svcount_t svwhilegt_c32_u64(uint64_t, uint64_t, uint64_t); | |
| 12018 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_u64))) | |
| 12019 | svcount_t svwhilegt_c64_u64(uint64_t, uint64_t, uint64_t); | |
| 12020 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_u64))) | |
| 12021 | svcount_t svwhilegt_c16_u64(uint64_t, uint64_t, uint64_t); | |
| 12022 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_s64))) | |
| 12023 | svcount_t svwhilele_c8_s64(int64_t, int64_t, uint64_t); | |
| 12024 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_s64))) | |
| 12025 | svcount_t svwhilele_c32_s64(int64_t, int64_t, uint64_t); | |
| 12026 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_s64))) | |
| 12027 | svcount_t svwhilele_c64_s64(int64_t, int64_t, uint64_t); | |
| 12028 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_s64))) | |
| 12029 | svcount_t svwhilele_c16_s64(int64_t, int64_t, uint64_t); | |
| 12030 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_u64))) | |
| 12031 | svcount_t svwhilele_c8_u64(uint64_t, uint64_t, uint64_t); | |
| 12032 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_u64))) | |
| 12033 | svcount_t svwhilele_c32_u64(uint64_t, uint64_t, uint64_t); | |
| 12034 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_u64))) | |
| 12035 | svcount_t svwhilele_c64_u64(uint64_t, uint64_t, uint64_t); | |
| 12036 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_u64))) | |
| 12037 | svcount_t svwhilele_c16_u64(uint64_t, uint64_t, uint64_t); | |
| 12038 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_u64))) | |
| 12039 | svcount_t svwhilelt_c8_u64(uint64_t, uint64_t, uint64_t); | |
| 12040 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_u64))) | |
| 12041 | svcount_t svwhilelt_c32_u64(uint64_t, uint64_t, uint64_t); | |
| 12042 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_u64))) | |
| 12043 | svcount_t svwhilelt_c64_u64(uint64_t, uint64_t, uint64_t); | |
| 12044 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_u64))) | |
| 12045 | svcount_t svwhilelt_c16_u64(uint64_t, uint64_t, uint64_t); | |
| 12046 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_s64))) | |
| 12047 | svcount_t svwhilelt_c8_s64(int64_t, int64_t, uint64_t); | |
| 12048 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_s64))) | |
| 12049 | svcount_t svwhilelt_c32_s64(int64_t, int64_t, uint64_t); | |
| 12050 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_s64))) | |
| 12051 | svcount_t svwhilelt_c64_s64(int64_t, int64_t, uint64_t); | |
| 12052 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_s64))) | |
| 12053 | svcount_t svwhilelt_c16_s64(int64_t, int64_t, uint64_t); | |
| 12054 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x2))) | |
| 12055 | svuint8x2_t svld1_x2(svcount_t, uint8_t const *); | |
| 12056 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x2))) | |
| 12057 | svint8x2_t svld1_x2(svcount_t, int8_t const *); | |
| 12058 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x2))) | |
| 12059 | svmfloat8x2_t svld1_x2(svcount_t, mfloat8_t const *); | |
| 12060 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x2))) | |
| 12061 | svuint64x2_t svld1_x2(svcount_t, uint64_t const *); | |
| 12062 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x2))) | |
| 12063 | svfloat64x2_t svld1_x2(svcount_t, float64_t const *); | |
| 12064 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x2))) | |
| 12065 | svint64x2_t svld1_x2(svcount_t, int64_t const *); | |
| 12066 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x2))) | |
| 12067 | svuint16x2_t svld1_x2(svcount_t, uint16_t const *); | |
| 12068 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x2))) | |
| 12069 | svbfloat16x2_t svld1_x2(svcount_t, bfloat16_t const *); | |
| 12070 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x2))) | |
| 12071 | svfloat16x2_t svld1_x2(svcount_t, float16_t const *); | |
| 12072 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x2))) | |
| 12073 | svint16x2_t svld1_x2(svcount_t, int16_t const *); | |
| 12074 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x2))) | |
| 12075 | svuint32x2_t svld1_x2(svcount_t, uint32_t const *); | |
| 12076 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x2))) | |
| 12077 | svfloat32x2_t svld1_x2(svcount_t, float32_t const *); | |
| 12078 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x2))) | |
| 12079 | svint32x2_t svld1_x2(svcount_t, int32_t const *); | |
| 12080 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x4))) | |
| 12081 | svuint8x4_t svld1_x4(svcount_t, uint8_t const *); | |
| 12082 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x4))) | |
| 12083 | svint8x4_t svld1_x4(svcount_t, int8_t const *); | |
| 12084 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x4))) | |
| 12085 | svmfloat8x4_t svld1_x4(svcount_t, mfloat8_t const *); | |
| 12086 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x4))) | |
| 12087 | svuint64x4_t svld1_x4(svcount_t, uint64_t const *); | |
| 12088 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x4))) | |
| 12089 | svfloat64x4_t svld1_x4(svcount_t, float64_t const *); | |
| 12090 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x4))) | |
| 12091 | svint64x4_t svld1_x4(svcount_t, int64_t const *); | |
| 12092 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x4))) | |
| 12093 | svuint16x4_t svld1_x4(svcount_t, uint16_t const *); | |
| 12094 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x4))) | |
| 12095 | svbfloat16x4_t svld1_x4(svcount_t, bfloat16_t const *); | |
| 12096 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x4))) | |
| 12097 | svfloat16x4_t svld1_x4(svcount_t, float16_t const *); | |
| 12098 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x4))) | |
| 12099 | svint16x4_t svld1_x4(svcount_t, int16_t const *); | |
| 12100 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x4))) | |
| 12101 | svuint32x4_t svld1_x4(svcount_t, uint32_t const *); | |
| 12102 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x4))) | |
| 12103 | svfloat32x4_t svld1_x4(svcount_t, float32_t const *); | |
| 12104 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x4))) | |
| 12105 | svint32x4_t svld1_x4(svcount_t, int32_t const *); | |
| 12106 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x2))) | |
| 12107 | svuint8x2_t svld1_vnum_x2(svcount_t, uint8_t const *, int64_t); | |
| 12108 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x2))) | |
| 12109 | svint8x2_t svld1_vnum_x2(svcount_t, int8_t const *, int64_t); | |
| 12110 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x2))) | |
| 12111 | svmfloat8x2_t svld1_vnum_x2(svcount_t, mfloat8_t const *, int64_t); | |
| 12112 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x2))) | |
| 12113 | svuint64x2_t svld1_vnum_x2(svcount_t, uint64_t const *, int64_t); | |
| 12114 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x2))) | |
| 12115 | svfloat64x2_t svld1_vnum_x2(svcount_t, float64_t const *, int64_t); | |
| 12116 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x2))) | |
| 12117 | svint64x2_t svld1_vnum_x2(svcount_t, int64_t const *, int64_t); | |
| 12118 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x2))) | |
| 12119 | svuint16x2_t svld1_vnum_x2(svcount_t, uint16_t const *, int64_t); | |
| 12120 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x2))) | |
| 12121 | svbfloat16x2_t svld1_vnum_x2(svcount_t, bfloat16_t const *, int64_t); | |
| 12122 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x2))) | |
| 12123 | svfloat16x2_t svld1_vnum_x2(svcount_t, float16_t const *, int64_t); | |
| 12124 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x2))) | |
| 12125 | svint16x2_t svld1_vnum_x2(svcount_t, int16_t const *, int64_t); | |
| 12126 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x2))) | |
| 12127 | svuint32x2_t svld1_vnum_x2(svcount_t, uint32_t const *, int64_t); | |
| 12128 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x2))) | |
| 12129 | svfloat32x2_t svld1_vnum_x2(svcount_t, float32_t const *, int64_t); | |
| 12130 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x2))) | |
| 12131 | svint32x2_t svld1_vnum_x2(svcount_t, int32_t const *, int64_t); | |
| 12132 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x4))) | |
| 12133 | svuint8x4_t svld1_vnum_x4(svcount_t, uint8_t const *, int64_t); | |
| 12134 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x4))) | |
| 12135 | svint8x4_t svld1_vnum_x4(svcount_t, int8_t const *, int64_t); | |
| 12136 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x4))) | |
| 12137 | svmfloat8x4_t svld1_vnum_x4(svcount_t, mfloat8_t const *, int64_t); | |
| 12138 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x4))) | |
| 12139 | svuint64x4_t svld1_vnum_x4(svcount_t, uint64_t const *, int64_t); | |
| 12140 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x4))) | |
| 12141 | svfloat64x4_t svld1_vnum_x4(svcount_t, float64_t const *, int64_t); | |
| 12142 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x4))) | |
| 12143 | svint64x4_t svld1_vnum_x4(svcount_t, int64_t const *, int64_t); | |
| 12144 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x4))) | |
| 12145 | svuint16x4_t svld1_vnum_x4(svcount_t, uint16_t const *, int64_t); | |
| 12146 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x4))) | |
| 12147 | svbfloat16x4_t svld1_vnum_x4(svcount_t, bfloat16_t const *, int64_t); | |
| 12148 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x4))) | |
| 12149 | svfloat16x4_t svld1_vnum_x4(svcount_t, float16_t const *, int64_t); | |
| 12150 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x4))) | |
| 12151 | svint16x4_t svld1_vnum_x4(svcount_t, int16_t const *, int64_t); | |
| 12152 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x4))) | |
| 12153 | svuint32x4_t svld1_vnum_x4(svcount_t, uint32_t const *, int64_t); | |
| 12154 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x4))) | |
| 12155 | svfloat32x4_t svld1_vnum_x4(svcount_t, float32_t const *, int64_t); | |
| 12156 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x4))) | |
| 12157 | svint32x4_t svld1_vnum_x4(svcount_t, int32_t const *, int64_t); | |
| 12158 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x2))) | |
| 12159 | svuint8x2_t svldnt1_x2(svcount_t, uint8_t const *); | |
| 12160 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x2))) | |
| 12161 | svint8x2_t svldnt1_x2(svcount_t, int8_t const *); | |
| 12162 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x2))) | |
| 12163 | svmfloat8x2_t svldnt1_x2(svcount_t, mfloat8_t const *); | |
| 12164 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x2))) | |
| 12165 | svuint64x2_t svldnt1_x2(svcount_t, uint64_t const *); | |
| 12166 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x2))) | |
| 12167 | svfloat64x2_t svldnt1_x2(svcount_t, float64_t const *); | |
| 12168 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x2))) | |
| 12169 | svint64x2_t svldnt1_x2(svcount_t, int64_t const *); | |
| 12170 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x2))) | |
| 12171 | svuint16x2_t svldnt1_x2(svcount_t, uint16_t const *); | |
| 12172 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x2))) | |
| 12173 | svbfloat16x2_t svldnt1_x2(svcount_t, bfloat16_t const *); | |
| 12174 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x2))) | |
| 12175 | svfloat16x2_t svldnt1_x2(svcount_t, float16_t const *); | |
| 12176 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x2))) | |
| 12177 | svint16x2_t svldnt1_x2(svcount_t, int16_t const *); | |
| 12178 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x2))) | |
| 12179 | svuint32x2_t svldnt1_x2(svcount_t, uint32_t const *); | |
| 12180 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x2))) | |
| 12181 | svfloat32x2_t svldnt1_x2(svcount_t, float32_t const *); | |
| 12182 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x2))) | |
| 12183 | svint32x2_t svldnt1_x2(svcount_t, int32_t const *); | |
| 12184 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x4))) | |
| 12185 | svuint8x4_t svldnt1_x4(svcount_t, uint8_t const *); | |
| 12186 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x4))) | |
| 12187 | svint8x4_t svldnt1_x4(svcount_t, int8_t const *); | |
| 12188 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x4))) | |
| 12189 | svmfloat8x4_t svldnt1_x4(svcount_t, mfloat8_t const *); | |
| 12190 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x4))) | |
| 12191 | svuint64x4_t svldnt1_x4(svcount_t, uint64_t const *); | |
| 12192 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x4))) | |
| 12193 | svfloat64x4_t svldnt1_x4(svcount_t, float64_t const *); | |
| 12194 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x4))) | |
| 12195 | svint64x4_t svldnt1_x4(svcount_t, int64_t const *); | |
| 12196 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x4))) | |
| 12197 | svuint16x4_t svldnt1_x4(svcount_t, uint16_t const *); | |
| 12198 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x4))) | |
| 12199 | svbfloat16x4_t svldnt1_x4(svcount_t, bfloat16_t const *); | |
| 12200 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x4))) | |
| 12201 | svfloat16x4_t svldnt1_x4(svcount_t, float16_t const *); | |
| 12202 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x4))) | |
| 12203 | svint16x4_t svldnt1_x4(svcount_t, int16_t const *); | |
| 12204 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x4))) | |
| 12205 | svuint32x4_t svldnt1_x4(svcount_t, uint32_t const *); | |
| 12206 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x4))) | |
| 12207 | svfloat32x4_t svldnt1_x4(svcount_t, float32_t const *); | |
| 12208 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x4))) | |
| 12209 | svint32x4_t svldnt1_x4(svcount_t, int32_t const *); | |
| 12210 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x2))) | |
| 12211 | svuint8x2_t svldnt1_vnum_x2(svcount_t, uint8_t const *, int64_t); | |
| 12212 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x2))) | |
| 12213 | svint8x2_t svldnt1_vnum_x2(svcount_t, int8_t const *, int64_t); | |
| 12214 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x2))) | |
| 12215 | svmfloat8x2_t svldnt1_vnum_x2(svcount_t, mfloat8_t const *, int64_t); | |
| 12216 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x2))) | |
| 12217 | svuint64x2_t svldnt1_vnum_x2(svcount_t, uint64_t const *, int64_t); | |
| 12218 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x2))) | |
| 12219 | svfloat64x2_t svldnt1_vnum_x2(svcount_t, float64_t const *, int64_t); | |
| 12220 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x2))) | |
| 12221 | svint64x2_t svldnt1_vnum_x2(svcount_t, int64_t const *, int64_t); | |
| 12222 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x2))) | |
| 12223 | svuint16x2_t svldnt1_vnum_x2(svcount_t, uint16_t const *, int64_t); | |
| 12224 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x2))) | |
| 12225 | svbfloat16x2_t svldnt1_vnum_x2(svcount_t, bfloat16_t const *, int64_t); | |
| 12226 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x2))) | |
| 12227 | svfloat16x2_t svldnt1_vnum_x2(svcount_t, float16_t const *, int64_t); | |
| 12228 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x2))) | |
| 12229 | svint16x2_t svldnt1_vnum_x2(svcount_t, int16_t const *, int64_t); | |
| 12230 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x2))) | |
| 12231 | svuint32x2_t svldnt1_vnum_x2(svcount_t, uint32_t const *, int64_t); | |
| 12232 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x2))) | |
| 12233 | svfloat32x2_t svldnt1_vnum_x2(svcount_t, float32_t const *, int64_t); | |
| 12234 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x2))) | |
| 12235 | svint32x2_t svldnt1_vnum_x2(svcount_t, int32_t const *, int64_t); | |
| 12236 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x4))) | |
| 12237 | svuint8x4_t svldnt1_vnum_x4(svcount_t, uint8_t const *, int64_t); | |
| 12238 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x4))) | |
| 12239 | svint8x4_t svldnt1_vnum_x4(svcount_t, int8_t const *, int64_t); | |
| 12240 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x4))) | |
| 12241 | svmfloat8x4_t svldnt1_vnum_x4(svcount_t, mfloat8_t const *, int64_t); | |
| 12242 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x4))) | |
| 12243 | svuint64x4_t svldnt1_vnum_x4(svcount_t, uint64_t const *, int64_t); | |
| 12244 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x4))) | |
| 12245 | svfloat64x4_t svldnt1_vnum_x4(svcount_t, float64_t const *, int64_t); | |
| 12246 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x4))) | |
| 12247 | svint64x4_t svldnt1_vnum_x4(svcount_t, int64_t const *, int64_t); | |
| 12248 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x4))) | |
| 12249 | svuint16x4_t svldnt1_vnum_x4(svcount_t, uint16_t const *, int64_t); | |
| 12250 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x4))) | |
| 12251 | svbfloat16x4_t svldnt1_vnum_x4(svcount_t, bfloat16_t const *, int64_t); | |
| 12252 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x4))) | |
| 12253 | svfloat16x4_t svldnt1_vnum_x4(svcount_t, float16_t const *, int64_t); | |
| 12254 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x4))) | |
| 12255 | svint16x4_t svldnt1_vnum_x4(svcount_t, int16_t const *, int64_t); | |
| 12256 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x4))) | |
| 12257 | svuint32x4_t svldnt1_vnum_x4(svcount_t, uint32_t const *, int64_t); | |
| 12258 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x4))) | |
| 12259 | svfloat32x4_t svldnt1_vnum_x4(svcount_t, float32_t const *, int64_t); | |
| 12260 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x4))) | |
| 12261 | svint32x4_t svldnt1_vnum_x4(svcount_t, int32_t const *, int64_t); | |
| 12262 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_b))) | |
| 12263 | svbool_t svreinterpret(svcount_t); | |
| 12264 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_c))) | |
| 12265 | svcount_t svreinterpret(svbool_t); | |
| 12266 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x2))) | |
| 12267 | void svst1(svcount_t, uint8_t *, svuint8x2_t); | |
| 12268 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x2))) | |
| 12269 | void svst1(svcount_t, int8_t *, svint8x2_t); | |
| 12270 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x2))) | |
| 12271 | void svst1(svcount_t, mfloat8_t *, svmfloat8x2_t); | |
| 12272 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x2))) | |
| 12273 | void svst1(svcount_t, uint64_t *, svuint64x2_t); | |
| 12274 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x2))) | |
| 12275 | void svst1(svcount_t, float64_t *, svfloat64x2_t); | |
| 12276 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x2))) | |
| 12277 | void svst1(svcount_t, int64_t *, svint64x2_t); | |
| 12278 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x2))) | |
| 12279 | void svst1(svcount_t, uint16_t *, svuint16x2_t); | |
| 12280 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x2))) | |
| 12281 | void svst1(svcount_t, bfloat16_t *, svbfloat16x2_t); | |
| 12282 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x2))) | |
| 12283 | void svst1(svcount_t, float16_t *, svfloat16x2_t); | |
| 12284 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x2))) | |
| 12285 | void svst1(svcount_t, int16_t *, svint16x2_t); | |
| 12286 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x2))) | |
| 12287 | void svst1(svcount_t, uint32_t *, svuint32x2_t); | |
| 12288 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x2))) | |
| 12289 | void svst1(svcount_t, float32_t *, svfloat32x2_t); | |
| 12290 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x2))) | |
| 12291 | void svst1(svcount_t, int32_t *, svint32x2_t); | |
| 12292 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x4))) | |
| 12293 | void svst1(svcount_t, uint8_t *, svuint8x4_t); | |
| 12294 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x4))) | |
| 12295 | void svst1(svcount_t, int8_t *, svint8x4_t); | |
| 12296 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x4))) | |
| 12297 | void svst1(svcount_t, mfloat8_t *, svmfloat8x4_t); | |
| 12298 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x4))) | |
| 12299 | void svst1(svcount_t, uint64_t *, svuint64x4_t); | |
| 12300 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x4))) | |
| 12301 | void svst1(svcount_t, float64_t *, svfloat64x4_t); | |
| 12302 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x4))) | |
| 12303 | void svst1(svcount_t, int64_t *, svint64x4_t); | |
| 12304 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x4))) | |
| 12305 | void svst1(svcount_t, uint16_t *, svuint16x4_t); | |
| 12306 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x4))) | |
| 12307 | void svst1(svcount_t, bfloat16_t *, svbfloat16x4_t); | |
| 12308 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x4))) | |
| 12309 | void svst1(svcount_t, float16_t *, svfloat16x4_t); | |
| 12310 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x4))) | |
| 12311 | void svst1(svcount_t, int16_t *, svint16x4_t); | |
| 12312 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x4))) | |
| 12313 | void svst1(svcount_t, uint32_t *, svuint32x4_t); | |
| 12314 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x4))) | |
| 12315 | void svst1(svcount_t, float32_t *, svfloat32x4_t); | |
| 12316 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x4))) | |
| 12317 | void svst1(svcount_t, int32_t *, svint32x4_t); | |
| 12318 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x2))) | |
| 12319 | void svst1_vnum(svcount_t, uint8_t *, int64_t, svuint8x2_t); | |
| 12320 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x2))) | |
| 12321 | void svst1_vnum(svcount_t, int8_t *, int64_t, svint8x2_t); | |
| 12322 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x2))) | |
| 12323 | void svst1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t); | |
| 12324 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x2))) | |
| 12325 | void svst1_vnum(svcount_t, uint64_t *, int64_t, svuint64x2_t); | |
| 12326 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x2))) | |
| 12327 | void svst1_vnum(svcount_t, float64_t *, int64_t, svfloat64x2_t); | |
| 12328 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x2))) | |
| 12329 | void svst1_vnum(svcount_t, int64_t *, int64_t, svint64x2_t); | |
| 12330 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x2))) | |
| 12331 | void svst1_vnum(svcount_t, uint16_t *, int64_t, svuint16x2_t); | |
| 12332 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x2))) | |
| 12333 | void svst1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t); | |
| 12334 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x2))) | |
| 12335 | void svst1_vnum(svcount_t, float16_t *, int64_t, svfloat16x2_t); | |
| 12336 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x2))) | |
| 12337 | void svst1_vnum(svcount_t, int16_t *, int64_t, svint16x2_t); | |
| 12338 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x2))) | |
| 12339 | void svst1_vnum(svcount_t, uint32_t *, int64_t, svuint32x2_t); | |
| 12340 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x2))) | |
| 12341 | void svst1_vnum(svcount_t, float32_t *, int64_t, svfloat32x2_t); | |
| 12342 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x2))) | |
| 12343 | void svst1_vnum(svcount_t, int32_t *, int64_t, svint32x2_t); | |
| 12344 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x4))) | |
| 12345 | void svst1_vnum(svcount_t, uint8_t *, int64_t, svuint8x4_t); | |
| 12346 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x4))) | |
| 12347 | void svst1_vnum(svcount_t, int8_t *, int64_t, svint8x4_t); | |
| 12348 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x4))) | |
| 12349 | void svst1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t); | |
| 12350 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x4))) | |
| 12351 | void svst1_vnum(svcount_t, uint64_t *, int64_t, svuint64x4_t); | |
| 12352 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x4))) | |
| 12353 | void svst1_vnum(svcount_t, float64_t *, int64_t, svfloat64x4_t); | |
| 12354 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x4))) | |
| 12355 | void svst1_vnum(svcount_t, int64_t *, int64_t, svint64x4_t); | |
| 12356 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x4))) | |
| 12357 | void svst1_vnum(svcount_t, uint16_t *, int64_t, svuint16x4_t); | |
| 12358 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x4))) | |
| 12359 | void svst1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t); | |
| 12360 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x4))) | |
| 12361 | void svst1_vnum(svcount_t, float16_t *, int64_t, svfloat16x4_t); | |
| 12362 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x4))) | |
| 12363 | void svst1_vnum(svcount_t, int16_t *, int64_t, svint16x4_t); | |
| 12364 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x4))) | |
| 12365 | void svst1_vnum(svcount_t, uint32_t *, int64_t, svuint32x4_t); | |
| 12366 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x4))) | |
| 12367 | void svst1_vnum(svcount_t, float32_t *, int64_t, svfloat32x4_t); | |
| 12368 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x4))) | |
| 12369 | void svst1_vnum(svcount_t, int32_t *, int64_t, svint32x4_t); | |
| 12370 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x2))) | |
| 12371 | void svstnt1(svcount_t, uint8_t *, svuint8x2_t); | |
| 12372 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x2))) | |
| 12373 | void svstnt1(svcount_t, int8_t *, svint8x2_t); | |
| 12374 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x2))) | |
| 12375 | void svstnt1(svcount_t, mfloat8_t *, svmfloat8x2_t); | |
| 12376 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x2))) | |
| 12377 | void svstnt1(svcount_t, uint64_t *, svuint64x2_t); | |
| 12378 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x2))) | |
| 12379 | void svstnt1(svcount_t, float64_t *, svfloat64x2_t); | |
| 12380 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x2))) | |
| 12381 | void svstnt1(svcount_t, int64_t *, svint64x2_t); | |
| 12382 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x2))) | |
| 12383 | void svstnt1(svcount_t, uint16_t *, svuint16x2_t); | |
| 12384 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x2))) | |
| 12385 | void svstnt1(svcount_t, bfloat16_t *, svbfloat16x2_t); | |
| 12386 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x2))) | |
| 12387 | void svstnt1(svcount_t, float16_t *, svfloat16x2_t); | |
| 12388 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x2))) | |
| 12389 | void svstnt1(svcount_t, int16_t *, svint16x2_t); | |
| 12390 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x2))) | |
| 12391 | void svstnt1(svcount_t, uint32_t *, svuint32x2_t); | |
| 12392 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x2))) | |
| 12393 | void svstnt1(svcount_t, float32_t *, svfloat32x2_t); | |
| 12394 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x2))) | |
| 12395 | void svstnt1(svcount_t, int32_t *, svint32x2_t); | |
| 12396 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x4))) | |
| 12397 | void svstnt1(svcount_t, uint8_t *, svuint8x4_t); | |
| 12398 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x4))) | |
| 12399 | void svstnt1(svcount_t, int8_t *, svint8x4_t); | |
| 12400 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x4))) | |
| 12401 | void svstnt1(svcount_t, mfloat8_t *, svmfloat8x4_t); | |
| 12402 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x4))) | |
| 12403 | void svstnt1(svcount_t, uint64_t *, svuint64x4_t); | |
| 12404 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x4))) | |
| 12405 | void svstnt1(svcount_t, float64_t *, svfloat64x4_t); | |
| 12406 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x4))) | |
| 12407 | void svstnt1(svcount_t, int64_t *, svint64x4_t); | |
| 12408 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x4))) | |
| 12409 | void svstnt1(svcount_t, uint16_t *, svuint16x4_t); | |
| 12410 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x4))) | |
| 12411 | void svstnt1(svcount_t, bfloat16_t *, svbfloat16x4_t); | |
| 12412 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x4))) | |
| 12413 | void svstnt1(svcount_t, float16_t *, svfloat16x4_t); | |
| 12414 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x4))) | |
| 12415 | void svstnt1(svcount_t, int16_t *, svint16x4_t); | |
| 12416 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x4))) | |
| 12417 | void svstnt1(svcount_t, uint32_t *, svuint32x4_t); | |
| 12418 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x4))) | |
| 12419 | void svstnt1(svcount_t, float32_t *, svfloat32x4_t); | |
| 12420 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x4))) | |
| 12421 | void svstnt1(svcount_t, int32_t *, svint32x4_t); | |
| 12422 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x2))) | |
| 12423 | void svstnt1_vnum(svcount_t, uint8_t *, int64_t, svuint8x2_t); | |
| 12424 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x2))) | |
| 12425 | void svstnt1_vnum(svcount_t, int8_t *, int64_t, svint8x2_t); | |
| 12426 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x2))) | |
| 12427 | void svstnt1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t); | |
| 12428 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x2))) | |
| 12429 | void svstnt1_vnum(svcount_t, uint64_t *, int64_t, svuint64x2_t); | |
| 12430 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x2))) | |
| 12431 | void svstnt1_vnum(svcount_t, float64_t *, int64_t, svfloat64x2_t); | |
| 12432 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x2))) | |
| 12433 | void svstnt1_vnum(svcount_t, int64_t *, int64_t, svint64x2_t); | |
| 12434 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x2))) | |
| 12435 | void svstnt1_vnum(svcount_t, uint16_t *, int64_t, svuint16x2_t); | |
| 12436 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x2))) | |
| 12437 | void svstnt1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t); | |
| 12438 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x2))) | |
| 12439 | void svstnt1_vnum(svcount_t, float16_t *, int64_t, svfloat16x2_t); | |
| 12440 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x2))) | |
| 12441 | void svstnt1_vnum(svcount_t, int16_t *, int64_t, svint16x2_t); | |
| 12442 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x2))) | |
| 12443 | void svstnt1_vnum(svcount_t, uint32_t *, int64_t, svuint32x2_t); | |
| 12444 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x2))) | |
| 12445 | void svstnt1_vnum(svcount_t, float32_t *, int64_t, svfloat32x2_t); | |
| 12446 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x2))) | |
| 12447 | void svstnt1_vnum(svcount_t, int32_t *, int64_t, svint32x2_t); | |
| 12448 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x4))) | |
| 12449 | void svstnt1_vnum(svcount_t, uint8_t *, int64_t, svuint8x4_t); | |
| 12450 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x4))) | |
| 12451 | void svstnt1_vnum(svcount_t, int8_t *, int64_t, svint8x4_t); | |
| 12452 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x4))) | |
| 12453 | void svstnt1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t); | |
| 12454 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x4))) | |
| 12455 | void svstnt1_vnum(svcount_t, uint64_t *, int64_t, svuint64x4_t); | |
| 12456 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x4))) | |
| 12457 | void svstnt1_vnum(svcount_t, float64_t *, int64_t, svfloat64x4_t); | |
| 12458 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x4))) | |
| 12459 | void svstnt1_vnum(svcount_t, int64_t *, int64_t, svint64x4_t); | |
| 12460 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x4))) | |
| 12461 | void svstnt1_vnum(svcount_t, uint16_t *, int64_t, svuint16x4_t); | |
| 12462 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x4))) | |
| 12463 | void svstnt1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t); | |
| 12464 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x4))) | |
| 12465 | void svstnt1_vnum(svcount_t, float16_t *, int64_t, svfloat16x4_t); | |
| 12466 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x4))) | |
| 12467 | void svstnt1_vnum(svcount_t, int16_t *, int64_t, svint16x4_t); | |
| 12468 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x4))) | |
| 12469 | void svstnt1_vnum(svcount_t, uint32_t *, int64_t, svuint32x4_t); | |
| 12470 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x4))) | |
| 12471 | void svstnt1_vnum(svcount_t, float32_t *, int64_t, svfloat32x4_t); | |
| 12472 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x4))) | |
| 12473 | void svstnt1_vnum(svcount_t, int32_t *, int64_t, svint32x4_t); | |
| 12474 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_s64))) | |
| 12475 | svcount_t svwhilege_c8(int64_t, int64_t, uint64_t); | |
| 12476 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_s64))) | |
| 12477 | svcount_t svwhilege_c32(int64_t, int64_t, uint64_t); | |
| 12478 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_s64))) | |
| 12479 | svcount_t svwhilege_c64(int64_t, int64_t, uint64_t); | |
| 12480 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_s64))) | |
| 12481 | svcount_t svwhilege_c16(int64_t, int64_t, uint64_t); | |
| 12482 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_u64))) | |
| 12483 | svcount_t svwhilege_c8(uint64_t, uint64_t, uint64_t); | |
| 12484 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_u64))) | |
| 12485 | svcount_t svwhilege_c32(uint64_t, uint64_t, uint64_t); | |
| 12486 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_u64))) | |
| 12487 | svcount_t svwhilege_c64(uint64_t, uint64_t, uint64_t); | |
| 12488 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_u64))) | |
| 12489 | svcount_t svwhilege_c16(uint64_t, uint64_t, uint64_t); | |
| 12490 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_s64))) | |
| 12491 | svcount_t svwhilegt_c8(int64_t, int64_t, uint64_t); | |
| 12492 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_s64))) | |
| 12493 | svcount_t svwhilegt_c32(int64_t, int64_t, uint64_t); | |
| 12494 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_s64))) | |
| 12495 | svcount_t svwhilegt_c64(int64_t, int64_t, uint64_t); | |
| 12496 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_s64))) | |
| 12497 | svcount_t svwhilegt_c16(int64_t, int64_t, uint64_t); | |
| 12498 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_u64))) | |
| 12499 | svcount_t svwhilegt_c8(uint64_t, uint64_t, uint64_t); | |
| 12500 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_u64))) | |
| 12501 | svcount_t svwhilegt_c32(uint64_t, uint64_t, uint64_t); | |
| 12502 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_u64))) | |
| 12503 | svcount_t svwhilegt_c64(uint64_t, uint64_t, uint64_t); | |
| 12504 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_u64))) | |
| 12505 | svcount_t svwhilegt_c16(uint64_t, uint64_t, uint64_t); | |
| 12506 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_s64))) | |
| 12507 | svcount_t svwhilele_c8(int64_t, int64_t, uint64_t); | |
| 12508 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_s64))) | |
| 12509 | svcount_t svwhilele_c32(int64_t, int64_t, uint64_t); | |
| 12510 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_s64))) | |
| 12511 | svcount_t svwhilele_c64(int64_t, int64_t, uint64_t); | |
| 12512 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_s64))) | |
| 12513 | svcount_t svwhilele_c16(int64_t, int64_t, uint64_t); | |
| 12514 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_u64))) | |
| 12515 | svcount_t svwhilele_c8(uint64_t, uint64_t, uint64_t); | |
| 12516 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_u64))) | |
| 12517 | svcount_t svwhilele_c32(uint64_t, uint64_t, uint64_t); | |
| 12518 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_u64))) | |
| 12519 | svcount_t svwhilele_c64(uint64_t, uint64_t, uint64_t); | |
| 12520 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_u64))) | |
| 12521 | svcount_t svwhilele_c16(uint64_t, uint64_t, uint64_t); | |
| 12522 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_u64))) | |
| 12523 | svcount_t svwhilelt_c8(uint64_t, uint64_t, uint64_t); | |
| 12524 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_u64))) | |
| 12525 | svcount_t svwhilelt_c32(uint64_t, uint64_t, uint64_t); | |
| 12526 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_u64))) | |
| 12527 | svcount_t svwhilelt_c64(uint64_t, uint64_t, uint64_t); | |
| 12528 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_u64))) | |
| 12529 | svcount_t svwhilelt_c16(uint64_t, uint64_t, uint64_t); | |
| 12530 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_s64))) | |
| 12531 | svcount_t svwhilelt_c8(int64_t, int64_t, uint64_t); | |
| 12532 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_s64))) | |
| 12533 | svcount_t svwhilelt_c32(int64_t, int64_t, uint64_t); | |
| 12534 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_s64))) | |
| 12535 | svcount_t svwhilelt_c64(int64_t, int64_t, uint64_t); | |
| 12536 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_s64))) | |
| 12537 | svcount_t svwhilelt_c16(int64_t, int64_t, uint64_t); | |
| 8836 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt_f32_f16_z))) | |
| 8837 | svfloat32_t svcvtlt_f32_f16_z(svbool_t, svfloat16_t); | |
| 8838 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt_f64_f32_z))) | |
| 8839 | svfloat64_t svcvtlt_f64_f32_z(svbool_t, svfloat32_t); | |
| 8840 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_z))) | |
| 8841 | svbfloat16_t svcvtnt_bf16_f32_z(svbfloat16_t, svbool_t, svfloat32_t); | |
| 8842 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_f16_f32_z))) | |
| 8843 | svfloat16_t svcvtnt_f16_f32_z(svfloat16_t, svbool_t, svfloat32_t); | |
| 8844 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_f32_f64_z))) | |
| 8845 | svfloat32_t svcvtnt_f32_f64_z(svfloat32_t, svbool_t, svfloat64_t); | |
| 8846 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtxnt_f32_f64_z))) | |
| 8847 | svfloat32_t svcvtxnt_f32_f64_z(svfloat32_t, svbool_t, svfloat64_t); | |
| 8848 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svfirstp_b8))) | |
| 8849 | int64_t svfirstp_b8(svbool_t, svbool_t); | |
| 8850 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svfirstp_b32))) | |
| 8851 | int64_t svfirstp_b32(svbool_t, svbool_t); | |
| 8852 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svfirstp_b64))) | |
| 8853 | int64_t svfirstp_b64(svbool_t, svbool_t); | |
| 8854 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svfirstp_b16))) | |
| 8855 | int64_t svfirstp_b16(svbool_t, svbool_t); | |
| 8856 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svlastp_b8))) | |
| 8857 | int64_t svlastp_b8(svbool_t, svbool_t); | |
| 8858 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svlastp_b32))) | |
| 8859 | int64_t svlastp_b32(svbool_t, svbool_t); | |
| 8860 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svlastp_b64))) | |
| 8861 | int64_t svlastp_b64(svbool_t, svbool_t); | |
| 8862 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svlastp_b16))) | |
| 8863 | int64_t svlastp_b16(svbool_t, svbool_t); | |
| 8864 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_m))) | |
| 8865 | svfloat64_t svrint32x_f64_m(svfloat64_t, svbool_t, svfloat64_t); | |
| 8866 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_m))) | |
| 8867 | svfloat32_t svrint32x_f32_m(svfloat32_t, svbool_t, svfloat32_t); | |
| 8868 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_x))) | |
| 8869 | svfloat64_t svrint32x_f64_x(svbool_t, svfloat64_t); | |
| 8870 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_x))) | |
| 8871 | svfloat32_t svrint32x_f32_x(svbool_t, svfloat32_t); | |
| 8872 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_z))) | |
| 8873 | svfloat64_t svrint32x_f64_z(svbool_t, svfloat64_t); | |
| 8874 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_z))) | |
| 8875 | svfloat32_t svrint32x_f32_z(svbool_t, svfloat32_t); | |
| 8876 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_m))) | |
| 8877 | svfloat64_t svrint32z_f64_m(svfloat64_t, svbool_t, svfloat64_t); | |
| 8878 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_m))) | |
| 8879 | svfloat32_t svrint32z_f32_m(svfloat32_t, svbool_t, svfloat32_t); | |
| 8880 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_x))) | |
| 8881 | svfloat64_t svrint32z_f64_x(svbool_t, svfloat64_t); | |
| 8882 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_x))) | |
| 8883 | svfloat32_t svrint32z_f32_x(svbool_t, svfloat32_t); | |
| 8884 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_z))) | |
| 8885 | svfloat64_t svrint32z_f64_z(svbool_t, svfloat64_t); | |
| 8886 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_z))) | |
| 8887 | svfloat32_t svrint32z_f32_z(svbool_t, svfloat32_t); | |
| 8888 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_m))) | |
| 8889 | svfloat64_t svrint64x_f64_m(svfloat64_t, svbool_t, svfloat64_t); | |
| 8890 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_m))) | |
| 8891 | svfloat32_t svrint64x_f32_m(svfloat32_t, svbool_t, svfloat32_t); | |
| 8892 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_x))) | |
| 8893 | svfloat64_t svrint64x_f64_x(svbool_t, svfloat64_t); | |
| 8894 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_x))) | |
| 8895 | svfloat32_t svrint64x_f32_x(svbool_t, svfloat32_t); | |
| 8896 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_z))) | |
| 8897 | svfloat64_t svrint64x_f64_z(svbool_t, svfloat64_t); | |
| 8898 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_z))) | |
| 8899 | svfloat32_t svrint64x_f32_z(svbool_t, svfloat32_t); | |
| 8900 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_m))) | |
| 8901 | svfloat64_t svrint64z_f64_m(svfloat64_t, svbool_t, svfloat64_t); | |
| 8902 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_m))) | |
| 8903 | svfloat32_t svrint64z_f32_m(svfloat32_t, svbool_t, svfloat32_t); | |
| 8904 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_x))) | |
| 8905 | svfloat64_t svrint64z_f64_x(svbool_t, svfloat64_t); | |
| 8906 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_x))) | |
| 8907 | svfloat32_t svrint64z_f32_x(svbool_t, svfloat32_t); | |
| 8908 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_z))) | |
| 8909 | svfloat64_t svrint64z_f64_z(svbool_t, svfloat64_t); | |
| 8910 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_z))) | |
| 8911 | svfloat32_t svrint64z_f32_z(svbool_t, svfloat32_t); | |
| 8912 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt_f32_f16_z))) | |
| 8913 | svfloat32_t svcvtlt_f32_z(svbool_t, svfloat16_t); | |
| 8914 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt_f64_f32_z))) | |
| 8915 | svfloat64_t svcvtlt_f64_z(svbool_t, svfloat32_t); | |
| 8916 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_z))) | |
| 8917 | svbfloat16_t svcvtnt_bf16_z(svbfloat16_t, svbool_t, svfloat32_t); | |
| 8918 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_f16_f32_z))) | |
| 8919 | svfloat16_t svcvtnt_f16_z(svfloat16_t, svbool_t, svfloat32_t); | |
| 8920 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_f32_f64_z))) | |
| 8921 | svfloat32_t svcvtnt_f32_z(svfloat32_t, svbool_t, svfloat64_t); | |
| 8922 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtxnt_f32_f64_z))) | |
| 8923 | svfloat32_t svcvtxnt_f32_z(svfloat32_t, svbool_t, svfloat64_t); | |
| 8924 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_m))) | |
| 8925 | svfloat64_t svrint32x_m(svfloat64_t, svbool_t, svfloat64_t); | |
| 8926 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_m))) | |
| 8927 | svfloat32_t svrint32x_m(svfloat32_t, svbool_t, svfloat32_t); | |
| 8928 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_x))) | |
| 8929 | svfloat64_t svrint32x_x(svbool_t, svfloat64_t); | |
| 8930 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_x))) | |
| 8931 | svfloat32_t svrint32x_x(svbool_t, svfloat32_t); | |
| 8932 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f64_z))) | |
| 8933 | svfloat64_t svrint32x_z(svbool_t, svfloat64_t); | |
| 8934 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32x_f32_z))) | |
| 8935 | svfloat32_t svrint32x_z(svbool_t, svfloat32_t); | |
| 8936 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_m))) | |
| 8937 | svfloat64_t svrint32z_m(svfloat64_t, svbool_t, svfloat64_t); | |
| 8938 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_m))) | |
| 8939 | svfloat32_t svrint32z_m(svfloat32_t, svbool_t, svfloat32_t); | |
| 8940 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_x))) | |
| 8941 | svfloat64_t svrint32z_x(svbool_t, svfloat64_t); | |
| 8942 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_x))) | |
| 8943 | svfloat32_t svrint32z_x(svbool_t, svfloat32_t); | |
| 8944 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f64_z))) | |
| 8945 | svfloat64_t svrint32z_z(svbool_t, svfloat64_t); | |
| 8946 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint32z_f32_z))) | |
| 8947 | svfloat32_t svrint32z_z(svbool_t, svfloat32_t); | |
| 8948 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_m))) | |
| 8949 | svfloat64_t svrint64x_m(svfloat64_t, svbool_t, svfloat64_t); | |
| 8950 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_m))) | |
| 8951 | svfloat32_t svrint64x_m(svfloat32_t, svbool_t, svfloat32_t); | |
| 8952 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_x))) | |
| 8953 | svfloat64_t svrint64x_x(svbool_t, svfloat64_t); | |
| 8954 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_x))) | |
| 8955 | svfloat32_t svrint64x_x(svbool_t, svfloat32_t); | |
| 8956 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f64_z))) | |
| 8957 | svfloat64_t svrint64x_z(svbool_t, svfloat64_t); | |
| 8958 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64x_f32_z))) | |
| 8959 | svfloat32_t svrint64x_z(svbool_t, svfloat32_t); | |
| 8960 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_m))) | |
| 8961 | svfloat64_t svrint64z_m(svfloat64_t, svbool_t, svfloat64_t); | |
| 8962 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_m))) | |
| 8963 | svfloat32_t svrint64z_m(svfloat32_t, svbool_t, svfloat32_t); | |
| 8964 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_x))) | |
| 8965 | svfloat64_t svrint64z_x(svbool_t, svfloat64_t); | |
| 8966 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_x))) | |
| 8967 | svfloat32_t svrint64z_x(svbool_t, svfloat32_t); | |
| 8968 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f64_z))) | |
| 8969 | svfloat64_t svrint64z_z(svbool_t, svfloat64_t); | |
| 8970 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrint64z_f32_z))) | |
| 8971 | svfloat32_t svrint64z_z(svbool_t, svfloat32_t); | |
| 8972 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u8))) | |
| 8973 | svuint8_t svcompact_u8(svbool_t, svuint8_t); | |
| 8974 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u16))) | |
| 8975 | svuint16_t svcompact_u16(svbool_t, svuint16_t); | |
| 8976 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_bf16))) | |
| 8977 | svbfloat16_t svcompact_bf16(svbool_t, svbfloat16_t); | |
| 8978 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s8))) | |
| 8979 | svint8_t svcompact_s8(svbool_t, svint8_t); | |
| 8980 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f16))) | |
| 8981 | svfloat16_t svcompact_f16(svbool_t, svfloat16_t); | |
| 8982 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_mf8))) | |
| 8983 | svmfloat8_t svcompact_mf8(svbool_t, svmfloat8_t); | |
| 8984 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s16))) | |
| 8985 | svint16_t svcompact_s16(svbool_t, svint16_t); | |
| 8986 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u8))) | |
| 8987 | svuint8_t svexpand_u8(svbool_t, svuint8_t); | |
| 8988 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u32))) | |
| 8989 | svuint32_t svexpand_u32(svbool_t, svuint32_t); | |
| 8990 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u64))) | |
| 8991 | svuint64_t svexpand_u64(svbool_t, svuint64_t); | |
| 8992 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u16))) | |
| 8993 | svuint16_t svexpand_u16(svbool_t, svuint16_t); | |
| 8994 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_bf16))) | |
| 8995 | svbfloat16_t svexpand_bf16(svbool_t, svbfloat16_t); | |
| 8996 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s8))) | |
| 8997 | svint8_t svexpand_s8(svbool_t, svint8_t); | |
| 8998 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f64))) | |
| 8999 | svfloat64_t svexpand_f64(svbool_t, svfloat64_t); | |
| 9000 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f32))) | |
| 9001 | svfloat32_t svexpand_f32(svbool_t, svfloat32_t); | |
| 9002 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f16))) | |
| 9003 | svfloat16_t svexpand_f16(svbool_t, svfloat16_t); | |
| 9004 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s32))) | |
| 9005 | svint32_t svexpand_s32(svbool_t, svint32_t); | |
| 9006 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s64))) | |
| 9007 | svint64_t svexpand_s64(svbool_t, svint64_t); | |
| 9008 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_mf8))) | |
| 9009 | svmfloat8_t svexpand_mf8(svbool_t, svmfloat8_t); | |
| 9010 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s16))) | |
| 9011 | svint16_t svexpand_s16(svbool_t, svint16_t); | |
| 9012 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u8))) | |
| 9013 | svuint8_t svcompact(svbool_t, svuint8_t); | |
| 9014 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u16))) | |
| 9015 | svuint16_t svcompact(svbool_t, svuint16_t); | |
| 9016 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_bf16))) | |
| 9017 | svbfloat16_t svcompact(svbool_t, svbfloat16_t); | |
| 9018 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s8))) | |
| 9019 | svint8_t svcompact(svbool_t, svint8_t); | |
| 9020 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f16))) | |
| 9021 | svfloat16_t svcompact(svbool_t, svfloat16_t); | |
| 9022 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_mf8))) | |
| 9023 | svmfloat8_t svcompact(svbool_t, svmfloat8_t); | |
| 9024 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s16))) | |
| 9025 | svint16_t svcompact(svbool_t, svint16_t); | |
| 9026 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u8))) | |
| 9027 | svuint8_t svexpand(svbool_t, svuint8_t); | |
| 9028 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u32))) | |
| 9029 | svuint32_t svexpand(svbool_t, svuint32_t); | |
| 9030 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u64))) | |
| 9031 | svuint64_t svexpand(svbool_t, svuint64_t); | |
| 9032 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_u16))) | |
| 9033 | svuint16_t svexpand(svbool_t, svuint16_t); | |
| 9034 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_bf16))) | |
| 9035 | svbfloat16_t svexpand(svbool_t, svbfloat16_t); | |
| 9036 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s8))) | |
| 9037 | svint8_t svexpand(svbool_t, svint8_t); | |
| 9038 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f64))) | |
| 9039 | svfloat64_t svexpand(svbool_t, svfloat64_t); | |
| 9040 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f32))) | |
| 9041 | svfloat32_t svexpand(svbool_t, svfloat32_t); | |
| 9042 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_f16))) | |
| 9043 | svfloat16_t svexpand(svbool_t, svfloat16_t); | |
| 9044 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s32))) | |
| 9045 | svint32_t svexpand(svbool_t, svint32_t); | |
| 9046 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s64))) | |
| 9047 | svint64_t svexpand(svbool_t, svint64_t); | |
| 9048 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_mf8))) | |
| 9049 | svmfloat8_t svexpand(svbool_t, svmfloat8_t); | |
| 9050 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpand_s16))) | |
| 9051 | svint16_t svexpand(svbool_t, svint16_t); | |
| 12538 | 9052 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaba_n_s8))) |
| 12539 | 9053 | svint8_t svaba_n_s8(svint8_t, svint8_t, int8_t); |
| 12540 | 9054 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaba_n_s32))) |
| ... | ... | @@ -19059,6 +15573,3848 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svxar_n_s64))) |
| 19059 | 15573 | svint64_t svxar(svint64_t, svint64_t, uint64_t); |
| 19060 | 15574 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svxar_n_s16))) |
| 19061 | 15575 | svint16_t svxar(svint16_t, svint16_t, uint64_t); |
| 15576 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_m))) | |
| 15577 | svfloat64_t svamax_n_f64_m(svbool_t, svfloat64_t, float64_t); | |
| 15578 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_m))) | |
| 15579 | svfloat32_t svamax_n_f32_m(svbool_t, svfloat32_t, float32_t); | |
| 15580 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_m))) | |
| 15581 | svfloat16_t svamax_n_f16_m(svbool_t, svfloat16_t, float16_t); | |
| 15582 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_x))) | |
| 15583 | svfloat64_t svamax_n_f64_x(svbool_t, svfloat64_t, float64_t); | |
| 15584 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_x))) | |
| 15585 | svfloat32_t svamax_n_f32_x(svbool_t, svfloat32_t, float32_t); | |
| 15586 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_x))) | |
| 15587 | svfloat16_t svamax_n_f16_x(svbool_t, svfloat16_t, float16_t); | |
| 15588 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_z))) | |
| 15589 | svfloat64_t svamax_n_f64_z(svbool_t, svfloat64_t, float64_t); | |
| 15590 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_z))) | |
| 15591 | svfloat32_t svamax_n_f32_z(svbool_t, svfloat32_t, float32_t); | |
| 15592 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_z))) | |
| 15593 | svfloat16_t svamax_n_f16_z(svbool_t, svfloat16_t, float16_t); | |
| 15594 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_m))) | |
| 15595 | svfloat64_t svamax_f64_m(svbool_t, svfloat64_t, svfloat64_t); | |
| 15596 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_m))) | |
| 15597 | svfloat32_t svamax_f32_m(svbool_t, svfloat32_t, svfloat32_t); | |
| 15598 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_m))) | |
| 15599 | svfloat16_t svamax_f16_m(svbool_t, svfloat16_t, svfloat16_t); | |
| 15600 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_x))) | |
| 15601 | svfloat64_t svamax_f64_x(svbool_t, svfloat64_t, svfloat64_t); | |
| 15602 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_x))) | |
| 15603 | svfloat32_t svamax_f32_x(svbool_t, svfloat32_t, svfloat32_t); | |
| 15604 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_x))) | |
| 15605 | svfloat16_t svamax_f16_x(svbool_t, svfloat16_t, svfloat16_t); | |
| 15606 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_z))) | |
| 15607 | svfloat64_t svamax_f64_z(svbool_t, svfloat64_t, svfloat64_t); | |
| 15608 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_z))) | |
| 15609 | svfloat32_t svamax_f32_z(svbool_t, svfloat32_t, svfloat32_t); | |
| 15610 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_z))) | |
| 15611 | svfloat16_t svamax_f16_z(svbool_t, svfloat16_t, svfloat16_t); | |
| 15612 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_m))) | |
| 15613 | svfloat64_t svamin_n_f64_m(svbool_t, svfloat64_t, float64_t); | |
| 15614 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_m))) | |
| 15615 | svfloat32_t svamin_n_f32_m(svbool_t, svfloat32_t, float32_t); | |
| 15616 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_m))) | |
| 15617 | svfloat16_t svamin_n_f16_m(svbool_t, svfloat16_t, float16_t); | |
| 15618 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_x))) | |
| 15619 | svfloat64_t svamin_n_f64_x(svbool_t, svfloat64_t, float64_t); | |
| 15620 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_x))) | |
| 15621 | svfloat32_t svamin_n_f32_x(svbool_t, svfloat32_t, float32_t); | |
| 15622 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_x))) | |
| 15623 | svfloat16_t svamin_n_f16_x(svbool_t, svfloat16_t, float16_t); | |
| 15624 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_z))) | |
| 15625 | svfloat64_t svamin_n_f64_z(svbool_t, svfloat64_t, float64_t); | |
| 15626 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_z))) | |
| 15627 | svfloat32_t svamin_n_f32_z(svbool_t, svfloat32_t, float32_t); | |
| 15628 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_z))) | |
| 15629 | svfloat16_t svamin_n_f16_z(svbool_t, svfloat16_t, float16_t); | |
| 15630 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_m))) | |
| 15631 | svfloat64_t svamin_f64_m(svbool_t, svfloat64_t, svfloat64_t); | |
| 15632 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_m))) | |
| 15633 | svfloat32_t svamin_f32_m(svbool_t, svfloat32_t, svfloat32_t); | |
| 15634 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_m))) | |
| 15635 | svfloat16_t svamin_f16_m(svbool_t, svfloat16_t, svfloat16_t); | |
| 15636 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_x))) | |
| 15637 | svfloat64_t svamin_f64_x(svbool_t, svfloat64_t, svfloat64_t); | |
| 15638 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_x))) | |
| 15639 | svfloat32_t svamin_f32_x(svbool_t, svfloat32_t, svfloat32_t); | |
| 15640 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_x))) | |
| 15641 | svfloat16_t svamin_f16_x(svbool_t, svfloat16_t, svfloat16_t); | |
| 15642 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_z))) | |
| 15643 | svfloat64_t svamin_f64_z(svbool_t, svfloat64_t, svfloat64_t); | |
| 15644 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_z))) | |
| 15645 | svfloat32_t svamin_f32_z(svbool_t, svfloat32_t, svfloat32_t); | |
| 15646 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_z))) | |
| 15647 | svfloat16_t svamin_f16_z(svbool_t, svfloat16_t, svfloat16_t); | |
| 15648 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_m))) | |
| 15649 | svfloat64_t svamax_m(svbool_t, svfloat64_t, float64_t); | |
| 15650 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_m))) | |
| 15651 | svfloat32_t svamax_m(svbool_t, svfloat32_t, float32_t); | |
| 15652 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_m))) | |
| 15653 | svfloat16_t svamax_m(svbool_t, svfloat16_t, float16_t); | |
| 15654 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_x))) | |
| 15655 | svfloat64_t svamax_x(svbool_t, svfloat64_t, float64_t); | |
| 15656 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_x))) | |
| 15657 | svfloat32_t svamax_x(svbool_t, svfloat32_t, float32_t); | |
| 15658 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_x))) | |
| 15659 | svfloat16_t svamax_x(svbool_t, svfloat16_t, float16_t); | |
| 15660 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f64_z))) | |
| 15661 | svfloat64_t svamax_z(svbool_t, svfloat64_t, float64_t); | |
| 15662 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f32_z))) | |
| 15663 | svfloat32_t svamax_z(svbool_t, svfloat32_t, float32_t); | |
| 15664 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_n_f16_z))) | |
| 15665 | svfloat16_t svamax_z(svbool_t, svfloat16_t, float16_t); | |
| 15666 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_m))) | |
| 15667 | svfloat64_t svamax_m(svbool_t, svfloat64_t, svfloat64_t); | |
| 15668 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_m))) | |
| 15669 | svfloat32_t svamax_m(svbool_t, svfloat32_t, svfloat32_t); | |
| 15670 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_m))) | |
| 15671 | svfloat16_t svamax_m(svbool_t, svfloat16_t, svfloat16_t); | |
| 15672 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_x))) | |
| 15673 | svfloat64_t svamax_x(svbool_t, svfloat64_t, svfloat64_t); | |
| 15674 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_x))) | |
| 15675 | svfloat32_t svamax_x(svbool_t, svfloat32_t, svfloat32_t); | |
| 15676 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_x))) | |
| 15677 | svfloat16_t svamax_x(svbool_t, svfloat16_t, svfloat16_t); | |
| 15678 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f64_z))) | |
| 15679 | svfloat64_t svamax_z(svbool_t, svfloat64_t, svfloat64_t); | |
| 15680 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f32_z))) | |
| 15681 | svfloat32_t svamax_z(svbool_t, svfloat32_t, svfloat32_t); | |
| 15682 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamax_f16_z))) | |
| 15683 | svfloat16_t svamax_z(svbool_t, svfloat16_t, svfloat16_t); | |
| 15684 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_m))) | |
| 15685 | svfloat64_t svamin_m(svbool_t, svfloat64_t, float64_t); | |
| 15686 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_m))) | |
| 15687 | svfloat32_t svamin_m(svbool_t, svfloat32_t, float32_t); | |
| 15688 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_m))) | |
| 15689 | svfloat16_t svamin_m(svbool_t, svfloat16_t, float16_t); | |
| 15690 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_x))) | |
| 15691 | svfloat64_t svamin_x(svbool_t, svfloat64_t, float64_t); | |
| 15692 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_x))) | |
| 15693 | svfloat32_t svamin_x(svbool_t, svfloat32_t, float32_t); | |
| 15694 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_x))) | |
| 15695 | svfloat16_t svamin_x(svbool_t, svfloat16_t, float16_t); | |
| 15696 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f64_z))) | |
| 15697 | svfloat64_t svamin_z(svbool_t, svfloat64_t, float64_t); | |
| 15698 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f32_z))) | |
| 15699 | svfloat32_t svamin_z(svbool_t, svfloat32_t, float32_t); | |
| 15700 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_n_f16_z))) | |
| 15701 | svfloat16_t svamin_z(svbool_t, svfloat16_t, float16_t); | |
| 15702 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_m))) | |
| 15703 | svfloat64_t svamin_m(svbool_t, svfloat64_t, svfloat64_t); | |
| 15704 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_m))) | |
| 15705 | svfloat32_t svamin_m(svbool_t, svfloat32_t, svfloat32_t); | |
| 15706 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_m))) | |
| 15707 | svfloat16_t svamin_m(svbool_t, svfloat16_t, svfloat16_t); | |
| 15708 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_x))) | |
| 15709 | svfloat64_t svamin_x(svbool_t, svfloat64_t, svfloat64_t); | |
| 15710 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_x))) | |
| 15711 | svfloat32_t svamin_x(svbool_t, svfloat32_t, svfloat32_t); | |
| 15712 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_x))) | |
| 15713 | svfloat16_t svamin_x(svbool_t, svfloat16_t, svfloat16_t); | |
| 15714 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f64_z))) | |
| 15715 | svfloat64_t svamin_z(svbool_t, svfloat64_t, svfloat64_t); | |
| 15716 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f32_z))) | |
| 15717 | svfloat32_t svamin_z(svbool_t, svfloat32_t, svfloat32_t); | |
| 15718 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svamin_f16_z))) | |
| 15719 | svfloat16_t svamin_z(svbool_t, svfloat16_t, svfloat16_t); | |
| 15720 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_bf16_mf8_fpm))) | |
| 15721 | svbfloat16_t svcvt1_bf16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 15722 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_f16_mf8_fpm))) | |
| 15723 | svfloat16_t svcvt1_f16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 15724 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_bf16_mf8_fpm))) | |
| 15725 | svbfloat16_t svcvt2_bf16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 15726 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_f16_mf8_fpm))) | |
| 15727 | svfloat16_t svcvt2_f16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 15728 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_bf16_mf8_fpm))) | |
| 15729 | svbfloat16_t svcvtlt1_bf16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 15730 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_f16_mf8_fpm))) | |
| 15731 | svfloat16_t svcvtlt1_f16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 15732 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_bf16_mf8_fpm))) | |
| 15733 | svbfloat16_t svcvtlt2_bf16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 15734 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_f16_mf8_fpm))) | |
| 15735 | svfloat16_t svcvtlt2_f16_mf8_fpm(svmfloat8_t, fpm_t); | |
| 15736 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_bf16_x2_fpm))) | |
| 15737 | svmfloat8_t svcvtn_mf8_bf16_x2_fpm(svbfloat16x2_t, fpm_t); | |
| 15738 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_f16_x2_fpm))) | |
| 15739 | svmfloat8_t svcvtn_mf8_f16_x2_fpm(svfloat16x2_t, fpm_t); | |
| 15740 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnb_mf8_f32_x2_fpm))) | |
| 15741 | svmfloat8_t svcvtnb_mf8_f32_x2_fpm(svfloat32x2_t, fpm_t); | |
| 15742 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_mf8_f32_x2_fpm))) | |
| 15743 | svmfloat8_t svcvtnt_mf8_f32_x2_fpm(svmfloat8_t, svfloat32x2_t, fpm_t); | |
| 15744 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_bf16_mf8_fpm))) | |
| 15745 | svbfloat16_t svcvt1_bf16_fpm(svmfloat8_t, fpm_t); | |
| 15746 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt1_f16_mf8_fpm))) | |
| 15747 | svfloat16_t svcvt1_f16_fpm(svmfloat8_t, fpm_t); | |
| 15748 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_bf16_mf8_fpm))) | |
| 15749 | svbfloat16_t svcvt2_bf16_fpm(svmfloat8_t, fpm_t); | |
| 15750 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt2_f16_mf8_fpm))) | |
| 15751 | svfloat16_t svcvt2_f16_fpm(svmfloat8_t, fpm_t); | |
| 15752 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_bf16_mf8_fpm))) | |
| 15753 | svbfloat16_t svcvtlt1_bf16_fpm(svmfloat8_t, fpm_t); | |
| 15754 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt1_f16_mf8_fpm))) | |
| 15755 | svfloat16_t svcvtlt1_f16_fpm(svmfloat8_t, fpm_t); | |
| 15756 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_bf16_mf8_fpm))) | |
| 15757 | svbfloat16_t svcvtlt2_bf16_fpm(svmfloat8_t, fpm_t); | |
| 15758 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtlt2_f16_mf8_fpm))) | |
| 15759 | svfloat16_t svcvtlt2_f16_fpm(svmfloat8_t, fpm_t); | |
| 15760 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_bf16_x2_fpm))) | |
| 15761 | svmfloat8_t svcvtn_mf8_fpm(svbfloat16x2_t, fpm_t); | |
| 15762 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtn_mf8_f16_x2_fpm))) | |
| 15763 | svmfloat8_t svcvtn_mf8_fpm(svfloat16x2_t, fpm_t); | |
| 15764 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnb_mf8_f32_x2_fpm))) | |
| 15765 | svmfloat8_t svcvtnb_mf8_fpm(svfloat32x2_t, fpm_t); | |
| 15766 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_mf8_f32_x2_fpm))) | |
| 15767 | svmfloat8_t svcvtnt_mf8_fpm(svmfloat8_t, svfloat32x2_t, fpm_t); | |
| 15768 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u8))) | |
| 15769 | svuint8_t svluti2_lane_u8(svuint8_t, svuint8_t, uint64_t); | |
| 15770 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s8))) | |
| 15771 | svint8_t svluti2_lane_s8(svint8_t, svuint8_t, uint64_t); | |
| 15772 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u16))) | |
| 15773 | svuint16_t svluti2_lane_u16(svuint16_t, svuint8_t, uint64_t); | |
| 15774 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_bf16))) | |
| 15775 | svbfloat16_t svluti2_lane_bf16(svbfloat16_t, svuint8_t, uint64_t); | |
| 15776 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_f16))) | |
| 15777 | svfloat16_t svluti2_lane_f16(svfloat16_t, svuint8_t, uint64_t); | |
| 15778 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s16))) | |
| 15779 | svint16_t svluti2_lane_s16(svint16_t, svuint8_t, uint64_t); | |
| 15780 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u8))) | |
| 15781 | svuint8_t svluti4_lane_u8(svuint8_t, svuint8_t, uint64_t); | |
| 15782 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s8))) | |
| 15783 | svint8_t svluti4_lane_s8(svint8_t, svuint8_t, uint64_t); | |
| 15784 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16))) | |
| 15785 | svuint16_t svluti4_lane_u16(svuint16_t, svuint8_t, uint64_t); | |
| 15786 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16))) | |
| 15787 | svbfloat16_t svluti4_lane_bf16(svbfloat16_t, svuint8_t, uint64_t); | |
| 15788 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16))) | |
| 15789 | svfloat16_t svluti4_lane_f16(svfloat16_t, svuint8_t, uint64_t); | |
| 15790 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16))) | |
| 15791 | svint16_t svluti4_lane_s16(svint16_t, svuint8_t, uint64_t); | |
| 15792 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16_x2))) | |
| 15793 | svuint16_t svluti4_lane_u16_x2(svuint16x2_t, svuint8_t, uint64_t); | |
| 15794 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16_x2))) | |
| 15795 | svbfloat16_t svluti4_lane_bf16_x2(svbfloat16x2_t, svuint8_t, uint64_t); | |
| 15796 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16_x2))) | |
| 15797 | svfloat16_t svluti4_lane_f16_x2(svfloat16x2_t, svuint8_t, uint64_t); | |
| 15798 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16_x2))) | |
| 15799 | svint16_t svluti4_lane_s16_x2(svint16x2_t, svuint8_t, uint64_t); | |
| 15800 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u8))) | |
| 15801 | svuint8_t svluti2_lane(svuint8_t, svuint8_t, uint64_t); | |
| 15802 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s8))) | |
| 15803 | svint8_t svluti2_lane(svint8_t, svuint8_t, uint64_t); | |
| 15804 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_u16))) | |
| 15805 | svuint16_t svluti2_lane(svuint16_t, svuint8_t, uint64_t); | |
| 15806 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_bf16))) | |
| 15807 | svbfloat16_t svluti2_lane(svbfloat16_t, svuint8_t, uint64_t); | |
| 15808 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_f16))) | |
| 15809 | svfloat16_t svluti2_lane(svfloat16_t, svuint8_t, uint64_t); | |
| 15810 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti2_lane_s16))) | |
| 15811 | svint16_t svluti2_lane(svint16_t, svuint8_t, uint64_t); | |
| 15812 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u8))) | |
| 15813 | svuint8_t svluti4_lane(svuint8_t, svuint8_t, uint64_t); | |
| 15814 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s8))) | |
| 15815 | svint8_t svluti4_lane(svint8_t, svuint8_t, uint64_t); | |
| 15816 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16))) | |
| 15817 | svuint16_t svluti4_lane(svuint16_t, svuint8_t, uint64_t); | |
| 15818 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16))) | |
| 15819 | svbfloat16_t svluti4_lane(svbfloat16_t, svuint8_t, uint64_t); | |
| 15820 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16))) | |
| 15821 | svfloat16_t svluti4_lane(svfloat16_t, svuint8_t, uint64_t); | |
| 15822 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16))) | |
| 15823 | svint16_t svluti4_lane(svint16_t, svuint8_t, uint64_t); | |
| 15824 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_u16_x2))) | |
| 15825 | svuint16_t svluti4_lane(svuint16x2_t, svuint8_t, uint64_t); | |
| 15826 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_bf16_x2))) | |
| 15827 | svbfloat16_t svluti4_lane(svbfloat16x2_t, svuint8_t, uint64_t); | |
| 15828 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_f16_x2))) | |
| 15829 | svfloat16_t svluti4_lane(svfloat16x2_t, svuint8_t, uint64_t); | |
| 15830 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svluti4_lane_s16_x2))) | |
| 15831 | svint16_t svluti4_lane(svint16x2_t, svuint8_t, uint64_t); | |
| 15832 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmmla_f32))) | |
| 15833 | svfloat32_t svbfmmla_f32(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 15834 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmmla_f32))) | |
| 15835 | svfloat32_t svbfmmla(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 15836 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_n_f32))) | |
| 15837 | svfloat32_t svbfdot_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 15838 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_f32))) | |
| 15839 | svfloat32_t svbfdot_f32(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 15840 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_lane_f32))) | |
| 15841 | svfloat32_t svbfdot_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 15842 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_n_f32))) | |
| 15843 | svfloat32_t svbfmlalb_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 15844 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_f32))) | |
| 15845 | svfloat32_t svbfmlalb_f32(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 15846 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_lane_f32))) | |
| 15847 | svfloat32_t svbfmlalb_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 15848 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_n_f32))) | |
| 15849 | svfloat32_t svbfmlalt_n_f32(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 15850 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_f32))) | |
| 15851 | svfloat32_t svbfmlalt_f32(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 15852 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_lane_f32))) | |
| 15853 | svfloat32_t svbfmlalt_lane_f32(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 15854 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_m))) | |
| 15855 | svbfloat16_t svcvt_bf16_f32_m(svbfloat16_t, svbool_t, svfloat32_t); | |
| 15856 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_x))) | |
| 15857 | svbfloat16_t svcvt_bf16_f32_x(svbool_t, svfloat32_t); | |
| 15858 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_z))) | |
| 15859 | svbfloat16_t svcvt_bf16_f32_z(svbool_t, svfloat32_t); | |
| 15860 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_m))) | |
| 15861 | svbfloat16_t svcvtnt_bf16_f32_m(svbfloat16_t, svbool_t, svfloat32_t); | |
| 15862 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_n_f32))) | |
| 15863 | svfloat32_t svbfdot(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 15864 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_f32))) | |
| 15865 | svfloat32_t svbfdot(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 15866 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfdot_lane_f32))) | |
| 15867 | svfloat32_t svbfdot_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 15868 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_n_f32))) | |
| 15869 | svfloat32_t svbfmlalb(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 15870 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_f32))) | |
| 15871 | svfloat32_t svbfmlalb(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 15872 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalb_lane_f32))) | |
| 15873 | svfloat32_t svbfmlalb_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 15874 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_n_f32))) | |
| 15875 | svfloat32_t svbfmlalt(svfloat32_t, svbfloat16_t, bfloat16_t); | |
| 15876 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_f32))) | |
| 15877 | svfloat32_t svbfmlalt(svfloat32_t, svbfloat16_t, svbfloat16_t); | |
| 15878 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbfmlalt_lane_f32))) | |
| 15879 | svfloat32_t svbfmlalt_lane(svfloat32_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 15880 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_m))) | |
| 15881 | svbfloat16_t svcvt_bf16_m(svbfloat16_t, svbool_t, svfloat32_t); | |
| 15882 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_x))) | |
| 15883 | svbfloat16_t svcvt_bf16_x(svbool_t, svfloat32_t); | |
| 15884 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvt_bf16_f32_z))) | |
| 15885 | svbfloat16_t svcvt_bf16_z(svbool_t, svfloat32_t); | |
| 15886 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcvtnt_bf16_f32_m))) | |
| 15887 | svbfloat16_t svcvtnt_bf16_m(svbfloat16_t, svbool_t, svfloat32_t); | |
| 15888 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32))) | |
| 15889 | svfloat32_t svmmla_f32(svfloat32_t, svfloat32_t, svfloat32_t); | |
| 15890 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32))) | |
| 15891 | svfloat32_t svmmla(svfloat32_t, svfloat32_t, svfloat32_t); | |
| 15892 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u8))) | |
| 15893 | svuint8_t svld1ro_u8(svbool_t, uint8_t const *); | |
| 15894 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u32))) | |
| 15895 | svuint32_t svld1ro_u32(svbool_t, uint32_t const *); | |
| 15896 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u64))) | |
| 15897 | svuint64_t svld1ro_u64(svbool_t, uint64_t const *); | |
| 15898 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u16))) | |
| 15899 | svuint16_t svld1ro_u16(svbool_t, uint16_t const *); | |
| 15900 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_bf16))) | |
| 15901 | svbfloat16_t svld1ro_bf16(svbool_t, bfloat16_t const *); | |
| 15902 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s8))) | |
| 15903 | svint8_t svld1ro_s8(svbool_t, int8_t const *); | |
| 15904 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f64))) | |
| 15905 | svfloat64_t svld1ro_f64(svbool_t, float64_t const *); | |
| 15906 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f32))) | |
| 15907 | svfloat32_t svld1ro_f32(svbool_t, float32_t const *); | |
| 15908 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f16))) | |
| 15909 | svfloat16_t svld1ro_f16(svbool_t, float16_t const *); | |
| 15910 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s32))) | |
| 15911 | svint32_t svld1ro_s32(svbool_t, int32_t const *); | |
| 15912 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s64))) | |
| 15913 | svint64_t svld1ro_s64(svbool_t, int64_t const *); | |
| 15914 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_mf8))) | |
| 15915 | svmfloat8_t svld1ro_mf8(svbool_t, mfloat8_t const *); | |
| 15916 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s16))) | |
| 15917 | svint16_t svld1ro_s16(svbool_t, int16_t const *); | |
| 15918 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f64))) | |
| 15919 | svfloat64_t svmmla_f64(svfloat64_t, svfloat64_t, svfloat64_t); | |
| 15920 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u8))) | |
| 15921 | svuint8_t svtrn1q_u8(svuint8_t, svuint8_t); | |
| 15922 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u32))) | |
| 15923 | svuint32_t svtrn1q_u32(svuint32_t, svuint32_t); | |
| 15924 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u64))) | |
| 15925 | svuint64_t svtrn1q_u64(svuint64_t, svuint64_t); | |
| 15926 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u16))) | |
| 15927 | svuint16_t svtrn1q_u16(svuint16_t, svuint16_t); | |
| 15928 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_bf16))) | |
| 15929 | svbfloat16_t svtrn1q_bf16(svbfloat16_t, svbfloat16_t); | |
| 15930 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s8))) | |
| 15931 | svint8_t svtrn1q_s8(svint8_t, svint8_t); | |
| 15932 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f64))) | |
| 15933 | svfloat64_t svtrn1q_f64(svfloat64_t, svfloat64_t); | |
| 15934 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f32))) | |
| 15935 | svfloat32_t svtrn1q_f32(svfloat32_t, svfloat32_t); | |
| 15936 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f16))) | |
| 15937 | svfloat16_t svtrn1q_f16(svfloat16_t, svfloat16_t); | |
| 15938 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s32))) | |
| 15939 | svint32_t svtrn1q_s32(svint32_t, svint32_t); | |
| 15940 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s64))) | |
| 15941 | svint64_t svtrn1q_s64(svint64_t, svint64_t); | |
| 15942 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s16))) | |
| 15943 | svint16_t svtrn1q_s16(svint16_t, svint16_t); | |
| 15944 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u8))) | |
| 15945 | svuint8_t svtrn2q_u8(svuint8_t, svuint8_t); | |
| 15946 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u32))) | |
| 15947 | svuint32_t svtrn2q_u32(svuint32_t, svuint32_t); | |
| 15948 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u64))) | |
| 15949 | svuint64_t svtrn2q_u64(svuint64_t, svuint64_t); | |
| 15950 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u16))) | |
| 15951 | svuint16_t svtrn2q_u16(svuint16_t, svuint16_t); | |
| 15952 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_bf16))) | |
| 15953 | svbfloat16_t svtrn2q_bf16(svbfloat16_t, svbfloat16_t); | |
| 15954 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s8))) | |
| 15955 | svint8_t svtrn2q_s8(svint8_t, svint8_t); | |
| 15956 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f64))) | |
| 15957 | svfloat64_t svtrn2q_f64(svfloat64_t, svfloat64_t); | |
| 15958 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f32))) | |
| 15959 | svfloat32_t svtrn2q_f32(svfloat32_t, svfloat32_t); | |
| 15960 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f16))) | |
| 15961 | svfloat16_t svtrn2q_f16(svfloat16_t, svfloat16_t); | |
| 15962 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s32))) | |
| 15963 | svint32_t svtrn2q_s32(svint32_t, svint32_t); | |
| 15964 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s64))) | |
| 15965 | svint64_t svtrn2q_s64(svint64_t, svint64_t); | |
| 15966 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s16))) | |
| 15967 | svint16_t svtrn2q_s16(svint16_t, svint16_t); | |
| 15968 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u8))) | |
| 15969 | svuint8_t svuzp1q_u8(svuint8_t, svuint8_t); | |
| 15970 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u32))) | |
| 15971 | svuint32_t svuzp1q_u32(svuint32_t, svuint32_t); | |
| 15972 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u64))) | |
| 15973 | svuint64_t svuzp1q_u64(svuint64_t, svuint64_t); | |
| 15974 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u16))) | |
| 15975 | svuint16_t svuzp1q_u16(svuint16_t, svuint16_t); | |
| 15976 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_bf16))) | |
| 15977 | svbfloat16_t svuzp1q_bf16(svbfloat16_t, svbfloat16_t); | |
| 15978 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s8))) | |
| 15979 | svint8_t svuzp1q_s8(svint8_t, svint8_t); | |
| 15980 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f64))) | |
| 15981 | svfloat64_t svuzp1q_f64(svfloat64_t, svfloat64_t); | |
| 15982 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f32))) | |
| 15983 | svfloat32_t svuzp1q_f32(svfloat32_t, svfloat32_t); | |
| 15984 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f16))) | |
| 15985 | svfloat16_t svuzp1q_f16(svfloat16_t, svfloat16_t); | |
| 15986 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s32))) | |
| 15987 | svint32_t svuzp1q_s32(svint32_t, svint32_t); | |
| 15988 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s64))) | |
| 15989 | svint64_t svuzp1q_s64(svint64_t, svint64_t); | |
| 15990 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s16))) | |
| 15991 | svint16_t svuzp1q_s16(svint16_t, svint16_t); | |
| 15992 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u8))) | |
| 15993 | svuint8_t svuzp2q_u8(svuint8_t, svuint8_t); | |
| 15994 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u32))) | |
| 15995 | svuint32_t svuzp2q_u32(svuint32_t, svuint32_t); | |
| 15996 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u64))) | |
| 15997 | svuint64_t svuzp2q_u64(svuint64_t, svuint64_t); | |
| 15998 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u16))) | |
| 15999 | svuint16_t svuzp2q_u16(svuint16_t, svuint16_t); | |
| 16000 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_bf16))) | |
| 16001 | svbfloat16_t svuzp2q_bf16(svbfloat16_t, svbfloat16_t); | |
| 16002 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s8))) | |
| 16003 | svint8_t svuzp2q_s8(svint8_t, svint8_t); | |
| 16004 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f64))) | |
| 16005 | svfloat64_t svuzp2q_f64(svfloat64_t, svfloat64_t); | |
| 16006 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f32))) | |
| 16007 | svfloat32_t svuzp2q_f32(svfloat32_t, svfloat32_t); | |
| 16008 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f16))) | |
| 16009 | svfloat16_t svuzp2q_f16(svfloat16_t, svfloat16_t); | |
| 16010 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s32))) | |
| 16011 | svint32_t svuzp2q_s32(svint32_t, svint32_t); | |
| 16012 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s64))) | |
| 16013 | svint64_t svuzp2q_s64(svint64_t, svint64_t); | |
| 16014 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s16))) | |
| 16015 | svint16_t svuzp2q_s16(svint16_t, svint16_t); | |
| 16016 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u8))) | |
| 16017 | svuint8_t svzip1q_u8(svuint8_t, svuint8_t); | |
| 16018 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u32))) | |
| 16019 | svuint32_t svzip1q_u32(svuint32_t, svuint32_t); | |
| 16020 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u64))) | |
| 16021 | svuint64_t svzip1q_u64(svuint64_t, svuint64_t); | |
| 16022 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u16))) | |
| 16023 | svuint16_t svzip1q_u16(svuint16_t, svuint16_t); | |
| 16024 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_bf16))) | |
| 16025 | svbfloat16_t svzip1q_bf16(svbfloat16_t, svbfloat16_t); | |
| 16026 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s8))) | |
| 16027 | svint8_t svzip1q_s8(svint8_t, svint8_t); | |
| 16028 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f64))) | |
| 16029 | svfloat64_t svzip1q_f64(svfloat64_t, svfloat64_t); | |
| 16030 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f32))) | |
| 16031 | svfloat32_t svzip1q_f32(svfloat32_t, svfloat32_t); | |
| 16032 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f16))) | |
| 16033 | svfloat16_t svzip1q_f16(svfloat16_t, svfloat16_t); | |
| 16034 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s32))) | |
| 16035 | svint32_t svzip1q_s32(svint32_t, svint32_t); | |
| 16036 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s64))) | |
| 16037 | svint64_t svzip1q_s64(svint64_t, svint64_t); | |
| 16038 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s16))) | |
| 16039 | svint16_t svzip1q_s16(svint16_t, svint16_t); | |
| 16040 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u8))) | |
| 16041 | svuint8_t svzip2q_u8(svuint8_t, svuint8_t); | |
| 16042 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u32))) | |
| 16043 | svuint32_t svzip2q_u32(svuint32_t, svuint32_t); | |
| 16044 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u64))) | |
| 16045 | svuint64_t svzip2q_u64(svuint64_t, svuint64_t); | |
| 16046 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u16))) | |
| 16047 | svuint16_t svzip2q_u16(svuint16_t, svuint16_t); | |
| 16048 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_bf16))) | |
| 16049 | svbfloat16_t svzip2q_bf16(svbfloat16_t, svbfloat16_t); | |
| 16050 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s8))) | |
| 16051 | svint8_t svzip2q_s8(svint8_t, svint8_t); | |
| 16052 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f64))) | |
| 16053 | svfloat64_t svzip2q_f64(svfloat64_t, svfloat64_t); | |
| 16054 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f32))) | |
| 16055 | svfloat32_t svzip2q_f32(svfloat32_t, svfloat32_t); | |
| 16056 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f16))) | |
| 16057 | svfloat16_t svzip2q_f16(svfloat16_t, svfloat16_t); | |
| 16058 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s32))) | |
| 16059 | svint32_t svzip2q_s32(svint32_t, svint32_t); | |
| 16060 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s64))) | |
| 16061 | svint64_t svzip2q_s64(svint64_t, svint64_t); | |
| 16062 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s16))) | |
| 16063 | svint16_t svzip2q_s16(svint16_t, svint16_t); | |
| 16064 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u8))) | |
| 16065 | svuint8_t svld1ro(svbool_t, uint8_t const *); | |
| 16066 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u32))) | |
| 16067 | svuint32_t svld1ro(svbool_t, uint32_t const *); | |
| 16068 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u64))) | |
| 16069 | svuint64_t svld1ro(svbool_t, uint64_t const *); | |
| 16070 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_u16))) | |
| 16071 | svuint16_t svld1ro(svbool_t, uint16_t const *); | |
| 16072 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_bf16))) | |
| 16073 | svbfloat16_t svld1ro(svbool_t, bfloat16_t const *); | |
| 16074 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s8))) | |
| 16075 | svint8_t svld1ro(svbool_t, int8_t const *); | |
| 16076 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f64))) | |
| 16077 | svfloat64_t svld1ro(svbool_t, float64_t const *); | |
| 16078 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f32))) | |
| 16079 | svfloat32_t svld1ro(svbool_t, float32_t const *); | |
| 16080 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_f16))) | |
| 16081 | svfloat16_t svld1ro(svbool_t, float16_t const *); | |
| 16082 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s32))) | |
| 16083 | svint32_t svld1ro(svbool_t, int32_t const *); | |
| 16084 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s64))) | |
| 16085 | svint64_t svld1ro(svbool_t, int64_t const *); | |
| 16086 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_mf8))) | |
| 16087 | svmfloat8_t svld1ro(svbool_t, mfloat8_t const *); | |
| 16088 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1ro_s16))) | |
| 16089 | svint16_t svld1ro(svbool_t, int16_t const *); | |
| 16090 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f64))) | |
| 16091 | svfloat64_t svmmla(svfloat64_t, svfloat64_t, svfloat64_t); | |
| 16092 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u8))) | |
| 16093 | svuint8_t svtrn1q(svuint8_t, svuint8_t); | |
| 16094 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u32))) | |
| 16095 | svuint32_t svtrn1q(svuint32_t, svuint32_t); | |
| 16096 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u64))) | |
| 16097 | svuint64_t svtrn1q(svuint64_t, svuint64_t); | |
| 16098 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_u16))) | |
| 16099 | svuint16_t svtrn1q(svuint16_t, svuint16_t); | |
| 16100 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_bf16))) | |
| 16101 | svbfloat16_t svtrn1q(svbfloat16_t, svbfloat16_t); | |
| 16102 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s8))) | |
| 16103 | svint8_t svtrn1q(svint8_t, svint8_t); | |
| 16104 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f64))) | |
| 16105 | svfloat64_t svtrn1q(svfloat64_t, svfloat64_t); | |
| 16106 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f32))) | |
| 16107 | svfloat32_t svtrn1q(svfloat32_t, svfloat32_t); | |
| 16108 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_f16))) | |
| 16109 | svfloat16_t svtrn1q(svfloat16_t, svfloat16_t); | |
| 16110 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s32))) | |
| 16111 | svint32_t svtrn1q(svint32_t, svint32_t); | |
| 16112 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s64))) | |
| 16113 | svint64_t svtrn1q(svint64_t, svint64_t); | |
| 16114 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn1q_s16))) | |
| 16115 | svint16_t svtrn1q(svint16_t, svint16_t); | |
| 16116 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u8))) | |
| 16117 | svuint8_t svtrn2q(svuint8_t, svuint8_t); | |
| 16118 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u32))) | |
| 16119 | svuint32_t svtrn2q(svuint32_t, svuint32_t); | |
| 16120 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u64))) | |
| 16121 | svuint64_t svtrn2q(svuint64_t, svuint64_t); | |
| 16122 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_u16))) | |
| 16123 | svuint16_t svtrn2q(svuint16_t, svuint16_t); | |
| 16124 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_bf16))) | |
| 16125 | svbfloat16_t svtrn2q(svbfloat16_t, svbfloat16_t); | |
| 16126 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s8))) | |
| 16127 | svint8_t svtrn2q(svint8_t, svint8_t); | |
| 16128 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f64))) | |
| 16129 | svfloat64_t svtrn2q(svfloat64_t, svfloat64_t); | |
| 16130 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f32))) | |
| 16131 | svfloat32_t svtrn2q(svfloat32_t, svfloat32_t); | |
| 16132 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_f16))) | |
| 16133 | svfloat16_t svtrn2q(svfloat16_t, svfloat16_t); | |
| 16134 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s32))) | |
| 16135 | svint32_t svtrn2q(svint32_t, svint32_t); | |
| 16136 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s64))) | |
| 16137 | svint64_t svtrn2q(svint64_t, svint64_t); | |
| 16138 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svtrn2q_s16))) | |
| 16139 | svint16_t svtrn2q(svint16_t, svint16_t); | |
| 16140 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u8))) | |
| 16141 | svuint8_t svuzp1q(svuint8_t, svuint8_t); | |
| 16142 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u32))) | |
| 16143 | svuint32_t svuzp1q(svuint32_t, svuint32_t); | |
| 16144 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u64))) | |
| 16145 | svuint64_t svuzp1q(svuint64_t, svuint64_t); | |
| 16146 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_u16))) | |
| 16147 | svuint16_t svuzp1q(svuint16_t, svuint16_t); | |
| 16148 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_bf16))) | |
| 16149 | svbfloat16_t svuzp1q(svbfloat16_t, svbfloat16_t); | |
| 16150 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s8))) | |
| 16151 | svint8_t svuzp1q(svint8_t, svint8_t); | |
| 16152 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f64))) | |
| 16153 | svfloat64_t svuzp1q(svfloat64_t, svfloat64_t); | |
| 16154 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f32))) | |
| 16155 | svfloat32_t svuzp1q(svfloat32_t, svfloat32_t); | |
| 16156 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_f16))) | |
| 16157 | svfloat16_t svuzp1q(svfloat16_t, svfloat16_t); | |
| 16158 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s32))) | |
| 16159 | svint32_t svuzp1q(svint32_t, svint32_t); | |
| 16160 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s64))) | |
| 16161 | svint64_t svuzp1q(svint64_t, svint64_t); | |
| 16162 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp1q_s16))) | |
| 16163 | svint16_t svuzp1q(svint16_t, svint16_t); | |
| 16164 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u8))) | |
| 16165 | svuint8_t svuzp2q(svuint8_t, svuint8_t); | |
| 16166 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u32))) | |
| 16167 | svuint32_t svuzp2q(svuint32_t, svuint32_t); | |
| 16168 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u64))) | |
| 16169 | svuint64_t svuzp2q(svuint64_t, svuint64_t); | |
| 16170 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_u16))) | |
| 16171 | svuint16_t svuzp2q(svuint16_t, svuint16_t); | |
| 16172 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_bf16))) | |
| 16173 | svbfloat16_t svuzp2q(svbfloat16_t, svbfloat16_t); | |
| 16174 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s8))) | |
| 16175 | svint8_t svuzp2q(svint8_t, svint8_t); | |
| 16176 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f64))) | |
| 16177 | svfloat64_t svuzp2q(svfloat64_t, svfloat64_t); | |
| 16178 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f32))) | |
| 16179 | svfloat32_t svuzp2q(svfloat32_t, svfloat32_t); | |
| 16180 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_f16))) | |
| 16181 | svfloat16_t svuzp2q(svfloat16_t, svfloat16_t); | |
| 16182 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s32))) | |
| 16183 | svint32_t svuzp2q(svint32_t, svint32_t); | |
| 16184 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s64))) | |
| 16185 | svint64_t svuzp2q(svint64_t, svint64_t); | |
| 16186 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svuzp2q_s16))) | |
| 16187 | svint16_t svuzp2q(svint16_t, svint16_t); | |
| 16188 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u8))) | |
| 16189 | svuint8_t svzip1q(svuint8_t, svuint8_t); | |
| 16190 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u32))) | |
| 16191 | svuint32_t svzip1q(svuint32_t, svuint32_t); | |
| 16192 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u64))) | |
| 16193 | svuint64_t svzip1q(svuint64_t, svuint64_t); | |
| 16194 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_u16))) | |
| 16195 | svuint16_t svzip1q(svuint16_t, svuint16_t); | |
| 16196 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_bf16))) | |
| 16197 | svbfloat16_t svzip1q(svbfloat16_t, svbfloat16_t); | |
| 16198 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s8))) | |
| 16199 | svint8_t svzip1q(svint8_t, svint8_t); | |
| 16200 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f64))) | |
| 16201 | svfloat64_t svzip1q(svfloat64_t, svfloat64_t); | |
| 16202 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f32))) | |
| 16203 | svfloat32_t svzip1q(svfloat32_t, svfloat32_t); | |
| 16204 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_f16))) | |
| 16205 | svfloat16_t svzip1q(svfloat16_t, svfloat16_t); | |
| 16206 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s32))) | |
| 16207 | svint32_t svzip1q(svint32_t, svint32_t); | |
| 16208 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s64))) | |
| 16209 | svint64_t svzip1q(svint64_t, svint64_t); | |
| 16210 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip1q_s16))) | |
| 16211 | svint16_t svzip1q(svint16_t, svint16_t); | |
| 16212 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u8))) | |
| 16213 | svuint8_t svzip2q(svuint8_t, svuint8_t); | |
| 16214 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u32))) | |
| 16215 | svuint32_t svzip2q(svuint32_t, svuint32_t); | |
| 16216 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u64))) | |
| 16217 | svuint64_t svzip2q(svuint64_t, svuint64_t); | |
| 16218 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_u16))) | |
| 16219 | svuint16_t svzip2q(svuint16_t, svuint16_t); | |
| 16220 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_bf16))) | |
| 16221 | svbfloat16_t svzip2q(svbfloat16_t, svbfloat16_t); | |
| 16222 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s8))) | |
| 16223 | svint8_t svzip2q(svint8_t, svint8_t); | |
| 16224 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f64))) | |
| 16225 | svfloat64_t svzip2q(svfloat64_t, svfloat64_t); | |
| 16226 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f32))) | |
| 16227 | svfloat32_t svzip2q(svfloat32_t, svfloat32_t); | |
| 16228 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_f16))) | |
| 16229 | svfloat16_t svzip2q(svfloat16_t, svfloat16_t); | |
| 16230 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s32))) | |
| 16231 | svint32_t svzip2q(svint32_t, svint32_t); | |
| 16232 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s64))) | |
| 16233 | svint64_t svzip2q(svint64_t, svint64_t); | |
| 16234 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svzip2q_s16))) | |
| 16235 | svint16_t svzip2q(svint16_t, svint16_t); | |
| 16236 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_s32))) | |
| 16237 | svint32_t svmmla_s32(svint32_t, svint8_t, svint8_t); | |
| 16238 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_u32))) | |
| 16239 | svuint32_t svmmla_u32(svuint32_t, svuint8_t, svuint8_t); | |
| 16240 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusmmla_s32))) | |
| 16241 | svint32_t svusmmla_s32(svint32_t, svuint8_t, svint8_t); | |
| 16242 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_s32))) | |
| 16243 | svint32_t svmmla(svint32_t, svint8_t, svint8_t); | |
| 16244 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_u32))) | |
| 16245 | svuint32_t svmmla(svuint32_t, svuint8_t, svuint8_t); | |
| 16246 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusmmla_s32))) | |
| 16247 | svint32_t svusmmla(svint32_t, svuint8_t, svint8_t); | |
| 16248 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_n_s32))) | |
| 16249 | svint32_t svsudot_n_s32(svint32_t, svint8_t, uint8_t); | |
| 16250 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_s32))) | |
| 16251 | svint32_t svsudot_s32(svint32_t, svint8_t, svuint8_t); | |
| 16252 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_lane_s32))) | |
| 16253 | svint32_t svsudot_lane_s32(svint32_t, svint8_t, svuint8_t, uint64_t); | |
| 16254 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_n_s32))) | |
| 16255 | svint32_t svusdot_n_s32(svint32_t, svuint8_t, int8_t); | |
| 16256 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_s32))) | |
| 16257 | svint32_t svusdot_s32(svint32_t, svuint8_t, svint8_t); | |
| 16258 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_lane_s32))) | |
| 16259 | svint32_t svusdot_lane_s32(svint32_t, svuint8_t, svint8_t, uint64_t); | |
| 16260 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_n_s32))) | |
| 16261 | svint32_t svsudot(svint32_t, svint8_t, uint8_t); | |
| 16262 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_s32))) | |
| 16263 | svint32_t svsudot(svint32_t, svint8_t, svuint8_t); | |
| 16264 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsudot_lane_s32))) | |
| 16265 | svint32_t svsudot_lane(svint32_t, svint8_t, svuint8_t, uint64_t); | |
| 16266 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_n_s32))) | |
| 16267 | svint32_t svusdot(svint32_t, svuint8_t, int8_t); | |
| 16268 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_s32))) | |
| 16269 | svint32_t svusdot(svint32_t, svuint8_t, svint8_t); | |
| 16270 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svusdot_lane_s32))) | |
| 16271 | svint32_t svusdot_lane(svint32_t, svuint8_t, svint8_t, uint64_t); | |
| 16272 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_lane_u8_x2))) | |
| 16273 | svuint8x2_t svaesd_lane_u8_x2(svuint8x2_t, svuint8_t, uint64_t); | |
| 16274 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_lane_u8_x4))) | |
| 16275 | svuint8x4_t svaesd_lane_u8_x4(svuint8x4_t, svuint8_t, uint64_t); | |
| 16276 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesdimc_lane_u8_x2))) | |
| 16277 | svuint8x2_t svaesdimc_lane_u8_x2(svuint8x2_t, svuint8_t, uint64_t); | |
| 16278 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesdimc_lane_u8_x4))) | |
| 16279 | svuint8x4_t svaesdimc_lane_u8_x4(svuint8x4_t, svuint8_t, uint64_t); | |
| 16280 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_lane_u8_x2))) | |
| 16281 | svuint8x2_t svaese_lane_u8_x2(svuint8x2_t, svuint8_t, uint64_t); | |
| 16282 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_lane_u8_x4))) | |
| 16283 | svuint8x4_t svaese_lane_u8_x4(svuint8x4_t, svuint8_t, uint64_t); | |
| 16284 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesemc_lane_u8_x2))) | |
| 16285 | svuint8x2_t svaesemc_lane_u8_x2(svuint8x2_t, svuint8_t, uint64_t); | |
| 16286 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesemc_lane_u8_x4))) | |
| 16287 | svuint8x4_t svaesemc_lane_u8_x4(svuint8x4_t, svuint8_t, uint64_t); | |
| 16288 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmlal_pair_n_u64_x2))) | |
| 16289 | svuint64x2_t svpmlal_pair_n_u64_x2(svuint64x2_t, svuint64_t, uint64_t); | |
| 16290 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmlal_pair_u64_x2))) | |
| 16291 | svuint64x2_t svpmlal_pair_u64_x2(svuint64x2_t, svuint64_t, svuint64_t); | |
| 16292 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmull_pair_n_u64_x2))) | |
| 16293 | svuint64x2_t svpmull_pair_n_u64_x2(svuint64_t, uint64_t); | |
| 16294 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmull_pair_u64_x2))) | |
| 16295 | svuint64x2_t svpmull_pair_u64_x2(svuint64_t, svuint64_t); | |
| 16296 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_lane_u8_x2))) | |
| 16297 | svuint8x2_t svaesd_lane(svuint8x2_t, svuint8_t, uint64_t); | |
| 16298 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_lane_u8_x4))) | |
| 16299 | svuint8x4_t svaesd_lane(svuint8x4_t, svuint8_t, uint64_t); | |
| 16300 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesdimc_lane_u8_x2))) | |
| 16301 | svuint8x2_t svaesdimc_lane(svuint8x2_t, svuint8_t, uint64_t); | |
| 16302 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesdimc_lane_u8_x4))) | |
| 16303 | svuint8x4_t svaesdimc_lane(svuint8x4_t, svuint8_t, uint64_t); | |
| 16304 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_lane_u8_x2))) | |
| 16305 | svuint8x2_t svaese_lane(svuint8x2_t, svuint8_t, uint64_t); | |
| 16306 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_lane_u8_x4))) | |
| 16307 | svuint8x4_t svaese_lane(svuint8x4_t, svuint8_t, uint64_t); | |
| 16308 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesemc_lane_u8_x2))) | |
| 16309 | svuint8x2_t svaesemc_lane(svuint8x2_t, svuint8_t, uint64_t); | |
| 16310 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesemc_lane_u8_x4))) | |
| 16311 | svuint8x4_t svaesemc_lane(svuint8x4_t, svuint8_t, uint64_t); | |
| 16312 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmlal_pair_n_u64_x2))) | |
| 16313 | svuint64x2_t svpmlal_pair(svuint64x2_t, svuint64_t, uint64_t); | |
| 16314 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmlal_pair_u64_x2))) | |
| 16315 | svuint64x2_t svpmlal_pair(svuint64x2_t, svuint64_t, svuint64_t); | |
| 16316 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmull_pair_n_u64_x2))) | |
| 16317 | svuint64x2_t svpmull_pair(svuint64_t, uint64_t); | |
| 16318 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmull_pair_u64_x2))) | |
| 16319 | svuint64x2_t svpmull_pair(svuint64_t, svuint64_t); | |
| 16320 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_u8))) | |
| 16321 | svuint8_t svaesd_u8(svuint8_t, svuint8_t); | |
| 16322 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_u8))) | |
| 16323 | svuint8_t svaese_u8(svuint8_t, svuint8_t); | |
| 16324 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesimc_u8))) | |
| 16325 | svuint8_t svaesimc_u8(svuint8_t); | |
| 16326 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesmc_u8))) | |
| 16327 | svuint8_t svaesmc_u8(svuint8_t); | |
| 16328 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_n_u64))) | |
| 16329 | svuint64_t svpmullb_pair_n_u64(svuint64_t, uint64_t); | |
| 16330 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_u64))) | |
| 16331 | svuint64_t svpmullb_pair_u64(svuint64_t, svuint64_t); | |
| 16332 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_n_u64))) | |
| 16333 | svuint64_t svpmullt_pair_n_u64(svuint64_t, uint64_t); | |
| 16334 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_u64))) | |
| 16335 | svuint64_t svpmullt_pair_u64(svuint64_t, svuint64_t); | |
| 16336 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesd_u8))) | |
| 16337 | svuint8_t svaesd(svuint8_t, svuint8_t); | |
| 16338 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaese_u8))) | |
| 16339 | svuint8_t svaese(svuint8_t, svuint8_t); | |
| 16340 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesimc_u8))) | |
| 16341 | svuint8_t svaesimc(svuint8_t); | |
| 16342 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svaesmc_u8))) | |
| 16343 | svuint8_t svaesmc(svuint8_t); | |
| 16344 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_n_u64))) | |
| 16345 | svuint64_t svpmullb_pair(svuint64_t, uint64_t); | |
| 16346 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullb_pair_u64))) | |
| 16347 | svuint64_t svpmullb_pair(svuint64_t, svuint64_t); | |
| 16348 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_n_u64))) | |
| 16349 | svuint64_t svpmullt_pair(svuint64_t, uint64_t); | |
| 16350 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpmullt_pair_u64))) | |
| 16351 | svuint64_t svpmullt_pair(svuint64_t, svuint64_t); | |
| 16352 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_m))) | |
| 16353 | svbfloat16_t svadd_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16354 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_x))) | |
| 16355 | svbfloat16_t svadd_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16356 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_z))) | |
| 16357 | svbfloat16_t svadd_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16358 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_m))) | |
| 16359 | svbfloat16_t svadd_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16360 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_x))) | |
| 16361 | svbfloat16_t svadd_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16362 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_z))) | |
| 16363 | svbfloat16_t svadd_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16364 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svclamp_bf16))) | |
| 16365 | svbfloat16_t svclamp_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16366 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_m))) | |
| 16367 | svbfloat16_t svmax_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16368 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_x))) | |
| 16369 | svbfloat16_t svmax_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16370 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_z))) | |
| 16371 | svbfloat16_t svmax_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16372 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_m))) | |
| 16373 | svbfloat16_t svmax_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16374 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_x))) | |
| 16375 | svbfloat16_t svmax_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16376 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_z))) | |
| 16377 | svbfloat16_t svmax_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16378 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_m))) | |
| 16379 | svbfloat16_t svmaxnm_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16380 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_x))) | |
| 16381 | svbfloat16_t svmaxnm_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16382 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_z))) | |
| 16383 | svbfloat16_t svmaxnm_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16384 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_m))) | |
| 16385 | svbfloat16_t svmaxnm_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16386 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_x))) | |
| 16387 | svbfloat16_t svmaxnm_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16388 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_z))) | |
| 16389 | svbfloat16_t svmaxnm_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16390 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_m))) | |
| 16391 | svbfloat16_t svmin_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16392 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_x))) | |
| 16393 | svbfloat16_t svmin_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16394 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_z))) | |
| 16395 | svbfloat16_t svmin_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16396 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_m))) | |
| 16397 | svbfloat16_t svmin_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16398 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_x))) | |
| 16399 | svbfloat16_t svmin_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16400 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_z))) | |
| 16401 | svbfloat16_t svmin_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16402 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_m))) | |
| 16403 | svbfloat16_t svminnm_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16404 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_x))) | |
| 16405 | svbfloat16_t svminnm_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16406 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_z))) | |
| 16407 | svbfloat16_t svminnm_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16408 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_m))) | |
| 16409 | svbfloat16_t svminnm_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16410 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x))) | |
| 16411 | svbfloat16_t svminnm_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16412 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_z))) | |
| 16413 | svbfloat16_t svminnm_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16414 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_m))) | |
| 16415 | svbfloat16_t svmla_n_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16416 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_x))) | |
| 16417 | svbfloat16_t svmla_n_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16418 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_z))) | |
| 16419 | svbfloat16_t svmla_n_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16420 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_m))) | |
| 16421 | svbfloat16_t svmla_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16422 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_x))) | |
| 16423 | svbfloat16_t svmla_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16424 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_z))) | |
| 16425 | svbfloat16_t svmla_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16426 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_lane_bf16))) | |
| 16427 | svbfloat16_t svmla_lane_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 16428 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_m))) | |
| 16429 | svbfloat16_t svmls_n_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16430 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_x))) | |
| 16431 | svbfloat16_t svmls_n_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16432 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_z))) | |
| 16433 | svbfloat16_t svmls_n_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16434 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_m))) | |
| 16435 | svbfloat16_t svmls_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16436 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_x))) | |
| 16437 | svbfloat16_t svmls_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16438 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_z))) | |
| 16439 | svbfloat16_t svmls_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16440 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_lane_bf16))) | |
| 16441 | svbfloat16_t svmls_lane_bf16(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 16442 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_m))) | |
| 16443 | svbfloat16_t svmul_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16444 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_x))) | |
| 16445 | svbfloat16_t svmul_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16446 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_z))) | |
| 16447 | svbfloat16_t svmul_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16448 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_m))) | |
| 16449 | svbfloat16_t svmul_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16450 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x))) | |
| 16451 | svbfloat16_t svmul_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16452 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_z))) | |
| 16453 | svbfloat16_t svmul_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16454 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_lane_bf16))) | |
| 16455 | svbfloat16_t svmul_lane_bf16(svbfloat16_t, svbfloat16_t, uint64_t); | |
| 16456 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_m))) | |
| 16457 | svbfloat16_t svsub_n_bf16_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16458 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_x))) | |
| 16459 | svbfloat16_t svsub_n_bf16_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16460 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_z))) | |
| 16461 | svbfloat16_t svsub_n_bf16_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16462 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_m))) | |
| 16463 | svbfloat16_t svsub_bf16_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16464 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_x))) | |
| 16465 | svbfloat16_t svsub_bf16_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16466 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_z))) | |
| 16467 | svbfloat16_t svsub_bf16_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16468 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_m))) | |
| 16469 | svbfloat16_t svadd_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16470 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_x))) | |
| 16471 | svbfloat16_t svadd_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16472 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_n_bf16_z))) | |
| 16473 | svbfloat16_t svadd_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16474 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_m))) | |
| 16475 | svbfloat16_t svadd_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16476 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_x))) | |
| 16477 | svbfloat16_t svadd_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16478 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svadd_bf16_z))) | |
| 16479 | svbfloat16_t svadd_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16480 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svclamp_bf16))) | |
| 16481 | svbfloat16_t svclamp(svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16482 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_m))) | |
| 16483 | svbfloat16_t svmax_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16484 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_x))) | |
| 16485 | svbfloat16_t svmax_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16486 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_n_bf16_z))) | |
| 16487 | svbfloat16_t svmax_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16488 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_m))) | |
| 16489 | svbfloat16_t svmax_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16490 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_x))) | |
| 16491 | svbfloat16_t svmax_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16492 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmax_bf16_z))) | |
| 16493 | svbfloat16_t svmax_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16494 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_m))) | |
| 16495 | svbfloat16_t svmaxnm_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16496 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_x))) | |
| 16497 | svbfloat16_t svmaxnm_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16498 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_n_bf16_z))) | |
| 16499 | svbfloat16_t svmaxnm_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16500 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_m))) | |
| 16501 | svbfloat16_t svmaxnm_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16502 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_x))) | |
| 16503 | svbfloat16_t svmaxnm_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16504 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmaxnm_bf16_z))) | |
| 16505 | svbfloat16_t svmaxnm_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16506 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_m))) | |
| 16507 | svbfloat16_t svmin_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16508 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_x))) | |
| 16509 | svbfloat16_t svmin_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16510 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_n_bf16_z))) | |
| 16511 | svbfloat16_t svmin_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16512 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_m))) | |
| 16513 | svbfloat16_t svmin_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16514 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_x))) | |
| 16515 | svbfloat16_t svmin_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16516 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmin_bf16_z))) | |
| 16517 | svbfloat16_t svmin_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16518 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_m))) | |
| 16519 | svbfloat16_t svminnm_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16520 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_x))) | |
| 16521 | svbfloat16_t svminnm_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16522 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_n_bf16_z))) | |
| 16523 | svbfloat16_t svminnm_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16524 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_m))) | |
| 16525 | svbfloat16_t svminnm_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16526 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_x))) | |
| 16527 | svbfloat16_t svminnm_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16528 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svminnm_bf16_z))) | |
| 16529 | svbfloat16_t svminnm_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16530 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_m))) | |
| 16531 | svbfloat16_t svmla_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16532 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_x))) | |
| 16533 | svbfloat16_t svmla_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16534 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_n_bf16_z))) | |
| 16535 | svbfloat16_t svmla_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16536 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_m))) | |
| 16537 | svbfloat16_t svmla_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16538 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_x))) | |
| 16539 | svbfloat16_t svmla_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16540 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_bf16_z))) | |
| 16541 | svbfloat16_t svmla_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16542 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmla_lane_bf16))) | |
| 16543 | svbfloat16_t svmla_lane(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 16544 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_m))) | |
| 16545 | svbfloat16_t svmls_m(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16546 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_x))) | |
| 16547 | svbfloat16_t svmls_x(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16548 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_n_bf16_z))) | |
| 16549 | svbfloat16_t svmls_z(svbool_t, svbfloat16_t, svbfloat16_t, bfloat16_t); | |
| 16550 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_m))) | |
| 16551 | svbfloat16_t svmls_m(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16552 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_x))) | |
| 16553 | svbfloat16_t svmls_x(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16554 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_bf16_z))) | |
| 16555 | svbfloat16_t svmls_z(svbool_t, svbfloat16_t, svbfloat16_t, svbfloat16_t); | |
| 16556 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmls_lane_bf16))) | |
| 16557 | svbfloat16_t svmls_lane(svbfloat16_t, svbfloat16_t, svbfloat16_t, uint64_t); | |
| 16558 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_m))) | |
| 16559 | svbfloat16_t svmul_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16560 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_x))) | |
| 16561 | svbfloat16_t svmul_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16562 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_n_bf16_z))) | |
| 16563 | svbfloat16_t svmul_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16564 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_m))) | |
| 16565 | svbfloat16_t svmul_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16566 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_x))) | |
| 16567 | svbfloat16_t svmul_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16568 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_bf16_z))) | |
| 16569 | svbfloat16_t svmul_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16570 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmul_lane_bf16))) | |
| 16571 | svbfloat16_t svmul_lane(svbfloat16_t, svbfloat16_t, uint64_t); | |
| 16572 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_m))) | |
| 16573 | svbfloat16_t svsub_m(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16574 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_x))) | |
| 16575 | svbfloat16_t svsub_x(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16576 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_n_bf16_z))) | |
| 16577 | svbfloat16_t svsub_z(svbool_t, svbfloat16_t, bfloat16_t); | |
| 16578 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_m))) | |
| 16579 | svbfloat16_t svsub_m(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16580 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_x))) | |
| 16581 | svbfloat16_t svsub_x(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16582 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsub_bf16_z))) | |
| 16583 | svbfloat16_t svsub_z(svbool_t, svbfloat16_t, svbfloat16_t); | |
| 16584 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_m))) | |
| 16585 | svbfloat16_t svscale_n_bf16_m(svbool_t, svbfloat16_t, int16_t); | |
| 16586 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_x))) | |
| 16587 | svbfloat16_t svscale_n_bf16_x(svbool_t, svbfloat16_t, int16_t); | |
| 16588 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_z))) | |
| 16589 | svbfloat16_t svscale_n_bf16_z(svbool_t, svbfloat16_t, int16_t); | |
| 16590 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_m))) | |
| 16591 | svbfloat16_t svscale_bf16_m(svbool_t, svbfloat16_t, svint16_t); | |
| 16592 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x))) | |
| 16593 | svbfloat16_t svscale_bf16_x(svbool_t, svbfloat16_t, svint16_t); | |
| 16594 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_z))) | |
| 16595 | svbfloat16_t svscale_bf16_z(svbool_t, svbfloat16_t, svint16_t); | |
| 16596 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_m))) | |
| 16597 | svbfloat16_t svscale_m(svbool_t, svbfloat16_t, int16_t); | |
| 16598 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_x))) | |
| 16599 | svbfloat16_t svscale_x(svbool_t, svbfloat16_t, int16_t); | |
| 16600 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_n_bf16_z))) | |
| 16601 | svbfloat16_t svscale_z(svbool_t, svbfloat16_t, int16_t); | |
| 16602 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_m))) | |
| 16603 | svbfloat16_t svscale_m(svbool_t, svbfloat16_t, svint16_t); | |
| 16604 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_x))) | |
| 16605 | svbfloat16_t svscale_x(svbool_t, svbfloat16_t, svint16_t); | |
| 16606 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svscale_bf16_z))) | |
| 16607 | svbfloat16_t svscale_z(svbool_t, svbfloat16_t, svint16_t); | |
| 16608 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u8))) | |
| 16609 | svuint8_t svbdep_n_u8(svuint8_t, uint8_t); | |
| 16610 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u32))) | |
| 16611 | svuint32_t svbdep_n_u32(svuint32_t, uint32_t); | |
| 16612 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u64))) | |
| 16613 | svuint64_t svbdep_n_u64(svuint64_t, uint64_t); | |
| 16614 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u16))) | |
| 16615 | svuint16_t svbdep_n_u16(svuint16_t, uint16_t); | |
| 16616 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u8))) | |
| 16617 | svuint8_t svbdep_u8(svuint8_t, svuint8_t); | |
| 16618 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u32))) | |
| 16619 | svuint32_t svbdep_u32(svuint32_t, svuint32_t); | |
| 16620 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u64))) | |
| 16621 | svuint64_t svbdep_u64(svuint64_t, svuint64_t); | |
| 16622 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u16))) | |
| 16623 | svuint16_t svbdep_u16(svuint16_t, svuint16_t); | |
| 16624 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u8))) | |
| 16625 | svuint8_t svbext_n_u8(svuint8_t, uint8_t); | |
| 16626 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u32))) | |
| 16627 | svuint32_t svbext_n_u32(svuint32_t, uint32_t); | |
| 16628 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u64))) | |
| 16629 | svuint64_t svbext_n_u64(svuint64_t, uint64_t); | |
| 16630 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u16))) | |
| 16631 | svuint16_t svbext_n_u16(svuint16_t, uint16_t); | |
| 16632 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u8))) | |
| 16633 | svuint8_t svbext_u8(svuint8_t, svuint8_t); | |
| 16634 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u32))) | |
| 16635 | svuint32_t svbext_u32(svuint32_t, svuint32_t); | |
| 16636 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u64))) | |
| 16637 | svuint64_t svbext_u64(svuint64_t, svuint64_t); | |
| 16638 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u16))) | |
| 16639 | svuint16_t svbext_u16(svuint16_t, svuint16_t); | |
| 16640 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u8))) | |
| 16641 | svuint8_t svbgrp_n_u8(svuint8_t, uint8_t); | |
| 16642 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u32))) | |
| 16643 | svuint32_t svbgrp_n_u32(svuint32_t, uint32_t); | |
| 16644 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u64))) | |
| 16645 | svuint64_t svbgrp_n_u64(svuint64_t, uint64_t); | |
| 16646 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u16))) | |
| 16647 | svuint16_t svbgrp_n_u16(svuint16_t, uint16_t); | |
| 16648 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u8))) | |
| 16649 | svuint8_t svbgrp_u8(svuint8_t, svuint8_t); | |
| 16650 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u32))) | |
| 16651 | svuint32_t svbgrp_u32(svuint32_t, svuint32_t); | |
| 16652 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u64))) | |
| 16653 | svuint64_t svbgrp_u64(svuint64_t, svuint64_t); | |
| 16654 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u16))) | |
| 16655 | svuint16_t svbgrp_u16(svuint16_t, svuint16_t); | |
| 16656 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u8))) | |
| 16657 | svuint8_t svbdep(svuint8_t, uint8_t); | |
| 16658 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u32))) | |
| 16659 | svuint32_t svbdep(svuint32_t, uint32_t); | |
| 16660 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u64))) | |
| 16661 | svuint64_t svbdep(svuint64_t, uint64_t); | |
| 16662 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_n_u16))) | |
| 16663 | svuint16_t svbdep(svuint16_t, uint16_t); | |
| 16664 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u8))) | |
| 16665 | svuint8_t svbdep(svuint8_t, svuint8_t); | |
| 16666 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u32))) | |
| 16667 | svuint32_t svbdep(svuint32_t, svuint32_t); | |
| 16668 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u64))) | |
| 16669 | svuint64_t svbdep(svuint64_t, svuint64_t); | |
| 16670 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbdep_u16))) | |
| 16671 | svuint16_t svbdep(svuint16_t, svuint16_t); | |
| 16672 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u8))) | |
| 16673 | svuint8_t svbext(svuint8_t, uint8_t); | |
| 16674 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u32))) | |
| 16675 | svuint32_t svbext(svuint32_t, uint32_t); | |
| 16676 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u64))) | |
| 16677 | svuint64_t svbext(svuint64_t, uint64_t); | |
| 16678 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_n_u16))) | |
| 16679 | svuint16_t svbext(svuint16_t, uint16_t); | |
| 16680 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u8))) | |
| 16681 | svuint8_t svbext(svuint8_t, svuint8_t); | |
| 16682 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u32))) | |
| 16683 | svuint32_t svbext(svuint32_t, svuint32_t); | |
| 16684 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u64))) | |
| 16685 | svuint64_t svbext(svuint64_t, svuint64_t); | |
| 16686 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbext_u16))) | |
| 16687 | svuint16_t svbext(svuint16_t, svuint16_t); | |
| 16688 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u8))) | |
| 16689 | svuint8_t svbgrp(svuint8_t, uint8_t); | |
| 16690 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u32))) | |
| 16691 | svuint32_t svbgrp(svuint32_t, uint32_t); | |
| 16692 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u64))) | |
| 16693 | svuint64_t svbgrp(svuint64_t, uint64_t); | |
| 16694 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_n_u16))) | |
| 16695 | svuint16_t svbgrp(svuint16_t, uint16_t); | |
| 16696 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u8))) | |
| 16697 | svuint8_t svbgrp(svuint8_t, svuint8_t); | |
| 16698 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u32))) | |
| 16699 | svuint32_t svbgrp(svuint32_t, svuint32_t); | |
| 16700 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u64))) | |
| 16701 | svuint64_t svbgrp(svuint64_t, svuint64_t); | |
| 16702 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svbgrp_u16))) | |
| 16703 | svuint16_t svbgrp(svuint16_t, svuint16_t); | |
| 16704 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32_f16))) | |
| 16705 | svfloat32_t svmmla_f32_f16(svfloat32_t, svfloat16_t, svfloat16_t); | |
| 16706 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32_f16))) | |
| 16707 | svfloat32_t svmmla(svfloat32_t, svfloat16_t, svfloat16_t); | |
| 16708 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_u64))) | |
| 16709 | svuint64_t svrax1_u64(svuint64_t, svuint64_t); | |
| 16710 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_s64))) | |
| 16711 | svint64_t svrax1_s64(svint64_t, svint64_t); | |
| 16712 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_u64))) | |
| 16713 | svuint64_t svrax1(svuint64_t, svuint64_t); | |
| 16714 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svrax1_s64))) | |
| 16715 | svint64_t svrax1(svint64_t, svint64_t); | |
| 16716 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4e_u32))) | |
| 16717 | svuint32_t svsm4e_u32(svuint32_t, svuint32_t); | |
| 16718 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4ekey_u32))) | |
| 16719 | svuint32_t svsm4ekey_u32(svuint32_t, svuint32_t); | |
| 16720 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4e_u32))) | |
| 16721 | svuint32_t svsm4e(svuint32_t, svuint32_t); | |
| 16722 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svsm4ekey_u32))) | |
| 16723 | svuint32_t svsm4ekey(svuint32_t, svuint32_t); | |
| 16724 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u32_z))) | |
| 16725 | svuint32_t svhistcnt_u32_z(svbool_t, svuint32_t, svuint32_t); | |
| 16726 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u64_z))) | |
| 16727 | svuint64_t svhistcnt_u64_z(svbool_t, svuint64_t, svuint64_t); | |
| 16728 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s32_z))) | |
| 16729 | svuint32_t svhistcnt_s32_z(svbool_t, svint32_t, svint32_t); | |
| 16730 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s64_z))) | |
| 16731 | svuint64_t svhistcnt_s64_z(svbool_t, svint64_t, svint64_t); | |
| 16732 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_u8))) | |
| 16733 | svuint8_t svhistseg_u8(svuint8_t, svuint8_t); | |
| 16734 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_s8))) | |
| 16735 | svuint8_t svhistseg_s8(svint8_t, svint8_t); | |
| 16736 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_u32))) | |
| 16737 | svuint32_t svldnt1_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t); | |
| 16738 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_u64))) | |
| 16739 | svuint64_t svldnt1_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 16740 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_f64))) | |
| 16741 | svfloat64_t svldnt1_gather_u64base_index_f64(svbool_t, svuint64_t, int64_t); | |
| 16742 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_f32))) | |
| 16743 | svfloat32_t svldnt1_gather_u32base_index_f32(svbool_t, svuint32_t, int64_t); | |
| 16744 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_s32))) | |
| 16745 | svint32_t svldnt1_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t); | |
| 16746 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_s64))) | |
| 16747 | svint64_t svldnt1_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 16748 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_u32))) | |
| 16749 | svuint32_t svldnt1_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 16750 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_u64))) | |
| 16751 | svuint64_t svldnt1_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 16752 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_f64))) | |
| 16753 | svfloat64_t svldnt1_gather_u64base_offset_f64(svbool_t, svuint64_t, int64_t); | |
| 16754 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_f32))) | |
| 16755 | svfloat32_t svldnt1_gather_u32base_offset_f32(svbool_t, svuint32_t, int64_t); | |
| 16756 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_s32))) | |
| 16757 | svint32_t svldnt1_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 16758 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_s64))) | |
| 16759 | svint64_t svldnt1_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 16760 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_u32))) | |
| 16761 | svuint32_t svldnt1_gather_u32base_u32(svbool_t, svuint32_t); | |
| 16762 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_u64))) | |
| 16763 | svuint64_t svldnt1_gather_u64base_u64(svbool_t, svuint64_t); | |
| 16764 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_f64))) | |
| 16765 | svfloat64_t svldnt1_gather_u64base_f64(svbool_t, svuint64_t); | |
| 16766 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_f32))) | |
| 16767 | svfloat32_t svldnt1_gather_u32base_f32(svbool_t, svuint32_t); | |
| 16768 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_s32))) | |
| 16769 | svint32_t svldnt1_gather_u32base_s32(svbool_t, svuint32_t); | |
| 16770 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_s64))) | |
| 16771 | svint64_t svldnt1_gather_u64base_s64(svbool_t, svuint64_t); | |
| 16772 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_u64))) | |
| 16773 | svuint64_t svldnt1_gather_s64index_u64(svbool_t, uint64_t const *, svint64_t); | |
| 16774 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_f64))) | |
| 16775 | svfloat64_t svldnt1_gather_s64index_f64(svbool_t, float64_t const *, svint64_t); | |
| 16776 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_s64))) | |
| 16777 | svint64_t svldnt1_gather_s64index_s64(svbool_t, int64_t const *, svint64_t); | |
| 16778 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_u64))) | |
| 16779 | svuint64_t svldnt1_gather_u64index_u64(svbool_t, uint64_t const *, svuint64_t); | |
| 16780 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_f64))) | |
| 16781 | svfloat64_t svldnt1_gather_u64index_f64(svbool_t, float64_t const *, svuint64_t); | |
| 16782 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_s64))) | |
| 16783 | svint64_t svldnt1_gather_u64index_s64(svbool_t, int64_t const *, svuint64_t); | |
| 16784 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_u32))) | |
| 16785 | svuint32_t svldnt1_gather_u32offset_u32(svbool_t, uint32_t const *, svuint32_t); | |
| 16786 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_f32))) | |
| 16787 | svfloat32_t svldnt1_gather_u32offset_f32(svbool_t, float32_t const *, svuint32_t); | |
| 16788 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_s32))) | |
| 16789 | svint32_t svldnt1_gather_u32offset_s32(svbool_t, int32_t const *, svuint32_t); | |
| 16790 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_u64))) | |
| 16791 | svuint64_t svldnt1_gather_s64offset_u64(svbool_t, uint64_t const *, svint64_t); | |
| 16792 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_f64))) | |
| 16793 | svfloat64_t svldnt1_gather_s64offset_f64(svbool_t, float64_t const *, svint64_t); | |
| 16794 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_s64))) | |
| 16795 | svint64_t svldnt1_gather_s64offset_s64(svbool_t, int64_t const *, svint64_t); | |
| 16796 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_u64))) | |
| 16797 | svuint64_t svldnt1_gather_u64offset_u64(svbool_t, uint64_t const *, svuint64_t); | |
| 16798 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_f64))) | |
| 16799 | svfloat64_t svldnt1_gather_u64offset_f64(svbool_t, float64_t const *, svuint64_t); | |
| 16800 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_s64))) | |
| 16801 | svint64_t svldnt1_gather_u64offset_s64(svbool_t, int64_t const *, svuint64_t); | |
| 16802 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_u32))) | |
| 16803 | svuint32_t svldnt1sb_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 16804 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_u64))) | |
| 16805 | svuint64_t svldnt1sb_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 16806 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_s32))) | |
| 16807 | svint32_t svldnt1sb_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 16808 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_s64))) | |
| 16809 | svint64_t svldnt1sb_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 16810 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_u32))) | |
| 16811 | svuint32_t svldnt1sb_gather_u32base_u32(svbool_t, svuint32_t); | |
| 16812 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_u64))) | |
| 16813 | svuint64_t svldnt1sb_gather_u64base_u64(svbool_t, svuint64_t); | |
| 16814 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_s32))) | |
| 16815 | svint32_t svldnt1sb_gather_u32base_s32(svbool_t, svuint32_t); | |
| 16816 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_s64))) | |
| 16817 | svint64_t svldnt1sb_gather_u64base_s64(svbool_t, svuint64_t); | |
| 16818 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_u32))) | |
| 16819 | svuint32_t svldnt1sb_gather_u32offset_u32(svbool_t, int8_t const *, svuint32_t); | |
| 16820 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_s32))) | |
| 16821 | svint32_t svldnt1sb_gather_u32offset_s32(svbool_t, int8_t const *, svuint32_t); | |
| 16822 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_u64))) | |
| 16823 | svuint64_t svldnt1sb_gather_s64offset_u64(svbool_t, int8_t const *, svint64_t); | |
| 16824 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_s64))) | |
| 16825 | svint64_t svldnt1sb_gather_s64offset_s64(svbool_t, int8_t const *, svint64_t); | |
| 16826 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_u64))) | |
| 16827 | svuint64_t svldnt1sb_gather_u64offset_u64(svbool_t, int8_t const *, svuint64_t); | |
| 16828 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_s64))) | |
| 16829 | svint64_t svldnt1sb_gather_u64offset_s64(svbool_t, int8_t const *, svuint64_t); | |
| 16830 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_u32))) | |
| 16831 | svuint32_t svldnt1sh_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t); | |
| 16832 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_u64))) | |
| 16833 | svuint64_t svldnt1sh_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 16834 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_s32))) | |
| 16835 | svint32_t svldnt1sh_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t); | |
| 16836 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_s64))) | |
| 16837 | svint64_t svldnt1sh_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 16838 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_u32))) | |
| 16839 | svuint32_t svldnt1sh_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 16840 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_u64))) | |
| 16841 | svuint64_t svldnt1sh_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 16842 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_s32))) | |
| 16843 | svint32_t svldnt1sh_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 16844 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_s64))) | |
| 16845 | svint64_t svldnt1sh_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 16846 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_u32))) | |
| 16847 | svuint32_t svldnt1sh_gather_u32base_u32(svbool_t, svuint32_t); | |
| 16848 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_u64))) | |
| 16849 | svuint64_t svldnt1sh_gather_u64base_u64(svbool_t, svuint64_t); | |
| 16850 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_s32))) | |
| 16851 | svint32_t svldnt1sh_gather_u32base_s32(svbool_t, svuint32_t); | |
| 16852 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_s64))) | |
| 16853 | svint64_t svldnt1sh_gather_u64base_s64(svbool_t, svuint64_t); | |
| 16854 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_u64))) | |
| 16855 | svuint64_t svldnt1sh_gather_s64index_u64(svbool_t, int16_t const *, svint64_t); | |
| 16856 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_s64))) | |
| 16857 | svint64_t svldnt1sh_gather_s64index_s64(svbool_t, int16_t const *, svint64_t); | |
| 16858 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_u64))) | |
| 16859 | svuint64_t svldnt1sh_gather_u64index_u64(svbool_t, int16_t const *, svuint64_t); | |
| 16860 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_s64))) | |
| 16861 | svint64_t svldnt1sh_gather_u64index_s64(svbool_t, int16_t const *, svuint64_t); | |
| 16862 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_u32))) | |
| 16863 | svuint32_t svldnt1sh_gather_u32offset_u32(svbool_t, int16_t const *, svuint32_t); | |
| 16864 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_s32))) | |
| 16865 | svint32_t svldnt1sh_gather_u32offset_s32(svbool_t, int16_t const *, svuint32_t); | |
| 16866 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_u64))) | |
| 16867 | svuint64_t svldnt1sh_gather_s64offset_u64(svbool_t, int16_t const *, svint64_t); | |
| 16868 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_s64))) | |
| 16869 | svint64_t svldnt1sh_gather_s64offset_s64(svbool_t, int16_t const *, svint64_t); | |
| 16870 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_u64))) | |
| 16871 | svuint64_t svldnt1sh_gather_u64offset_u64(svbool_t, int16_t const *, svuint64_t); | |
| 16872 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_s64))) | |
| 16873 | svint64_t svldnt1sh_gather_u64offset_s64(svbool_t, int16_t const *, svuint64_t); | |
| 16874 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_u64))) | |
| 16875 | svuint64_t svldnt1sw_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 16876 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_s64))) | |
| 16877 | svint64_t svldnt1sw_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 16878 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_u64))) | |
| 16879 | svuint64_t svldnt1sw_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 16880 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_s64))) | |
| 16881 | svint64_t svldnt1sw_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 16882 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_u64))) | |
| 16883 | svuint64_t svldnt1sw_gather_u64base_u64(svbool_t, svuint64_t); | |
| 16884 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_s64))) | |
| 16885 | svint64_t svldnt1sw_gather_u64base_s64(svbool_t, svuint64_t); | |
| 16886 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_u64))) | |
| 16887 | svuint64_t svldnt1sw_gather_s64index_u64(svbool_t, int32_t const *, svint64_t); | |
| 16888 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_s64))) | |
| 16889 | svint64_t svldnt1sw_gather_s64index_s64(svbool_t, int32_t const *, svint64_t); | |
| 16890 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_u64))) | |
| 16891 | svuint64_t svldnt1sw_gather_u64index_u64(svbool_t, int32_t const *, svuint64_t); | |
| 16892 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_s64))) | |
| 16893 | svint64_t svldnt1sw_gather_u64index_s64(svbool_t, int32_t const *, svuint64_t); | |
| 16894 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_u64))) | |
| 16895 | svuint64_t svldnt1sw_gather_s64offset_u64(svbool_t, int32_t const *, svint64_t); | |
| 16896 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_s64))) | |
| 16897 | svint64_t svldnt1sw_gather_s64offset_s64(svbool_t, int32_t const *, svint64_t); | |
| 16898 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_u64))) | |
| 16899 | svuint64_t svldnt1sw_gather_u64offset_u64(svbool_t, int32_t const *, svuint64_t); | |
| 16900 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_s64))) | |
| 16901 | svint64_t svldnt1sw_gather_u64offset_s64(svbool_t, int32_t const *, svuint64_t); | |
| 16902 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_u32))) | |
| 16903 | svuint32_t svldnt1ub_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 16904 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_u64))) | |
| 16905 | svuint64_t svldnt1ub_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 16906 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_s32))) | |
| 16907 | svint32_t svldnt1ub_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 16908 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_s64))) | |
| 16909 | svint64_t svldnt1ub_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 16910 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_u32))) | |
| 16911 | svuint32_t svldnt1ub_gather_u32base_u32(svbool_t, svuint32_t); | |
| 16912 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_u64))) | |
| 16913 | svuint64_t svldnt1ub_gather_u64base_u64(svbool_t, svuint64_t); | |
| 16914 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_s32))) | |
| 16915 | svint32_t svldnt1ub_gather_u32base_s32(svbool_t, svuint32_t); | |
| 16916 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_s64))) | |
| 16917 | svint64_t svldnt1ub_gather_u64base_s64(svbool_t, svuint64_t); | |
| 16918 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_u32))) | |
| 16919 | svuint32_t svldnt1ub_gather_u32offset_u32(svbool_t, uint8_t const *, svuint32_t); | |
| 16920 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_s32))) | |
| 16921 | svint32_t svldnt1ub_gather_u32offset_s32(svbool_t, uint8_t const *, svuint32_t); | |
| 16922 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_u64))) | |
| 16923 | svuint64_t svldnt1ub_gather_s64offset_u64(svbool_t, uint8_t const *, svint64_t); | |
| 16924 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_s64))) | |
| 16925 | svint64_t svldnt1ub_gather_s64offset_s64(svbool_t, uint8_t const *, svint64_t); | |
| 16926 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_u64))) | |
| 16927 | svuint64_t svldnt1ub_gather_u64offset_u64(svbool_t, uint8_t const *, svuint64_t); | |
| 16928 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_s64))) | |
| 16929 | svint64_t svldnt1ub_gather_u64offset_s64(svbool_t, uint8_t const *, svuint64_t); | |
| 16930 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_u32))) | |
| 16931 | svuint32_t svldnt1uh_gather_u32base_index_u32(svbool_t, svuint32_t, int64_t); | |
| 16932 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_u64))) | |
| 16933 | svuint64_t svldnt1uh_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 16934 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_s32))) | |
| 16935 | svint32_t svldnt1uh_gather_u32base_index_s32(svbool_t, svuint32_t, int64_t); | |
| 16936 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_s64))) | |
| 16937 | svint64_t svldnt1uh_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 16938 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_u32))) | |
| 16939 | svuint32_t svldnt1uh_gather_u32base_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 16940 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_u64))) | |
| 16941 | svuint64_t svldnt1uh_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 16942 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_s32))) | |
| 16943 | svint32_t svldnt1uh_gather_u32base_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 16944 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_s64))) | |
| 16945 | svint64_t svldnt1uh_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 16946 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_u32))) | |
| 16947 | svuint32_t svldnt1uh_gather_u32base_u32(svbool_t, svuint32_t); | |
| 16948 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_u64))) | |
| 16949 | svuint64_t svldnt1uh_gather_u64base_u64(svbool_t, svuint64_t); | |
| 16950 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_s32))) | |
| 16951 | svint32_t svldnt1uh_gather_u32base_s32(svbool_t, svuint32_t); | |
| 16952 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_s64))) | |
| 16953 | svint64_t svldnt1uh_gather_u64base_s64(svbool_t, svuint64_t); | |
| 16954 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_u64))) | |
| 16955 | svuint64_t svldnt1uh_gather_s64index_u64(svbool_t, uint16_t const *, svint64_t); | |
| 16956 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_s64))) | |
| 16957 | svint64_t svldnt1uh_gather_s64index_s64(svbool_t, uint16_t const *, svint64_t); | |
| 16958 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_u64))) | |
| 16959 | svuint64_t svldnt1uh_gather_u64index_u64(svbool_t, uint16_t const *, svuint64_t); | |
| 16960 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_s64))) | |
| 16961 | svint64_t svldnt1uh_gather_u64index_s64(svbool_t, uint16_t const *, svuint64_t); | |
| 16962 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_u32))) | |
| 16963 | svuint32_t svldnt1uh_gather_u32offset_u32(svbool_t, uint16_t const *, svuint32_t); | |
| 16964 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_s32))) | |
| 16965 | svint32_t svldnt1uh_gather_u32offset_s32(svbool_t, uint16_t const *, svuint32_t); | |
| 16966 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_u64))) | |
| 16967 | svuint64_t svldnt1uh_gather_s64offset_u64(svbool_t, uint16_t const *, svint64_t); | |
| 16968 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_s64))) | |
| 16969 | svint64_t svldnt1uh_gather_s64offset_s64(svbool_t, uint16_t const *, svint64_t); | |
| 16970 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_u64))) | |
| 16971 | svuint64_t svldnt1uh_gather_u64offset_u64(svbool_t, uint16_t const *, svuint64_t); | |
| 16972 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_s64))) | |
| 16973 | svint64_t svldnt1uh_gather_u64offset_s64(svbool_t, uint16_t const *, svuint64_t); | |
| 16974 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_u64))) | |
| 16975 | svuint64_t svldnt1uw_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 16976 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_s64))) | |
| 16977 | svint64_t svldnt1uw_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 16978 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_u64))) | |
| 16979 | svuint64_t svldnt1uw_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 16980 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_s64))) | |
| 16981 | svint64_t svldnt1uw_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 16982 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_u64))) | |
| 16983 | svuint64_t svldnt1uw_gather_u64base_u64(svbool_t, svuint64_t); | |
| 16984 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_s64))) | |
| 16985 | svint64_t svldnt1uw_gather_u64base_s64(svbool_t, svuint64_t); | |
| 16986 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_u64))) | |
| 16987 | svuint64_t svldnt1uw_gather_s64index_u64(svbool_t, uint32_t const *, svint64_t); | |
| 16988 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_s64))) | |
| 16989 | svint64_t svldnt1uw_gather_s64index_s64(svbool_t, uint32_t const *, svint64_t); | |
| 16990 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_u64))) | |
| 16991 | svuint64_t svldnt1uw_gather_u64index_u64(svbool_t, uint32_t const *, svuint64_t); | |
| 16992 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_s64))) | |
| 16993 | svint64_t svldnt1uw_gather_u64index_s64(svbool_t, uint32_t const *, svuint64_t); | |
| 16994 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_u64))) | |
| 16995 | svuint64_t svldnt1uw_gather_s64offset_u64(svbool_t, uint32_t const *, svint64_t); | |
| 16996 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_s64))) | |
| 16997 | svint64_t svldnt1uw_gather_s64offset_s64(svbool_t, uint32_t const *, svint64_t); | |
| 16998 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_u64))) | |
| 16999 | svuint64_t svldnt1uw_gather_u64offset_u64(svbool_t, uint32_t const *, svuint64_t); | |
| 17000 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_s64))) | |
| 17001 | svint64_t svldnt1uw_gather_u64offset_s64(svbool_t, uint32_t const *, svuint64_t); | |
| 17002 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u8))) | |
| 17003 | svbool_t svmatch_u8(svbool_t, svuint8_t, svuint8_t); | |
| 17004 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u16))) | |
| 17005 | svbool_t svmatch_u16(svbool_t, svuint16_t, svuint16_t); | |
| 17006 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s8))) | |
| 17007 | svbool_t svmatch_s8(svbool_t, svint8_t, svint8_t); | |
| 17008 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s16))) | |
| 17009 | svbool_t svmatch_s16(svbool_t, svint16_t, svint16_t); | |
| 17010 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u8))) | |
| 17011 | svbool_t svnmatch_u8(svbool_t, svuint8_t, svuint8_t); | |
| 17012 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u16))) | |
| 17013 | svbool_t svnmatch_u16(svbool_t, svuint16_t, svuint16_t); | |
| 17014 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s8))) | |
| 17015 | svbool_t svnmatch_s8(svbool_t, svint8_t, svint8_t); | |
| 17016 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s16))) | |
| 17017 | svbool_t svnmatch_s16(svbool_t, svint16_t, svint16_t); | |
| 17018 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_u32))) | |
| 17019 | void svstnt1_scatter_u32base_index_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17020 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_u64))) | |
| 17021 | void svstnt1_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17022 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_f64))) | |
| 17023 | void svstnt1_scatter_u64base_index_f64(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 17024 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_f32))) | |
| 17025 | void svstnt1_scatter_u32base_index_f32(svbool_t, svuint32_t, int64_t, svfloat32_t); | |
| 17026 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_s32))) | |
| 17027 | void svstnt1_scatter_u32base_index_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17028 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_s64))) | |
| 17029 | void svstnt1_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17030 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_u32))) | |
| 17031 | void svstnt1_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17032 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_u64))) | |
| 17033 | void svstnt1_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17034 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_f64))) | |
| 17035 | void svstnt1_scatter_u64base_offset_f64(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 17036 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_f32))) | |
| 17037 | void svstnt1_scatter_u32base_offset_f32(svbool_t, svuint32_t, int64_t, svfloat32_t); | |
| 17038 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_s32))) | |
| 17039 | void svstnt1_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17040 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_s64))) | |
| 17041 | void svstnt1_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17042 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_u32))) | |
| 17043 | void svstnt1_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t); | |
| 17044 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_u64))) | |
| 17045 | void svstnt1_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 17046 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_f64))) | |
| 17047 | void svstnt1_scatter_u64base_f64(svbool_t, svuint64_t, svfloat64_t); | |
| 17048 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_f32))) | |
| 17049 | void svstnt1_scatter_u32base_f32(svbool_t, svuint32_t, svfloat32_t); | |
| 17050 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_s32))) | |
| 17051 | void svstnt1_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t); | |
| 17052 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_s64))) | |
| 17053 | void svstnt1_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 17054 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_u64))) | |
| 17055 | void svstnt1_scatter_s64index_u64(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 17056 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_f64))) | |
| 17057 | void svstnt1_scatter_s64index_f64(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 17058 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_s64))) | |
| 17059 | void svstnt1_scatter_s64index_s64(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 17060 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_u64))) | |
| 17061 | void svstnt1_scatter_u64index_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 17062 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_f64))) | |
| 17063 | void svstnt1_scatter_u64index_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 17064 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_s64))) | |
| 17065 | void svstnt1_scatter_u64index_s64(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 17066 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_u32))) | |
| 17067 | void svstnt1_scatter_u32offset_u32(svbool_t, uint32_t *, svuint32_t, svuint32_t); | |
| 17068 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_f32))) | |
| 17069 | void svstnt1_scatter_u32offset_f32(svbool_t, float32_t *, svuint32_t, svfloat32_t); | |
| 17070 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_s32))) | |
| 17071 | void svstnt1_scatter_u32offset_s32(svbool_t, int32_t *, svuint32_t, svint32_t); | |
| 17072 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_u64))) | |
| 17073 | void svstnt1_scatter_s64offset_u64(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 17074 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_f64))) | |
| 17075 | void svstnt1_scatter_s64offset_f64(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 17076 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_s64))) | |
| 17077 | void svstnt1_scatter_s64offset_s64(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 17078 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_u64))) | |
| 17079 | void svstnt1_scatter_u64offset_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 17080 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_f64))) | |
| 17081 | void svstnt1_scatter_u64offset_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 17082 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_s64))) | |
| 17083 | void svstnt1_scatter_u64offset_s64(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 17084 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_u32))) | |
| 17085 | void svstnt1b_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17086 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_u64))) | |
| 17087 | void svstnt1b_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17088 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_s32))) | |
| 17089 | void svstnt1b_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17090 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_s64))) | |
| 17091 | void svstnt1b_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17092 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_u32))) | |
| 17093 | void svstnt1b_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t); | |
| 17094 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_u64))) | |
| 17095 | void svstnt1b_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 17096 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_s32))) | |
| 17097 | void svstnt1b_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t); | |
| 17098 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_s64))) | |
| 17099 | void svstnt1b_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 17100 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_s32))) | |
| 17101 | void svstnt1b_scatter_u32offset_s32(svbool_t, int8_t *, svuint32_t, svint32_t); | |
| 17102 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_u32))) | |
| 17103 | void svstnt1b_scatter_u32offset_u32(svbool_t, uint8_t *, svuint32_t, svuint32_t); | |
| 17104 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_s64))) | |
| 17105 | void svstnt1b_scatter_s64offset_s64(svbool_t, int8_t *, svint64_t, svint64_t); | |
| 17106 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_u64))) | |
| 17107 | void svstnt1b_scatter_s64offset_u64(svbool_t, uint8_t *, svint64_t, svuint64_t); | |
| 17108 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_s64))) | |
| 17109 | void svstnt1b_scatter_u64offset_s64(svbool_t, int8_t *, svuint64_t, svint64_t); | |
| 17110 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_u64))) | |
| 17111 | void svstnt1b_scatter_u64offset_u64(svbool_t, uint8_t *, svuint64_t, svuint64_t); | |
| 17112 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_u32))) | |
| 17113 | void svstnt1h_scatter_u32base_index_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17114 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_u64))) | |
| 17115 | void svstnt1h_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17116 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_s32))) | |
| 17117 | void svstnt1h_scatter_u32base_index_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17118 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_s64))) | |
| 17119 | void svstnt1h_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17120 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_u32))) | |
| 17121 | void svstnt1h_scatter_u32base_offset_u32(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17122 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_u64))) | |
| 17123 | void svstnt1h_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17124 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_s32))) | |
| 17125 | void svstnt1h_scatter_u32base_offset_s32(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17126 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_s64))) | |
| 17127 | void svstnt1h_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17128 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_u32))) | |
| 17129 | void svstnt1h_scatter_u32base_u32(svbool_t, svuint32_t, svuint32_t); | |
| 17130 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_u64))) | |
| 17131 | void svstnt1h_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 17132 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_s32))) | |
| 17133 | void svstnt1h_scatter_u32base_s32(svbool_t, svuint32_t, svint32_t); | |
| 17134 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_s64))) | |
| 17135 | void svstnt1h_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 17136 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_s64))) | |
| 17137 | void svstnt1h_scatter_s64index_s64(svbool_t, int16_t *, svint64_t, svint64_t); | |
| 17138 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_u64))) | |
| 17139 | void svstnt1h_scatter_s64index_u64(svbool_t, uint16_t *, svint64_t, svuint64_t); | |
| 17140 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_s64))) | |
| 17141 | void svstnt1h_scatter_u64index_s64(svbool_t, int16_t *, svuint64_t, svint64_t); | |
| 17142 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_u64))) | |
| 17143 | void svstnt1h_scatter_u64index_u64(svbool_t, uint16_t *, svuint64_t, svuint64_t); | |
| 17144 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_s32))) | |
| 17145 | void svstnt1h_scatter_u32offset_s32(svbool_t, int16_t *, svuint32_t, svint32_t); | |
| 17146 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_u32))) | |
| 17147 | void svstnt1h_scatter_u32offset_u32(svbool_t, uint16_t *, svuint32_t, svuint32_t); | |
| 17148 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_s64))) | |
| 17149 | void svstnt1h_scatter_s64offset_s64(svbool_t, int16_t *, svint64_t, svint64_t); | |
| 17150 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_u64))) | |
| 17151 | void svstnt1h_scatter_s64offset_u64(svbool_t, uint16_t *, svint64_t, svuint64_t); | |
| 17152 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_s64))) | |
| 17153 | void svstnt1h_scatter_u64offset_s64(svbool_t, int16_t *, svuint64_t, svint64_t); | |
| 17154 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_u64))) | |
| 17155 | void svstnt1h_scatter_u64offset_u64(svbool_t, uint16_t *, svuint64_t, svuint64_t); | |
| 17156 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_u64))) | |
| 17157 | void svstnt1w_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17158 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_s64))) | |
| 17159 | void svstnt1w_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17160 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_u64))) | |
| 17161 | void svstnt1w_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17162 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_s64))) | |
| 17163 | void svstnt1w_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17164 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_u64))) | |
| 17165 | void svstnt1w_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 17166 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_s64))) | |
| 17167 | void svstnt1w_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 17168 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_s64))) | |
| 17169 | void svstnt1w_scatter_s64index_s64(svbool_t, int32_t *, svint64_t, svint64_t); | |
| 17170 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_u64))) | |
| 17171 | void svstnt1w_scatter_s64index_u64(svbool_t, uint32_t *, svint64_t, svuint64_t); | |
| 17172 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_s64))) | |
| 17173 | void svstnt1w_scatter_u64index_s64(svbool_t, int32_t *, svuint64_t, svint64_t); | |
| 17174 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_u64))) | |
| 17175 | void svstnt1w_scatter_u64index_u64(svbool_t, uint32_t *, svuint64_t, svuint64_t); | |
| 17176 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_s64))) | |
| 17177 | void svstnt1w_scatter_s64offset_s64(svbool_t, int32_t *, svint64_t, svint64_t); | |
| 17178 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_u64))) | |
| 17179 | void svstnt1w_scatter_s64offset_u64(svbool_t, uint32_t *, svint64_t, svuint64_t); | |
| 17180 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_s64))) | |
| 17181 | void svstnt1w_scatter_u64offset_s64(svbool_t, int32_t *, svuint64_t, svint64_t); | |
| 17182 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_u64))) | |
| 17183 | void svstnt1w_scatter_u64offset_u64(svbool_t, uint32_t *, svuint64_t, svuint64_t); | |
| 17184 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u32_z))) | |
| 17185 | svuint32_t svhistcnt_z(svbool_t, svuint32_t, svuint32_t); | |
| 17186 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_u64_z))) | |
| 17187 | svuint64_t svhistcnt_z(svbool_t, svuint64_t, svuint64_t); | |
| 17188 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s32_z))) | |
| 17189 | svuint32_t svhistcnt_z(svbool_t, svint32_t, svint32_t); | |
| 17190 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistcnt_s64_z))) | |
| 17191 | svuint64_t svhistcnt_z(svbool_t, svint64_t, svint64_t); | |
| 17192 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_u8))) | |
| 17193 | svuint8_t svhistseg(svuint8_t, svuint8_t); | |
| 17194 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svhistseg_s8))) | |
| 17195 | svuint8_t svhistseg(svint8_t, svint8_t); | |
| 17196 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_u32))) | |
| 17197 | svuint32_t svldnt1_gather_index_u32(svbool_t, svuint32_t, int64_t); | |
| 17198 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_u64))) | |
| 17199 | svuint64_t svldnt1_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 17200 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_f64))) | |
| 17201 | svfloat64_t svldnt1_gather_index_f64(svbool_t, svuint64_t, int64_t); | |
| 17202 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_f32))) | |
| 17203 | svfloat32_t svldnt1_gather_index_f32(svbool_t, svuint32_t, int64_t); | |
| 17204 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_index_s32))) | |
| 17205 | svint32_t svldnt1_gather_index_s32(svbool_t, svuint32_t, int64_t); | |
| 17206 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_index_s64))) | |
| 17207 | svint64_t svldnt1_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 17208 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_u32))) | |
| 17209 | svuint32_t svldnt1_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 17210 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_u64))) | |
| 17211 | svuint64_t svldnt1_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 17212 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_f64))) | |
| 17213 | svfloat64_t svldnt1_gather_offset_f64(svbool_t, svuint64_t, int64_t); | |
| 17214 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_f32))) | |
| 17215 | svfloat32_t svldnt1_gather_offset_f32(svbool_t, svuint32_t, int64_t); | |
| 17216 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_offset_s32))) | |
| 17217 | svint32_t svldnt1_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 17218 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_offset_s64))) | |
| 17219 | svint64_t svldnt1_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 17220 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_u32))) | |
| 17221 | svuint32_t svldnt1_gather_u32(svbool_t, svuint32_t); | |
| 17222 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_u64))) | |
| 17223 | svuint64_t svldnt1_gather_u64(svbool_t, svuint64_t); | |
| 17224 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_f64))) | |
| 17225 | svfloat64_t svldnt1_gather_f64(svbool_t, svuint64_t); | |
| 17226 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_f32))) | |
| 17227 | svfloat32_t svldnt1_gather_f32(svbool_t, svuint32_t); | |
| 17228 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32base_s32))) | |
| 17229 | svint32_t svldnt1_gather_s32(svbool_t, svuint32_t); | |
| 17230 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64base_s64))) | |
| 17231 | svint64_t svldnt1_gather_s64(svbool_t, svuint64_t); | |
| 17232 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_u64))) | |
| 17233 | svuint64_t svldnt1_gather_index(svbool_t, uint64_t const *, svint64_t); | |
| 17234 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_f64))) | |
| 17235 | svfloat64_t svldnt1_gather_index(svbool_t, float64_t const *, svint64_t); | |
| 17236 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64index_s64))) | |
| 17237 | svint64_t svldnt1_gather_index(svbool_t, int64_t const *, svint64_t); | |
| 17238 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_u64))) | |
| 17239 | svuint64_t svldnt1_gather_index(svbool_t, uint64_t const *, svuint64_t); | |
| 17240 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_f64))) | |
| 17241 | svfloat64_t svldnt1_gather_index(svbool_t, float64_t const *, svuint64_t); | |
| 17242 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64index_s64))) | |
| 17243 | svint64_t svldnt1_gather_index(svbool_t, int64_t const *, svuint64_t); | |
| 17244 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_u32))) | |
| 17245 | svuint32_t svldnt1_gather_offset(svbool_t, uint32_t const *, svuint32_t); | |
| 17246 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_f32))) | |
| 17247 | svfloat32_t svldnt1_gather_offset(svbool_t, float32_t const *, svuint32_t); | |
| 17248 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u32offset_s32))) | |
| 17249 | svint32_t svldnt1_gather_offset(svbool_t, int32_t const *, svuint32_t); | |
| 17250 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_u64))) | |
| 17251 | svuint64_t svldnt1_gather_offset(svbool_t, uint64_t const *, svint64_t); | |
| 17252 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_f64))) | |
| 17253 | svfloat64_t svldnt1_gather_offset(svbool_t, float64_t const *, svint64_t); | |
| 17254 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_s64offset_s64))) | |
| 17255 | svint64_t svldnt1_gather_offset(svbool_t, int64_t const *, svint64_t); | |
| 17256 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_u64))) | |
| 17257 | svuint64_t svldnt1_gather_offset(svbool_t, uint64_t const *, svuint64_t); | |
| 17258 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_f64))) | |
| 17259 | svfloat64_t svldnt1_gather_offset(svbool_t, float64_t const *, svuint64_t); | |
| 17260 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_gather_u64offset_s64))) | |
| 17261 | svint64_t svldnt1_gather_offset(svbool_t, int64_t const *, svuint64_t); | |
| 17262 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_u32))) | |
| 17263 | svuint32_t svldnt1sb_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 17264 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_u64))) | |
| 17265 | svuint64_t svldnt1sb_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 17266 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_offset_s32))) | |
| 17267 | svint32_t svldnt1sb_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 17268 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_offset_s64))) | |
| 17269 | svint64_t svldnt1sb_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 17270 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_u32))) | |
| 17271 | svuint32_t svldnt1sb_gather_u32(svbool_t, svuint32_t); | |
| 17272 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_u64))) | |
| 17273 | svuint64_t svldnt1sb_gather_u64(svbool_t, svuint64_t); | |
| 17274 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32base_s32))) | |
| 17275 | svint32_t svldnt1sb_gather_s32(svbool_t, svuint32_t); | |
| 17276 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64base_s64))) | |
| 17277 | svint64_t svldnt1sb_gather_s64(svbool_t, svuint64_t); | |
| 17278 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_u32))) | |
| 17279 | svuint32_t svldnt1sb_gather_offset_u32(svbool_t, int8_t const *, svuint32_t); | |
| 17280 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u32offset_s32))) | |
| 17281 | svint32_t svldnt1sb_gather_offset_s32(svbool_t, int8_t const *, svuint32_t); | |
| 17282 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_u64))) | |
| 17283 | svuint64_t svldnt1sb_gather_offset_u64(svbool_t, int8_t const *, svint64_t); | |
| 17284 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_s64offset_s64))) | |
| 17285 | svint64_t svldnt1sb_gather_offset_s64(svbool_t, int8_t const *, svint64_t); | |
| 17286 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_u64))) | |
| 17287 | svuint64_t svldnt1sb_gather_offset_u64(svbool_t, int8_t const *, svuint64_t); | |
| 17288 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sb_gather_u64offset_s64))) | |
| 17289 | svint64_t svldnt1sb_gather_offset_s64(svbool_t, int8_t const *, svuint64_t); | |
| 17290 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_u32))) | |
| 17291 | svuint32_t svldnt1sh_gather_index_u32(svbool_t, svuint32_t, int64_t); | |
| 17292 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_u64))) | |
| 17293 | svuint64_t svldnt1sh_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 17294 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_index_s32))) | |
| 17295 | svint32_t svldnt1sh_gather_index_s32(svbool_t, svuint32_t, int64_t); | |
| 17296 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_index_s64))) | |
| 17297 | svint64_t svldnt1sh_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 17298 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_u32))) | |
| 17299 | svuint32_t svldnt1sh_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 17300 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_u64))) | |
| 17301 | svuint64_t svldnt1sh_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 17302 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_offset_s32))) | |
| 17303 | svint32_t svldnt1sh_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 17304 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_offset_s64))) | |
| 17305 | svint64_t svldnt1sh_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 17306 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_u32))) | |
| 17307 | svuint32_t svldnt1sh_gather_u32(svbool_t, svuint32_t); | |
| 17308 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_u64))) | |
| 17309 | svuint64_t svldnt1sh_gather_u64(svbool_t, svuint64_t); | |
| 17310 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32base_s32))) | |
| 17311 | svint32_t svldnt1sh_gather_s32(svbool_t, svuint32_t); | |
| 17312 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64base_s64))) | |
| 17313 | svint64_t svldnt1sh_gather_s64(svbool_t, svuint64_t); | |
| 17314 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_u64))) | |
| 17315 | svuint64_t svldnt1sh_gather_index_u64(svbool_t, int16_t const *, svint64_t); | |
| 17316 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64index_s64))) | |
| 17317 | svint64_t svldnt1sh_gather_index_s64(svbool_t, int16_t const *, svint64_t); | |
| 17318 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_u64))) | |
| 17319 | svuint64_t svldnt1sh_gather_index_u64(svbool_t, int16_t const *, svuint64_t); | |
| 17320 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64index_s64))) | |
| 17321 | svint64_t svldnt1sh_gather_index_s64(svbool_t, int16_t const *, svuint64_t); | |
| 17322 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_u32))) | |
| 17323 | svuint32_t svldnt1sh_gather_offset_u32(svbool_t, int16_t const *, svuint32_t); | |
| 17324 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u32offset_s32))) | |
| 17325 | svint32_t svldnt1sh_gather_offset_s32(svbool_t, int16_t const *, svuint32_t); | |
| 17326 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_u64))) | |
| 17327 | svuint64_t svldnt1sh_gather_offset_u64(svbool_t, int16_t const *, svint64_t); | |
| 17328 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_s64offset_s64))) | |
| 17329 | svint64_t svldnt1sh_gather_offset_s64(svbool_t, int16_t const *, svint64_t); | |
| 17330 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_u64))) | |
| 17331 | svuint64_t svldnt1sh_gather_offset_u64(svbool_t, int16_t const *, svuint64_t); | |
| 17332 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sh_gather_u64offset_s64))) | |
| 17333 | svint64_t svldnt1sh_gather_offset_s64(svbool_t, int16_t const *, svuint64_t); | |
| 17334 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_u64))) | |
| 17335 | svuint64_t svldnt1sw_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 17336 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_index_s64))) | |
| 17337 | svint64_t svldnt1sw_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 17338 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_u64))) | |
| 17339 | svuint64_t svldnt1sw_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 17340 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_offset_s64))) | |
| 17341 | svint64_t svldnt1sw_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 17342 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_u64))) | |
| 17343 | svuint64_t svldnt1sw_gather_u64(svbool_t, svuint64_t); | |
| 17344 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64base_s64))) | |
| 17345 | svint64_t svldnt1sw_gather_s64(svbool_t, svuint64_t); | |
| 17346 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_u64))) | |
| 17347 | svuint64_t svldnt1sw_gather_index_u64(svbool_t, int32_t const *, svint64_t); | |
| 17348 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64index_s64))) | |
| 17349 | svint64_t svldnt1sw_gather_index_s64(svbool_t, int32_t const *, svint64_t); | |
| 17350 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_u64))) | |
| 17351 | svuint64_t svldnt1sw_gather_index_u64(svbool_t, int32_t const *, svuint64_t); | |
| 17352 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64index_s64))) | |
| 17353 | svint64_t svldnt1sw_gather_index_s64(svbool_t, int32_t const *, svuint64_t); | |
| 17354 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_u64))) | |
| 17355 | svuint64_t svldnt1sw_gather_offset_u64(svbool_t, int32_t const *, svint64_t); | |
| 17356 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_s64offset_s64))) | |
| 17357 | svint64_t svldnt1sw_gather_offset_s64(svbool_t, int32_t const *, svint64_t); | |
| 17358 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_u64))) | |
| 17359 | svuint64_t svldnt1sw_gather_offset_u64(svbool_t, int32_t const *, svuint64_t); | |
| 17360 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1sw_gather_u64offset_s64))) | |
| 17361 | svint64_t svldnt1sw_gather_offset_s64(svbool_t, int32_t const *, svuint64_t); | |
| 17362 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_u32))) | |
| 17363 | svuint32_t svldnt1ub_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 17364 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_u64))) | |
| 17365 | svuint64_t svldnt1ub_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 17366 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_offset_s32))) | |
| 17367 | svint32_t svldnt1ub_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 17368 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_offset_s64))) | |
| 17369 | svint64_t svldnt1ub_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 17370 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_u32))) | |
| 17371 | svuint32_t svldnt1ub_gather_u32(svbool_t, svuint32_t); | |
| 17372 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_u64))) | |
| 17373 | svuint64_t svldnt1ub_gather_u64(svbool_t, svuint64_t); | |
| 17374 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32base_s32))) | |
| 17375 | svint32_t svldnt1ub_gather_s32(svbool_t, svuint32_t); | |
| 17376 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64base_s64))) | |
| 17377 | svint64_t svldnt1ub_gather_s64(svbool_t, svuint64_t); | |
| 17378 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_u32))) | |
| 17379 | svuint32_t svldnt1ub_gather_offset_u32(svbool_t, uint8_t const *, svuint32_t); | |
| 17380 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u32offset_s32))) | |
| 17381 | svint32_t svldnt1ub_gather_offset_s32(svbool_t, uint8_t const *, svuint32_t); | |
| 17382 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_u64))) | |
| 17383 | svuint64_t svldnt1ub_gather_offset_u64(svbool_t, uint8_t const *, svint64_t); | |
| 17384 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_s64offset_s64))) | |
| 17385 | svint64_t svldnt1ub_gather_offset_s64(svbool_t, uint8_t const *, svint64_t); | |
| 17386 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_u64))) | |
| 17387 | svuint64_t svldnt1ub_gather_offset_u64(svbool_t, uint8_t const *, svuint64_t); | |
| 17388 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1ub_gather_u64offset_s64))) | |
| 17389 | svint64_t svldnt1ub_gather_offset_s64(svbool_t, uint8_t const *, svuint64_t); | |
| 17390 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_u32))) | |
| 17391 | svuint32_t svldnt1uh_gather_index_u32(svbool_t, svuint32_t, int64_t); | |
| 17392 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_u64))) | |
| 17393 | svuint64_t svldnt1uh_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 17394 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_index_s32))) | |
| 17395 | svint32_t svldnt1uh_gather_index_s32(svbool_t, svuint32_t, int64_t); | |
| 17396 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_index_s64))) | |
| 17397 | svint64_t svldnt1uh_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 17398 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_u32))) | |
| 17399 | svuint32_t svldnt1uh_gather_offset_u32(svbool_t, svuint32_t, int64_t); | |
| 17400 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_u64))) | |
| 17401 | svuint64_t svldnt1uh_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 17402 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_offset_s32))) | |
| 17403 | svint32_t svldnt1uh_gather_offset_s32(svbool_t, svuint32_t, int64_t); | |
| 17404 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_offset_s64))) | |
| 17405 | svint64_t svldnt1uh_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 17406 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_u32))) | |
| 17407 | svuint32_t svldnt1uh_gather_u32(svbool_t, svuint32_t); | |
| 17408 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_u64))) | |
| 17409 | svuint64_t svldnt1uh_gather_u64(svbool_t, svuint64_t); | |
| 17410 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32base_s32))) | |
| 17411 | svint32_t svldnt1uh_gather_s32(svbool_t, svuint32_t); | |
| 17412 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64base_s64))) | |
| 17413 | svint64_t svldnt1uh_gather_s64(svbool_t, svuint64_t); | |
| 17414 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_u64))) | |
| 17415 | svuint64_t svldnt1uh_gather_index_u64(svbool_t, uint16_t const *, svint64_t); | |
| 17416 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64index_s64))) | |
| 17417 | svint64_t svldnt1uh_gather_index_s64(svbool_t, uint16_t const *, svint64_t); | |
| 17418 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_u64))) | |
| 17419 | svuint64_t svldnt1uh_gather_index_u64(svbool_t, uint16_t const *, svuint64_t); | |
| 17420 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64index_s64))) | |
| 17421 | svint64_t svldnt1uh_gather_index_s64(svbool_t, uint16_t const *, svuint64_t); | |
| 17422 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_u32))) | |
| 17423 | svuint32_t svldnt1uh_gather_offset_u32(svbool_t, uint16_t const *, svuint32_t); | |
| 17424 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u32offset_s32))) | |
| 17425 | svint32_t svldnt1uh_gather_offset_s32(svbool_t, uint16_t const *, svuint32_t); | |
| 17426 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_u64))) | |
| 17427 | svuint64_t svldnt1uh_gather_offset_u64(svbool_t, uint16_t const *, svint64_t); | |
| 17428 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_s64offset_s64))) | |
| 17429 | svint64_t svldnt1uh_gather_offset_s64(svbool_t, uint16_t const *, svint64_t); | |
| 17430 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_u64))) | |
| 17431 | svuint64_t svldnt1uh_gather_offset_u64(svbool_t, uint16_t const *, svuint64_t); | |
| 17432 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uh_gather_u64offset_s64))) | |
| 17433 | svint64_t svldnt1uh_gather_offset_s64(svbool_t, uint16_t const *, svuint64_t); | |
| 17434 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_u64))) | |
| 17435 | svuint64_t svldnt1uw_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 17436 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_index_s64))) | |
| 17437 | svint64_t svldnt1uw_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 17438 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_u64))) | |
| 17439 | svuint64_t svldnt1uw_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 17440 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_offset_s64))) | |
| 17441 | svint64_t svldnt1uw_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 17442 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_u64))) | |
| 17443 | svuint64_t svldnt1uw_gather_u64(svbool_t, svuint64_t); | |
| 17444 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64base_s64))) | |
| 17445 | svint64_t svldnt1uw_gather_s64(svbool_t, svuint64_t); | |
| 17446 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_u64))) | |
| 17447 | svuint64_t svldnt1uw_gather_index_u64(svbool_t, uint32_t const *, svint64_t); | |
| 17448 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64index_s64))) | |
| 17449 | svint64_t svldnt1uw_gather_index_s64(svbool_t, uint32_t const *, svint64_t); | |
| 17450 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_u64))) | |
| 17451 | svuint64_t svldnt1uw_gather_index_u64(svbool_t, uint32_t const *, svuint64_t); | |
| 17452 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64index_s64))) | |
| 17453 | svint64_t svldnt1uw_gather_index_s64(svbool_t, uint32_t const *, svuint64_t); | |
| 17454 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_u64))) | |
| 17455 | svuint64_t svldnt1uw_gather_offset_u64(svbool_t, uint32_t const *, svint64_t); | |
| 17456 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_s64offset_s64))) | |
| 17457 | svint64_t svldnt1uw_gather_offset_s64(svbool_t, uint32_t const *, svint64_t); | |
| 17458 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_u64))) | |
| 17459 | svuint64_t svldnt1uw_gather_offset_u64(svbool_t, uint32_t const *, svuint64_t); | |
| 17460 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1uw_gather_u64offset_s64))) | |
| 17461 | svint64_t svldnt1uw_gather_offset_s64(svbool_t, uint32_t const *, svuint64_t); | |
| 17462 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u8))) | |
| 17463 | svbool_t svmatch(svbool_t, svuint8_t, svuint8_t); | |
| 17464 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_u16))) | |
| 17465 | svbool_t svmatch(svbool_t, svuint16_t, svuint16_t); | |
| 17466 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s8))) | |
| 17467 | svbool_t svmatch(svbool_t, svint8_t, svint8_t); | |
| 17468 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmatch_s16))) | |
| 17469 | svbool_t svmatch(svbool_t, svint16_t, svint16_t); | |
| 17470 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u8))) | |
| 17471 | svbool_t svnmatch(svbool_t, svuint8_t, svuint8_t); | |
| 17472 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_u16))) | |
| 17473 | svbool_t svnmatch(svbool_t, svuint16_t, svuint16_t); | |
| 17474 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s8))) | |
| 17475 | svbool_t svnmatch(svbool_t, svint8_t, svint8_t); | |
| 17476 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svnmatch_s16))) | |
| 17477 | svbool_t svnmatch(svbool_t, svint16_t, svint16_t); | |
| 17478 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_u32))) | |
| 17479 | void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17480 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_u64))) | |
| 17481 | void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17482 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_f64))) | |
| 17483 | void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 17484 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_f32))) | |
| 17485 | void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svfloat32_t); | |
| 17486 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_index_s32))) | |
| 17487 | void svstnt1_scatter_index(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17488 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_index_s64))) | |
| 17489 | void svstnt1_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17490 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_u32))) | |
| 17491 | void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17492 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_u64))) | |
| 17493 | void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17494 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_f64))) | |
| 17495 | void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 17496 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_f32))) | |
| 17497 | void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svfloat32_t); | |
| 17498 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_offset_s32))) | |
| 17499 | void svstnt1_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17500 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_offset_s64))) | |
| 17501 | void svstnt1_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17502 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_u32))) | |
| 17503 | void svstnt1_scatter(svbool_t, svuint32_t, svuint32_t); | |
| 17504 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_u64))) | |
| 17505 | void svstnt1_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 17506 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_f64))) | |
| 17507 | void svstnt1_scatter(svbool_t, svuint64_t, svfloat64_t); | |
| 17508 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_f32))) | |
| 17509 | void svstnt1_scatter(svbool_t, svuint32_t, svfloat32_t); | |
| 17510 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32base_s32))) | |
| 17511 | void svstnt1_scatter(svbool_t, svuint32_t, svint32_t); | |
| 17512 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64base_s64))) | |
| 17513 | void svstnt1_scatter(svbool_t, svuint64_t, svint64_t); | |
| 17514 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_u64))) | |
| 17515 | void svstnt1_scatter_index(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 17516 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_f64))) | |
| 17517 | void svstnt1_scatter_index(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 17518 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64index_s64))) | |
| 17519 | void svstnt1_scatter_index(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 17520 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_u64))) | |
| 17521 | void svstnt1_scatter_index(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 17522 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_f64))) | |
| 17523 | void svstnt1_scatter_index(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 17524 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64index_s64))) | |
| 17525 | void svstnt1_scatter_index(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 17526 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_u32))) | |
| 17527 | void svstnt1_scatter_offset(svbool_t, uint32_t *, svuint32_t, svuint32_t); | |
| 17528 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_f32))) | |
| 17529 | void svstnt1_scatter_offset(svbool_t, float32_t *, svuint32_t, svfloat32_t); | |
| 17530 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u32offset_s32))) | |
| 17531 | void svstnt1_scatter_offset(svbool_t, int32_t *, svuint32_t, svint32_t); | |
| 17532 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_u64))) | |
| 17533 | void svstnt1_scatter_offset(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 17534 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_f64))) | |
| 17535 | void svstnt1_scatter_offset(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 17536 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_s64offset_s64))) | |
| 17537 | void svstnt1_scatter_offset(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 17538 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_u64))) | |
| 17539 | void svstnt1_scatter_offset(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 17540 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_f64))) | |
| 17541 | void svstnt1_scatter_offset(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 17542 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_scatter_u64offset_s64))) | |
| 17543 | void svstnt1_scatter_offset(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 17544 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_u32))) | |
| 17545 | void svstnt1b_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17546 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_u64))) | |
| 17547 | void svstnt1b_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17548 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_offset_s32))) | |
| 17549 | void svstnt1b_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17550 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_offset_s64))) | |
| 17551 | void svstnt1b_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17552 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_u32))) | |
| 17553 | void svstnt1b_scatter(svbool_t, svuint32_t, svuint32_t); | |
| 17554 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_u64))) | |
| 17555 | void svstnt1b_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 17556 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32base_s32))) | |
| 17557 | void svstnt1b_scatter(svbool_t, svuint32_t, svint32_t); | |
| 17558 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64base_s64))) | |
| 17559 | void svstnt1b_scatter(svbool_t, svuint64_t, svint64_t); | |
| 17560 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_s32))) | |
| 17561 | void svstnt1b_scatter_offset(svbool_t, int8_t *, svuint32_t, svint32_t); | |
| 17562 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u32offset_u32))) | |
| 17563 | void svstnt1b_scatter_offset(svbool_t, uint8_t *, svuint32_t, svuint32_t); | |
| 17564 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_s64))) | |
| 17565 | void svstnt1b_scatter_offset(svbool_t, int8_t *, svint64_t, svint64_t); | |
| 17566 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_s64offset_u64))) | |
| 17567 | void svstnt1b_scatter_offset(svbool_t, uint8_t *, svint64_t, svuint64_t); | |
| 17568 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_s64))) | |
| 17569 | void svstnt1b_scatter_offset(svbool_t, int8_t *, svuint64_t, svint64_t); | |
| 17570 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1b_scatter_u64offset_u64))) | |
| 17571 | void svstnt1b_scatter_offset(svbool_t, uint8_t *, svuint64_t, svuint64_t); | |
| 17572 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_u32))) | |
| 17573 | void svstnt1h_scatter_index(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17574 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_u64))) | |
| 17575 | void svstnt1h_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17576 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_index_s32))) | |
| 17577 | void svstnt1h_scatter_index(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17578 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_index_s64))) | |
| 17579 | void svstnt1h_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17580 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_u32))) | |
| 17581 | void svstnt1h_scatter_offset(svbool_t, svuint32_t, int64_t, svuint32_t); | |
| 17582 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_u64))) | |
| 17583 | void svstnt1h_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17584 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_offset_s32))) | |
| 17585 | void svstnt1h_scatter_offset(svbool_t, svuint32_t, int64_t, svint32_t); | |
| 17586 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_offset_s64))) | |
| 17587 | void svstnt1h_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17588 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_u32))) | |
| 17589 | void svstnt1h_scatter(svbool_t, svuint32_t, svuint32_t); | |
| 17590 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_u64))) | |
| 17591 | void svstnt1h_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 17592 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32base_s32))) | |
| 17593 | void svstnt1h_scatter(svbool_t, svuint32_t, svint32_t); | |
| 17594 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64base_s64))) | |
| 17595 | void svstnt1h_scatter(svbool_t, svuint64_t, svint64_t); | |
| 17596 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_s64))) | |
| 17597 | void svstnt1h_scatter_index(svbool_t, int16_t *, svint64_t, svint64_t); | |
| 17598 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64index_u64))) | |
| 17599 | void svstnt1h_scatter_index(svbool_t, uint16_t *, svint64_t, svuint64_t); | |
| 17600 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_s64))) | |
| 17601 | void svstnt1h_scatter_index(svbool_t, int16_t *, svuint64_t, svint64_t); | |
| 17602 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64index_u64))) | |
| 17603 | void svstnt1h_scatter_index(svbool_t, uint16_t *, svuint64_t, svuint64_t); | |
| 17604 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_s32))) | |
| 17605 | void svstnt1h_scatter_offset(svbool_t, int16_t *, svuint32_t, svint32_t); | |
| 17606 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u32offset_u32))) | |
| 17607 | void svstnt1h_scatter_offset(svbool_t, uint16_t *, svuint32_t, svuint32_t); | |
| 17608 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_s64))) | |
| 17609 | void svstnt1h_scatter_offset(svbool_t, int16_t *, svint64_t, svint64_t); | |
| 17610 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_s64offset_u64))) | |
| 17611 | void svstnt1h_scatter_offset(svbool_t, uint16_t *, svint64_t, svuint64_t); | |
| 17612 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_s64))) | |
| 17613 | void svstnt1h_scatter_offset(svbool_t, int16_t *, svuint64_t, svint64_t); | |
| 17614 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1h_scatter_u64offset_u64))) | |
| 17615 | void svstnt1h_scatter_offset(svbool_t, uint16_t *, svuint64_t, svuint64_t); | |
| 17616 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_u64))) | |
| 17617 | void svstnt1w_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17618 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_index_s64))) | |
| 17619 | void svstnt1w_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17620 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_u64))) | |
| 17621 | void svstnt1w_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17622 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_offset_s64))) | |
| 17623 | void svstnt1w_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17624 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_u64))) | |
| 17625 | void svstnt1w_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 17626 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64base_s64))) | |
| 17627 | void svstnt1w_scatter(svbool_t, svuint64_t, svint64_t); | |
| 17628 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_s64))) | |
| 17629 | void svstnt1w_scatter_index(svbool_t, int32_t *, svint64_t, svint64_t); | |
| 17630 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64index_u64))) | |
| 17631 | void svstnt1w_scatter_index(svbool_t, uint32_t *, svint64_t, svuint64_t); | |
| 17632 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_s64))) | |
| 17633 | void svstnt1w_scatter_index(svbool_t, int32_t *, svuint64_t, svint64_t); | |
| 17634 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64index_u64))) | |
| 17635 | void svstnt1w_scatter_index(svbool_t, uint32_t *, svuint64_t, svuint64_t); | |
| 17636 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_s64))) | |
| 17637 | void svstnt1w_scatter_offset(svbool_t, int32_t *, svint64_t, svint64_t); | |
| 17638 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_s64offset_u64))) | |
| 17639 | void svstnt1w_scatter_offset(svbool_t, uint32_t *, svint64_t, svuint64_t); | |
| 17640 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_s64))) | |
| 17641 | void svstnt1w_scatter_offset(svbool_t, int32_t *, svuint64_t, svint64_t); | |
| 17642 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1w_scatter_u64offset_u64))) | |
| 17643 | void svstnt1w_scatter_offset(svbool_t, uint32_t *, svuint64_t, svuint64_t); | |
| 17644 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f16_mf8_fpm))) | |
| 17645 | svfloat16_t svmmla_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17646 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f16_mf8_fpm))) | |
| 17647 | svfloat16_t svmmla_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17648 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32_mf8_fpm))) | |
| 17649 | svfloat32_t svmmla_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17650 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmmla_f32_mf8_fpm))) | |
| 17651 | svfloat32_t svmmla_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17652 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f16_mf8_fpm))) | |
| 17653 | svfloat16_t svdot_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17654 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f16_mf8_fpm))) | |
| 17655 | svfloat16_t svdot_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17656 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f16_mf8_fpm))) | |
| 17657 | svfloat16_t svdot_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17658 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f16_mf8_fpm))) | |
| 17659 | svfloat16_t svdot_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17660 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f16_mf8_fpm))) | |
| 17661 | svfloat16_t svdot_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17662 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f16_mf8_fpm))) | |
| 17663 | svfloat16_t svdot_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17664 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f32_mf8_fpm))) | |
| 17665 | svfloat32_t svdot_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17666 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f32_mf8_fpm))) | |
| 17667 | svfloat32_t svdot_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17668 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f32_mf8_fpm))) | |
| 17669 | svfloat32_t svdot_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17670 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_f32_mf8_fpm))) | |
| 17671 | svfloat32_t svdot_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17672 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_n_f32_mf8_fpm))) | |
| 17673 | svfloat32_t svdot_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17674 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svdot_lane_f32_mf8_fpm))) | |
| 17675 | svfloat32_t svdot_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17676 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_f16_mf8_fpm))) | |
| 17677 | svfloat16_t svmlalb_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17678 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_n_f16_mf8_fpm))) | |
| 17679 | svfloat16_t svmlalb_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17680 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_lane_f16_mf8_fpm))) | |
| 17681 | svfloat16_t svmlalb_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17682 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_f32_mf8_fpm))) | |
| 17683 | svfloat32_t svmlallbb_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17684 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_n_f32_mf8_fpm))) | |
| 17685 | svfloat32_t svmlallbb_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17686 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_lane_f32_mf8_fpm))) | |
| 17687 | svfloat32_t svmlallbb_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17688 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_f32_mf8_fpm))) | |
| 17689 | svfloat32_t svmlallbt_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17690 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_n_f32_mf8_fpm))) | |
| 17691 | svfloat32_t svmlallbt_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17692 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_lane_f32_mf8_fpm))) | |
| 17693 | svfloat32_t svmlallbt_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17694 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_f32_mf8_fpm))) | |
| 17695 | svfloat32_t svmlalltb_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17696 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_n_f32_mf8_fpm))) | |
| 17697 | svfloat32_t svmlalltb_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17698 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_lane_f32_mf8_fpm))) | |
| 17699 | svfloat32_t svmlalltb_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17700 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_f32_mf8_fpm))) | |
| 17701 | svfloat32_t svmlalltt_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17702 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_n_f32_mf8_fpm))) | |
| 17703 | svfloat32_t svmlalltt_n_f32_mf8_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17704 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_lane_f32_mf8_fpm))) | |
| 17705 | svfloat32_t svmlalltt_lane_f32_mf8_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17706 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_f16_mf8_fpm))) | |
| 17707 | svfloat16_t svmlalt_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17708 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_n_f16_mf8_fpm))) | |
| 17709 | svfloat16_t svmlalt_n_f16_mf8_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17710 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_lane_f16_mf8_fpm))) | |
| 17711 | svfloat16_t svmlalt_lane_f16_mf8_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17712 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_f16_mf8_fpm))) | |
| 17713 | svfloat16_t svmlalb_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17714 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_n_f16_mf8_fpm))) | |
| 17715 | svfloat16_t svmlalb_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17716 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalb_lane_f16_mf8_fpm))) | |
| 17717 | svfloat16_t svmlalb_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17718 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_f32_mf8_fpm))) | |
| 17719 | svfloat32_t svmlallbb_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17720 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_n_f32_mf8_fpm))) | |
| 17721 | svfloat32_t svmlallbb_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17722 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbb_lane_f32_mf8_fpm))) | |
| 17723 | svfloat32_t svmlallbb_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17724 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_f32_mf8_fpm))) | |
| 17725 | svfloat32_t svmlallbt_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17726 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_n_f32_mf8_fpm))) | |
| 17727 | svfloat32_t svmlallbt_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17728 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlallbt_lane_f32_mf8_fpm))) | |
| 17729 | svfloat32_t svmlallbt_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17730 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_f32_mf8_fpm))) | |
| 17731 | svfloat32_t svmlalltb_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17732 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_n_f32_mf8_fpm))) | |
| 17733 | svfloat32_t svmlalltb_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17734 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltb_lane_f32_mf8_fpm))) | |
| 17735 | svfloat32_t svmlalltb_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17736 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_f32_mf8_fpm))) | |
| 17737 | svfloat32_t svmlalltt_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17738 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_n_f32_mf8_fpm))) | |
| 17739 | svfloat32_t svmlalltt_fpm(svfloat32_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17740 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalltt_lane_f32_mf8_fpm))) | |
| 17741 | svfloat32_t svmlalltt_lane_fpm(svfloat32_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17742 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_f16_mf8_fpm))) | |
| 17743 | svfloat16_t svmlalt_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, fpm_t); | |
| 17744 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_n_f16_mf8_fpm))) | |
| 17745 | svfloat16_t svmlalt_fpm(svfloat16_t, svmfloat8_t, mfloat8_t, fpm_t); | |
| 17746 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svmlalt_lane_f16_mf8_fpm))) | |
| 17747 | svfloat16_t svmlalt_lane_fpm(svfloat16_t, svmfloat8_t, svmfloat8_t, uint64_t, fpm_t); | |
| 17748 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u32))) | |
| 17749 | svuint32_t svld1q_gather_u64base_index_u32(svbool_t, svuint64_t, int64_t); | |
| 17750 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u64))) | |
| 17751 | svuint64_t svld1q_gather_u64base_index_u64(svbool_t, svuint64_t, int64_t); | |
| 17752 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u16))) | |
| 17753 | svuint16_t svld1q_gather_u64base_index_u16(svbool_t, svuint64_t, int64_t); | |
| 17754 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_bf16))) | |
| 17755 | svbfloat16_t svld1q_gather_u64base_index_bf16(svbool_t, svuint64_t, int64_t); | |
| 17756 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f64))) | |
| 17757 | svfloat64_t svld1q_gather_u64base_index_f64(svbool_t, svuint64_t, int64_t); | |
| 17758 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f32))) | |
| 17759 | svfloat32_t svld1q_gather_u64base_index_f32(svbool_t, svuint64_t, int64_t); | |
| 17760 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f16))) | |
| 17761 | svfloat16_t svld1q_gather_u64base_index_f16(svbool_t, svuint64_t, int64_t); | |
| 17762 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s32))) | |
| 17763 | svint32_t svld1q_gather_u64base_index_s32(svbool_t, svuint64_t, int64_t); | |
| 17764 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s64))) | |
| 17765 | svint64_t svld1q_gather_u64base_index_s64(svbool_t, svuint64_t, int64_t); | |
| 17766 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s16))) | |
| 17767 | svint16_t svld1q_gather_u64base_index_s16(svbool_t, svuint64_t, int64_t); | |
| 17768 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u8))) | |
| 17769 | svuint8_t svld1q_gather_u64base_offset_u8(svbool_t, svuint64_t, int64_t); | |
| 17770 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u32))) | |
| 17771 | svuint32_t svld1q_gather_u64base_offset_u32(svbool_t, svuint64_t, int64_t); | |
| 17772 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u64))) | |
| 17773 | svuint64_t svld1q_gather_u64base_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 17774 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u16))) | |
| 17775 | svuint16_t svld1q_gather_u64base_offset_u16(svbool_t, svuint64_t, int64_t); | |
| 17776 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_bf16))) | |
| 17777 | svbfloat16_t svld1q_gather_u64base_offset_bf16(svbool_t, svuint64_t, int64_t); | |
| 17778 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s8))) | |
| 17779 | svint8_t svld1q_gather_u64base_offset_s8(svbool_t, svuint64_t, int64_t); | |
| 17780 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f64))) | |
| 17781 | svfloat64_t svld1q_gather_u64base_offset_f64(svbool_t, svuint64_t, int64_t); | |
| 17782 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f32))) | |
| 17783 | svfloat32_t svld1q_gather_u64base_offset_f32(svbool_t, svuint64_t, int64_t); | |
| 17784 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f16))) | |
| 17785 | svfloat16_t svld1q_gather_u64base_offset_f16(svbool_t, svuint64_t, int64_t); | |
| 17786 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s32))) | |
| 17787 | svint32_t svld1q_gather_u64base_offset_s32(svbool_t, svuint64_t, int64_t); | |
| 17788 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s64))) | |
| 17789 | svint64_t svld1q_gather_u64base_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 17790 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_mf8))) | |
| 17791 | svmfloat8_t svld1q_gather_u64base_offset_mf8(svbool_t, svuint64_t, int64_t); | |
| 17792 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s16))) | |
| 17793 | svint16_t svld1q_gather_u64base_offset_s16(svbool_t, svuint64_t, int64_t); | |
| 17794 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u8))) | |
| 17795 | svuint8_t svld1q_gather_u64base_u8(svbool_t, svuint64_t); | |
| 17796 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u32))) | |
| 17797 | svuint32_t svld1q_gather_u64base_u32(svbool_t, svuint64_t); | |
| 17798 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u64))) | |
| 17799 | svuint64_t svld1q_gather_u64base_u64(svbool_t, svuint64_t); | |
| 17800 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u16))) | |
| 17801 | svuint16_t svld1q_gather_u64base_u16(svbool_t, svuint64_t); | |
| 17802 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_bf16))) | |
| 17803 | svbfloat16_t svld1q_gather_u64base_bf16(svbool_t, svuint64_t); | |
| 17804 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s8))) | |
| 17805 | svint8_t svld1q_gather_u64base_s8(svbool_t, svuint64_t); | |
| 17806 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f64))) | |
| 17807 | svfloat64_t svld1q_gather_u64base_f64(svbool_t, svuint64_t); | |
| 17808 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f32))) | |
| 17809 | svfloat32_t svld1q_gather_u64base_f32(svbool_t, svuint64_t); | |
| 17810 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f16))) | |
| 17811 | svfloat16_t svld1q_gather_u64base_f16(svbool_t, svuint64_t); | |
| 17812 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s32))) | |
| 17813 | svint32_t svld1q_gather_u64base_s32(svbool_t, svuint64_t); | |
| 17814 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s64))) | |
| 17815 | svint64_t svld1q_gather_u64base_s64(svbool_t, svuint64_t); | |
| 17816 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_mf8))) | |
| 17817 | svmfloat8_t svld1q_gather_u64base_mf8(svbool_t, svuint64_t); | |
| 17818 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s16))) | |
| 17819 | svint16_t svld1q_gather_u64base_s16(svbool_t, svuint64_t); | |
| 17820 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u32))) | |
| 17821 | svuint32_t svld1q_gather_u64index_u32(svbool_t, uint32_t const *, svuint64_t); | |
| 17822 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u64))) | |
| 17823 | svuint64_t svld1q_gather_u64index_u64(svbool_t, uint64_t const *, svuint64_t); | |
| 17824 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u16))) | |
| 17825 | svuint16_t svld1q_gather_u64index_u16(svbool_t, uint16_t const *, svuint64_t); | |
| 17826 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_bf16))) | |
| 17827 | svbfloat16_t svld1q_gather_u64index_bf16(svbool_t, bfloat16_t const *, svuint64_t); | |
| 17828 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f64))) | |
| 17829 | svfloat64_t svld1q_gather_u64index_f64(svbool_t, float64_t const *, svuint64_t); | |
| 17830 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f32))) | |
| 17831 | svfloat32_t svld1q_gather_u64index_f32(svbool_t, float32_t const *, svuint64_t); | |
| 17832 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f16))) | |
| 17833 | svfloat16_t svld1q_gather_u64index_f16(svbool_t, float16_t const *, svuint64_t); | |
| 17834 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s32))) | |
| 17835 | svint32_t svld1q_gather_u64index_s32(svbool_t, int32_t const *, svuint64_t); | |
| 17836 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s64))) | |
| 17837 | svint64_t svld1q_gather_u64index_s64(svbool_t, int64_t const *, svuint64_t); | |
| 17838 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s16))) | |
| 17839 | svint16_t svld1q_gather_u64index_s16(svbool_t, int16_t const *, svuint64_t); | |
| 17840 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u8))) | |
| 17841 | svuint8_t svld1q_gather_u64offset_u8(svbool_t, uint8_t const *, svuint64_t); | |
| 17842 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u32))) | |
| 17843 | svuint32_t svld1q_gather_u64offset_u32(svbool_t, uint32_t const *, svuint64_t); | |
| 17844 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u64))) | |
| 17845 | svuint64_t svld1q_gather_u64offset_u64(svbool_t, uint64_t const *, svuint64_t); | |
| 17846 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u16))) | |
| 17847 | svuint16_t svld1q_gather_u64offset_u16(svbool_t, uint16_t const *, svuint64_t); | |
| 17848 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_bf16))) | |
| 17849 | svbfloat16_t svld1q_gather_u64offset_bf16(svbool_t, bfloat16_t const *, svuint64_t); | |
| 17850 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s8))) | |
| 17851 | svint8_t svld1q_gather_u64offset_s8(svbool_t, int8_t const *, svuint64_t); | |
| 17852 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f64))) | |
| 17853 | svfloat64_t svld1q_gather_u64offset_f64(svbool_t, float64_t const *, svuint64_t); | |
| 17854 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f32))) | |
| 17855 | svfloat32_t svld1q_gather_u64offset_f32(svbool_t, float32_t const *, svuint64_t); | |
| 17856 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f16))) | |
| 17857 | svfloat16_t svld1q_gather_u64offset_f16(svbool_t, float16_t const *, svuint64_t); | |
| 17858 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s32))) | |
| 17859 | svint32_t svld1q_gather_u64offset_s32(svbool_t, int32_t const *, svuint64_t); | |
| 17860 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s64))) | |
| 17861 | svint64_t svld1q_gather_u64offset_s64(svbool_t, int64_t const *, svuint64_t); | |
| 17862 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_mf8))) | |
| 17863 | svmfloat8_t svld1q_gather_u64offset_mf8(svbool_t, mfloat8_t const *, svuint64_t); | |
| 17864 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s16))) | |
| 17865 | svint16_t svld1q_gather_u64offset_s16(svbool_t, int16_t const *, svuint64_t); | |
| 17866 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_u64))) | |
| 17867 | svuint64_t svld1udq_u64(svbool_t, uint64_t const *); | |
| 17868 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_f64))) | |
| 17869 | svfloat64_t svld1udq_f64(svbool_t, float64_t const *); | |
| 17870 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_s64))) | |
| 17871 | svint64_t svld1udq_s64(svbool_t, int64_t const *); | |
| 17872 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_u64))) | |
| 17873 | svuint64_t svld1udq_vnum_u64(svbool_t, uint64_t const *, int64_t); | |
| 17874 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_f64))) | |
| 17875 | svfloat64_t svld1udq_vnum_f64(svbool_t, float64_t const *, int64_t); | |
| 17876 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_s64))) | |
| 17877 | svint64_t svld1udq_vnum_s64(svbool_t, int64_t const *, int64_t); | |
| 17878 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_u32))) | |
| 17879 | svuint32_t svld1uwq_u32(svbool_t, uint32_t const *); | |
| 17880 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_f32))) | |
| 17881 | svfloat32_t svld1uwq_f32(svbool_t, float32_t const *); | |
| 17882 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_s32))) | |
| 17883 | svint32_t svld1uwq_s32(svbool_t, int32_t const *); | |
| 17884 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_u32))) | |
| 17885 | svuint32_t svld1uwq_vnum_u32(svbool_t, uint32_t const *, int64_t); | |
| 17886 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_f32))) | |
| 17887 | svfloat32_t svld1uwq_vnum_f32(svbool_t, float32_t const *, int64_t); | |
| 17888 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_s32))) | |
| 17889 | svint32_t svld1uwq_vnum_s32(svbool_t, int32_t const *, int64_t); | |
| 17890 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_u64))) | |
| 17891 | void svst1dq_u64(svbool_t, uint64_t *, svuint64_t); | |
| 17892 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_f64))) | |
| 17893 | void svst1dq_f64(svbool_t, float64_t *, svfloat64_t); | |
| 17894 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_s64))) | |
| 17895 | void svst1dq_s64(svbool_t, int64_t *, svint64_t); | |
| 17896 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_u64))) | |
| 17897 | void svst1dq_vnum_u64(svbool_t, uint64_t *, int64_t, svuint64_t); | |
| 17898 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_f64))) | |
| 17899 | void svst1dq_vnum_f64(svbool_t, float64_t *, int64_t, svfloat64_t); | |
| 17900 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_s64))) | |
| 17901 | void svst1dq_vnum_s64(svbool_t, int64_t *, int64_t, svint64_t); | |
| 17902 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u8))) | |
| 17903 | void svst1q_scatter_u64base_u8(svbool_t, svuint64_t, svuint8_t); | |
| 17904 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u32))) | |
| 17905 | void svst1q_scatter_u64base_u32(svbool_t, svuint64_t, svuint32_t); | |
| 17906 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u64))) | |
| 17907 | void svst1q_scatter_u64base_u64(svbool_t, svuint64_t, svuint64_t); | |
| 17908 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u16))) | |
| 17909 | void svst1q_scatter_u64base_u16(svbool_t, svuint64_t, svuint16_t); | |
| 17910 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_bf16))) | |
| 17911 | void svst1q_scatter_u64base_bf16(svbool_t, svuint64_t, svbfloat16_t); | |
| 17912 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s8))) | |
| 17913 | void svst1q_scatter_u64base_s8(svbool_t, svuint64_t, svint8_t); | |
| 17914 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f64))) | |
| 17915 | void svst1q_scatter_u64base_f64(svbool_t, svuint64_t, svfloat64_t); | |
| 17916 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f32))) | |
| 17917 | void svst1q_scatter_u64base_f32(svbool_t, svuint64_t, svfloat32_t); | |
| 17918 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f16))) | |
| 17919 | void svst1q_scatter_u64base_f16(svbool_t, svuint64_t, svfloat16_t); | |
| 17920 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s32))) | |
| 17921 | void svst1q_scatter_u64base_s32(svbool_t, svuint64_t, svint32_t); | |
| 17922 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s64))) | |
| 17923 | void svst1q_scatter_u64base_s64(svbool_t, svuint64_t, svint64_t); | |
| 17924 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_mf8))) | |
| 17925 | void svst1q_scatter_u64base_mf8(svbool_t, svuint64_t, svmfloat8_t); | |
| 17926 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s16))) | |
| 17927 | void svst1q_scatter_u64base_s16(svbool_t, svuint64_t, svint16_t); | |
| 17928 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u32))) | |
| 17929 | void svst1q_scatter_u64base_index_u32(svbool_t, svuint64_t, int64_t, svuint32_t); | |
| 17930 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u64))) | |
| 17931 | void svst1q_scatter_u64base_index_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17932 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u16))) | |
| 17933 | void svst1q_scatter_u64base_index_u16(svbool_t, svuint64_t, int64_t, svuint16_t); | |
| 17934 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_bf16))) | |
| 17935 | void svst1q_scatter_u64base_index_bf16(svbool_t, svuint64_t, int64_t, svbfloat16_t); | |
| 17936 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f64))) | |
| 17937 | void svst1q_scatter_u64base_index_f64(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 17938 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f32))) | |
| 17939 | void svst1q_scatter_u64base_index_f32(svbool_t, svuint64_t, int64_t, svfloat32_t); | |
| 17940 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f16))) | |
| 17941 | void svst1q_scatter_u64base_index_f16(svbool_t, svuint64_t, int64_t, svfloat16_t); | |
| 17942 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s32))) | |
| 17943 | void svst1q_scatter_u64base_index_s32(svbool_t, svuint64_t, int64_t, svint32_t); | |
| 17944 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s64))) | |
| 17945 | void svst1q_scatter_u64base_index_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17946 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s16))) | |
| 17947 | void svst1q_scatter_u64base_index_s16(svbool_t, svuint64_t, int64_t, svint16_t); | |
| 17948 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u8))) | |
| 17949 | void svst1q_scatter_u64base_offset_u8(svbool_t, svuint64_t, int64_t, svuint8_t); | |
| 17950 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u32))) | |
| 17951 | void svst1q_scatter_u64base_offset_u32(svbool_t, svuint64_t, int64_t, svuint32_t); | |
| 17952 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u64))) | |
| 17953 | void svst1q_scatter_u64base_offset_u64(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 17954 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u16))) | |
| 17955 | void svst1q_scatter_u64base_offset_u16(svbool_t, svuint64_t, int64_t, svuint16_t); | |
| 17956 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_bf16))) | |
| 17957 | void svst1q_scatter_u64base_offset_bf16(svbool_t, svuint64_t, int64_t, svbfloat16_t); | |
| 17958 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s8))) | |
| 17959 | void svst1q_scatter_u64base_offset_s8(svbool_t, svuint64_t, int64_t, svint8_t); | |
| 17960 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f64))) | |
| 17961 | void svst1q_scatter_u64base_offset_f64(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 17962 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f32))) | |
| 17963 | void svst1q_scatter_u64base_offset_f32(svbool_t, svuint64_t, int64_t, svfloat32_t); | |
| 17964 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f16))) | |
| 17965 | void svst1q_scatter_u64base_offset_f16(svbool_t, svuint64_t, int64_t, svfloat16_t); | |
| 17966 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s32))) | |
| 17967 | void svst1q_scatter_u64base_offset_s32(svbool_t, svuint64_t, int64_t, svint32_t); | |
| 17968 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s64))) | |
| 17969 | void svst1q_scatter_u64base_offset_s64(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 17970 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_mf8))) | |
| 17971 | void svst1q_scatter_u64base_offset_mf8(svbool_t, svuint64_t, int64_t, svmfloat8_t); | |
| 17972 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s16))) | |
| 17973 | void svst1q_scatter_u64base_offset_s16(svbool_t, svuint64_t, int64_t, svint16_t); | |
| 17974 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u32))) | |
| 17975 | void svst1q_scatter_s64index_u32(svbool_t, uint32_t *, svint64_t, svuint32_t); | |
| 17976 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u64))) | |
| 17977 | void svst1q_scatter_s64index_u64(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 17978 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u16))) | |
| 17979 | void svst1q_scatter_s64index_u16(svbool_t, uint16_t *, svint64_t, svuint16_t); | |
| 17980 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_bf16))) | |
| 17981 | void svst1q_scatter_s64index_bf16(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t); | |
| 17982 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f64))) | |
| 17983 | void svst1q_scatter_s64index_f64(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 17984 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f32))) | |
| 17985 | void svst1q_scatter_s64index_f32(svbool_t, float32_t *, svint64_t, svfloat32_t); | |
| 17986 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f16))) | |
| 17987 | void svst1q_scatter_s64index_f16(svbool_t, float16_t *, svint64_t, svfloat16_t); | |
| 17988 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s32))) | |
| 17989 | void svst1q_scatter_s64index_s32(svbool_t, int32_t *, svint64_t, svint32_t); | |
| 17990 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s64))) | |
| 17991 | void svst1q_scatter_s64index_s64(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 17992 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s16))) | |
| 17993 | void svst1q_scatter_s64index_s16(svbool_t, int16_t *, svint64_t, svint16_t); | |
| 17994 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u32))) | |
| 17995 | void svst1q_scatter_u64index_u32(svbool_t, uint32_t *, svuint64_t, svuint32_t); | |
| 17996 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u64))) | |
| 17997 | void svst1q_scatter_u64index_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 17998 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u16))) | |
| 17999 | void svst1q_scatter_u64index_u16(svbool_t, uint16_t *, svuint64_t, svuint16_t); | |
| 18000 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_bf16))) | |
| 18001 | void svst1q_scatter_u64index_bf16(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t); | |
| 18002 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f64))) | |
| 18003 | void svst1q_scatter_u64index_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 18004 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f32))) | |
| 18005 | void svst1q_scatter_u64index_f32(svbool_t, float32_t *, svuint64_t, svfloat32_t); | |
| 18006 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f16))) | |
| 18007 | void svst1q_scatter_u64index_f16(svbool_t, float16_t *, svuint64_t, svfloat16_t); | |
| 18008 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s32))) | |
| 18009 | void svst1q_scatter_u64index_s32(svbool_t, int32_t *, svuint64_t, svint32_t); | |
| 18010 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s64))) | |
| 18011 | void svst1q_scatter_u64index_s64(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 18012 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s16))) | |
| 18013 | void svst1q_scatter_u64index_s16(svbool_t, int16_t *, svuint64_t, svint16_t); | |
| 18014 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u8))) | |
| 18015 | void svst1q_scatter_s64offset_u8(svbool_t, uint8_t *, svint64_t, svuint8_t); | |
| 18016 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u32))) | |
| 18017 | void svst1q_scatter_s64offset_u32(svbool_t, uint32_t *, svint64_t, svuint32_t); | |
| 18018 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u64))) | |
| 18019 | void svst1q_scatter_s64offset_u64(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 18020 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u16))) | |
| 18021 | void svst1q_scatter_s64offset_u16(svbool_t, uint16_t *, svint64_t, svuint16_t); | |
| 18022 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_bf16))) | |
| 18023 | void svst1q_scatter_s64offset_bf16(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t); | |
| 18024 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s8))) | |
| 18025 | void svst1q_scatter_s64offset_s8(svbool_t, int8_t *, svint64_t, svint8_t); | |
| 18026 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f64))) | |
| 18027 | void svst1q_scatter_s64offset_f64(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 18028 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f32))) | |
| 18029 | void svst1q_scatter_s64offset_f32(svbool_t, float32_t *, svint64_t, svfloat32_t); | |
| 18030 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f16))) | |
| 18031 | void svst1q_scatter_s64offset_f16(svbool_t, float16_t *, svint64_t, svfloat16_t); | |
| 18032 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s32))) | |
| 18033 | void svst1q_scatter_s64offset_s32(svbool_t, int32_t *, svint64_t, svint32_t); | |
| 18034 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s64))) | |
| 18035 | void svst1q_scatter_s64offset_s64(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 18036 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_mf8))) | |
| 18037 | void svst1q_scatter_s64offset_mf8(svbool_t, mfloat8_t *, svint64_t, svmfloat8_t); | |
| 18038 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s16))) | |
| 18039 | void svst1q_scatter_s64offset_s16(svbool_t, int16_t *, svint64_t, svint16_t); | |
| 18040 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u8))) | |
| 18041 | void svst1q_scatter_u64offset_u8(svbool_t, uint8_t *, svuint64_t, svuint8_t); | |
| 18042 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u32))) | |
| 18043 | void svst1q_scatter_u64offset_u32(svbool_t, uint32_t *, svuint64_t, svuint32_t); | |
| 18044 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u64))) | |
| 18045 | void svst1q_scatter_u64offset_u64(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 18046 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u16))) | |
| 18047 | void svst1q_scatter_u64offset_u16(svbool_t, uint16_t *, svuint64_t, svuint16_t); | |
| 18048 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_bf16))) | |
| 18049 | void svst1q_scatter_u64offset_bf16(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t); | |
| 18050 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s8))) | |
| 18051 | void svst1q_scatter_u64offset_s8(svbool_t, int8_t *, svuint64_t, svint8_t); | |
| 18052 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f64))) | |
| 18053 | void svst1q_scatter_u64offset_f64(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 18054 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f32))) | |
| 18055 | void svst1q_scatter_u64offset_f32(svbool_t, float32_t *, svuint64_t, svfloat32_t); | |
| 18056 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f16))) | |
| 18057 | void svst1q_scatter_u64offset_f16(svbool_t, float16_t *, svuint64_t, svfloat16_t); | |
| 18058 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s32))) | |
| 18059 | void svst1q_scatter_u64offset_s32(svbool_t, int32_t *, svuint64_t, svint32_t); | |
| 18060 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s64))) | |
| 18061 | void svst1q_scatter_u64offset_s64(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 18062 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_mf8))) | |
| 18063 | void svst1q_scatter_u64offset_mf8(svbool_t, mfloat8_t *, svuint64_t, svmfloat8_t); | |
| 18064 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s16))) | |
| 18065 | void svst1q_scatter_u64offset_s16(svbool_t, int16_t *, svuint64_t, svint16_t); | |
| 18066 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_u32))) | |
| 18067 | void svst1wq_u32(svbool_t, uint32_t *, svuint32_t); | |
| 18068 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_f32))) | |
| 18069 | void svst1wq_f32(svbool_t, float32_t *, svfloat32_t); | |
| 18070 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_s32))) | |
| 18071 | void svst1wq_s32(svbool_t, int32_t *, svint32_t); | |
| 18072 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_u32))) | |
| 18073 | void svst1wq_vnum_u32(svbool_t, uint32_t *, int64_t, svuint32_t); | |
| 18074 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_f32))) | |
| 18075 | void svst1wq_vnum_f32(svbool_t, float32_t *, int64_t, svfloat32_t); | |
| 18076 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_s32))) | |
| 18077 | void svst1wq_vnum_s32(svbool_t, int32_t *, int64_t, svint32_t); | |
| 18078 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u32))) | |
| 18079 | svuint32_t svld1q_gather_index_u32(svbool_t, svuint64_t, int64_t); | |
| 18080 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u64))) | |
| 18081 | svuint64_t svld1q_gather_index_u64(svbool_t, svuint64_t, int64_t); | |
| 18082 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_u16))) | |
| 18083 | svuint16_t svld1q_gather_index_u16(svbool_t, svuint64_t, int64_t); | |
| 18084 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_bf16))) | |
| 18085 | svbfloat16_t svld1q_gather_index_bf16(svbool_t, svuint64_t, int64_t); | |
| 18086 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f64))) | |
| 18087 | svfloat64_t svld1q_gather_index_f64(svbool_t, svuint64_t, int64_t); | |
| 18088 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f32))) | |
| 18089 | svfloat32_t svld1q_gather_index_f32(svbool_t, svuint64_t, int64_t); | |
| 18090 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_f16))) | |
| 18091 | svfloat16_t svld1q_gather_index_f16(svbool_t, svuint64_t, int64_t); | |
| 18092 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s32))) | |
| 18093 | svint32_t svld1q_gather_index_s32(svbool_t, svuint64_t, int64_t); | |
| 18094 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s64))) | |
| 18095 | svint64_t svld1q_gather_index_s64(svbool_t, svuint64_t, int64_t); | |
| 18096 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_index_s16))) | |
| 18097 | svint16_t svld1q_gather_index_s16(svbool_t, svuint64_t, int64_t); | |
| 18098 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u8))) | |
| 18099 | svuint8_t svld1q_gather_offset_u8(svbool_t, svuint64_t, int64_t); | |
| 18100 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u32))) | |
| 18101 | svuint32_t svld1q_gather_offset_u32(svbool_t, svuint64_t, int64_t); | |
| 18102 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u64))) | |
| 18103 | svuint64_t svld1q_gather_offset_u64(svbool_t, svuint64_t, int64_t); | |
| 18104 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_u16))) | |
| 18105 | svuint16_t svld1q_gather_offset_u16(svbool_t, svuint64_t, int64_t); | |
| 18106 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_bf16))) | |
| 18107 | svbfloat16_t svld1q_gather_offset_bf16(svbool_t, svuint64_t, int64_t); | |
| 18108 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s8))) | |
| 18109 | svint8_t svld1q_gather_offset_s8(svbool_t, svuint64_t, int64_t); | |
| 18110 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f64))) | |
| 18111 | svfloat64_t svld1q_gather_offset_f64(svbool_t, svuint64_t, int64_t); | |
| 18112 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f32))) | |
| 18113 | svfloat32_t svld1q_gather_offset_f32(svbool_t, svuint64_t, int64_t); | |
| 18114 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_f16))) | |
| 18115 | svfloat16_t svld1q_gather_offset_f16(svbool_t, svuint64_t, int64_t); | |
| 18116 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s32))) | |
| 18117 | svint32_t svld1q_gather_offset_s32(svbool_t, svuint64_t, int64_t); | |
| 18118 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s64))) | |
| 18119 | svint64_t svld1q_gather_offset_s64(svbool_t, svuint64_t, int64_t); | |
| 18120 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_mf8))) | |
| 18121 | svmfloat8_t svld1q_gather_offset_mf8(svbool_t, svuint64_t, int64_t); | |
| 18122 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_offset_s16))) | |
| 18123 | svint16_t svld1q_gather_offset_s16(svbool_t, svuint64_t, int64_t); | |
| 18124 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u8))) | |
| 18125 | svuint8_t svld1q_gather_u8(svbool_t, svuint64_t); | |
| 18126 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u32))) | |
| 18127 | svuint32_t svld1q_gather_u32(svbool_t, svuint64_t); | |
| 18128 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u64))) | |
| 18129 | svuint64_t svld1q_gather_u64(svbool_t, svuint64_t); | |
| 18130 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_u16))) | |
| 18131 | svuint16_t svld1q_gather_u16(svbool_t, svuint64_t); | |
| 18132 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_bf16))) | |
| 18133 | svbfloat16_t svld1q_gather_bf16(svbool_t, svuint64_t); | |
| 18134 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s8))) | |
| 18135 | svint8_t svld1q_gather_s8(svbool_t, svuint64_t); | |
| 18136 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f64))) | |
| 18137 | svfloat64_t svld1q_gather_f64(svbool_t, svuint64_t); | |
| 18138 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f32))) | |
| 18139 | svfloat32_t svld1q_gather_f32(svbool_t, svuint64_t); | |
| 18140 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_f16))) | |
| 18141 | svfloat16_t svld1q_gather_f16(svbool_t, svuint64_t); | |
| 18142 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s32))) | |
| 18143 | svint32_t svld1q_gather_s32(svbool_t, svuint64_t); | |
| 18144 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s64))) | |
| 18145 | svint64_t svld1q_gather_s64(svbool_t, svuint64_t); | |
| 18146 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_mf8))) | |
| 18147 | svmfloat8_t svld1q_gather_mf8(svbool_t, svuint64_t); | |
| 18148 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64base_s16))) | |
| 18149 | svint16_t svld1q_gather_s16(svbool_t, svuint64_t); | |
| 18150 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u32))) | |
| 18151 | svuint32_t svld1q_gather_index(svbool_t, uint32_t const *, svuint64_t); | |
| 18152 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u64))) | |
| 18153 | svuint64_t svld1q_gather_index(svbool_t, uint64_t const *, svuint64_t); | |
| 18154 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_u16))) | |
| 18155 | svuint16_t svld1q_gather_index(svbool_t, uint16_t const *, svuint64_t); | |
| 18156 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_bf16))) | |
| 18157 | svbfloat16_t svld1q_gather_index(svbool_t, bfloat16_t const *, svuint64_t); | |
| 18158 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f64))) | |
| 18159 | svfloat64_t svld1q_gather_index(svbool_t, float64_t const *, svuint64_t); | |
| 18160 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f32))) | |
| 18161 | svfloat32_t svld1q_gather_index(svbool_t, float32_t const *, svuint64_t); | |
| 18162 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_f16))) | |
| 18163 | svfloat16_t svld1q_gather_index(svbool_t, float16_t const *, svuint64_t); | |
| 18164 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s32))) | |
| 18165 | svint32_t svld1q_gather_index(svbool_t, int32_t const *, svuint64_t); | |
| 18166 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s64))) | |
| 18167 | svint64_t svld1q_gather_index(svbool_t, int64_t const *, svuint64_t); | |
| 18168 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64index_s16))) | |
| 18169 | svint16_t svld1q_gather_index(svbool_t, int16_t const *, svuint64_t); | |
| 18170 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u8))) | |
| 18171 | svuint8_t svld1q_gather_offset(svbool_t, uint8_t const *, svuint64_t); | |
| 18172 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u32))) | |
| 18173 | svuint32_t svld1q_gather_offset(svbool_t, uint32_t const *, svuint64_t); | |
| 18174 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u64))) | |
| 18175 | svuint64_t svld1q_gather_offset(svbool_t, uint64_t const *, svuint64_t); | |
| 18176 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_u16))) | |
| 18177 | svuint16_t svld1q_gather_offset(svbool_t, uint16_t const *, svuint64_t); | |
| 18178 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_bf16))) | |
| 18179 | svbfloat16_t svld1q_gather_offset(svbool_t, bfloat16_t const *, svuint64_t); | |
| 18180 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s8))) | |
| 18181 | svint8_t svld1q_gather_offset(svbool_t, int8_t const *, svuint64_t); | |
| 18182 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f64))) | |
| 18183 | svfloat64_t svld1q_gather_offset(svbool_t, float64_t const *, svuint64_t); | |
| 18184 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f32))) | |
| 18185 | svfloat32_t svld1q_gather_offset(svbool_t, float32_t const *, svuint64_t); | |
| 18186 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_f16))) | |
| 18187 | svfloat16_t svld1q_gather_offset(svbool_t, float16_t const *, svuint64_t); | |
| 18188 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s32))) | |
| 18189 | svint32_t svld1q_gather_offset(svbool_t, int32_t const *, svuint64_t); | |
| 18190 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s64))) | |
| 18191 | svint64_t svld1q_gather_offset(svbool_t, int64_t const *, svuint64_t); | |
| 18192 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_mf8))) | |
| 18193 | svmfloat8_t svld1q_gather_offset(svbool_t, mfloat8_t const *, svuint64_t); | |
| 18194 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1q_gather_u64offset_s16))) | |
| 18195 | svint16_t svld1q_gather_offset(svbool_t, int16_t const *, svuint64_t); | |
| 18196 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_u64))) | |
| 18197 | svuint64_t svld1udq(svbool_t, uint64_t const *); | |
| 18198 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_f64))) | |
| 18199 | svfloat64_t svld1udq(svbool_t, float64_t const *); | |
| 18200 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_s64))) | |
| 18201 | svint64_t svld1udq(svbool_t, int64_t const *); | |
| 18202 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_u64))) | |
| 18203 | svuint64_t svld1udq_vnum(svbool_t, uint64_t const *, int64_t); | |
| 18204 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_f64))) | |
| 18205 | svfloat64_t svld1udq_vnum(svbool_t, float64_t const *, int64_t); | |
| 18206 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1udq_vnum_s64))) | |
| 18207 | svint64_t svld1udq_vnum(svbool_t, int64_t const *, int64_t); | |
| 18208 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_u32))) | |
| 18209 | svuint32_t svld1uwq(svbool_t, uint32_t const *); | |
| 18210 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_f32))) | |
| 18211 | svfloat32_t svld1uwq(svbool_t, float32_t const *); | |
| 18212 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_s32))) | |
| 18213 | svint32_t svld1uwq(svbool_t, int32_t const *); | |
| 18214 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_u32))) | |
| 18215 | svuint32_t svld1uwq_vnum(svbool_t, uint32_t const *, int64_t); | |
| 18216 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_f32))) | |
| 18217 | svfloat32_t svld1uwq_vnum(svbool_t, float32_t const *, int64_t); | |
| 18218 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1uwq_vnum_s32))) | |
| 18219 | svint32_t svld1uwq_vnum(svbool_t, int32_t const *, int64_t); | |
| 18220 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_u64))) | |
| 18221 | void svst1dq(svbool_t, uint64_t *, svuint64_t); | |
| 18222 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_f64))) | |
| 18223 | void svst1dq(svbool_t, float64_t *, svfloat64_t); | |
| 18224 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_s64))) | |
| 18225 | void svst1dq(svbool_t, int64_t *, svint64_t); | |
| 18226 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_u64))) | |
| 18227 | void svst1dq_vnum(svbool_t, uint64_t *, int64_t, svuint64_t); | |
| 18228 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_f64))) | |
| 18229 | void svst1dq_vnum(svbool_t, float64_t *, int64_t, svfloat64_t); | |
| 18230 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1dq_vnum_s64))) | |
| 18231 | void svst1dq_vnum(svbool_t, int64_t *, int64_t, svint64_t); | |
| 18232 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u8))) | |
| 18233 | void svst1q_scatter(svbool_t, svuint64_t, svuint8_t); | |
| 18234 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u32))) | |
| 18235 | void svst1q_scatter(svbool_t, svuint64_t, svuint32_t); | |
| 18236 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u64))) | |
| 18237 | void svst1q_scatter(svbool_t, svuint64_t, svuint64_t); | |
| 18238 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_u16))) | |
| 18239 | void svst1q_scatter(svbool_t, svuint64_t, svuint16_t); | |
| 18240 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_bf16))) | |
| 18241 | void svst1q_scatter(svbool_t, svuint64_t, svbfloat16_t); | |
| 18242 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s8))) | |
| 18243 | void svst1q_scatter(svbool_t, svuint64_t, svint8_t); | |
| 18244 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f64))) | |
| 18245 | void svst1q_scatter(svbool_t, svuint64_t, svfloat64_t); | |
| 18246 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f32))) | |
| 18247 | void svst1q_scatter(svbool_t, svuint64_t, svfloat32_t); | |
| 18248 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_f16))) | |
| 18249 | void svst1q_scatter(svbool_t, svuint64_t, svfloat16_t); | |
| 18250 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s32))) | |
| 18251 | void svst1q_scatter(svbool_t, svuint64_t, svint32_t); | |
| 18252 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s64))) | |
| 18253 | void svst1q_scatter(svbool_t, svuint64_t, svint64_t); | |
| 18254 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_mf8))) | |
| 18255 | void svst1q_scatter(svbool_t, svuint64_t, svmfloat8_t); | |
| 18256 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_s16))) | |
| 18257 | void svst1q_scatter(svbool_t, svuint64_t, svint16_t); | |
| 18258 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u32))) | |
| 18259 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint32_t); | |
| 18260 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u64))) | |
| 18261 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 18262 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_u16))) | |
| 18263 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svuint16_t); | |
| 18264 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_bf16))) | |
| 18265 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svbfloat16_t); | |
| 18266 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f64))) | |
| 18267 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 18268 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f32))) | |
| 18269 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat32_t); | |
| 18270 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_f16))) | |
| 18271 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svfloat16_t); | |
| 18272 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s32))) | |
| 18273 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint32_t); | |
| 18274 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s64))) | |
| 18275 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 18276 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_index_s16))) | |
| 18277 | void svst1q_scatter_index(svbool_t, svuint64_t, int64_t, svint16_t); | |
| 18278 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u8))) | |
| 18279 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint8_t); | |
| 18280 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u32))) | |
| 18281 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint32_t); | |
| 18282 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u64))) | |
| 18283 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint64_t); | |
| 18284 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_u16))) | |
| 18285 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svuint16_t); | |
| 18286 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_bf16))) | |
| 18287 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svbfloat16_t); | |
| 18288 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s8))) | |
| 18289 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint8_t); | |
| 18290 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f64))) | |
| 18291 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat64_t); | |
| 18292 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f32))) | |
| 18293 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat32_t); | |
| 18294 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_f16))) | |
| 18295 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svfloat16_t); | |
| 18296 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s32))) | |
| 18297 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint32_t); | |
| 18298 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s64))) | |
| 18299 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint64_t); | |
| 18300 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_mf8))) | |
| 18301 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svmfloat8_t); | |
| 18302 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64base_offset_s16))) | |
| 18303 | void svst1q_scatter_offset(svbool_t, svuint64_t, int64_t, svint16_t); | |
| 18304 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u32))) | |
| 18305 | void svst1q_scatter_index(svbool_t, uint32_t *, svint64_t, svuint32_t); | |
| 18306 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u64))) | |
| 18307 | void svst1q_scatter_index(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 18308 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_u16))) | |
| 18309 | void svst1q_scatter_index(svbool_t, uint16_t *, svint64_t, svuint16_t); | |
| 18310 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_bf16))) | |
| 18311 | void svst1q_scatter_index(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t); | |
| 18312 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f64))) | |
| 18313 | void svst1q_scatter_index(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 18314 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f32))) | |
| 18315 | void svst1q_scatter_index(svbool_t, float32_t *, svint64_t, svfloat32_t); | |
| 18316 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_f16))) | |
| 18317 | void svst1q_scatter_index(svbool_t, float16_t *, svint64_t, svfloat16_t); | |
| 18318 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s32))) | |
| 18319 | void svst1q_scatter_index(svbool_t, int32_t *, svint64_t, svint32_t); | |
| 18320 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s64))) | |
| 18321 | void svst1q_scatter_index(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 18322 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64index_s16))) | |
| 18323 | void svst1q_scatter_index(svbool_t, int16_t *, svint64_t, svint16_t); | |
| 18324 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u32))) | |
| 18325 | void svst1q_scatter_index(svbool_t, uint32_t *, svuint64_t, svuint32_t); | |
| 18326 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u64))) | |
| 18327 | void svst1q_scatter_index(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 18328 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_u16))) | |
| 18329 | void svst1q_scatter_index(svbool_t, uint16_t *, svuint64_t, svuint16_t); | |
| 18330 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_bf16))) | |
| 18331 | void svst1q_scatter_index(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t); | |
| 18332 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f64))) | |
| 18333 | void svst1q_scatter_index(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 18334 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f32))) | |
| 18335 | void svst1q_scatter_index(svbool_t, float32_t *, svuint64_t, svfloat32_t); | |
| 18336 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_f16))) | |
| 18337 | void svst1q_scatter_index(svbool_t, float16_t *, svuint64_t, svfloat16_t); | |
| 18338 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s32))) | |
| 18339 | void svst1q_scatter_index(svbool_t, int32_t *, svuint64_t, svint32_t); | |
| 18340 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s64))) | |
| 18341 | void svst1q_scatter_index(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 18342 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64index_s16))) | |
| 18343 | void svst1q_scatter_index(svbool_t, int16_t *, svuint64_t, svint16_t); | |
| 18344 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u8))) | |
| 18345 | void svst1q_scatter_offset(svbool_t, uint8_t *, svint64_t, svuint8_t); | |
| 18346 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u32))) | |
| 18347 | void svst1q_scatter_offset(svbool_t, uint32_t *, svint64_t, svuint32_t); | |
| 18348 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u64))) | |
| 18349 | void svst1q_scatter_offset(svbool_t, uint64_t *, svint64_t, svuint64_t); | |
| 18350 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_u16))) | |
| 18351 | void svst1q_scatter_offset(svbool_t, uint16_t *, svint64_t, svuint16_t); | |
| 18352 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_bf16))) | |
| 18353 | void svst1q_scatter_offset(svbool_t, bfloat16_t *, svint64_t, svbfloat16_t); | |
| 18354 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s8))) | |
| 18355 | void svst1q_scatter_offset(svbool_t, int8_t *, svint64_t, svint8_t); | |
| 18356 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f64))) | |
| 18357 | void svst1q_scatter_offset(svbool_t, float64_t *, svint64_t, svfloat64_t); | |
| 18358 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f32))) | |
| 18359 | void svst1q_scatter_offset(svbool_t, float32_t *, svint64_t, svfloat32_t); | |
| 18360 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_f16))) | |
| 18361 | void svst1q_scatter_offset(svbool_t, float16_t *, svint64_t, svfloat16_t); | |
| 18362 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s32))) | |
| 18363 | void svst1q_scatter_offset(svbool_t, int32_t *, svint64_t, svint32_t); | |
| 18364 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s64))) | |
| 18365 | void svst1q_scatter_offset(svbool_t, int64_t *, svint64_t, svint64_t); | |
| 18366 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_mf8))) | |
| 18367 | void svst1q_scatter_offset(svbool_t, mfloat8_t *, svint64_t, svmfloat8_t); | |
| 18368 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_s64offset_s16))) | |
| 18369 | void svst1q_scatter_offset(svbool_t, int16_t *, svint64_t, svint16_t); | |
| 18370 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u8))) | |
| 18371 | void svst1q_scatter_offset(svbool_t, uint8_t *, svuint64_t, svuint8_t); | |
| 18372 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u32))) | |
| 18373 | void svst1q_scatter_offset(svbool_t, uint32_t *, svuint64_t, svuint32_t); | |
| 18374 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u64))) | |
| 18375 | void svst1q_scatter_offset(svbool_t, uint64_t *, svuint64_t, svuint64_t); | |
| 18376 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_u16))) | |
| 18377 | void svst1q_scatter_offset(svbool_t, uint16_t *, svuint64_t, svuint16_t); | |
| 18378 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_bf16))) | |
| 18379 | void svst1q_scatter_offset(svbool_t, bfloat16_t *, svuint64_t, svbfloat16_t); | |
| 18380 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s8))) | |
| 18381 | void svst1q_scatter_offset(svbool_t, int8_t *, svuint64_t, svint8_t); | |
| 18382 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f64))) | |
| 18383 | void svst1q_scatter_offset(svbool_t, float64_t *, svuint64_t, svfloat64_t); | |
| 18384 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f32))) | |
| 18385 | void svst1q_scatter_offset(svbool_t, float32_t *, svuint64_t, svfloat32_t); | |
| 18386 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_f16))) | |
| 18387 | void svst1q_scatter_offset(svbool_t, float16_t *, svuint64_t, svfloat16_t); | |
| 18388 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s32))) | |
| 18389 | void svst1q_scatter_offset(svbool_t, int32_t *, svuint64_t, svint32_t); | |
| 18390 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s64))) | |
| 18391 | void svst1q_scatter_offset(svbool_t, int64_t *, svuint64_t, svint64_t); | |
| 18392 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_mf8))) | |
| 18393 | void svst1q_scatter_offset(svbool_t, mfloat8_t *, svuint64_t, svmfloat8_t); | |
| 18394 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1q_scatter_u64offset_s16))) | |
| 18395 | void svst1q_scatter_offset(svbool_t, int16_t *, svuint64_t, svint16_t); | |
| 18396 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_u32))) | |
| 18397 | void svst1wq(svbool_t, uint32_t *, svuint32_t); | |
| 18398 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_f32))) | |
| 18399 | void svst1wq(svbool_t, float32_t *, svfloat32_t); | |
| 18400 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_s32))) | |
| 18401 | void svst1wq(svbool_t, int32_t *, svint32_t); | |
| 18402 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_u32))) | |
| 18403 | void svst1wq_vnum(svbool_t, uint32_t *, int64_t, svuint32_t); | |
| 18404 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_f32))) | |
| 18405 | void svst1wq_vnum(svbool_t, float32_t *, int64_t, svfloat32_t); | |
| 18406 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1wq_vnum_s32))) | |
| 18407 | void svst1wq_vnum(svbool_t, int32_t *, int64_t, svint32_t); | |
| 18408 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c8))) | |
| 18409 | uint64_t svcntp_c8(svcount_t, uint64_t); | |
| 18410 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c32))) | |
| 18411 | uint64_t svcntp_c32(svcount_t, uint64_t); | |
| 18412 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c64))) | |
| 18413 | uint64_t svcntp_c64(svcount_t, uint64_t); | |
| 18414 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcntp_c16))) | |
| 18415 | uint64_t svcntp_c16(svcount_t, uint64_t); | |
| 18416 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x2))) | |
| 18417 | svuint8x2_t svld1_u8_x2(svcount_t, uint8_t const *); | |
| 18418 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x2))) | |
| 18419 | svint8x2_t svld1_s8_x2(svcount_t, int8_t const *); | |
| 18420 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x2))) | |
| 18421 | svmfloat8x2_t svld1_mf8_x2(svcount_t, mfloat8_t const *); | |
| 18422 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x2))) | |
| 18423 | svuint64x2_t svld1_u64_x2(svcount_t, uint64_t const *); | |
| 18424 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x2))) | |
| 18425 | svfloat64x2_t svld1_f64_x2(svcount_t, float64_t const *); | |
| 18426 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x2))) | |
| 18427 | svint64x2_t svld1_s64_x2(svcount_t, int64_t const *); | |
| 18428 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x2))) | |
| 18429 | svuint16x2_t svld1_u16_x2(svcount_t, uint16_t const *); | |
| 18430 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x2))) | |
| 18431 | svbfloat16x2_t svld1_bf16_x2(svcount_t, bfloat16_t const *); | |
| 18432 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x2))) | |
| 18433 | svfloat16x2_t svld1_f16_x2(svcount_t, float16_t const *); | |
| 18434 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x2))) | |
| 18435 | svint16x2_t svld1_s16_x2(svcount_t, int16_t const *); | |
| 18436 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x2))) | |
| 18437 | svuint32x2_t svld1_u32_x2(svcount_t, uint32_t const *); | |
| 18438 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x2))) | |
| 18439 | svfloat32x2_t svld1_f32_x2(svcount_t, float32_t const *); | |
| 18440 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x2))) | |
| 18441 | svint32x2_t svld1_s32_x2(svcount_t, int32_t const *); | |
| 18442 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x4))) | |
| 18443 | svuint8x4_t svld1_u8_x4(svcount_t, uint8_t const *); | |
| 18444 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x4))) | |
| 18445 | svint8x4_t svld1_s8_x4(svcount_t, int8_t const *); | |
| 18446 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x4))) | |
| 18447 | svmfloat8x4_t svld1_mf8_x4(svcount_t, mfloat8_t const *); | |
| 18448 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x4))) | |
| 18449 | svuint64x4_t svld1_u64_x4(svcount_t, uint64_t const *); | |
| 18450 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x4))) | |
| 18451 | svfloat64x4_t svld1_f64_x4(svcount_t, float64_t const *); | |
| 18452 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x4))) | |
| 18453 | svint64x4_t svld1_s64_x4(svcount_t, int64_t const *); | |
| 18454 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x4))) | |
| 18455 | svuint16x4_t svld1_u16_x4(svcount_t, uint16_t const *); | |
| 18456 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x4))) | |
| 18457 | svbfloat16x4_t svld1_bf16_x4(svcount_t, bfloat16_t const *); | |
| 18458 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x4))) | |
| 18459 | svfloat16x4_t svld1_f16_x4(svcount_t, float16_t const *); | |
| 18460 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x4))) | |
| 18461 | svint16x4_t svld1_s16_x4(svcount_t, int16_t const *); | |
| 18462 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x4))) | |
| 18463 | svuint32x4_t svld1_u32_x4(svcount_t, uint32_t const *); | |
| 18464 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x4))) | |
| 18465 | svfloat32x4_t svld1_f32_x4(svcount_t, float32_t const *); | |
| 18466 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x4))) | |
| 18467 | svint32x4_t svld1_s32_x4(svcount_t, int32_t const *); | |
| 18468 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x2))) | |
| 18469 | svuint8x2_t svld1_vnum_u8_x2(svcount_t, uint8_t const *, int64_t); | |
| 18470 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x2))) | |
| 18471 | svint8x2_t svld1_vnum_s8_x2(svcount_t, int8_t const *, int64_t); | |
| 18472 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x2))) | |
| 18473 | svmfloat8x2_t svld1_vnum_mf8_x2(svcount_t, mfloat8_t const *, int64_t); | |
| 18474 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x2))) | |
| 18475 | svuint64x2_t svld1_vnum_u64_x2(svcount_t, uint64_t const *, int64_t); | |
| 18476 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x2))) | |
| 18477 | svfloat64x2_t svld1_vnum_f64_x2(svcount_t, float64_t const *, int64_t); | |
| 18478 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x2))) | |
| 18479 | svint64x2_t svld1_vnum_s64_x2(svcount_t, int64_t const *, int64_t); | |
| 18480 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x2))) | |
| 18481 | svuint16x2_t svld1_vnum_u16_x2(svcount_t, uint16_t const *, int64_t); | |
| 18482 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x2))) | |
| 18483 | svbfloat16x2_t svld1_vnum_bf16_x2(svcount_t, bfloat16_t const *, int64_t); | |
| 18484 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x2))) | |
| 18485 | svfloat16x2_t svld1_vnum_f16_x2(svcount_t, float16_t const *, int64_t); | |
| 18486 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x2))) | |
| 18487 | svint16x2_t svld1_vnum_s16_x2(svcount_t, int16_t const *, int64_t); | |
| 18488 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x2))) | |
| 18489 | svuint32x2_t svld1_vnum_u32_x2(svcount_t, uint32_t const *, int64_t); | |
| 18490 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x2))) | |
| 18491 | svfloat32x2_t svld1_vnum_f32_x2(svcount_t, float32_t const *, int64_t); | |
| 18492 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x2))) | |
| 18493 | svint32x2_t svld1_vnum_s32_x2(svcount_t, int32_t const *, int64_t); | |
| 18494 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x4))) | |
| 18495 | svuint8x4_t svld1_vnum_u8_x4(svcount_t, uint8_t const *, int64_t); | |
| 18496 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x4))) | |
| 18497 | svint8x4_t svld1_vnum_s8_x4(svcount_t, int8_t const *, int64_t); | |
| 18498 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x4))) | |
| 18499 | svmfloat8x4_t svld1_vnum_mf8_x4(svcount_t, mfloat8_t const *, int64_t); | |
| 18500 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x4))) | |
| 18501 | svuint64x4_t svld1_vnum_u64_x4(svcount_t, uint64_t const *, int64_t); | |
| 18502 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x4))) | |
| 18503 | svfloat64x4_t svld1_vnum_f64_x4(svcount_t, float64_t const *, int64_t); | |
| 18504 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x4))) | |
| 18505 | svint64x4_t svld1_vnum_s64_x4(svcount_t, int64_t const *, int64_t); | |
| 18506 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x4))) | |
| 18507 | svuint16x4_t svld1_vnum_u16_x4(svcount_t, uint16_t const *, int64_t); | |
| 18508 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x4))) | |
| 18509 | svbfloat16x4_t svld1_vnum_bf16_x4(svcount_t, bfloat16_t const *, int64_t); | |
| 18510 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x4))) | |
| 18511 | svfloat16x4_t svld1_vnum_f16_x4(svcount_t, float16_t const *, int64_t); | |
| 18512 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x4))) | |
| 18513 | svint16x4_t svld1_vnum_s16_x4(svcount_t, int16_t const *, int64_t); | |
| 18514 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x4))) | |
| 18515 | svuint32x4_t svld1_vnum_u32_x4(svcount_t, uint32_t const *, int64_t); | |
| 18516 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x4))) | |
| 18517 | svfloat32x4_t svld1_vnum_f32_x4(svcount_t, float32_t const *, int64_t); | |
| 18518 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x4))) | |
| 18519 | svint32x4_t svld1_vnum_s32_x4(svcount_t, int32_t const *, int64_t); | |
| 18520 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x2))) | |
| 18521 | svuint8x2_t svldnt1_u8_x2(svcount_t, uint8_t const *); | |
| 18522 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x2))) | |
| 18523 | svint8x2_t svldnt1_s8_x2(svcount_t, int8_t const *); | |
| 18524 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x2))) | |
| 18525 | svmfloat8x2_t svldnt1_mf8_x2(svcount_t, mfloat8_t const *); | |
| 18526 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x2))) | |
| 18527 | svuint64x2_t svldnt1_u64_x2(svcount_t, uint64_t const *); | |
| 18528 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x2))) | |
| 18529 | svfloat64x2_t svldnt1_f64_x2(svcount_t, float64_t const *); | |
| 18530 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x2))) | |
| 18531 | svint64x2_t svldnt1_s64_x2(svcount_t, int64_t const *); | |
| 18532 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x2))) | |
| 18533 | svuint16x2_t svldnt1_u16_x2(svcount_t, uint16_t const *); | |
| 18534 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x2))) | |
| 18535 | svbfloat16x2_t svldnt1_bf16_x2(svcount_t, bfloat16_t const *); | |
| 18536 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x2))) | |
| 18537 | svfloat16x2_t svldnt1_f16_x2(svcount_t, float16_t const *); | |
| 18538 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x2))) | |
| 18539 | svint16x2_t svldnt1_s16_x2(svcount_t, int16_t const *); | |
| 18540 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x2))) | |
| 18541 | svuint32x2_t svldnt1_u32_x2(svcount_t, uint32_t const *); | |
| 18542 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x2))) | |
| 18543 | svfloat32x2_t svldnt1_f32_x2(svcount_t, float32_t const *); | |
| 18544 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x2))) | |
| 18545 | svint32x2_t svldnt1_s32_x2(svcount_t, int32_t const *); | |
| 18546 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x4))) | |
| 18547 | svuint8x4_t svldnt1_u8_x4(svcount_t, uint8_t const *); | |
| 18548 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x4))) | |
| 18549 | svint8x4_t svldnt1_s8_x4(svcount_t, int8_t const *); | |
| 18550 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x4))) | |
| 18551 | svmfloat8x4_t svldnt1_mf8_x4(svcount_t, mfloat8_t const *); | |
| 18552 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x4))) | |
| 18553 | svuint64x4_t svldnt1_u64_x4(svcount_t, uint64_t const *); | |
| 18554 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x4))) | |
| 18555 | svfloat64x4_t svldnt1_f64_x4(svcount_t, float64_t const *); | |
| 18556 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x4))) | |
| 18557 | svint64x4_t svldnt1_s64_x4(svcount_t, int64_t const *); | |
| 18558 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x4))) | |
| 18559 | svuint16x4_t svldnt1_u16_x4(svcount_t, uint16_t const *); | |
| 18560 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x4))) | |
| 18561 | svbfloat16x4_t svldnt1_bf16_x4(svcount_t, bfloat16_t const *); | |
| 18562 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x4))) | |
| 18563 | svfloat16x4_t svldnt1_f16_x4(svcount_t, float16_t const *); | |
| 18564 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x4))) | |
| 18565 | svint16x4_t svldnt1_s16_x4(svcount_t, int16_t const *); | |
| 18566 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x4))) | |
| 18567 | svuint32x4_t svldnt1_u32_x4(svcount_t, uint32_t const *); | |
| 18568 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x4))) | |
| 18569 | svfloat32x4_t svldnt1_f32_x4(svcount_t, float32_t const *); | |
| 18570 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x4))) | |
| 18571 | svint32x4_t svldnt1_s32_x4(svcount_t, int32_t const *); | |
| 18572 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x2))) | |
| 18573 | svuint8x2_t svldnt1_vnum_u8_x2(svcount_t, uint8_t const *, int64_t); | |
| 18574 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x2))) | |
| 18575 | svint8x2_t svldnt1_vnum_s8_x2(svcount_t, int8_t const *, int64_t); | |
| 18576 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x2))) | |
| 18577 | svmfloat8x2_t svldnt1_vnum_mf8_x2(svcount_t, mfloat8_t const *, int64_t); | |
| 18578 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x2))) | |
| 18579 | svuint64x2_t svldnt1_vnum_u64_x2(svcount_t, uint64_t const *, int64_t); | |
| 18580 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x2))) | |
| 18581 | svfloat64x2_t svldnt1_vnum_f64_x2(svcount_t, float64_t const *, int64_t); | |
| 18582 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x2))) | |
| 18583 | svint64x2_t svldnt1_vnum_s64_x2(svcount_t, int64_t const *, int64_t); | |
| 18584 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x2))) | |
| 18585 | svuint16x2_t svldnt1_vnum_u16_x2(svcount_t, uint16_t const *, int64_t); | |
| 18586 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x2))) | |
| 18587 | svbfloat16x2_t svldnt1_vnum_bf16_x2(svcount_t, bfloat16_t const *, int64_t); | |
| 18588 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x2))) | |
| 18589 | svfloat16x2_t svldnt1_vnum_f16_x2(svcount_t, float16_t const *, int64_t); | |
| 18590 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x2))) | |
| 18591 | svint16x2_t svldnt1_vnum_s16_x2(svcount_t, int16_t const *, int64_t); | |
| 18592 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x2))) | |
| 18593 | svuint32x2_t svldnt1_vnum_u32_x2(svcount_t, uint32_t const *, int64_t); | |
| 18594 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x2))) | |
| 18595 | svfloat32x2_t svldnt1_vnum_f32_x2(svcount_t, float32_t const *, int64_t); | |
| 18596 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x2))) | |
| 18597 | svint32x2_t svldnt1_vnum_s32_x2(svcount_t, int32_t const *, int64_t); | |
| 18598 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x4))) | |
| 18599 | svuint8x4_t svldnt1_vnum_u8_x4(svcount_t, uint8_t const *, int64_t); | |
| 18600 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x4))) | |
| 18601 | svint8x4_t svldnt1_vnum_s8_x4(svcount_t, int8_t const *, int64_t); | |
| 18602 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x4))) | |
| 18603 | svmfloat8x4_t svldnt1_vnum_mf8_x4(svcount_t, mfloat8_t const *, int64_t); | |
| 18604 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x4))) | |
| 18605 | svuint64x4_t svldnt1_vnum_u64_x4(svcount_t, uint64_t const *, int64_t); | |
| 18606 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x4))) | |
| 18607 | svfloat64x4_t svldnt1_vnum_f64_x4(svcount_t, float64_t const *, int64_t); | |
| 18608 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x4))) | |
| 18609 | svint64x4_t svldnt1_vnum_s64_x4(svcount_t, int64_t const *, int64_t); | |
| 18610 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x4))) | |
| 18611 | svuint16x4_t svldnt1_vnum_u16_x4(svcount_t, uint16_t const *, int64_t); | |
| 18612 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x4))) | |
| 18613 | svbfloat16x4_t svldnt1_vnum_bf16_x4(svcount_t, bfloat16_t const *, int64_t); | |
| 18614 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x4))) | |
| 18615 | svfloat16x4_t svldnt1_vnum_f16_x4(svcount_t, float16_t const *, int64_t); | |
| 18616 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x4))) | |
| 18617 | svint16x4_t svldnt1_vnum_s16_x4(svcount_t, int16_t const *, int64_t); | |
| 18618 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x4))) | |
| 18619 | svuint32x4_t svldnt1_vnum_u32_x4(svcount_t, uint32_t const *, int64_t); | |
| 18620 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x4))) | |
| 18621 | svfloat32x4_t svldnt1_vnum_f32_x4(svcount_t, float32_t const *, int64_t); | |
| 18622 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x4))) | |
| 18623 | svint32x4_t svldnt1_vnum_s32_x4(svcount_t, int32_t const *, int64_t); | |
| 18624 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c8))) | |
| 18625 | svbool_t svpext_lane_c8(svcount_t, uint64_t); | |
| 18626 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c32))) | |
| 18627 | svbool_t svpext_lane_c32(svcount_t, uint64_t); | |
| 18628 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c64))) | |
| 18629 | svbool_t svpext_lane_c64(svcount_t, uint64_t); | |
| 18630 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c16))) | |
| 18631 | svbool_t svpext_lane_c16(svcount_t, uint64_t); | |
| 18632 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c8_x2))) | |
| 18633 | svboolx2_t svpext_lane_c8_x2(svcount_t, uint64_t); | |
| 18634 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c32_x2))) | |
| 18635 | svboolx2_t svpext_lane_c32_x2(svcount_t, uint64_t); | |
| 18636 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c64_x2))) | |
| 18637 | svboolx2_t svpext_lane_c64_x2(svcount_t, uint64_t); | |
| 18638 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpext_lane_c16_x2))) | |
| 18639 | svboolx2_t svpext_lane_c16_x2(svcount_t, uint64_t); | |
| 18640 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpfalse_c))) | |
| 18641 | svcount_t svpfalse_c(void); | |
| 18642 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c16))) | |
| 18643 | svcount_t svpsel_lane_c16(svcount_t, svbool_t, uint32_t); | |
| 18644 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c32))) | |
| 18645 | svcount_t svpsel_lane_c32(svcount_t, svbool_t, uint32_t); | |
| 18646 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c64))) | |
| 18647 | svcount_t svpsel_lane_c64(svcount_t, svbool_t, uint32_t); | |
| 18648 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svpsel_lane_c8))) | |
| 18649 | svcount_t svpsel_lane_c8(svcount_t, svbool_t, uint32_t); | |
| 18650 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c8))) | |
| 18651 | svcount_t svptrue_c8(void); | |
| 18652 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c32))) | |
| 18653 | svcount_t svptrue_c32(void); | |
| 18654 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c64))) | |
| 18655 | svcount_t svptrue_c64(void); | |
| 18656 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svptrue_c16))) | |
| 18657 | svcount_t svptrue_c16(void); | |
| 18658 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_b))) | |
| 18659 | svbool_t svreinterpret_b(svcount_t); | |
| 18660 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_c))) | |
| 18661 | svcount_t svreinterpret_c(svbool_t); | |
| 18662 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x2))) | |
| 18663 | void svst1_u8_x2(svcount_t, uint8_t *, svuint8x2_t); | |
| 18664 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x2))) | |
| 18665 | void svst1_s8_x2(svcount_t, int8_t *, svint8x2_t); | |
| 18666 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x2))) | |
| 18667 | void svst1_mf8_x2(svcount_t, mfloat8_t *, svmfloat8x2_t); | |
| 18668 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x2))) | |
| 18669 | void svst1_u64_x2(svcount_t, uint64_t *, svuint64x2_t); | |
| 18670 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x2))) | |
| 18671 | void svst1_f64_x2(svcount_t, float64_t *, svfloat64x2_t); | |
| 18672 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x2))) | |
| 18673 | void svst1_s64_x2(svcount_t, int64_t *, svint64x2_t); | |
| 18674 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x2))) | |
| 18675 | void svst1_u16_x2(svcount_t, uint16_t *, svuint16x2_t); | |
| 18676 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x2))) | |
| 18677 | void svst1_bf16_x2(svcount_t, bfloat16_t *, svbfloat16x2_t); | |
| 18678 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x2))) | |
| 18679 | void svst1_f16_x2(svcount_t, float16_t *, svfloat16x2_t); | |
| 18680 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x2))) | |
| 18681 | void svst1_s16_x2(svcount_t, int16_t *, svint16x2_t); | |
| 18682 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x2))) | |
| 18683 | void svst1_u32_x2(svcount_t, uint32_t *, svuint32x2_t); | |
| 18684 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x2))) | |
| 18685 | void svst1_f32_x2(svcount_t, float32_t *, svfloat32x2_t); | |
| 18686 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x2))) | |
| 18687 | void svst1_s32_x2(svcount_t, int32_t *, svint32x2_t); | |
| 18688 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x4))) | |
| 18689 | void svst1_u8_x4(svcount_t, uint8_t *, svuint8x4_t); | |
| 18690 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x4))) | |
| 18691 | void svst1_s8_x4(svcount_t, int8_t *, svint8x4_t); | |
| 18692 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x4))) | |
| 18693 | void svst1_mf8_x4(svcount_t, mfloat8_t *, svmfloat8x4_t); | |
| 18694 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x4))) | |
| 18695 | void svst1_u64_x4(svcount_t, uint64_t *, svuint64x4_t); | |
| 18696 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x4))) | |
| 18697 | void svst1_f64_x4(svcount_t, float64_t *, svfloat64x4_t); | |
| 18698 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x4))) | |
| 18699 | void svst1_s64_x4(svcount_t, int64_t *, svint64x4_t); | |
| 18700 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x4))) | |
| 18701 | void svst1_u16_x4(svcount_t, uint16_t *, svuint16x4_t); | |
| 18702 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x4))) | |
| 18703 | void svst1_bf16_x4(svcount_t, bfloat16_t *, svbfloat16x4_t); | |
| 18704 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x4))) | |
| 18705 | void svst1_f16_x4(svcount_t, float16_t *, svfloat16x4_t); | |
| 18706 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x4))) | |
| 18707 | void svst1_s16_x4(svcount_t, int16_t *, svint16x4_t); | |
| 18708 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x4))) | |
| 18709 | void svst1_u32_x4(svcount_t, uint32_t *, svuint32x4_t); | |
| 18710 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x4))) | |
| 18711 | void svst1_f32_x4(svcount_t, float32_t *, svfloat32x4_t); | |
| 18712 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x4))) | |
| 18713 | void svst1_s32_x4(svcount_t, int32_t *, svint32x4_t); | |
| 18714 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x2))) | |
| 18715 | void svst1_vnum_u8_x2(svcount_t, uint8_t *, int64_t, svuint8x2_t); | |
| 18716 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x2))) | |
| 18717 | void svst1_vnum_s8_x2(svcount_t, int8_t *, int64_t, svint8x2_t); | |
| 18718 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x2))) | |
| 18719 | void svst1_vnum_mf8_x2(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t); | |
| 18720 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x2))) | |
| 18721 | void svst1_vnum_u64_x2(svcount_t, uint64_t *, int64_t, svuint64x2_t); | |
| 18722 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x2))) | |
| 18723 | void svst1_vnum_f64_x2(svcount_t, float64_t *, int64_t, svfloat64x2_t); | |
| 18724 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x2))) | |
| 18725 | void svst1_vnum_s64_x2(svcount_t, int64_t *, int64_t, svint64x2_t); | |
| 18726 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x2))) | |
| 18727 | void svst1_vnum_u16_x2(svcount_t, uint16_t *, int64_t, svuint16x2_t); | |
| 18728 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x2))) | |
| 18729 | void svst1_vnum_bf16_x2(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t); | |
| 18730 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x2))) | |
| 18731 | void svst1_vnum_f16_x2(svcount_t, float16_t *, int64_t, svfloat16x2_t); | |
| 18732 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x2))) | |
| 18733 | void svst1_vnum_s16_x2(svcount_t, int16_t *, int64_t, svint16x2_t); | |
| 18734 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x2))) | |
| 18735 | void svst1_vnum_u32_x2(svcount_t, uint32_t *, int64_t, svuint32x2_t); | |
| 18736 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x2))) | |
| 18737 | void svst1_vnum_f32_x2(svcount_t, float32_t *, int64_t, svfloat32x2_t); | |
| 18738 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x2))) | |
| 18739 | void svst1_vnum_s32_x2(svcount_t, int32_t *, int64_t, svint32x2_t); | |
| 18740 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x4))) | |
| 18741 | void svst1_vnum_u8_x4(svcount_t, uint8_t *, int64_t, svuint8x4_t); | |
| 18742 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x4))) | |
| 18743 | void svst1_vnum_s8_x4(svcount_t, int8_t *, int64_t, svint8x4_t); | |
| 18744 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x4))) | |
| 18745 | void svst1_vnum_mf8_x4(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t); | |
| 18746 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x4))) | |
| 18747 | void svst1_vnum_u64_x4(svcount_t, uint64_t *, int64_t, svuint64x4_t); | |
| 18748 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x4))) | |
| 18749 | void svst1_vnum_f64_x4(svcount_t, float64_t *, int64_t, svfloat64x4_t); | |
| 18750 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x4))) | |
| 18751 | void svst1_vnum_s64_x4(svcount_t, int64_t *, int64_t, svint64x4_t); | |
| 18752 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x4))) | |
| 18753 | void svst1_vnum_u16_x4(svcount_t, uint16_t *, int64_t, svuint16x4_t); | |
| 18754 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x4))) | |
| 18755 | void svst1_vnum_bf16_x4(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t); | |
| 18756 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x4))) | |
| 18757 | void svst1_vnum_f16_x4(svcount_t, float16_t *, int64_t, svfloat16x4_t); | |
| 18758 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x4))) | |
| 18759 | void svst1_vnum_s16_x4(svcount_t, int16_t *, int64_t, svint16x4_t); | |
| 18760 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x4))) | |
| 18761 | void svst1_vnum_u32_x4(svcount_t, uint32_t *, int64_t, svuint32x4_t); | |
| 18762 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x4))) | |
| 18763 | void svst1_vnum_f32_x4(svcount_t, float32_t *, int64_t, svfloat32x4_t); | |
| 18764 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x4))) | |
| 18765 | void svst1_vnum_s32_x4(svcount_t, int32_t *, int64_t, svint32x4_t); | |
| 18766 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x2))) | |
| 18767 | void svstnt1_u8_x2(svcount_t, uint8_t *, svuint8x2_t); | |
| 18768 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x2))) | |
| 18769 | void svstnt1_s8_x2(svcount_t, int8_t *, svint8x2_t); | |
| 18770 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x2))) | |
| 18771 | void svstnt1_mf8_x2(svcount_t, mfloat8_t *, svmfloat8x2_t); | |
| 18772 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x2))) | |
| 18773 | void svstnt1_u64_x2(svcount_t, uint64_t *, svuint64x2_t); | |
| 18774 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x2))) | |
| 18775 | void svstnt1_f64_x2(svcount_t, float64_t *, svfloat64x2_t); | |
| 18776 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x2))) | |
| 18777 | void svstnt1_s64_x2(svcount_t, int64_t *, svint64x2_t); | |
| 18778 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x2))) | |
| 18779 | void svstnt1_u16_x2(svcount_t, uint16_t *, svuint16x2_t); | |
| 18780 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x2))) | |
| 18781 | void svstnt1_bf16_x2(svcount_t, bfloat16_t *, svbfloat16x2_t); | |
| 18782 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x2))) | |
| 18783 | void svstnt1_f16_x2(svcount_t, float16_t *, svfloat16x2_t); | |
| 18784 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x2))) | |
| 18785 | void svstnt1_s16_x2(svcount_t, int16_t *, svint16x2_t); | |
| 18786 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x2))) | |
| 18787 | void svstnt1_u32_x2(svcount_t, uint32_t *, svuint32x2_t); | |
| 18788 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x2))) | |
| 18789 | void svstnt1_f32_x2(svcount_t, float32_t *, svfloat32x2_t); | |
| 18790 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x2))) | |
| 18791 | void svstnt1_s32_x2(svcount_t, int32_t *, svint32x2_t); | |
| 18792 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x4))) | |
| 18793 | void svstnt1_u8_x4(svcount_t, uint8_t *, svuint8x4_t); | |
| 18794 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x4))) | |
| 18795 | void svstnt1_s8_x4(svcount_t, int8_t *, svint8x4_t); | |
| 18796 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x4))) | |
| 18797 | void svstnt1_mf8_x4(svcount_t, mfloat8_t *, svmfloat8x4_t); | |
| 18798 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x4))) | |
| 18799 | void svstnt1_u64_x4(svcount_t, uint64_t *, svuint64x4_t); | |
| 18800 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x4))) | |
| 18801 | void svstnt1_f64_x4(svcount_t, float64_t *, svfloat64x4_t); | |
| 18802 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x4))) | |
| 18803 | void svstnt1_s64_x4(svcount_t, int64_t *, svint64x4_t); | |
| 18804 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x4))) | |
| 18805 | void svstnt1_u16_x4(svcount_t, uint16_t *, svuint16x4_t); | |
| 18806 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x4))) | |
| 18807 | void svstnt1_bf16_x4(svcount_t, bfloat16_t *, svbfloat16x4_t); | |
| 18808 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x4))) | |
| 18809 | void svstnt1_f16_x4(svcount_t, float16_t *, svfloat16x4_t); | |
| 18810 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x4))) | |
| 18811 | void svstnt1_s16_x4(svcount_t, int16_t *, svint16x4_t); | |
| 18812 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x4))) | |
| 18813 | void svstnt1_u32_x4(svcount_t, uint32_t *, svuint32x4_t); | |
| 18814 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x4))) | |
| 18815 | void svstnt1_f32_x4(svcount_t, float32_t *, svfloat32x4_t); | |
| 18816 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x4))) | |
| 18817 | void svstnt1_s32_x4(svcount_t, int32_t *, svint32x4_t); | |
| 18818 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x2))) | |
| 18819 | void svstnt1_vnum_u8_x2(svcount_t, uint8_t *, int64_t, svuint8x2_t); | |
| 18820 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x2))) | |
| 18821 | void svstnt1_vnum_s8_x2(svcount_t, int8_t *, int64_t, svint8x2_t); | |
| 18822 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x2))) | |
| 18823 | void svstnt1_vnum_mf8_x2(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t); | |
| 18824 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x2))) | |
| 18825 | void svstnt1_vnum_u64_x2(svcount_t, uint64_t *, int64_t, svuint64x2_t); | |
| 18826 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x2))) | |
| 18827 | void svstnt1_vnum_f64_x2(svcount_t, float64_t *, int64_t, svfloat64x2_t); | |
| 18828 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x2))) | |
| 18829 | void svstnt1_vnum_s64_x2(svcount_t, int64_t *, int64_t, svint64x2_t); | |
| 18830 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x2))) | |
| 18831 | void svstnt1_vnum_u16_x2(svcount_t, uint16_t *, int64_t, svuint16x2_t); | |
| 18832 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x2))) | |
| 18833 | void svstnt1_vnum_bf16_x2(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t); | |
| 18834 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x2))) | |
| 18835 | void svstnt1_vnum_f16_x2(svcount_t, float16_t *, int64_t, svfloat16x2_t); | |
| 18836 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x2))) | |
| 18837 | void svstnt1_vnum_s16_x2(svcount_t, int16_t *, int64_t, svint16x2_t); | |
| 18838 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x2))) | |
| 18839 | void svstnt1_vnum_u32_x2(svcount_t, uint32_t *, int64_t, svuint32x2_t); | |
| 18840 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x2))) | |
| 18841 | void svstnt1_vnum_f32_x2(svcount_t, float32_t *, int64_t, svfloat32x2_t); | |
| 18842 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x2))) | |
| 18843 | void svstnt1_vnum_s32_x2(svcount_t, int32_t *, int64_t, svint32x2_t); | |
| 18844 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x4))) | |
| 18845 | void svstnt1_vnum_u8_x4(svcount_t, uint8_t *, int64_t, svuint8x4_t); | |
| 18846 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x4))) | |
| 18847 | void svstnt1_vnum_s8_x4(svcount_t, int8_t *, int64_t, svint8x4_t); | |
| 18848 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x4))) | |
| 18849 | void svstnt1_vnum_mf8_x4(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t); | |
| 18850 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x4))) | |
| 18851 | void svstnt1_vnum_u64_x4(svcount_t, uint64_t *, int64_t, svuint64x4_t); | |
| 18852 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x4))) | |
| 18853 | void svstnt1_vnum_f64_x4(svcount_t, float64_t *, int64_t, svfloat64x4_t); | |
| 18854 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x4))) | |
| 18855 | void svstnt1_vnum_s64_x4(svcount_t, int64_t *, int64_t, svint64x4_t); | |
| 18856 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x4))) | |
| 18857 | void svstnt1_vnum_u16_x4(svcount_t, uint16_t *, int64_t, svuint16x4_t); | |
| 18858 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x4))) | |
| 18859 | void svstnt1_vnum_bf16_x4(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t); | |
| 18860 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x4))) | |
| 18861 | void svstnt1_vnum_f16_x4(svcount_t, float16_t *, int64_t, svfloat16x4_t); | |
| 18862 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x4))) | |
| 18863 | void svstnt1_vnum_s16_x4(svcount_t, int16_t *, int64_t, svint16x4_t); | |
| 18864 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x4))) | |
| 18865 | void svstnt1_vnum_u32_x4(svcount_t, uint32_t *, int64_t, svuint32x4_t); | |
| 18866 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x4))) | |
| 18867 | void svstnt1_vnum_f32_x4(svcount_t, float32_t *, int64_t, svfloat32x4_t); | |
| 18868 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x4))) | |
| 18869 | void svstnt1_vnum_s32_x4(svcount_t, int32_t *, int64_t, svint32x4_t); | |
| 18870 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_s64))) | |
| 18871 | svcount_t svwhilege_c8_s64(int64_t, int64_t, uint64_t); | |
| 18872 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_s64))) | |
| 18873 | svcount_t svwhilege_c32_s64(int64_t, int64_t, uint64_t); | |
| 18874 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_s64))) | |
| 18875 | svcount_t svwhilege_c64_s64(int64_t, int64_t, uint64_t); | |
| 18876 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_s64))) | |
| 18877 | svcount_t svwhilege_c16_s64(int64_t, int64_t, uint64_t); | |
| 18878 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_u64))) | |
| 18879 | svcount_t svwhilege_c8_u64(uint64_t, uint64_t, uint64_t); | |
| 18880 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_u64))) | |
| 18881 | svcount_t svwhilege_c32_u64(uint64_t, uint64_t, uint64_t); | |
| 18882 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_u64))) | |
| 18883 | svcount_t svwhilege_c64_u64(uint64_t, uint64_t, uint64_t); | |
| 18884 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_u64))) | |
| 18885 | svcount_t svwhilege_c16_u64(uint64_t, uint64_t, uint64_t); | |
| 18886 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_s64))) | |
| 18887 | svcount_t svwhilegt_c8_s64(int64_t, int64_t, uint64_t); | |
| 18888 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_s64))) | |
| 18889 | svcount_t svwhilegt_c32_s64(int64_t, int64_t, uint64_t); | |
| 18890 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_s64))) | |
| 18891 | svcount_t svwhilegt_c64_s64(int64_t, int64_t, uint64_t); | |
| 18892 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_s64))) | |
| 18893 | svcount_t svwhilegt_c16_s64(int64_t, int64_t, uint64_t); | |
| 18894 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_u64))) | |
| 18895 | svcount_t svwhilegt_c8_u64(uint64_t, uint64_t, uint64_t); | |
| 18896 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_u64))) | |
| 18897 | svcount_t svwhilegt_c32_u64(uint64_t, uint64_t, uint64_t); | |
| 18898 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_u64))) | |
| 18899 | svcount_t svwhilegt_c64_u64(uint64_t, uint64_t, uint64_t); | |
| 18900 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_u64))) | |
| 18901 | svcount_t svwhilegt_c16_u64(uint64_t, uint64_t, uint64_t); | |
| 18902 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_s64))) | |
| 18903 | svcount_t svwhilele_c8_s64(int64_t, int64_t, uint64_t); | |
| 18904 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_s64))) | |
| 18905 | svcount_t svwhilele_c32_s64(int64_t, int64_t, uint64_t); | |
| 18906 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_s64))) | |
| 18907 | svcount_t svwhilele_c64_s64(int64_t, int64_t, uint64_t); | |
| 18908 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_s64))) | |
| 18909 | svcount_t svwhilele_c16_s64(int64_t, int64_t, uint64_t); | |
| 18910 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_u64))) | |
| 18911 | svcount_t svwhilele_c8_u64(uint64_t, uint64_t, uint64_t); | |
| 18912 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_u64))) | |
| 18913 | svcount_t svwhilele_c32_u64(uint64_t, uint64_t, uint64_t); | |
| 18914 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_u64))) | |
| 18915 | svcount_t svwhilele_c64_u64(uint64_t, uint64_t, uint64_t); | |
| 18916 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_u64))) | |
| 18917 | svcount_t svwhilele_c16_u64(uint64_t, uint64_t, uint64_t); | |
| 18918 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_u64))) | |
| 18919 | svcount_t svwhilelt_c8_u64(uint64_t, uint64_t, uint64_t); | |
| 18920 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_u64))) | |
| 18921 | svcount_t svwhilelt_c32_u64(uint64_t, uint64_t, uint64_t); | |
| 18922 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_u64))) | |
| 18923 | svcount_t svwhilelt_c64_u64(uint64_t, uint64_t, uint64_t); | |
| 18924 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_u64))) | |
| 18925 | svcount_t svwhilelt_c16_u64(uint64_t, uint64_t, uint64_t); | |
| 18926 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_s64))) | |
| 18927 | svcount_t svwhilelt_c8_s64(int64_t, int64_t, uint64_t); | |
| 18928 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_s64))) | |
| 18929 | svcount_t svwhilelt_c32_s64(int64_t, int64_t, uint64_t); | |
| 18930 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_s64))) | |
| 18931 | svcount_t svwhilelt_c64_s64(int64_t, int64_t, uint64_t); | |
| 18932 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_s64))) | |
| 18933 | svcount_t svwhilelt_c16_s64(int64_t, int64_t, uint64_t); | |
| 18934 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x2))) | |
| 18935 | svuint8x2_t svld1_x2(svcount_t, uint8_t const *); | |
| 18936 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x2))) | |
| 18937 | svint8x2_t svld1_x2(svcount_t, int8_t const *); | |
| 18938 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x2))) | |
| 18939 | svmfloat8x2_t svld1_x2(svcount_t, mfloat8_t const *); | |
| 18940 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x2))) | |
| 18941 | svuint64x2_t svld1_x2(svcount_t, uint64_t const *); | |
| 18942 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x2))) | |
| 18943 | svfloat64x2_t svld1_x2(svcount_t, float64_t const *); | |
| 18944 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x2))) | |
| 18945 | svint64x2_t svld1_x2(svcount_t, int64_t const *); | |
| 18946 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x2))) | |
| 18947 | svuint16x2_t svld1_x2(svcount_t, uint16_t const *); | |
| 18948 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x2))) | |
| 18949 | svbfloat16x2_t svld1_x2(svcount_t, bfloat16_t const *); | |
| 18950 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x2))) | |
| 18951 | svfloat16x2_t svld1_x2(svcount_t, float16_t const *); | |
| 18952 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x2))) | |
| 18953 | svint16x2_t svld1_x2(svcount_t, int16_t const *); | |
| 18954 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x2))) | |
| 18955 | svuint32x2_t svld1_x2(svcount_t, uint32_t const *); | |
| 18956 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x2))) | |
| 18957 | svfloat32x2_t svld1_x2(svcount_t, float32_t const *); | |
| 18958 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x2))) | |
| 18959 | svint32x2_t svld1_x2(svcount_t, int32_t const *); | |
| 18960 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u8_x4))) | |
| 18961 | svuint8x4_t svld1_x4(svcount_t, uint8_t const *); | |
| 18962 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s8_x4))) | |
| 18963 | svint8x4_t svld1_x4(svcount_t, int8_t const *); | |
| 18964 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_mf8_x4))) | |
| 18965 | svmfloat8x4_t svld1_x4(svcount_t, mfloat8_t const *); | |
| 18966 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u64_x4))) | |
| 18967 | svuint64x4_t svld1_x4(svcount_t, uint64_t const *); | |
| 18968 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f64_x4))) | |
| 18969 | svfloat64x4_t svld1_x4(svcount_t, float64_t const *); | |
| 18970 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s64_x4))) | |
| 18971 | svint64x4_t svld1_x4(svcount_t, int64_t const *); | |
| 18972 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u16_x4))) | |
| 18973 | svuint16x4_t svld1_x4(svcount_t, uint16_t const *); | |
| 18974 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_bf16_x4))) | |
| 18975 | svbfloat16x4_t svld1_x4(svcount_t, bfloat16_t const *); | |
| 18976 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f16_x4))) | |
| 18977 | svfloat16x4_t svld1_x4(svcount_t, float16_t const *); | |
| 18978 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s16_x4))) | |
| 18979 | svint16x4_t svld1_x4(svcount_t, int16_t const *); | |
| 18980 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_u32_x4))) | |
| 18981 | svuint32x4_t svld1_x4(svcount_t, uint32_t const *); | |
| 18982 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_f32_x4))) | |
| 18983 | svfloat32x4_t svld1_x4(svcount_t, float32_t const *); | |
| 18984 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_s32_x4))) | |
| 18985 | svint32x4_t svld1_x4(svcount_t, int32_t const *); | |
| 18986 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x2))) | |
| 18987 | svuint8x2_t svld1_vnum_x2(svcount_t, uint8_t const *, int64_t); | |
| 18988 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x2))) | |
| 18989 | svint8x2_t svld1_vnum_x2(svcount_t, int8_t const *, int64_t); | |
| 18990 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x2))) | |
| 18991 | svmfloat8x2_t svld1_vnum_x2(svcount_t, mfloat8_t const *, int64_t); | |
| 18992 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x2))) | |
| 18993 | svuint64x2_t svld1_vnum_x2(svcount_t, uint64_t const *, int64_t); | |
| 18994 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x2))) | |
| 18995 | svfloat64x2_t svld1_vnum_x2(svcount_t, float64_t const *, int64_t); | |
| 18996 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x2))) | |
| 18997 | svint64x2_t svld1_vnum_x2(svcount_t, int64_t const *, int64_t); | |
| 18998 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x2))) | |
| 18999 | svuint16x2_t svld1_vnum_x2(svcount_t, uint16_t const *, int64_t); | |
| 19000 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x2))) | |
| 19001 | svbfloat16x2_t svld1_vnum_x2(svcount_t, bfloat16_t const *, int64_t); | |
| 19002 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x2))) | |
| 19003 | svfloat16x2_t svld1_vnum_x2(svcount_t, float16_t const *, int64_t); | |
| 19004 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x2))) | |
| 19005 | svint16x2_t svld1_vnum_x2(svcount_t, int16_t const *, int64_t); | |
| 19006 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x2))) | |
| 19007 | svuint32x2_t svld1_vnum_x2(svcount_t, uint32_t const *, int64_t); | |
| 19008 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x2))) | |
| 19009 | svfloat32x2_t svld1_vnum_x2(svcount_t, float32_t const *, int64_t); | |
| 19010 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x2))) | |
| 19011 | svint32x2_t svld1_vnum_x2(svcount_t, int32_t const *, int64_t); | |
| 19012 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u8_x4))) | |
| 19013 | svuint8x4_t svld1_vnum_x4(svcount_t, uint8_t const *, int64_t); | |
| 19014 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s8_x4))) | |
| 19015 | svint8x4_t svld1_vnum_x4(svcount_t, int8_t const *, int64_t); | |
| 19016 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_mf8_x4))) | |
| 19017 | svmfloat8x4_t svld1_vnum_x4(svcount_t, mfloat8_t const *, int64_t); | |
| 19018 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u64_x4))) | |
| 19019 | svuint64x4_t svld1_vnum_x4(svcount_t, uint64_t const *, int64_t); | |
| 19020 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f64_x4))) | |
| 19021 | svfloat64x4_t svld1_vnum_x4(svcount_t, float64_t const *, int64_t); | |
| 19022 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s64_x4))) | |
| 19023 | svint64x4_t svld1_vnum_x4(svcount_t, int64_t const *, int64_t); | |
| 19024 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u16_x4))) | |
| 19025 | svuint16x4_t svld1_vnum_x4(svcount_t, uint16_t const *, int64_t); | |
| 19026 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_bf16_x4))) | |
| 19027 | svbfloat16x4_t svld1_vnum_x4(svcount_t, bfloat16_t const *, int64_t); | |
| 19028 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f16_x4))) | |
| 19029 | svfloat16x4_t svld1_vnum_x4(svcount_t, float16_t const *, int64_t); | |
| 19030 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s16_x4))) | |
| 19031 | svint16x4_t svld1_vnum_x4(svcount_t, int16_t const *, int64_t); | |
| 19032 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_u32_x4))) | |
| 19033 | svuint32x4_t svld1_vnum_x4(svcount_t, uint32_t const *, int64_t); | |
| 19034 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_f32_x4))) | |
| 19035 | svfloat32x4_t svld1_vnum_x4(svcount_t, float32_t const *, int64_t); | |
| 19036 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svld1_vnum_s32_x4))) | |
| 19037 | svint32x4_t svld1_vnum_x4(svcount_t, int32_t const *, int64_t); | |
| 19038 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x2))) | |
| 19039 | svuint8x2_t svldnt1_x2(svcount_t, uint8_t const *); | |
| 19040 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x2))) | |
| 19041 | svint8x2_t svldnt1_x2(svcount_t, int8_t const *); | |
| 19042 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x2))) | |
| 19043 | svmfloat8x2_t svldnt1_x2(svcount_t, mfloat8_t const *); | |
| 19044 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x2))) | |
| 19045 | svuint64x2_t svldnt1_x2(svcount_t, uint64_t const *); | |
| 19046 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x2))) | |
| 19047 | svfloat64x2_t svldnt1_x2(svcount_t, float64_t const *); | |
| 19048 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x2))) | |
| 19049 | svint64x2_t svldnt1_x2(svcount_t, int64_t const *); | |
| 19050 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x2))) | |
| 19051 | svuint16x2_t svldnt1_x2(svcount_t, uint16_t const *); | |
| 19052 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x2))) | |
| 19053 | svbfloat16x2_t svldnt1_x2(svcount_t, bfloat16_t const *); | |
| 19054 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x2))) | |
| 19055 | svfloat16x2_t svldnt1_x2(svcount_t, float16_t const *); | |
| 19056 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x2))) | |
| 19057 | svint16x2_t svldnt1_x2(svcount_t, int16_t const *); | |
| 19058 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x2))) | |
| 19059 | svuint32x2_t svldnt1_x2(svcount_t, uint32_t const *); | |
| 19060 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x2))) | |
| 19061 | svfloat32x2_t svldnt1_x2(svcount_t, float32_t const *); | |
| 19062 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x2))) | |
| 19063 | svint32x2_t svldnt1_x2(svcount_t, int32_t const *); | |
| 19064 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u8_x4))) | |
| 19065 | svuint8x4_t svldnt1_x4(svcount_t, uint8_t const *); | |
| 19066 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s8_x4))) | |
| 19067 | svint8x4_t svldnt1_x4(svcount_t, int8_t const *); | |
| 19068 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_mf8_x4))) | |
| 19069 | svmfloat8x4_t svldnt1_x4(svcount_t, mfloat8_t const *); | |
| 19070 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u64_x4))) | |
| 19071 | svuint64x4_t svldnt1_x4(svcount_t, uint64_t const *); | |
| 19072 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f64_x4))) | |
| 19073 | svfloat64x4_t svldnt1_x4(svcount_t, float64_t const *); | |
| 19074 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s64_x4))) | |
| 19075 | svint64x4_t svldnt1_x4(svcount_t, int64_t const *); | |
| 19076 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u16_x4))) | |
| 19077 | svuint16x4_t svldnt1_x4(svcount_t, uint16_t const *); | |
| 19078 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_bf16_x4))) | |
| 19079 | svbfloat16x4_t svldnt1_x4(svcount_t, bfloat16_t const *); | |
| 19080 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f16_x4))) | |
| 19081 | svfloat16x4_t svldnt1_x4(svcount_t, float16_t const *); | |
| 19082 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s16_x4))) | |
| 19083 | svint16x4_t svldnt1_x4(svcount_t, int16_t const *); | |
| 19084 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_u32_x4))) | |
| 19085 | svuint32x4_t svldnt1_x4(svcount_t, uint32_t const *); | |
| 19086 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_f32_x4))) | |
| 19087 | svfloat32x4_t svldnt1_x4(svcount_t, float32_t const *); | |
| 19088 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_s32_x4))) | |
| 19089 | svint32x4_t svldnt1_x4(svcount_t, int32_t const *); | |
| 19090 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x2))) | |
| 19091 | svuint8x2_t svldnt1_vnum_x2(svcount_t, uint8_t const *, int64_t); | |
| 19092 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x2))) | |
| 19093 | svint8x2_t svldnt1_vnum_x2(svcount_t, int8_t const *, int64_t); | |
| 19094 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x2))) | |
| 19095 | svmfloat8x2_t svldnt1_vnum_x2(svcount_t, mfloat8_t const *, int64_t); | |
| 19096 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x2))) | |
| 19097 | svuint64x2_t svldnt1_vnum_x2(svcount_t, uint64_t const *, int64_t); | |
| 19098 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x2))) | |
| 19099 | svfloat64x2_t svldnt1_vnum_x2(svcount_t, float64_t const *, int64_t); | |
| 19100 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x2))) | |
| 19101 | svint64x2_t svldnt1_vnum_x2(svcount_t, int64_t const *, int64_t); | |
| 19102 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x2))) | |
| 19103 | svuint16x2_t svldnt1_vnum_x2(svcount_t, uint16_t const *, int64_t); | |
| 19104 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x2))) | |
| 19105 | svbfloat16x2_t svldnt1_vnum_x2(svcount_t, bfloat16_t const *, int64_t); | |
| 19106 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x2))) | |
| 19107 | svfloat16x2_t svldnt1_vnum_x2(svcount_t, float16_t const *, int64_t); | |
| 19108 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x2))) | |
| 19109 | svint16x2_t svldnt1_vnum_x2(svcount_t, int16_t const *, int64_t); | |
| 19110 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x2))) | |
| 19111 | svuint32x2_t svldnt1_vnum_x2(svcount_t, uint32_t const *, int64_t); | |
| 19112 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x2))) | |
| 19113 | svfloat32x2_t svldnt1_vnum_x2(svcount_t, float32_t const *, int64_t); | |
| 19114 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x2))) | |
| 19115 | svint32x2_t svldnt1_vnum_x2(svcount_t, int32_t const *, int64_t); | |
| 19116 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u8_x4))) | |
| 19117 | svuint8x4_t svldnt1_vnum_x4(svcount_t, uint8_t const *, int64_t); | |
| 19118 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s8_x4))) | |
| 19119 | svint8x4_t svldnt1_vnum_x4(svcount_t, int8_t const *, int64_t); | |
| 19120 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_mf8_x4))) | |
| 19121 | svmfloat8x4_t svldnt1_vnum_x4(svcount_t, mfloat8_t const *, int64_t); | |
| 19122 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u64_x4))) | |
| 19123 | svuint64x4_t svldnt1_vnum_x4(svcount_t, uint64_t const *, int64_t); | |
| 19124 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f64_x4))) | |
| 19125 | svfloat64x4_t svldnt1_vnum_x4(svcount_t, float64_t const *, int64_t); | |
| 19126 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s64_x4))) | |
| 19127 | svint64x4_t svldnt1_vnum_x4(svcount_t, int64_t const *, int64_t); | |
| 19128 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u16_x4))) | |
| 19129 | svuint16x4_t svldnt1_vnum_x4(svcount_t, uint16_t const *, int64_t); | |
| 19130 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_bf16_x4))) | |
| 19131 | svbfloat16x4_t svldnt1_vnum_x4(svcount_t, bfloat16_t const *, int64_t); | |
| 19132 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f16_x4))) | |
| 19133 | svfloat16x4_t svldnt1_vnum_x4(svcount_t, float16_t const *, int64_t); | |
| 19134 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s16_x4))) | |
| 19135 | svint16x4_t svldnt1_vnum_x4(svcount_t, int16_t const *, int64_t); | |
| 19136 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_u32_x4))) | |
| 19137 | svuint32x4_t svldnt1_vnum_x4(svcount_t, uint32_t const *, int64_t); | |
| 19138 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_f32_x4))) | |
| 19139 | svfloat32x4_t svldnt1_vnum_x4(svcount_t, float32_t const *, int64_t); | |
| 19140 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svldnt1_vnum_s32_x4))) | |
| 19141 | svint32x4_t svldnt1_vnum_x4(svcount_t, int32_t const *, int64_t); | |
| 19142 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_b))) | |
| 19143 | svbool_t svreinterpret(svcount_t); | |
| 19144 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svreinterpret_c))) | |
| 19145 | svcount_t svreinterpret(svbool_t); | |
| 19146 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x2))) | |
| 19147 | void svst1(svcount_t, uint8_t *, svuint8x2_t); | |
| 19148 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x2))) | |
| 19149 | void svst1(svcount_t, int8_t *, svint8x2_t); | |
| 19150 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x2))) | |
| 19151 | void svst1(svcount_t, mfloat8_t *, svmfloat8x2_t); | |
| 19152 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x2))) | |
| 19153 | void svst1(svcount_t, uint64_t *, svuint64x2_t); | |
| 19154 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x2))) | |
| 19155 | void svst1(svcount_t, float64_t *, svfloat64x2_t); | |
| 19156 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x2))) | |
| 19157 | void svst1(svcount_t, int64_t *, svint64x2_t); | |
| 19158 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x2))) | |
| 19159 | void svst1(svcount_t, uint16_t *, svuint16x2_t); | |
| 19160 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x2))) | |
| 19161 | void svst1(svcount_t, bfloat16_t *, svbfloat16x2_t); | |
| 19162 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x2))) | |
| 19163 | void svst1(svcount_t, float16_t *, svfloat16x2_t); | |
| 19164 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x2))) | |
| 19165 | void svst1(svcount_t, int16_t *, svint16x2_t); | |
| 19166 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x2))) | |
| 19167 | void svst1(svcount_t, uint32_t *, svuint32x2_t); | |
| 19168 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x2))) | |
| 19169 | void svst1(svcount_t, float32_t *, svfloat32x2_t); | |
| 19170 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x2))) | |
| 19171 | void svst1(svcount_t, int32_t *, svint32x2_t); | |
| 19172 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u8_x4))) | |
| 19173 | void svst1(svcount_t, uint8_t *, svuint8x4_t); | |
| 19174 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s8_x4))) | |
| 19175 | void svst1(svcount_t, int8_t *, svint8x4_t); | |
| 19176 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_mf8_x4))) | |
| 19177 | void svst1(svcount_t, mfloat8_t *, svmfloat8x4_t); | |
| 19178 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u64_x4))) | |
| 19179 | void svst1(svcount_t, uint64_t *, svuint64x4_t); | |
| 19180 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f64_x4))) | |
| 19181 | void svst1(svcount_t, float64_t *, svfloat64x4_t); | |
| 19182 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s64_x4))) | |
| 19183 | void svst1(svcount_t, int64_t *, svint64x4_t); | |
| 19184 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u16_x4))) | |
| 19185 | void svst1(svcount_t, uint16_t *, svuint16x4_t); | |
| 19186 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_bf16_x4))) | |
| 19187 | void svst1(svcount_t, bfloat16_t *, svbfloat16x4_t); | |
| 19188 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f16_x4))) | |
| 19189 | void svst1(svcount_t, float16_t *, svfloat16x4_t); | |
| 19190 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s16_x4))) | |
| 19191 | void svst1(svcount_t, int16_t *, svint16x4_t); | |
| 19192 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_u32_x4))) | |
| 19193 | void svst1(svcount_t, uint32_t *, svuint32x4_t); | |
| 19194 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_f32_x4))) | |
| 19195 | void svst1(svcount_t, float32_t *, svfloat32x4_t); | |
| 19196 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_s32_x4))) | |
| 19197 | void svst1(svcount_t, int32_t *, svint32x4_t); | |
| 19198 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x2))) | |
| 19199 | void svst1_vnum(svcount_t, uint8_t *, int64_t, svuint8x2_t); | |
| 19200 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x2))) | |
| 19201 | void svst1_vnum(svcount_t, int8_t *, int64_t, svint8x2_t); | |
| 19202 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x2))) | |
| 19203 | void svst1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t); | |
| 19204 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x2))) | |
| 19205 | void svst1_vnum(svcount_t, uint64_t *, int64_t, svuint64x2_t); | |
| 19206 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x2))) | |
| 19207 | void svst1_vnum(svcount_t, float64_t *, int64_t, svfloat64x2_t); | |
| 19208 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x2))) | |
| 19209 | void svst1_vnum(svcount_t, int64_t *, int64_t, svint64x2_t); | |
| 19210 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x2))) | |
| 19211 | void svst1_vnum(svcount_t, uint16_t *, int64_t, svuint16x2_t); | |
| 19212 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x2))) | |
| 19213 | void svst1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t); | |
| 19214 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x2))) | |
| 19215 | void svst1_vnum(svcount_t, float16_t *, int64_t, svfloat16x2_t); | |
| 19216 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x2))) | |
| 19217 | void svst1_vnum(svcount_t, int16_t *, int64_t, svint16x2_t); | |
| 19218 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x2))) | |
| 19219 | void svst1_vnum(svcount_t, uint32_t *, int64_t, svuint32x2_t); | |
| 19220 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x2))) | |
| 19221 | void svst1_vnum(svcount_t, float32_t *, int64_t, svfloat32x2_t); | |
| 19222 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x2))) | |
| 19223 | void svst1_vnum(svcount_t, int32_t *, int64_t, svint32x2_t); | |
| 19224 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u8_x4))) | |
| 19225 | void svst1_vnum(svcount_t, uint8_t *, int64_t, svuint8x4_t); | |
| 19226 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s8_x4))) | |
| 19227 | void svst1_vnum(svcount_t, int8_t *, int64_t, svint8x4_t); | |
| 19228 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_mf8_x4))) | |
| 19229 | void svst1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t); | |
| 19230 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u64_x4))) | |
| 19231 | void svst1_vnum(svcount_t, uint64_t *, int64_t, svuint64x4_t); | |
| 19232 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f64_x4))) | |
| 19233 | void svst1_vnum(svcount_t, float64_t *, int64_t, svfloat64x4_t); | |
| 19234 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s64_x4))) | |
| 19235 | void svst1_vnum(svcount_t, int64_t *, int64_t, svint64x4_t); | |
| 19236 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u16_x4))) | |
| 19237 | void svst1_vnum(svcount_t, uint16_t *, int64_t, svuint16x4_t); | |
| 19238 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_bf16_x4))) | |
| 19239 | void svst1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t); | |
| 19240 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f16_x4))) | |
| 19241 | void svst1_vnum(svcount_t, float16_t *, int64_t, svfloat16x4_t); | |
| 19242 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s16_x4))) | |
| 19243 | void svst1_vnum(svcount_t, int16_t *, int64_t, svint16x4_t); | |
| 19244 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_u32_x4))) | |
| 19245 | void svst1_vnum(svcount_t, uint32_t *, int64_t, svuint32x4_t); | |
| 19246 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_f32_x4))) | |
| 19247 | void svst1_vnum(svcount_t, float32_t *, int64_t, svfloat32x4_t); | |
| 19248 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svst1_vnum_s32_x4))) | |
| 19249 | void svst1_vnum(svcount_t, int32_t *, int64_t, svint32x4_t); | |
| 19250 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x2))) | |
| 19251 | void svstnt1(svcount_t, uint8_t *, svuint8x2_t); | |
| 19252 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x2))) | |
| 19253 | void svstnt1(svcount_t, int8_t *, svint8x2_t); | |
| 19254 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x2))) | |
| 19255 | void svstnt1(svcount_t, mfloat8_t *, svmfloat8x2_t); | |
| 19256 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x2))) | |
| 19257 | void svstnt1(svcount_t, uint64_t *, svuint64x2_t); | |
| 19258 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x2))) | |
| 19259 | void svstnt1(svcount_t, float64_t *, svfloat64x2_t); | |
| 19260 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x2))) | |
| 19261 | void svstnt1(svcount_t, int64_t *, svint64x2_t); | |
| 19262 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x2))) | |
| 19263 | void svstnt1(svcount_t, uint16_t *, svuint16x2_t); | |
| 19264 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x2))) | |
| 19265 | void svstnt1(svcount_t, bfloat16_t *, svbfloat16x2_t); | |
| 19266 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x2))) | |
| 19267 | void svstnt1(svcount_t, float16_t *, svfloat16x2_t); | |
| 19268 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x2))) | |
| 19269 | void svstnt1(svcount_t, int16_t *, svint16x2_t); | |
| 19270 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x2))) | |
| 19271 | void svstnt1(svcount_t, uint32_t *, svuint32x2_t); | |
| 19272 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x2))) | |
| 19273 | void svstnt1(svcount_t, float32_t *, svfloat32x2_t); | |
| 19274 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x2))) | |
| 19275 | void svstnt1(svcount_t, int32_t *, svint32x2_t); | |
| 19276 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u8_x4))) | |
| 19277 | void svstnt1(svcount_t, uint8_t *, svuint8x4_t); | |
| 19278 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s8_x4))) | |
| 19279 | void svstnt1(svcount_t, int8_t *, svint8x4_t); | |
| 19280 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_mf8_x4))) | |
| 19281 | void svstnt1(svcount_t, mfloat8_t *, svmfloat8x4_t); | |
| 19282 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u64_x4))) | |
| 19283 | void svstnt1(svcount_t, uint64_t *, svuint64x4_t); | |
| 19284 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f64_x4))) | |
| 19285 | void svstnt1(svcount_t, float64_t *, svfloat64x4_t); | |
| 19286 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s64_x4))) | |
| 19287 | void svstnt1(svcount_t, int64_t *, svint64x4_t); | |
| 19288 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u16_x4))) | |
| 19289 | void svstnt1(svcount_t, uint16_t *, svuint16x4_t); | |
| 19290 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_bf16_x4))) | |
| 19291 | void svstnt1(svcount_t, bfloat16_t *, svbfloat16x4_t); | |
| 19292 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f16_x4))) | |
| 19293 | void svstnt1(svcount_t, float16_t *, svfloat16x4_t); | |
| 19294 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s16_x4))) | |
| 19295 | void svstnt1(svcount_t, int16_t *, svint16x4_t); | |
| 19296 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_u32_x4))) | |
| 19297 | void svstnt1(svcount_t, uint32_t *, svuint32x4_t); | |
| 19298 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_f32_x4))) | |
| 19299 | void svstnt1(svcount_t, float32_t *, svfloat32x4_t); | |
| 19300 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_s32_x4))) | |
| 19301 | void svstnt1(svcount_t, int32_t *, svint32x4_t); | |
| 19302 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x2))) | |
| 19303 | void svstnt1_vnum(svcount_t, uint8_t *, int64_t, svuint8x2_t); | |
| 19304 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x2))) | |
| 19305 | void svstnt1_vnum(svcount_t, int8_t *, int64_t, svint8x2_t); | |
| 19306 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x2))) | |
| 19307 | void svstnt1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x2_t); | |
| 19308 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x2))) | |
| 19309 | void svstnt1_vnum(svcount_t, uint64_t *, int64_t, svuint64x2_t); | |
| 19310 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x2))) | |
| 19311 | void svstnt1_vnum(svcount_t, float64_t *, int64_t, svfloat64x2_t); | |
| 19312 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x2))) | |
| 19313 | void svstnt1_vnum(svcount_t, int64_t *, int64_t, svint64x2_t); | |
| 19314 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x2))) | |
| 19315 | void svstnt1_vnum(svcount_t, uint16_t *, int64_t, svuint16x2_t); | |
| 19316 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x2))) | |
| 19317 | void svstnt1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x2_t); | |
| 19318 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x2))) | |
| 19319 | void svstnt1_vnum(svcount_t, float16_t *, int64_t, svfloat16x2_t); | |
| 19320 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x2))) | |
| 19321 | void svstnt1_vnum(svcount_t, int16_t *, int64_t, svint16x2_t); | |
| 19322 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x2))) | |
| 19323 | void svstnt1_vnum(svcount_t, uint32_t *, int64_t, svuint32x2_t); | |
| 19324 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x2))) | |
| 19325 | void svstnt1_vnum(svcount_t, float32_t *, int64_t, svfloat32x2_t); | |
| 19326 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x2))) | |
| 19327 | void svstnt1_vnum(svcount_t, int32_t *, int64_t, svint32x2_t); | |
| 19328 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u8_x4))) | |
| 19329 | void svstnt1_vnum(svcount_t, uint8_t *, int64_t, svuint8x4_t); | |
| 19330 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s8_x4))) | |
| 19331 | void svstnt1_vnum(svcount_t, int8_t *, int64_t, svint8x4_t); | |
| 19332 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_mf8_x4))) | |
| 19333 | void svstnt1_vnum(svcount_t, mfloat8_t *, int64_t, svmfloat8x4_t); | |
| 19334 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u64_x4))) | |
| 19335 | void svstnt1_vnum(svcount_t, uint64_t *, int64_t, svuint64x4_t); | |
| 19336 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f64_x4))) | |
| 19337 | void svstnt1_vnum(svcount_t, float64_t *, int64_t, svfloat64x4_t); | |
| 19338 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s64_x4))) | |
| 19339 | void svstnt1_vnum(svcount_t, int64_t *, int64_t, svint64x4_t); | |
| 19340 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u16_x4))) | |
| 19341 | void svstnt1_vnum(svcount_t, uint16_t *, int64_t, svuint16x4_t); | |
| 19342 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_bf16_x4))) | |
| 19343 | void svstnt1_vnum(svcount_t, bfloat16_t *, int64_t, svbfloat16x4_t); | |
| 19344 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f16_x4))) | |
| 19345 | void svstnt1_vnum(svcount_t, float16_t *, int64_t, svfloat16x4_t); | |
| 19346 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s16_x4))) | |
| 19347 | void svstnt1_vnum(svcount_t, int16_t *, int64_t, svint16x4_t); | |
| 19348 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_u32_x4))) | |
| 19349 | void svstnt1_vnum(svcount_t, uint32_t *, int64_t, svuint32x4_t); | |
| 19350 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_f32_x4))) | |
| 19351 | void svstnt1_vnum(svcount_t, float32_t *, int64_t, svfloat32x4_t); | |
| 19352 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svstnt1_vnum_s32_x4))) | |
| 19353 | void svstnt1_vnum(svcount_t, int32_t *, int64_t, svint32x4_t); | |
| 19354 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_s64))) | |
| 19355 | svcount_t svwhilege_c8(int64_t, int64_t, uint64_t); | |
| 19356 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_s64))) | |
| 19357 | svcount_t svwhilege_c32(int64_t, int64_t, uint64_t); | |
| 19358 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_s64))) | |
| 19359 | svcount_t svwhilege_c64(int64_t, int64_t, uint64_t); | |
| 19360 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_s64))) | |
| 19361 | svcount_t svwhilege_c16(int64_t, int64_t, uint64_t); | |
| 19362 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c8_u64))) | |
| 19363 | svcount_t svwhilege_c8(uint64_t, uint64_t, uint64_t); | |
| 19364 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c32_u64))) | |
| 19365 | svcount_t svwhilege_c32(uint64_t, uint64_t, uint64_t); | |
| 19366 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c64_u64))) | |
| 19367 | svcount_t svwhilege_c64(uint64_t, uint64_t, uint64_t); | |
| 19368 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilege_c16_u64))) | |
| 19369 | svcount_t svwhilege_c16(uint64_t, uint64_t, uint64_t); | |
| 19370 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_s64))) | |
| 19371 | svcount_t svwhilegt_c8(int64_t, int64_t, uint64_t); | |
| 19372 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_s64))) | |
| 19373 | svcount_t svwhilegt_c32(int64_t, int64_t, uint64_t); | |
| 19374 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_s64))) | |
| 19375 | svcount_t svwhilegt_c64(int64_t, int64_t, uint64_t); | |
| 19376 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_s64))) | |
| 19377 | svcount_t svwhilegt_c16(int64_t, int64_t, uint64_t); | |
| 19378 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c8_u64))) | |
| 19379 | svcount_t svwhilegt_c8(uint64_t, uint64_t, uint64_t); | |
| 19380 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c32_u64))) | |
| 19381 | svcount_t svwhilegt_c32(uint64_t, uint64_t, uint64_t); | |
| 19382 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c64_u64))) | |
| 19383 | svcount_t svwhilegt_c64(uint64_t, uint64_t, uint64_t); | |
| 19384 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilegt_c16_u64))) | |
| 19385 | svcount_t svwhilegt_c16(uint64_t, uint64_t, uint64_t); | |
| 19386 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_s64))) | |
| 19387 | svcount_t svwhilele_c8(int64_t, int64_t, uint64_t); | |
| 19388 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_s64))) | |
| 19389 | svcount_t svwhilele_c32(int64_t, int64_t, uint64_t); | |
| 19390 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_s64))) | |
| 19391 | svcount_t svwhilele_c64(int64_t, int64_t, uint64_t); | |
| 19392 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_s64))) | |
| 19393 | svcount_t svwhilele_c16(int64_t, int64_t, uint64_t); | |
| 19394 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c8_u64))) | |
| 19395 | svcount_t svwhilele_c8(uint64_t, uint64_t, uint64_t); | |
| 19396 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c32_u64))) | |
| 19397 | svcount_t svwhilele_c32(uint64_t, uint64_t, uint64_t); | |
| 19398 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c64_u64))) | |
| 19399 | svcount_t svwhilele_c64(uint64_t, uint64_t, uint64_t); | |
| 19400 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilele_c16_u64))) | |
| 19401 | svcount_t svwhilele_c16(uint64_t, uint64_t, uint64_t); | |
| 19402 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_u64))) | |
| 19403 | svcount_t svwhilelt_c8(uint64_t, uint64_t, uint64_t); | |
| 19404 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_u64))) | |
| 19405 | svcount_t svwhilelt_c32(uint64_t, uint64_t, uint64_t); | |
| 19406 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_u64))) | |
| 19407 | svcount_t svwhilelt_c64(uint64_t, uint64_t, uint64_t); | |
| 19408 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_u64))) | |
| 19409 | svcount_t svwhilelt_c16(uint64_t, uint64_t, uint64_t); | |
| 19410 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c8_s64))) | |
| 19411 | svcount_t svwhilelt_c8(int64_t, int64_t, uint64_t); | |
| 19412 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c32_s64))) | |
| 19413 | svcount_t svwhilelt_c32(int64_t, int64_t, uint64_t); | |
| 19414 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c64_s64))) | |
| 19415 | svcount_t svwhilelt_c64(int64_t, int64_t, uint64_t); | |
| 19416 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svwhilelt_c16_s64))) | |
| 19417 | svcount_t svwhilelt_c16(int64_t, int64_t, uint64_t); | |
| 19062 | 19418 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svabd_n_f64_m))) |
| 19063 | 19419 | svfloat64_t svabd_n_f64_m(svbool_t, svfloat64_t, float64_t); |
| 19064 | 19420 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svabd_n_f32_m))) |
| ... | ... | @@ -31877,6 +32233,30 @@ __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpa_f32))) |
| 31877 | 32233 | svfloat32_t svexpa(svuint32_t); |
| 31878 | 32234 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svexpa_f16))) |
| 31879 | 32235 | svfloat16_t svexpa(svuint16_t); |
| 32236 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u32))) | |
| 32237 | svuint32_t svcompact_u32(svbool_t, svuint32_t); | |
| 32238 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u64))) | |
| 32239 | svuint64_t svcompact_u64(svbool_t, svuint64_t); | |
| 32240 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f64))) | |
| 32241 | svfloat64_t svcompact_f64(svbool_t, svfloat64_t); | |
| 32242 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f32))) | |
| 32243 | svfloat32_t svcompact_f32(svbool_t, svfloat32_t); | |
| 32244 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s32))) | |
| 32245 | svint32_t svcompact_s32(svbool_t, svint32_t); | |
| 32246 | __ai __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s64))) | |
| 32247 | svint64_t svcompact_s64(svbool_t, svint64_t); | |
| 32248 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u32))) | |
| 32249 | svuint32_t svcompact(svbool_t, svuint32_t); | |
| 32250 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_u64))) | |
| 32251 | svuint64_t svcompact(svbool_t, svuint64_t); | |
| 32252 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f64))) | |
| 32253 | svfloat64_t svcompact(svbool_t, svfloat64_t); | |
| 32254 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_f32))) | |
| 32255 | svfloat32_t svcompact(svbool_t, svfloat32_t); | |
| 32256 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s32))) | |
| 32257 | svint32_t svcompact(svbool_t, svint32_t); | |
| 32258 | __aio __attribute__((__clang_arm_builtin_alias(__builtin_sve_svcompact_s64))) | |
| 32259 | svint64_t svcompact(svbool_t, svint64_t); | |
| 31880 | 32260 | #define svcvtnt_bf16_x svcvtnt_bf16_m |
| 31881 | 32261 | #define svcvtnt_bf16_f32_x svcvtnt_bf16_f32_m |
| 31882 | 32262 | #define svcvtnt_f16_x svcvtnt_f16_m |
lib/include/avx10_2_512bf16intrin.h+19-12| ... | ... | @@ -21,9 +21,15 @@ typedef __bf16 __m512bh_u __attribute__((__vector_size__(64), __aligned__(1))); |
| 21 | 21 | |
| 22 | 22 | /* Define the default attributes for the functions in this file. */ |
| 23 | 23 | #define __DEFAULT_FN_ATTRS512 \ |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 25 | 25 | __min_vector_width__(512))) |
| 26 | 26 | |
| 27 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 28 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr | |
| 29 | #else | |
| 30 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 | |
| 31 | #endif | |
| 32 | ||
| 27 | 33 | static __inline __m512bh __DEFAULT_FN_ATTRS512 _mm512_setzero_pbh(void) { |
| 28 | 34 | return __builtin_bit_cast(__m512bh, _mm512_setzero_ps()); |
| 29 | 35 | } |
| ... | ... | @@ -167,13 +173,13 @@ _mm512_mask_blend_pbh(__mmask32 __U, __m512bh __A, __m512bh __W) { |
| 167 | 173 | (__v32bf)__A); |
| 168 | 174 | } |
| 169 | 175 | |
| 170 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 | |
| 176 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 171 | 177 | _mm512_permutex2var_pbh(__m512bh __A, __m512i __I, __m512bh __B) { |
| 172 | 178 | return (__m512bh)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I, |
| 173 | 179 | (__v32hi)__B); |
| 174 | 180 | } |
| 175 | 181 | |
| 176 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 | |
| 182 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 177 | 183 | _mm512_permutexvar_pbh(__m512i __A, __m512bh __B) { |
| 178 | 184 | return (__m512bh)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A); |
| 179 | 185 | } |
| ... | ... | @@ -423,7 +429,7 @@ _mm512_maskz_rsqrt_pbh(__mmask32 __U, __m512bh __A) { |
| 423 | 429 | (__v32bf)_mm512_setzero_pbh(), (__mmask32)(__U))) |
| 424 | 430 | |
| 425 | 431 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_sqrt_pbh(__m512bh __A) { |
| 426 | return (__m512bh)__builtin_ia32_vsqrtbf16512((__v32bf)__A); | |
| 432 | return __builtin_elementwise_sqrt(__A); | |
| 427 | 433 | } |
| 428 | 434 | |
| 429 | 435 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 |
| ... | ... | @@ -441,8 +447,8 @@ _mm512_maskz_sqrt_pbh(__mmask32 __U, __m512bh __A) { |
| 441 | 447 | |
| 442 | 448 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 |
| 443 | 449 | _mm512_fmadd_pbh(__m512bh __A, __m512bh __B, __m512bh __C) { |
| 444 | return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, (__v32bf)__B, | |
| 445 | (__v32bf)__C); | |
| 450 | return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, (__v32bf)__B, | |
| 451 | (__v32bf)__C); | |
| 446 | 452 | } |
| 447 | 453 | |
| 448 | 454 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 |
| ... | ... | @@ -469,8 +475,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fmadd_pbh( |
| 469 | 475 | |
| 470 | 476 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 |
| 471 | 477 | _mm512_fmsub_pbh(__m512bh __A, __m512bh __B, __m512bh __C) { |
| 472 | return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, (__v32bf)__B, | |
| 473 | -(__v32bf)__C); | |
| 478 | return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, (__v32bf)__B, | |
| 479 | -(__v32bf)__C); | |
| 474 | 480 | } |
| 475 | 481 | |
| 476 | 482 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 |
| ... | ... | @@ -497,8 +503,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fmsub_pbh( |
| 497 | 503 | |
| 498 | 504 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 |
| 499 | 505 | _mm512_fnmadd_pbh(__m512bh __A, __m512bh __B, __m512bh __C) { |
| 500 | return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, -(__v32bf)__B, | |
| 501 | (__v32bf)__C); | |
| 506 | return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, -(__v32bf)__B, | |
| 507 | (__v32bf)__C); | |
| 502 | 508 | } |
| 503 | 509 | |
| 504 | 510 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_mask_fnmadd_pbh( |
| ... | ... | @@ -527,8 +533,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fnmadd_pbh( |
| 527 | 533 | |
| 528 | 534 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 |
| 529 | 535 | _mm512_fnmsub_pbh(__m512bh __A, __m512bh __B, __m512bh __C) { |
| 530 | return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, -(__v32bf)__B, | |
| 531 | -(__v32bf)__C); | |
| 536 | return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, -(__v32bf)__B, | |
| 537 | -(__v32bf)__C); | |
| 532 | 538 | } |
| 533 | 539 | |
| 534 | 540 | static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_mask_fnmsub_pbh( |
| ... | ... | @@ -555,6 +561,7 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fnmsub_pbh( |
| 555 | 561 | (__v32bf)_mm512_setzero_pbh()); |
| 556 | 562 | } |
| 557 | 563 | |
| 564 | #undef __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 558 | 565 | #undef __DEFAULT_FN_ATTRS512 |
| 559 | 566 | |
| 560 | 567 | #endif |
lib/include/avx10_2_512convertintrin.h+1-1| ... | ... | @@ -18,7 +18,7 @@ |
| 18 | 18 | |
| 19 | 19 | /* Define the default attributes for the functions in this file. */ |
| 20 | 20 | #define __DEFAULT_FN_ATTRS512 \ |
| 21 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \ | |
| 21 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 22 | 22 | __min_vector_width__(512))) |
| 23 | 23 | |
| 24 | 24 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_cvtx2ps_ph(__m512 __A, |
lib/include/avx10_2_512niintrin.h+31-31| ... | ... | @@ -17,7 +17,7 @@ |
| 17 | 17 | #define __AVX10_2_512NIINTRIN_H |
| 18 | 18 | |
| 19 | 19 | #define __DEFAULT_FN_ATTRS \ |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \ | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 21 | 21 | __min_vector_width__(512))) |
| 22 | 22 | |
| 23 | 23 | /* VNNI FP16 */ |
| ... | ... | @@ -64,8 +64,8 @@ static __inline__ __m512 __DEFAULT_FN_ATTRS _mm512_maskz_dpph_ps(__mmask16 __U, |
| 64 | 64 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbssd_epi32(__m512i __W, |
| 65 | 65 | __m512i __A, |
| 66 | 66 | __m512i __B) { |
| 67 | return (__m512i)__builtin_ia32_vpdpbssd512((__v16si)__W, (__v16si)__A, | |
| 68 | (__v16si)__B); | |
| 67 | return (__m512i)__builtin_ia32_vpdpbssd512((__v16si)__W, (__v64qi)__A, | |
| 68 | (__v64qi)__B); | |
| 69 | 69 | } |
| 70 | 70 | |
| 71 | 71 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -84,8 +84,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbssd_epi32( |
| 84 | 84 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbssds_epi32(__m512i __W, |
| 85 | 85 | __m512i __A, |
| 86 | 86 | __m512i __B) { |
| 87 | return (__m512i)__builtin_ia32_vpdpbssds512((__v16si)__W, (__v16si)__A, | |
| 88 | (__v16si)__B); | |
| 87 | return (__m512i)__builtin_ia32_vpdpbssds512((__v16si)__W, (__v64qi)__A, | |
| 88 | (__v64qi)__B); | |
| 89 | 89 | } |
| 90 | 90 | |
| 91 | 91 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbssds_epi32( |
| ... | ... | @@ -104,8 +104,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbssds_epi32( |
| 104 | 104 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbsud_epi32(__m512i __W, |
| 105 | 105 | __m512i __A, |
| 106 | 106 | __m512i __B) { |
| 107 | return (__m512i)__builtin_ia32_vpdpbsud512((__v16si)__W, (__v16si)__A, | |
| 108 | (__v16si)__B); | |
| 107 | return (__m512i)__builtin_ia32_vpdpbsud512((__v16si)__W, (__v64qi)__A, | |
| 108 | (__v64qu)__B); | |
| 109 | 109 | } |
| 110 | 110 | |
| 111 | 111 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -124,8 +124,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbsud_epi32( |
| 124 | 124 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbsuds_epi32(__m512i __W, |
| 125 | 125 | __m512i __A, |
| 126 | 126 | __m512i __B) { |
| 127 | return (__m512i)__builtin_ia32_vpdpbsuds512((__v16si)__W, (__v16si)__A, | |
| 128 | (__v16si)__B); | |
| 127 | return (__m512i)__builtin_ia32_vpdpbsuds512((__v16si)__W, (__v64qi)__A, | |
| 128 | (__v64qu)__B); | |
| 129 | 129 | } |
| 130 | 130 | |
| 131 | 131 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbsuds_epi32( |
| ... | ... | @@ -144,8 +144,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbsuds_epi32( |
| 144 | 144 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbuud_epi32(__m512i __W, |
| 145 | 145 | __m512i __A, |
| 146 | 146 | __m512i __B) { |
| 147 | return (__m512i)__builtin_ia32_vpdpbuud512((__v16si)__W, (__v16si)__A, | |
| 148 | (__v16si)__B); | |
| 147 | return (__m512i)__builtin_ia32_vpdpbuud512((__v16si)__W, (__v64qu)__A, | |
| 148 | (__v64qu)__B); | |
| 149 | 149 | } |
| 150 | 150 | |
| 151 | 151 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -164,8 +164,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbuud_epi32( |
| 164 | 164 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpbuuds_epi32(__m512i __W, |
| 165 | 165 | __m512i __A, |
| 166 | 166 | __m512i __B) { |
| 167 | return (__m512i)__builtin_ia32_vpdpbuuds512((__v16si)__W, (__v16si)__A, | |
| 168 | (__v16si)__B); | |
| 167 | return (__m512i)__builtin_ia32_vpdpbuuds512((__v16si)__W, (__v64qu)__A, | |
| 168 | (__v64qu)__B); | |
| 169 | 169 | } |
| 170 | 170 | |
| 171 | 171 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpbuuds_epi32( |
| ... | ... | @@ -185,8 +185,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpbuuds_epi32( |
| 185 | 185 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwsud_epi32(__m512i __A, |
| 186 | 186 | __m512i __B, |
| 187 | 187 | __m512i __C) { |
| 188 | return (__m512i)__builtin_ia32_vpdpwsud512((__v16si)__A, (__v16si)__B, | |
| 189 | (__v16si)__C); | |
| 188 | return (__m512i)__builtin_ia32_vpdpwsud512((__v16si)__A, (__v32hi)__B, | |
| 189 | (__v32hu)__C); | |
| 190 | 190 | } |
| 191 | 191 | |
| 192 | 192 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -197,7 +197,7 @@ _mm512_mask_dpwsud_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { |
| 197 | 197 | } |
| 198 | 198 | |
| 199 | 199 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsud_epi32( |
| 200 | __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { | |
| 200 | __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) { | |
| 201 | 201 | return (__m512i)__builtin_ia32_selectd_512( |
| 202 | 202 | (__mmask16)__U, (__v16si)_mm512_dpwsud_epi32(__A, __B, __C), |
| 203 | 203 | (__v16si)_mm512_setzero_si512()); |
| ... | ... | @@ -206,8 +206,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsud_epi32( |
| 206 | 206 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwsuds_epi32(__m512i __A, |
| 207 | 207 | __m512i __B, |
| 208 | 208 | __m512i __C) { |
| 209 | return (__m512i)__builtin_ia32_vpdpwsuds512((__v16si)__A, (__v16si)__B, | |
| 210 | (__v16si)__C); | |
| 209 | return (__m512i)__builtin_ia32_vpdpwsuds512((__v16si)__A, (__v32hi)__B, | |
| 210 | (__v32hu)__C); | |
| 211 | 211 | } |
| 212 | 212 | |
| 213 | 213 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwsuds_epi32( |
| ... | ... | @@ -218,7 +218,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwsuds_epi32( |
| 218 | 218 | } |
| 219 | 219 | |
| 220 | 220 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsuds_epi32( |
| 221 | __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { | |
| 221 | __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) { | |
| 222 | 222 | return (__m512i)__builtin_ia32_selectd_512( |
| 223 | 223 | (__mmask16)__U, (__v16si)_mm512_dpwsuds_epi32(__A, __B, __C), |
| 224 | 224 | (__v16si)_mm512_setzero_si512()); |
| ... | ... | @@ -227,8 +227,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwsuds_epi32( |
| 227 | 227 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwusd_epi32(__m512i __A, |
| 228 | 228 | __m512i __B, |
| 229 | 229 | __m512i __C) { |
| 230 | return (__m512i)__builtin_ia32_vpdpwusd512((__v16si)__A, (__v16si)__B, | |
| 231 | (__v16si)__C); | |
| 230 | return (__m512i)__builtin_ia32_vpdpwusd512((__v16si)__A, (__v32hu)__B, | |
| 231 | (__v32hi)__C); | |
| 232 | 232 | } |
| 233 | 233 | |
| 234 | 234 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -239,7 +239,7 @@ _mm512_mask_dpwusd_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { |
| 239 | 239 | } |
| 240 | 240 | |
| 241 | 241 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusd_epi32( |
| 242 | __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { | |
| 242 | __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) { | |
| 243 | 243 | return (__m512i)__builtin_ia32_selectd_512( |
| 244 | 244 | (__mmask16)__U, (__v16si)_mm512_dpwusd_epi32(__A, __B, __C), |
| 245 | 245 | (__v16si)_mm512_setzero_si512()); |
| ... | ... | @@ -248,8 +248,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusd_epi32( |
| 248 | 248 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwusds_epi32(__m512i __A, |
| 249 | 249 | __m512i __B, |
| 250 | 250 | __m512i __C) { |
| 251 | return (__m512i)__builtin_ia32_vpdpwusds512((__v16si)__A, (__v16si)__B, | |
| 252 | (__v16si)__C); | |
| 251 | return (__m512i)__builtin_ia32_vpdpwusds512((__v16si)__A, (__v32hu)__B, | |
| 252 | (__v32hi)__C); | |
| 253 | 253 | } |
| 254 | 254 | |
| 255 | 255 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwusds_epi32( |
| ... | ... | @@ -260,7 +260,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwusds_epi32( |
| 260 | 260 | } |
| 261 | 261 | |
| 262 | 262 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusds_epi32( |
| 263 | __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { | |
| 263 | __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) { | |
| 264 | 264 | return (__m512i)__builtin_ia32_selectd_512( |
| 265 | 265 | (__mmask16)__U, (__v16si)_mm512_dpwusds_epi32(__A, __B, __C), |
| 266 | 266 | (__v16si)_mm512_setzero_si512()); |
| ... | ... | @@ -269,8 +269,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwusds_epi32( |
| 269 | 269 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwuud_epi32(__m512i __A, |
| 270 | 270 | __m512i __B, |
| 271 | 271 | __m512i __C) { |
| 272 | return (__m512i)__builtin_ia32_vpdpwuud512((__v16si)__A, (__v16si)__B, | |
| 273 | (__v16si)__C); | |
| 272 | return (__m512i)__builtin_ia32_vpdpwuud512((__v16si)__A, (__v32hu)__B, | |
| 273 | (__v32hu)__C); | |
| 274 | 274 | } |
| 275 | 275 | |
| 276 | 276 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -281,7 +281,7 @@ _mm512_mask_dpwuud_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { |
| 281 | 281 | } |
| 282 | 282 | |
| 283 | 283 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuud_epi32( |
| 284 | __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { | |
| 284 | __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) { | |
| 285 | 285 | return (__m512i)__builtin_ia32_selectd_512( |
| 286 | 286 | (__mmask16)__U, (__v16si)_mm512_dpwuud_epi32(__A, __B, __C), |
| 287 | 287 | (__v16si)_mm512_setzero_si512()); |
| ... | ... | @@ -290,8 +290,8 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuud_epi32( |
| 290 | 290 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_dpwuuds_epi32(__m512i __A, |
| 291 | 291 | __m512i __B, |
| 292 | 292 | __m512i __C) { |
| 293 | return (__m512i)__builtin_ia32_vpdpwuuds512((__v16si)__A, (__v16si)__B, | |
| 294 | (__v16si)__C); | |
| 293 | return (__m512i)__builtin_ia32_vpdpwuuds512((__v16si)__A, (__v32hu)__B, | |
| 294 | (__v32hu)__C); | |
| 295 | 295 | } |
| 296 | 296 | |
| 297 | 297 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwuuds_epi32( |
| ... | ... | @@ -302,7 +302,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_dpwuuds_epi32( |
| 302 | 302 | } |
| 303 | 303 | |
| 304 | 304 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_dpwuuds_epi32( |
| 305 | __m512i __A, __mmask16 __U, __m512i __B, __m512i __C) { | |
| 305 | __mmask16 __U, __m512i __A, __m512i __B, __m512i __C) { | |
| 306 | 306 | return (__m512i)__builtin_ia32_selectd_512( |
| 307 | 307 | (__mmask16)__U, (__v16si)_mm512_dpwuuds_epi32(__A, __B, __C), |
| 308 | 308 | (__v16si)_mm512_setzero_si512()); |
lib/include/avx10_2_512satcvtdsintrin.h+1-1| ... | ... | @@ -16,7 +16,7 @@ |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | 18 | #define __DEFAULT_FN_ATTRS \ |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 20 | 20 | __min_vector_width__(512))) |
| 21 | 21 | |
| 22 | 22 | // 512 bit : Double -> Int |
lib/include/avx10_2bf16intrin.h+54-45| ... | ... | @@ -21,12 +21,20 @@ typedef __bf16 __m256bh_u __attribute__((__vector_size__(32), __aligned__(1))); |
| 21 | 21 | |
| 22 | 22 | /* Define the default attributes for the functions in this file. */ |
| 23 | 23 | #define __DEFAULT_FN_ATTRS256 \ |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 25 | 25 | __min_vector_width__(256))) |
| 26 | 26 | #define __DEFAULT_FN_ATTRS128 \ |
| 27 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 27 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 28 | 28 | __min_vector_width__(128))) |
| 29 | 29 | |
| 30 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 31 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 32 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 33 | #else | |
| 34 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 35 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 36 | #endif | |
| 37 | ||
| 30 | 38 | static __inline __m256bh __DEFAULT_FN_ATTRS256 _mm256_setzero_pbh(void) { |
| 31 | 39 | return __builtin_bit_cast(__m256bh, _mm256_setzero_ps()); |
| 32 | 40 | } |
| ... | ... | @@ -213,12 +221,12 @@ static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_move_sbh(__m128bh __a, |
| 213 | 221 | return __a; |
| 214 | 222 | } |
| 215 | 223 | |
| 216 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 | |
| 224 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 217 | 225 | _mm_mask_move_sbh(__m128bh __W, __mmask8 __U, __m128bh __A, __m128bh __B) { |
| 218 | 226 | return __builtin_ia32_selectsbf_128(__U, _mm_move_sbh(__A, __B), __W); |
| 219 | 227 | } |
| 220 | 228 | |
| 221 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 | |
| 229 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 222 | 230 | _mm_maskz_move_sbh(__mmask8 __U, __m128bh __A, __m128bh __B) { |
| 223 | 231 | return __builtin_ia32_selectsbf_128(__U, _mm_move_sbh(__A, __B), |
| 224 | 232 | _mm_setzero_pbh()); |
| ... | ... | @@ -287,24 +295,24 @@ _mm256_mask_blend_pbh(__mmask16 __U, __m256bh __A, __m256bh __W) { |
| 287 | 295 | (__v16bf)__A); |
| 288 | 296 | } |
| 289 | 297 | |
| 290 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 | |
| 298 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 291 | 299 | _mm_permutex2var_pbh(__m128bh __A, __m128i __I, __m128bh __B) { |
| 292 | 300 | return (__m128bh)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I, |
| 293 | 301 | (__v8hi)__B); |
| 294 | 302 | } |
| 295 | 303 | |
| 296 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 | |
| 304 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 297 | 305 | _mm256_permutex2var_pbh(__m256bh __A, __m256i __I, __m256bh __B) { |
| 298 | 306 | return (__m256bh)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I, |
| 299 | 307 | (__v16hi)__B); |
| 300 | 308 | } |
| 301 | 309 | |
| 302 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 | |
| 310 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 303 | 311 | _mm_permutexvar_pbh(__m128i __A, __m128bh __B) { |
| 304 | 312 | return (__m128bh)__builtin_ia32_permvarhi128((__v8hi)__B, (__v8hi)__A); |
| 305 | 313 | } |
| 306 | 314 | |
| 307 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 | |
| 315 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 308 | 316 | _mm256_permutexvar_pbh(__m256i __A, __m256bh __B) { |
| 309 | 317 | return (__m256bh)__builtin_ia32_permvarhi256((__v16hi)__B, (__v16hi)__A); |
| 310 | 318 | } |
| ... | ... | @@ -519,34 +527,34 @@ _mm_maskz_min_pbh(__mmask8 __U, __m128bh __A, __m128bh __B) { |
| 519 | 527 | (__mmask8)__U, (__v8bf)_mm_min_pbh(__A, __B), (__v8bf)_mm_setzero_pbh()); |
| 520 | 528 | } |
| 521 | 529 | |
| 522 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comieq_sbh(__m128bh A, | |
| 523 | __m128bh B) { | |
| 524 | return __builtin_ia32_vcomisbf16eq((__v8bf)A, (__v8bf)B); | |
| 530 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comieq_sbh(__m128bh __A, | |
| 531 | __m128bh __B) { | |
| 532 | return __builtin_ia32_vcomisbf16eq((__v8bf)__A, (__v8bf)__B); | |
| 525 | 533 | } |
| 526 | 534 | |
| 527 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comilt_sbh(__m128bh A, | |
| 528 | __m128bh B) { | |
| 529 | return __builtin_ia32_vcomisbf16lt((__v8bf)A, (__v8bf)B); | |
| 535 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comilt_sbh(__m128bh __A, | |
| 536 | __m128bh __B) { | |
| 537 | return __builtin_ia32_vcomisbf16lt((__v8bf)__A, (__v8bf)__B); | |
| 530 | 538 | } |
| 531 | 539 | |
| 532 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comile_sbh(__m128bh A, | |
| 533 | __m128bh B) { | |
| 534 | return __builtin_ia32_vcomisbf16le((__v8bf)A, (__v8bf)B); | |
| 540 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comile_sbh(__m128bh __A, | |
| 541 | __m128bh __B) { | |
| 542 | return __builtin_ia32_vcomisbf16le((__v8bf)__A, (__v8bf)__B); | |
| 535 | 543 | } |
| 536 | 544 | |
| 537 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comigt_sbh(__m128bh A, | |
| 538 | __m128bh B) { | |
| 539 | return __builtin_ia32_vcomisbf16gt((__v8bf)A, (__v8bf)B); | |
| 545 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comigt_sbh(__m128bh __A, | |
| 546 | __m128bh __B) { | |
| 547 | return __builtin_ia32_vcomisbf16gt((__v8bf)__A, (__v8bf)__B); | |
| 540 | 548 | } |
| 541 | 549 | |
| 542 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comige_sbh(__m128bh A, | |
| 543 | __m128bh B) { | |
| 544 | return __builtin_ia32_vcomisbf16ge((__v8bf)A, (__v8bf)B); | |
| 550 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comige_sbh(__m128bh __A, | |
| 551 | __m128bh __B) { | |
| 552 | return __builtin_ia32_vcomisbf16ge((__v8bf)__A, (__v8bf)__B); | |
| 545 | 553 | } |
| 546 | 554 | |
| 547 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comineq_sbh(__m128bh A, | |
| 548 | __m128bh B) { | |
| 549 | return __builtin_ia32_vcomisbf16neq((__v8bf)A, (__v8bf)B); | |
| 555 | static __inline__ int __DEFAULT_FN_ATTRS128 _mm_comineq_sbh(__m128bh __A, | |
| 556 | __m128bh __B) { | |
| 557 | return __builtin_ia32_vcomisbf16neq((__v8bf)__A, (__v8bf)__B); | |
| 550 | 558 | } |
| 551 | 559 | |
| 552 | 560 | #define _mm256_cmp_pbh_mask(__A, __B, __P) \ |
| ... | ... | @@ -818,7 +826,7 @@ _mm_maskz_rsqrt_pbh(__mmask8 __U, __m128bh __A) { |
| 818 | 826 | (__v8bf)_mm_setzero_pbh(), (__mmask8)(__U))) |
| 819 | 827 | |
| 820 | 828 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_sqrt_pbh(__m256bh __A) { |
| 821 | return (__m256bh)__builtin_ia32_vsqrtbf16256((__v16bf)__A); | |
| 829 | return __builtin_elementwise_sqrt(__A); | |
| 822 | 830 | } |
| 823 | 831 | |
| 824 | 832 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
| ... | ... | @@ -835,7 +843,7 @@ _mm256_maskz_sqrt_pbh(__mmask16 __U, __m256bh __A) { |
| 835 | 843 | } |
| 836 | 844 | |
| 837 | 845 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_sqrt_pbh(__m128bh __A) { |
| 838 | return (__m128bh)__builtin_ia32_vsqrtbf16((__v8bf)__A); | |
| 846 | return __builtin_elementwise_sqrt(__A); | |
| 839 | 847 | } |
| 840 | 848 | |
| 841 | 849 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
| ... | ... | @@ -852,8 +860,8 @@ _mm_maskz_sqrt_pbh(__mmask8 __U, __m128bh __A) { |
| 852 | 860 | |
| 853 | 861 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
| 854 | 862 | _mm256_fmadd_pbh(__m256bh __A, __m256bh __B, __m256bh __C) { |
| 855 | return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, (__v16bf)__B, | |
| 856 | (__v16bf)__C); | |
| 863 | return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, (__v16bf)__B, | |
| 864 | (__v16bf)__C); | |
| 857 | 865 | } |
| 858 | 866 | |
| 859 | 867 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
| ... | ... | @@ -880,8 +888,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fmadd_pbh( |
| 880 | 888 | |
| 881 | 889 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
| 882 | 890 | _mm256_fmsub_pbh(__m256bh __A, __m256bh __B, __m256bh __C) { |
| 883 | return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, (__v16bf)__B, | |
| 884 | -(__v16bf)__C); | |
| 891 | return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, (__v16bf)__B, | |
| 892 | -(__v16bf)__C); | |
| 885 | 893 | } |
| 886 | 894 | |
| 887 | 895 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
| ... | ... | @@ -908,8 +916,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsub_pbh( |
| 908 | 916 | |
| 909 | 917 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
| 910 | 918 | _mm256_fnmadd_pbh(__m256bh __A, __m256bh __B, __m256bh __C) { |
| 911 | return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, -(__v16bf)__B, | |
| 912 | (__v16bf)__C); | |
| 919 | return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, -(__v16bf)__B, | |
| 920 | (__v16bf)__C); | |
| 913 | 921 | } |
| 914 | 922 | |
| 915 | 923 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_mask_fnmadd_pbh( |
| ... | ... | @@ -938,8 +946,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmadd_pbh( |
| 938 | 946 | |
| 939 | 947 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 |
| 940 | 948 | _mm256_fnmsub_pbh(__m256bh __A, __m256bh __B, __m256bh __C) { |
| 941 | return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, -(__v16bf)__B, | |
| 942 | -(__v16bf)__C); | |
| 949 | return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, -(__v16bf)__B, | |
| 950 | -(__v16bf)__C); | |
| 943 | 951 | } |
| 944 | 952 | |
| 945 | 953 | static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_mask_fnmsub_pbh( |
| ... | ... | @@ -969,8 +977,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmsub_pbh( |
| 969 | 977 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fmadd_pbh(__m128bh __A, |
| 970 | 978 | __m128bh __B, |
| 971 | 979 | __m128bh __C) { |
| 972 | return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, (__v8bf)__B, | |
| 973 | (__v8bf)__C); | |
| 980 | return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, (__v8bf)__B, | |
| 981 | (__v8bf)__C); | |
| 974 | 982 | } |
| 975 | 983 | |
| 976 | 984 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
| ... | ... | @@ -997,8 +1005,8 @@ _mm_maskz_fmadd_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) { |
| 997 | 1005 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fmsub_pbh(__m128bh __A, |
| 998 | 1006 | __m128bh __B, |
| 999 | 1007 | __m128bh __C) { |
| 1000 | return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, (__v8bf)__B, | |
| 1001 | -(__v8bf)__C); | |
| 1008 | return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, (__v8bf)__B, | |
| 1009 | -(__v8bf)__C); | |
| 1002 | 1010 | } |
| 1003 | 1011 | |
| 1004 | 1012 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
| ... | ... | @@ -1025,8 +1033,8 @@ _mm_maskz_fmsub_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) { |
| 1025 | 1033 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fnmadd_pbh(__m128bh __A, |
| 1026 | 1034 | __m128bh __B, |
| 1027 | 1035 | __m128bh __C) { |
| 1028 | return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, -(__v8bf)__B, | |
| 1029 | (__v8bf)__C); | |
| 1036 | return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, -(__v8bf)__B, | |
| 1037 | (__v8bf)__C); | |
| 1030 | 1038 | } |
| 1031 | 1039 | |
| 1032 | 1040 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
| ... | ... | @@ -1053,8 +1061,8 @@ _mm_maskz_fnmadd_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) { |
| 1053 | 1061 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fnmsub_pbh(__m128bh __A, |
| 1054 | 1062 | __m128bh __B, |
| 1055 | 1063 | __m128bh __C) { |
| 1056 | return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, -(__v8bf)__B, | |
| 1057 | -(__v8bf)__C); | |
| 1064 | return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, -(__v8bf)__B, | |
| 1065 | -(__v8bf)__C); | |
| 1058 | 1066 | } |
| 1059 | 1067 | |
| 1060 | 1068 | static __inline__ __m128bh __DEFAULT_FN_ATTRS128 |
| ... | ... | @@ -1080,6 +1088,7 @@ _mm_maskz_fnmsub_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) { |
| 1080 | 1088 | |
| 1081 | 1089 | #undef __DEFAULT_FN_ATTRS128 |
| 1082 | 1090 | #undef __DEFAULT_FN_ATTRS256 |
| 1083 | ||
| 1091 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1092 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1084 | 1093 | #endif |
| 1085 | 1094 | #endif |
lib/include/avx10_2convertintrin.h+2-2| ... | ... | @@ -18,10 +18,10 @@ |
| 18 | 18 | |
| 19 | 19 | /* Define the default attributes for the functions in this file. */ |
| 20 | 20 | #define __DEFAULT_FN_ATTRS128 \ |
| 21 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 21 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 22 | 22 | __min_vector_width__(128))) |
| 23 | 23 | #define __DEFAULT_FN_ATTRS256 \ |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 25 | 25 | __min_vector_width__(256))) |
| 26 | 26 | |
| 27 | 27 | // clang-format off |
lib/include/avx10_2copyintrin.h+1-1| ... | ... | @@ -16,7 +16,7 @@ |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | 18 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 20 | 20 | __min_vector_width__(128))) |
| 21 | 21 | |
| 22 | 22 | /// Constructs a 128-bit integer vector, setting the lower 32 bits to the |
lib/include/avx10_2niintrin.h+14-14| ... | ... | @@ -16,10 +16,10 @@ |
| 16 | 16 | #define __AVX10_2NIINTRIN_H |
| 17 | 17 | |
| 18 | 18 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 20 | 20 | __min_vector_width__(128))) |
| 21 | 21 | #define __DEFAULT_FN_ATTRS256 \ |
| 22 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 22 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 23 | 23 | __min_vector_width__(256))) |
| 24 | 24 | |
| 25 | 25 | /* VNNI FP16 */ |
| ... | ... | @@ -253,7 +253,7 @@ _mm_mask_dpwsud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { |
| 253 | 253 | } |
| 254 | 254 | |
| 255 | 255 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 256 | _mm_maskz_dpwsud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { | |
| 256 | _mm_maskz_dpwsud_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) { | |
| 257 | 257 | return (__m128i)__builtin_ia32_selectd_128( |
| 258 | 258 | (__mmask8)__U, (__v4si)_mm_dpwsud_epi32(__A, __B, __C), |
| 259 | 259 | (__v4si)_mm_setzero_si128()); |
| ... | ... | @@ -266,7 +266,7 @@ _mm256_mask_dpwsud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { |
| 266 | 266 | } |
| 267 | 267 | |
| 268 | 268 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 269 | _mm256_maskz_dpwsud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { | |
| 269 | _mm256_maskz_dpwsud_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) { | |
| 270 | 270 | return (__m256i)__builtin_ia32_selectd_256( |
| 271 | 271 | (__mmask8)__U, (__v8si)_mm256_dpwsud_epi32(__A, __B, __C), |
| 272 | 272 | (__v8si)_mm256_setzero_si256()); |
| ... | ... | @@ -279,7 +279,7 @@ _mm_mask_dpwsuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { |
| 279 | 279 | } |
| 280 | 280 | |
| 281 | 281 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 282 | _mm_maskz_dpwsuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { | |
| 282 | _mm_maskz_dpwsuds_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) { | |
| 283 | 283 | return (__m128i)__builtin_ia32_selectd_128( |
| 284 | 284 | (__mmask8)__U, (__v4si)_mm_dpwsuds_epi32(__A, __B, __C), |
| 285 | 285 | (__v4si)_mm_setzero_si128()); |
| ... | ... | @@ -292,7 +292,7 @@ _mm256_mask_dpwsuds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { |
| 292 | 292 | } |
| 293 | 293 | |
| 294 | 294 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwsuds_epi32( |
| 295 | __m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { | |
| 295 | __mmask8 __U, __m256i __A, __m256i __B, __m256i __C) { | |
| 296 | 296 | return (__m256i)__builtin_ia32_selectd_256( |
| 297 | 297 | (__mmask8)__U, (__v8si)_mm256_dpwsuds_epi32(__A, __B, __C), |
| 298 | 298 | (__v8si)_mm256_setzero_si256()); |
| ... | ... | @@ -305,7 +305,7 @@ _mm_mask_dpwusd_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { |
| 305 | 305 | } |
| 306 | 306 | |
| 307 | 307 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 308 | _mm_maskz_dpwusd_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { | |
| 308 | _mm_maskz_dpwusd_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) { | |
| 309 | 309 | return (__m128i)__builtin_ia32_selectd_128( |
| 310 | 310 | (__mmask8)__U, (__v4si)_mm_dpwusd_epi32(__A, __B, __C), |
| 311 | 311 | (__v4si)_mm_setzero_si128()); |
| ... | ... | @@ -318,7 +318,7 @@ _mm256_mask_dpwusd_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { |
| 318 | 318 | } |
| 319 | 319 | |
| 320 | 320 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 321 | _mm256_maskz_dpwusd_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { | |
| 321 | _mm256_maskz_dpwusd_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) { | |
| 322 | 322 | return (__m256i)__builtin_ia32_selectd_256( |
| 323 | 323 | (__mmask8)__U, (__v8si)_mm256_dpwusd_epi32(__A, __B, __C), |
| 324 | 324 | (__v8si)_mm256_setzero_si256()); |
| ... | ... | @@ -331,7 +331,7 @@ _mm_mask_dpwusds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { |
| 331 | 331 | } |
| 332 | 332 | |
| 333 | 333 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 334 | _mm_maskz_dpwusds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { | |
| 334 | _mm_maskz_dpwusds_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) { | |
| 335 | 335 | return (__m128i)__builtin_ia32_selectd_128( |
| 336 | 336 | (__mmask8)__U, (__v4si)_mm_dpwusds_epi32(__A, __B, __C), |
| 337 | 337 | (__v4si)_mm_setzero_si128()); |
| ... | ... | @@ -344,7 +344,7 @@ _mm256_mask_dpwusds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { |
| 344 | 344 | } |
| 345 | 345 | |
| 346 | 346 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwusds_epi32( |
| 347 | __m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { | |
| 347 | __mmask8 __U, __m256i __A, __m256i __B, __m256i __C) { | |
| 348 | 348 | return (__m256i)__builtin_ia32_selectd_256( |
| 349 | 349 | (__mmask8)__U, (__v8si)_mm256_dpwusds_epi32(__A, __B, __C), |
| 350 | 350 | (__v8si)_mm256_setzero_si256()); |
| ... | ... | @@ -357,7 +357,7 @@ _mm_mask_dpwuud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { |
| 357 | 357 | } |
| 358 | 358 | |
| 359 | 359 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 360 | _mm_maskz_dpwuud_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { | |
| 360 | _mm_maskz_dpwuud_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) { | |
| 361 | 361 | return (__m128i)__builtin_ia32_selectd_128( |
| 362 | 362 | (__mmask8)__U, (__v4si)_mm_dpwuud_epi32(__A, __B, __C), |
| 363 | 363 | (__v4si)_mm_setzero_si128()); |
| ... | ... | @@ -370,7 +370,7 @@ _mm256_mask_dpwuud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { |
| 370 | 370 | } |
| 371 | 371 | |
| 372 | 372 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 373 | _mm256_maskz_dpwuud_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { | |
| 373 | _mm256_maskz_dpwuud_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) { | |
| 374 | 374 | return (__m256i)__builtin_ia32_selectd_256( |
| 375 | 375 | (__mmask8)__U, (__v8si)_mm256_dpwuud_epi32(__A, __B, __C), |
| 376 | 376 | (__v8si)_mm256_setzero_si256()); |
| ... | ... | @@ -383,7 +383,7 @@ _mm_mask_dpwuuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { |
| 383 | 383 | } |
| 384 | 384 | |
| 385 | 385 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 386 | _mm_maskz_dpwuuds_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { | |
| 386 | _mm_maskz_dpwuuds_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) { | |
| 387 | 387 | return (__m128i)__builtin_ia32_selectd_128( |
| 388 | 388 | (__mmask8)__U, (__v4si)_mm_dpwuuds_epi32(__A, __B, __C), |
| 389 | 389 | (__v4si)_mm_setzero_si128()); |
| ... | ... | @@ -396,7 +396,7 @@ _mm256_mask_dpwuuds_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { |
| 396 | 396 | } |
| 397 | 397 | |
| 398 | 398 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_dpwuuds_epi32( |
| 399 | __m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { | |
| 399 | __mmask8 __U, __m256i __A, __m256i __B, __m256i __C) { | |
| 400 | 400 | return (__m256i)__builtin_ia32_selectd_256( |
| 401 | 401 | (__mmask8)__U, (__v8si)_mm256_dpwuuds_epi32(__A, __B, __C), |
| 402 | 402 | (__v8si)_mm256_setzero_si256()); |
lib/include/avx10_2satcvtdsintrin.h+2-2| ... | ... | @@ -17,11 +17,11 @@ |
| 17 | 17 | |
| 18 | 18 | /* Define the default attributes for the functions in this file. */ |
| 19 | 19 | #define __DEFAULT_FN_ATTRS256 \ |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 21 | 21 | __min_vector_width__(256))) |
| 22 | 22 | |
| 23 | 23 | #define __DEFAULT_FN_ATTRS128 \ |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx10.2"), \ | |
| 25 | 25 | __min_vector_width__(128))) |
| 26 | 26 | |
| 27 | 27 | #define _mm_cvtts_roundsd_i32(__A, __R) \ |
lib/include/avx2intrin.h+275-377| ... | ... | @@ -15,20 +15,19 @@ |
| 15 | 15 | #define __AVX2INTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 19 | #define __DEFAULT_FN_ATTRS256 \ | |
| 20 | __attribute__((__always_inline__, __nodebug__, \ | |
| 21 | __target__("avx2,no-evex512"), __min_vector_width__(256))) | |
| 22 | #define __DEFAULT_FN_ATTRS128 \ | |
| 23 | __attribute__((__always_inline__, __nodebug__, \ | |
| 24 | __target__("avx2,no-evex512"), __min_vector_width__(128))) | |
| 25 | #else | |
| 26 | 18 | #define __DEFAULT_FN_ATTRS256 \ |
| 27 | 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx2"), \ |
| 28 | 20 | __min_vector_width__(256))) |
| 29 | 21 | #define __DEFAULT_FN_ATTRS128 \ |
| 30 | 22 | __attribute__((__always_inline__, __nodebug__, __target__("avx2"), \ |
| 31 | 23 | __min_vector_width__(128))) |
| 24 | ||
| 25 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 26 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 27 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 28 | #else | |
| 29 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 30 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 32 | 31 | #endif |
| 33 | 32 | |
| 34 | 33 | /* SSE4 Multiple Packed Sums of Absolute Difference. */ |
| ... | ... | @@ -104,10 +103,9 @@ |
| 104 | 103 | /// \param __a |
| 105 | 104 | /// A 256-bit integer vector. |
| 106 | 105 | /// \returns A 256-bit integer vector containing the result. |
| 107 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 108 | _mm256_abs_epi8(__m256i __a) | |
| 109 | { | |
| 110 | return (__m256i)__builtin_elementwise_abs((__v32qs)__a); | |
| 106 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 107 | _mm256_abs_epi8(__m256i __a) { | |
| 108 | return (__m256i)__builtin_elementwise_abs((__v32qs)__a); | |
| 111 | 109 | } |
| 112 | 110 | |
| 113 | 111 | /// Computes the absolute value of each signed 16-bit element in the 256-bit |
| ... | ... | @@ -121,10 +119,9 @@ _mm256_abs_epi8(__m256i __a) |
| 121 | 119 | /// \param __a |
| 122 | 120 | /// A 256-bit vector of [16 x i16]. |
| 123 | 121 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 124 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 125 | _mm256_abs_epi16(__m256i __a) | |
| 126 | { | |
| 127 | return (__m256i)__builtin_elementwise_abs((__v16hi)__a); | |
| 122 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 123 | _mm256_abs_epi16(__m256i __a) { | |
| 124 | return (__m256i)__builtin_elementwise_abs((__v16hi)__a); | |
| 128 | 125 | } |
| 129 | 126 | |
| 130 | 127 | /// Computes the absolute value of each signed 32-bit element in the 256-bit |
| ... | ... | @@ -138,10 +135,9 @@ _mm256_abs_epi16(__m256i __a) |
| 138 | 135 | /// \param __a |
| 139 | 136 | /// A 256-bit vector of [8 x i32]. |
| 140 | 137 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 141 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 142 | _mm256_abs_epi32(__m256i __a) | |
| 143 | { | |
| 144 | return (__m256i)__builtin_elementwise_abs((__v8si)__a); | |
| 138 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 139 | _mm256_abs_epi32(__m256i __a) { | |
| 140 | return (__m256i)__builtin_elementwise_abs((__v8si)__a); | |
| 145 | 141 | } |
| 146 | 142 | |
| 147 | 143 | /// Converts the elements of two 256-bit vectors of [16 x i16] to 8-bit |
| ... | ... | @@ -169,9 +165,8 @@ _mm256_abs_epi32(__m256i __a) |
| 169 | 165 | /// A 256-bit vector of [16 x i16] used to generate result[127:64] and |
| 170 | 166 | /// result[255:192]. |
| 171 | 167 | /// \returns A 256-bit integer vector containing the result. |
| 172 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 173 | _mm256_packs_epi16(__m256i __a, __m256i __b) | |
| 174 | { | |
| 168 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 169 | _mm256_packs_epi16(__m256i __a, __m256i __b) { | |
| 175 | 170 | return (__m256i)__builtin_ia32_packsswb256((__v16hi)__a, (__v16hi)__b); |
| 176 | 171 | } |
| 177 | 172 | |
| ... | ... | @@ -201,9 +196,8 @@ _mm256_packs_epi16(__m256i __a, __m256i __b) |
| 201 | 196 | /// A 256-bit vector of [8 x i32] used to generate result[127:64] and |
| 202 | 197 | /// result[255:192]. |
| 203 | 198 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 204 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 205 | _mm256_packs_epi32(__m256i __a, __m256i __b) | |
| 206 | { | |
| 199 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 200 | _mm256_packs_epi32(__m256i __a, __m256i __b) { | |
| 207 | 201 | return (__m256i)__builtin_ia32_packssdw256((__v8si)__a, (__v8si)__b); |
| 208 | 202 | } |
| 209 | 203 | |
| ... | ... | @@ -232,9 +226,8 @@ _mm256_packs_epi32(__m256i __a, __m256i __b) |
| 232 | 226 | /// A 256-bit vector of [16 x i16] used to generate result[127:64] and |
| 233 | 227 | /// result[255:192]. |
| 234 | 228 | /// \returns A 256-bit integer vector containing the result. |
| 235 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 236 | _mm256_packus_epi16(__m256i __a, __m256i __b) | |
| 237 | { | |
| 229 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 230 | _mm256_packus_epi16(__m256i __a, __m256i __b) { | |
| 238 | 231 | return (__m256i)__builtin_ia32_packuswb256((__v16hi)__a, (__v16hi)__b); |
| 239 | 232 | } |
| 240 | 233 | |
| ... | ... | @@ -264,9 +257,8 @@ _mm256_packus_epi16(__m256i __a, __m256i __b) |
| 264 | 257 | /// A 256-bit vector of [8 x i32] used to generate result[127:64] and |
| 265 | 258 | /// result[255:192]. |
| 266 | 259 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 267 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 268 | _mm256_packus_epi32(__m256i __V1, __m256i __V2) | |
| 269 | { | |
| 260 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 261 | _mm256_packus_epi32(__m256i __V1, __m256i __V2) { | |
| 270 | 262 | return (__m256i) __builtin_ia32_packusdw256((__v8si)__V1, (__v8si)__V2); |
| 271 | 263 | } |
| 272 | 264 | |
| ... | ... | @@ -283,9 +275,8 @@ _mm256_packus_epi32(__m256i __V1, __m256i __V2) |
| 283 | 275 | /// \param __b |
| 284 | 276 | /// A 256-bit integer vector containing one of the source operands. |
| 285 | 277 | /// \returns A 256-bit integer vector containing the sums. |
| 286 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 287 | _mm256_add_epi8(__m256i __a, __m256i __b) | |
| 288 | { | |
| 278 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 279 | _mm256_add_epi8(__m256i __a, __m256i __b) { | |
| 289 | 280 | return (__m256i)((__v32qu)__a + (__v32qu)__b); |
| 290 | 281 | } |
| 291 | 282 | |
| ... | ... | @@ -302,9 +293,8 @@ _mm256_add_epi8(__m256i __a, __m256i __b) |
| 302 | 293 | /// \param __b |
| 303 | 294 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 304 | 295 | /// \returns A 256-bit vector of [16 x i16] containing the sums. |
| 305 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 306 | _mm256_add_epi16(__m256i __a, __m256i __b) | |
| 307 | { | |
| 296 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 297 | _mm256_add_epi16(__m256i __a, __m256i __b) { | |
| 308 | 298 | return (__m256i)((__v16hu)__a + (__v16hu)__b); |
| 309 | 299 | } |
| 310 | 300 | |
| ... | ... | @@ -321,9 +311,8 @@ _mm256_add_epi16(__m256i __a, __m256i __b) |
| 321 | 311 | /// \param __b |
| 322 | 312 | /// A 256-bit vector of [8 x i32] containing one of the source operands. |
| 323 | 313 | /// \returns A 256-bit vector of [8 x i32] containing the sums. |
| 324 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 325 | _mm256_add_epi32(__m256i __a, __m256i __b) | |
| 326 | { | |
| 314 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 315 | _mm256_add_epi32(__m256i __a, __m256i __b) { | |
| 327 | 316 | return (__m256i)((__v8su)__a + (__v8su)__b); |
| 328 | 317 | } |
| 329 | 318 | |
| ... | ... | @@ -340,9 +329,8 @@ _mm256_add_epi32(__m256i __a, __m256i __b) |
| 340 | 329 | /// \param __b |
| 341 | 330 | /// A 256-bit vector of [4 x i64] containing one of the source operands. |
| 342 | 331 | /// \returns A 256-bit vector of [4 x i64] containing the sums. |
| 343 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 344 | _mm256_add_epi64(__m256i __a, __m256i __b) | |
| 345 | { | |
| 332 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 333 | _mm256_add_epi64(__m256i __a, __m256i __b) { | |
| 346 | 334 | return (__m256i)((__v4du)__a + (__v4du)__b); |
| 347 | 335 | } |
| 348 | 336 | |
| ... | ... | @@ -359,9 +347,8 @@ _mm256_add_epi64(__m256i __a, __m256i __b) |
| 359 | 347 | /// \param __b |
| 360 | 348 | /// A 256-bit integer vector containing one of the source operands. |
| 361 | 349 | /// \returns A 256-bit integer vector containing the sums. |
| 362 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 363 | _mm256_adds_epi8(__m256i __a, __m256i __b) | |
| 364 | { | |
| 350 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 351 | _mm256_adds_epi8(__m256i __a, __m256i __b) { | |
| 365 | 352 | return (__m256i)__builtin_elementwise_add_sat((__v32qs)__a, (__v32qs)__b); |
| 366 | 353 | } |
| 367 | 354 | |
| ... | ... | @@ -377,9 +364,8 @@ _mm256_adds_epi8(__m256i __a, __m256i __b) |
| 377 | 364 | /// \param __b |
| 378 | 365 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 379 | 366 | /// \returns A 256-bit vector of [16 x i16] containing the sums. |
| 380 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 381 | _mm256_adds_epi16(__m256i __a, __m256i __b) | |
| 382 | { | |
| 367 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 368 | _mm256_adds_epi16(__m256i __a, __m256i __b) { | |
| 383 | 369 | return (__m256i)__builtin_elementwise_add_sat((__v16hi)__a, (__v16hi)__b); |
| 384 | 370 | } |
| 385 | 371 | |
| ... | ... | @@ -396,9 +382,8 @@ _mm256_adds_epi16(__m256i __a, __m256i __b) |
| 396 | 382 | /// \param __b |
| 397 | 383 | /// A 256-bit integer vector containing one of the source operands. |
| 398 | 384 | /// \returns A 256-bit integer vector containing the sums. |
| 399 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 400 | _mm256_adds_epu8(__m256i __a, __m256i __b) | |
| 401 | { | |
| 385 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 386 | _mm256_adds_epu8(__m256i __a, __m256i __b) { | |
| 402 | 387 | return (__m256i)__builtin_elementwise_add_sat((__v32qu)__a, (__v32qu)__b); |
| 403 | 388 | } |
| 404 | 389 | |
| ... | ... | @@ -414,9 +399,8 @@ _mm256_adds_epu8(__m256i __a, __m256i __b) |
| 414 | 399 | /// \param __b |
| 415 | 400 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 416 | 401 | /// \returns A 256-bit vector of [16 x i16] containing the sums. |
| 417 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 418 | _mm256_adds_epu16(__m256i __a, __m256i __b) | |
| 419 | { | |
| 402 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 403 | _mm256_adds_epu16(__m256i __a, __m256i __b) { | |
| 420 | 404 | return (__m256i)__builtin_elementwise_add_sat((__v16hu)__a, (__v16hu)__b); |
| 421 | 405 | } |
| 422 | 406 | |
| ... | ... | @@ -460,7 +444,7 @@ _mm256_adds_epu16(__m256i __a, __m256i __b) |
| 460 | 444 | /// \param __b |
| 461 | 445 | /// A 256-bit integer vector. |
| 462 | 446 | /// \returns A 256-bit integer vector containing the result. |
| 463 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 447 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 464 | 448 | _mm256_and_si256(__m256i __a, __m256i __b) |
| 465 | 449 | { |
| 466 | 450 | return (__m256i)((__v4du)__a & (__v4du)__b); |
| ... | ... | @@ -478,7 +462,7 @@ _mm256_and_si256(__m256i __a, __m256i __b) |
| 478 | 462 | /// \param __b |
| 479 | 463 | /// A 256-bit integer vector. |
| 480 | 464 | /// \returns A 256-bit integer vector containing the result. |
| 481 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 465 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 482 | 466 | _mm256_andnot_si256(__m256i __a, __m256i __b) |
| 483 | 467 | { |
| 484 | 468 | return (__m256i)(~(__v4du)__a & (__v4du)__b); |
| ... | ... | @@ -504,10 +488,9 @@ _mm256_andnot_si256(__m256i __a, __m256i __b) |
| 504 | 488 | /// \param __b |
| 505 | 489 | /// A 256-bit integer vector. |
| 506 | 490 | /// \returns A 256-bit integer vector containing the result. |
| 507 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 508 | _mm256_avg_epu8(__m256i __a, __m256i __b) | |
| 509 | { | |
| 510 | return (__m256i)__builtin_ia32_pavgb256((__v32qi)__a, (__v32qi)__b); | |
| 491 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 492 | _mm256_avg_epu8(__m256i __a, __m256i __b) { | |
| 493 | return (__m256i)__builtin_ia32_pavgb256((__v32qu)__a, (__v32qu)__b); | |
| 511 | 494 | } |
| 512 | 495 | |
| 513 | 496 | /// Computes the averages of the corresponding unsigned 16-bit integers in |
| ... | ... | @@ -530,10 +513,9 @@ _mm256_avg_epu8(__m256i __a, __m256i __b) |
| 530 | 513 | /// \param __b |
| 531 | 514 | /// A 256-bit vector of [16 x i16]. |
| 532 | 515 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 533 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 534 | _mm256_avg_epu16(__m256i __a, __m256i __b) | |
| 535 | { | |
| 536 | return (__m256i)__builtin_ia32_pavgw256((__v16hi)__a, (__v16hi)__b); | |
| 516 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 517 | _mm256_avg_epu16(__m256i __a, __m256i __b) { | |
| 518 | return (__m256i)__builtin_ia32_pavgw256((__v16hu)__a, (__v16hu)__b); | |
| 537 | 519 | } |
| 538 | 520 | |
| 539 | 521 | /// Merges 8-bit integer values from either of the two 256-bit vectors |
| ... | ... | @@ -565,9 +547,8 @@ _mm256_avg_epu16(__m256i __a, __m256i __b) |
| 565 | 547 | /// is 0, the byte is copied from \a __V1; otherwise, it is copied from |
| 566 | 548 | /// \a __V2. |
| 567 | 549 | /// \returns A 256-bit integer vector containing the result. |
| 568 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 569 | _mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M) | |
| 570 | { | |
| 550 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 551 | _mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M) { | |
| 571 | 552 | return (__m256i)__builtin_ia32_pblendvb256((__v32qi)__V1, (__v32qi)__V2, |
| 572 | 553 | (__v32qi)__M); |
| 573 | 554 | } |
| ... | ... | @@ -633,7 +614,7 @@ _mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M) |
| 633 | 614 | /// \param __b |
| 634 | 615 | /// A 256-bit integer vector containing one of the inputs. |
| 635 | 616 | /// \returns A 256-bit integer vector containing the result. |
| 636 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 617 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 637 | 618 | _mm256_cmpeq_epi8(__m256i __a, __m256i __b) |
| 638 | 619 | { |
| 639 | 620 | return (__m256i)((__v32qi)__a == (__v32qi)__b); |
| ... | ... | @@ -659,7 +640,7 @@ _mm256_cmpeq_epi8(__m256i __a, __m256i __b) |
| 659 | 640 | /// \param __b |
| 660 | 641 | /// A 256-bit vector of [16 x i16] containing one of the inputs. |
| 661 | 642 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 662 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 643 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 663 | 644 | _mm256_cmpeq_epi16(__m256i __a, __m256i __b) |
| 664 | 645 | { |
| 665 | 646 | return (__m256i)((__v16hi)__a == (__v16hi)__b); |
| ... | ... | @@ -685,7 +666,7 @@ _mm256_cmpeq_epi16(__m256i __a, __m256i __b) |
| 685 | 666 | /// \param __b |
| 686 | 667 | /// A 256-bit vector of [8 x i32] containing one of the inputs. |
| 687 | 668 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 688 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 669 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 689 | 670 | _mm256_cmpeq_epi32(__m256i __a, __m256i __b) |
| 690 | 671 | { |
| 691 | 672 | return (__m256i)((__v8si)__a == (__v8si)__b); |
| ... | ... | @@ -711,7 +692,7 @@ _mm256_cmpeq_epi32(__m256i __a, __m256i __b) |
| 711 | 692 | /// \param __b |
| 712 | 693 | /// A 256-bit vector of [4 x i64] containing one of the inputs. |
| 713 | 694 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 714 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 695 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 715 | 696 | _mm256_cmpeq_epi64(__m256i __a, __m256i __b) |
| 716 | 697 | { |
| 717 | 698 | return (__m256i)((__v4di)__a == (__v4di)__b); |
| ... | ... | @@ -737,7 +718,7 @@ _mm256_cmpeq_epi64(__m256i __a, __m256i __b) |
| 737 | 718 | /// \param __b |
| 738 | 719 | /// A 256-bit integer vector containing one of the inputs. |
| 739 | 720 | /// \returns A 256-bit integer vector containing the result. |
| 740 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 721 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 741 | 722 | _mm256_cmpgt_epi8(__m256i __a, __m256i __b) |
| 742 | 723 | { |
| 743 | 724 | /* This function always performs a signed comparison, but __v32qi is a char |
| ... | ... | @@ -765,7 +746,7 @@ _mm256_cmpgt_epi8(__m256i __a, __m256i __b) |
| 765 | 746 | /// \param __b |
| 766 | 747 | /// A 256-bit vector of [16 x i16] containing one of the inputs. |
| 767 | 748 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 768 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 749 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 769 | 750 | _mm256_cmpgt_epi16(__m256i __a, __m256i __b) |
| 770 | 751 | { |
| 771 | 752 | return (__m256i)((__v16hi)__a > (__v16hi)__b); |
| ... | ... | @@ -791,7 +772,7 @@ _mm256_cmpgt_epi16(__m256i __a, __m256i __b) |
| 791 | 772 | /// \param __b |
| 792 | 773 | /// A 256-bit vector of [8 x i32] containing one of the inputs. |
| 793 | 774 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 794 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 775 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 795 | 776 | _mm256_cmpgt_epi32(__m256i __a, __m256i __b) |
| 796 | 777 | { |
| 797 | 778 | return (__m256i)((__v8si)__a > (__v8si)__b); |
| ... | ... | @@ -817,7 +798,7 @@ _mm256_cmpgt_epi32(__m256i __a, __m256i __b) |
| 817 | 798 | /// \param __b |
| 818 | 799 | /// A 256-bit vector of [4 x i64] containing one of the inputs. |
| 819 | 800 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 820 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 801 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 821 | 802 | _mm256_cmpgt_epi64(__m256i __a, __m256i __b) |
| 822 | 803 | { |
| 823 | 804 | return (__m256i)((__v4di)__a > (__v4di)__b); |
| ... | ... | @@ -853,10 +834,9 @@ _mm256_cmpgt_epi64(__m256i __a, __m256i __b) |
| 853 | 834 | /// \param __b |
| 854 | 835 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 855 | 836 | /// \returns A 256-bit vector of [16 x i16] containing the sums. |
| 856 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 857 | _mm256_hadd_epi16(__m256i __a, __m256i __b) | |
| 858 | { | |
| 859 | return (__m256i)__builtin_ia32_phaddw256((__v16hi)__a, (__v16hi)__b); | |
| 837 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 838 | _mm256_hadd_epi16(__m256i __a, __m256i __b) { | |
| 839 | return (__m256i)__builtin_ia32_phaddw256((__v16hi)__a, (__v16hi)__b); | |
| 860 | 840 | } |
| 861 | 841 | |
| 862 | 842 | /// Horizontally adds the adjacent pairs of 32-bit integers from two 256-bit |
| ... | ... | @@ -885,10 +865,9 @@ _mm256_hadd_epi16(__m256i __a, __m256i __b) |
| 885 | 865 | /// \param __b |
| 886 | 866 | /// A 256-bit vector of [8 x i32] containing one of the source operands. |
| 887 | 867 | /// \returns A 256-bit vector of [8 x i32] containing the sums. |
| 888 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 889 | _mm256_hadd_epi32(__m256i __a, __m256i __b) | |
| 890 | { | |
| 891 | return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b); | |
| 868 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 869 | _mm256_hadd_epi32(__m256i __a, __m256i __b) { | |
| 870 | return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b); | |
| 892 | 871 | } |
| 893 | 872 | |
| 894 | 873 | /// Horizontally adds the adjacent pairs of 16-bit integers from two 256-bit |
| ... | ... | @@ -920,10 +899,9 @@ _mm256_hadd_epi32(__m256i __a, __m256i __b) |
| 920 | 899 | /// \param __b |
| 921 | 900 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 922 | 901 | /// \returns A 256-bit vector of [16 x i16] containing the sums. |
| 923 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 924 | _mm256_hadds_epi16(__m256i __a, __m256i __b) | |
| 925 | { | |
| 926 | return (__m256i)__builtin_ia32_phaddsw256((__v16hi)__a, (__v16hi)__b); | |
| 902 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 903 | _mm256_hadds_epi16(__m256i __a, __m256i __b) { | |
| 904 | return (__m256i)__builtin_ia32_phaddsw256((__v16hi)__a, (__v16hi)__b); | |
| 927 | 905 | } |
| 928 | 906 | |
| 929 | 907 | /// Horizontally subtracts adjacent pairs of 16-bit integers from two 256-bit |
| ... | ... | @@ -956,10 +934,9 @@ _mm256_hadds_epi16(__m256i __a, __m256i __b) |
| 956 | 934 | /// \param __b |
| 957 | 935 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 958 | 936 | /// \returns A 256-bit vector of [16 x i16] containing the differences. |
| 959 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 960 | _mm256_hsub_epi16(__m256i __a, __m256i __b) | |
| 961 | { | |
| 962 | return (__m256i)__builtin_ia32_phsubw256((__v16hi)__a, (__v16hi)__b); | |
| 937 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 938 | _mm256_hsub_epi16(__m256i __a, __m256i __b) { | |
| 939 | return (__m256i)__builtin_ia32_phsubw256((__v16hi)__a, (__v16hi)__b); | |
| 963 | 940 | } |
| 964 | 941 | |
| 965 | 942 | /// Horizontally subtracts adjacent pairs of 32-bit integers from two 256-bit |
| ... | ... | @@ -988,10 +965,9 @@ _mm256_hsub_epi16(__m256i __a, __m256i __b) |
| 988 | 965 | /// \param __b |
| 989 | 966 | /// A 256-bit vector of [8 x i32] containing one of the source operands. |
| 990 | 967 | /// \returns A 256-bit vector of [8 x i32] containing the differences. |
| 991 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 992 | _mm256_hsub_epi32(__m256i __a, __m256i __b) | |
| 993 | { | |
| 994 | return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b); | |
| 968 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 969 | _mm256_hsub_epi32(__m256i __a, __m256i __b) { | |
| 970 | return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b); | |
| 995 | 971 | } |
| 996 | 972 | |
| 997 | 973 | /// Horizontally subtracts adjacent pairs of 16-bit integers from two 256-bit |
| ... | ... | @@ -1024,10 +1000,9 @@ _mm256_hsub_epi32(__m256i __a, __m256i __b) |
| 1024 | 1000 | /// \param __b |
| 1025 | 1001 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 1026 | 1002 | /// \returns A 256-bit vector of [16 x i16] containing the differences. |
| 1027 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1028 | _mm256_hsubs_epi16(__m256i __a, __m256i __b) | |
| 1029 | { | |
| 1030 | return (__m256i)__builtin_ia32_phsubsw256((__v16hi)__a, (__v16hi)__b); | |
| 1003 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1004 | _mm256_hsubs_epi16(__m256i __a, __m256i __b) { | |
| 1005 | return (__m256i)__builtin_ia32_phsubsw256((__v16hi)__a, (__v16hi)__b); | |
| 1031 | 1006 | } |
| 1032 | 1007 | |
| 1033 | 1008 | /// Multiplies each unsigned byte from the 256-bit integer vector in \a __a |
| ... | ... | @@ -1054,10 +1029,9 @@ _mm256_hsubs_epi16(__m256i __a, __m256i __b) |
| 1054 | 1029 | /// \param __b |
| 1055 | 1030 | /// A 256-bit vector containing one of the source operands. |
| 1056 | 1031 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 1057 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1058 | _mm256_maddubs_epi16(__m256i __a, __m256i __b) | |
| 1059 | { | |
| 1060 | return (__m256i)__builtin_ia32_pmaddubsw256((__v32qi)__a, (__v32qi)__b); | |
| 1032 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1033 | _mm256_maddubs_epi16(__m256i __a, __m256i __b) { | |
| 1034 | return (__m256i)__builtin_ia32_pmaddubsw256((__v32qi)__a, (__v32qi)__b); | |
| 1061 | 1035 | } |
| 1062 | 1036 | |
| 1063 | 1037 | /// Multiplies corresponding 16-bit elements of two 256-bit vectors of |
| ... | ... | @@ -1086,9 +1060,8 @@ _mm256_maddubs_epi16(__m256i __a, __m256i __b) |
| 1086 | 1060 | /// \param __b |
| 1087 | 1061 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 1088 | 1062 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 1089 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1090 | _mm256_madd_epi16(__m256i __a, __m256i __b) | |
| 1091 | { | |
| 1063 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1064 | _mm256_madd_epi16(__m256i __a, __m256i __b) { | |
| 1092 | 1065 | return (__m256i)__builtin_ia32_pmaddwd256((__v16hi)__a, (__v16hi)__b); |
| 1093 | 1066 | } |
| 1094 | 1067 | |
| ... | ... | @@ -1105,9 +1078,8 @@ _mm256_madd_epi16(__m256i __a, __m256i __b) |
| 1105 | 1078 | /// \param __b |
| 1106 | 1079 | /// A 256-bit integer vector. |
| 1107 | 1080 | /// \returns A 256-bit integer vector containing the result. |
| 1108 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1109 | _mm256_max_epi8(__m256i __a, __m256i __b) | |
| 1110 | { | |
| 1081 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1082 | _mm256_max_epi8(__m256i __a, __m256i __b) { | |
| 1111 | 1083 | return (__m256i)__builtin_elementwise_max((__v32qs)__a, (__v32qs)__b); |
| 1112 | 1084 | } |
| 1113 | 1085 | |
| ... | ... | @@ -1124,9 +1096,8 @@ _mm256_max_epi8(__m256i __a, __m256i __b) |
| 1124 | 1096 | /// \param __b |
| 1125 | 1097 | /// A 256-bit vector of [16 x i16]. |
| 1126 | 1098 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 1127 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1128 | _mm256_max_epi16(__m256i __a, __m256i __b) | |
| 1129 | { | |
| 1099 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1100 | _mm256_max_epi16(__m256i __a, __m256i __b) { | |
| 1130 | 1101 | return (__m256i)__builtin_elementwise_max((__v16hi)__a, (__v16hi)__b); |
| 1131 | 1102 | } |
| 1132 | 1103 | |
| ... | ... | @@ -1143,9 +1114,8 @@ _mm256_max_epi16(__m256i __a, __m256i __b) |
| 1143 | 1114 | /// \param __b |
| 1144 | 1115 | /// A 256-bit vector of [8 x i32]. |
| 1145 | 1116 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 1146 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1147 | _mm256_max_epi32(__m256i __a, __m256i __b) | |
| 1148 | { | |
| 1117 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1118 | _mm256_max_epi32(__m256i __a, __m256i __b) { | |
| 1149 | 1119 | return (__m256i)__builtin_elementwise_max((__v8si)__a, (__v8si)__b); |
| 1150 | 1120 | } |
| 1151 | 1121 | |
| ... | ... | @@ -1162,9 +1132,8 @@ _mm256_max_epi32(__m256i __a, __m256i __b) |
| 1162 | 1132 | /// \param __b |
| 1163 | 1133 | /// A 256-bit integer vector. |
| 1164 | 1134 | /// \returns A 256-bit integer vector containing the result. |
| 1165 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1166 | _mm256_max_epu8(__m256i __a, __m256i __b) | |
| 1167 | { | |
| 1135 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1136 | _mm256_max_epu8(__m256i __a, __m256i __b) { | |
| 1168 | 1137 | return (__m256i)__builtin_elementwise_max((__v32qu)__a, (__v32qu)__b); |
| 1169 | 1138 | } |
| 1170 | 1139 | |
| ... | ... | @@ -1181,9 +1150,8 @@ _mm256_max_epu8(__m256i __a, __m256i __b) |
| 1181 | 1150 | /// \param __b |
| 1182 | 1151 | /// A 256-bit vector of [16 x i16]. |
| 1183 | 1152 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 1184 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1185 | _mm256_max_epu16(__m256i __a, __m256i __b) | |
| 1186 | { | |
| 1153 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1154 | _mm256_max_epu16(__m256i __a, __m256i __b) { | |
| 1187 | 1155 | return (__m256i)__builtin_elementwise_max((__v16hu)__a, (__v16hu)__b); |
| 1188 | 1156 | } |
| 1189 | 1157 | |
| ... | ... | @@ -1200,9 +1168,8 @@ _mm256_max_epu16(__m256i __a, __m256i __b) |
| 1200 | 1168 | /// \param __b |
| 1201 | 1169 | /// A 256-bit vector of [8 x i32]. |
| 1202 | 1170 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 1203 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1204 | _mm256_max_epu32(__m256i __a, __m256i __b) | |
| 1205 | { | |
| 1171 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1172 | _mm256_max_epu32(__m256i __a, __m256i __b) { | |
| 1206 | 1173 | return (__m256i)__builtin_elementwise_max((__v8su)__a, (__v8su)__b); |
| 1207 | 1174 | } |
| 1208 | 1175 | |
| ... | ... | @@ -1219,9 +1186,8 @@ _mm256_max_epu32(__m256i __a, __m256i __b) |
| 1219 | 1186 | /// \param __b |
| 1220 | 1187 | /// A 256-bit integer vector. |
| 1221 | 1188 | /// \returns A 256-bit integer vector containing the result. |
| 1222 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1223 | _mm256_min_epi8(__m256i __a, __m256i __b) | |
| 1224 | { | |
| 1189 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1190 | _mm256_min_epi8(__m256i __a, __m256i __b) { | |
| 1225 | 1191 | return (__m256i)__builtin_elementwise_min((__v32qs)__a, (__v32qs)__b); |
| 1226 | 1192 | } |
| 1227 | 1193 | |
| ... | ... | @@ -1238,9 +1204,8 @@ _mm256_min_epi8(__m256i __a, __m256i __b) |
| 1238 | 1204 | /// \param __b |
| 1239 | 1205 | /// A 256-bit vector of [16 x i16]. |
| 1240 | 1206 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 1241 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1242 | _mm256_min_epi16(__m256i __a, __m256i __b) | |
| 1243 | { | |
| 1207 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1208 | _mm256_min_epi16(__m256i __a, __m256i __b) { | |
| 1244 | 1209 | return (__m256i)__builtin_elementwise_min((__v16hi)__a, (__v16hi)__b); |
| 1245 | 1210 | } |
| 1246 | 1211 | |
| ... | ... | @@ -1257,9 +1222,8 @@ _mm256_min_epi16(__m256i __a, __m256i __b) |
| 1257 | 1222 | /// \param __b |
| 1258 | 1223 | /// A 256-bit vector of [8 x i32]. |
| 1259 | 1224 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 1260 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1261 | _mm256_min_epi32(__m256i __a, __m256i __b) | |
| 1262 | { | |
| 1225 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1226 | _mm256_min_epi32(__m256i __a, __m256i __b) { | |
| 1263 | 1227 | return (__m256i)__builtin_elementwise_min((__v8si)__a, (__v8si)__b); |
| 1264 | 1228 | } |
| 1265 | 1229 | |
| ... | ... | @@ -1276,9 +1240,8 @@ _mm256_min_epi32(__m256i __a, __m256i __b) |
| 1276 | 1240 | /// \param __b |
| 1277 | 1241 | /// A 256-bit integer vector. |
| 1278 | 1242 | /// \returns A 256-bit integer vector containing the result. |
| 1279 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1280 | _mm256_min_epu8(__m256i __a, __m256i __b) | |
| 1281 | { | |
| 1243 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1244 | _mm256_min_epu8(__m256i __a, __m256i __b) { | |
| 1282 | 1245 | return (__m256i)__builtin_elementwise_min((__v32qu)__a, (__v32qu)__b); |
| 1283 | 1246 | } |
| 1284 | 1247 | |
| ... | ... | @@ -1295,9 +1258,8 @@ _mm256_min_epu8(__m256i __a, __m256i __b) |
| 1295 | 1258 | /// \param __b |
| 1296 | 1259 | /// A 256-bit vector of [16 x i16]. |
| 1297 | 1260 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 1298 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1299 | _mm256_min_epu16(__m256i __a, __m256i __b) | |
| 1300 | { | |
| 1261 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1262 | _mm256_min_epu16(__m256i __a, __m256i __b) { | |
| 1301 | 1263 | return (__m256i)__builtin_elementwise_min((__v16hu)__a, (__v16hu)__b); |
| 1302 | 1264 | } |
| 1303 | 1265 | |
| ... | ... | @@ -1314,9 +1276,8 @@ _mm256_min_epu16(__m256i __a, __m256i __b) |
| 1314 | 1276 | /// \param __b |
| 1315 | 1277 | /// A 256-bit vector of [8 x i32]. |
| 1316 | 1278 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 1317 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1318 | _mm256_min_epu32(__m256i __a, __m256i __b) | |
| 1319 | { | |
| 1279 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1280 | _mm256_min_epu32(__m256i __a, __m256i __b) { | |
| 1320 | 1281 | return (__m256i)__builtin_elementwise_min((__v8su)__a, (__v8su)__b); |
| 1321 | 1282 | } |
| 1322 | 1283 | |
| ... | ... | @@ -1337,9 +1298,8 @@ _mm256_min_epu32(__m256i __a, __m256i __b) |
| 1337 | 1298 | /// \param __a |
| 1338 | 1299 | /// A 256-bit integer vector containing the source bytes. |
| 1339 | 1300 | /// \returns The 32-bit integer mask. |
| 1340 | static __inline__ int __DEFAULT_FN_ATTRS256 | |
| 1341 | _mm256_movemask_epi8(__m256i __a) | |
| 1342 | { | |
| 1301 | static __inline__ int __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1302 | _mm256_movemask_epi8(__m256i __a) { | |
| 1343 | 1303 | return __builtin_ia32_pmovmskb256((__v32qi)__a); |
| 1344 | 1304 | } |
| 1345 | 1305 | |
| ... | ... | @@ -1363,9 +1323,8 @@ _mm256_movemask_epi8(__m256i __a) |
| 1363 | 1323 | /// A 128-bit integer vector containing the source bytes. |
| 1364 | 1324 | /// \returns A 256-bit vector of [16 x i16] containing the sign-extended |
| 1365 | 1325 | /// values. |
| 1366 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1367 | _mm256_cvtepi8_epi16(__m128i __V) | |
| 1368 | { | |
| 1326 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1327 | _mm256_cvtepi8_epi16(__m128i __V) { | |
| 1369 | 1328 | /* This function always performs a signed extension, but __v16qi is a char |
| 1370 | 1329 | which may be signed or unsigned, so use __v16qs. */ |
| 1371 | 1330 | return (__m256i)__builtin_convertvector((__v16qs)__V, __v16hi); |
| ... | ... | @@ -1391,9 +1350,8 @@ _mm256_cvtepi8_epi16(__m128i __V) |
| 1391 | 1350 | /// A 128-bit integer vector containing the source bytes. |
| 1392 | 1351 | /// \returns A 256-bit vector of [8 x i32] containing the sign-extended |
| 1393 | 1352 | /// values. |
| 1394 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1395 | _mm256_cvtepi8_epi32(__m128i __V) | |
| 1396 | { | |
| 1353 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1354 | _mm256_cvtepi8_epi32(__m128i __V) { | |
| 1397 | 1355 | /* This function always performs a signed extension, but __v16qi is a char |
| 1398 | 1356 | which may be signed or unsigned, so use __v16qs. */ |
| 1399 | 1357 | return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3, 4, 5, 6, 7), __v8si); |
| ... | ... | @@ -1418,9 +1376,8 @@ _mm256_cvtepi8_epi32(__m128i __V) |
| 1418 | 1376 | /// A 128-bit integer vector containing the source bytes. |
| 1419 | 1377 | /// \returns A 256-bit vector of [4 x i64] containing the sign-extended |
| 1420 | 1378 | /// values. |
| 1421 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1422 | _mm256_cvtepi8_epi64(__m128i __V) | |
| 1423 | { | |
| 1379 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1380 | _mm256_cvtepi8_epi64(__m128i __V) { | |
| 1424 | 1381 | /* This function always performs a signed extension, but __v16qi is a char |
| 1425 | 1382 | which may be signed or unsigned, so use __v16qs. */ |
| 1426 | 1383 | return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3), __v4di); |
| ... | ... | @@ -1446,9 +1403,8 @@ _mm256_cvtepi8_epi64(__m128i __V) |
| 1446 | 1403 | /// A 128-bit vector of [8 x i16] containing the source values. |
| 1447 | 1404 | /// \returns A 256-bit vector of [8 x i32] containing the sign-extended |
| 1448 | 1405 | /// values. |
| 1449 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1450 | _mm256_cvtepi16_epi32(__m128i __V) | |
| 1451 | { | |
| 1406 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1407 | _mm256_cvtepi16_epi32(__m128i __V) { | |
| 1452 | 1408 | return (__m256i)__builtin_convertvector((__v8hi)__V, __v8si); |
| 1453 | 1409 | } |
| 1454 | 1410 | |
| ... | ... | @@ -1471,9 +1427,8 @@ _mm256_cvtepi16_epi32(__m128i __V) |
| 1471 | 1427 | /// A 128-bit vector of [8 x i16] containing the source values. |
| 1472 | 1428 | /// \returns A 256-bit vector of [4 x i64] containing the sign-extended |
| 1473 | 1429 | /// values. |
| 1474 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1475 | _mm256_cvtepi16_epi64(__m128i __V) | |
| 1476 | { | |
| 1430 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1431 | _mm256_cvtepi16_epi64(__m128i __V) { | |
| 1477 | 1432 | return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4di); |
| 1478 | 1433 | } |
| 1479 | 1434 | |
| ... | ... | @@ -1496,9 +1451,8 @@ _mm256_cvtepi16_epi64(__m128i __V) |
| 1496 | 1451 | /// A 128-bit vector of [4 x i32] containing the source values. |
| 1497 | 1452 | /// \returns A 256-bit vector of [4 x i64] containing the sign-extended |
| 1498 | 1453 | /// values. |
| 1499 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1500 | _mm256_cvtepi32_epi64(__m128i __V) | |
| 1501 | { | |
| 1454 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1455 | _mm256_cvtepi32_epi64(__m128i __V) { | |
| 1502 | 1456 | return (__m256i)__builtin_convertvector((__v4si)__V, __v4di); |
| 1503 | 1457 | } |
| 1504 | 1458 | |
| ... | ... | @@ -1522,9 +1476,8 @@ _mm256_cvtepi32_epi64(__m128i __V) |
| 1522 | 1476 | /// A 128-bit integer vector containing the source bytes. |
| 1523 | 1477 | /// \returns A 256-bit vector of [16 x i16] containing the zero-extended |
| 1524 | 1478 | /// values. |
| 1525 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1526 | _mm256_cvtepu8_epi16(__m128i __V) | |
| 1527 | { | |
| 1479 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1480 | _mm256_cvtepu8_epi16(__m128i __V) { | |
| 1528 | 1481 | return (__m256i)__builtin_convertvector((__v16qu)__V, __v16hi); |
| 1529 | 1482 | } |
| 1530 | 1483 | |
| ... | ... | @@ -1548,9 +1501,8 @@ _mm256_cvtepu8_epi16(__m128i __V) |
| 1548 | 1501 | /// A 128-bit integer vector containing the source bytes. |
| 1549 | 1502 | /// \returns A 256-bit vector of [8 x i32] containing the zero-extended |
| 1550 | 1503 | /// values. |
| 1551 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1552 | _mm256_cvtepu8_epi32(__m128i __V) | |
| 1553 | { | |
| 1504 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1505 | _mm256_cvtepu8_epi32(__m128i __V) { | |
| 1554 | 1506 | return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6, 7), __v8si); |
| 1555 | 1507 | } |
| 1556 | 1508 | |
| ... | ... | @@ -1573,9 +1525,8 @@ _mm256_cvtepu8_epi32(__m128i __V) |
| 1573 | 1525 | /// A 128-bit integer vector containing the source bytes. |
| 1574 | 1526 | /// \returns A 256-bit vector of [4 x i64] containing the zero-extended |
| 1575 | 1527 | /// values. |
| 1576 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1577 | _mm256_cvtepu8_epi64(__m128i __V) | |
| 1578 | { | |
| 1528 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1529 | _mm256_cvtepu8_epi64(__m128i __V) { | |
| 1579 | 1530 | return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4di); |
| 1580 | 1531 | } |
| 1581 | 1532 | |
| ... | ... | @@ -1599,9 +1550,8 @@ _mm256_cvtepu8_epi64(__m128i __V) |
| 1599 | 1550 | /// A 128-bit vector of [8 x i16] containing the source values. |
| 1600 | 1551 | /// \returns A 256-bit vector of [8 x i32] containing the zero-extended |
| 1601 | 1552 | /// values. |
| 1602 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1603 | _mm256_cvtepu16_epi32(__m128i __V) | |
| 1604 | { | |
| 1553 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1554 | _mm256_cvtepu16_epi32(__m128i __V) { | |
| 1605 | 1555 | return (__m256i)__builtin_convertvector((__v8hu)__V, __v8si); |
| 1606 | 1556 | } |
| 1607 | 1557 | |
| ... | ... | @@ -1624,9 +1574,8 @@ _mm256_cvtepu16_epi32(__m128i __V) |
| 1624 | 1574 | /// A 128-bit vector of [8 x i16] containing the source values. |
| 1625 | 1575 | /// \returns A 256-bit vector of [4 x i64] containing the zero-extended |
| 1626 | 1576 | /// values. |
| 1627 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1628 | _mm256_cvtepu16_epi64(__m128i __V) | |
| 1629 | { | |
| 1577 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1578 | _mm256_cvtepu16_epi64(__m128i __V) { | |
| 1630 | 1579 | return (__m256i)__builtin_convertvector(__builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4di); |
| 1631 | 1580 | } |
| 1632 | 1581 | |
| ... | ... | @@ -1649,9 +1598,8 @@ _mm256_cvtepu16_epi64(__m128i __V) |
| 1649 | 1598 | /// A 128-bit vector of [4 x i32] containing the source values. |
| 1650 | 1599 | /// \returns A 256-bit vector of [4 x i64] containing the zero-extended |
| 1651 | 1600 | /// values. |
| 1652 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1653 | _mm256_cvtepu32_epi64(__m128i __V) | |
| 1654 | { | |
| 1601 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1602 | _mm256_cvtepu32_epi64(__m128i __V) { | |
| 1655 | 1603 | return (__m256i)__builtin_convertvector((__v4su)__V, __v4di); |
| 1656 | 1604 | } |
| 1657 | 1605 | |
| ... | ... | @@ -1675,9 +1623,8 @@ _mm256_cvtepu32_epi64(__m128i __V) |
| 1675 | 1623 | /// \param __b |
| 1676 | 1624 | /// A 256-bit vector of [8 x i32] containing one of the source operands. |
| 1677 | 1625 | /// \returns A 256-bit vector of [4 x i64] containing the products. |
| 1678 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1679 | _mm256_mul_epi32(__m256i __a, __m256i __b) | |
| 1680 | { | |
| 1626 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1627 | _mm256_mul_epi32(__m256i __a, __m256i __b) { | |
| 1681 | 1628 | return (__m256i)__builtin_ia32_pmuldq256((__v8si)__a, (__v8si)__b); |
| 1682 | 1629 | } |
| 1683 | 1630 | |
| ... | ... | @@ -1702,9 +1649,8 @@ _mm256_mul_epi32(__m256i __a, __m256i __b) |
| 1702 | 1649 | /// \param __b |
| 1703 | 1650 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 1704 | 1651 | /// \returns A 256-bit vector of [16 x i16] containing the rounded products. |
| 1705 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1706 | _mm256_mulhrs_epi16(__m256i __a, __m256i __b) | |
| 1707 | { | |
| 1652 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1653 | _mm256_mulhrs_epi16(__m256i __a, __m256i __b) { | |
| 1708 | 1654 | return (__m256i)__builtin_ia32_pmulhrsw256((__v16hi)__a, (__v16hi)__b); |
| 1709 | 1655 | } |
| 1710 | 1656 | |
| ... | ... | @@ -1721,10 +1667,9 @@ _mm256_mulhrs_epi16(__m256i __a, __m256i __b) |
| 1721 | 1667 | /// \param __b |
| 1722 | 1668 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 1723 | 1669 | /// \returns A 256-bit vector of [16 x i16] containing the products. |
| 1724 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1725 | _mm256_mulhi_epu16(__m256i __a, __m256i __b) | |
| 1726 | { | |
| 1727 | return (__m256i)__builtin_ia32_pmulhuw256((__v16hi)__a, (__v16hi)__b); | |
| 1670 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1671 | _mm256_mulhi_epu16(__m256i __a, __m256i __b) { | |
| 1672 | return (__m256i)__builtin_ia32_pmulhuw256((__v16hu)__a, (__v16hu)__b); | |
| 1728 | 1673 | } |
| 1729 | 1674 | |
| 1730 | 1675 | /// Multiplies signed 16-bit integer elements of two 256-bit vectors of |
| ... | ... | @@ -1740,7 +1685,7 @@ _mm256_mulhi_epu16(__m256i __a, __m256i __b) |
| 1740 | 1685 | /// \param __b |
| 1741 | 1686 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 1742 | 1687 | /// \returns A 256-bit vector of [16 x i16] containing the products. |
| 1743 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1688 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1744 | 1689 | _mm256_mulhi_epi16(__m256i __a, __m256i __b) |
| 1745 | 1690 | { |
| 1746 | 1691 | return (__m256i)__builtin_ia32_pmulhw256((__v16hi)__a, (__v16hi)__b); |
| ... | ... | @@ -1759,7 +1704,7 @@ _mm256_mulhi_epi16(__m256i __a, __m256i __b) |
| 1759 | 1704 | /// \param __b |
| 1760 | 1705 | /// A 256-bit vector of [16 x i16] containing one of the source operands. |
| 1761 | 1706 | /// \returns A 256-bit vector of [16 x i16] containing the products. |
| 1762 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1707 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1763 | 1708 | _mm256_mullo_epi16(__m256i __a, __m256i __b) |
| 1764 | 1709 | { |
| 1765 | 1710 | return (__m256i)((__v16hu)__a * (__v16hu)__b); |
| ... | ... | @@ -1778,9 +1723,8 @@ _mm256_mullo_epi16(__m256i __a, __m256i __b) |
| 1778 | 1723 | /// \param __b |
| 1779 | 1724 | /// A 256-bit vector of [8 x i32] containing one of the source operands. |
| 1780 | 1725 | /// \returns A 256-bit vector of [8 x i32] containing the products. |
| 1781 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1782 | _mm256_mullo_epi32 (__m256i __a, __m256i __b) | |
| 1783 | { | |
| 1726 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1727 | _mm256_mullo_epi32(__m256i __a, __m256i __b) { | |
| 1784 | 1728 | return (__m256i)((__v8su)__a * (__v8su)__b); |
| 1785 | 1729 | } |
| 1786 | 1730 | |
| ... | ... | @@ -1804,9 +1748,8 @@ _mm256_mullo_epi32 (__m256i __a, __m256i __b) |
| 1804 | 1748 | /// \param __b |
| 1805 | 1749 | /// A 256-bit vector of [8 x i32] containing one of the source operands. |
| 1806 | 1750 | /// \returns A 256-bit vector of [4 x i64] containing the products. |
| 1807 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1808 | _mm256_mul_epu32(__m256i __a, __m256i __b) | |
| 1809 | { | |
| 1751 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1752 | _mm256_mul_epu32(__m256i __a, __m256i __b) { | |
| 1810 | 1753 | return __builtin_ia32_pmuludq256((__v8si)__a, (__v8si)__b); |
| 1811 | 1754 | } |
| 1812 | 1755 | |
| ... | ... | @@ -1822,7 +1765,7 @@ _mm256_mul_epu32(__m256i __a, __m256i __b) |
| 1822 | 1765 | /// \param __b |
| 1823 | 1766 | /// A 256-bit integer vector. |
| 1824 | 1767 | /// \returns A 256-bit integer vector containing the result. |
| 1825 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1768 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1826 | 1769 | _mm256_or_si256(__m256i __a, __m256i __b) |
| 1827 | 1770 | { |
| 1828 | 1771 | return (__m256i)((__v4du)__a | (__v4du)__b); |
| ... | ... | @@ -1906,9 +1849,8 @@ _mm256_sad_epu8(__m256i __a, __m256i __b) |
| 1906 | 1849 | /// control byte specify the index (within the same 128-bit half) of \a __a |
| 1907 | 1850 | /// to copy to the result byte. |
| 1908 | 1851 | /// \returns A 256-bit integer vector containing the result. |
| 1909 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1910 | _mm256_shuffle_epi8(__m256i __a, __m256i __b) | |
| 1911 | { | |
| 1852 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1853 | _mm256_shuffle_epi8(__m256i __a, __m256i __b) { | |
| 1912 | 1854 | return (__m256i)__builtin_ia32_pshufb256((__v32qi)__a, (__v32qi)__b); |
| 1913 | 1855 | } |
| 1914 | 1856 | |
| ... | ... | @@ -2033,10 +1975,9 @@ _mm256_shuffle_epi8(__m256i __a, __m256i __b) |
| 2033 | 1975 | /// \param __b |
| 2034 | 1976 | /// A 256-bit integer vector]. |
| 2035 | 1977 | /// \returns A 256-bit integer vector containing the result. |
| 2036 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2037 | _mm256_sign_epi8(__m256i __a, __m256i __b) | |
| 2038 | { | |
| 2039 | return (__m256i)__builtin_ia32_psignb256((__v32qi)__a, (__v32qi)__b); | |
| 1978 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1979 | _mm256_sign_epi8(__m256i __a, __m256i __b) { | |
| 1980 | return (__m256i)__builtin_ia32_psignb256((__v32qi)__a, (__v32qi)__b); | |
| 2040 | 1981 | } |
| 2041 | 1982 | |
| 2042 | 1983 | /// Sets each element of the result to the corresponding element of the |
| ... | ... | @@ -2054,10 +1995,9 @@ _mm256_sign_epi8(__m256i __a, __m256i __b) |
| 2054 | 1995 | /// \param __b |
| 2055 | 1996 | /// A 256-bit vector of [16 x i16]. |
| 2056 | 1997 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2057 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2058 | _mm256_sign_epi16(__m256i __a, __m256i __b) | |
| 2059 | { | |
| 2060 | return (__m256i)__builtin_ia32_psignw256((__v16hi)__a, (__v16hi)__b); | |
| 1998 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1999 | _mm256_sign_epi16(__m256i __a, __m256i __b) { | |
| 2000 | return (__m256i)__builtin_ia32_psignw256((__v16hi)__a, (__v16hi)__b); | |
| 2061 | 2001 | } |
| 2062 | 2002 | |
| 2063 | 2003 | /// Sets each element of the result to the corresponding element of the |
| ... | ... | @@ -2075,10 +2015,9 @@ _mm256_sign_epi16(__m256i __a, __m256i __b) |
| 2075 | 2015 | /// \param __b |
| 2076 | 2016 | /// A 256-bit vector of [8 x i32]. |
| 2077 | 2017 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2078 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2079 | _mm256_sign_epi32(__m256i __a, __m256i __b) | |
| 2080 | { | |
| 2081 | return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b); | |
| 2018 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2019 | _mm256_sign_epi32(__m256i __a, __m256i __b) { | |
| 2020 | return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b); | |
| 2082 | 2021 | } |
| 2083 | 2022 | |
| 2084 | 2023 | /// Shifts each 128-bit half of the 256-bit integer vector \a a left by |
| ... | ... | @@ -2098,8 +2037,9 @@ _mm256_sign_epi32(__m256i __a, __m256i __b) |
| 2098 | 2037 | /// \param imm |
| 2099 | 2038 | /// An unsigned immediate value specifying the shift count (in bytes). |
| 2100 | 2039 | /// \returns A 256-bit integer vector containing the result. |
| 2101 | #define _mm256_slli_si256(a, imm) \ | |
| 2102 | ((__m256i)__builtin_ia32_pslldqi256_byteshift((__v4di)(__m256i)(a), (int)(imm))) | |
| 2040 | #define _mm256_slli_si256(a, imm) \ | |
| 2041 | ((__m256i)__builtin_ia32_pslldqi256_byteshift((__v32qi)(__m256i)(a), \ | |
| 2042 | (int)(imm))) | |
| 2103 | 2043 | |
| 2104 | 2044 | /// Shifts each 128-bit half of the 256-bit integer vector \a a left by |
| 2105 | 2045 | /// \a imm bytes, shifting in zero bytes, and returns the result. If \a imm |
| ... | ... | @@ -2118,8 +2058,9 @@ _mm256_sign_epi32(__m256i __a, __m256i __b) |
| 2118 | 2058 | /// \param imm |
| 2119 | 2059 | /// An unsigned immediate value specifying the shift count (in bytes). |
| 2120 | 2060 | /// \returns A 256-bit integer vector containing the result. |
| 2121 | #define _mm256_bslli_epi128(a, imm) \ | |
| 2122 | ((__m256i)__builtin_ia32_pslldqi256_byteshift((__v4di)(__m256i)(a), (int)(imm))) | |
| 2061 | #define _mm256_bslli_epi128(a, imm) \ | |
| 2062 | ((__m256i)__builtin_ia32_pslldqi256_byteshift((__v32qi)(__m256i)(a), \ | |
| 2063 | (int)(imm))) | |
| 2123 | 2064 | |
| 2124 | 2065 | /// Shifts each 16-bit element of the 256-bit vector of [16 x i16] in \a __a |
| 2125 | 2066 | /// left by \a __count bits, shifting in zero bits, and returns the result. |
| ... | ... | @@ -2134,9 +2075,8 @@ _mm256_sign_epi32(__m256i __a, __m256i __b) |
| 2134 | 2075 | /// \param __count |
| 2135 | 2076 | /// An unsigned integer value specifying the shift count (in bits). |
| 2136 | 2077 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2137 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2138 | _mm256_slli_epi16(__m256i __a, int __count) | |
| 2139 | { | |
| 2078 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2079 | _mm256_slli_epi16(__m256i __a, int __count) { | |
| 2140 | 2080 | return (__m256i)__builtin_ia32_psllwi256((__v16hi)__a, __count); |
| 2141 | 2081 | } |
| 2142 | 2082 | |
| ... | ... | @@ -2155,9 +2095,8 @@ _mm256_slli_epi16(__m256i __a, int __count) |
| 2155 | 2095 | /// A 128-bit vector of [2 x i64] whose lower element gives the unsigned |
| 2156 | 2096 | /// shift count (in bits). The upper element is ignored. |
| 2157 | 2097 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2158 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2159 | _mm256_sll_epi16(__m256i __a, __m128i __count) | |
| 2160 | { | |
| 2098 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2099 | _mm256_sll_epi16(__m256i __a, __m128i __count) { | |
| 2161 | 2100 | return (__m256i)__builtin_ia32_psllw256((__v16hi)__a, (__v8hi)__count); |
| 2162 | 2101 | } |
| 2163 | 2102 | |
| ... | ... | @@ -2174,9 +2113,8 @@ _mm256_sll_epi16(__m256i __a, __m128i __count) |
| 2174 | 2113 | /// \param __count |
| 2175 | 2114 | /// An unsigned integer value specifying the shift count (in bits). |
| 2176 | 2115 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2177 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2178 | _mm256_slli_epi32(__m256i __a, int __count) | |
| 2179 | { | |
| 2116 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2117 | _mm256_slli_epi32(__m256i __a, int __count) { | |
| 2180 | 2118 | return (__m256i)__builtin_ia32_pslldi256((__v8si)__a, __count); |
| 2181 | 2119 | } |
| 2182 | 2120 | |
| ... | ... | @@ -2195,9 +2133,8 @@ _mm256_slli_epi32(__m256i __a, int __count) |
| 2195 | 2133 | /// A 128-bit vector of [2 x i64] whose lower element gives the unsigned |
| 2196 | 2134 | /// shift count (in bits). The upper element is ignored. |
| 2197 | 2135 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2198 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2199 | _mm256_sll_epi32(__m256i __a, __m128i __count) | |
| 2200 | { | |
| 2136 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2137 | _mm256_sll_epi32(__m256i __a, __m128i __count) { | |
| 2201 | 2138 | return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count); |
| 2202 | 2139 | } |
| 2203 | 2140 | |
| ... | ... | @@ -2214,9 +2151,8 @@ _mm256_sll_epi32(__m256i __a, __m128i __count) |
| 2214 | 2151 | /// \param __count |
| 2215 | 2152 | /// An unsigned integer value specifying the shift count (in bits). |
| 2216 | 2153 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 2217 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2218 | _mm256_slli_epi64(__m256i __a, int __count) | |
| 2219 | { | |
| 2154 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2155 | _mm256_slli_epi64(__m256i __a, int __count) { | |
| 2220 | 2156 | return __builtin_ia32_psllqi256((__v4di)__a, __count); |
| 2221 | 2157 | } |
| 2222 | 2158 | |
| ... | ... | @@ -2235,9 +2171,8 @@ _mm256_slli_epi64(__m256i __a, int __count) |
| 2235 | 2171 | /// A 128-bit vector of [2 x i64] whose lower element gives the unsigned |
| 2236 | 2172 | /// shift count (in bits). The upper element is ignored. |
| 2237 | 2173 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 2238 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2239 | _mm256_sll_epi64(__m256i __a, __m128i __count) | |
| 2240 | { | |
| 2174 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2175 | _mm256_sll_epi64(__m256i __a, __m128i __count) { | |
| 2241 | 2176 | return __builtin_ia32_psllq256((__v4di)__a, __count); |
| 2242 | 2177 | } |
| 2243 | 2178 | |
| ... | ... | @@ -2255,9 +2190,8 @@ _mm256_sll_epi64(__m256i __a, __m128i __count) |
| 2255 | 2190 | /// \param __count |
| 2256 | 2191 | /// An unsigned integer value specifying the shift count (in bits). |
| 2257 | 2192 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2258 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2259 | _mm256_srai_epi16(__m256i __a, int __count) | |
| 2260 | { | |
| 2193 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2194 | _mm256_srai_epi16(__m256i __a, int __count) { | |
| 2261 | 2195 | return (__m256i)__builtin_ia32_psrawi256((__v16hi)__a, __count); |
| 2262 | 2196 | } |
| 2263 | 2197 | |
| ... | ... | @@ -2277,9 +2211,8 @@ _mm256_srai_epi16(__m256i __a, int __count) |
| 2277 | 2211 | /// A 128-bit vector of [2 x i64] whose lower element gives the unsigned |
| 2278 | 2212 | /// shift count (in bits). The upper element is ignored. |
| 2279 | 2213 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2280 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2281 | _mm256_sra_epi16(__m256i __a, __m128i __count) | |
| 2282 | { | |
| 2214 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2215 | _mm256_sra_epi16(__m256i __a, __m128i __count) { | |
| 2283 | 2216 | return (__m256i)__builtin_ia32_psraw256((__v16hi)__a, (__v8hi)__count); |
| 2284 | 2217 | } |
| 2285 | 2218 | |
| ... | ... | @@ -2297,9 +2230,8 @@ _mm256_sra_epi16(__m256i __a, __m128i __count) |
| 2297 | 2230 | /// \param __count |
| 2298 | 2231 | /// An unsigned integer value specifying the shift count (in bits). |
| 2299 | 2232 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2300 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2301 | _mm256_srai_epi32(__m256i __a, int __count) | |
| 2302 | { | |
| 2233 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2234 | _mm256_srai_epi32(__m256i __a, int __count) { | |
| 2303 | 2235 | return (__m256i)__builtin_ia32_psradi256((__v8si)__a, __count); |
| 2304 | 2236 | } |
| 2305 | 2237 | |
| ... | ... | @@ -2319,9 +2251,8 @@ _mm256_srai_epi32(__m256i __a, int __count) |
| 2319 | 2251 | /// A 128-bit vector of [2 x i64] whose lower element gives the unsigned |
| 2320 | 2252 | /// shift count (in bits). The upper element is ignored. |
| 2321 | 2253 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2322 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2323 | _mm256_sra_epi32(__m256i __a, __m128i __count) | |
| 2324 | { | |
| 2254 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2255 | _mm256_sra_epi32(__m256i __a, __m128i __count) { | |
| 2325 | 2256 | return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count); |
| 2326 | 2257 | } |
| 2327 | 2258 | |
| ... | ... | @@ -2342,8 +2273,9 @@ _mm256_sra_epi32(__m256i __a, __m128i __count) |
| 2342 | 2273 | /// \param imm |
| 2343 | 2274 | /// An unsigned immediate value specifying the shift count (in bytes). |
| 2344 | 2275 | /// \returns A 256-bit integer vector containing the result. |
| 2345 | #define _mm256_srli_si256(a, imm) \ | |
| 2346 | ((__m256i)__builtin_ia32_psrldqi256_byteshift((__m256i)(a), (int)(imm))) | |
| 2276 | #define _mm256_srli_si256(a, imm) \ | |
| 2277 | ((__m256i)__builtin_ia32_psrldqi256_byteshift((__v32qi)(__m256i)(a), \ | |
| 2278 | (int)(imm))) | |
| 2347 | 2279 | |
| 2348 | 2280 | /// Shifts each 128-bit half of the 256-bit integer vector in \a a right by |
| 2349 | 2281 | /// \a imm bytes, shifting in zero bytes, and returns the result. If |
| ... | ... | @@ -2362,8 +2294,9 @@ _mm256_sra_epi32(__m256i __a, __m128i __count) |
| 2362 | 2294 | /// \param imm |
| 2363 | 2295 | /// An unsigned immediate value specifying the shift count (in bytes). |
| 2364 | 2296 | /// \returns A 256-bit integer vector containing the result. |
| 2365 | #define _mm256_bsrli_epi128(a, imm) \ | |
| 2366 | ((__m256i)__builtin_ia32_psrldqi256_byteshift((__m256i)(a), (int)(imm))) | |
| 2297 | #define _mm256_bsrli_epi128(a, imm) \ | |
| 2298 | ((__m256i)__builtin_ia32_psrldqi256_byteshift((__v32qi)(__m256i)(a), \ | |
| 2299 | (int)(imm))) | |
| 2367 | 2300 | |
| 2368 | 2301 | /// Shifts each 16-bit element of the 256-bit vector of [16 x i16] in \a __a |
| 2369 | 2302 | /// right by \a __count bits, shifting in zero bits, and returns the result. |
| ... | ... | @@ -2378,9 +2311,8 @@ _mm256_sra_epi32(__m256i __a, __m128i __count) |
| 2378 | 2311 | /// \param __count |
| 2379 | 2312 | /// An unsigned integer value specifying the shift count (in bits). |
| 2380 | 2313 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2381 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2382 | _mm256_srli_epi16(__m256i __a, int __count) | |
| 2383 | { | |
| 2314 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2315 | _mm256_srli_epi16(__m256i __a, int __count) { | |
| 2384 | 2316 | return (__m256i)__builtin_ia32_psrlwi256((__v16hi)__a, __count); |
| 2385 | 2317 | } |
| 2386 | 2318 | |
| ... | ... | @@ -2399,9 +2331,8 @@ _mm256_srli_epi16(__m256i __a, int __count) |
| 2399 | 2331 | /// A 128-bit vector of [2 x i64] whose lower element gives the unsigned |
| 2400 | 2332 | /// shift count (in bits). The upper element is ignored. |
| 2401 | 2333 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2402 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2403 | _mm256_srl_epi16(__m256i __a, __m128i __count) | |
| 2404 | { | |
| 2334 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2335 | _mm256_srl_epi16(__m256i __a, __m128i __count) { | |
| 2405 | 2336 | return (__m256i)__builtin_ia32_psrlw256((__v16hi)__a, (__v8hi)__count); |
| 2406 | 2337 | } |
| 2407 | 2338 | |
| ... | ... | @@ -2418,9 +2349,8 @@ _mm256_srl_epi16(__m256i __a, __m128i __count) |
| 2418 | 2349 | /// \param __count |
| 2419 | 2350 | /// An unsigned integer value specifying the shift count (in bits). |
| 2420 | 2351 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2421 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2422 | _mm256_srli_epi32(__m256i __a, int __count) | |
| 2423 | { | |
| 2352 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2353 | _mm256_srli_epi32(__m256i __a, int __count) { | |
| 2424 | 2354 | return (__m256i)__builtin_ia32_psrldi256((__v8si)__a, __count); |
| 2425 | 2355 | } |
| 2426 | 2356 | |
| ... | ... | @@ -2439,9 +2369,8 @@ _mm256_srli_epi32(__m256i __a, int __count) |
| 2439 | 2369 | /// A 128-bit vector of [2 x i64] whose lower element gives the unsigned |
| 2440 | 2370 | /// shift count (in bits). The upper element is ignored. |
| 2441 | 2371 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2442 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2443 | _mm256_srl_epi32(__m256i __a, __m128i __count) | |
| 2444 | { | |
| 2372 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2373 | _mm256_srl_epi32(__m256i __a, __m128i __count) { | |
| 2445 | 2374 | return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count); |
| 2446 | 2375 | } |
| 2447 | 2376 | |
| ... | ... | @@ -2458,9 +2387,8 @@ _mm256_srl_epi32(__m256i __a, __m128i __count) |
| 2458 | 2387 | /// \param __count |
| 2459 | 2388 | /// An unsigned integer value specifying the shift count (in bits). |
| 2460 | 2389 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 2461 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2462 | _mm256_srli_epi64(__m256i __a, int __count) | |
| 2463 | { | |
| 2390 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2391 | _mm256_srli_epi64(__m256i __a, int __count) { | |
| 2464 | 2392 | return __builtin_ia32_psrlqi256((__v4di)__a, __count); |
| 2465 | 2393 | } |
| 2466 | 2394 | |
| ... | ... | @@ -2479,9 +2407,8 @@ _mm256_srli_epi64(__m256i __a, int __count) |
| 2479 | 2407 | /// A 128-bit vector of [2 x i64] whose lower element gives the unsigned |
| 2480 | 2408 | /// shift count (in bits). The upper element is ignored. |
| 2481 | 2409 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 2482 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2483 | _mm256_srl_epi64(__m256i __a, __m128i __count) | |
| 2484 | { | |
| 2410 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2411 | _mm256_srl_epi64(__m256i __a, __m128i __count) { | |
| 2485 | 2412 | return __builtin_ia32_psrlq256((__v4di)__a, __count); |
| 2486 | 2413 | } |
| 2487 | 2414 | |
| ... | ... | @@ -2506,9 +2433,8 @@ _mm256_srl_epi64(__m256i __a, __m128i __count) |
| 2506 | 2433 | /// \param __b |
| 2507 | 2434 | /// A 256-bit integer vector containing the subtrahends. |
| 2508 | 2435 | /// \returns A 256-bit integer vector containing the differences. |
| 2509 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2510 | _mm256_sub_epi8(__m256i __a, __m256i __b) | |
| 2511 | { | |
| 2436 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2437 | _mm256_sub_epi8(__m256i __a, __m256i __b) { | |
| 2512 | 2438 | return (__m256i)((__v32qu)__a - (__v32qu)__b); |
| 2513 | 2439 | } |
| 2514 | 2440 | |
| ... | ... | @@ -2533,9 +2459,8 @@ _mm256_sub_epi8(__m256i __a, __m256i __b) |
| 2533 | 2459 | /// \param __b |
| 2534 | 2460 | /// A 256-bit vector of [16 x i16] containing the subtrahends. |
| 2535 | 2461 | /// \returns A 256-bit vector of [16 x i16] containing the differences. |
| 2536 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2537 | _mm256_sub_epi16(__m256i __a, __m256i __b) | |
| 2538 | { | |
| 2462 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2463 | _mm256_sub_epi16(__m256i __a, __m256i __b) { | |
| 2539 | 2464 | return (__m256i)((__v16hu)__a - (__v16hu)__b); |
| 2540 | 2465 | } |
| 2541 | 2466 | |
| ... | ... | @@ -2559,9 +2484,8 @@ _mm256_sub_epi16(__m256i __a, __m256i __b) |
| 2559 | 2484 | /// \param __b |
| 2560 | 2485 | /// A 256-bit vector of [8 x i32] containing the subtrahends. |
| 2561 | 2486 | /// \returns A 256-bit vector of [8 x i32] containing the differences. |
| 2562 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2563 | _mm256_sub_epi32(__m256i __a, __m256i __b) | |
| 2564 | { | |
| 2487 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2488 | _mm256_sub_epi32(__m256i __a, __m256i __b) { | |
| 2565 | 2489 | return (__m256i)((__v8su)__a - (__v8su)__b); |
| 2566 | 2490 | } |
| 2567 | 2491 | |
| ... | ... | @@ -2585,9 +2509,8 @@ _mm256_sub_epi32(__m256i __a, __m256i __b) |
| 2585 | 2509 | /// \param __b |
| 2586 | 2510 | /// A 256-bit vector of [4 x i64] containing the subtrahends. |
| 2587 | 2511 | /// \returns A 256-bit vector of [4 x i64] containing the differences. |
| 2588 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2589 | _mm256_sub_epi64(__m256i __a, __m256i __b) | |
| 2590 | { | |
| 2512 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2513 | _mm256_sub_epi64(__m256i __a, __m256i __b) { | |
| 2591 | 2514 | return (__m256i)((__v4du)__a - (__v4du)__b); |
| 2592 | 2515 | } |
| 2593 | 2516 | |
| ... | ... | @@ -2611,9 +2534,8 @@ _mm256_sub_epi64(__m256i __a, __m256i __b) |
| 2611 | 2534 | /// \param __b |
| 2612 | 2535 | /// A 256-bit integer vector containing the subtrahends. |
| 2613 | 2536 | /// \returns A 256-bit integer vector containing the differences. |
| 2614 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2615 | _mm256_subs_epi8(__m256i __a, __m256i __b) | |
| 2616 | { | |
| 2537 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2538 | _mm256_subs_epi8(__m256i __a, __m256i __b) { | |
| 2617 | 2539 | return (__m256i)__builtin_elementwise_sub_sat((__v32qs)__a, (__v32qs)__b); |
| 2618 | 2540 | } |
| 2619 | 2541 | |
| ... | ... | @@ -2637,9 +2559,8 @@ _mm256_subs_epi8(__m256i __a, __m256i __b) |
| 2637 | 2559 | /// \param __b |
| 2638 | 2560 | /// A 256-bit vector of [16 x i16] containing the subtrahends. |
| 2639 | 2561 | /// \returns A 256-bit vector of [16 x i16] containing the differences. |
| 2640 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2641 | _mm256_subs_epi16(__m256i __a, __m256i __b) | |
| 2642 | { | |
| 2562 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2563 | _mm256_subs_epi16(__m256i __a, __m256i __b) { | |
| 2643 | 2564 | return (__m256i)__builtin_elementwise_sub_sat((__v16hi)__a, (__v16hi)__b); |
| 2644 | 2565 | } |
| 2645 | 2566 | |
| ... | ... | @@ -2664,9 +2585,8 @@ _mm256_subs_epi16(__m256i __a, __m256i __b) |
| 2664 | 2585 | /// \param __b |
| 2665 | 2586 | /// A 256-bit integer vector containing the subtrahends. |
| 2666 | 2587 | /// \returns A 256-bit integer vector containing the differences. |
| 2667 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2668 | _mm256_subs_epu8(__m256i __a, __m256i __b) | |
| 2669 | { | |
| 2588 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2589 | _mm256_subs_epu8(__m256i __a, __m256i __b) { | |
| 2670 | 2590 | return (__m256i)__builtin_elementwise_sub_sat((__v32qu)__a, (__v32qu)__b); |
| 2671 | 2591 | } |
| 2672 | 2592 | |
| ... | ... | @@ -2690,9 +2610,8 @@ _mm256_subs_epu8(__m256i __a, __m256i __b) |
| 2690 | 2610 | /// \param __b |
| 2691 | 2611 | /// A 256-bit vector of [16 x i16] containing the subtrahends. |
| 2692 | 2612 | /// \returns A 256-bit vector of [16 x i16] containing the differences. |
| 2693 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2694 | _mm256_subs_epu16(__m256i __a, __m256i __b) | |
| 2695 | { | |
| 2613 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2614 | _mm256_subs_epu16(__m256i __a, __m256i __b) { | |
| 2696 | 2615 | return (__m256i)__builtin_elementwise_sub_sat((__v16hu)__a, (__v16hu)__b); |
| 2697 | 2616 | } |
| 2698 | 2617 | |
| ... | ... | @@ -2724,9 +2643,8 @@ _mm256_subs_epu16(__m256i __a, __m256i __b) |
| 2724 | 2643 | /// A 256-bit integer vector used as the source for the odd-numbered bytes |
| 2725 | 2644 | /// of the result. |
| 2726 | 2645 | /// \returns A 256-bit integer vector containing the result. |
| 2727 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2728 | _mm256_unpackhi_epi8(__m256i __a, __m256i __b) | |
| 2729 | { | |
| 2646 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2647 | _mm256_unpackhi_epi8(__m256i __a, __m256i __b) { | |
| 2730 | 2648 | return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 8, 32+8, 9, 32+9, 10, 32+10, 11, 32+11, 12, 32+12, 13, 32+13, 14, 32+14, 15, 32+15, 24, 32+24, 25, 32+25, 26, 32+26, 27, 32+27, 28, 32+28, 29, 32+29, 30, 32+30, 31, 32+31); |
| 2731 | 2649 | } |
| 2732 | 2650 | |
| ... | ... | @@ -2759,9 +2677,8 @@ _mm256_unpackhi_epi8(__m256i __a, __m256i __b) |
| 2759 | 2677 | /// A 256-bit vector of [16 x i16] used as the source for the odd-numbered |
| 2760 | 2678 | /// elements of the result. |
| 2761 | 2679 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2762 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2763 | _mm256_unpackhi_epi16(__m256i __a, __m256i __b) | |
| 2764 | { | |
| 2680 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2681 | _mm256_unpackhi_epi16(__m256i __a, __m256i __b) { | |
| 2765 | 2682 | return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15); |
| 2766 | 2683 | } |
| 2767 | 2684 | |
| ... | ... | @@ -2793,9 +2710,8 @@ _mm256_unpackhi_epi16(__m256i __a, __m256i __b) |
| 2793 | 2710 | /// A 256-bit vector of [8 x i32] used as the source for the odd-numbered |
| 2794 | 2711 | /// elements of the result. |
| 2795 | 2712 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2796 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2797 | _mm256_unpackhi_epi32(__m256i __a, __m256i __b) | |
| 2798 | { | |
| 2713 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2714 | _mm256_unpackhi_epi32(__m256i __a, __m256i __b) { | |
| 2799 | 2715 | return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7); |
| 2800 | 2716 | } |
| 2801 | 2717 | |
| ... | ... | @@ -2823,9 +2739,8 @@ _mm256_unpackhi_epi32(__m256i __a, __m256i __b) |
| 2823 | 2739 | /// A 256-bit vector of [4 x i64] used as the source for the odd-numbered |
| 2824 | 2740 | /// elements of the result. |
| 2825 | 2741 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 2826 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2827 | _mm256_unpackhi_epi64(__m256i __a, __m256i __b) | |
| 2828 | { | |
| 2742 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2743 | _mm256_unpackhi_epi64(__m256i __a, __m256i __b) { | |
| 2829 | 2744 | return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 1, 4+1, 3, 4+3); |
| 2830 | 2745 | } |
| 2831 | 2746 | |
| ... | ... | @@ -2857,9 +2772,8 @@ _mm256_unpackhi_epi64(__m256i __a, __m256i __b) |
| 2857 | 2772 | /// A 256-bit integer vector used as the source for the odd-numbered bytes |
| 2858 | 2773 | /// of the result. |
| 2859 | 2774 | /// \returns A 256-bit integer vector containing the result. |
| 2860 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2861 | _mm256_unpacklo_epi8(__m256i __a, __m256i __b) | |
| 2862 | { | |
| 2775 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2776 | _mm256_unpacklo_epi8(__m256i __a, __m256i __b) { | |
| 2863 | 2777 | return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 0, 32+0, 1, 32+1, 2, 32+2, 3, 32+3, 4, 32+4, 5, 32+5, 6, 32+6, 7, 32+7, 16, 32+16, 17, 32+17, 18, 32+18, 19, 32+19, 20, 32+20, 21, 32+21, 22, 32+22, 23, 32+23); |
| 2864 | 2778 | } |
| 2865 | 2779 | |
| ... | ... | @@ -2892,9 +2806,8 @@ _mm256_unpacklo_epi8(__m256i __a, __m256i __b) |
| 2892 | 2806 | /// A 256-bit vector of [16 x i16] used as the source for the odd-numbered |
| 2893 | 2807 | /// elements of the result. |
| 2894 | 2808 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 2895 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2896 | _mm256_unpacklo_epi16(__m256i __a, __m256i __b) | |
| 2897 | { | |
| 2809 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2810 | _mm256_unpacklo_epi16(__m256i __a, __m256i __b) { | |
| 2898 | 2811 | return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11); |
| 2899 | 2812 | } |
| 2900 | 2813 | |
| ... | ... | @@ -2926,9 +2839,8 @@ _mm256_unpacklo_epi16(__m256i __a, __m256i __b) |
| 2926 | 2839 | /// A 256-bit vector of [8 x i32] used as the source for the odd-numbered |
| 2927 | 2840 | /// elements of the result. |
| 2928 | 2841 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 2929 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2930 | _mm256_unpacklo_epi32(__m256i __a, __m256i __b) | |
| 2931 | { | |
| 2842 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2843 | _mm256_unpacklo_epi32(__m256i __a, __m256i __b) { | |
| 2932 | 2844 | return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5); |
| 2933 | 2845 | } |
| 2934 | 2846 | |
| ... | ... | @@ -2956,9 +2868,8 @@ _mm256_unpacklo_epi32(__m256i __a, __m256i __b) |
| 2956 | 2868 | /// A 256-bit vector of [4 x i64] used as the source for the odd-numbered |
| 2957 | 2869 | /// elements of the result. |
| 2958 | 2870 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 2959 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2960 | _mm256_unpacklo_epi64(__m256i __a, __m256i __b) | |
| 2961 | { | |
| 2871 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2872 | _mm256_unpacklo_epi64(__m256i __a, __m256i __b) { | |
| 2962 | 2873 | return (__m256i)__builtin_shufflevector((__v4di)__a, (__v4di)__b, 0, 4+0, 2, 4+2); |
| 2963 | 2874 | } |
| 2964 | 2875 | |
| ... | ... | @@ -2974,7 +2885,7 @@ _mm256_unpacklo_epi64(__m256i __a, __m256i __b) |
| 2974 | 2885 | /// \param __b |
| 2975 | 2886 | /// A 256-bit integer vector. |
| 2976 | 2887 | /// \returns A 256-bit integer vector containing the result. |
| 2977 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2888 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2978 | 2889 | _mm256_xor_si256(__m256i __a, __m256i __b) |
| 2979 | 2890 | { |
| 2980 | 2891 | return (__m256i)((__v4du)__a ^ (__v4du)__b); |
| ... | ... | @@ -3009,9 +2920,8 @@ _mm256_stream_load_si256(const void *__V) |
| 3009 | 2920 | /// \param __X |
| 3010 | 2921 | /// A 128-bit vector of [4 x float] whose low element will be broadcast. |
| 3011 | 2922 | /// \returns A 128-bit vector of [4 x float] containing the result. |
| 3012 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 3013 | _mm_broadcastss_ps(__m128 __X) | |
| 3014 | { | |
| 2923 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2924 | _mm_broadcastss_ps(__m128 __X) { | |
| 3015 | 2925 | return (__m128)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0); |
| 3016 | 2926 | } |
| 3017 | 2927 | |
| ... | ... | @@ -3026,9 +2936,8 @@ _mm_broadcastss_ps(__m128 __X) |
| 3026 | 2936 | /// \param __a |
| 3027 | 2937 | /// A 128-bit vector of [2 x double] whose low element will be broadcast. |
| 3028 | 2938 | /// \returns A 128-bit vector of [2 x double] containing the result. |
| 3029 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 3030 | _mm_broadcastsd_pd(__m128d __a) | |
| 3031 | { | |
| 2939 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2940 | _mm_broadcastsd_pd(__m128d __a) { | |
| 3032 | 2941 | return __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0); |
| 3033 | 2942 | } |
| 3034 | 2943 | |
| ... | ... | @@ -3043,9 +2952,8 @@ _mm_broadcastsd_pd(__m128d __a) |
| 3043 | 2952 | /// \param __X |
| 3044 | 2953 | /// A 128-bit vector of [4 x float] whose low element will be broadcast. |
| 3045 | 2954 | /// \returns A 256-bit vector of [8 x float] containing the result. |
| 3046 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 3047 | _mm256_broadcastss_ps(__m128 __X) | |
| 3048 | { | |
| 2955 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2956 | _mm256_broadcastss_ps(__m128 __X) { | |
| 3049 | 2957 | return (__m256)__builtin_shufflevector((__v4sf)__X, (__v4sf)__X, 0, 0, 0, 0, 0, 0, 0, 0); |
| 3050 | 2958 | } |
| 3051 | 2959 | |
| ... | ... | @@ -3060,9 +2968,8 @@ _mm256_broadcastss_ps(__m128 __X) |
| 3060 | 2968 | /// \param __X |
| 3061 | 2969 | /// A 128-bit vector of [2 x double] whose low element will be broadcast. |
| 3062 | 2970 | /// \returns A 256-bit vector of [4 x double] containing the result. |
| 3063 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 3064 | _mm256_broadcastsd_pd(__m128d __X) | |
| 3065 | { | |
| 2971 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2972 | _mm256_broadcastsd_pd(__m128d __X) { | |
| 3066 | 2973 | return (__m256d)__builtin_shufflevector((__v2df)__X, (__v2df)__X, 0, 0, 0, 0); |
| 3067 | 2974 | } |
| 3068 | 2975 | |
| ... | ... | @@ -3076,9 +2983,8 @@ _mm256_broadcastsd_pd(__m128d __X) |
| 3076 | 2983 | /// \param __X |
| 3077 | 2984 | /// A 128-bit integer vector to be broadcast. |
| 3078 | 2985 | /// \returns A 256-bit integer vector containing the result. |
| 3079 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3080 | _mm256_broadcastsi128_si256(__m128i __X) | |
| 3081 | { | |
| 2986 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2987 | _mm256_broadcastsi128_si256(__m128i __X) { | |
| 3082 | 2988 | return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 1, 0, 1); |
| 3083 | 2989 | } |
| 3084 | 2990 | |
| ... | ... | @@ -3168,9 +3074,8 @@ _mm256_broadcastsi128_si256(__m128i __X) |
| 3168 | 3074 | /// \param __X |
| 3169 | 3075 | /// A 128-bit integer vector whose low byte will be broadcast. |
| 3170 | 3076 | /// \returns A 256-bit integer vector containing the result. |
| 3171 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3172 | _mm256_broadcastb_epi8(__m128i __X) | |
| 3173 | { | |
| 3077 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3078 | _mm256_broadcastb_epi8(__m128i __X) { | |
| 3174 | 3079 | return (__m256i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 3175 | 3080 | } |
| 3176 | 3081 | |
| ... | ... | @@ -3184,9 +3089,8 @@ _mm256_broadcastb_epi8(__m128i __X) |
| 3184 | 3089 | /// \param __X |
| 3185 | 3090 | /// A 128-bit vector of [8 x i16] whose low element will be broadcast. |
| 3186 | 3091 | /// \returns A 256-bit vector of [16 x i16] containing the result. |
| 3187 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3188 | _mm256_broadcastw_epi16(__m128i __X) | |
| 3189 | { | |
| 3092 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3093 | _mm256_broadcastw_epi16(__m128i __X) { | |
| 3190 | 3094 | return (__m256i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 3191 | 3095 | } |
| 3192 | 3096 | |
| ... | ... | @@ -3200,9 +3104,8 @@ _mm256_broadcastw_epi16(__m128i __X) |
| 3200 | 3104 | /// \param __X |
| 3201 | 3105 | /// A 128-bit vector of [4 x i32] whose low element will be broadcast. |
| 3202 | 3106 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 3203 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3204 | _mm256_broadcastd_epi32(__m128i __X) | |
| 3205 | { | |
| 3107 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3108 | _mm256_broadcastd_epi32(__m128i __X) { | |
| 3206 | 3109 | return (__m256i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0, 0, 0, 0, 0); |
| 3207 | 3110 | } |
| 3208 | 3111 | |
| ... | ... | @@ -3216,9 +3119,8 @@ _mm256_broadcastd_epi32(__m128i __X) |
| 3216 | 3119 | /// \param __X |
| 3217 | 3120 | /// A 128-bit vector of [2 x i64] whose low element will be broadcast. |
| 3218 | 3121 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 3219 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3220 | _mm256_broadcastq_epi64(__m128i __X) | |
| 3221 | { | |
| 3122 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3123 | _mm256_broadcastq_epi64(__m128i __X) { | |
| 3222 | 3124 | return (__m256i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0, 0, 0); |
| 3223 | 3125 | } |
| 3224 | 3126 | |
| ... | ... | @@ -3232,9 +3134,8 @@ _mm256_broadcastq_epi64(__m128i __X) |
| 3232 | 3134 | /// \param __X |
| 3233 | 3135 | /// A 128-bit integer vector whose low byte will be broadcast. |
| 3234 | 3136 | /// \returns A 128-bit integer vector containing the result. |
| 3235 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3236 | _mm_broadcastb_epi8(__m128i __X) | |
| 3237 | { | |
| 3137 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3138 | _mm_broadcastb_epi8(__m128i __X) { | |
| 3238 | 3139 | return (__m128i)__builtin_shufflevector((__v16qi)__X, (__v16qi)__X, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 3239 | 3140 | } |
| 3240 | 3141 | |
| ... | ... | @@ -3248,9 +3149,8 @@ _mm_broadcastb_epi8(__m128i __X) |
| 3248 | 3149 | /// \param __X |
| 3249 | 3150 | /// A 128-bit vector of [8 x i16] whose low element will be broadcast. |
| 3250 | 3151 | /// \returns A 128-bit vector of [8 x i16] containing the result. |
| 3251 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3252 | _mm_broadcastw_epi16(__m128i __X) | |
| 3253 | { | |
| 3152 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3153 | _mm_broadcastw_epi16(__m128i __X) { | |
| 3254 | 3154 | return (__m128i)__builtin_shufflevector((__v8hi)__X, (__v8hi)__X, 0, 0, 0, 0, 0, 0, 0, 0); |
| 3255 | 3155 | } |
| 3256 | 3156 | |
| ... | ... | @@ -3264,9 +3164,8 @@ _mm_broadcastw_epi16(__m128i __X) |
| 3264 | 3164 | /// \param __X |
| 3265 | 3165 | /// A 128-bit vector of [4 x i32] whose low element will be broadcast. |
| 3266 | 3166 | /// \returns A 128-bit vector of [4 x i32] containing the result. |
| 3267 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3268 | _mm_broadcastd_epi32(__m128i __X) | |
| 3269 | { | |
| 3167 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3168 | _mm_broadcastd_epi32(__m128i __X) { | |
| 3270 | 3169 | return (__m128i)__builtin_shufflevector((__v4si)__X, (__v4si)__X, 0, 0, 0, 0); |
| 3271 | 3170 | } |
| 3272 | 3171 | |
| ... | ... | @@ -3280,9 +3179,8 @@ _mm_broadcastd_epi32(__m128i __X) |
| 3280 | 3179 | /// \param __X |
| 3281 | 3180 | /// A 128-bit vector of [2 x i64] whose low element will be broadcast. |
| 3282 | 3181 | /// \returns A 128-bit vector of [2 x i64] containing the result. |
| 3283 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3284 | _mm_broadcastq_epi64(__m128i __X) | |
| 3285 | { | |
| 3182 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3183 | _mm_broadcastq_epi64(__m128i __X) { | |
| 3286 | 3184 | return (__m128i)__builtin_shufflevector((__v2di)__X, (__v2di)__X, 0, 0); |
| 3287 | 3185 | } |
| 3288 | 3186 | |
| ... | ... | @@ -3308,9 +3206,8 @@ _mm_broadcastq_epi64(__m128i __X) |
| 3308 | 3206 | /// A 256-bit vector of [8 x i32] containing indexes of values to use from |
| 3309 | 3207 | /// \a __a. |
| 3310 | 3208 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 3311 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3312 | _mm256_permutevar8x32_epi32(__m256i __a, __m256i __b) | |
| 3313 | { | |
| 3209 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3210 | _mm256_permutevar8x32_epi32(__m256i __a, __m256i __b) { | |
| 3314 | 3211 | return (__m256i)__builtin_ia32_permvarsi256((__v8si)__a, (__v8si)__b); |
| 3315 | 3212 | } |
| 3316 | 3213 | |
| ... | ... | @@ -3366,9 +3263,8 @@ _mm256_permutevar8x32_epi32(__m256i __a, __m256i __b) |
| 3366 | 3263 | /// A 256-bit vector of [8 x i32] containing indexes of values to use from |
| 3367 | 3264 | /// \a __a. |
| 3368 | 3265 | /// \returns A 256-bit vector of [8 x float] containing the result. |
| 3369 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 3370 | _mm256_permutevar8x32_ps(__m256 __a, __m256i __b) | |
| 3371 | { | |
| 3266 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3267 | _mm256_permutevar8x32_ps(__m256 __a, __m256i __b) { | |
| 3372 | 3268 | return (__m256)__builtin_ia32_permvarsf256((__v8sf)__a, (__v8si)__b); |
| 3373 | 3269 | } |
| 3374 | 3270 | |
| ... | ... | @@ -3756,7 +3652,7 @@ _mm_maskstore_epi64(long long *__X, __m128i __M, __m128i __Y) |
| 3756 | 3652 | /// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in |
| 3757 | 3653 | /// bits). |
| 3758 | 3654 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 3759 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3655 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3760 | 3656 | _mm256_sllv_epi32(__m256i __X, __m256i __Y) |
| 3761 | 3657 | { |
| 3762 | 3658 | return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y); |
| ... | ... | @@ -3778,7 +3674,7 @@ _mm256_sllv_epi32(__m256i __X, __m256i __Y) |
| 3778 | 3674 | /// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in |
| 3779 | 3675 | /// bits). |
| 3780 | 3676 | /// \returns A 128-bit vector of [4 x i32] containing the result. |
| 3781 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3677 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3782 | 3678 | _mm_sllv_epi32(__m128i __X, __m128i __Y) |
| 3783 | 3679 | { |
| 3784 | 3680 | return (__m128i)__builtin_ia32_psllv4si((__v4si)__X, (__v4si)__Y); |
| ... | ... | @@ -3800,7 +3696,7 @@ _mm_sllv_epi32(__m128i __X, __m128i __Y) |
| 3800 | 3696 | /// A 256-bit vector of [4 x i64] containing the unsigned shift counts (in |
| 3801 | 3697 | /// bits). |
| 3802 | 3698 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 3803 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3699 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3804 | 3700 | _mm256_sllv_epi64(__m256i __X, __m256i __Y) |
| 3805 | 3701 | { |
| 3806 | 3702 | return (__m256i)__builtin_ia32_psllv4di((__v4di)__X, (__v4di)__Y); |
| ... | ... | @@ -3822,7 +3718,7 @@ _mm256_sllv_epi64(__m256i __X, __m256i __Y) |
| 3822 | 3718 | /// A 128-bit vector of [2 x i64] containing the unsigned shift counts (in |
| 3823 | 3719 | /// bits). |
| 3824 | 3720 | /// \returns A 128-bit vector of [2 x i64] containing the result. |
| 3825 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3721 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3826 | 3722 | _mm_sllv_epi64(__m128i __X, __m128i __Y) |
| 3827 | 3723 | { |
| 3828 | 3724 | return (__m128i)__builtin_ia32_psllv2di((__v2di)__X, (__v2di)__Y); |
| ... | ... | @@ -3845,7 +3741,7 @@ _mm_sllv_epi64(__m128i __X, __m128i __Y) |
| 3845 | 3741 | /// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in |
| 3846 | 3742 | /// bits). |
| 3847 | 3743 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 3848 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3744 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3849 | 3745 | _mm256_srav_epi32(__m256i __X, __m256i __Y) |
| 3850 | 3746 | { |
| 3851 | 3747 | return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y); |
| ... | ... | @@ -3868,7 +3764,7 @@ _mm256_srav_epi32(__m256i __X, __m256i __Y) |
| 3868 | 3764 | /// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in |
| 3869 | 3765 | /// bits). |
| 3870 | 3766 | /// \returns A 128-bit vector of [4 x i32] containing the result. |
| 3871 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3767 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3872 | 3768 | _mm_srav_epi32(__m128i __X, __m128i __Y) |
| 3873 | 3769 | { |
| 3874 | 3770 | return (__m128i)__builtin_ia32_psrav4si((__v4si)__X, (__v4si)__Y); |
| ... | ... | @@ -3890,7 +3786,7 @@ _mm_srav_epi32(__m128i __X, __m128i __Y) |
| 3890 | 3786 | /// A 256-bit vector of [8 x i32] containing the unsigned shift counts (in |
| 3891 | 3787 | /// bits). |
| 3892 | 3788 | /// \returns A 256-bit vector of [8 x i32] containing the result. |
| 3893 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3789 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3894 | 3790 | _mm256_srlv_epi32(__m256i __X, __m256i __Y) |
| 3895 | 3791 | { |
| 3896 | 3792 | return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y); |
| ... | ... | @@ -3912,7 +3808,7 @@ _mm256_srlv_epi32(__m256i __X, __m256i __Y) |
| 3912 | 3808 | /// A 128-bit vector of [4 x i32] containing the unsigned shift counts (in |
| 3913 | 3809 | /// bits). |
| 3914 | 3810 | /// \returns A 128-bit vector of [4 x i32] containing the result. |
| 3915 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3811 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3916 | 3812 | _mm_srlv_epi32(__m128i __X, __m128i __Y) |
| 3917 | 3813 | { |
| 3918 | 3814 | return (__m128i)__builtin_ia32_psrlv4si((__v4si)__X, (__v4si)__Y); |
| ... | ... | @@ -3934,7 +3830,7 @@ _mm_srlv_epi32(__m128i __X, __m128i __Y) |
| 3934 | 3830 | /// A 256-bit vector of [4 x i64] containing the unsigned shift counts (in |
| 3935 | 3831 | /// bits). |
| 3936 | 3832 | /// \returns A 256-bit vector of [4 x i64] containing the result. |
| 3937 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3833 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3938 | 3834 | _mm256_srlv_epi64(__m256i __X, __m256i __Y) |
| 3939 | 3835 | { |
| 3940 | 3836 | return (__m256i)__builtin_ia32_psrlv4di((__v4di)__X, (__v4di)__Y); |
| ... | ... | @@ -3956,7 +3852,7 @@ _mm256_srlv_epi64(__m256i __X, __m256i __Y) |
| 3956 | 3852 | /// A 128-bit vector of [2 x i64] containing the unsigned shift counts (in |
| 3957 | 3853 | /// bits). |
| 3958 | 3854 | /// \returns A 128-bit vector of [2 x i64] containing the result. |
| 3959 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3855 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3960 | 3856 | _mm_srlv_epi64(__m128i __X, __m128i __Y) |
| 3961 | 3857 | { |
| 3962 | 3858 | return (__m128i)__builtin_ia32_psrlv2di((__v2di)__X, (__v2di)__Y); |
| ... | ... | @@ -5289,5 +5185,7 @@ _mm_srlv_epi64(__m128i __X, __m128i __Y) |
| 5289 | 5185 | |
| 5290 | 5186 | #undef __DEFAULT_FN_ATTRS256 |
| 5291 | 5187 | #undef __DEFAULT_FN_ATTRS128 |
| 5188 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5189 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5292 | 5190 | |
| 5293 | 5191 | #endif /* __AVX2INTRIN_H */ |
lib/include/avx512bf16intrin.h+25-16| ... | ... | @@ -19,12 +19,19 @@ typedef __bf16 __v32bf __attribute__((__vector_size__(64), __aligned__(64))); |
| 19 | 19 | typedef __bf16 __m512bh __attribute__((__vector_size__(64), __aligned__(64))); |
| 20 | 20 | typedef __bf16 __bfloat16 __attribute__((deprecated("use __bf16 instead"))); |
| 21 | 21 | |
| 22 | #define __DEFAULT_FN_ATTRS512 \ | |
| 23 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16,evex512"), \ | |
| 22 | #define __DEFAULT_FN_ATTRS512 \ | |
| 23 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16"), \ | |
| 24 | 24 | __min_vector_width__(512))) |
| 25 | 25 | #define __DEFAULT_FN_ATTRS \ |
| 26 | __attribute__((__always_inline__, __nodebug__, \ | |
| 27 | __target__("avx512bf16,no-evex512"))) | |
| 26 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16"))) | |
| 27 | ||
| 28 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 29 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr | |
| 30 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 31 | #else | |
| 32 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 | |
| 33 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 34 | #endif | |
| 28 | 35 | |
| 29 | 36 | /// Convert One BF16 Data to One Single Float Data. |
| 30 | 37 | /// |
| ... | ... | @@ -36,8 +43,8 @@ typedef __bf16 __bfloat16 __attribute__((deprecated("use __bf16 instead"))); |
| 36 | 43 | /// A bfloat data. |
| 37 | 44 | /// \returns A float data whose sign field and exponent field keep unchanged, |
| 38 | 45 | /// and fraction field is extended to 23 bits. |
| 39 | static __inline__ float __DEFAULT_FN_ATTRS _mm_cvtsbh_ss(__bf16 __A) { | |
| 40 | return __builtin_ia32_cvtsbf162ss_32(__A); | |
| 46 | static __inline__ float __DEFAULT_FN_ATTRS_CONSTEXPR _mm_cvtsbh_ss(__bf16 __A) { | |
| 47 | return (float)(__A); | |
| 41 | 48 | } |
| 42 | 49 | |
| 43 | 50 | /// Convert Two Packed Single Data to One Packed BF16 Data. |
| ... | ... | @@ -236,9 +243,9 @@ _mm512_maskz_dpbf16_ps(__mmask16 __U, __m512 __D, __m512bh __A, __m512bh __B) { |
| 236 | 243 | /// \param __A |
| 237 | 244 | /// A 256-bit vector of [16 x bfloat]. |
| 238 | 245 | /// \returns A 512-bit vector of [16 x float] come from conversion of __A |
| 239 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_cvtpbh_ps(__m256bh __A) { | |
| 240 | return _mm512_castsi512_ps((__m512i)_mm512_slli_epi32( | |
| 241 | (__m512i)_mm512_cvtepi16_epi32((__m256i)__A), 16)); | |
| 246 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 247 | _mm512_cvtpbh_ps(__m256bh __A) { | |
| 248 | return (__m512) __builtin_convertvector(__A, __v16sf); | |
| 242 | 249 | } |
| 243 | 250 | |
| 244 | 251 | /// Convert Packed BF16 Data to Packed float Data using zeroing mask. |
| ... | ... | @@ -251,10 +258,11 @@ static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_cvtpbh_ps(__m256bh __A) { |
| 251 | 258 | /// \param __A |
| 252 | 259 | /// A 256-bit vector of [16 x bfloat]. |
| 253 | 260 | /// \returns A 512-bit vector of [16 x float] come from conversion of __A |
| 254 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 261 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 255 | 262 | _mm512_maskz_cvtpbh_ps(__mmask16 __U, __m256bh __A) { |
| 256 | return _mm512_castsi512_ps((__m512i)_mm512_slli_epi32( | |
| 257 | (__m512i)_mm512_maskz_cvtepi16_epi32((__mmask16)__U, (__m256i)__A), 16)); | |
| 263 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, | |
| 264 | (__v16sf)_mm512_cvtpbh_ps(__A), | |
| 265 | (__v16sf)_mm512_setzero_ps()); | |
| 258 | 266 | } |
| 259 | 267 | |
| 260 | 268 | /// Convert Packed BF16 Data to Packed float Data using merging mask. |
| ... | ... | @@ -269,15 +277,16 @@ _mm512_maskz_cvtpbh_ps(__mmask16 __U, __m256bh __A) { |
| 269 | 277 | /// \param __A |
| 270 | 278 | /// A 256-bit vector of [16 x bfloat]. |
| 271 | 279 | /// \returns A 512-bit vector of [16 x float] come from conversion of __A |
| 272 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 280 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 273 | 281 | _mm512_mask_cvtpbh_ps(__m512 __S, __mmask16 __U, __m256bh __A) { |
| 274 | return _mm512_castsi512_ps((__m512i)_mm512_mask_slli_epi32( | |
| 275 | (__m512i)__S, (__mmask16)__U, | |
| 276 | (__m512i)_mm512_cvtepi16_epi32((__m256i)__A), 16)); | |
| 282 | return (__m512)__builtin_ia32_selectps_512( | |
| 283 | (__mmask16)__U, (__v16sf)_mm512_cvtpbh_ps(__A), (__v16sf)__S); | |
| 277 | 284 | } |
| 278 | 285 | |
| 279 | 286 | #undef __DEFAULT_FN_ATTRS |
| 287 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 280 | 288 | #undef __DEFAULT_FN_ATTRS512 |
| 289 | #undef __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 281 | 290 | |
| 282 | 291 | #endif |
| 283 | 292 | #endif |
lib/include/avx512bitalgintrin.h+19-30| ... | ... | @@ -15,53 +15,44 @@ |
| 15 | 15 | #define __AVX512BITALGINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 18 | 19 | #define __DEFAULT_FN_ATTRS \ |
| 19 | __attribute__((__always_inline__, __nodebug__, \ | |
| 20 | __target__("avx512bitalg,evex512"), \ | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bitalg"), \ | |
| 21 | __min_vector_width__(512))) constexpr | |
| 22 | #else | |
| 23 | #define __DEFAULT_FN_ATTRS \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bitalg"), \ | |
| 21 | 25 | __min_vector_width__(512))) |
| 26 | #endif | |
| 22 | 27 | |
| 23 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 24 | _mm512_popcnt_epi16(__m512i __A) | |
| 25 | { | |
| 28 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi16(__m512i __A) { | |
| 26 | 29 | return (__m512i)__builtin_elementwise_popcount((__v32hu)__A); |
| 27 | 30 | } |
| 28 | 31 | |
| 29 | 32 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 30 | _mm512_mask_popcnt_epi16(__m512i __A, __mmask32 __U, __m512i __B) | |
| 31 | { | |
| 32 | return (__m512i) __builtin_ia32_selectw_512((__mmask32) __U, | |
| 33 | (__v32hi) _mm512_popcnt_epi16(__B), | |
| 34 | (__v32hi) __A); | |
| 33 | _mm512_mask_popcnt_epi16(__m512i __A, __mmask32 __U, __m512i __B) { | |
| 34 | return (__m512i)__builtin_ia32_selectw_512( | |
| 35 | (__mmask32)__U, (__v32hi)_mm512_popcnt_epi16(__B), (__v32hi)__A); | |
| 35 | 36 | } |
| 36 | 37 | |
| 37 | 38 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 38 | _mm512_maskz_popcnt_epi16(__mmask32 __U, __m512i __B) | |
| 39 | { | |
| 40 | return _mm512_mask_popcnt_epi16((__m512i) _mm512_setzero_si512(), | |
| 41 | __U, | |
| 42 | __B); | |
| 39 | _mm512_maskz_popcnt_epi16(__mmask32 __U, __m512i __B) { | |
| 40 | return _mm512_mask_popcnt_epi16((__m512i)_mm512_setzero_si512(), __U, __B); | |
| 43 | 41 | } |
| 44 | 42 | |
| 45 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 46 | _mm512_popcnt_epi8(__m512i __A) | |
| 47 | { | |
| 43 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi8(__m512i __A) { | |
| 48 | 44 | return (__m512i)__builtin_elementwise_popcount((__v64qu)__A); |
| 49 | 45 | } |
| 50 | 46 | |
| 51 | 47 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 52 | _mm512_mask_popcnt_epi8(__m512i __A, __mmask64 __U, __m512i __B) | |
| 53 | { | |
| 54 | return (__m512i) __builtin_ia32_selectb_512((__mmask64) __U, | |
| 55 | (__v64qi) _mm512_popcnt_epi8(__B), | |
| 56 | (__v64qi) __A); | |
| 48 | _mm512_mask_popcnt_epi8(__m512i __A, __mmask64 __U, __m512i __B) { | |
| 49 | return (__m512i)__builtin_ia32_selectb_512( | |
| 50 | (__mmask64)__U, (__v64qi)_mm512_popcnt_epi8(__B), (__v64qi)__A); | |
| 57 | 51 | } |
| 58 | 52 | |
| 59 | 53 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 60 | _mm512_maskz_popcnt_epi8(__mmask64 __U, __m512i __B) | |
| 61 | { | |
| 62 | return _mm512_mask_popcnt_epi8((__m512i) _mm512_setzero_si512(), | |
| 63 | __U, | |
| 64 | __B); | |
| 54 | _mm512_maskz_popcnt_epi8(__mmask64 __U, __m512i __B) { | |
| 55 | return _mm512_mask_popcnt_epi8((__m512i)_mm512_setzero_si512(), __U, __B); | |
| 65 | 56 | } |
| 66 | 57 | |
| 67 | 58 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS |
| ... | ... | @@ -80,7 +71,5 @@ _mm512_bitshuffle_epi64_mask(__m512i __A, __m512i __B) |
| 80 | 71 | __B); |
| 81 | 72 | } |
| 82 | 73 | |
| 83 | ||
| 84 | 74 | #undef __DEFAULT_FN_ATTRS |
| 85 | ||
| 86 | 75 | #endif |
lib/include/avx512bwintrin.h+386-505| ... | ... | @@ -19,153 +19,150 @@ typedef unsigned long long __mmask64; |
| 19 | 19 | |
| 20 | 20 | /* Define the default attributes for the functions in this file. */ |
| 21 | 21 | #define __DEFAULT_FN_ATTRS512 \ |
| 22 | __attribute__((__always_inline__, __nodebug__, \ | |
| 23 | __target__("avx512bw,evex512"), __min_vector_width__(512))) | |
| 22 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bw"), \ | |
| 23 | __min_vector_width__(512))) | |
| 24 | 24 | #define __DEFAULT_FN_ATTRS \ |
| 25 | __attribute__((__always_inline__, __nodebug__, \ | |
| 26 | __target__("avx512bw,no-evex512"))) | |
| 25 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bw"))) | |
| 26 | ||
| 27 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 28 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr | |
| 29 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 30 | #else | |
| 31 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 | |
| 32 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 33 | #endif | |
| 27 | 34 | |
| 28 | static __inline __mmask32 __DEFAULT_FN_ATTRS | |
| 29 | _knot_mask32(__mmask32 __M) | |
| 30 | { | |
| 35 | static __inline __mmask32 | |
| 36 | __DEFAULT_FN_ATTRS_CONSTEXPR _knot_mask32(__mmask32 __M) { | |
| 31 | 37 | return __builtin_ia32_knotsi(__M); |
| 32 | 38 | } |
| 33 | 39 | |
| 34 | static __inline __mmask64 __DEFAULT_FN_ATTRS _knot_mask64(__mmask64 __M) { | |
| 40 | static __inline __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 41 | _knot_mask64(__mmask64 __M) { | |
| 35 | 42 | return __builtin_ia32_knotdi(__M); |
| 36 | 43 | } |
| 37 | 44 | |
| 38 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS | |
| 39 | _kand_mask32(__mmask32 __A, __mmask32 __B) | |
| 40 | { | |
| 45 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 46 | _kand_mask32(__mmask32 __A, __mmask32 __B) { | |
| 41 | 47 | return (__mmask32)__builtin_ia32_kandsi((__mmask32)__A, (__mmask32)__B); |
| 42 | 48 | } |
| 43 | 49 | |
| 44 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kand_mask64(__mmask64 __A, | |
| 45 | __mmask64 __B) { | |
| 50 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 51 | _kand_mask64(__mmask64 __A, __mmask64 __B) { | |
| 46 | 52 | return (__mmask64)__builtin_ia32_kanddi((__mmask64)__A, (__mmask64)__B); |
| 47 | 53 | } |
| 48 | 54 | |
| 49 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS | |
| 50 | _kandn_mask32(__mmask32 __A, __mmask32 __B) | |
| 51 | { | |
| 55 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 56 | _kandn_mask32(__mmask32 __A, __mmask32 __B) { | |
| 52 | 57 | return (__mmask32)__builtin_ia32_kandnsi((__mmask32)__A, (__mmask32)__B); |
| 53 | 58 | } |
| 54 | 59 | |
| 55 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kandn_mask64(__mmask64 __A, | |
| 56 | __mmask64 __B) { | |
| 60 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 61 | _kandn_mask64(__mmask64 __A, __mmask64 __B) { | |
| 57 | 62 | return (__mmask64)__builtin_ia32_kandndi((__mmask64)__A, (__mmask64)__B); |
| 58 | 63 | } |
| 59 | 64 | |
| 60 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS | |
| 61 | _kor_mask32(__mmask32 __A, __mmask32 __B) | |
| 62 | { | |
| 65 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 66 | _kor_mask32(__mmask32 __A, __mmask32 __B) { | |
| 63 | 67 | return (__mmask32)__builtin_ia32_korsi((__mmask32)__A, (__mmask32)__B); |
| 64 | 68 | } |
| 65 | 69 | |
| 66 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kor_mask64(__mmask64 __A, | |
| 67 | __mmask64 __B) { | |
| 70 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 71 | _kor_mask64(__mmask64 __A, __mmask64 __B) { | |
| 68 | 72 | return (__mmask64)__builtin_ia32_kordi((__mmask64)__A, (__mmask64)__B); |
| 69 | 73 | } |
| 70 | 74 | |
| 71 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS | |
| 72 | _kxnor_mask32(__mmask32 __A, __mmask32 __B) | |
| 73 | { | |
| 75 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 76 | _kxnor_mask32(__mmask32 __A, __mmask32 __B) { | |
| 74 | 77 | return (__mmask32)__builtin_ia32_kxnorsi((__mmask32)__A, (__mmask32)__B); |
| 75 | 78 | } |
| 76 | 79 | |
| 77 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kxnor_mask64(__mmask64 __A, | |
| 78 | __mmask64 __B) { | |
| 80 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 81 | _kxnor_mask64(__mmask64 __A, __mmask64 __B) { | |
| 79 | 82 | return (__mmask64)__builtin_ia32_kxnordi((__mmask64)__A, (__mmask64)__B); |
| 80 | 83 | } |
| 81 | 84 | |
| 82 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS | |
| 83 | _kxor_mask32(__mmask32 __A, __mmask32 __B) | |
| 84 | { | |
| 85 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 86 | _kxor_mask32(__mmask32 __A, __mmask32 __B) { | |
| 85 | 87 | return (__mmask32)__builtin_ia32_kxorsi((__mmask32)__A, (__mmask32)__B); |
| 86 | 88 | } |
| 87 | 89 | |
| 88 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kxor_mask64(__mmask64 __A, | |
| 89 | __mmask64 __B) { | |
| 90 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 91 | _kxor_mask64(__mmask64 __A, __mmask64 __B) { | |
| 90 | 92 | return (__mmask64)__builtin_ia32_kxordi((__mmask64)__A, (__mmask64)__B); |
| 91 | 93 | } |
| 92 | 94 | |
| 93 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 94 | _kortestc_mask32_u8(__mmask32 __A, __mmask32 __B) | |
| 95 | { | |
| 95 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 96 | _kortestc_mask32_u8(__mmask32 __A, __mmask32 __B) { | |
| 96 | 97 | return (unsigned char)__builtin_ia32_kortestcsi(__A, __B); |
| 97 | 98 | } |
| 98 | 99 | |
| 99 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 100 | _kortestz_mask32_u8(__mmask32 __A, __mmask32 __B) | |
| 101 | { | |
| 100 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 101 | _kortestz_mask32_u8(__mmask32 __A, __mmask32 __B) { | |
| 102 | 102 | return (unsigned char)__builtin_ia32_kortestzsi(__A, __B); |
| 103 | 103 | } |
| 104 | 104 | |
| 105 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 105 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 106 | 106 | _kortest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) { |
| 107 | 107 | *__C = (unsigned char)__builtin_ia32_kortestcsi(__A, __B); |
| 108 | 108 | return (unsigned char)__builtin_ia32_kortestzsi(__A, __B); |
| 109 | 109 | } |
| 110 | 110 | |
| 111 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 111 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 112 | 112 | _kortestc_mask64_u8(__mmask64 __A, __mmask64 __B) { |
| 113 | 113 | return (unsigned char)__builtin_ia32_kortestcdi(__A, __B); |
| 114 | 114 | } |
| 115 | 115 | |
| 116 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 116 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 117 | 117 | _kortestz_mask64_u8(__mmask64 __A, __mmask64 __B) { |
| 118 | 118 | return (unsigned char)__builtin_ia32_kortestzdi(__A, __B); |
| 119 | 119 | } |
| 120 | 120 | |
| 121 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 121 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 122 | 122 | _kortest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) { |
| 123 | 123 | *__C = (unsigned char)__builtin_ia32_kortestcdi(__A, __B); |
| 124 | 124 | return (unsigned char)__builtin_ia32_kortestzdi(__A, __B); |
| 125 | 125 | } |
| 126 | 126 | |
| 127 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 128 | _ktestc_mask32_u8(__mmask32 __A, __mmask32 __B) | |
| 129 | { | |
| 127 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 128 | _ktestc_mask32_u8(__mmask32 __A, __mmask32 __B) { | |
| 130 | 129 | return (unsigned char)__builtin_ia32_ktestcsi(__A, __B); |
| 131 | 130 | } |
| 132 | 131 | |
| 133 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 134 | _ktestz_mask32_u8(__mmask32 __A, __mmask32 __B) | |
| 135 | { | |
| 132 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 133 | _ktestz_mask32_u8(__mmask32 __A, __mmask32 __B) { | |
| 136 | 134 | return (unsigned char)__builtin_ia32_ktestzsi(__A, __B); |
| 137 | 135 | } |
| 138 | 136 | |
| 139 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 137 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 140 | 138 | _ktest_mask32_u8(__mmask32 __A, __mmask32 __B, unsigned char *__C) { |
| 141 | 139 | *__C = (unsigned char)__builtin_ia32_ktestcsi(__A, __B); |
| 142 | 140 | return (unsigned char)__builtin_ia32_ktestzsi(__A, __B); |
| 143 | 141 | } |
| 144 | 142 | |
| 145 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 143 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 146 | 144 | _ktestc_mask64_u8(__mmask64 __A, __mmask64 __B) { |
| 147 | 145 | return (unsigned char)__builtin_ia32_ktestcdi(__A, __B); |
| 148 | 146 | } |
| 149 | 147 | |
| 150 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 148 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 151 | 149 | _ktestz_mask64_u8(__mmask64 __A, __mmask64 __B) { |
| 152 | 150 | return (unsigned char)__builtin_ia32_ktestzdi(__A, __B); |
| 153 | 151 | } |
| 154 | 152 | |
| 155 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 153 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 156 | 154 | _ktest_mask64_u8(__mmask64 __A, __mmask64 __B, unsigned char *__C) { |
| 157 | 155 | *__C = (unsigned char)__builtin_ia32_ktestcdi(__A, __B); |
| 158 | 156 | return (unsigned char)__builtin_ia32_ktestzdi(__A, __B); |
| 159 | 157 | } |
| 160 | 158 | |
| 161 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS | |
| 162 | _kadd_mask32(__mmask32 __A, __mmask32 __B) | |
| 163 | { | |
| 159 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 160 | _kadd_mask32(__mmask32 __A, __mmask32 __B) { | |
| 164 | 161 | return (__mmask32)__builtin_ia32_kaddsi((__mmask32)__A, (__mmask32)__B); |
| 165 | 162 | } |
| 166 | 163 | |
| 167 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kadd_mask64(__mmask64 __A, | |
| 168 | __mmask64 __B) { | |
| 164 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 165 | _kadd_mask64(__mmask64 __A, __mmask64 __B) { | |
| 169 | 166 | return (__mmask64)__builtin_ia32_kadddi((__mmask64)__A, (__mmask64)__B); |
| 170 | 167 | } |
| 171 | 168 | |
| ... | ... | @@ -181,22 +178,22 @@ static __inline__ __mmask64 __DEFAULT_FN_ATTRS _kadd_mask64(__mmask64 __A, |
| 181 | 178 | #define _kshiftri_mask64(A, I) \ |
| 182 | 179 | ((__mmask64)__builtin_ia32_kshiftridi((__mmask64)(A), (unsigned int)(I))) |
| 183 | 180 | |
| 184 | static __inline__ unsigned int __DEFAULT_FN_ATTRS | |
| 185 | _cvtmask32_u32(__mmask32 __A) { | |
| 181 | static __inline__ unsigned int | |
| 182 | __DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask32_u32(__mmask32 __A) { | |
| 186 | 183 | return (unsigned int)__builtin_ia32_kmovd((__mmask32)__A); |
| 187 | 184 | } |
| 188 | 185 | |
| 189 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS | |
| 186 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 190 | 187 | _cvtmask64_u64(__mmask64 __A) { |
| 191 | 188 | return (unsigned long long)__builtin_ia32_kmovq((__mmask64)__A); |
| 192 | 189 | } |
| 193 | 190 | |
| 194 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS | |
| 191 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 195 | 192 | _cvtu32_mask32(unsigned int __A) { |
| 196 | 193 | return (__mmask32)__builtin_ia32_kmovd((__mmask32)__A); |
| 197 | 194 | } |
| 198 | 195 | |
| 199 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS | |
| 196 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 200 | 197 | _cvtu64_mask64(unsigned long long __A) { |
| 201 | 198 | return (__mmask64)__builtin_ia32_kmovq((__mmask64)__A); |
| 202 | 199 | } |
| ... | ... | @@ -362,168 +359,159 @@ static __inline__ void __DEFAULT_FN_ATTRS _store_mask64(__mmask64 *__A, |
| 362 | 359 | #define _mm512_mask_cmpneq_epu16_mask(k, A, B) \ |
| 363 | 360 | _mm512_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE) |
| 364 | 361 | |
| 365 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 366 | _mm512_add_epi8 (__m512i __A, __m512i __B) { | |
| 362 | static __inline__ __m512i | |
| 363 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_add_epi8(__m512i __A, __m512i __B) { | |
| 367 | 364 | return (__m512i) ((__v64qu) __A + (__v64qu) __B); |
| 368 | 365 | } |
| 369 | 366 | |
| 370 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 367 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 371 | 368 | _mm512_mask_add_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { |
| 372 | 369 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 373 | 370 | (__v64qi)_mm512_add_epi8(__A, __B), |
| 374 | 371 | (__v64qi)__W); |
| 375 | 372 | } |
| 376 | 373 | |
| 377 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 374 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 378 | 375 | _mm512_maskz_add_epi8(__mmask64 __U, __m512i __A, __m512i __B) { |
| 379 | 376 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 380 | 377 | (__v64qi)_mm512_add_epi8(__A, __B), |
| 381 | 378 | (__v64qi)_mm512_setzero_si512()); |
| 382 | 379 | } |
| 383 | 380 | |
| 384 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 385 | _mm512_sub_epi8 (__m512i __A, __m512i __B) { | |
| 381 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 382 | _mm512_sub_epi8(__m512i __A, __m512i __B) { | |
| 386 | 383 | return (__m512i) ((__v64qu) __A - (__v64qu) __B); |
| 387 | 384 | } |
| 388 | 385 | |
| 389 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 386 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 390 | 387 | _mm512_mask_sub_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { |
| 391 | 388 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 392 | 389 | (__v64qi)_mm512_sub_epi8(__A, __B), |
| 393 | 390 | (__v64qi)__W); |
| 394 | 391 | } |
| 395 | 392 | |
| 396 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 393 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 397 | 394 | _mm512_maskz_sub_epi8(__mmask64 __U, __m512i __A, __m512i __B) { |
| 398 | 395 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 399 | 396 | (__v64qi)_mm512_sub_epi8(__A, __B), |
| 400 | 397 | (__v64qi)_mm512_setzero_si512()); |
| 401 | 398 | } |
| 402 | 399 | |
| 403 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 404 | _mm512_add_epi16 (__m512i __A, __m512i __B) { | |
| 400 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 401 | _mm512_add_epi16(__m512i __A, __m512i __B) { | |
| 405 | 402 | return (__m512i) ((__v32hu) __A + (__v32hu) __B); |
| 406 | 403 | } |
| 407 | 404 | |
| 408 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 405 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 409 | 406 | _mm512_mask_add_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { |
| 410 | 407 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 411 | 408 | (__v32hi)_mm512_add_epi16(__A, __B), |
| 412 | 409 | (__v32hi)__W); |
| 413 | 410 | } |
| 414 | 411 | |
| 415 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 412 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 416 | 413 | _mm512_maskz_add_epi16(__mmask32 __U, __m512i __A, __m512i __B) { |
| 417 | 414 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 418 | 415 | (__v32hi)_mm512_add_epi16(__A, __B), |
| 419 | 416 | (__v32hi)_mm512_setzero_si512()); |
| 420 | 417 | } |
| 421 | 418 | |
| 422 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 423 | _mm512_sub_epi16 (__m512i __A, __m512i __B) { | |
| 419 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 420 | _mm512_sub_epi16(__m512i __A, __m512i __B) { | |
| 424 | 421 | return (__m512i) ((__v32hu) __A - (__v32hu) __B); |
| 425 | 422 | } |
| 426 | 423 | |
| 427 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 424 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 428 | 425 | _mm512_mask_sub_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { |
| 429 | 426 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 430 | 427 | (__v32hi)_mm512_sub_epi16(__A, __B), |
| 431 | 428 | (__v32hi)__W); |
| 432 | 429 | } |
| 433 | 430 | |
| 434 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 431 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 435 | 432 | _mm512_maskz_sub_epi16(__mmask32 __U, __m512i __A, __m512i __B) { |
| 436 | 433 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 437 | 434 | (__v32hi)_mm512_sub_epi16(__A, __B), |
| 438 | 435 | (__v32hi)_mm512_setzero_si512()); |
| 439 | 436 | } |
| 440 | 437 | |
| 441 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 438 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 442 | 439 | _mm512_mullo_epi16 (__m512i __A, __m512i __B) { |
| 443 | 440 | return (__m512i) ((__v32hu) __A * (__v32hu) __B); |
| 444 | 441 | } |
| 445 | 442 | |
| 446 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 443 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 447 | 444 | _mm512_mask_mullo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { |
| 448 | 445 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 449 | 446 | (__v32hi)_mm512_mullo_epi16(__A, __B), |
| 450 | 447 | (__v32hi)__W); |
| 451 | 448 | } |
| 452 | 449 | |
| 453 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 450 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 454 | 451 | _mm512_maskz_mullo_epi16(__mmask32 __U, __m512i __A, __m512i __B) { |
| 455 | 452 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 456 | 453 | (__v32hi)_mm512_mullo_epi16(__A, __B), |
| 457 | 454 | (__v32hi)_mm512_setzero_si512()); |
| 458 | 455 | } |
| 459 | 456 | |
| 460 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 461 | _mm512_mask_blend_epi8 (__mmask64 __U, __m512i __A, __m512i __W) | |
| 462 | { | |
| 457 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 458 | _mm512_mask_blend_epi8(__mmask64 __U, __m512i __A, __m512i __W) { | |
| 463 | 459 | return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U, |
| 464 | 460 | (__v64qi) __W, |
| 465 | 461 | (__v64qi) __A); |
| 466 | 462 | } |
| 467 | 463 | |
| 468 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 469 | _mm512_mask_blend_epi16 (__mmask32 __U, __m512i __A, __m512i __W) | |
| 470 | { | |
| 464 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 465 | _mm512_mask_blend_epi16(__mmask32 __U, __m512i __A, __m512i __W) { | |
| 471 | 466 | return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U, |
| 472 | 467 | (__v32hi) __W, |
| 473 | 468 | (__v32hi) __A); |
| 474 | 469 | } |
| 475 | 470 | |
| 476 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 477 | _mm512_abs_epi8 (__m512i __A) | |
| 478 | { | |
| 471 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 472 | _mm512_abs_epi8(__m512i __A) { | |
| 479 | 473 | return (__m512i)__builtin_elementwise_abs((__v64qs)__A); |
| 480 | 474 | } |
| 481 | 475 | |
| 482 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 483 | _mm512_mask_abs_epi8 (__m512i __W, __mmask64 __U, __m512i __A) | |
| 484 | { | |
| 476 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 477 | _mm512_mask_abs_epi8(__m512i __W, __mmask64 __U, __m512i __A) { | |
| 485 | 478 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 486 | 479 | (__v64qi)_mm512_abs_epi8(__A), |
| 487 | 480 | (__v64qi)__W); |
| 488 | 481 | } |
| 489 | 482 | |
| 490 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 491 | _mm512_maskz_abs_epi8 (__mmask64 __U, __m512i __A) | |
| 492 | { | |
| 483 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 484 | _mm512_maskz_abs_epi8(__mmask64 __U, __m512i __A) { | |
| 493 | 485 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 494 | 486 | (__v64qi)_mm512_abs_epi8(__A), |
| 495 | 487 | (__v64qi)_mm512_setzero_si512()); |
| 496 | 488 | } |
| 497 | 489 | |
| 498 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 499 | _mm512_abs_epi16 (__m512i __A) | |
| 500 | { | |
| 490 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 491 | _mm512_abs_epi16(__m512i __A) { | |
| 501 | 492 | return (__m512i)__builtin_elementwise_abs((__v32hi)__A); |
| 502 | 493 | } |
| 503 | 494 | |
| 504 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 505 | _mm512_mask_abs_epi16 (__m512i __W, __mmask32 __U, __m512i __A) | |
| 506 | { | |
| 495 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 496 | _mm512_mask_abs_epi16(__m512i __W, __mmask32 __U, __m512i __A) { | |
| 507 | 497 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 508 | 498 | (__v32hi)_mm512_abs_epi16(__A), |
| 509 | 499 | (__v32hi)__W); |
| 510 | 500 | } |
| 511 | 501 | |
| 512 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 513 | _mm512_maskz_abs_epi16 (__mmask32 __U, __m512i __A) | |
| 514 | { | |
| 502 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 503 | _mm512_maskz_abs_epi16(__mmask32 __U, __m512i __A) { | |
| 515 | 504 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 516 | 505 | (__v32hi)_mm512_abs_epi16(__A), |
| 517 | 506 | (__v32hi)_mm512_setzero_si512()); |
| 518 | 507 | } |
| 519 | 508 | |
| 520 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 521 | _mm512_packs_epi32(__m512i __A, __m512i __B) | |
| 522 | { | |
| 509 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 510 | _mm512_packs_epi32(__m512i __A, __m512i __B) { | |
| 523 | 511 | return (__m512i)__builtin_ia32_packssdw512((__v16si)__A, (__v16si)__B); |
| 524 | 512 | } |
| 525 | 513 | |
| 526 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 514 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 527 | 515 | _mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B) |
| 528 | 516 | { |
| 529 | 517 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| ... | ... | @@ -531,21 +519,19 @@ _mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B) |
| 531 | 519 | (__v32hi)_mm512_setzero_si512()); |
| 532 | 520 | } |
| 533 | 521 | |
| 534 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 535 | _mm512_mask_packs_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) | |
| 536 | { | |
| 522 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 523 | _mm512_mask_packs_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { | |
| 537 | 524 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 538 | 525 | (__v32hi)_mm512_packs_epi32(__A, __B), |
| 539 | 526 | (__v32hi)__W); |
| 540 | 527 | } |
| 541 | 528 | |
| 542 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 543 | _mm512_packs_epi16(__m512i __A, __m512i __B) | |
| 544 | { | |
| 529 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 530 | _mm512_packs_epi16(__m512i __A, __m512i __B) { | |
| 545 | 531 | return (__m512i)__builtin_ia32_packsswb512((__v32hi)__A, (__v32hi) __B); |
| 546 | 532 | } |
| 547 | 533 | |
| 548 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 534 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 549 | 535 | _mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) |
| 550 | 536 | { |
| 551 | 537 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| ... | ... | @@ -553,7 +539,7 @@ _mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) |
| 553 | 539 | (__v64qi)__W); |
| 554 | 540 | } |
| 555 | 541 | |
| 556 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 542 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 557 | 543 | _mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B) |
| 558 | 544 | { |
| 559 | 545 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| ... | ... | @@ -561,13 +547,12 @@ _mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B) |
| 561 | 547 | (__v64qi)_mm512_setzero_si512()); |
| 562 | 548 | } |
| 563 | 549 | |
| 564 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 565 | _mm512_packus_epi32(__m512i __A, __m512i __B) | |
| 566 | { | |
| 550 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 551 | _mm512_packus_epi32(__m512i __A, __m512i __B) { | |
| 567 | 552 | return (__m512i)__builtin_ia32_packusdw512((__v16si) __A, (__v16si) __B); |
| 568 | 553 | } |
| 569 | 554 | |
| 570 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 555 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 571 | 556 | _mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B) |
| 572 | 557 | { |
| 573 | 558 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| ... | ... | @@ -575,7 +560,7 @@ _mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B) |
| 575 | 560 | (__v32hi)_mm512_setzero_si512()); |
| 576 | 561 | } |
| 577 | 562 | |
| 578 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 563 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 579 | 564 | _mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) |
| 580 | 565 | { |
| 581 | 566 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| ... | ... | @@ -583,13 +568,12 @@ _mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) |
| 583 | 568 | (__v32hi)__W); |
| 584 | 569 | } |
| 585 | 570 | |
| 586 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 587 | _mm512_packus_epi16(__m512i __A, __m512i __B) | |
| 588 | { | |
| 571 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 572 | _mm512_packus_epi16(__m512i __A, __m512i __B) { | |
| 589 | 573 | return (__m512i)__builtin_ia32_packuswb512((__v32hi) __A, (__v32hi) __B); |
| 590 | 574 | } |
| 591 | 575 | |
| 592 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 576 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 593 | 577 | _mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) |
| 594 | 578 | { |
| 595 | 579 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| ... | ... | @@ -597,7 +581,7 @@ _mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) |
| 597 | 581 | (__v64qi)__W); |
| 598 | 582 | } |
| 599 | 583 | |
| 600 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 584 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 601 | 585 | _mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B) |
| 602 | 586 | { |
| 603 | 587 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| ... | ... | @@ -605,35 +589,31 @@ _mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B) |
| 605 | 589 | (__v64qi)_mm512_setzero_si512()); |
| 606 | 590 | } |
| 607 | 591 | |
| 608 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 609 | _mm512_adds_epi8 (__m512i __A, __m512i __B) | |
| 610 | { | |
| 592 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 593 | _mm512_adds_epi8(__m512i __A, __m512i __B) { | |
| 611 | 594 | return (__m512i)__builtin_elementwise_add_sat((__v64qs)__A, (__v64qs)__B); |
| 612 | 595 | } |
| 613 | 596 | |
| 614 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 615 | _mm512_mask_adds_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) | |
| 616 | { | |
| 597 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 598 | _mm512_mask_adds_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { | |
| 617 | 599 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 618 | 600 | (__v64qi)_mm512_adds_epi8(__A, __B), |
| 619 | 601 | (__v64qi)__W); |
| 620 | 602 | } |
| 621 | 603 | |
| 622 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 623 | _mm512_maskz_adds_epi8 (__mmask64 __U, __m512i __A, __m512i __B) | |
| 624 | { | |
| 604 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 605 | _mm512_maskz_adds_epi8(__mmask64 __U, __m512i __A, __m512i __B) { | |
| 625 | 606 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 626 | 607 | (__v64qi)_mm512_adds_epi8(__A, __B), |
| 627 | 608 | (__v64qi)_mm512_setzero_si512()); |
| 628 | 609 | } |
| 629 | 610 | |
| 630 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 631 | _mm512_adds_epi16 (__m512i __A, __m512i __B) | |
| 632 | { | |
| 611 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 612 | _mm512_adds_epi16(__m512i __A, __m512i __B) { | |
| 633 | 613 | return (__m512i)__builtin_elementwise_add_sat((__v32hi)__A, (__v32hi)__B); |
| 634 | 614 | } |
| 635 | 615 | |
| 636 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 616 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 637 | 617 | _mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 638 | 618 | { |
| 639 | 619 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -641,7 +621,7 @@ _mm512_mask_adds_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 641 | 621 | (__v32hi)__W); |
| 642 | 622 | } |
| 643 | 623 | |
| 644 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 624 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 645 | 625 | _mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 646 | 626 | { |
| 647 | 627 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -649,13 +629,12 @@ _mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 649 | 629 | (__v32hi)_mm512_setzero_si512()); |
| 650 | 630 | } |
| 651 | 631 | |
| 652 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 653 | _mm512_adds_epu8 (__m512i __A, __m512i __B) | |
| 654 | { | |
| 632 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 633 | _mm512_adds_epu8(__m512i __A, __m512i __B) { | |
| 655 | 634 | return (__m512i)__builtin_elementwise_add_sat((__v64qu) __A, (__v64qu) __B); |
| 656 | 635 | } |
| 657 | 636 | |
| 658 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 637 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 659 | 638 | _mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) |
| 660 | 639 | { |
| 661 | 640 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| ... | ... | @@ -663,7 +642,7 @@ _mm512_mask_adds_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) |
| 663 | 642 | (__v64qi)__W); |
| 664 | 643 | } |
| 665 | 644 | |
| 666 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 645 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 667 | 646 | _mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 668 | 647 | { |
| 669 | 648 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| ... | ... | @@ -671,280 +650,238 @@ _mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 671 | 650 | (__v64qi)_mm512_setzero_si512()); |
| 672 | 651 | } |
| 673 | 652 | |
| 674 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 675 | _mm512_adds_epu16 (__m512i __A, __m512i __B) | |
| 676 | { | |
| 653 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 654 | _mm512_adds_epu16(__m512i __A, __m512i __B) { | |
| 677 | 655 | return (__m512i)__builtin_elementwise_add_sat((__v32hu) __A, (__v32hu) __B); |
| 678 | 656 | } |
| 679 | 657 | |
| 680 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 681 | _mm512_mask_adds_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) | |
| 682 | { | |
| 658 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 659 | _mm512_mask_adds_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { | |
| 683 | 660 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 684 | 661 | (__v32hi)_mm512_adds_epu16(__A, __B), |
| 685 | 662 | (__v32hi)__W); |
| 686 | 663 | } |
| 687 | 664 | |
| 688 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 689 | _mm512_maskz_adds_epu16 (__mmask32 __U, __m512i __A, __m512i __B) | |
| 690 | { | |
| 665 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 666 | _mm512_maskz_adds_epu16(__mmask32 __U, __m512i __A, __m512i __B) { | |
| 691 | 667 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 692 | 668 | (__v32hi)_mm512_adds_epu16(__A, __B), |
| 693 | 669 | (__v32hi)_mm512_setzero_si512()); |
| 694 | 670 | } |
| 695 | 671 | |
| 696 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 697 | _mm512_avg_epu8 (__m512i __A, __m512i __B) | |
| 698 | { | |
| 699 | return (__m512i)__builtin_ia32_pavgb512((__v64qi)__A, (__v64qi)__B); | |
| 672 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 673 | _mm512_avg_epu8(__m512i __A, __m512i __B) { | |
| 674 | return (__m512i)__builtin_ia32_pavgb512((__v64qu)__A, (__v64qu)__B); | |
| 700 | 675 | } |
| 701 | 676 | |
| 702 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 703 | _mm512_mask_avg_epu8 (__m512i __W, __mmask64 __U, __m512i __A, | |
| 704 | __m512i __B) | |
| 705 | { | |
| 706 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, | |
| 707 | (__v64qi)_mm512_avg_epu8(__A, __B), | |
| 708 | (__v64qi)__W); | |
| 677 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 678 | _mm512_mask_avg_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { | |
| 679 | return (__m512i)__builtin_ia32_selectb_512( | |
| 680 | (__mmask64)__U, (__v64qi)_mm512_avg_epu8(__A, __B), (__v64qi)__W); | |
| 709 | 681 | } |
| 710 | 682 | |
| 711 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 712 | _mm512_maskz_avg_epu8 (__mmask64 __U, __m512i __A, __m512i __B) | |
| 713 | { | |
| 683 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 684 | _mm512_maskz_avg_epu8(__mmask64 __U, __m512i __A, __m512i __B) { | |
| 714 | 685 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 715 | (__v64qi)_mm512_avg_epu8(__A, __B), | |
| 716 | (__v64qi)_mm512_setzero_si512()); | |
| 686 | (__v64qi)_mm512_avg_epu8(__A, __B), | |
| 687 | (__v64qi)_mm512_setzero_si512()); | |
| 717 | 688 | } |
| 718 | 689 | |
| 719 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 720 | _mm512_avg_epu16 (__m512i __A, __m512i __B) | |
| 721 | { | |
| 722 | return (__m512i)__builtin_ia32_pavgw512((__v32hi)__A, (__v32hi)__B); | |
| 690 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 691 | _mm512_avg_epu16(__m512i __A, __m512i __B) { | |
| 692 | return (__m512i)__builtin_ia32_pavgw512((__v32hu)__A, (__v32hu)__B); | |
| 723 | 693 | } |
| 724 | 694 | |
| 725 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 726 | _mm512_mask_avg_epu16 (__m512i __W, __mmask32 __U, __m512i __A, | |
| 727 | __m512i __B) | |
| 728 | { | |
| 729 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, | |
| 730 | (__v32hi)_mm512_avg_epu16(__A, __B), | |
| 731 | (__v32hi)__W); | |
| 695 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 696 | _mm512_mask_avg_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { | |
| 697 | return (__m512i)__builtin_ia32_selectw_512( | |
| 698 | (__mmask32)__U, (__v32hi)_mm512_avg_epu16(__A, __B), (__v32hi)__W); | |
| 732 | 699 | } |
| 733 | 700 | |
| 734 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 735 | _mm512_maskz_avg_epu16 (__mmask32 __U, __m512i __A, __m512i __B) | |
| 736 | { | |
| 737 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, | |
| 738 | (__v32hi)_mm512_avg_epu16(__A, __B), | |
| 739 | (__v32hi) _mm512_setzero_si512()); | |
| 701 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 702 | _mm512_maskz_avg_epu16(__mmask32 __U, __m512i __A, __m512i __B) { | |
| 703 | return (__m512i)__builtin_ia32_selectw_512( | |
| 704 | (__mmask32)__U, (__v32hi)_mm512_avg_epu16(__A, __B), | |
| 705 | (__v32hi)_mm512_setzero_si512()); | |
| 740 | 706 | } |
| 741 | 707 | |
| 742 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 743 | _mm512_max_epi8 (__m512i __A, __m512i __B) | |
| 744 | { | |
| 708 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 709 | _mm512_max_epi8(__m512i __A, __m512i __B) { | |
| 745 | 710 | return (__m512i)__builtin_elementwise_max((__v64qs) __A, (__v64qs) __B); |
| 746 | 711 | } |
| 747 | 712 | |
| 748 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 749 | _mm512_maskz_max_epi8 (__mmask64 __M, __m512i __A, __m512i __B) | |
| 750 | { | |
| 713 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 714 | _mm512_maskz_max_epi8(__mmask64 __M, __m512i __A, __m512i __B) { | |
| 751 | 715 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 752 | 716 | (__v64qi)_mm512_max_epi8(__A, __B), |
| 753 | 717 | (__v64qi)_mm512_setzero_si512()); |
| 754 | 718 | } |
| 755 | 719 | |
| 756 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 757 | _mm512_mask_max_epi8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) | |
| 758 | { | |
| 720 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 721 | _mm512_mask_max_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { | |
| 759 | 722 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 760 | 723 | (__v64qi)_mm512_max_epi8(__A, __B), |
| 761 | 724 | (__v64qi)__W); |
| 762 | 725 | } |
| 763 | 726 | |
| 764 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 765 | _mm512_max_epi16 (__m512i __A, __m512i __B) | |
| 766 | { | |
| 727 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 728 | _mm512_max_epi16(__m512i __A, __m512i __B) { | |
| 767 | 729 | return (__m512i)__builtin_elementwise_max((__v32hi) __A, (__v32hi) __B); |
| 768 | 730 | } |
| 769 | 731 | |
| 770 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 771 | _mm512_maskz_max_epi16 (__mmask32 __M, __m512i __A, __m512i __B) | |
| 772 | { | |
| 732 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 733 | _mm512_maskz_max_epi16(__mmask32 __M, __m512i __A, __m512i __B) { | |
| 773 | 734 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 774 | 735 | (__v32hi)_mm512_max_epi16(__A, __B), |
| 775 | 736 | (__v32hi)_mm512_setzero_si512()); |
| 776 | 737 | } |
| 777 | 738 | |
| 778 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 779 | _mm512_mask_max_epi16 (__m512i __W, __mmask32 __M, __m512i __A, | |
| 780 | __m512i __B) | |
| 781 | { | |
| 739 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 740 | _mm512_mask_max_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { | |
| 782 | 741 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 783 | 742 | (__v32hi)_mm512_max_epi16(__A, __B), |
| 784 | 743 | (__v32hi)__W); |
| 785 | 744 | } |
| 786 | 745 | |
| 787 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 788 | _mm512_max_epu8 (__m512i __A, __m512i __B) | |
| 789 | { | |
| 746 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 747 | _mm512_max_epu8(__m512i __A, __m512i __B) { | |
| 790 | 748 | return (__m512i)__builtin_elementwise_max((__v64qu)__A, (__v64qu)__B); |
| 791 | 749 | } |
| 792 | 750 | |
| 793 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 794 | _mm512_maskz_max_epu8 (__mmask64 __M, __m512i __A, __m512i __B) | |
| 795 | { | |
| 751 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 752 | _mm512_maskz_max_epu8(__mmask64 __M, __m512i __A, __m512i __B) { | |
| 796 | 753 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 797 | 754 | (__v64qi)_mm512_max_epu8(__A, __B), |
| 798 | 755 | (__v64qi)_mm512_setzero_si512()); |
| 799 | 756 | } |
| 800 | 757 | |
| 801 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 802 | _mm512_mask_max_epu8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) | |
| 803 | { | |
| 758 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 759 | _mm512_mask_max_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { | |
| 804 | 760 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 805 | 761 | (__v64qi)_mm512_max_epu8(__A, __B), |
| 806 | 762 | (__v64qi)__W); |
| 807 | 763 | } |
| 808 | 764 | |
| 809 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 810 | _mm512_max_epu16 (__m512i __A, __m512i __B) | |
| 811 | { | |
| 765 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 766 | _mm512_max_epu16(__m512i __A, __m512i __B) { | |
| 812 | 767 | return (__m512i)__builtin_elementwise_max((__v32hu)__A, (__v32hu)__B); |
| 813 | 768 | } |
| 814 | 769 | |
| 815 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 816 | _mm512_maskz_max_epu16 (__mmask32 __M, __m512i __A, __m512i __B) | |
| 817 | { | |
| 770 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 771 | _mm512_maskz_max_epu16(__mmask32 __M, __m512i __A, __m512i __B) { | |
| 818 | 772 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 819 | 773 | (__v32hi)_mm512_max_epu16(__A, __B), |
| 820 | 774 | (__v32hi)_mm512_setzero_si512()); |
| 821 | 775 | } |
| 822 | 776 | |
| 823 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 824 | _mm512_mask_max_epu16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) | |
| 825 | { | |
| 777 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 778 | _mm512_mask_max_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { | |
| 826 | 779 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 827 | 780 | (__v32hi)_mm512_max_epu16(__A, __B), |
| 828 | 781 | (__v32hi)__W); |
| 829 | 782 | } |
| 830 | 783 | |
| 831 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 832 | _mm512_min_epi8 (__m512i __A, __m512i __B) | |
| 833 | { | |
| 784 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 785 | _mm512_min_epi8(__m512i __A, __m512i __B) { | |
| 834 | 786 | return (__m512i)__builtin_elementwise_min((__v64qs) __A, (__v64qs) __B); |
| 835 | 787 | } |
| 836 | 788 | |
| 837 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 838 | _mm512_maskz_min_epi8 (__mmask64 __M, __m512i __A, __m512i __B) | |
| 839 | { | |
| 789 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 790 | _mm512_maskz_min_epi8(__mmask64 __M, __m512i __A, __m512i __B) { | |
| 840 | 791 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 841 | 792 | (__v64qi)_mm512_min_epi8(__A, __B), |
| 842 | 793 | (__v64qi)_mm512_setzero_si512()); |
| 843 | 794 | } |
| 844 | 795 | |
| 845 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 846 | _mm512_mask_min_epi8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) | |
| 847 | { | |
| 796 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 797 | _mm512_mask_min_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { | |
| 848 | 798 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 849 | 799 | (__v64qi)_mm512_min_epi8(__A, __B), |
| 850 | 800 | (__v64qi)__W); |
| 851 | 801 | } |
| 852 | 802 | |
| 853 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 854 | _mm512_min_epi16 (__m512i __A, __m512i __B) | |
| 855 | { | |
| 803 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 804 | _mm512_min_epi16(__m512i __A, __m512i __B) { | |
| 856 | 805 | return (__m512i)__builtin_elementwise_min((__v32hi) __A, (__v32hi) __B); |
| 857 | 806 | } |
| 858 | 807 | |
| 859 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 860 | _mm512_maskz_min_epi16 (__mmask32 __M, __m512i __A, __m512i __B) | |
| 861 | { | |
| 808 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 809 | _mm512_maskz_min_epi16(__mmask32 __M, __m512i __A, __m512i __B) { | |
| 862 | 810 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 863 | 811 | (__v32hi)_mm512_min_epi16(__A, __B), |
| 864 | 812 | (__v32hi)_mm512_setzero_si512()); |
| 865 | 813 | } |
| 866 | 814 | |
| 867 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 868 | _mm512_mask_min_epi16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) | |
| 869 | { | |
| 815 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 816 | _mm512_mask_min_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { | |
| 870 | 817 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 871 | 818 | (__v32hi)_mm512_min_epi16(__A, __B), |
| 872 | 819 | (__v32hi)__W); |
| 873 | 820 | } |
| 874 | 821 | |
| 875 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 876 | _mm512_min_epu8 (__m512i __A, __m512i __B) | |
| 877 | { | |
| 822 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 823 | _mm512_min_epu8(__m512i __A, __m512i __B) { | |
| 878 | 824 | return (__m512i)__builtin_elementwise_min((__v64qu)__A, (__v64qu)__B); |
| 879 | 825 | } |
| 880 | 826 | |
| 881 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 882 | _mm512_maskz_min_epu8 (__mmask64 __M, __m512i __A, __m512i __B) | |
| 883 | { | |
| 827 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 828 | _mm512_maskz_min_epu8(__mmask64 __M, __m512i __A, __m512i __B) { | |
| 884 | 829 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 885 | 830 | (__v64qi)_mm512_min_epu8(__A, __B), |
| 886 | 831 | (__v64qi)_mm512_setzero_si512()); |
| 887 | 832 | } |
| 888 | 833 | |
| 889 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 890 | _mm512_mask_min_epu8 (__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) | |
| 891 | { | |
| 834 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 835 | _mm512_mask_min_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { | |
| 892 | 836 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 893 | 837 | (__v64qi)_mm512_min_epu8(__A, __B), |
| 894 | 838 | (__v64qi)__W); |
| 895 | 839 | } |
| 896 | 840 | |
| 897 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 898 | _mm512_min_epu16 (__m512i __A, __m512i __B) | |
| 899 | { | |
| 841 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 842 | _mm512_min_epu16(__m512i __A, __m512i __B) { | |
| 900 | 843 | return (__m512i)__builtin_elementwise_min((__v32hu)__A, (__v32hu)__B); |
| 901 | 844 | } |
| 902 | 845 | |
| 903 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 904 | _mm512_maskz_min_epu16 (__mmask32 __M, __m512i __A, __m512i __B) | |
| 905 | { | |
| 846 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 847 | _mm512_maskz_min_epu16(__mmask32 __M, __m512i __A, __m512i __B) { | |
| 906 | 848 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 907 | 849 | (__v32hi)_mm512_min_epu16(__A, __B), |
| 908 | 850 | (__v32hi)_mm512_setzero_si512()); |
| 909 | 851 | } |
| 910 | 852 | |
| 911 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 912 | _mm512_mask_min_epu16 (__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) | |
| 913 | { | |
| 853 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 854 | _mm512_mask_min_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { | |
| 914 | 855 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 915 | 856 | (__v32hi)_mm512_min_epu16(__A, __B), |
| 916 | 857 | (__v32hi)__W); |
| 917 | 858 | } |
| 918 | 859 | |
| 919 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 920 | _mm512_shuffle_epi8(__m512i __A, __m512i __B) | |
| 921 | { | |
| 860 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 861 | _mm512_shuffle_epi8(__m512i __A, __m512i __B) { | |
| 922 | 862 | return (__m512i)__builtin_ia32_pshufb512((__v64qi)__A,(__v64qi)__B); |
| 923 | 863 | } |
| 924 | 864 | |
| 925 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 926 | _mm512_mask_shuffle_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) | |
| 927 | { | |
| 865 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 866 | _mm512_mask_shuffle_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { | |
| 928 | 867 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 929 | 868 | (__v64qi)_mm512_shuffle_epi8(__A, __B), |
| 930 | 869 | (__v64qi)__W); |
| 931 | 870 | } |
| 932 | 871 | |
| 933 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 934 | _mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B) | |
| 935 | { | |
| 872 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 873 | _mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B) { | |
| 936 | 874 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 937 | 875 | (__v64qi)_mm512_shuffle_epi8(__A, __B), |
| 938 | 876 | (__v64qi)_mm512_setzero_si512()); |
| 939 | 877 | } |
| 940 | 878 | |
| 941 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 942 | _mm512_subs_epi8 (__m512i __A, __m512i __B) | |
| 943 | { | |
| 879 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 880 | _mm512_subs_epi8(__m512i __A, __m512i __B) { | |
| 944 | 881 | return (__m512i)__builtin_elementwise_sub_sat((__v64qs)__A, (__v64qs)__B); |
| 945 | 882 | } |
| 946 | 883 | |
| 947 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 884 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 948 | 885 | _mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) |
| 949 | 886 | { |
| 950 | 887 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| ... | ... | @@ -952,7 +889,7 @@ _mm512_mask_subs_epi8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) |
| 952 | 889 | (__v64qi)__W); |
| 953 | 890 | } |
| 954 | 891 | |
| 955 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 892 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 956 | 893 | _mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 957 | 894 | { |
| 958 | 895 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| ... | ... | @@ -960,13 +897,12 @@ _mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 960 | 897 | (__v64qi)_mm512_setzero_si512()); |
| 961 | 898 | } |
| 962 | 899 | |
| 963 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 964 | _mm512_subs_epi16 (__m512i __A, __m512i __B) | |
| 965 | { | |
| 900 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 901 | _mm512_subs_epi16(__m512i __A, __m512i __B) { | |
| 966 | 902 | return (__m512i)__builtin_elementwise_sub_sat((__v32hi)__A, (__v32hi)__B); |
| 967 | 903 | } |
| 968 | 904 | |
| 969 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 905 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 970 | 906 | _mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 971 | 907 | { |
| 972 | 908 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -974,7 +910,7 @@ _mm512_mask_subs_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 974 | 910 | (__v32hi)__W); |
| 975 | 911 | } |
| 976 | 912 | |
| 977 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 913 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 978 | 914 | _mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 979 | 915 | { |
| 980 | 916 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -982,13 +918,12 @@ _mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 982 | 918 | (__v32hi)_mm512_setzero_si512()); |
| 983 | 919 | } |
| 984 | 920 | |
| 985 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 986 | _mm512_subs_epu8 (__m512i __A, __m512i __B) | |
| 987 | { | |
| 921 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 922 | _mm512_subs_epu8(__m512i __A, __m512i __B) { | |
| 988 | 923 | return (__m512i)__builtin_elementwise_sub_sat((__v64qu) __A, (__v64qu) __B); |
| 989 | 924 | } |
| 990 | 925 | |
| 991 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 926 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 992 | 927 | _mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) |
| 993 | 928 | { |
| 994 | 929 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| ... | ... | @@ -996,7 +931,7 @@ _mm512_mask_subs_epu8 (__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) |
| 996 | 931 | (__v64qi)__W); |
| 997 | 932 | } |
| 998 | 933 | |
| 999 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 934 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1000 | 935 | _mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 1001 | 936 | { |
| 1002 | 937 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| ... | ... | @@ -1004,13 +939,12 @@ _mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B) |
| 1004 | 939 | (__v64qi)_mm512_setzero_si512()); |
| 1005 | 940 | } |
| 1006 | 941 | |
| 1007 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1008 | _mm512_subs_epu16 (__m512i __A, __m512i __B) | |
| 1009 | { | |
| 942 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 943 | _mm512_subs_epu16(__m512i __A, __m512i __B) { | |
| 1010 | 944 | return (__m512i)__builtin_elementwise_sub_sat((__v32hu) __A, (__v32hu) __B); |
| 1011 | 945 | } |
| 1012 | 946 | |
| 1013 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 947 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1014 | 948 | _mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 1015 | 949 | { |
| 1016 | 950 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -1018,7 +952,7 @@ _mm512_mask_subs_epu16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 1018 | 952 | (__v32hi)__W); |
| 1019 | 953 | } |
| 1020 | 954 | |
| 1021 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 955 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1022 | 956 | _mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 1023 | 957 | { |
| 1024 | 958 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -1026,113 +960,97 @@ _mm512_maskz_subs_epu16 (__mmask32 __U, __m512i __A, __m512i __B) |
| 1026 | 960 | (__v32hi)_mm512_setzero_si512()); |
| 1027 | 961 | } |
| 1028 | 962 | |
| 1029 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1030 | _mm512_permutex2var_epi16(__m512i __A, __m512i __I, __m512i __B) | |
| 1031 | { | |
| 963 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 964 | _mm512_permutex2var_epi16(__m512i __A, __m512i __I, __m512i __B) { | |
| 1032 | 965 | return (__m512i)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I, |
| 1033 | 966 | (__v32hi)__B); |
| 1034 | 967 | } |
| 1035 | 968 | |
| 1036 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 969 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1037 | 970 | _mm512_mask_permutex2var_epi16(__m512i __A, __mmask32 __U, __m512i __I, |
| 1038 | __m512i __B) | |
| 1039 | { | |
| 971 | __m512i __B) { | |
| 1040 | 972 | return (__m512i)__builtin_ia32_selectw_512(__U, |
| 1041 | 973 | (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B), |
| 1042 | 974 | (__v32hi)__A); |
| 1043 | 975 | } |
| 1044 | 976 | |
| 1045 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 977 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1046 | 978 | _mm512_mask2_permutex2var_epi16(__m512i __A, __m512i __I, __mmask32 __U, |
| 1047 | __m512i __B) | |
| 1048 | { | |
| 979 | __m512i __B) { | |
| 1049 | 980 | return (__m512i)__builtin_ia32_selectw_512(__U, |
| 1050 | 981 | (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B), |
| 1051 | 982 | (__v32hi)__I); |
| 1052 | 983 | } |
| 1053 | 984 | |
| 1054 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 985 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1055 | 986 | _mm512_maskz_permutex2var_epi16(__mmask32 __U, __m512i __A, __m512i __I, |
| 1056 | __m512i __B) | |
| 1057 | { | |
| 987 | __m512i __B) { | |
| 1058 | 988 | return (__m512i)__builtin_ia32_selectw_512(__U, |
| 1059 | 989 | (__v32hi)_mm512_permutex2var_epi16(__A, __I, __B), |
| 1060 | 990 | (__v32hi)_mm512_setzero_si512()); |
| 1061 | 991 | } |
| 1062 | 992 | |
| 1063 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1064 | _mm512_mulhrs_epi16(__m512i __A, __m512i __B) | |
| 1065 | { | |
| 993 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 994 | _mm512_mulhrs_epi16(__m512i __A, __m512i __B) { | |
| 1066 | 995 | return (__m512i)__builtin_ia32_pmulhrsw512((__v32hi)__A, (__v32hi)__B); |
| 1067 | 996 | } |
| 1068 | 997 | |
| 1069 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1070 | _mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) | |
| 1071 | { | |
| 998 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 999 | _mm512_mask_mulhrs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { | |
| 1072 | 1000 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1073 | 1001 | (__v32hi)_mm512_mulhrs_epi16(__A, __B), |
| 1074 | 1002 | (__v32hi)__W); |
| 1075 | 1003 | } |
| 1076 | 1004 | |
| 1077 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1078 | _mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B) | |
| 1079 | { | |
| 1005 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1006 | _mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B) { | |
| 1080 | 1007 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1081 | 1008 | (__v32hi)_mm512_mulhrs_epi16(__A, __B), |
| 1082 | 1009 | (__v32hi)_mm512_setzero_si512()); |
| 1083 | 1010 | } |
| 1084 | 1011 | |
| 1085 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1086 | _mm512_mulhi_epi16(__m512i __A, __m512i __B) | |
| 1087 | { | |
| 1088 | return (__m512i)__builtin_ia32_pmulhw512((__v32hi) __A, (__v32hi) __B); | |
| 1012 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1013 | _mm512_mulhi_epi16(__m512i __A, __m512i __B) { | |
| 1014 | return (__m512i)__builtin_ia32_pmulhw512((__v32hi)__A, (__v32hi)__B); | |
| 1089 | 1015 | } |
| 1090 | 1016 | |
| 1091 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1092 | _mm512_mask_mulhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, | |
| 1093 | __m512i __B) | |
| 1094 | { | |
| 1095 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, | |
| 1096 | (__v32hi)_mm512_mulhi_epi16(__A, __B), | |
| 1097 | (__v32hi)__W); | |
| 1017 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1018 | _mm512_mask_mulhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { | |
| 1019 | return (__m512i)__builtin_ia32_selectw_512( | |
| 1020 | (__mmask32)__U, (__v32hi)_mm512_mulhi_epi16(__A, __B), (__v32hi)__W); | |
| 1098 | 1021 | } |
| 1099 | 1022 | |
| 1100 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1101 | _mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) | |
| 1102 | { | |
| 1103 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, | |
| 1104 | (__v32hi)_mm512_mulhi_epi16(__A, __B), | |
| 1105 | (__v32hi)_mm512_setzero_si512()); | |
| 1023 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1024 | _mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) { | |
| 1025 | return (__m512i)__builtin_ia32_selectw_512( | |
| 1026 | (__mmask32)__U, (__v32hi)_mm512_mulhi_epi16(__A, __B), | |
| 1027 | (__v32hi)_mm512_setzero_si512()); | |
| 1106 | 1028 | } |
| 1107 | 1029 | |
| 1108 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1109 | _mm512_mulhi_epu16(__m512i __A, __m512i __B) | |
| 1110 | { | |
| 1111 | return (__m512i)__builtin_ia32_pmulhuw512((__v32hi) __A, (__v32hi) __B); | |
| 1030 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1031 | _mm512_mulhi_epu16(__m512i __A, __m512i __B) { | |
| 1032 | return (__m512i)__builtin_ia32_pmulhuw512((__v32hu)__A, (__v32hu)__B); | |
| 1112 | 1033 | } |
| 1113 | 1034 | |
| 1114 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1115 | _mm512_mask_mulhi_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) | |
| 1116 | { | |
| 1117 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, | |
| 1118 | (__v32hi)_mm512_mulhi_epu16(__A, __B), | |
| 1119 | (__v32hi)__W); | |
| 1035 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1036 | _mm512_mask_mulhi_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { | |
| 1037 | return (__m512i)__builtin_ia32_selectw_512( | |
| 1038 | (__mmask32)__U, (__v32hi)_mm512_mulhi_epu16(__A, __B), (__v32hi)__W); | |
| 1120 | 1039 | } |
| 1121 | 1040 | |
| 1122 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1123 | _mm512_maskz_mulhi_epu16 (__mmask32 __U, __m512i __A, __m512i __B) | |
| 1124 | { | |
| 1125 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, | |
| 1126 | (__v32hi)_mm512_mulhi_epu16(__A, __B), | |
| 1127 | (__v32hi)_mm512_setzero_si512()); | |
| 1041 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1042 | _mm512_maskz_mulhi_epu16(__mmask32 __U, __m512i __A, __m512i __B) { | |
| 1043 | return (__m512i)__builtin_ia32_selectw_512( | |
| 1044 | (__mmask32)__U, (__v32hi)_mm512_mulhi_epu16(__A, __B), | |
| 1045 | (__v32hi)_mm512_setzero_si512()); | |
| 1128 | 1046 | } |
| 1129 | 1047 | |
| 1130 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1048 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1131 | 1049 | _mm512_maddubs_epi16(__m512i __X, __m512i __Y) { |
| 1132 | 1050 | return (__m512i)__builtin_ia32_pmaddubsw512((__v64qi)__X, (__v64qi)__Y); |
| 1133 | 1051 | } |
| 1134 | 1052 | |
| 1135 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1053 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1136 | 1054 | _mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X, |
| 1137 | 1055 | __m512i __Y) { |
| 1138 | 1056 | return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U, |
| ... | ... | @@ -1140,26 +1058,26 @@ _mm512_mask_maddubs_epi16(__m512i __W, __mmask32 __U, __m512i __X, |
| 1140 | 1058 | (__v32hi)__W); |
| 1141 | 1059 | } |
| 1142 | 1060 | |
| 1143 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1061 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1144 | 1062 | _mm512_maskz_maddubs_epi16(__mmask32 __U, __m512i __X, __m512i __Y) { |
| 1145 | 1063 | return (__m512i)__builtin_ia32_selectw_512((__mmask32) __U, |
| 1146 | 1064 | (__v32hi)_mm512_maddubs_epi16(__X, __Y), |
| 1147 | 1065 | (__v32hi)_mm512_setzero_si512()); |
| 1148 | 1066 | } |
| 1149 | 1067 | |
| 1150 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1068 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1151 | 1069 | _mm512_madd_epi16(__m512i __A, __m512i __B) { |
| 1152 | 1070 | return (__m512i)__builtin_ia32_pmaddwd512((__v32hi)__A, (__v32hi)__B); |
| 1153 | 1071 | } |
| 1154 | 1072 | |
| 1155 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1073 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1156 | 1074 | _mm512_mask_madd_epi16(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) { |
| 1157 | 1075 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 1158 | 1076 | (__v16si)_mm512_madd_epi16(__A, __B), |
| 1159 | 1077 | (__v16si)__W); |
| 1160 | 1078 | } |
| 1161 | 1079 | |
| 1162 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1080 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1163 | 1081 | _mm512_maskz_madd_epi16(__mmask16 __U, __m512i __A, __m512i __B) { |
| 1164 | 1082 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 1165 | 1083 | (__v16si)_mm512_madd_epi16(__A, __B), |
| ... | ... | @@ -1247,7 +1165,7 @@ _mm512_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask32 __M, __m512i __A) |
| 1247 | 1165 | __builtin_ia32_pmovuswb512mem_mask ((__v32qi *) __P, (__v32hi) __A, __M); |
| 1248 | 1166 | } |
| 1249 | 1167 | |
| 1250 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1168 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1251 | 1169 | _mm512_unpackhi_epi8(__m512i __A, __m512i __B) { |
| 1252 | 1170 | return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B, |
| 1253 | 1171 | 8, 64+8, 9, 64+9, |
| ... | ... | @@ -1268,21 +1186,21 @@ _mm512_unpackhi_epi8(__m512i __A, __m512i __B) { |
| 1268 | 1186 | 62, 64+62, 63, 64+63); |
| 1269 | 1187 | } |
| 1270 | 1188 | |
| 1271 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1189 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1272 | 1190 | _mm512_mask_unpackhi_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { |
| 1273 | 1191 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 1274 | 1192 | (__v64qi)_mm512_unpackhi_epi8(__A, __B), |
| 1275 | 1193 | (__v64qi)__W); |
| 1276 | 1194 | } |
| 1277 | 1195 | |
| 1278 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1196 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1279 | 1197 | _mm512_maskz_unpackhi_epi8(__mmask64 __U, __m512i __A, __m512i __B) { |
| 1280 | 1198 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 1281 | 1199 | (__v64qi)_mm512_unpackhi_epi8(__A, __B), |
| 1282 | 1200 | (__v64qi)_mm512_setzero_si512()); |
| 1283 | 1201 | } |
| 1284 | 1202 | |
| 1285 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1203 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1286 | 1204 | _mm512_unpackhi_epi16(__m512i __A, __m512i __B) { |
| 1287 | 1205 | return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B, |
| 1288 | 1206 | 4, 32+4, 5, 32+5, |
| ... | ... | @@ -1295,21 +1213,21 @@ _mm512_unpackhi_epi16(__m512i __A, __m512i __B) { |
| 1295 | 1213 | 30, 32+30, 31, 32+31); |
| 1296 | 1214 | } |
| 1297 | 1215 | |
| 1298 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1216 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1299 | 1217 | _mm512_mask_unpackhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { |
| 1300 | 1218 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1301 | 1219 | (__v32hi)_mm512_unpackhi_epi16(__A, __B), |
| 1302 | 1220 | (__v32hi)__W); |
| 1303 | 1221 | } |
| 1304 | 1222 | |
| 1305 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1223 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1306 | 1224 | _mm512_maskz_unpackhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) { |
| 1307 | 1225 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1308 | 1226 | (__v32hi)_mm512_unpackhi_epi16(__A, __B), |
| 1309 | 1227 | (__v32hi)_mm512_setzero_si512()); |
| 1310 | 1228 | } |
| 1311 | 1229 | |
| 1312 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1230 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1313 | 1231 | _mm512_unpacklo_epi8(__m512i __A, __m512i __B) { |
| 1314 | 1232 | return (__m512i)__builtin_shufflevector((__v64qi)__A, (__v64qi)__B, |
| 1315 | 1233 | 0, 64+0, 1, 64+1, |
| ... | ... | @@ -1330,21 +1248,21 @@ _mm512_unpacklo_epi8(__m512i __A, __m512i __B) { |
| 1330 | 1248 | 54, 64+54, 55, 64+55); |
| 1331 | 1249 | } |
| 1332 | 1250 | |
| 1333 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1251 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1334 | 1252 | _mm512_mask_unpacklo_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { |
| 1335 | 1253 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 1336 | 1254 | (__v64qi)_mm512_unpacklo_epi8(__A, __B), |
| 1337 | 1255 | (__v64qi)__W); |
| 1338 | 1256 | } |
| 1339 | 1257 | |
| 1340 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1258 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1341 | 1259 | _mm512_maskz_unpacklo_epi8(__mmask64 __U, __m512i __A, __m512i __B) { |
| 1342 | 1260 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__U, |
| 1343 | 1261 | (__v64qi)_mm512_unpacklo_epi8(__A, __B), |
| 1344 | 1262 | (__v64qi)_mm512_setzero_si512()); |
| 1345 | 1263 | } |
| 1346 | 1264 | |
| 1347 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1265 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1348 | 1266 | _mm512_unpacklo_epi16(__m512i __A, __m512i __B) { |
| 1349 | 1267 | return (__m512i)__builtin_shufflevector((__v32hi)__A, (__v32hi)__B, |
| 1350 | 1268 | 0, 32+0, 1, 32+1, |
| ... | ... | @@ -1357,67 +1275,60 @@ _mm512_unpacklo_epi16(__m512i __A, __m512i __B) { |
| 1357 | 1275 | 26, 32+26, 27, 32+27); |
| 1358 | 1276 | } |
| 1359 | 1277 | |
| 1360 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1278 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1361 | 1279 | _mm512_mask_unpacklo_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { |
| 1362 | 1280 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1363 | 1281 | (__v32hi)_mm512_unpacklo_epi16(__A, __B), |
| 1364 | 1282 | (__v32hi)__W); |
| 1365 | 1283 | } |
| 1366 | 1284 | |
| 1367 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1285 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1368 | 1286 | _mm512_maskz_unpacklo_epi16(__mmask32 __U, __m512i __A, __m512i __B) { |
| 1369 | 1287 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1370 | 1288 | (__v32hi)_mm512_unpacklo_epi16(__A, __B), |
| 1371 | 1289 | (__v32hi)_mm512_setzero_si512()); |
| 1372 | 1290 | } |
| 1373 | 1291 | |
| 1374 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1375 | _mm512_cvtepi8_epi16(__m256i __A) | |
| 1376 | { | |
| 1292 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1293 | _mm512_cvtepi8_epi16(__m256i __A) { | |
| 1377 | 1294 | /* This function always performs a signed extension, but __v32qi is a char |
| 1378 | 1295 | which may be signed or unsigned, so use __v32qs. */ |
| 1379 | 1296 | return (__m512i)__builtin_convertvector((__v32qs)__A, __v32hi); |
| 1380 | 1297 | } |
| 1381 | 1298 | |
| 1382 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1383 | _mm512_mask_cvtepi8_epi16(__m512i __W, __mmask32 __U, __m256i __A) | |
| 1384 | { | |
| 1299 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1300 | _mm512_mask_cvtepi8_epi16(__m512i __W, __mmask32 __U, __m256i __A) { | |
| 1385 | 1301 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1386 | 1302 | (__v32hi)_mm512_cvtepi8_epi16(__A), |
| 1387 | 1303 | (__v32hi)__W); |
| 1388 | 1304 | } |
| 1389 | 1305 | |
| 1390 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1391 | _mm512_maskz_cvtepi8_epi16(__mmask32 __U, __m256i __A) | |
| 1392 | { | |
| 1306 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1307 | _mm512_maskz_cvtepi8_epi16(__mmask32 __U, __m256i __A) { | |
| 1393 | 1308 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1394 | 1309 | (__v32hi)_mm512_cvtepi8_epi16(__A), |
| 1395 | 1310 | (__v32hi)_mm512_setzero_si512()); |
| 1396 | 1311 | } |
| 1397 | 1312 | |
| 1398 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1399 | _mm512_cvtepu8_epi16(__m256i __A) | |
| 1400 | { | |
| 1313 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1314 | _mm512_cvtepu8_epi16(__m256i __A) { | |
| 1401 | 1315 | return (__m512i)__builtin_convertvector((__v32qu)__A, __v32hi); |
| 1402 | 1316 | } |
| 1403 | 1317 | |
| 1404 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1405 | _mm512_mask_cvtepu8_epi16(__m512i __W, __mmask32 __U, __m256i __A) | |
| 1406 | { | |
| 1318 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1319 | _mm512_mask_cvtepu8_epi16(__m512i __W, __mmask32 __U, __m256i __A) { | |
| 1407 | 1320 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1408 | 1321 | (__v32hi)_mm512_cvtepu8_epi16(__A), |
| 1409 | 1322 | (__v32hi)__W); |
| 1410 | 1323 | } |
| 1411 | 1324 | |
| 1412 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1413 | _mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A) | |
| 1414 | { | |
| 1325 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1326 | _mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A) { | |
| 1415 | 1327 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1416 | 1328 | (__v32hi)_mm512_cvtepu8_epi16(__A), |
| 1417 | 1329 | (__v32hi)_mm512_setzero_si512()); |
| 1418 | 1330 | } |
| 1419 | 1331 | |
| 1420 | ||
| 1421 | 1332 | #define _mm512_shufflehi_epi16(A, imm) \ |
| 1422 | 1333 | ((__m512i)__builtin_ia32_pshufhw512((__v32hi)(__m512i)(A), (int)(imm))) |
| 1423 | 1334 | |
| ... | ... | @@ -1450,13 +1361,13 @@ _mm512_maskz_cvtepu8_epi16(__mmask32 __U, __m256i __A) |
| 1450 | 1361 | (imm)), \ |
| 1451 | 1362 | (__v32hi)_mm512_setzero_si512())) |
| 1452 | 1363 | |
| 1453 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1364 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1454 | 1365 | _mm512_sllv_epi16(__m512i __A, __m512i __B) |
| 1455 | 1366 | { |
| 1456 | 1367 | return (__m512i)__builtin_ia32_psllv32hi((__v32hi) __A, (__v32hi) __B); |
| 1457 | 1368 | } |
| 1458 | 1369 | |
| 1459 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1370 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1460 | 1371 | _mm512_mask_sllv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 1461 | 1372 | { |
| 1462 | 1373 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -1464,7 +1375,7 @@ _mm512_mask_sllv_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 1464 | 1375 | (__v32hi)__W); |
| 1465 | 1376 | } |
| 1466 | 1377 | |
| 1467 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1378 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1468 | 1379 | _mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B) |
| 1469 | 1380 | { |
| 1470 | 1381 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -1472,61 +1383,56 @@ _mm512_maskz_sllv_epi16(__mmask32 __U, __m512i __A, __m512i __B) |
| 1472 | 1383 | (__v32hi)_mm512_setzero_si512()); |
| 1473 | 1384 | } |
| 1474 | 1385 | |
| 1475 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1476 | _mm512_sll_epi16(__m512i __A, __m128i __B) | |
| 1477 | { | |
| 1386 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1387 | _mm512_sll_epi16(__m512i __A, __m128i __B) { | |
| 1478 | 1388 | return (__m512i)__builtin_ia32_psllw512((__v32hi) __A, (__v8hi) __B); |
| 1479 | 1389 | } |
| 1480 | 1390 | |
| 1481 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1482 | _mm512_mask_sll_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) | |
| 1483 | { | |
| 1391 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1392 | _mm512_mask_sll_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) { | |
| 1484 | 1393 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1485 | 1394 | (__v32hi)_mm512_sll_epi16(__A, __B), |
| 1486 | 1395 | (__v32hi)__W); |
| 1487 | 1396 | } |
| 1488 | 1397 | |
| 1489 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1490 | _mm512_maskz_sll_epi16(__mmask32 __U, __m512i __A, __m128i __B) | |
| 1491 | { | |
| 1398 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1399 | _mm512_maskz_sll_epi16(__mmask32 __U, __m512i __A, __m128i __B) { | |
| 1492 | 1400 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1493 | 1401 | (__v32hi)_mm512_sll_epi16(__A, __B), |
| 1494 | 1402 | (__v32hi)_mm512_setzero_si512()); |
| 1495 | 1403 | } |
| 1496 | 1404 | |
| 1497 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1498 | _mm512_slli_epi16(__m512i __A, unsigned int __B) | |
| 1499 | { | |
| 1405 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1406 | _mm512_slli_epi16(__m512i __A, unsigned int __B) { | |
| 1500 | 1407 | return (__m512i)__builtin_ia32_psllwi512((__v32hi)__A, (int)__B); |
| 1501 | 1408 | } |
| 1502 | 1409 | |
| 1503 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1410 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1504 | 1411 | _mm512_mask_slli_epi16(__m512i __W, __mmask32 __U, __m512i __A, |
| 1505 | unsigned int __B) | |
| 1506 | { | |
| 1412 | unsigned int __B) { | |
| 1507 | 1413 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1508 | 1414 | (__v32hi)_mm512_slli_epi16(__A, __B), |
| 1509 | 1415 | (__v32hi)__W); |
| 1510 | 1416 | } |
| 1511 | 1417 | |
| 1512 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1513 | _mm512_maskz_slli_epi16(__mmask32 __U, __m512i __A, unsigned int __B) | |
| 1514 | { | |
| 1418 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1419 | _mm512_maskz_slli_epi16(__mmask32 __U, __m512i __A, unsigned int __B) { | |
| 1515 | 1420 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1516 | 1421 | (__v32hi)_mm512_slli_epi16(__A, __B), |
| 1517 | 1422 | (__v32hi)_mm512_setzero_si512()); |
| 1518 | 1423 | } |
| 1519 | 1424 | |
| 1520 | #define _mm512_bslli_epi128(a, imm) \ | |
| 1521 | ((__m512i)__builtin_ia32_pslldqi512_byteshift((__v8di)(__m512i)(a), (int)(imm))) | |
| 1425 | #define _mm512_bslli_epi128(a, imm) \ | |
| 1426 | ((__m512i)__builtin_ia32_pslldqi512_byteshift((__v64qi)(__m512i)(a), \ | |
| 1427 | (int)(imm))) | |
| 1522 | 1428 | |
| 1523 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1429 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1524 | 1430 | _mm512_srlv_epi16(__m512i __A, __m512i __B) |
| 1525 | 1431 | { |
| 1526 | 1432 | return (__m512i)__builtin_ia32_psrlv32hi((__v32hi)__A, (__v32hi)__B); |
| 1527 | 1433 | } |
| 1528 | 1434 | |
| 1529 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1435 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1530 | 1436 | _mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 1531 | 1437 | { |
| 1532 | 1438 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -1534,7 +1440,7 @@ _mm512_mask_srlv_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 1534 | 1440 | (__v32hi)__W); |
| 1535 | 1441 | } |
| 1536 | 1442 | |
| 1537 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1443 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1538 | 1444 | _mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B) |
| 1539 | 1445 | { |
| 1540 | 1446 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -1542,13 +1448,13 @@ _mm512_maskz_srlv_epi16(__mmask32 __U, __m512i __A, __m512i __B) |
| 1542 | 1448 | (__v32hi)_mm512_setzero_si512()); |
| 1543 | 1449 | } |
| 1544 | 1450 | |
| 1545 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1451 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1546 | 1452 | _mm512_srav_epi16(__m512i __A, __m512i __B) |
| 1547 | 1453 | { |
| 1548 | 1454 | return (__m512i)__builtin_ia32_psrav32hi((__v32hi)__A, (__v32hi)__B); |
| 1549 | 1455 | } |
| 1550 | 1456 | |
| 1551 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1457 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1552 | 1458 | _mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 1553 | 1459 | { |
| 1554 | 1460 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -1556,7 +1462,7 @@ _mm512_mask_srav_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) |
| 1556 | 1462 | (__v32hi)__W); |
| 1557 | 1463 | } |
| 1558 | 1464 | |
| 1559 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1465 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1560 | 1466 | _mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B) |
| 1561 | 1467 | { |
| 1562 | 1468 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| ... | ... | @@ -1564,100 +1470,89 @@ _mm512_maskz_srav_epi16(__mmask32 __U, __m512i __A, __m512i __B) |
| 1564 | 1470 | (__v32hi)_mm512_setzero_si512()); |
| 1565 | 1471 | } |
| 1566 | 1472 | |
| 1567 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1568 | _mm512_sra_epi16(__m512i __A, __m128i __B) | |
| 1569 | { | |
| 1473 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1474 | _mm512_sra_epi16(__m512i __A, __m128i __B) { | |
| 1570 | 1475 | return (__m512i)__builtin_ia32_psraw512((__v32hi) __A, (__v8hi) __B); |
| 1571 | 1476 | } |
| 1572 | 1477 | |
| 1573 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1574 | _mm512_mask_sra_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) | |
| 1575 | { | |
| 1478 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1479 | _mm512_mask_sra_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) { | |
| 1576 | 1480 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1577 | 1481 | (__v32hi)_mm512_sra_epi16(__A, __B), |
| 1578 | 1482 | (__v32hi)__W); |
| 1579 | 1483 | } |
| 1580 | 1484 | |
| 1581 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1582 | _mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B) | |
| 1583 | { | |
| 1485 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1486 | _mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B) { | |
| 1584 | 1487 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1585 | 1488 | (__v32hi)_mm512_sra_epi16(__A, __B), |
| 1586 | 1489 | (__v32hi)_mm512_setzero_si512()); |
| 1587 | 1490 | } |
| 1588 | 1491 | |
| 1589 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1590 | _mm512_srai_epi16(__m512i __A, unsigned int __B) | |
| 1591 | { | |
| 1492 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1493 | _mm512_srai_epi16(__m512i __A, unsigned int __B) { | |
| 1592 | 1494 | return (__m512i)__builtin_ia32_psrawi512((__v32hi)__A, (int)__B); |
| 1593 | 1495 | } |
| 1594 | 1496 | |
| 1595 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1497 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1596 | 1498 | _mm512_mask_srai_epi16(__m512i __W, __mmask32 __U, __m512i __A, |
| 1597 | unsigned int __B) | |
| 1598 | { | |
| 1499 | unsigned int __B) { | |
| 1599 | 1500 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1600 | 1501 | (__v32hi)_mm512_srai_epi16(__A, __B), |
| 1601 | 1502 | (__v32hi)__W); |
| 1602 | 1503 | } |
| 1603 | 1504 | |
| 1604 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1605 | _mm512_maskz_srai_epi16(__mmask32 __U, __m512i __A, unsigned int __B) | |
| 1606 | { | |
| 1505 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1506 | _mm512_maskz_srai_epi16(__mmask32 __U, __m512i __A, unsigned int __B) { | |
| 1607 | 1507 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1608 | 1508 | (__v32hi)_mm512_srai_epi16(__A, __B), |
| 1609 | 1509 | (__v32hi)_mm512_setzero_si512()); |
| 1610 | 1510 | } |
| 1611 | 1511 | |
| 1612 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1613 | _mm512_srl_epi16(__m512i __A, __m128i __B) | |
| 1614 | { | |
| 1512 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1513 | _mm512_srl_epi16(__m512i __A, __m128i __B) { | |
| 1615 | 1514 | return (__m512i)__builtin_ia32_psrlw512((__v32hi) __A, (__v8hi) __B); |
| 1616 | 1515 | } |
| 1617 | 1516 | |
| 1618 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1619 | _mm512_mask_srl_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) | |
| 1620 | { | |
| 1517 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1518 | _mm512_mask_srl_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m128i __B) { | |
| 1621 | 1519 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1622 | 1520 | (__v32hi)_mm512_srl_epi16(__A, __B), |
| 1623 | 1521 | (__v32hi)__W); |
| 1624 | 1522 | } |
| 1625 | 1523 | |
| 1626 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1627 | _mm512_maskz_srl_epi16(__mmask32 __U, __m512i __A, __m128i __B) | |
| 1628 | { | |
| 1524 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1525 | _mm512_maskz_srl_epi16(__mmask32 __U, __m512i __A, __m128i __B) { | |
| 1629 | 1526 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1630 | 1527 | (__v32hi)_mm512_srl_epi16(__A, __B), |
| 1631 | 1528 | (__v32hi)_mm512_setzero_si512()); |
| 1632 | 1529 | } |
| 1633 | 1530 | |
| 1634 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1635 | _mm512_srli_epi16(__m512i __A, unsigned int __B) | |
| 1636 | { | |
| 1531 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1532 | _mm512_srli_epi16(__m512i __A, unsigned int __B) { | |
| 1637 | 1533 | return (__m512i)__builtin_ia32_psrlwi512((__v32hi)__A, (int)__B); |
| 1638 | 1534 | } |
| 1639 | 1535 | |
| 1640 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1536 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1641 | 1537 | _mm512_mask_srli_epi16(__m512i __W, __mmask32 __U, __m512i __A, |
| 1642 | unsigned int __B) | |
| 1643 | { | |
| 1538 | unsigned int __B) { | |
| 1644 | 1539 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1645 | 1540 | (__v32hi)_mm512_srli_epi16(__A, __B), |
| 1646 | 1541 | (__v32hi)__W); |
| 1647 | 1542 | } |
| 1648 | 1543 | |
| 1649 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1650 | _mm512_maskz_srli_epi16(__mmask32 __U, __m512i __A, int __B) | |
| 1651 | { | |
| 1544 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1545 | _mm512_maskz_srli_epi16(__mmask32 __U, __m512i __A, int __B) { | |
| 1652 | 1546 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U, |
| 1653 | 1547 | (__v32hi)_mm512_srli_epi16(__A, (unsigned int)__B), |
| 1654 | 1548 | (__v32hi)_mm512_setzero_si512()); |
| 1655 | 1549 | } |
| 1656 | 1550 | |
| 1657 | #define _mm512_bsrli_epi128(a, imm) \ | |
| 1658 | ((__m512i)__builtin_ia32_psrldqi512_byteshift((__v8di)(__m512i)(a), (int)(imm))) | |
| 1551 | #define _mm512_bsrli_epi128(a, imm) \ | |
| 1552 | ((__m512i)__builtin_ia32_psrldqi512_byteshift((__v64qi)(__m512i)(a), \ | |
| 1553 | (int)(imm))) | |
| 1659 | 1554 | |
| 1660 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1555 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1661 | 1556 | _mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A) |
| 1662 | 1557 | { |
| 1663 | 1558 | return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U, |
| ... | ... | @@ -1665,23 +1560,21 @@ _mm512_mask_mov_epi16 (__m512i __W, __mmask32 __U, __m512i __A) |
| 1665 | 1560 | (__v32hi) __W); |
| 1666 | 1561 | } |
| 1667 | 1562 | |
| 1668 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1669 | _mm512_maskz_mov_epi16 (__mmask32 __U, __m512i __A) | |
| 1670 | { | |
| 1563 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1564 | _mm512_maskz_mov_epi16(__mmask32 __U, __m512i __A) { | |
| 1671 | 1565 | return (__m512i) __builtin_ia32_selectw_512 ((__mmask32) __U, |
| 1672 | 1566 | (__v32hi) __A, |
| 1673 | 1567 | (__v32hi) _mm512_setzero_si512 ()); |
| 1674 | 1568 | } |
| 1675 | 1569 | |
| 1676 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1677 | _mm512_mask_mov_epi8 (__m512i __W, __mmask64 __U, __m512i __A) | |
| 1678 | { | |
| 1570 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1571 | _mm512_mask_mov_epi8(__m512i __W, __mmask64 __U, __m512i __A) { | |
| 1679 | 1572 | return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U, |
| 1680 | 1573 | (__v64qi) __A, |
| 1681 | 1574 | (__v64qi) __W); |
| 1682 | 1575 | } |
| 1683 | 1576 | |
| 1684 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1577 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1685 | 1578 | _mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A) |
| 1686 | 1579 | { |
| 1687 | 1580 | return (__m512i) __builtin_ia32_selectb_512 ((__mmask64) __U, |
| ... | ... | @@ -1689,7 +1582,7 @@ _mm512_maskz_mov_epi8 (__mmask64 __U, __m512i __A) |
| 1689 | 1582 | (__v64qi) _mm512_setzero_si512 ()); |
| 1690 | 1583 | } |
| 1691 | 1584 | |
| 1692 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1585 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1693 | 1586 | _mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A) |
| 1694 | 1587 | { |
| 1695 | 1588 | return (__m512i) __builtin_ia32_selectb_512(__M, |
| ... | ... | @@ -1697,23 +1590,21 @@ _mm512_mask_set1_epi8 (__m512i __O, __mmask64 __M, char __A) |
| 1697 | 1590 | (__v64qi) __O); |
| 1698 | 1591 | } |
| 1699 | 1592 | |
| 1700 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1701 | _mm512_maskz_set1_epi8 (__mmask64 __M, char __A) | |
| 1702 | { | |
| 1593 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1594 | _mm512_maskz_set1_epi8(__mmask64 __M, char __A) { | |
| 1703 | 1595 | return (__m512i) __builtin_ia32_selectb_512(__M, |
| 1704 | 1596 | (__v64qi) _mm512_set1_epi8(__A), |
| 1705 | 1597 | (__v64qi) _mm512_setzero_si512()); |
| 1706 | 1598 | } |
| 1707 | 1599 | |
| 1708 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS _mm512_kunpackd(__mmask64 __A, | |
| 1709 | __mmask64 __B) { | |
| 1600 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1601 | _mm512_kunpackd(__mmask64 __A, __mmask64 __B) { | |
| 1710 | 1602 | return (__mmask64) __builtin_ia32_kunpckdi ((__mmask64) __A, |
| 1711 | 1603 | (__mmask64) __B); |
| 1712 | 1604 | } |
| 1713 | 1605 | |
| 1714 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS | |
| 1715 | _mm512_kunpackw (__mmask32 __A, __mmask32 __B) | |
| 1716 | { | |
| 1606 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1607 | _mm512_kunpackw(__mmask32 __A, __mmask32 __B) { | |
| 1717 | 1608 | return (__mmask32) __builtin_ia32_kunpcksi ((__mmask32) __A, |
| 1718 | 1609 | (__mmask32) __B); |
| 1719 | 1610 | } |
| ... | ... | @@ -1859,33 +1750,28 @@ _mm512_mask_testn_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B) |
| 1859 | 1750 | _mm512_setzero_si512()); |
| 1860 | 1751 | } |
| 1861 | 1752 | |
| 1862 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS512 | |
| 1863 | _mm512_movepi8_mask (__m512i __A) | |
| 1864 | { | |
| 1753 | static __inline__ __mmask64 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1754 | _mm512_movepi8_mask(__m512i __A) { | |
| 1865 | 1755 | return (__mmask64) __builtin_ia32_cvtb2mask512 ((__v64qi) __A); |
| 1866 | 1756 | } |
| 1867 | 1757 | |
| 1868 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS512 | |
| 1869 | _mm512_movepi16_mask (__m512i __A) | |
| 1870 | { | |
| 1758 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1759 | _mm512_movepi16_mask(__m512i __A) { | |
| 1871 | 1760 | return (__mmask32) __builtin_ia32_cvtw2mask512 ((__v32hi) __A); |
| 1872 | 1761 | } |
| 1873 | 1762 | |
| 1874 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1875 | _mm512_movm_epi8 (__mmask64 __A) | |
| 1876 | { | |
| 1763 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1764 | _mm512_movm_epi8(__mmask64 __A) { | |
| 1877 | 1765 | return (__m512i) __builtin_ia32_cvtmask2b512 (__A); |
| 1878 | 1766 | } |
| 1879 | 1767 | |
| 1880 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1881 | _mm512_movm_epi16 (__mmask32 __A) | |
| 1882 | { | |
| 1768 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1769 | _mm512_movm_epi16(__mmask32 __A) { | |
| 1883 | 1770 | return (__m512i) __builtin_ia32_cvtmask2w512 (__A); |
| 1884 | 1771 | } |
| 1885 | 1772 | |
| 1886 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1887 | _mm512_broadcastb_epi8 (__m128i __A) | |
| 1888 | { | |
| 1773 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1774 | _mm512_broadcastb_epi8(__m128i __A) { | |
| 1889 | 1775 | return (__m512i)__builtin_shufflevector((__v16qi) __A, (__v16qi) __A, |
| 1890 | 1776 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 1891 | 1777 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| ... | ... | @@ -1893,7 +1779,7 @@ _mm512_broadcastb_epi8 (__m128i __A) |
| 1893 | 1779 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 1894 | 1780 | } |
| 1895 | 1781 | |
| 1896 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1782 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1897 | 1783 | _mm512_mask_broadcastb_epi8 (__m512i __O, __mmask64 __M, __m128i __A) |
| 1898 | 1784 | { |
| 1899 | 1785 | return (__m512i)__builtin_ia32_selectb_512(__M, |
| ... | ... | @@ -1901,15 +1787,14 @@ _mm512_mask_broadcastb_epi8 (__m512i __O, __mmask64 __M, __m128i __A) |
| 1901 | 1787 | (__v64qi) __O); |
| 1902 | 1788 | } |
| 1903 | 1789 | |
| 1904 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1905 | _mm512_maskz_broadcastb_epi8 (__mmask64 __M, __m128i __A) | |
| 1906 | { | |
| 1790 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1791 | _mm512_maskz_broadcastb_epi8(__mmask64 __M, __m128i __A) { | |
| 1907 | 1792 | return (__m512i)__builtin_ia32_selectb_512(__M, |
| 1908 | 1793 | (__v64qi) _mm512_broadcastb_epi8(__A), |
| 1909 | 1794 | (__v64qi) _mm512_setzero_si512()); |
| 1910 | 1795 | } |
| 1911 | 1796 | |
| 1912 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1797 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1913 | 1798 | _mm512_mask_set1_epi16 (__m512i __O, __mmask32 __M, short __A) |
| 1914 | 1799 | { |
| 1915 | 1800 | return (__m512i) __builtin_ia32_selectw_512(__M, |
| ... | ... | @@ -1917,23 +1802,21 @@ _mm512_mask_set1_epi16 (__m512i __O, __mmask32 __M, short __A) |
| 1917 | 1802 | (__v32hi) __O); |
| 1918 | 1803 | } |
| 1919 | 1804 | |
| 1920 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1921 | _mm512_maskz_set1_epi16 (__mmask32 __M, short __A) | |
| 1922 | { | |
| 1805 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1806 | _mm512_maskz_set1_epi16(__mmask32 __M, short __A) { | |
| 1923 | 1807 | return (__m512i) __builtin_ia32_selectw_512(__M, |
| 1924 | 1808 | (__v32hi) _mm512_set1_epi16(__A), |
| 1925 | 1809 | (__v32hi) _mm512_setzero_si512()); |
| 1926 | 1810 | } |
| 1927 | 1811 | |
| 1928 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1929 | _mm512_broadcastw_epi16 (__m128i __A) | |
| 1930 | { | |
| 1812 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1813 | _mm512_broadcastw_epi16(__m128i __A) { | |
| 1931 | 1814 | return (__m512i)__builtin_shufflevector((__v8hi) __A, (__v8hi) __A, |
| 1932 | 1815 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 1933 | 1816 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 1934 | 1817 | } |
| 1935 | 1818 | |
| 1936 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1819 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1937 | 1820 | _mm512_mask_broadcastw_epi16 (__m512i __O, __mmask32 __M, __m128i __A) |
| 1938 | 1821 | { |
| 1939 | 1822 | return (__m512i)__builtin_ia32_selectw_512(__M, |
| ... | ... | @@ -1941,7 +1824,7 @@ _mm512_mask_broadcastw_epi16 (__m512i __O, __mmask32 __M, __m128i __A) |
| 1941 | 1824 | (__v32hi) __O); |
| 1942 | 1825 | } |
| 1943 | 1826 | |
| 1944 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1827 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1945 | 1828 | _mm512_maskz_broadcastw_epi16 (__mmask32 __M, __m128i __A) |
| 1946 | 1829 | { |
| 1947 | 1830 | return (__m512i)__builtin_ia32_selectw_512(__M, |
| ... | ... | @@ -1949,25 +1832,21 @@ _mm512_maskz_broadcastw_epi16 (__mmask32 __M, __m128i __A) |
| 1949 | 1832 | (__v32hi) _mm512_setzero_si512()); |
| 1950 | 1833 | } |
| 1951 | 1834 | |
| 1952 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1953 | _mm512_permutexvar_epi16 (__m512i __A, __m512i __B) | |
| 1954 | { | |
| 1835 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1836 | _mm512_permutexvar_epi16(__m512i __A, __m512i __B) { | |
| 1955 | 1837 | return (__m512i)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A); |
| 1956 | 1838 | } |
| 1957 | 1839 | |
| 1958 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1959 | _mm512_maskz_permutexvar_epi16 (__mmask32 __M, __m512i __A, | |
| 1960 | __m512i __B) | |
| 1961 | { | |
| 1840 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1841 | _mm512_maskz_permutexvar_epi16(__mmask32 __M, __m512i __A, __m512i __B) { | |
| 1962 | 1842 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 1963 | 1843 | (__v32hi)_mm512_permutexvar_epi16(__A, __B), |
| 1964 | 1844 | (__v32hi)_mm512_setzero_si512()); |
| 1965 | 1845 | } |
| 1966 | 1846 | |
| 1967 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1968 | _mm512_mask_permutexvar_epi16 (__m512i __W, __mmask32 __M, __m512i __A, | |
| 1969 | __m512i __B) | |
| 1970 | { | |
| 1847 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1848 | _mm512_mask_permutexvar_epi16(__m512i __W, __mmask32 __M, __m512i __A, | |
| 1849 | __m512i __B) { | |
| 1971 | 1850 | return (__m512i)__builtin_ia32_selectw_512((__mmask32)__M, |
| 1972 | 1851 | (__v32hi)_mm512_permutexvar_epi16(__A, __B), |
| 1973 | 1852 | (__v32hi)__W); |
| ... | ... | @@ -2010,5 +1889,7 @@ _mm512_sad_epu8 (__m512i __A, __m512i __B) |
| 2010 | 1889 | |
| 2011 | 1890 | #undef __DEFAULT_FN_ATTRS512 |
| 2012 | 1891 | #undef __DEFAULT_FN_ATTRS |
| 1892 | #undef __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1893 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2013 | 1894 | |
| 2014 | 1895 | #endif |
lib/include/avx512cdintrin.h+42-55| ... | ... | @@ -15,109 +15,96 @@ |
| 15 | 15 | #define __AVX512CDINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 18 | 19 | #define __DEFAULT_FN_ATTRS \ |
| 19 | __attribute__((__always_inline__, __nodebug__, \ | |
| 20 | __target__("avx512cd,evex512"), __min_vector_width__(512))) | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avx512cd"), \ | |
| 21 | __min_vector_width__(512))) constexpr | |
| 22 | #else | |
| 23 | #define __DEFAULT_FN_ATTRS \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx512cd"), \ | |
| 25 | __min_vector_width__(512))) | |
| 26 | #endif | |
| 21 | 27 | |
| 22 | 28 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 23 | _mm512_conflict_epi64 (__m512i __A) | |
| 24 | { | |
| 25 | return (__m512i) __builtin_ia32_vpconflictdi_512 ((__v8di) __A); | |
| 29 | _mm512_conflict_epi64(__m512i __A) { | |
| 30 | return (__m512i)__builtin_ia32_vpconflictdi_512((__v8di)__A); | |
| 26 | 31 | } |
| 27 | 32 | |
| 28 | 33 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 29 | _mm512_mask_conflict_epi64 (__m512i __W, __mmask8 __U, __m512i __A) | |
| 30 | { | |
| 31 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, | |
| 32 | (__v8di)_mm512_conflict_epi64(__A), | |
| 33 | (__v8di)__W); | |
| 34 | _mm512_mask_conflict_epi64(__m512i __W, __mmask8 __U, __m512i __A) { | |
| 35 | return (__m512i)__builtin_ia32_selectq_512( | |
| 36 | (__mmask8)__U, (__v8di)_mm512_conflict_epi64(__A), (__v8di)__W); | |
| 34 | 37 | } |
| 35 | 38 | |
| 36 | 39 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 37 | _mm512_maskz_conflict_epi64 (__mmask8 __U, __m512i __A) | |
| 38 | { | |
| 40 | _mm512_maskz_conflict_epi64(__mmask8 __U, __m512i __A) { | |
| 39 | 41 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 40 | 42 | (__v8di)_mm512_conflict_epi64(__A), |
| 41 | (__v8di)_mm512_setzero_si512 ()); | |
| 43 | (__v8di)_mm512_setzero_si512()); | |
| 42 | 44 | } |
| 43 | 45 | |
| 44 | 46 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 45 | _mm512_conflict_epi32 (__m512i __A) | |
| 46 | { | |
| 47 | return (__m512i) __builtin_ia32_vpconflictsi_512 ((__v16si) __A); | |
| 47 | _mm512_conflict_epi32(__m512i __A) { | |
| 48 | return (__m512i)__builtin_ia32_vpconflictsi_512((__v16si)__A); | |
| 48 | 49 | } |
| 49 | 50 | |
| 50 | 51 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 51 | _mm512_mask_conflict_epi32 (__m512i __W, __mmask16 __U, __m512i __A) | |
| 52 | { | |
| 53 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, | |
| 54 | (__v16si)_mm512_conflict_epi32(__A), | |
| 55 | (__v16si)__W); | |
| 52 | _mm512_mask_conflict_epi32(__m512i __W, __mmask16 __U, __m512i __A) { | |
| 53 | return (__m512i)__builtin_ia32_selectd_512( | |
| 54 | (__mmask16)__U, (__v16si)_mm512_conflict_epi32(__A), (__v16si)__W); | |
| 56 | 55 | } |
| 57 | 56 | |
| 58 | 57 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 59 | _mm512_maskz_conflict_epi32 (__mmask16 __U, __m512i __A) | |
| 60 | { | |
| 61 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, | |
| 62 | (__v16si)_mm512_conflict_epi32(__A), | |
| 63 | (__v16si)_mm512_setzero_si512()); | |
| 58 | _mm512_maskz_conflict_epi32(__mmask16 __U, __m512i __A) { | |
| 59 | return (__m512i)__builtin_ia32_selectd_512( | |
| 60 | (__mmask16)__U, (__v16si)_mm512_conflict_epi32(__A), | |
| 61 | (__v16si)_mm512_setzero_si512()); | |
| 64 | 62 | } |
| 65 | 63 | |
| 66 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 67 | _mm512_lzcnt_epi32 (__m512i __A) | |
| 68 | { | |
| 69 | return (__m512i) __builtin_ia32_vplzcntd_512 ((__v16si) __A); | |
| 64 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_lzcnt_epi32(__m512i __A) { | |
| 65 | return (__m512i)__builtin_elementwise_clzg((__v16si)__A, | |
| 66 | (__v16si)_mm512_set1_epi32(32)); | |
| 70 | 67 | } |
| 71 | 68 | |
| 72 | 69 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 73 | _mm512_mask_lzcnt_epi32 (__m512i __W, __mmask16 __U, __m512i __A) | |
| 74 | { | |
| 75 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, | |
| 76 | (__v16si)_mm512_lzcnt_epi32(__A), | |
| 77 | (__v16si)__W); | |
| 70 | _mm512_mask_lzcnt_epi32(__m512i __W, __mmask16 __U, __m512i __A) { | |
| 71 | return (__m512i)__builtin_ia32_selectd_512( | |
| 72 | (__mmask16)__U, (__v16si)_mm512_lzcnt_epi32(__A), (__v16si)__W); | |
| 78 | 73 | } |
| 79 | 74 | |
| 80 | 75 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 81 | _mm512_maskz_lzcnt_epi32 (__mmask16 __U, __m512i __A) | |
| 82 | { | |
| 76 | _mm512_maskz_lzcnt_epi32(__mmask16 __U, __m512i __A) { | |
| 83 | 77 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 84 | 78 | (__v16si)_mm512_lzcnt_epi32(__A), |
| 85 | 79 | (__v16si)_mm512_setzero_si512()); |
| 86 | 80 | } |
| 87 | 81 | |
| 88 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 89 | _mm512_lzcnt_epi64 (__m512i __A) | |
| 90 | { | |
| 91 | return (__m512i) __builtin_ia32_vplzcntq_512 ((__v8di) __A); | |
| 82 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_lzcnt_epi64(__m512i __A) { | |
| 83 | return (__m512i)__builtin_elementwise_clzg( | |
| 84 | (__v8di)__A, (__v8di)_mm512_set1_epi64((long long)64)); | |
| 92 | 85 | } |
| 93 | 86 | |
| 94 | 87 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 95 | _mm512_mask_lzcnt_epi64 (__m512i __W, __mmask8 __U, __m512i __A) | |
| 96 | { | |
| 97 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, | |
| 98 | (__v8di)_mm512_lzcnt_epi64(__A), | |
| 99 | (__v8di)__W); | |
| 88 | _mm512_mask_lzcnt_epi64(__m512i __W, __mmask8 __U, __m512i __A) { | |
| 89 | return (__m512i)__builtin_ia32_selectq_512( | |
| 90 | (__mmask8)__U, (__v8di)_mm512_lzcnt_epi64(__A), (__v8di)__W); | |
| 100 | 91 | } |
| 101 | 92 | |
| 102 | 93 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 103 | _mm512_maskz_lzcnt_epi64 (__mmask8 __U, __m512i __A) | |
| 104 | { | |
| 94 | _mm512_maskz_lzcnt_epi64(__mmask8 __U, __m512i __A) { | |
| 105 | 95 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 106 | 96 | (__v8di)_mm512_lzcnt_epi64(__A), |
| 107 | 97 | (__v8di)_mm512_setzero_si512()); |
| 108 | 98 | } |
| 109 | 99 | |
| 110 | 100 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 111 | _mm512_broadcastmb_epi64 (__mmask8 __A) | |
| 112 | { | |
| 113 | return (__m512i) _mm512_set1_epi64((long long) __A); | |
| 101 | _mm512_broadcastmb_epi64(__mmask8 __A) { | |
| 102 | return (__m512i)_mm512_set1_epi64((long long)__A); | |
| 114 | 103 | } |
| 115 | 104 | |
| 116 | 105 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 117 | _mm512_broadcastmw_epi32 (__mmask16 __A) | |
| 118 | { | |
| 119 | return (__m512i) _mm512_set1_epi32((int) __A); | |
| 120 | ||
| 106 | _mm512_broadcastmw_epi32(__mmask16 __A) { | |
| 107 | return (__m512i)_mm512_set1_epi32((int)__A); | |
| 121 | 108 | } |
| 122 | 109 | |
| 123 | 110 | #undef __DEFAULT_FN_ATTRS |
lib/include/avx512dqintrin.h+132-161| ... | ... | @@ -15,110 +15,105 @@ |
| 15 | 15 | #define __AVX512DQINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #define __DEFAULT_FN_ATTRS512 __attribute__((__always_inline__, __nodebug__, __target__("avx512dq,evex512"), __min_vector_width__(512))) | |
| 18 | #define __DEFAULT_FN_ATTRS512 \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx512dq"), \ | |
| 20 | __min_vector_width__(512))) | |
| 19 | 21 | #define __DEFAULT_FN_ATTRS \ |
| 20 | __attribute__((__always_inline__, __nodebug__, \ | |
| 21 | __target__("avx512dq,no-evex512"))) | |
| 22 | __attribute__((__always_inline__, __nodebug__, __target__("avx512dq"))) | |
| 23 | ||
| 24 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 25 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr | |
| 26 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 27 | #else | |
| 28 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 | |
| 29 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 30 | #endif | |
| 22 | 31 | |
| 23 | static __inline __mmask8 __DEFAULT_FN_ATTRS | |
| 24 | _knot_mask8(__mmask8 __M) | |
| 25 | { | |
| 32 | static __inline __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 33 | _knot_mask8(__mmask8 __M) { | |
| 26 | 34 | return __builtin_ia32_knotqi(__M); |
| 27 | 35 | } |
| 28 | 36 | |
| 29 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS | |
| 30 | _kand_mask8(__mmask8 __A, __mmask8 __B) | |
| 31 | { | |
| 37 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 38 | _kand_mask8(__mmask8 __A, __mmask8 __B) { | |
| 32 | 39 | return (__mmask8)__builtin_ia32_kandqi((__mmask8)__A, (__mmask8)__B); |
| 33 | 40 | } |
| 34 | 41 | |
| 35 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS | |
| 36 | _kandn_mask8(__mmask8 __A, __mmask8 __B) | |
| 37 | { | |
| 42 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 43 | _kandn_mask8(__mmask8 __A, __mmask8 __B) { | |
| 38 | 44 | return (__mmask8)__builtin_ia32_kandnqi((__mmask8)__A, (__mmask8)__B); |
| 39 | 45 | } |
| 40 | 46 | |
| 41 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS | |
| 42 | _kor_mask8(__mmask8 __A, __mmask8 __B) | |
| 43 | { | |
| 47 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 48 | _kor_mask8(__mmask8 __A, __mmask8 __B) { | |
| 44 | 49 | return (__mmask8)__builtin_ia32_korqi((__mmask8)__A, (__mmask8)__B); |
| 45 | 50 | } |
| 46 | 51 | |
| 47 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS | |
| 48 | _kxnor_mask8(__mmask8 __A, __mmask8 __B) | |
| 49 | { | |
| 52 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 53 | _kxnor_mask8(__mmask8 __A, __mmask8 __B) { | |
| 50 | 54 | return (__mmask8)__builtin_ia32_kxnorqi((__mmask8)__A, (__mmask8)__B); |
| 51 | 55 | } |
| 52 | 56 | |
| 53 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS | |
| 54 | _kxor_mask8(__mmask8 __A, __mmask8 __B) | |
| 55 | { | |
| 57 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 58 | _kxor_mask8(__mmask8 __A, __mmask8 __B) { | |
| 56 | 59 | return (__mmask8)__builtin_ia32_kxorqi((__mmask8)__A, (__mmask8)__B); |
| 57 | 60 | } |
| 58 | 61 | |
| 59 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 60 | _kortestc_mask8_u8(__mmask8 __A, __mmask8 __B) | |
| 61 | { | |
| 62 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 63 | _kortestc_mask8_u8(__mmask8 __A, __mmask8 __B) { | |
| 62 | 64 | return (unsigned char)__builtin_ia32_kortestcqi(__A, __B); |
| 63 | 65 | } |
| 64 | 66 | |
| 65 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 66 | _kortestz_mask8_u8(__mmask8 __A, __mmask8 __B) | |
| 67 | { | |
| 67 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 68 | _kortestz_mask8_u8(__mmask8 __A, __mmask8 __B) { | |
| 68 | 69 | return (unsigned char)__builtin_ia32_kortestzqi(__A, __B); |
| 69 | 70 | } |
| 70 | 71 | |
| 71 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 72 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 72 | 73 | _kortest_mask8_u8(__mmask8 __A, __mmask8 __B, unsigned char *__C) { |
| 73 | 74 | *__C = (unsigned char)__builtin_ia32_kortestcqi(__A, __B); |
| 74 | 75 | return (unsigned char)__builtin_ia32_kortestzqi(__A, __B); |
| 75 | 76 | } |
| 76 | 77 | |
| 77 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 78 | _ktestc_mask8_u8(__mmask8 __A, __mmask8 __B) | |
| 79 | { | |
| 78 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 79 | _ktestc_mask8_u8(__mmask8 __A, __mmask8 __B) { | |
| 80 | 80 | return (unsigned char)__builtin_ia32_ktestcqi(__A, __B); |
| 81 | 81 | } |
| 82 | 82 | |
| 83 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 84 | _ktestz_mask8_u8(__mmask8 __A, __mmask8 __B) | |
| 85 | { | |
| 83 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 84 | _ktestz_mask8_u8(__mmask8 __A, __mmask8 __B) { | |
| 86 | 85 | return (unsigned char)__builtin_ia32_ktestzqi(__A, __B); |
| 87 | 86 | } |
| 88 | 87 | |
| 89 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 88 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 90 | 89 | _ktest_mask8_u8(__mmask8 __A, __mmask8 __B, unsigned char *__C) { |
| 91 | 90 | *__C = (unsigned char)__builtin_ia32_ktestcqi(__A, __B); |
| 92 | 91 | return (unsigned char)__builtin_ia32_ktestzqi(__A, __B); |
| 93 | 92 | } |
| 94 | 93 | |
| 95 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 96 | _ktestc_mask16_u8(__mmask16 __A, __mmask16 __B) | |
| 97 | { | |
| 94 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 95 | _ktestc_mask16_u8(__mmask16 __A, __mmask16 __B) { | |
| 98 | 96 | return (unsigned char)__builtin_ia32_ktestchi(__A, __B); |
| 99 | 97 | } |
| 100 | 98 | |
| 101 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 102 | _ktestz_mask16_u8(__mmask16 __A, __mmask16 __B) | |
| 103 | { | |
| 99 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 100 | _ktestz_mask16_u8(__mmask16 __A, __mmask16 __B) { | |
| 104 | 101 | return (unsigned char)__builtin_ia32_ktestzhi(__A, __B); |
| 105 | 102 | } |
| 106 | 103 | |
| 107 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 104 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 108 | 105 | _ktest_mask16_u8(__mmask16 __A, __mmask16 __B, unsigned char *__C) { |
| 109 | 106 | *__C = (unsigned char)__builtin_ia32_ktestchi(__A, __B); |
| 110 | 107 | return (unsigned char)__builtin_ia32_ktestzhi(__A, __B); |
| 111 | 108 | } |
| 112 | 109 | |
| 113 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS | |
| 114 | _kadd_mask8(__mmask8 __A, __mmask8 __B) | |
| 115 | { | |
| 110 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 111 | _kadd_mask8(__mmask8 __A, __mmask8 __B) { | |
| 116 | 112 | return (__mmask8)__builtin_ia32_kaddqi((__mmask8)__A, (__mmask8)__B); |
| 117 | 113 | } |
| 118 | 114 | |
| 119 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 120 | _kadd_mask16(__mmask16 __A, __mmask16 __B) | |
| 121 | { | |
| 115 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 116 | _kadd_mask16(__mmask16 __A, __mmask16 __B) { | |
| 122 | 117 | return (__mmask16)__builtin_ia32_kaddhi((__mmask16)__A, (__mmask16)__B); |
| 123 | 118 | } |
| 124 | 119 | |
| ... | ... | @@ -128,12 +123,12 @@ _kadd_mask16(__mmask16 __A, __mmask16 __B) |
| 128 | 123 | #define _kshiftri_mask8(A, I) \ |
| 129 | 124 | ((__mmask8)__builtin_ia32_kshiftriqi((__mmask8)(A), (unsigned int)(I))) |
| 130 | 125 | |
| 131 | static __inline__ unsigned int __DEFAULT_FN_ATTRS | |
| 132 | _cvtmask8_u32(__mmask8 __A) { | |
| 126 | static __inline__ unsigned int | |
| 127 | __DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask8_u32(__mmask8 __A) { | |
| 133 | 128 | return (unsigned int)__builtin_ia32_kmovb((__mmask8)__A); |
| 134 | 129 | } |
| 135 | 130 | |
| 136 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS | |
| 131 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 137 | 132 | _cvtu32_mask8(unsigned int __A) { |
| 138 | 133 | return (__mmask8)__builtin_ia32_kmovb((__mmask8)__A); |
| 139 | 134 | } |
| ... | ... | @@ -148,26 +143,26 @@ _store_mask8(__mmask8 *__A, __mmask8 __B) { |
| 148 | 143 | *(__mmask8 *)__A = __builtin_ia32_kmovb((__mmask8)__B); |
| 149 | 144 | } |
| 150 | 145 | |
| 151 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 152 | _mm512_mullo_epi64 (__m512i __A, __m512i __B) { | |
| 146 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 147 | _mm512_mullo_epi64(__m512i __A, __m512i __B) { | |
| 153 | 148 | return (__m512i) ((__v8du) __A * (__v8du) __B); |
| 154 | 149 | } |
| 155 | 150 | |
| 156 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 151 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 157 | 152 | _mm512_mask_mullo_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { |
| 158 | 153 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 159 | 154 | (__v8di)_mm512_mullo_epi64(__A, __B), |
| 160 | 155 | (__v8di)__W); |
| 161 | 156 | } |
| 162 | 157 | |
| 163 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 158 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 164 | 159 | _mm512_maskz_mullo_epi64(__mmask8 __U, __m512i __A, __m512i __B) { |
| 165 | 160 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 166 | 161 | (__v8di)_mm512_mullo_epi64(__A, __B), |
| 167 | 162 | (__v8di)_mm512_setzero_si512()); |
| 168 | 163 | } |
| 169 | 164 | |
| 170 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 165 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 171 | 166 | _mm512_xor_pd(__m512d __A, __m512d __B) { |
| 172 | 167 | return (__m512d)((__v8du)__A ^ (__v8du)__B); |
| 173 | 168 | } |
| ... | ... | @@ -186,7 +181,7 @@ _mm512_maskz_xor_pd(__mmask8 __U, __m512d __A, __m512d __B) { |
| 186 | 181 | (__v8df)_mm512_setzero_pd()); |
| 187 | 182 | } |
| 188 | 183 | |
| 189 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 184 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 190 | 185 | _mm512_xor_ps (__m512 __A, __m512 __B) { |
| 191 | 186 | return (__m512)((__v16su)__A ^ (__v16su)__B); |
| 192 | 187 | } |
| ... | ... | @@ -205,7 +200,7 @@ _mm512_maskz_xor_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 205 | 200 | (__v16sf)_mm512_setzero_ps()); |
| 206 | 201 | } |
| 207 | 202 | |
| 208 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 203 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 209 | 204 | _mm512_or_pd(__m512d __A, __m512d __B) { |
| 210 | 205 | return (__m512d)((__v8du)__A | (__v8du)__B); |
| 211 | 206 | } |
| ... | ... | @@ -224,7 +219,7 @@ _mm512_maskz_or_pd(__mmask8 __U, __m512d __A, __m512d __B) { |
| 224 | 219 | (__v8df)_mm512_setzero_pd()); |
| 225 | 220 | } |
| 226 | 221 | |
| 227 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 222 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 228 | 223 | _mm512_or_ps(__m512 __A, __m512 __B) { |
| 229 | 224 | return (__m512)((__v16su)__A | (__v16su)__B); |
| 230 | 225 | } |
| ... | ... | @@ -243,7 +238,7 @@ _mm512_maskz_or_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 243 | 238 | (__v16sf)_mm512_setzero_ps()); |
| 244 | 239 | } |
| 245 | 240 | |
| 246 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 241 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 247 | 242 | _mm512_and_pd(__m512d __A, __m512d __B) { |
| 248 | 243 | return (__m512d)((__v8du)__A & (__v8du)__B); |
| 249 | 244 | } |
| ... | ... | @@ -262,7 +257,7 @@ _mm512_maskz_and_pd(__mmask8 __U, __m512d __A, __m512d __B) { |
| 262 | 257 | (__v8df)_mm512_setzero_pd()); |
| 263 | 258 | } |
| 264 | 259 | |
| 265 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 260 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 266 | 261 | _mm512_and_ps(__m512 __A, __m512 __B) { |
| 267 | 262 | return (__m512)((__v16su)__A & (__v16su)__B); |
| 268 | 263 | } |
| ... | ... | @@ -281,7 +276,7 @@ _mm512_maskz_and_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 281 | 276 | (__v16sf)_mm512_setzero_ps()); |
| 282 | 277 | } |
| 283 | 278 | |
| 284 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 279 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 285 | 280 | _mm512_andnot_pd(__m512d __A, __m512d __B) { |
| 286 | 281 | return (__m512d)(~(__v8du)__A & (__v8du)__B); |
| 287 | 282 | } |
| ... | ... | @@ -300,7 +295,7 @@ _mm512_maskz_andnot_pd(__mmask8 __U, __m512d __A, __m512d __B) { |
| 300 | 295 | (__v8df)_mm512_setzero_pd()); |
| 301 | 296 | } |
| 302 | 297 | |
| 303 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 298 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 304 | 299 | _mm512_andnot_ps(__m512 __A, __m512 __B) { |
| 305 | 300 | return (__m512)(~(__v16su)__A & (__v16su)__B); |
| 306 | 301 | } |
| ... | ... | @@ -475,21 +470,20 @@ _mm512_maskz_cvtps_epu64 (__mmask8 __U, __m256 __A) { |
| 475 | 470 | (__v8di)_mm512_setzero_si512(), \ |
| 476 | 471 | (__mmask8)(U), (int)(R))) |
| 477 | 472 | |
| 478 | ||
| 479 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 480 | _mm512_cvtepi64_pd (__m512i __A) { | |
| 473 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 474 | _mm512_cvtepi64_pd(__m512i __A) { | |
| 481 | 475 | return (__m512d)__builtin_convertvector((__v8di)__A, __v8df); |
| 482 | 476 | } |
| 483 | 477 | |
| 484 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 485 | _mm512_mask_cvtepi64_pd (__m512d __W, __mmask8 __U, __m512i __A) { | |
| 478 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 479 | _mm512_mask_cvtepi64_pd(__m512d __W, __mmask8 __U, __m512i __A) { | |
| 486 | 480 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 487 | 481 | (__v8df)_mm512_cvtepi64_pd(__A), |
| 488 | 482 | (__v8df)__W); |
| 489 | 483 | } |
| 490 | 484 | |
| 491 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 492 | _mm512_maskz_cvtepi64_pd (__mmask8 __U, __m512i __A) { | |
| 485 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 486 | _mm512_maskz_cvtepi64_pd(__mmask8 __U, __m512i __A) { | |
| 493 | 487 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 494 | 488 | (__v8df)_mm512_cvtepi64_pd(__A), |
| 495 | 489 | (__v8df)_mm512_setzero_pd()); |
| ... | ... | @@ -706,20 +700,20 @@ _mm512_maskz_cvttps_epu64 (__mmask8 __U, __m256 __A) { |
| 706 | 700 | (__v8di)_mm512_setzero_si512(), \ |
| 707 | 701 | (__mmask8)(U), (int)(R))) |
| 708 | 702 | |
| 709 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 710 | _mm512_cvtepu64_pd (__m512i __A) { | |
| 703 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 704 | _mm512_cvtepu64_pd(__m512i __A) { | |
| 711 | 705 | return (__m512d)__builtin_convertvector((__v8du)__A, __v8df); |
| 712 | 706 | } |
| 713 | 707 | |
| 714 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 715 | _mm512_mask_cvtepu64_pd (__m512d __W, __mmask8 __U, __m512i __A) { | |
| 708 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 709 | _mm512_mask_cvtepu64_pd(__m512d __W, __mmask8 __U, __m512i __A) { | |
| 716 | 710 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 717 | 711 | (__v8df)_mm512_cvtepu64_pd(__A), |
| 718 | 712 | (__v8df)__W); |
| 719 | 713 | } |
| 720 | 714 | |
| 721 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 722 | _mm512_maskz_cvtepu64_pd (__mmask8 __U, __m512i __A) { | |
| 715 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 716 | _mm512_maskz_cvtepu64_pd(__mmask8 __U, __m512i __A) { | |
| 723 | 717 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 724 | 718 | (__v8df)_mm512_cvtepu64_pd(__A), |
| 725 | 719 | (__v8df)_mm512_setzero_pd()); |
| ... | ... | @@ -1052,177 +1046,154 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) { |
| 1052 | 1046 | (__v2df)_mm_setzero_pd(), \ |
| 1053 | 1047 | (__mmask8)(U), (int)(C), (int)(R))) |
| 1054 | 1048 | |
| 1055 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS512 | |
| 1056 | _mm512_movepi32_mask (__m512i __A) | |
| 1057 | { | |
| 1049 | static __inline__ __mmask16 | |
| 1050 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_movepi32_mask(__m512i __A) { | |
| 1058 | 1051 | return (__mmask16) __builtin_ia32_cvtd2mask512 ((__v16si) __A); |
| 1059 | 1052 | } |
| 1060 | 1053 | |
| 1061 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1062 | _mm512_movm_epi32 (__mmask16 __A) | |
| 1063 | { | |
| 1054 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1055 | _mm512_movm_epi32(__mmask16 __A) { | |
| 1064 | 1056 | return (__m512i) __builtin_ia32_cvtmask2d512 (__A); |
| 1065 | 1057 | } |
| 1066 | 1058 | |
| 1067 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1068 | _mm512_movm_epi64 (__mmask8 __A) | |
| 1069 | { | |
| 1059 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1060 | _mm512_movm_epi64(__mmask8 __A) { | |
| 1070 | 1061 | return (__m512i) __builtin_ia32_cvtmask2q512 (__A); |
| 1071 | 1062 | } |
| 1072 | 1063 | |
| 1073 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS512 | |
| 1074 | _mm512_movepi64_mask (__m512i __A) | |
| 1075 | { | |
| 1064 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1065 | _mm512_movepi64_mask(__m512i __A) { | |
| 1076 | 1066 | return (__mmask8) __builtin_ia32_cvtq2mask512 ((__v8di) __A); |
| 1077 | 1067 | } |
| 1078 | 1068 | |
| 1079 | ||
| 1080 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1081 | _mm512_broadcast_f32x2 (__m128 __A) | |
| 1082 | { | |
| 1069 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1070 | _mm512_broadcast_f32x2(__m128 __A) { | |
| 1083 | 1071 | return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, |
| 1084 | 1072 | 0, 1, 0, 1, 0, 1, 0, 1, |
| 1085 | 1073 | 0, 1, 0, 1, 0, 1, 0, 1); |
| 1086 | 1074 | } |
| 1087 | 1075 | |
| 1088 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1089 | _mm512_mask_broadcast_f32x2 (__m512 __O, __mmask16 __M, __m128 __A) | |
| 1090 | { | |
| 1076 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1077 | _mm512_mask_broadcast_f32x2(__m512 __O, __mmask16 __M, __m128 __A) { | |
| 1091 | 1078 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__M, |
| 1092 | 1079 | (__v16sf)_mm512_broadcast_f32x2(__A), |
| 1093 | 1080 | (__v16sf)__O); |
| 1094 | 1081 | } |
| 1095 | 1082 | |
| 1096 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1097 | _mm512_maskz_broadcast_f32x2 (__mmask16 __M, __m128 __A) | |
| 1098 | { | |
| 1083 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1084 | _mm512_maskz_broadcast_f32x2(__mmask16 __M, __m128 __A) { | |
| 1099 | 1085 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__M, |
| 1100 | 1086 | (__v16sf)_mm512_broadcast_f32x2(__A), |
| 1101 | 1087 | (__v16sf)_mm512_setzero_ps()); |
| 1102 | 1088 | } |
| 1103 | 1089 | |
| 1104 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1105 | _mm512_broadcast_f32x8(__m256 __A) | |
| 1106 | { | |
| 1090 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1091 | _mm512_broadcast_f32x8(__m256 __A) { | |
| 1107 | 1092 | return (__m512)__builtin_shufflevector((__v8sf)__A, (__v8sf)__A, |
| 1108 | 1093 | 0, 1, 2, 3, 4, 5, 6, 7, |
| 1109 | 1094 | 0, 1, 2, 3, 4, 5, 6, 7); |
| 1110 | 1095 | } |
| 1111 | 1096 | |
| 1112 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1113 | _mm512_mask_broadcast_f32x8(__m512 __O, __mmask16 __M, __m256 __A) | |
| 1114 | { | |
| 1097 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1098 | _mm512_mask_broadcast_f32x8(__m512 __O, __mmask16 __M, __m256 __A) { | |
| 1115 | 1099 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__M, |
| 1116 | 1100 | (__v16sf)_mm512_broadcast_f32x8(__A), |
| 1117 | 1101 | (__v16sf)__O); |
| 1118 | 1102 | } |
| 1119 | 1103 | |
| 1120 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1121 | _mm512_maskz_broadcast_f32x8(__mmask16 __M, __m256 __A) | |
| 1122 | { | |
| 1104 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1105 | _mm512_maskz_broadcast_f32x8(__mmask16 __M, __m256 __A) { | |
| 1123 | 1106 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__M, |
| 1124 | 1107 | (__v16sf)_mm512_broadcast_f32x8(__A), |
| 1125 | 1108 | (__v16sf)_mm512_setzero_ps()); |
| 1126 | 1109 | } |
| 1127 | 1110 | |
| 1128 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1129 | _mm512_broadcast_f64x2(__m128d __A) | |
| 1130 | { | |
| 1111 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1112 | _mm512_broadcast_f64x2(__m128d __A) { | |
| 1131 | 1113 | return (__m512d)__builtin_shufflevector((__v2df)__A, (__v2df)__A, |
| 1132 | 1114 | 0, 1, 0, 1, 0, 1, 0, 1); |
| 1133 | 1115 | } |
| 1134 | 1116 | |
| 1135 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1136 | _mm512_mask_broadcast_f64x2(__m512d __O, __mmask8 __M, __m128d __A) | |
| 1137 | { | |
| 1117 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1118 | _mm512_mask_broadcast_f64x2(__m512d __O, __mmask8 __M, __m128d __A) { | |
| 1138 | 1119 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M, |
| 1139 | 1120 | (__v8df)_mm512_broadcast_f64x2(__A), |
| 1140 | 1121 | (__v8df)__O); |
| 1141 | 1122 | } |
| 1142 | 1123 | |
| 1143 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1144 | _mm512_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A) | |
| 1145 | { | |
| 1124 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1125 | _mm512_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A) { | |
| 1146 | 1126 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M, |
| 1147 | 1127 | (__v8df)_mm512_broadcast_f64x2(__A), |
| 1148 | 1128 | (__v8df)_mm512_setzero_pd()); |
| 1149 | 1129 | } |
| 1150 | 1130 | |
| 1151 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1152 | _mm512_broadcast_i32x2 (__m128i __A) | |
| 1153 | { | |
| 1131 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1132 | _mm512_broadcast_i32x2(__m128i __A) { | |
| 1154 | 1133 | return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, |
| 1155 | 1134 | 0, 1, 0, 1, 0, 1, 0, 1, |
| 1156 | 1135 | 0, 1, 0, 1, 0, 1, 0, 1); |
| 1157 | 1136 | } |
| 1158 | 1137 | |
| 1159 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1160 | _mm512_mask_broadcast_i32x2 (__m512i __O, __mmask16 __M, __m128i __A) | |
| 1161 | { | |
| 1138 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1139 | _mm512_mask_broadcast_i32x2(__m512i __O, __mmask16 __M, __m128i __A) { | |
| 1162 | 1140 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1163 | 1141 | (__v16si)_mm512_broadcast_i32x2(__A), |
| 1164 | 1142 | (__v16si)__O); |
| 1165 | 1143 | } |
| 1166 | 1144 | |
| 1167 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1168 | _mm512_maskz_broadcast_i32x2 (__mmask16 __M, __m128i __A) | |
| 1169 | { | |
| 1145 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1146 | _mm512_maskz_broadcast_i32x2(__mmask16 __M, __m128i __A) { | |
| 1170 | 1147 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1171 | 1148 | (__v16si)_mm512_broadcast_i32x2(__A), |
| 1172 | 1149 | (__v16si)_mm512_setzero_si512()); |
| 1173 | 1150 | } |
| 1174 | 1151 | |
| 1175 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1176 | _mm512_broadcast_i32x8(__m256i __A) | |
| 1177 | { | |
| 1152 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1153 | _mm512_broadcast_i32x8(__m256i __A) { | |
| 1178 | 1154 | return (__m512i)__builtin_shufflevector((__v8si)__A, (__v8si)__A, |
| 1179 | 1155 | 0, 1, 2, 3, 4, 5, 6, 7, |
| 1180 | 1156 | 0, 1, 2, 3, 4, 5, 6, 7); |
| 1181 | 1157 | } |
| 1182 | 1158 | |
| 1183 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1184 | _mm512_mask_broadcast_i32x8(__m512i __O, __mmask16 __M, __m256i __A) | |
| 1185 | { | |
| 1159 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1160 | _mm512_mask_broadcast_i32x8(__m512i __O, __mmask16 __M, __m256i __A) { | |
| 1186 | 1161 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1187 | 1162 | (__v16si)_mm512_broadcast_i32x8(__A), |
| 1188 | 1163 | (__v16si)__O); |
| 1189 | 1164 | } |
| 1190 | 1165 | |
| 1191 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1192 | _mm512_maskz_broadcast_i32x8(__mmask16 __M, __m256i __A) | |
| 1193 | { | |
| 1166 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1167 | _mm512_maskz_broadcast_i32x8(__mmask16 __M, __m256i __A) { | |
| 1194 | 1168 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1195 | 1169 | (__v16si)_mm512_broadcast_i32x8(__A), |
| 1196 | 1170 | (__v16si)_mm512_setzero_si512()); |
| 1197 | 1171 | } |
| 1198 | 1172 | |
| 1199 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1200 | _mm512_broadcast_i64x2(__m128i __A) | |
| 1201 | { | |
| 1173 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1174 | _mm512_broadcast_i64x2(__m128i __A) { | |
| 1202 | 1175 | return (__m512i)__builtin_shufflevector((__v2di)__A, (__v2di)__A, |
| 1203 | 1176 | 0, 1, 0, 1, 0, 1, 0, 1); |
| 1204 | 1177 | } |
| 1205 | 1178 | |
| 1206 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1207 | _mm512_mask_broadcast_i64x2(__m512i __O, __mmask8 __M, __m128i __A) | |
| 1208 | { | |
| 1179 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1180 | _mm512_mask_broadcast_i64x2(__m512i __O, __mmask8 __M, __m128i __A) { | |
| 1209 | 1181 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1210 | 1182 | (__v8di)_mm512_broadcast_i64x2(__A), |
| 1211 | 1183 | (__v8di)__O); |
| 1212 | 1184 | } |
| 1213 | 1185 | |
| 1214 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1215 | _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) | |
| 1216 | { | |
| 1186 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1187 | _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) { | |
| 1217 | 1188 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1218 | 1189 | (__v8di)_mm512_broadcast_i64x2(__A), |
| 1219 | 1190 | (__v8di)_mm512_setzero_si512()); |
| 1220 | 1191 | } |
| 1221 | 1192 | |
| 1222 | #define _mm512_extractf32x8_ps(A, imm) \ | |
| 1223 | ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \ | |
| 1224 | (__v8sf)_mm256_undefined_ps(), \ | |
| 1225 | (__mmask8)-1)) | |
| 1193 | #define _mm512_extractf32x8_ps(A, imm) \ | |
| 1194 | ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \ | |
| 1195 | (__v8sf)_mm256_setzero_ps(), \ | |
| 1196 | (__mmask8) - 1)) | |
| 1226 | 1197 | |
| 1227 | 1198 | #define _mm512_mask_extractf32x8_ps(W, U, A, imm) \ |
| 1228 | 1199 | ((__m256)__builtin_ia32_extractf32x8_mask((__v16sf)(__m512)(A), (int)(imm), \ |
| ... | ... | @@ -1234,11 +1205,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) |
| 1234 | 1205 | (__v8sf)_mm256_setzero_ps(), \ |
| 1235 | 1206 | (__mmask8)(U))) |
| 1236 | 1207 | |
| 1237 | #define _mm512_extractf64x2_pd(A, imm) \ | |
| 1238 | ((__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \ | |
| 1239 | (int)(imm), \ | |
| 1240 | (__v2df)_mm_undefined_pd(), \ | |
| 1241 | (__mmask8)-1)) | |
| 1208 | #define _mm512_extractf64x2_pd(A, imm) \ | |
| 1209 | ((__m128d)__builtin_ia32_extractf64x2_512_mask( \ | |
| 1210 | (__v8df)(__m512d)(A), (int)(imm), (__v2df)_mm_setzero_pd(), \ | |
| 1211 | (__mmask8) - 1)) | |
| 1242 | 1212 | |
| 1243 | 1213 | #define _mm512_mask_extractf64x2_pd(W, U, A, imm) \ |
| 1244 | 1214 | ((__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \ |
| ... | ... | @@ -1252,10 +1222,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) |
| 1252 | 1222 | (__v2df)_mm_setzero_pd(), \ |
| 1253 | 1223 | (__mmask8)(U))) |
| 1254 | 1224 | |
| 1255 | #define _mm512_extracti32x8_epi32(A, imm) \ | |
| 1256 | ((__m256i)__builtin_ia32_extracti32x8_mask((__v16si)(__m512i)(A), (int)(imm), \ | |
| 1257 | (__v8si)_mm256_undefined_si256(), \ | |
| 1258 | (__mmask8)-1)) | |
| 1225 | #define _mm512_extracti32x8_epi32(A, imm) \ | |
| 1226 | ((__m256i)__builtin_ia32_extracti32x8_mask( \ | |
| 1227 | (__v16si)(__m512i)(A), (int)(imm), (__v8si)_mm256_setzero_si256(), \ | |
| 1228 | (__mmask8) - 1)) | |
| 1259 | 1229 | |
| 1260 | 1230 | #define _mm512_mask_extracti32x8_epi32(W, U, A, imm) \ |
| 1261 | 1231 | ((__m256i)__builtin_ia32_extracti32x8_mask((__v16si)(__m512i)(A), (int)(imm), \ |
| ... | ... | @@ -1267,11 +1237,10 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) |
| 1267 | 1237 | (__v8si)_mm256_setzero_si256(), \ |
| 1268 | 1238 | (__mmask8)(U))) |
| 1269 | 1239 | |
| 1270 | #define _mm512_extracti64x2_epi64(A, imm) \ | |
| 1271 | ((__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \ | |
| 1272 | (int)(imm), \ | |
| 1273 | (__v2di)_mm_undefined_si128(), \ | |
| 1274 | (__mmask8)-1)) | |
| 1240 | #define _mm512_extracti64x2_epi64(A, imm) \ | |
| 1241 | ((__m128i)__builtin_ia32_extracti64x2_512_mask( \ | |
| 1242 | (__v8di)(__m512i)(A), (int)(imm), (__v2di)_mm_setzero_si128(), \ | |
| 1243 | (__mmask8) - 1)) | |
| 1275 | 1244 | |
| 1276 | 1245 | #define _mm512_mask_extracti64x2_epi64(W, U, A, imm) \ |
| 1277 | 1246 | ((__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \ |
| ... | ... | @@ -1375,5 +1344,7 @@ _mm512_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) |
| 1375 | 1344 | |
| 1376 | 1345 | #undef __DEFAULT_FN_ATTRS512 |
| 1377 | 1346 | #undef __DEFAULT_FN_ATTRS |
| 1347 | #undef __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1348 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1378 | 1349 | |
| 1379 | 1350 | #endif |
lib/include/avx512fintrin.h+1015-1424| ... | ... | @@ -167,22 +167,23 @@ typedef enum |
| 167 | 167 | } _MM_MANTISSA_SIGN_ENUM; |
| 168 | 168 | |
| 169 | 169 | /* Define the default attributes for the functions in this file. */ |
| 170 | #define __DEFAULT_FN_ATTRS512 __attribute__((__always_inline__, __nodebug__, __target__("avx512f,evex512"), __min_vector_width__(512))) | |
| 170 | #define __DEFAULT_FN_ATTRS512 \ | |
| 171 | __attribute__((__always_inline__, __nodebug__, __target__("avx512f"), \ | |
| 172 | __min_vector_width__(512))) | |
| 171 | 173 | #define __DEFAULT_FN_ATTRS128 \ |
| 172 | __attribute__((__always_inline__, __nodebug__, \ | |
| 173 | __target__("avx512f,no-evex512"), __min_vector_width__(128))) | |
| 174 | __attribute__((__always_inline__, __nodebug__, __target__("avx512f"), \ | |
| 175 | __min_vector_width__(128))) | |
| 174 | 176 | #define __DEFAULT_FN_ATTRS \ |
| 175 | __attribute__((__always_inline__, __nodebug__, \ | |
| 176 | __target__("avx512f,no-evex512"))) | |
| 177 | __attribute__((__always_inline__, __nodebug__, __target__("avx512f"))) | |
| 177 | 178 | |
| 178 | 179 | #if defined(__cplusplus) && (__cplusplus >= 201103L) |
| 179 | 180 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr |
| 180 | 181 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr |
| 181 | 182 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr |
| 182 | 183 | #else |
| 183 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 184 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 184 | 185 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 |
| 185 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 186 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 186 | 187 | #endif |
| 187 | 188 | |
| 188 | 189 | /* Create vectors with repeated elements */ |
| ... | ... | @@ -206,9 +207,7 @@ _mm512_undefined(void) |
| 206 | 207 | return (__m512)__builtin_ia32_undef512(); |
| 207 | 208 | } |
| 208 | 209 | |
| 209 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 210 | _mm512_undefined_ps(void) | |
| 211 | { | |
| 210 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_undefined_ps(void) { | |
| 212 | 211 | return (__m512)__builtin_ia32_undef512(); |
| 213 | 212 | } |
| 214 | 213 | |
| ... | ... | @@ -218,48 +217,40 @@ _mm512_undefined_epi32(void) |
| 218 | 217 | return (__m512i)__builtin_ia32_undef512(); |
| 219 | 218 | } |
| 220 | 219 | |
| 221 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 222 | _mm512_broadcastd_epi32 (__m128i __A) | |
| 223 | { | |
| 220 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 221 | _mm512_broadcastd_epi32(__m128i __A) { | |
| 224 | 222 | return (__m512i)__builtin_shufflevector((__v4si) __A, (__v4si) __A, |
| 225 | 223 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 226 | 224 | } |
| 227 | 225 | |
| 228 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 229 | _mm512_mask_broadcastd_epi32 (__m512i __O, __mmask16 __M, __m128i __A) | |
| 230 | { | |
| 226 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 227 | _mm512_mask_broadcastd_epi32(__m512i __O, __mmask16 __M, __m128i __A) { | |
| 231 | 228 | return (__m512i)__builtin_ia32_selectd_512(__M, |
| 232 | 229 | (__v16si) _mm512_broadcastd_epi32(__A), |
| 233 | 230 | (__v16si) __O); |
| 234 | 231 | } |
| 235 | 232 | |
| 236 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 237 | _mm512_maskz_broadcastd_epi32 (__mmask16 __M, __m128i __A) | |
| 238 | { | |
| 233 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 234 | _mm512_maskz_broadcastd_epi32(__mmask16 __M, __m128i __A) { | |
| 239 | 235 | return (__m512i)__builtin_ia32_selectd_512(__M, |
| 240 | 236 | (__v16si) _mm512_broadcastd_epi32(__A), |
| 241 | 237 | (__v16si) _mm512_setzero_si512()); |
| 242 | 238 | } |
| 243 | 239 | |
| 244 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 245 | _mm512_broadcastq_epi64 (__m128i __A) | |
| 246 | { | |
| 240 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 241 | _mm512_broadcastq_epi64(__m128i __A) { | |
| 247 | 242 | return (__m512i)__builtin_shufflevector((__v2di) __A, (__v2di) __A, |
| 248 | 243 | 0, 0, 0, 0, 0, 0, 0, 0); |
| 249 | 244 | } |
| 250 | 245 | |
| 251 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 252 | _mm512_mask_broadcastq_epi64 (__m512i __O, __mmask8 __M, __m128i __A) | |
| 253 | { | |
| 254 | return (__m512i)__builtin_ia32_selectq_512(__M, | |
| 255 | (__v8di) _mm512_broadcastq_epi64(__A), | |
| 256 | (__v8di) __O); | |
| 257 | ||
| 246 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 247 | _mm512_mask_broadcastq_epi64(__m512i __O, __mmask8 __M, __m128i __A) { | |
| 248 | return (__m512i)__builtin_ia32_selectq_512( | |
| 249 | __M, (__v8di)_mm512_broadcastq_epi64(__A), (__v8di)__O); | |
| 258 | 250 | } |
| 259 | 251 | |
| 260 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 261 | _mm512_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A) | |
| 262 | { | |
| 252 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 253 | _mm512_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) { | |
| 263 | 254 | return (__m512i)__builtin_ia32_selectq_512(__M, |
| 264 | 255 | (__v8di) _mm512_broadcastq_epi64(__A), |
| 265 | 256 | (__v8di) _mm512_setzero_si512()); |
| ... | ... | @@ -277,20 +268,20 @@ _mm512_setzero_pd(void) { |
| 277 | 268 | return __extension__(__m512d){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}; |
| 278 | 269 | } |
| 279 | 270 | |
| 280 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 271 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 281 | 272 | _mm512_set1_ps(float __w) |
| 282 | 273 | { |
| 283 | 274 | return __extension__ (__m512){ __w, __w, __w, __w, __w, __w, __w, __w, |
| 284 | 275 | __w, __w, __w, __w, __w, __w, __w, __w }; |
| 285 | 276 | } |
| 286 | 277 | |
| 287 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 278 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 288 | 279 | _mm512_set1_pd(double __w) |
| 289 | 280 | { |
| 290 | 281 | return __extension__ (__m512d){ __w, __w, __w, __w, __w, __w, __w, __w }; |
| 291 | 282 | } |
| 292 | 283 | |
| 293 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 284 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 294 | 285 | _mm512_set1_epi8(char __w) |
| 295 | 286 | { |
| 296 | 287 | return __extension__ (__m512i)(__v64qi){ |
| ... | ... | @@ -304,7 +295,7 @@ _mm512_set1_epi8(char __w) |
| 304 | 295 | __w, __w, __w, __w, __w, __w, __w, __w }; |
| 305 | 296 | } |
| 306 | 297 | |
| 307 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 298 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 308 | 299 | _mm512_set1_epi16(short __w) |
| 309 | 300 | { |
| 310 | 301 | return __extension__ (__m512i)(__v32hi){ |
| ... | ... | @@ -314,7 +305,7 @@ _mm512_set1_epi16(short __w) |
| 314 | 305 | __w, __w, __w, __w, __w, __w, __w, __w }; |
| 315 | 306 | } |
| 316 | 307 | |
| 317 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 308 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 318 | 309 | _mm512_set1_epi32(int __s) |
| 319 | 310 | { |
| 320 | 311 | return __extension__ (__m512i)(__v16si){ |
| ... | ... | @@ -322,81 +313,80 @@ _mm512_set1_epi32(int __s) |
| 322 | 313 | __s, __s, __s, __s, __s, __s, __s, __s }; |
| 323 | 314 | } |
| 324 | 315 | |
| 325 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 326 | _mm512_maskz_set1_epi32(__mmask16 __M, int __A) | |
| 327 | { | |
| 316 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 317 | _mm512_maskz_set1_epi32(__mmask16 __M, int __A) { | |
| 328 | 318 | return (__m512i)__builtin_ia32_selectd_512(__M, |
| 329 | 319 | (__v16si)_mm512_set1_epi32(__A), |
| 330 | 320 | (__v16si)_mm512_setzero_si512()); |
| 331 | 321 | } |
| 332 | 322 | |
| 333 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 323 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 334 | 324 | _mm512_set1_epi64(long long __d) |
| 335 | 325 | { |
| 336 | 326 | return __extension__(__m512i)(__v8di){ __d, __d, __d, __d, __d, __d, __d, __d }; |
| 337 | 327 | } |
| 338 | 328 | |
| 339 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 340 | _mm512_maskz_set1_epi64(__mmask8 __M, long long __A) | |
| 341 | { | |
| 329 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 330 | _mm512_maskz_set1_epi64(__mmask8 __M, long long __A) { | |
| 342 | 331 | return (__m512i)__builtin_ia32_selectq_512(__M, |
| 343 | 332 | (__v8di)_mm512_set1_epi64(__A), |
| 344 | 333 | (__v8di)_mm512_setzero_si512()); |
| 345 | 334 | } |
| 346 | 335 | |
| 347 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 348 | _mm512_broadcastss_ps(__m128 __A) | |
| 349 | { | |
| 336 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 337 | _mm512_broadcastss_ps(__m128 __A) { | |
| 350 | 338 | return (__m512)__builtin_shufflevector((__v4sf) __A, (__v4sf) __A, |
| 351 | 339 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); |
| 352 | 340 | } |
| 353 | 341 | |
| 354 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 355 | _mm512_set4_epi32 (int __A, int __B, int __C, int __D) | |
| 356 | { | |
| 342 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 343 | _mm512_set4_epi32(int __A, int __B, int __C, int __D) { | |
| 357 | 344 | return __extension__ (__m512i)(__v16si) |
| 358 | 345 | { __D, __C, __B, __A, __D, __C, __B, __A, |
| 359 | 346 | __D, __C, __B, __A, __D, __C, __B, __A }; |
| 360 | 347 | } |
| 361 | 348 | |
| 362 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 363 | _mm512_set4_epi64 (long long __A, long long __B, long long __C, | |
| 364 | long long __D) | |
| 365 | { | |
| 349 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 350 | _mm512_set4_epi64(long long __A, long long __B, long long __C, long long __D) { | |
| 366 | 351 | return __extension__ (__m512i) (__v8di) |
| 367 | 352 | { __D, __C, __B, __A, __D, __C, __B, __A }; |
| 368 | 353 | } |
| 369 | 354 | |
| 370 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 371 | _mm512_set4_pd (double __A, double __B, double __C, double __D) | |
| 372 | { | |
| 355 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 356 | _mm512_set4_pd(double __A, double __B, double __C, double __D) { | |
| 373 | 357 | return __extension__ (__m512d) |
| 374 | 358 | { __D, __C, __B, __A, __D, __C, __B, __A }; |
| 375 | 359 | } |
| 376 | 360 | |
| 377 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 378 | _mm512_set4_ps (float __A, float __B, float __C, float __D) | |
| 379 | { | |
| 361 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 362 | _mm512_set4_ps(float __A, float __B, float __C, float __D) { | |
| 380 | 363 | return __extension__ (__m512) |
| 381 | 364 | { __D, __C, __B, __A, __D, __C, __B, __A, |
| 382 | 365 | __D, __C, __B, __A, __D, __C, __B, __A }; |
| 383 | 366 | } |
| 384 | 367 | |
| 385 | #define _mm512_setr4_epi32(e0,e1,e2,e3) \ | |
| 386 | _mm512_set4_epi32((e3),(e2),(e1),(e0)) | |
| 368 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 369 | _mm512_setr4_epi32(int e0, int e1, int e2, int e3) { | |
| 370 | return _mm512_set4_epi32(e3, e2, e1, e0); | |
| 371 | } | |
| 387 | 372 | |
| 388 | #define _mm512_setr4_epi64(e0,e1,e2,e3) \ | |
| 389 | _mm512_set4_epi64((e3),(e2),(e1),(e0)) | |
| 373 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 374 | _mm512_setr4_epi64(long long e0, long long e1, long long e2, long long e3) { | |
| 375 | return _mm512_set4_epi64(e3, e2, e1, e0); | |
| 376 | } | |
| 390 | 377 | |
| 391 | #define _mm512_setr4_pd(e0,e1,e2,e3) \ | |
| 392 | _mm512_set4_pd((e3),(e2),(e1),(e0)) | |
| 378 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 379 | _mm512_setr4_pd(double e0, double e1, double e2, double e3) { | |
| 380 | return _mm512_set4_pd(e3, e2, e1, e0); | |
| 381 | } | |
| 393 | 382 | |
| 394 | #define _mm512_setr4_ps(e0,e1,e2,e3) \ | |
| 395 | _mm512_set4_ps((e3),(e2),(e1),(e0)) | |
| 383 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 384 | _mm512_setr4_ps(float e0, float e1, float e2, float e3) { | |
| 385 | return _mm512_set4_ps(e3, e2, e1, e0); | |
| 386 | } | |
| 396 | 387 | |
| 397 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 398 | _mm512_broadcastsd_pd(__m128d __A) | |
| 399 | { | |
| 388 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 389 | _mm512_broadcastsd_pd(__m128d __A) { | |
| 400 | 390 | return (__m512d)__builtin_shufflevector((__v2df) __A, (__v2df) __A, |
| 401 | 391 | 0, 0, 0, 0, 0, 0, 0, 0); |
| 402 | 392 | } |
| ... | ... | @@ -417,37 +407,36 @@ _mm512_castps256_ps512(__m256 __a) |
| 417 | 407 | 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); |
| 418 | 408 | } |
| 419 | 409 | |
| 420 | static __inline __m128d __DEFAULT_FN_ATTRS512 | |
| 410 | static __inline __m128d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 421 | 411 | _mm512_castpd512_pd128(__m512d __a) |
| 422 | 412 | { |
| 423 | 413 | return __builtin_shufflevector(__a, __a, 0, 1); |
| 424 | 414 | } |
| 425 | 415 | |
| 426 | static __inline __m256d __DEFAULT_FN_ATTRS512 | |
| 416 | static __inline __m256d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 427 | 417 | _mm512_castpd512_pd256 (__m512d __A) |
| 428 | 418 | { |
| 429 | 419 | return __builtin_shufflevector(__A, __A, 0, 1, 2, 3); |
| 430 | 420 | } |
| 431 | 421 | |
| 432 | static __inline __m128 __DEFAULT_FN_ATTRS512 | |
| 422 | static __inline __m128 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 433 | 423 | _mm512_castps512_ps128(__m512 __a) |
| 434 | 424 | { |
| 435 | 425 | return __builtin_shufflevector(__a, __a, 0, 1, 2, 3); |
| 436 | 426 | } |
| 437 | 427 | |
| 438 | static __inline __m256 __DEFAULT_FN_ATTRS512 | |
| 439 | _mm512_castps512_ps256 (__m512 __A) | |
| 440 | { | |
| 428 | static __inline __m256 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 429 | _mm512_castps512_ps256(__m512 __A) { | |
| 441 | 430 | return __builtin_shufflevector(__A, __A, 0, 1, 2, 3, 4, 5, 6, 7); |
| 442 | 431 | } |
| 443 | 432 | |
| 444 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 433 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 445 | 434 | _mm512_castpd_ps (__m512d __A) |
| 446 | 435 | { |
| 447 | 436 | return (__m512) (__A); |
| 448 | 437 | } |
| 449 | 438 | |
| 450 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 439 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 451 | 440 | _mm512_castpd_si512 (__m512d __A) |
| 452 | 441 | { |
| 453 | 442 | return (__m512i) (__A); |
| ... | ... | @@ -462,13 +451,13 @@ _mm512_castpd128_pd512 (__m128d __A) |
| 462 | 451 | __B, 0, 1, 2, 3, 4, 5, 6, 7); |
| 463 | 452 | } |
| 464 | 453 | |
| 465 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 454 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 466 | 455 | _mm512_castps_pd (__m512 __A) |
| 467 | 456 | { |
| 468 | 457 | return (__m512d) (__A); |
| 469 | 458 | } |
| 470 | 459 | |
| 471 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 460 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 472 | 461 | _mm512_castps_si512 (__m512 __A) |
| 473 | 462 | { |
| 474 | 463 | return (__m512i) (__A); |
| ... | ... | @@ -498,39 +487,36 @@ _mm512_castsi256_si512 (__m256i __A) |
| 498 | 487 | return __builtin_shufflevector( __A, __builtin_nondeterministic_value(__A), 0, 1, 2, 3, 4, 5, 6, 7); |
| 499 | 488 | } |
| 500 | 489 | |
| 501 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 490 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 502 | 491 | _mm512_castsi512_ps (__m512i __A) |
| 503 | 492 | { |
| 504 | 493 | return (__m512) (__A); |
| 505 | 494 | } |
| 506 | 495 | |
| 507 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 496 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 508 | 497 | _mm512_castsi512_pd (__m512i __A) |
| 509 | 498 | { |
| 510 | 499 | return (__m512d) (__A); |
| 511 | 500 | } |
| 512 | 501 | |
| 513 | static __inline __m128i __DEFAULT_FN_ATTRS512 | |
| 502 | static __inline __m128i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 514 | 503 | _mm512_castsi512_si128 (__m512i __A) |
| 515 | 504 | { |
| 516 | 505 | return (__m128i)__builtin_shufflevector(__A, __A , 0, 1); |
| 517 | 506 | } |
| 518 | 507 | |
| 519 | static __inline __m256i __DEFAULT_FN_ATTRS512 | |
| 520 | _mm512_castsi512_si256 (__m512i __A) | |
| 521 | { | |
| 508 | static __inline __m256i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 509 | _mm512_castsi512_si256(__m512i __A) { | |
| 522 | 510 | return (__m256i)__builtin_shufflevector(__A, __A , 0, 1, 2, 3); |
| 523 | 511 | } |
| 524 | 512 | |
| 525 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 526 | _mm512_int2mask(int __a) | |
| 527 | { | |
| 513 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 514 | _mm512_int2mask(int __a) { | |
| 528 | 515 | return (__mmask16)__a; |
| 529 | 516 | } |
| 530 | 517 | |
| 531 | static __inline__ int __DEFAULT_FN_ATTRS | |
| 532 | _mm512_mask2int(__mmask16 __a) | |
| 533 | { | |
| 518 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 519 | _mm512_mask2int(__mmask16 __a) { | |
| 534 | 520 | return (int)__a; |
| 535 | 521 | } |
| 536 | 522 | |
| ... | ... | @@ -547,9 +533,8 @@ _mm512_mask2int(__mmask16 __a) |
| 547 | 533 | /// A 128-bit vector of [2 x double]. |
| 548 | 534 | /// \returns A 512-bit floating-point vector of [8 x double]. The lower 128 bits |
| 549 | 535 | /// contain the value of the parameter. The upper 384 bits are set to zero. |
| 550 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 551 | _mm512_zextpd128_pd512(__m128d __a) | |
| 552 | { | |
| 536 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 537 | _mm512_zextpd128_pd512(__m128d __a) { | |
| 553 | 538 | return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3, 2, 3, 2, 3); |
| 554 | 539 | } |
| 555 | 540 | |
| ... | ... | @@ -566,9 +551,8 @@ _mm512_zextpd128_pd512(__m128d __a) |
| 566 | 551 | /// A 256-bit vector of [4 x double]. |
| 567 | 552 | /// \returns A 512-bit floating-point vector of [8 x double]. The lower 256 bits |
| 568 | 553 | /// contain the value of the parameter. The upper 256 bits are set to zero. |
| 569 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 570 | _mm512_zextpd256_pd512(__m256d __a) | |
| 571 | { | |
| 554 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 555 | _mm512_zextpd256_pd512(__m256d __a) { | |
| 572 | 556 | return __builtin_shufflevector((__v4df)__a, (__v4df)_mm256_setzero_pd(), 0, 1, 2, 3, 4, 5, 6, 7); |
| 573 | 557 | } |
| 574 | 558 | |
| ... | ... | @@ -584,9 +568,8 @@ _mm512_zextpd256_pd512(__m256d __a) |
| 584 | 568 | /// A 128-bit vector of [4 x float]. |
| 585 | 569 | /// \returns A 512-bit floating-point vector of [16 x float]. The lower 128 bits |
| 586 | 570 | /// contain the value of the parameter. The upper 384 bits are set to zero. |
| 587 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 588 | _mm512_zextps128_ps512(__m128 __a) | |
| 589 | { | |
| 571 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 572 | _mm512_zextps128_ps512(__m128 __a) { | |
| 590 | 573 | return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 4, 5, 6, 7, 4, 5, 6, 7); |
| 591 | 574 | } |
| 592 | 575 | |
| ... | ... | @@ -602,9 +585,8 @@ _mm512_zextps128_ps512(__m128 __a) |
| 602 | 585 | /// A 256-bit vector of [8 x float]. |
| 603 | 586 | /// \returns A 512-bit floating-point vector of [16 x float]. The lower 256 bits |
| 604 | 587 | /// contain the value of the parameter. The upper 256 bits are set to zero. |
| 605 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 606 | _mm512_zextps256_ps512(__m256 __a) | |
| 607 | { | |
| 588 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 589 | _mm512_zextps256_ps512(__m256 __a) { | |
| 608 | 590 | return __builtin_shufflevector((__v8sf)__a, (__v8sf)_mm256_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); |
| 609 | 591 | } |
| 610 | 592 | |
| ... | ... | @@ -620,9 +602,8 @@ _mm512_zextps256_ps512(__m256 __a) |
| 620 | 602 | /// A 128-bit integer vector. |
| 621 | 603 | /// \returns A 512-bit integer vector. The lower 128 bits contain the value of |
| 622 | 604 | /// the parameter. The upper 384 bits are set to zero. |
| 623 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 624 | _mm512_zextsi128_si512(__m128i __a) | |
| 625 | { | |
| 605 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 606 | _mm512_zextsi128_si512(__m128i __a) { | |
| 626 | 607 | return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3, 2, 3, 2, 3); |
| 627 | 608 | } |
| 628 | 609 | |
| ... | ... | @@ -638,22 +619,20 @@ _mm512_zextsi128_si512(__m128i __a) |
| 638 | 619 | /// A 256-bit integer vector. |
| 639 | 620 | /// \returns A 512-bit integer vector. The lower 256 bits contain the value of |
| 640 | 621 | /// the parameter. The upper 256 bits are set to zero. |
| 641 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 642 | _mm512_zextsi256_si512(__m256i __a) | |
| 643 | { | |
| 622 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 623 | _mm512_zextsi256_si512(__m256i __a) { | |
| 644 | 624 | return __builtin_shufflevector((__v4di)__a, (__v4di)_mm256_setzero_si256(), 0, 1, 2, 3, 4, 5, 6, 7); |
| 645 | 625 | } |
| 646 | 626 | |
| 647 | 627 | /* Bitwise operators */ |
| 648 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 628 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 649 | 629 | _mm512_and_epi32(__m512i __a, __m512i __b) |
| 650 | 630 | { |
| 651 | 631 | return (__m512i)((__v16su)__a & (__v16su)__b); |
| 652 | 632 | } |
| 653 | 633 | |
| 654 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 655 | _mm512_mask_and_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b) | |
| 656 | { | |
| 634 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 635 | _mm512_mask_and_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b) { | |
| 657 | 636 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k, |
| 658 | 637 | (__v16si) _mm512_and_epi32(__a, __b), |
| 659 | 638 | (__v16si) __src); |
| ... | ... | @@ -666,18 +645,16 @@ _mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b) |
| 666 | 645 | __k, __a, __b); |
| 667 | 646 | } |
| 668 | 647 | |
| 669 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 648 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 670 | 649 | _mm512_and_epi64(__m512i __a, __m512i __b) |
| 671 | 650 | { |
| 672 | 651 | return (__m512i)((__v8du)__a & (__v8du)__b); |
| 673 | 652 | } |
| 674 | 653 | |
| 675 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 676 | _mm512_mask_and_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b) | |
| 677 | { | |
| 678 | return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __k, | |
| 679 | (__v8di) _mm512_and_epi64(__a, __b), | |
| 680 | (__v8di) __src); | |
| 654 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 655 | _mm512_mask_and_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b) { | |
| 656 | return (__m512i)__builtin_ia32_selectq_512( | |
| 657 | (__mmask8)__k, (__v8di)_mm512_and_epi64(__a, __b), (__v8di)__src); | |
| 681 | 658 | } |
| 682 | 659 | |
| 683 | 660 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 |
| ... | ... | @@ -687,13 +664,13 @@ _mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b) |
| 687 | 664 | __k, __a, __b); |
| 688 | 665 | } |
| 689 | 666 | |
| 690 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 667 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 691 | 668 | _mm512_andnot_si512 (__m512i __A, __m512i __B) |
| 692 | 669 | { |
| 693 | 670 | return (__m512i)(~(__v8du)__A & (__v8du)__B); |
| 694 | 671 | } |
| 695 | 672 | |
| 696 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 673 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 697 | 674 | _mm512_andnot_epi32 (__m512i __A, __m512i __B) |
| 698 | 675 | { |
| 699 | 676 | return (__m512i)(~(__v16su)__A & (__v16su)__B); |
| ... | ... | @@ -714,7 +691,7 @@ _mm512_maskz_andnot_epi32(__mmask16 __U, __m512i __A, __m512i __B) |
| 714 | 691 | __U, __A, __B); |
| 715 | 692 | } |
| 716 | 693 | |
| 717 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 694 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 718 | 695 | _mm512_andnot_epi64(__m512i __A, __m512i __B) |
| 719 | 696 | { |
| 720 | 697 | return (__m512i)(~(__v8du)__A & (__v8du)__B); |
| ... | ... | @@ -735,7 +712,7 @@ _mm512_maskz_andnot_epi64(__mmask8 __U, __m512i __A, __m512i __B) |
| 735 | 712 | __U, __A, __B); |
| 736 | 713 | } |
| 737 | 714 | |
| 738 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 715 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 739 | 716 | _mm512_or_epi32(__m512i __a, __m512i __b) |
| 740 | 717 | { |
| 741 | 718 | return (__m512i)((__v16su)__a | (__v16su)__b); |
| ... | ... | @@ -755,7 +732,7 @@ _mm512_maskz_or_epi32(__mmask16 __k, __m512i __a, __m512i __b) |
| 755 | 732 | return (__m512i)_mm512_mask_or_epi32(_mm512_setzero_si512(), __k, __a, __b); |
| 756 | 733 | } |
| 757 | 734 | |
| 758 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 735 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 759 | 736 | _mm512_or_epi64(__m512i __a, __m512i __b) |
| 760 | 737 | { |
| 761 | 738 | return (__m512i)((__v8du)__a | (__v8du)__b); |
| ... | ... | @@ -775,7 +752,7 @@ _mm512_maskz_or_epi64(__mmask8 __k, __m512i __a, __m512i __b) |
| 775 | 752 | return (__m512i)_mm512_mask_or_epi64(_mm512_setzero_si512(), __k, __a, __b); |
| 776 | 753 | } |
| 777 | 754 | |
| 778 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 755 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 779 | 756 | _mm512_xor_epi32(__m512i __a, __m512i __b) |
| 780 | 757 | { |
| 781 | 758 | return (__m512i)((__v16su)__a ^ (__v16su)__b); |
| ... | ... | @@ -795,7 +772,7 @@ _mm512_maskz_xor_epi32(__mmask16 __k, __m512i __a, __m512i __b) |
| 795 | 772 | return (__m512i)_mm512_mask_xor_epi32(_mm512_setzero_si512(), __k, __a, __b); |
| 796 | 773 | } |
| 797 | 774 | |
| 798 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 775 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 799 | 776 | _mm512_xor_epi64(__m512i __a, __m512i __b) |
| 800 | 777 | { |
| 801 | 778 | return (__m512i)((__v8du)__a ^ (__v8du)__b); |
| ... | ... | @@ -815,19 +792,19 @@ _mm512_maskz_xor_epi64(__mmask8 __k, __m512i __a, __m512i __b) |
| 815 | 792 | return (__m512i)_mm512_mask_xor_epi64(_mm512_setzero_si512(), __k, __a, __b); |
| 816 | 793 | } |
| 817 | 794 | |
| 818 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 795 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 819 | 796 | _mm512_and_si512(__m512i __a, __m512i __b) |
| 820 | 797 | { |
| 821 | 798 | return (__m512i)((__v8du)__a & (__v8du)__b); |
| 822 | 799 | } |
| 823 | 800 | |
| 824 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 801 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 825 | 802 | _mm512_or_si512(__m512i __a, __m512i __b) |
| 826 | 803 | { |
| 827 | 804 | return (__m512i)((__v8du)__a | (__v8du)__b); |
| 828 | 805 | } |
| 829 | 806 | |
| 830 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 807 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 831 | 808 | _mm512_xor_si512(__m512i __a, __m512i __b) |
| 832 | 809 | { |
| 833 | 810 | return (__m512i)((__v8du)__a ^ (__v8du)__b); |
| ... | ... | @@ -835,125 +812,107 @@ _mm512_xor_si512(__m512i __a, __m512i __b) |
| 835 | 812 | |
| 836 | 813 | /* Arithmetic */ |
| 837 | 814 | |
| 838 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 839 | _mm512_add_pd(__m512d __a, __m512d __b) | |
| 840 | { | |
| 815 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 816 | _mm512_add_pd(__m512d __a, __m512d __b) { | |
| 841 | 817 | return (__m512d)((__v8df)__a + (__v8df)__b); |
| 842 | 818 | } |
| 843 | 819 | |
| 844 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 845 | _mm512_add_ps(__m512 __a, __m512 __b) | |
| 846 | { | |
| 820 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 821 | _mm512_add_ps(__m512 __a, __m512 __b) { | |
| 847 | 822 | return (__m512)((__v16sf)__a + (__v16sf)__b); |
| 848 | 823 | } |
| 849 | 824 | |
| 850 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 851 | _mm512_mul_pd(__m512d __a, __m512d __b) | |
| 852 | { | |
| 825 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 826 | _mm512_mul_pd(__m512d __a, __m512d __b) { | |
| 853 | 827 | return (__m512d)((__v8df)__a * (__v8df)__b); |
| 854 | 828 | } |
| 855 | 829 | |
| 856 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 857 | _mm512_mul_ps(__m512 __a, __m512 __b) | |
| 858 | { | |
| 830 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 831 | _mm512_mul_ps(__m512 __a, __m512 __b) { | |
| 859 | 832 | return (__m512)((__v16sf)__a * (__v16sf)__b); |
| 860 | 833 | } |
| 861 | 834 | |
| 862 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 863 | _mm512_sub_pd(__m512d __a, __m512d __b) | |
| 864 | { | |
| 835 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 836 | _mm512_sub_pd(__m512d __a, __m512d __b) { | |
| 865 | 837 | return (__m512d)((__v8df)__a - (__v8df)__b); |
| 866 | 838 | } |
| 867 | 839 | |
| 868 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 869 | _mm512_sub_ps(__m512 __a, __m512 __b) | |
| 870 | { | |
| 840 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 841 | _mm512_sub_ps(__m512 __a, __m512 __b) { | |
| 871 | 842 | return (__m512)((__v16sf)__a - (__v16sf)__b); |
| 872 | 843 | } |
| 873 | 844 | |
| 874 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 875 | _mm512_add_epi64 (__m512i __A, __m512i __B) | |
| 876 | { | |
| 845 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 846 | _mm512_add_epi64(__m512i __A, __m512i __B) { | |
| 877 | 847 | return (__m512i) ((__v8du) __A + (__v8du) __B); |
| 878 | 848 | } |
| 879 | 849 | |
| 880 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 881 | _mm512_mask_add_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) | |
| 882 | { | |
| 850 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 851 | _mm512_mask_add_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { | |
| 883 | 852 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 884 | 853 | (__v8di)_mm512_add_epi64(__A, __B), |
| 885 | 854 | (__v8di)__W); |
| 886 | 855 | } |
| 887 | 856 | |
| 888 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 889 | _mm512_maskz_add_epi64(__mmask8 __U, __m512i __A, __m512i __B) | |
| 890 | { | |
| 857 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 858 | _mm512_maskz_add_epi64(__mmask8 __U, __m512i __A, __m512i __B) { | |
| 891 | 859 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 892 | 860 | (__v8di)_mm512_add_epi64(__A, __B), |
| 893 | 861 | (__v8di)_mm512_setzero_si512()); |
| 894 | 862 | } |
| 895 | 863 | |
| 896 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 897 | _mm512_sub_epi64 (__m512i __A, __m512i __B) | |
| 898 | { | |
| 864 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 865 | _mm512_sub_epi64(__m512i __A, __m512i __B) { | |
| 899 | 866 | return (__m512i) ((__v8du) __A - (__v8du) __B); |
| 900 | 867 | } |
| 901 | 868 | |
| 902 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 903 | _mm512_mask_sub_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) | |
| 904 | { | |
| 869 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 870 | _mm512_mask_sub_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { | |
| 905 | 871 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 906 | 872 | (__v8di)_mm512_sub_epi64(__A, __B), |
| 907 | 873 | (__v8di)__W); |
| 908 | 874 | } |
| 909 | 875 | |
| 910 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 911 | _mm512_maskz_sub_epi64(__mmask8 __U, __m512i __A, __m512i __B) | |
| 912 | { | |
| 876 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 877 | _mm512_maskz_sub_epi64(__mmask8 __U, __m512i __A, __m512i __B) { | |
| 913 | 878 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 914 | 879 | (__v8di)_mm512_sub_epi64(__A, __B), |
| 915 | 880 | (__v8di)_mm512_setzero_si512()); |
| 916 | 881 | } |
| 917 | 882 | |
| 918 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 919 | _mm512_add_epi32 (__m512i __A, __m512i __B) | |
| 920 | { | |
| 883 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 884 | _mm512_add_epi32(__m512i __A, __m512i __B) { | |
| 921 | 885 | return (__m512i) ((__v16su) __A + (__v16su) __B); |
| 922 | 886 | } |
| 923 | 887 | |
| 924 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 925 | _mm512_mask_add_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) | |
| 926 | { | |
| 888 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 889 | _mm512_mask_add_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) { | |
| 927 | 890 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 928 | 891 | (__v16si)_mm512_add_epi32(__A, __B), |
| 929 | 892 | (__v16si)__W); |
| 930 | 893 | } |
| 931 | 894 | |
| 932 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 933 | _mm512_maskz_add_epi32 (__mmask16 __U, __m512i __A, __m512i __B) | |
| 934 | { | |
| 895 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 896 | _mm512_maskz_add_epi32(__mmask16 __U, __m512i __A, __m512i __B) { | |
| 935 | 897 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 936 | 898 | (__v16si)_mm512_add_epi32(__A, __B), |
| 937 | 899 | (__v16si)_mm512_setzero_si512()); |
| 938 | 900 | } |
| 939 | 901 | |
| 940 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 941 | _mm512_sub_epi32 (__m512i __A, __m512i __B) | |
| 942 | { | |
| 902 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 903 | _mm512_sub_epi32(__m512i __A, __m512i __B) { | |
| 943 | 904 | return (__m512i) ((__v16su) __A - (__v16su) __B); |
| 944 | 905 | } |
| 945 | 906 | |
| 946 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 947 | _mm512_mask_sub_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) | |
| 948 | { | |
| 907 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 908 | _mm512_mask_sub_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) { | |
| 949 | 909 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 950 | 910 | (__v16si)_mm512_sub_epi32(__A, __B), |
| 951 | 911 | (__v16si)__W); |
| 952 | 912 | } |
| 953 | 913 | |
| 954 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 955 | _mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B) | |
| 956 | { | |
| 914 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 915 | _mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B) { | |
| 957 | 916 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 958 | 917 | (__v16si)_mm512_sub_epi32(__A, __B), |
| 959 | 918 | (__v16si)_mm512_setzero_si512()); |
| ... | ... | @@ -973,24 +932,21 @@ _mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B) |
| 973 | 932 | (__v8df)_mm512_max_round_pd((A), (B), (R)), \ |
| 974 | 933 | (__v8df)_mm512_setzero_pd())) |
| 975 | 934 | |
| 976 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 977 | _mm512_max_pd(__m512d __A, __m512d __B) | |
| 978 | { | |
| 935 | static __inline__ __m512d | |
| 936 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_pd(__m512d __A, __m512d __B) { | |
| 979 | 937 | return (__m512d) __builtin_ia32_maxpd512((__v8df) __A, (__v8df) __B, |
| 980 | 938 | _MM_FROUND_CUR_DIRECTION); |
| 981 | 939 | } |
| 982 | 940 | |
| 983 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 984 | _mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) | |
| 985 | { | |
| 941 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 942 | _mm512_mask_max_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { | |
| 986 | 943 | return (__m512d)__builtin_ia32_selectpd_512(__U, |
| 987 | 944 | (__v8df)_mm512_max_pd(__A, __B), |
| 988 | 945 | (__v8df)__W); |
| 989 | 946 | } |
| 990 | 947 | |
| 991 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 992 | _mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) | |
| 993 | { | |
| 948 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 949 | _mm512_maskz_max_pd(__mmask8 __U, __m512d __A, __m512d __B) { | |
| 994 | 950 | return (__m512d)__builtin_ia32_selectpd_512(__U, |
| 995 | 951 | (__v8df)_mm512_max_pd(__A, __B), |
| 996 | 952 | (__v8df)_mm512_setzero_pd()); |
| ... | ... | @@ -1010,31 +966,30 @@ _mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) |
| 1010 | 966 | (__v16sf)_mm512_max_round_ps((A), (B), (R)), \ |
| 1011 | 967 | (__v16sf)_mm512_setzero_ps())) |
| 1012 | 968 | |
| 1013 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1014 | _mm512_max_ps(__m512 __A, __m512 __B) | |
| 1015 | { | |
| 969 | static __inline__ __m512 | |
| 970 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_ps(__m512 __A, __m512 __B) { | |
| 1016 | 971 | return (__m512) __builtin_ia32_maxps512((__v16sf) __A, (__v16sf) __B, |
| 1017 | 972 | _MM_FROUND_CUR_DIRECTION); |
| 1018 | 973 | } |
| 1019 | 974 | |
| 1020 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1021 | _mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) | |
| 1022 | { | |
| 975 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 976 | _mm512_mask_max_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { | |
| 1023 | 977 | return (__m512)__builtin_ia32_selectps_512(__U, |
| 1024 | 978 | (__v16sf)_mm512_max_ps(__A, __B), |
| 1025 | 979 | (__v16sf)__W); |
| 1026 | 980 | } |
| 1027 | 981 | |
| 1028 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1029 | _mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B) | |
| 1030 | { | |
| 982 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 983 | _mm512_maskz_max_ps(__mmask16 __U, __m512 __A, __m512 __B) { | |
| 1031 | 984 | return (__m512)__builtin_ia32_selectps_512(__U, |
| 1032 | 985 | (__v16sf)_mm512_max_ps(__A, __B), |
| 1033 | 986 | (__v16sf)_mm512_setzero_ps()); |
| 1034 | 987 | } |
| 1035 | 988 | |
| 1036 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1037 | _mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { | |
| 989 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_max_ss(__m128 __W, | |
| 990 | __mmask8 __U, | |
| 991 | __m128 __A, | |
| 992 | __m128 __B) { | |
| 1038 | 993 | return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A, |
| 1039 | 994 | (__v4sf) __B, |
| 1040 | 995 | (__v4sf) __W, |
| ... | ... | @@ -1042,8 +997,9 @@ _mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { |
| 1042 | 997 | _MM_FROUND_CUR_DIRECTION); |
| 1043 | 998 | } |
| 1044 | 999 | |
| 1045 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1046 | _mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) { | |
| 1000 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_max_ss(__mmask8 __U, | |
| 1001 | __m128 __A, | |
| 1002 | __m128 __B) { | |
| 1047 | 1003 | return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A, |
| 1048 | 1004 | (__v4sf) __B, |
| 1049 | 1005 | (__v4sf) _mm_setzero_ps (), |
| ... | ... | @@ -1069,8 +1025,10 @@ _mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) { |
| 1069 | 1025 | (__v4sf)_mm_setzero_ps(), \ |
| 1070 | 1026 | (__mmask8)(U), (int)(R))) |
| 1071 | 1027 | |
| 1072 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1073 | _mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { | |
| 1028 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_max_sd(__m128d __W, | |
| 1029 | __mmask8 __U, | |
| 1030 | __m128d __A, | |
| 1031 | __m128d __B) { | |
| 1074 | 1032 | return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A, |
| 1075 | 1033 | (__v2df) __B, |
| 1076 | 1034 | (__v2df) __W, |
| ... | ... | @@ -1078,8 +1036,9 @@ _mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { |
| 1078 | 1036 | _MM_FROUND_CUR_DIRECTION); |
| 1079 | 1037 | } |
| 1080 | 1038 | |
| 1081 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1082 | _mm_maskz_max_sd(__mmask8 __U,__m128d __A, __m128d __B) { | |
| 1039 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_max_sd(__mmask8 __U, | |
| 1040 | __m128d __A, | |
| 1041 | __m128d __B) { | |
| 1083 | 1042 | return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A, |
| 1084 | 1043 | (__v2df) __B, |
| 1085 | 1044 | (__v2df) _mm_setzero_pd (), |
| ... | ... | @@ -1106,89 +1065,76 @@ _mm_maskz_max_sd(__mmask8 __U,__m128d __A, __m128d __B) { |
| 1106 | 1065 | (__mmask8)(U), (int)(R))) |
| 1107 | 1066 | |
| 1108 | 1067 | static __inline __m512i |
| 1109 | __DEFAULT_FN_ATTRS512 | |
| 1110 | _mm512_max_epi32(__m512i __A, __m512i __B) | |
| 1111 | { | |
| 1068 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_epi32(__m512i __A, __m512i __B) { | |
| 1112 | 1069 | return (__m512i)__builtin_elementwise_max((__v16si)__A, (__v16si)__B); |
| 1113 | 1070 | } |
| 1114 | 1071 | |
| 1115 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1116 | _mm512_mask_max_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) | |
| 1117 | { | |
| 1072 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1073 | _mm512_mask_max_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) { | |
| 1118 | 1074 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1119 | 1075 | (__v16si)_mm512_max_epi32(__A, __B), |
| 1120 | 1076 | (__v16si)__W); |
| 1121 | 1077 | } |
| 1122 | 1078 | |
| 1123 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1124 | _mm512_maskz_max_epi32 (__mmask16 __M, __m512i __A, __m512i __B) | |
| 1125 | { | |
| 1079 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1080 | _mm512_maskz_max_epi32(__mmask16 __M, __m512i __A, __m512i __B) { | |
| 1126 | 1081 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1127 | 1082 | (__v16si)_mm512_max_epi32(__A, __B), |
| 1128 | 1083 | (__v16si)_mm512_setzero_si512()); |
| 1129 | 1084 | } |
| 1130 | 1085 | |
| 1131 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1132 | _mm512_max_epu32(__m512i __A, __m512i __B) | |
| 1133 | { | |
| 1086 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1087 | _mm512_max_epu32(__m512i __A, __m512i __B) { | |
| 1134 | 1088 | return (__m512i)__builtin_elementwise_max((__v16su)__A, (__v16su)__B); |
| 1135 | 1089 | } |
| 1136 | 1090 | |
| 1137 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1138 | _mm512_mask_max_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) | |
| 1139 | { | |
| 1091 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1092 | _mm512_mask_max_epu32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) { | |
| 1140 | 1093 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1141 | 1094 | (__v16si)_mm512_max_epu32(__A, __B), |
| 1142 | 1095 | (__v16si)__W); |
| 1143 | 1096 | } |
| 1144 | 1097 | |
| 1145 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1146 | _mm512_maskz_max_epu32 (__mmask16 __M, __m512i __A, __m512i __B) | |
| 1147 | { | |
| 1098 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1099 | _mm512_maskz_max_epu32(__mmask16 __M, __m512i __A, __m512i __B) { | |
| 1148 | 1100 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1149 | 1101 | (__v16si)_mm512_max_epu32(__A, __B), |
| 1150 | 1102 | (__v16si)_mm512_setzero_si512()); |
| 1151 | 1103 | } |
| 1152 | 1104 | |
| 1153 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1154 | _mm512_max_epi64(__m512i __A, __m512i __B) | |
| 1155 | { | |
| 1105 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1106 | _mm512_max_epi64(__m512i __A, __m512i __B) { | |
| 1156 | 1107 | return (__m512i)__builtin_elementwise_max((__v8di)__A, (__v8di)__B); |
| 1157 | 1108 | } |
| 1158 | 1109 | |
| 1159 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1160 | _mm512_mask_max_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) | |
| 1161 | { | |
| 1110 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1111 | _mm512_mask_max_epi64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) { | |
| 1162 | 1112 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1163 | 1113 | (__v8di)_mm512_max_epi64(__A, __B), |
| 1164 | 1114 | (__v8di)__W); |
| 1165 | 1115 | } |
| 1166 | 1116 | |
| 1167 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1168 | _mm512_maskz_max_epi64 (__mmask8 __M, __m512i __A, __m512i __B) | |
| 1169 | { | |
| 1117 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1118 | _mm512_maskz_max_epi64(__mmask8 __M, __m512i __A, __m512i __B) { | |
| 1170 | 1119 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1171 | 1120 | (__v8di)_mm512_max_epi64(__A, __B), |
| 1172 | 1121 | (__v8di)_mm512_setzero_si512()); |
| 1173 | 1122 | } |
| 1174 | 1123 | |
| 1175 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1176 | _mm512_max_epu64(__m512i __A, __m512i __B) | |
| 1177 | { | |
| 1124 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1125 | _mm512_max_epu64(__m512i __A, __m512i __B) { | |
| 1178 | 1126 | return (__m512i)__builtin_elementwise_max((__v8du)__A, (__v8du)__B); |
| 1179 | 1127 | } |
| 1180 | 1128 | |
| 1181 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1182 | _mm512_mask_max_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) | |
| 1183 | { | |
| 1129 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1130 | _mm512_mask_max_epu64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) { | |
| 1184 | 1131 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1185 | 1132 | (__v8di)_mm512_max_epu64(__A, __B), |
| 1186 | 1133 | (__v8di)__W); |
| 1187 | 1134 | } |
| 1188 | 1135 | |
| 1189 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1190 | _mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B) | |
| 1191 | { | |
| 1136 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1137 | _mm512_maskz_max_epu64(__mmask8 __M, __m512i __A, __m512i __B) { | |
| 1192 | 1138 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1193 | 1139 | (__v8di)_mm512_max_epu64(__A, __B), |
| 1194 | 1140 | (__v8di)_mm512_setzero_si512()); |
| ... | ... | @@ -1208,24 +1154,21 @@ _mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B) |
| 1208 | 1154 | (__v8df)_mm512_min_round_pd((A), (B), (R)), \ |
| 1209 | 1155 | (__v8df)_mm512_setzero_pd())) |
| 1210 | 1156 | |
| 1211 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1212 | _mm512_min_pd(__m512d __A, __m512d __B) | |
| 1213 | { | |
| 1157 | static __inline__ __m512d | |
| 1158 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_pd(__m512d __A, __m512d __B) { | |
| 1214 | 1159 | return (__m512d) __builtin_ia32_minpd512((__v8df) __A, (__v8df) __B, |
| 1215 | 1160 | _MM_FROUND_CUR_DIRECTION); |
| 1216 | 1161 | } |
| 1217 | 1162 | |
| 1218 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1219 | _mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) | |
| 1220 | { | |
| 1163 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1164 | _mm512_mask_min_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { | |
| 1221 | 1165 | return (__m512d)__builtin_ia32_selectpd_512(__U, |
| 1222 | 1166 | (__v8df)_mm512_min_pd(__A, __B), |
| 1223 | 1167 | (__v8df)__W); |
| 1224 | 1168 | } |
| 1225 | 1169 | |
| 1226 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1227 | _mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) | |
| 1228 | { | |
| 1170 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1171 | _mm512_maskz_min_pd(__mmask8 __U, __m512d __A, __m512d __B) { | |
| 1229 | 1172 | return (__m512d)__builtin_ia32_selectpd_512(__U, |
| 1230 | 1173 | (__v8df)_mm512_min_pd(__A, __B), |
| 1231 | 1174 | (__v8df)_mm512_setzero_pd()); |
| ... | ... | @@ -1245,31 +1188,30 @@ _mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) |
| 1245 | 1188 | (__v16sf)_mm512_min_round_ps((A), (B), (R)), \ |
| 1246 | 1189 | (__v16sf)_mm512_setzero_ps())) |
| 1247 | 1190 | |
| 1248 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1249 | _mm512_min_ps(__m512 __A, __m512 __B) | |
| 1250 | { | |
| 1191 | static __inline__ __m512 | |
| 1192 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_ps(__m512 __A, __m512 __B) { | |
| 1251 | 1193 | return (__m512) __builtin_ia32_minps512((__v16sf) __A, (__v16sf) __B, |
| 1252 | 1194 | _MM_FROUND_CUR_DIRECTION); |
| 1253 | 1195 | } |
| 1254 | 1196 | |
| 1255 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1256 | _mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) | |
| 1257 | { | |
| 1197 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1198 | _mm512_mask_min_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { | |
| 1258 | 1199 | return (__m512)__builtin_ia32_selectps_512(__U, |
| 1259 | 1200 | (__v16sf)_mm512_min_ps(__A, __B), |
| 1260 | 1201 | (__v16sf)__W); |
| 1261 | 1202 | } |
| 1262 | 1203 | |
| 1263 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1264 | _mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B) | |
| 1265 | { | |
| 1204 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1205 | _mm512_maskz_min_ps(__mmask16 __U, __m512 __A, __m512 __B) { | |
| 1266 | 1206 | return (__m512)__builtin_ia32_selectps_512(__U, |
| 1267 | 1207 | (__v16sf)_mm512_min_ps(__A, __B), |
| 1268 | 1208 | (__v16sf)_mm512_setzero_ps()); |
| 1269 | 1209 | } |
| 1270 | 1210 | |
| 1271 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1272 | _mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { | |
| 1211 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_min_ss(__m128 __W, | |
| 1212 | __mmask8 __U, | |
| 1213 | __m128 __A, | |
| 1214 | __m128 __B) { | |
| 1273 | 1215 | return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A, |
| 1274 | 1216 | (__v4sf) __B, |
| 1275 | 1217 | (__v4sf) __W, |
| ... | ... | @@ -1277,8 +1219,9 @@ _mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { |
| 1277 | 1219 | _MM_FROUND_CUR_DIRECTION); |
| 1278 | 1220 | } |
| 1279 | 1221 | |
| 1280 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1281 | _mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) { | |
| 1222 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_min_ss(__mmask8 __U, | |
| 1223 | __m128 __A, | |
| 1224 | __m128 __B) { | |
| 1282 | 1225 | return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A, |
| 1283 | 1226 | (__v4sf) __B, |
| 1284 | 1227 | (__v4sf) _mm_setzero_ps (), |
| ... | ... | @@ -1304,8 +1247,10 @@ _mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) { |
| 1304 | 1247 | (__v4sf)_mm_setzero_ps(), \ |
| 1305 | 1248 | (__mmask8)(U), (int)(R))) |
| 1306 | 1249 | |
| 1307 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1308 | _mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { | |
| 1250 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_min_sd(__m128d __W, | |
| 1251 | __mmask8 __U, | |
| 1252 | __m128d __A, | |
| 1253 | __m128d __B) { | |
| 1309 | 1254 | return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A, |
| 1310 | 1255 | (__v2df) __B, |
| 1311 | 1256 | (__v2df) __W, |
| ... | ... | @@ -1313,8 +1258,9 @@ _mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { |
| 1313 | 1258 | _MM_FROUND_CUR_DIRECTION); |
| 1314 | 1259 | } |
| 1315 | 1260 | |
| 1316 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1317 | _mm_maskz_min_sd(__mmask8 __U,__m128d __A, __m128d __B) { | |
| 1261 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_min_sd(__mmask8 __U, | |
| 1262 | __m128d __A, | |
| 1263 | __m128d __B) { | |
| 1318 | 1264 | return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A, |
| 1319 | 1265 | (__v2df) __B, |
| 1320 | 1266 | (__v2df) _mm_setzero_pd (), |
| ... | ... | @@ -1341,166 +1287,144 @@ _mm_maskz_min_sd(__mmask8 __U,__m128d __A, __m128d __B) { |
| 1341 | 1287 | (__mmask8)(U), (int)(R))) |
| 1342 | 1288 | |
| 1343 | 1289 | static __inline __m512i |
| 1344 | __DEFAULT_FN_ATTRS512 | |
| 1345 | _mm512_min_epi32(__m512i __A, __m512i __B) | |
| 1346 | { | |
| 1290 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_epi32(__m512i __A, __m512i __B) { | |
| 1347 | 1291 | return (__m512i)__builtin_elementwise_min((__v16si)__A, (__v16si)__B); |
| 1348 | 1292 | } |
| 1349 | 1293 | |
| 1350 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1351 | _mm512_mask_min_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) | |
| 1352 | { | |
| 1294 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1295 | _mm512_mask_min_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) { | |
| 1353 | 1296 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1354 | 1297 | (__v16si)_mm512_min_epi32(__A, __B), |
| 1355 | 1298 | (__v16si)__W); |
| 1356 | 1299 | } |
| 1357 | 1300 | |
| 1358 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1359 | _mm512_maskz_min_epi32 (__mmask16 __M, __m512i __A, __m512i __B) | |
| 1360 | { | |
| 1301 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1302 | _mm512_maskz_min_epi32(__mmask16 __M, __m512i __A, __m512i __B) { | |
| 1361 | 1303 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1362 | 1304 | (__v16si)_mm512_min_epi32(__A, __B), |
| 1363 | 1305 | (__v16si)_mm512_setzero_si512()); |
| 1364 | 1306 | } |
| 1365 | 1307 | |
| 1366 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1367 | _mm512_min_epu32(__m512i __A, __m512i __B) | |
| 1368 | { | |
| 1308 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1309 | _mm512_min_epu32(__m512i __A, __m512i __B) { | |
| 1369 | 1310 | return (__m512i)__builtin_elementwise_min((__v16su)__A, (__v16su)__B); |
| 1370 | 1311 | } |
| 1371 | 1312 | |
| 1372 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1373 | _mm512_mask_min_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) | |
| 1374 | { | |
| 1313 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1314 | _mm512_mask_min_epu32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) { | |
| 1375 | 1315 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1376 | 1316 | (__v16si)_mm512_min_epu32(__A, __B), |
| 1377 | 1317 | (__v16si)__W); |
| 1378 | 1318 | } |
| 1379 | 1319 | |
| 1380 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1381 | _mm512_maskz_min_epu32 (__mmask16 __M, __m512i __A, __m512i __B) | |
| 1382 | { | |
| 1320 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1321 | _mm512_maskz_min_epu32(__mmask16 __M, __m512i __A, __m512i __B) { | |
| 1383 | 1322 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1384 | 1323 | (__v16si)_mm512_min_epu32(__A, __B), |
| 1385 | 1324 | (__v16si)_mm512_setzero_si512()); |
| 1386 | 1325 | } |
| 1387 | 1326 | |
| 1388 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1389 | _mm512_min_epi64(__m512i __A, __m512i __B) | |
| 1390 | { | |
| 1327 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1328 | _mm512_min_epi64(__m512i __A, __m512i __B) { | |
| 1391 | 1329 | return (__m512i)__builtin_elementwise_min((__v8di)__A, (__v8di)__B); |
| 1392 | 1330 | } |
| 1393 | 1331 | |
| 1394 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1395 | _mm512_mask_min_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) | |
| 1396 | { | |
| 1332 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1333 | _mm512_mask_min_epi64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) { | |
| 1397 | 1334 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1398 | 1335 | (__v8di)_mm512_min_epi64(__A, __B), |
| 1399 | 1336 | (__v8di)__W); |
| 1400 | 1337 | } |
| 1401 | 1338 | |
| 1402 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1403 | _mm512_maskz_min_epi64 (__mmask8 __M, __m512i __A, __m512i __B) | |
| 1404 | { | |
| 1339 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1340 | _mm512_maskz_min_epi64(__mmask8 __M, __m512i __A, __m512i __B) { | |
| 1405 | 1341 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1406 | 1342 | (__v8di)_mm512_min_epi64(__A, __B), |
| 1407 | 1343 | (__v8di)_mm512_setzero_si512()); |
| 1408 | 1344 | } |
| 1409 | 1345 | |
| 1410 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1411 | _mm512_min_epu64(__m512i __A, __m512i __B) | |
| 1412 | { | |
| 1346 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1347 | _mm512_min_epu64(__m512i __A, __m512i __B) { | |
| 1413 | 1348 | return (__m512i)__builtin_elementwise_min((__v8du)__A, (__v8du)__B); |
| 1414 | 1349 | } |
| 1415 | 1350 | |
| 1416 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1417 | _mm512_mask_min_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) | |
| 1418 | { | |
| 1351 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1352 | _mm512_mask_min_epu64(__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) { | |
| 1419 | 1353 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1420 | 1354 | (__v8di)_mm512_min_epu64(__A, __B), |
| 1421 | 1355 | (__v8di)__W); |
| 1422 | 1356 | } |
| 1423 | 1357 | |
| 1424 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1425 | _mm512_maskz_min_epu64 (__mmask8 __M, __m512i __A, __m512i __B) | |
| 1426 | { | |
| 1358 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1359 | _mm512_maskz_min_epu64(__mmask8 __M, __m512i __A, __m512i __B) { | |
| 1427 | 1360 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1428 | 1361 | (__v8di)_mm512_min_epu64(__A, __B), |
| 1429 | 1362 | (__v8di)_mm512_setzero_si512()); |
| 1430 | 1363 | } |
| 1431 | 1364 | |
| 1432 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1433 | _mm512_mul_epi32(__m512i __X, __m512i __Y) | |
| 1434 | { | |
| 1365 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1366 | _mm512_mul_epi32(__m512i __X, __m512i __Y) { | |
| 1435 | 1367 | return (__m512i)__builtin_ia32_pmuldq512((__v16si)__X, (__v16si) __Y); |
| 1436 | 1368 | } |
| 1437 | 1369 | |
| 1438 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1439 | _mm512_mask_mul_epi32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) | |
| 1440 | { | |
| 1370 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1371 | _mm512_mask_mul_epi32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) { | |
| 1441 | 1372 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1442 | 1373 | (__v8di)_mm512_mul_epi32(__X, __Y), |
| 1443 | 1374 | (__v8di)__W); |
| 1444 | 1375 | } |
| 1445 | 1376 | |
| 1446 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1447 | _mm512_maskz_mul_epi32(__mmask8 __M, __m512i __X, __m512i __Y) | |
| 1448 | { | |
| 1377 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1378 | _mm512_maskz_mul_epi32(__mmask8 __M, __m512i __X, __m512i __Y) { | |
| 1449 | 1379 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1450 | 1380 | (__v8di)_mm512_mul_epi32(__X, __Y), |
| 1451 | 1381 | (__v8di)_mm512_setzero_si512 ()); |
| 1452 | 1382 | } |
| 1453 | 1383 | |
| 1454 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1455 | _mm512_mul_epu32(__m512i __X, __m512i __Y) | |
| 1456 | { | |
| 1384 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1385 | _mm512_mul_epu32(__m512i __X, __m512i __Y) { | |
| 1457 | 1386 | return (__m512i)__builtin_ia32_pmuludq512((__v16si)__X, (__v16si)__Y); |
| 1458 | 1387 | } |
| 1459 | 1388 | |
| 1460 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1461 | _mm512_mask_mul_epu32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) | |
| 1462 | { | |
| 1389 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1390 | _mm512_mask_mul_epu32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) { | |
| 1463 | 1391 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1464 | 1392 | (__v8di)_mm512_mul_epu32(__X, __Y), |
| 1465 | 1393 | (__v8di)__W); |
| 1466 | 1394 | } |
| 1467 | 1395 | |
| 1468 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1469 | _mm512_maskz_mul_epu32(__mmask8 __M, __m512i __X, __m512i __Y) | |
| 1470 | { | |
| 1396 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1397 | _mm512_maskz_mul_epu32(__mmask8 __M, __m512i __X, __m512i __Y) { | |
| 1471 | 1398 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 1472 | 1399 | (__v8di)_mm512_mul_epu32(__X, __Y), |
| 1473 | 1400 | (__v8di)_mm512_setzero_si512 ()); |
| 1474 | 1401 | } |
| 1475 | 1402 | |
| 1476 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1477 | _mm512_mullo_epi32 (__m512i __A, __m512i __B) | |
| 1478 | { | |
| 1403 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1404 | _mm512_mullo_epi32(__m512i __A, __m512i __B) { | |
| 1479 | 1405 | return (__m512i) ((__v16su) __A * (__v16su) __B); |
| 1480 | 1406 | } |
| 1481 | 1407 | |
| 1482 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1483 | _mm512_maskz_mullo_epi32(__mmask16 __M, __m512i __A, __m512i __B) | |
| 1484 | { | |
| 1408 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1409 | _mm512_maskz_mullo_epi32(__mmask16 __M, __m512i __A, __m512i __B) { | |
| 1485 | 1410 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1486 | 1411 | (__v16si)_mm512_mullo_epi32(__A, __B), |
| 1487 | 1412 | (__v16si)_mm512_setzero_si512()); |
| 1488 | 1413 | } |
| 1489 | 1414 | |
| 1490 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1491 | _mm512_mask_mullo_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) | |
| 1492 | { | |
| 1415 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1416 | _mm512_mask_mullo_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) { | |
| 1493 | 1417 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 1494 | 1418 | (__v16si)_mm512_mullo_epi32(__A, __B), |
| 1495 | 1419 | (__v16si)__W); |
| 1496 | 1420 | } |
| 1497 | 1421 | |
| 1498 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1499 | _mm512_mullox_epi64 (__m512i __A, __m512i __B) { | |
| 1422 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1423 | _mm512_mullox_epi64(__m512i __A, __m512i __B) { | |
| 1500 | 1424 | return (__m512i) ((__v8du) __A * (__v8du) __B); |
| 1501 | 1425 | } |
| 1502 | 1426 | |
| 1503 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1427 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1504 | 1428 | _mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { |
| 1505 | 1429 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 1506 | 1430 | (__v8di)_mm512_mullox_epi64(__A, __B), |
| ... | ... | @@ -1520,26 +1444,19 @@ _mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { |
| 1520 | 1444 | (__v8df)_mm512_sqrt_round_pd((A), (R)), \ |
| 1521 | 1445 | (__v8df)_mm512_setzero_pd())) |
| 1522 | 1446 | |
| 1523 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1524 | _mm512_sqrt_pd(__m512d __A) | |
| 1525 | { | |
| 1526 | return (__m512d)__builtin_ia32_sqrtpd512((__v8df)__A, | |
| 1527 | _MM_FROUND_CUR_DIRECTION); | |
| 1447 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 _mm512_sqrt_pd(__m512d __A) { | |
| 1448 | return (__m512d)__builtin_elementwise_sqrt((__v8df)__A); | |
| 1528 | 1449 | } |
| 1529 | 1450 | |
| 1530 | 1451 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 |
| 1531 | _mm512_mask_sqrt_pd (__m512d __W, __mmask8 __U, __m512d __A) | |
| 1532 | { | |
| 1533 | return (__m512d)__builtin_ia32_selectpd_512(__U, | |
| 1534 | (__v8df)_mm512_sqrt_pd(__A), | |
| 1452 | _mm512_mask_sqrt_pd(__m512d __W, __mmask8 __U, __m512d __A) { | |
| 1453 | return (__m512d)__builtin_ia32_selectpd_512(__U, (__v8df)_mm512_sqrt_pd(__A), | |
| 1535 | 1454 | (__v8df)__W); |
| 1536 | 1455 | } |
| 1537 | 1456 | |
| 1538 | 1457 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 |
| 1539 | _mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A) | |
| 1540 | { | |
| 1541 | return (__m512d)__builtin_ia32_selectpd_512(__U, | |
| 1542 | (__v8df)_mm512_sqrt_pd(__A), | |
| 1458 | _mm512_maskz_sqrt_pd(__mmask8 __U, __m512d __A) { | |
| 1459 | return (__m512d)__builtin_ia32_selectpd_512(__U, (__v8df)_mm512_sqrt_pd(__A), | |
| 1543 | 1460 | (__v8df)_mm512_setzero_pd()); |
| 1544 | 1461 | } |
| 1545 | 1462 | |
| ... | ... | @@ -1556,26 +1473,19 @@ _mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A) |
| 1556 | 1473 | (__v16sf)_mm512_sqrt_round_ps((A), (R)), \ |
| 1557 | 1474 | (__v16sf)_mm512_setzero_ps())) |
| 1558 | 1475 | |
| 1559 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1560 | _mm512_sqrt_ps(__m512 __A) | |
| 1561 | { | |
| 1562 | return (__m512)__builtin_ia32_sqrtps512((__v16sf)__A, | |
| 1563 | _MM_FROUND_CUR_DIRECTION); | |
| 1476 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_sqrt_ps(__m512 __A) { | |
| 1477 | return (__m512)__builtin_elementwise_sqrt((__v16sf)__A); | |
| 1564 | 1478 | } |
| 1565 | 1479 | |
| 1566 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1567 | _mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A) | |
| 1568 | { | |
| 1569 | return (__m512)__builtin_ia32_selectps_512(__U, | |
| 1570 | (__v16sf)_mm512_sqrt_ps(__A), | |
| 1480 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1481 | _mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A) { | |
| 1482 | return (__m512)__builtin_ia32_selectps_512(__U, (__v16sf)_mm512_sqrt_ps(__A), | |
| 1571 | 1483 | (__v16sf)__W); |
| 1572 | 1484 | } |
| 1573 | 1485 | |
| 1574 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1575 | _mm512_maskz_sqrt_ps( __mmask16 __U, __m512 __A) | |
| 1576 | { | |
| 1577 | return (__m512)__builtin_ia32_selectps_512(__U, | |
| 1578 | (__v16sf)_mm512_sqrt_ps(__A), | |
| 1486 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1487 | _mm512_maskz_sqrt_ps(__mmask16 __U, __m512 __A) { | |
| 1488 | return (__m512)__builtin_ia32_selectps_512(__U, (__v16sf)_mm512_sqrt_ps(__A), | |
| 1579 | 1489 | (__v16sf)_mm512_setzero_ps()); |
| 1580 | 1490 | } |
| 1581 | 1491 | |
| ... | ... | @@ -1866,58 +1776,52 @@ _mm512_mask_ceil_pd (__m512d __W, __mmask8 __U, __m512d __A) |
| 1866 | 1776 | _MM_FROUND_CUR_DIRECTION); |
| 1867 | 1777 | } |
| 1868 | 1778 | |
| 1869 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1870 | _mm512_abs_epi64(__m512i __A) | |
| 1871 | { | |
| 1779 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1780 | _mm512_abs_epi64(__m512i __A) { | |
| 1872 | 1781 | return (__m512i)__builtin_elementwise_abs((__v8di)__A); |
| 1873 | 1782 | } |
| 1874 | 1783 | |
| 1875 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1876 | _mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A) | |
| 1877 | { | |
| 1784 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1785 | _mm512_mask_abs_epi64(__m512i __W, __mmask8 __U, __m512i __A) { | |
| 1878 | 1786 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 1879 | 1787 | (__v8di)_mm512_abs_epi64(__A), |
| 1880 | 1788 | (__v8di)__W); |
| 1881 | 1789 | } |
| 1882 | 1790 | |
| 1883 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1884 | _mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A) | |
| 1885 | { | |
| 1791 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1792 | _mm512_maskz_abs_epi64(__mmask8 __U, __m512i __A) { | |
| 1886 | 1793 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 1887 | 1794 | (__v8di)_mm512_abs_epi64(__A), |
| 1888 | 1795 | (__v8di)_mm512_setzero_si512()); |
| 1889 | 1796 | } |
| 1890 | 1797 | |
| 1891 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 1892 | _mm512_abs_epi32(__m512i __A) | |
| 1893 | { | |
| 1798 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1799 | _mm512_abs_epi32(__m512i __A) { | |
| 1894 | 1800 | return (__m512i)__builtin_elementwise_abs((__v16si) __A); |
| 1895 | 1801 | } |
| 1896 | 1802 | |
| 1897 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1898 | _mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A) | |
| 1899 | { | |
| 1803 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1804 | _mm512_mask_abs_epi32(__m512i __W, __mmask16 __U, __m512i __A) { | |
| 1900 | 1805 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| 1901 | 1806 | (__v16si)_mm512_abs_epi32(__A), |
| 1902 | 1807 | (__v16si)__W); |
| 1903 | 1808 | } |
| 1904 | 1809 | |
| 1905 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 1906 | _mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A) | |
| 1907 | { | |
| 1810 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1811 | _mm512_maskz_abs_epi32(__mmask16 __U, __m512i __A) { | |
| 1908 | 1812 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| 1909 | 1813 | (__v16si)_mm512_abs_epi32(__A), |
| 1910 | 1814 | (__v16si)_mm512_setzero_si512()); |
| 1911 | 1815 | } |
| 1912 | 1816 | |
| 1913 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1914 | _mm_mask_add_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { | |
| 1817 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1818 | _mm_mask_add_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { | |
| 1915 | 1819 | __A = _mm_add_ss(__A, __B); |
| 1916 | 1820 | return __builtin_ia32_selectss_128(__U, __A, __W); |
| 1917 | 1821 | } |
| 1918 | 1822 | |
| 1919 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1920 | _mm_maskz_add_ss(__mmask8 __U,__m128 __A, __m128 __B) { | |
| 1823 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1824 | _mm_maskz_add_ss(__mmask8 __U, __m128 __A, __m128 __B) { | |
| 1921 | 1825 | __A = _mm_add_ss(__A, __B); |
| 1922 | 1826 | return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps()); |
| 1923 | 1827 | } |
| ... | ... | @@ -1940,14 +1844,14 @@ _mm_maskz_add_ss(__mmask8 __U,__m128 __A, __m128 __B) { |
| 1940 | 1844 | (__v4sf)_mm_setzero_ps(), \ |
| 1941 | 1845 | (__mmask8)(U), (int)(R))) |
| 1942 | 1846 | |
| 1943 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1944 | _mm_mask_add_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { | |
| 1847 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1848 | _mm_mask_add_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { | |
| 1945 | 1849 | __A = _mm_add_sd(__A, __B); |
| 1946 | 1850 | return __builtin_ia32_selectsd_128(__U, __A, __W); |
| 1947 | 1851 | } |
| 1948 | 1852 | |
| 1949 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1950 | _mm_maskz_add_sd(__mmask8 __U,__m128d __A, __m128d __B) { | |
| 1853 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1854 | _mm_maskz_add_sd(__mmask8 __U, __m128d __A, __m128d __B) { | |
| 1951 | 1855 | __A = _mm_add_sd(__A, __B); |
| 1952 | 1856 | return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd()); |
| 1953 | 1857 | } |
| ... | ... | @@ -1969,28 +1873,28 @@ _mm_maskz_add_sd(__mmask8 __U,__m128d __A, __m128d __B) { |
| 1969 | 1873 | (__v2df)_mm_setzero_pd(), \ |
| 1970 | 1874 | (__mmask8)(U), (int)(R))) |
| 1971 | 1875 | |
| 1972 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1876 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1973 | 1877 | _mm512_mask_add_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { |
| 1974 | 1878 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 1975 | 1879 | (__v8df)_mm512_add_pd(__A, __B), |
| 1976 | 1880 | (__v8df)__W); |
| 1977 | 1881 | } |
| 1978 | 1882 | |
| 1979 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1883 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1980 | 1884 | _mm512_maskz_add_pd(__mmask8 __U, __m512d __A, __m512d __B) { |
| 1981 | 1885 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 1982 | 1886 | (__v8df)_mm512_add_pd(__A, __B), |
| 1983 | 1887 | (__v8df)_mm512_setzero_pd()); |
| 1984 | 1888 | } |
| 1985 | 1889 | |
| 1986 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1890 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1987 | 1891 | _mm512_mask_add_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { |
| 1988 | 1892 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 1989 | 1893 | (__v16sf)_mm512_add_ps(__A, __B), |
| 1990 | 1894 | (__v16sf)__W); |
| 1991 | 1895 | } |
| 1992 | 1896 | |
| 1993 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 1897 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 1994 | 1898 | _mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 1995 | 1899 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 1996 | 1900 | (__v16sf)_mm512_add_ps(__A, __B), |
| ... | ... | @@ -2025,14 +1929,14 @@ _mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 2025 | 1929 | (__v16sf)_mm512_add_round_ps((A), (B), (R)), \ |
| 2026 | 1930 | (__v16sf)_mm512_setzero_ps())) |
| 2027 | 1931 | |
| 2028 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2029 | _mm_mask_sub_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { | |
| 1932 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1933 | _mm_mask_sub_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { | |
| 2030 | 1934 | __A = _mm_sub_ss(__A, __B); |
| 2031 | 1935 | return __builtin_ia32_selectss_128(__U, __A, __W); |
| 2032 | 1936 | } |
| 2033 | 1937 | |
| 2034 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2035 | _mm_maskz_sub_ss(__mmask8 __U,__m128 __A, __m128 __B) { | |
| 1938 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1939 | _mm_maskz_sub_ss(__mmask8 __U, __m128 __A, __m128 __B) { | |
| 2036 | 1940 | __A = _mm_sub_ss(__A, __B); |
| 2037 | 1941 | return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps()); |
| 2038 | 1942 | } |
| ... | ... | @@ -2054,14 +1958,14 @@ _mm_maskz_sub_ss(__mmask8 __U,__m128 __A, __m128 __B) { |
| 2054 | 1958 | (__v4sf)_mm_setzero_ps(), \ |
| 2055 | 1959 | (__mmask8)(U), (int)(R))) |
| 2056 | 1960 | |
| 2057 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2058 | _mm_mask_sub_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { | |
| 1961 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1962 | _mm_mask_sub_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { | |
| 2059 | 1963 | __A = _mm_sub_sd(__A, __B); |
| 2060 | 1964 | return __builtin_ia32_selectsd_128(__U, __A, __W); |
| 2061 | 1965 | } |
| 2062 | 1966 | |
| 2063 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2064 | _mm_maskz_sub_sd(__mmask8 __U,__m128d __A, __m128d __B) { | |
| 1967 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1968 | _mm_maskz_sub_sd(__mmask8 __U, __m128d __A, __m128d __B) { | |
| 2065 | 1969 | __A = _mm_sub_sd(__A, __B); |
| 2066 | 1970 | return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd()); |
| 2067 | 1971 | } |
| ... | ... | @@ -2084,28 +1988,28 @@ _mm_maskz_sub_sd(__mmask8 __U,__m128d __A, __m128d __B) { |
| 2084 | 1988 | (__v2df)_mm_setzero_pd(), \ |
| 2085 | 1989 | (__mmask8)(U), (int)(R))) |
| 2086 | 1990 | |
| 2087 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1991 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2088 | 1992 | _mm512_mask_sub_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { |
| 2089 | 1993 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 2090 | 1994 | (__v8df)_mm512_sub_pd(__A, __B), |
| 2091 | 1995 | (__v8df)__W); |
| 2092 | 1996 | } |
| 2093 | 1997 | |
| 2094 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 1998 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2095 | 1999 | _mm512_maskz_sub_pd(__mmask8 __U, __m512d __A, __m512d __B) { |
| 2096 | 2000 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 2097 | 2001 | (__v8df)_mm512_sub_pd(__A, __B), |
| 2098 | 2002 | (__v8df)_mm512_setzero_pd()); |
| 2099 | 2003 | } |
| 2100 | 2004 | |
| 2101 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2005 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2102 | 2006 | _mm512_mask_sub_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { |
| 2103 | 2007 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 2104 | 2008 | (__v16sf)_mm512_sub_ps(__A, __B), |
| 2105 | 2009 | (__v16sf)__W); |
| 2106 | 2010 | } |
| 2107 | 2011 | |
| 2108 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2012 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2109 | 2013 | _mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 2110 | 2014 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 2111 | 2015 | (__v16sf)_mm512_sub_ps(__A, __B), |
| ... | ... | @@ -2140,14 +2044,14 @@ _mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 2140 | 2044 | (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \ |
| 2141 | 2045 | (__v16sf)_mm512_setzero_ps())) |
| 2142 | 2046 | |
| 2143 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2144 | _mm_mask_mul_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { | |
| 2047 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2048 | _mm_mask_mul_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { | |
| 2145 | 2049 | __A = _mm_mul_ss(__A, __B); |
| 2146 | 2050 | return __builtin_ia32_selectss_128(__U, __A, __W); |
| 2147 | 2051 | } |
| 2148 | 2052 | |
| 2149 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2150 | _mm_maskz_mul_ss(__mmask8 __U,__m128 __A, __m128 __B) { | |
| 2053 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2054 | _mm_maskz_mul_ss(__mmask8 __U, __m128 __A, __m128 __B) { | |
| 2151 | 2055 | __A = _mm_mul_ss(__A, __B); |
| 2152 | 2056 | return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps()); |
| 2153 | 2057 | } |
| ... | ... | @@ -2169,14 +2073,14 @@ _mm_maskz_mul_ss(__mmask8 __U,__m128 __A, __m128 __B) { |
| 2169 | 2073 | (__v4sf)_mm_setzero_ps(), \ |
| 2170 | 2074 | (__mmask8)(U), (int)(R))) |
| 2171 | 2075 | |
| 2172 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2173 | _mm_mask_mul_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { | |
| 2076 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2077 | _mm_mask_mul_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { | |
| 2174 | 2078 | __A = _mm_mul_sd(__A, __B); |
| 2175 | 2079 | return __builtin_ia32_selectsd_128(__U, __A, __W); |
| 2176 | 2080 | } |
| 2177 | 2081 | |
| 2178 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2179 | _mm_maskz_mul_sd(__mmask8 __U,__m128d __A, __m128d __B) { | |
| 2082 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2083 | _mm_maskz_mul_sd(__mmask8 __U, __m128d __A, __m128d __B) { | |
| 2180 | 2084 | __A = _mm_mul_sd(__A, __B); |
| 2181 | 2085 | return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd()); |
| 2182 | 2086 | } |
| ... | ... | @@ -2199,28 +2103,28 @@ _mm_maskz_mul_sd(__mmask8 __U,__m128d __A, __m128d __B) { |
| 2199 | 2103 | (__v2df)_mm_setzero_pd(), \ |
| 2200 | 2104 | (__mmask8)(U), (int)(R))) |
| 2201 | 2105 | |
| 2202 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2106 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2203 | 2107 | _mm512_mask_mul_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { |
| 2204 | 2108 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 2205 | 2109 | (__v8df)_mm512_mul_pd(__A, __B), |
| 2206 | 2110 | (__v8df)__W); |
| 2207 | 2111 | } |
| 2208 | 2112 | |
| 2209 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2113 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2210 | 2114 | _mm512_maskz_mul_pd(__mmask8 __U, __m512d __A, __m512d __B) { |
| 2211 | 2115 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 2212 | 2116 | (__v8df)_mm512_mul_pd(__A, __B), |
| 2213 | 2117 | (__v8df)_mm512_setzero_pd()); |
| 2214 | 2118 | } |
| 2215 | 2119 | |
| 2216 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2120 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2217 | 2121 | _mm512_mask_mul_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { |
| 2218 | 2122 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 2219 | 2123 | (__v16sf)_mm512_mul_ps(__A, __B), |
| 2220 | 2124 | (__v16sf)__W); |
| 2221 | 2125 | } |
| 2222 | 2126 | |
| 2223 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2127 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2224 | 2128 | _mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 2225 | 2129 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 2226 | 2130 | (__v16sf)_mm512_mul_ps(__A, __B), |
| ... | ... | @@ -2255,14 +2159,14 @@ _mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 2255 | 2159 | (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \ |
| 2256 | 2160 | (__v16sf)_mm512_setzero_ps())) |
| 2257 | 2161 | |
| 2258 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2259 | _mm_mask_div_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { | |
| 2162 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2163 | _mm_mask_div_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { | |
| 2260 | 2164 | __A = _mm_div_ss(__A, __B); |
| 2261 | 2165 | return __builtin_ia32_selectss_128(__U, __A, __W); |
| 2262 | 2166 | } |
| 2263 | 2167 | |
| 2264 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2265 | _mm_maskz_div_ss(__mmask8 __U,__m128 __A, __m128 __B) { | |
| 2168 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2169 | _mm_maskz_div_ss(__mmask8 __U, __m128 __A, __m128 __B) { | |
| 2266 | 2170 | __A = _mm_div_ss(__A, __B); |
| 2267 | 2171 | return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps()); |
| 2268 | 2172 | } |
| ... | ... | @@ -2285,14 +2189,14 @@ _mm_maskz_div_ss(__mmask8 __U,__m128 __A, __m128 __B) { |
| 2285 | 2189 | (__v4sf)_mm_setzero_ps(), \ |
| 2286 | 2190 | (__mmask8)(U), (int)(R))) |
| 2287 | 2191 | |
| 2288 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2289 | _mm_mask_div_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { | |
| 2192 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2193 | _mm_mask_div_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { | |
| 2290 | 2194 | __A = _mm_div_sd(__A, __B); |
| 2291 | 2195 | return __builtin_ia32_selectsd_128(__U, __A, __W); |
| 2292 | 2196 | } |
| 2293 | 2197 | |
| 2294 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2295 | _mm_maskz_div_sd(__mmask8 __U,__m128d __A, __m128d __B) { | |
| 2198 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2199 | _mm_maskz_div_sd(__mmask8 __U, __m128d __A, __m128d __B) { | |
| 2296 | 2200 | __A = _mm_div_sd(__A, __B); |
| 2297 | 2201 | return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd()); |
| 2298 | 2202 | } |
| ... | ... | @@ -2315,40 +2219,38 @@ _mm_maskz_div_sd(__mmask8 __U,__m128d __A, __m128d __B) { |
| 2315 | 2219 | (__v2df)_mm_setzero_pd(), \ |
| 2316 | 2220 | (__mmask8)(U), (int)(R))) |
| 2317 | 2221 | |
| 2318 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 2319 | _mm512_div_pd(__m512d __a, __m512d __b) | |
| 2320 | { | |
| 2222 | static __inline __m512d | |
| 2223 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_div_pd(__m512d __a, __m512d __b) { | |
| 2321 | 2224 | return (__m512d)((__v8df)__a/(__v8df)__b); |
| 2322 | 2225 | } |
| 2323 | 2226 | |
| 2324 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2227 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2325 | 2228 | _mm512_mask_div_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { |
| 2326 | 2229 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 2327 | 2230 | (__v8df)_mm512_div_pd(__A, __B), |
| 2328 | 2231 | (__v8df)__W); |
| 2329 | 2232 | } |
| 2330 | 2233 | |
| 2331 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2234 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2332 | 2235 | _mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) { |
| 2333 | 2236 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 2334 | 2237 | (__v8df)_mm512_div_pd(__A, __B), |
| 2335 | 2238 | (__v8df)_mm512_setzero_pd()); |
| 2336 | 2239 | } |
| 2337 | 2240 | |
| 2338 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 2339 | _mm512_div_ps(__m512 __a, __m512 __b) | |
| 2340 | { | |
| 2241 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2242 | _mm512_div_ps(__m512 __a, __m512 __b) { | |
| 2341 | 2243 | return (__m512)((__v16sf)__a/(__v16sf)__b); |
| 2342 | 2244 | } |
| 2343 | 2245 | |
| 2344 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2246 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2345 | 2247 | _mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { |
| 2346 | 2248 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 2347 | 2249 | (__v16sf)_mm512_div_ps(__A, __B), |
| 2348 | 2250 | (__v16sf)__W); |
| 2349 | 2251 | } |
| 2350 | 2252 | |
| 2351 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2253 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2352 | 2254 | _mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 2353 | 2255 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 2354 | 2256 | (__v16sf)_mm512_div_ps(__A, __B), |
| ... | ... | @@ -2530,125 +2432,104 @@ _mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) { |
| 2530 | 2432 | -(__v8df)(__m512d)(C), \ |
| 2531 | 2433 | (__mmask8)(U), (int)(R))) |
| 2532 | 2434 | |
| 2435 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2436 | _mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C) { | |
| 2437 | return (__m512d)__builtin_elementwise_fma((__v8df)__A, (__v8df)__B, | |
| 2438 | (__v8df)__C); | |
| 2439 | } | |
| 2533 | 2440 | |
| 2534 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2535 | _mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C) | |
| 2536 | { | |
| 2537 | return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, | |
| 2538 | (__v8df) __B, | |
| 2539 | (__v8df) __C, | |
| 2540 | (__mmask8) -1, | |
| 2541 | _MM_FROUND_CUR_DIRECTION); | |
| 2441 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2442 | _mm512_mask_fmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { | |
| 2443 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2444 | (__mmask8)__U, (__v8df)_mm512_fmadd_pd(__A, __B, __C), (__v8df)__A); | |
| 2542 | 2445 | } |
| 2543 | 2446 | |
| 2544 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2545 | _mm512_mask_fmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) | |
| 2546 | { | |
| 2547 | return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, | |
| 2548 | (__v8df) __B, | |
| 2549 | (__v8df) __C, | |
| 2550 | (__mmask8) __U, | |
| 2551 | _MM_FROUND_CUR_DIRECTION); | |
| 2447 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2448 | _mm512_mask3_fmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { | |
| 2449 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2450 | (__mmask8)__U, (__v8df)_mm512_fmadd_pd(__A, __B, __C), (__v8df)__C); | |
| 2552 | 2451 | } |
| 2553 | 2452 | |
| 2554 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2555 | _mm512_mask3_fmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) | |
| 2556 | { | |
| 2557 | return (__m512d) __builtin_ia32_vfmaddpd512_mask3 ((__v8df) __A, | |
| 2558 | (__v8df) __B, | |
| 2559 | (__v8df) __C, | |
| 2560 | (__mmask8) __U, | |
| 2561 | _MM_FROUND_CUR_DIRECTION); | |
| 2453 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2454 | _mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { | |
| 2455 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2456 | (__mmask8)__U, (__v8df)_mm512_fmadd_pd(__A, __B, __C), | |
| 2457 | (__v8df)_mm512_setzero_pd()); | |
| 2562 | 2458 | } |
| 2563 | 2459 | |
| 2564 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2565 | _mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) | |
| 2566 | { | |
| 2567 | return (__m512d) __builtin_ia32_vfmaddpd512_maskz ((__v8df) __A, | |
| 2568 | (__v8df) __B, | |
| 2569 | (__v8df) __C, | |
| 2570 | (__mmask8) __U, | |
| 2571 | _MM_FROUND_CUR_DIRECTION); | |
| 2460 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2461 | _mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C) { | |
| 2462 | return (__m512d)__builtin_elementwise_fma((__v8df)__A, (__v8df)__B, | |
| 2463 | -(__v8df)__C); | |
| 2572 | 2464 | } |
| 2573 | 2465 | |
| 2574 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2575 | _mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C) | |
| 2576 | { | |
| 2577 | return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, | |
| 2578 | (__v8df) __B, | |
| 2579 | -(__v8df) __C, | |
| 2580 | (__mmask8) -1, | |
| 2581 | _MM_FROUND_CUR_DIRECTION); | |
| 2466 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2467 | _mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { | |
| 2468 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2469 | (__mmask8)__U, (__v8df)_mm512_fmsub_pd(__A, __B, __C), (__v8df)__A); | |
| 2582 | 2470 | } |
| 2583 | 2471 | |
| 2584 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2585 | _mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) | |
| 2586 | { | |
| 2587 | return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, | |
| 2588 | (__v8df) __B, | |
| 2589 | -(__v8df) __C, | |
| 2590 | (__mmask8) __U, | |
| 2591 | _MM_FROUND_CUR_DIRECTION); | |
| 2472 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2473 | _mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { | |
| 2474 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2475 | (__mmask8)__U, (__v8df)_mm512_fmsub_pd(__A, __B, __C), (__v8df)__C); | |
| 2592 | 2476 | } |
| 2593 | 2477 | |
| 2594 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2595 | _mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) | |
| 2596 | { | |
| 2597 | return (__m512d) __builtin_ia32_vfmaddpd512_maskz ((__v8df) __A, | |
| 2598 | (__v8df) __B, | |
| 2599 | -(__v8df) __C, | |
| 2600 | (__mmask8) __U, | |
| 2601 | _MM_FROUND_CUR_DIRECTION); | |
| 2478 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2479 | _mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { | |
| 2480 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2481 | (__mmask8)__U, (__v8df)_mm512_fmsub_pd(__A, __B, __C), | |
| 2482 | (__v8df)_mm512_setzero_pd()); | |
| 2602 | 2483 | } |
| 2603 | 2484 | |
| 2604 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2605 | _mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C) | |
| 2606 | { | |
| 2607 | return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, | |
| 2608 | -(__v8df) __B, | |
| 2609 | (__v8df) __C, | |
| 2610 | (__mmask8) -1, | |
| 2611 | _MM_FROUND_CUR_DIRECTION); | |
| 2485 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2486 | _mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C) { | |
| 2487 | return (__m512d)__builtin_elementwise_fma(-(__v8df)__A, (__v8df)__B, | |
| 2488 | (__v8df)__C); | |
| 2612 | 2489 | } |
| 2613 | 2490 | |
| 2614 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2615 | _mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) | |
| 2616 | { | |
| 2617 | return (__m512d) __builtin_ia32_vfmaddpd512_mask3 (-(__v8df) __A, | |
| 2618 | (__v8df) __B, | |
| 2619 | (__v8df) __C, | |
| 2620 | (__mmask8) __U, | |
| 2621 | _MM_FROUND_CUR_DIRECTION); | |
| 2491 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2492 | _mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { | |
| 2493 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2494 | (__mmask8)__U, (__v8df)_mm512_fnmadd_pd(__A, __B, __C), (__v8df)__A); | |
| 2622 | 2495 | } |
| 2623 | 2496 | |
| 2624 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2625 | _mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) | |
| 2626 | { | |
| 2627 | return (__m512d) __builtin_ia32_vfmaddpd512_maskz (-(__v8df) __A, | |
| 2628 | (__v8df) __B, | |
| 2629 | (__v8df) __C, | |
| 2630 | (__mmask8) __U, | |
| 2631 | _MM_FROUND_CUR_DIRECTION); | |
| 2497 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2498 | _mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { | |
| 2499 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2500 | (__mmask8)__U, (__v8df)_mm512_fnmadd_pd(__A, __B, __C), (__v8df)__C); | |
| 2632 | 2501 | } |
| 2633 | 2502 | |
| 2634 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2635 | _mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C) | |
| 2636 | { | |
| 2637 | return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, | |
| 2638 | -(__v8df) __B, | |
| 2639 | -(__v8df) __C, | |
| 2640 | (__mmask8) -1, | |
| 2641 | _MM_FROUND_CUR_DIRECTION); | |
| 2503 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2504 | _mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { | |
| 2505 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2506 | (__mmask8)__U, (__v8df)_mm512_fnmadd_pd(__A, __B, __C), | |
| 2507 | (__v8df)_mm512_setzero_pd()); | |
| 2642 | 2508 | } |
| 2643 | 2509 | |
| 2644 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 2645 | _mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) | |
| 2646 | { | |
| 2647 | return (__m512d) __builtin_ia32_vfmaddpd512_maskz (-(__v8df) __A, | |
| 2648 | (__v8df) __B, | |
| 2649 | -(__v8df) __C, | |
| 2650 | (__mmask8) __U, | |
| 2651 | _MM_FROUND_CUR_DIRECTION); | |
| 2510 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2511 | _mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C) { | |
| 2512 | return (__m512d)__builtin_elementwise_fma(-(__v8df)__A, (__v8df)__B, | |
| 2513 | -(__v8df)__C); | |
| 2514 | } | |
| 2515 | ||
| 2516 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2517 | _mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { | |
| 2518 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2519 | (__mmask8)__U, (__v8df)_mm512_fnmsub_pd(__A, __B, __C), (__v8df)__A); | |
| 2520 | } | |
| 2521 | ||
| 2522 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2523 | _mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { | |
| 2524 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2525 | (__mmask8)__U, (__v8df)_mm512_fnmsub_pd(__A, __B, __C), (__v8df)__C); | |
| 2526 | } | |
| 2527 | ||
| 2528 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2529 | _mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { | |
| 2530 | return (__m512d)__builtin_ia32_selectpd_512( | |
| 2531 | (__mmask8)__U, (__v8df)_mm512_fnmsub_pd(__A, __B, __C), | |
| 2532 | (__v8df)_mm512_setzero_pd()); | |
| 2652 | 2533 | } |
| 2653 | 2534 | |
| 2654 | 2535 | #define _mm512_fmadd_round_ps(A, B, C, R) \ |
| ... | ... | @@ -2734,125 +2615,104 @@ _mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) |
| 2734 | 2615 | -(__v16sf)(__m512)(C), \ |
| 2735 | 2616 | (__mmask16)(U), (int)(R))) |
| 2736 | 2617 | |
| 2618 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2619 | _mm512_fmadd_ps(__m512 __A, __m512 __B, __m512 __C) { | |
| 2620 | return (__m512)__builtin_elementwise_fma((__v16sf)__A, (__v16sf)__B, | |
| 2621 | (__v16sf)__C); | |
| 2622 | } | |
| 2737 | 2623 | |
| 2738 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2739 | _mm512_fmadd_ps(__m512 __A, __m512 __B, __m512 __C) | |
| 2740 | { | |
| 2741 | return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, | |
| 2742 | (__v16sf) __B, | |
| 2743 | (__v16sf) __C, | |
| 2744 | (__mmask16) -1, | |
| 2745 | _MM_FROUND_CUR_DIRECTION); | |
| 2624 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2625 | _mm512_mask_fmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { | |
| 2626 | return (__m512)__builtin_ia32_selectps_512( | |
| 2627 | (__mmask16)__U, (__v16sf)_mm512_fmadd_ps(__A, __B, __C), (__v16sf)__A); | |
| 2746 | 2628 | } |
| 2747 | 2629 | |
| 2748 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2749 | _mm512_mask_fmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) | |
| 2750 | { | |
| 2751 | return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, | |
| 2752 | (__v16sf) __B, | |
| 2753 | (__v16sf) __C, | |
| 2754 | (__mmask16) __U, | |
| 2755 | _MM_FROUND_CUR_DIRECTION); | |
| 2630 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2631 | _mm512_mask3_fmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { | |
| 2632 | return (__m512)__builtin_ia32_selectps_512( | |
| 2633 | (__mmask16)__U, (__v16sf)_mm512_fmadd_ps(__A, __B, __C), (__v16sf)__C); | |
| 2756 | 2634 | } |
| 2757 | 2635 | |
| 2758 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2759 | _mm512_mask3_fmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) | |
| 2760 | { | |
| 2761 | return (__m512) __builtin_ia32_vfmaddps512_mask3 ((__v16sf) __A, | |
| 2762 | (__v16sf) __B, | |
| 2763 | (__v16sf) __C, | |
| 2764 | (__mmask16) __U, | |
| 2765 | _MM_FROUND_CUR_DIRECTION); | |
| 2636 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2637 | _mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { | |
| 2638 | return (__m512)__builtin_ia32_selectps_512( | |
| 2639 | (__mmask16)__U, (__v16sf)_mm512_fmadd_ps(__A, __B, __C), | |
| 2640 | (__v16sf)_mm512_setzero_ps()); | |
| 2766 | 2641 | } |
| 2767 | 2642 | |
| 2768 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2769 | _mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) | |
| 2770 | { | |
| 2771 | return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A, | |
| 2772 | (__v16sf) __B, | |
| 2773 | (__v16sf) __C, | |
| 2774 | (__mmask16) __U, | |
| 2775 | _MM_FROUND_CUR_DIRECTION); | |
| 2643 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2644 | _mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C) { | |
| 2645 | return (__m512)__builtin_elementwise_fma((__v16sf)__A, (__v16sf)__B, | |
| 2646 | -(__v16sf)__C); | |
| 2776 | 2647 | } |
| 2777 | 2648 | |
| 2778 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2779 | _mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C) | |
| 2780 | { | |
| 2781 | return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, | |
| 2782 | (__v16sf) __B, | |
| 2783 | -(__v16sf) __C, | |
| 2784 | (__mmask16) -1, | |
| 2785 | _MM_FROUND_CUR_DIRECTION); | |
| 2649 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2650 | _mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { | |
| 2651 | return (__m512)__builtin_ia32_selectps_512( | |
| 2652 | (__mmask16)__U, (__v16sf)_mm512_fmsub_ps(__A, __B, __C), (__v16sf)__A); | |
| 2786 | 2653 | } |
| 2787 | 2654 | |
| 2788 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2789 | _mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) | |
| 2790 | { | |
| 2791 | return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, | |
| 2792 | (__v16sf) __B, | |
| 2793 | -(__v16sf) __C, | |
| 2794 | (__mmask16) __U, | |
| 2795 | _MM_FROUND_CUR_DIRECTION); | |
| 2655 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2656 | _mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { | |
| 2657 | return (__m512)__builtin_ia32_selectps_512( | |
| 2658 | (__mmask16)__U, (__v16sf)_mm512_fmsub_ps(__A, __B, __C), (__v16sf)__C); | |
| 2659 | } | |
| 2660 | ||
| 2661 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2662 | _mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { | |
| 2663 | return (__m512)__builtin_ia32_selectps_512( | |
| 2664 | (__mmask16)__U, (__v16sf)_mm512_fmsub_ps(__A, __B, __C), | |
| 2665 | (__v16sf)_mm512_setzero_ps()); | |
| 2666 | } | |
| 2667 | ||
| 2668 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2669 | _mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C) { | |
| 2670 | return (__m512)__builtin_elementwise_fma(-(__v16sf)__A, (__v16sf)__B, | |
| 2671 | (__v16sf)__C); | |
| 2796 | 2672 | } |
| 2797 | 2673 | |
| 2798 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2799 | _mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) | |
| 2800 | { | |
| 2801 | return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A, | |
| 2802 | (__v16sf) __B, | |
| 2803 | -(__v16sf) __C, | |
| 2804 | (__mmask16) __U, | |
| 2805 | _MM_FROUND_CUR_DIRECTION); | |
| 2674 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2675 | _mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { | |
| 2676 | return (__m512)__builtin_ia32_selectps_512( | |
| 2677 | (__mmask16)__U, (__v16sf)_mm512_fnmadd_ps(__A, __B, __C), (__v16sf)__A); | |
| 2806 | 2678 | } |
| 2807 | 2679 | |
| 2808 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2809 | _mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C) | |
| 2810 | { | |
| 2811 | return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, | |
| 2812 | -(__v16sf) __B, | |
| 2813 | (__v16sf) __C, | |
| 2814 | (__mmask16) -1, | |
| 2815 | _MM_FROUND_CUR_DIRECTION); | |
| 2680 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2681 | _mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { | |
| 2682 | return (__m512)__builtin_ia32_selectps_512( | |
| 2683 | (__mmask16)__U, (__v16sf)_mm512_fnmadd_ps(__A, __B, __C), (__v16sf)__C); | |
| 2816 | 2684 | } |
| 2817 | 2685 | |
| 2818 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2819 | _mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) | |
| 2820 | { | |
| 2821 | return (__m512) __builtin_ia32_vfmaddps512_mask3 (-(__v16sf) __A, | |
| 2822 | (__v16sf) __B, | |
| 2823 | (__v16sf) __C, | |
| 2824 | (__mmask16) __U, | |
| 2825 | _MM_FROUND_CUR_DIRECTION); | |
| 2686 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2687 | _mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { | |
| 2688 | return (__m512)__builtin_ia32_selectps_512( | |
| 2689 | (__mmask16)__U, (__v16sf)_mm512_fnmadd_ps(__A, __B, __C), | |
| 2690 | (__v16sf)_mm512_setzero_ps()); | |
| 2826 | 2691 | } |
| 2827 | 2692 | |
| 2828 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2829 | _mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) | |
| 2830 | { | |
| 2831 | return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A, | |
| 2832 | (__v16sf) __B, | |
| 2833 | (__v16sf) __C, | |
| 2834 | (__mmask16) __U, | |
| 2835 | _MM_FROUND_CUR_DIRECTION); | |
| 2693 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2694 | _mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C) { | |
| 2695 | return (__m512)__builtin_elementwise_fma(-(__v16sf)__A, (__v16sf)__B, | |
| 2696 | -(__v16sf)__C); | |
| 2836 | 2697 | } |
| 2837 | 2698 | |
| 2838 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2839 | _mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C) | |
| 2840 | { | |
| 2841 | return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, | |
| 2842 | -(__v16sf) __B, | |
| 2843 | -(__v16sf) __C, | |
| 2844 | (__mmask16) -1, | |
| 2845 | _MM_FROUND_CUR_DIRECTION); | |
| 2699 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2700 | _mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { | |
| 2701 | return (__m512)__builtin_ia32_selectps_512( | |
| 2702 | (__mmask16)__U, (__v16sf)_mm512_fnmsub_ps(__A, __B, __C), (__v16sf)__A); | |
| 2846 | 2703 | } |
| 2847 | 2704 | |
| 2848 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 2849 | _mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) | |
| 2850 | { | |
| 2851 | return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A, | |
| 2852 | (__v16sf) __B, | |
| 2853 | -(__v16sf) __C, | |
| 2854 | (__mmask16) __U, | |
| 2855 | _MM_FROUND_CUR_DIRECTION); | |
| 2705 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2706 | _mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { | |
| 2707 | return (__m512)__builtin_ia32_selectps_512( | |
| 2708 | (__mmask16)__U, (__v16sf)_mm512_fnmsub_ps(__A, __B, __C), (__v16sf)__C); | |
| 2709 | } | |
| 2710 | ||
| 2711 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 2712 | _mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { | |
| 2713 | return (__m512)__builtin_ia32_selectps_512( | |
| 2714 | (__mmask16)__U, (__v16sf)_mm512_fnmsub_ps(__A, __B, __C), | |
| 2715 | (__v16sf)_mm512_setzero_ps()); | |
| 2856 | 2716 | } |
| 2857 | 2717 | |
| 2858 | 2718 | #define _mm512_fmaddsub_round_pd(A, B, C, R) \ |
| ... | ... | @@ -3099,33 +2959,12 @@ _mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) |
| 3099 | 2959 | (__v8df)(__m512d)(C), \ |
| 3100 | 2960 | (__mmask8)(U), (int)(R))) |
| 3101 | 2961 | |
| 3102 | ||
| 3103 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3104 | _mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) | |
| 3105 | { | |
| 3106 | return (__m512d)__builtin_ia32_vfmsubpd512_mask3 ((__v8df) __A, | |
| 3107 | (__v8df) __B, | |
| 3108 | (__v8df) __C, | |
| 3109 | (__mmask8) __U, | |
| 3110 | _MM_FROUND_CUR_DIRECTION); | |
| 3111 | } | |
| 3112 | ||
| 3113 | 2962 | #define _mm512_mask3_fmsub_round_ps(A, B, C, U, R) \ |
| 3114 | 2963 | ((__m512)__builtin_ia32_vfmsubps512_mask3((__v16sf)(__m512)(A), \ |
| 3115 | 2964 | (__v16sf)(__m512)(B), \ |
| 3116 | 2965 | (__v16sf)(__m512)(C), \ |
| 3117 | 2966 | (__mmask16)(U), (int)(R))) |
| 3118 | 2967 | |
| 3119 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3120 | _mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) | |
| 3121 | { | |
| 3122 | return (__m512)__builtin_ia32_vfmsubps512_mask3 ((__v16sf) __A, | |
| 3123 | (__v16sf) __B, | |
| 3124 | (__v16sf) __C, | |
| 3125 | (__mmask16) __U, | |
| 3126 | _MM_FROUND_CUR_DIRECTION); | |
| 3127 | } | |
| 3128 | ||
| 3129 | 2968 | #define _mm512_mask3_fmsubadd_round_pd(A, B, C, U, R) \ |
| 3130 | 2969 | ((__m512d)__builtin_ia32_vfmsubaddpd512_mask3((__v8df)(__m512d)(A), \ |
| 3131 | 2970 | (__v8df)(__m512d)(B), \ |
| ... | ... | @@ -3166,34 +3005,12 @@ _mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) |
| 3166 | 3005 | (__v8df)(__m512d)(C), \ |
| 3167 | 3006 | (__mmask8)(U), (int)(R))) |
| 3168 | 3007 | |
| 3169 | ||
| 3170 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3171 | _mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) | |
| 3172 | { | |
| 3173 | return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, | |
| 3174 | -(__v8df) __B, | |
| 3175 | (__v8df) __C, | |
| 3176 | (__mmask8) __U, | |
| 3177 | _MM_FROUND_CUR_DIRECTION); | |
| 3178 | } | |
| 3179 | ||
| 3180 | 3008 | #define _mm512_mask_fnmadd_round_ps(A, U, B, C, R) \ |
| 3181 | 3009 | ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ |
| 3182 | 3010 | -(__v16sf)(__m512)(B), \ |
| 3183 | 3011 | (__v16sf)(__m512)(C), \ |
| 3184 | 3012 | (__mmask16)(U), (int)(R))) |
| 3185 | 3013 | |
| 3186 | ||
| 3187 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3188 | _mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) | |
| 3189 | { | |
| 3190 | return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, | |
| 3191 | -(__v16sf) __B, | |
| 3192 | (__v16sf) __C, | |
| 3193 | (__mmask16) __U, | |
| 3194 | _MM_FROUND_CUR_DIRECTION); | |
| 3195 | } | |
| 3196 | ||
| 3197 | 3014 | #define _mm512_mask_fnmsub_round_pd(A, U, B, C, R) \ |
| 3198 | 3015 | ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \ |
| 3199 | 3016 | -(__v8df)(__m512d)(B), \ |
| ... | ... | @@ -3207,27 +3024,6 @@ _mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) |
| 3207 | 3024 | (__v8df)(__m512d)(C), \ |
| 3208 | 3025 | (__mmask8)(U), (int)(R))) |
| 3209 | 3026 | |
| 3210 | ||
| 3211 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3212 | _mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) | |
| 3213 | { | |
| 3214 | return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, | |
| 3215 | -(__v8df) __B, | |
| 3216 | -(__v8df) __C, | |
| 3217 | (__mmask8) __U, | |
| 3218 | _MM_FROUND_CUR_DIRECTION); | |
| 3219 | } | |
| 3220 | ||
| 3221 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3222 | _mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) | |
| 3223 | { | |
| 3224 | return (__m512d) __builtin_ia32_vfmsubpd512_mask3 (-(__v8df) __A, | |
| 3225 | (__v8df) __B, | |
| 3226 | (__v8df) __C, | |
| 3227 | (__mmask8) __U, | |
| 3228 | _MM_FROUND_CUR_DIRECTION); | |
| 3229 | } | |
| 3230 | ||
| 3231 | 3027 | #define _mm512_mask_fnmsub_round_ps(A, U, B, C, R) \ |
| 3232 | 3028 | ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ |
| 3233 | 3029 | -(__v16sf)(__m512)(B), \ |
| ... | ... | @@ -3241,94 +3037,63 @@ _mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) |
| 3241 | 3037 | (__v16sf)(__m512)(C), \ |
| 3242 | 3038 | (__mmask16)(U), (int)(R))) |
| 3243 | 3039 | |
| 3244 | ||
| 3245 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3246 | _mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) | |
| 3247 | { | |
| 3248 | return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, | |
| 3249 | -(__v16sf) __B, | |
| 3250 | -(__v16sf) __C, | |
| 3251 | (__mmask16) __U, | |
| 3252 | _MM_FROUND_CUR_DIRECTION); | |
| 3253 | } | |
| 3254 | ||
| 3255 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3256 | _mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) | |
| 3257 | { | |
| 3258 | return (__m512) __builtin_ia32_vfmsubps512_mask3 (-(__v16sf) __A, | |
| 3259 | (__v16sf) __B, | |
| 3260 | (__v16sf) __C, | |
| 3261 | (__mmask16) __U, | |
| 3262 | _MM_FROUND_CUR_DIRECTION); | |
| 3263 | } | |
| 3264 | ||
| 3265 | ||
| 3266 | ||
| 3267 | 3040 | /* Vector permutations */ |
| 3268 | 3041 | |
| 3269 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 3270 | _mm512_permutex2var_epi32(__m512i __A, __m512i __I, __m512i __B) | |
| 3271 | { | |
| 3042 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3043 | _mm512_permutex2var_epi32(__m512i __A, __m512i __I, __m512i __B) { | |
| 3272 | 3044 | return (__m512i)__builtin_ia32_vpermi2vard512((__v16si)__A, (__v16si) __I, |
| 3273 | 3045 | (__v16si) __B); |
| 3274 | 3046 | } |
| 3275 | 3047 | |
| 3276 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 3048 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3277 | 3049 | _mm512_mask_permutex2var_epi32(__m512i __A, __mmask16 __U, __m512i __I, |
| 3278 | __m512i __B) | |
| 3279 | { | |
| 3050 | __m512i __B) { | |
| 3280 | 3051 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| 3281 | 3052 | (__v16si)_mm512_permutex2var_epi32(__A, __I, __B), |
| 3282 | 3053 | (__v16si)__A); |
| 3283 | 3054 | } |
| 3284 | 3055 | |
| 3285 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 3056 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3286 | 3057 | _mm512_mask2_permutex2var_epi32(__m512i __A, __m512i __I, __mmask16 __U, |
| 3287 | __m512i __B) | |
| 3288 | { | |
| 3058 | __m512i __B) { | |
| 3289 | 3059 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| 3290 | 3060 | (__v16si)_mm512_permutex2var_epi32(__A, __I, __B), |
| 3291 | 3061 | (__v16si)__I); |
| 3292 | 3062 | } |
| 3293 | 3063 | |
| 3294 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 3064 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3295 | 3065 | _mm512_maskz_permutex2var_epi32(__mmask16 __U, __m512i __A, __m512i __I, |
| 3296 | __m512i __B) | |
| 3297 | { | |
| 3066 | __m512i __B) { | |
| 3298 | 3067 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| 3299 | 3068 | (__v16si)_mm512_permutex2var_epi32(__A, __I, __B), |
| 3300 | 3069 | (__v16si)_mm512_setzero_si512()); |
| 3301 | 3070 | } |
| 3302 | 3071 | |
| 3303 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 3304 | _mm512_permutex2var_epi64(__m512i __A, __m512i __I, __m512i __B) | |
| 3305 | { | |
| 3072 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3073 | _mm512_permutex2var_epi64(__m512i __A, __m512i __I, __m512i __B) { | |
| 3306 | 3074 | return (__m512i)__builtin_ia32_vpermi2varq512((__v8di)__A, (__v8di) __I, |
| 3307 | 3075 | (__v8di) __B); |
| 3308 | 3076 | } |
| 3309 | 3077 | |
| 3310 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 3078 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3311 | 3079 | _mm512_mask_permutex2var_epi64(__m512i __A, __mmask8 __U, __m512i __I, |
| 3312 | __m512i __B) | |
| 3313 | { | |
| 3080 | __m512i __B) { | |
| 3314 | 3081 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| 3315 | 3082 | (__v8di)_mm512_permutex2var_epi64(__A, __I, __B), |
| 3316 | 3083 | (__v8di)__A); |
| 3317 | 3084 | } |
| 3318 | 3085 | |
| 3319 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 3086 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3320 | 3087 | _mm512_mask2_permutex2var_epi64(__m512i __A, __m512i __I, __mmask8 __U, |
| 3321 | __m512i __B) | |
| 3322 | { | |
| 3088 | __m512i __B) { | |
| 3323 | 3089 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| 3324 | 3090 | (__v8di)_mm512_permutex2var_epi64(__A, __I, __B), |
| 3325 | 3091 | (__v8di)__I); |
| 3326 | 3092 | } |
| 3327 | 3093 | |
| 3328 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 3094 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3329 | 3095 | _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I, |
| 3330 | __m512i __B) | |
| 3331 | { | |
| 3096 | __m512i __B) { | |
| 3332 | 3097 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| 3333 | 3098 | (__v8di)_mm512_permutex2var_epi64(__A, __I, __B), |
| 3334 | 3099 | (__v8di)_mm512_setzero_si512()); |
| ... | ... | @@ -3363,10 +3128,10 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I, |
| 3363 | 3128 | (__v16si)_mm512_setzero_si512())) |
| 3364 | 3129 | /* Vector Extract */ |
| 3365 | 3130 | |
| 3366 | #define _mm512_extractf64x4_pd(A, I) \ | |
| 3367 | ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(I), \ | |
| 3368 | (__v4df)_mm256_undefined_pd(), \ | |
| 3369 | (__mmask8)-1)) | |
| 3131 | #define _mm512_extractf64x4_pd(A, I) \ | |
| 3132 | ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(I), \ | |
| 3133 | (__v4df)_mm256_setzero_pd(), \ | |
| 3134 | (__mmask8) - 1)) | |
| 3370 | 3135 | |
| 3371 | 3136 | #define _mm512_mask_extractf64x4_pd(W, U, A, imm) \ |
| 3372 | 3137 | ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(imm), \ |
| ... | ... | @@ -3378,10 +3143,10 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I, |
| 3378 | 3143 | (__v4df)_mm256_setzero_pd(), \ |
| 3379 | 3144 | (__mmask8)(U))) |
| 3380 | 3145 | |
| 3381 | #define _mm512_extractf32x4_ps(A, I) \ | |
| 3382 | ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(I), \ | |
| 3383 | (__v4sf)_mm_undefined_ps(), \ | |
| 3384 | (__mmask8)-1)) | |
| 3146 | #define _mm512_extractf32x4_ps(A, I) \ | |
| 3147 | ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(I), \ | |
| 3148 | (__v4sf)_mm_setzero_ps(), \ | |
| 3149 | (__mmask8) - 1)) | |
| 3385 | 3150 | |
| 3386 | 3151 | #define _mm512_mask_extractf32x4_ps(W, U, A, imm) \ |
| 3387 | 3152 | ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \ |
| ... | ... | @@ -3395,33 +3160,29 @@ _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I, |
| 3395 | 3160 | |
| 3396 | 3161 | /* Vector Blend */ |
| 3397 | 3162 | |
| 3398 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 3399 | _mm512_mask_blend_pd(__mmask8 __U, __m512d __A, __m512d __W) | |
| 3400 | { | |
| 3163 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3164 | _mm512_mask_blend_pd(__mmask8 __U, __m512d __A, __m512d __W) { | |
| 3401 | 3165 | return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U, |
| 3402 | 3166 | (__v8df) __W, |
| 3403 | 3167 | (__v8df) __A); |
| 3404 | 3168 | } |
| 3405 | 3169 | |
| 3406 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 3407 | _mm512_mask_blend_ps(__mmask16 __U, __m512 __A, __m512 __W) | |
| 3408 | { | |
| 3170 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3171 | _mm512_mask_blend_ps(__mmask16 __U, __m512 __A, __m512 __W) { | |
| 3409 | 3172 | return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U, |
| 3410 | 3173 | (__v16sf) __W, |
| 3411 | 3174 | (__v16sf) __A); |
| 3412 | 3175 | } |
| 3413 | 3176 | |
| 3414 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 3415 | _mm512_mask_blend_epi64(__mmask8 __U, __m512i __A, __m512i __W) | |
| 3416 | { | |
| 3177 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3178 | _mm512_mask_blend_epi64(__mmask8 __U, __m512i __A, __m512i __W) { | |
| 3417 | 3179 | return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U, |
| 3418 | 3180 | (__v8di) __W, |
| 3419 | 3181 | (__v8di) __A); |
| 3420 | 3182 | } |
| 3421 | 3183 | |
| 3422 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 3423 | _mm512_mask_blend_epi32(__mmask16 __U, __m512i __A, __m512i __W) | |
| 3424 | { | |
| 3184 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3185 | _mm512_mask_blend_epi32(__mmask16 __U, __m512i __A, __m512i __W) { | |
| 3425 | 3186 | return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U, |
| 3426 | 3187 | (__v16si) __W, |
| 3427 | 3188 | (__v16si) __A); |
| ... | ... | @@ -3615,115 +3376,99 @@ _mm512_maskz_cvttps_epu32 (__mmask16 __U, __m512 __A) |
| 3615 | 3376 | (__v16sf)_mm512_setzero_ps(), \ |
| 3616 | 3377 | (__mmask16)(U), (int)(R))) |
| 3617 | 3378 | |
| 3618 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3619 | _mm512_cvtepu32_ps (__m512i __A) | |
| 3620 | { | |
| 3379 | static __inline__ __m512 | |
| 3380 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_cvtepu32_ps(__m512i __A) { | |
| 3621 | 3381 | return (__m512)__builtin_convertvector((__v16su)__A, __v16sf); |
| 3622 | 3382 | } |
| 3623 | 3383 | |
| 3624 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3625 | _mm512_mask_cvtepu32_ps (__m512 __W, __mmask16 __U, __m512i __A) | |
| 3626 | { | |
| 3384 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3385 | _mm512_mask_cvtepu32_ps(__m512 __W, __mmask16 __U, __m512i __A) { | |
| 3627 | 3386 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 3628 | 3387 | (__v16sf)_mm512_cvtepu32_ps(__A), |
| 3629 | 3388 | (__v16sf)__W); |
| 3630 | 3389 | } |
| 3631 | 3390 | |
| 3632 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3633 | _mm512_maskz_cvtepu32_ps (__mmask16 __U, __m512i __A) | |
| 3634 | { | |
| 3391 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3392 | _mm512_maskz_cvtepu32_ps(__mmask16 __U, __m512i __A) { | |
| 3635 | 3393 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 3636 | 3394 | (__v16sf)_mm512_cvtepu32_ps(__A), |
| 3637 | 3395 | (__v16sf)_mm512_setzero_ps()); |
| 3638 | 3396 | } |
| 3639 | 3397 | |
| 3640 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 3641 | _mm512_cvtepi32_pd(__m256i __A) | |
| 3642 | { | |
| 3398 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3399 | _mm512_cvtepi32_pd(__m256i __A) { | |
| 3643 | 3400 | return (__m512d)__builtin_convertvector((__v8si)__A, __v8df); |
| 3644 | 3401 | } |
| 3645 | 3402 | |
| 3646 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3647 | _mm512_mask_cvtepi32_pd (__m512d __W, __mmask8 __U, __m256i __A) | |
| 3648 | { | |
| 3403 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3404 | _mm512_mask_cvtepi32_pd(__m512d __W, __mmask8 __U, __m256i __A) { | |
| 3649 | 3405 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, |
| 3650 | 3406 | (__v8df)_mm512_cvtepi32_pd(__A), |
| 3651 | 3407 | (__v8df)__W); |
| 3652 | 3408 | } |
| 3653 | 3409 | |
| 3654 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3655 | _mm512_maskz_cvtepi32_pd (__mmask8 __U, __m256i __A) | |
| 3656 | { | |
| 3410 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3411 | _mm512_maskz_cvtepi32_pd(__mmask8 __U, __m256i __A) { | |
| 3657 | 3412 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, |
| 3658 | 3413 | (__v8df)_mm512_cvtepi32_pd(__A), |
| 3659 | 3414 | (__v8df)_mm512_setzero_pd()); |
| 3660 | 3415 | } |
| 3661 | 3416 | |
| 3662 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3663 | _mm512_cvtepi32lo_pd(__m512i __A) | |
| 3664 | { | |
| 3417 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3418 | _mm512_cvtepi32lo_pd(__m512i __A) { | |
| 3665 | 3419 | return (__m512d) _mm512_cvtepi32_pd(_mm512_castsi512_si256(__A)); |
| 3666 | 3420 | } |
| 3667 | 3421 | |
| 3668 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3669 | _mm512_mask_cvtepi32lo_pd(__m512d __W, __mmask8 __U,__m512i __A) | |
| 3670 | { | |
| 3422 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3423 | _mm512_mask_cvtepi32lo_pd(__m512d __W, __mmask8 __U, __m512i __A) { | |
| 3671 | 3424 | return (__m512d) _mm512_mask_cvtepi32_pd(__W, __U, _mm512_castsi512_si256(__A)); |
| 3672 | 3425 | } |
| 3673 | 3426 | |
| 3674 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3675 | _mm512_cvtepi32_ps (__m512i __A) | |
| 3676 | { | |
| 3427 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3428 | _mm512_cvtepi32_ps(__m512i __A) { | |
| 3677 | 3429 | return (__m512)__builtin_convertvector((__v16si)__A, __v16sf); |
| 3678 | 3430 | } |
| 3679 | 3431 | |
| 3680 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3681 | _mm512_mask_cvtepi32_ps (__m512 __W, __mmask16 __U, __m512i __A) | |
| 3682 | { | |
| 3432 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3433 | _mm512_mask_cvtepi32_ps(__m512 __W, __mmask16 __U, __m512i __A) { | |
| 3683 | 3434 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 3684 | 3435 | (__v16sf)_mm512_cvtepi32_ps(__A), |
| 3685 | 3436 | (__v16sf)__W); |
| 3686 | 3437 | } |
| 3687 | 3438 | |
| 3688 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3689 | _mm512_maskz_cvtepi32_ps (__mmask16 __U, __m512i __A) | |
| 3690 | { | |
| 3439 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3440 | _mm512_maskz_cvtepi32_ps(__mmask16 __U, __m512i __A) { | |
| 3691 | 3441 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 3692 | 3442 | (__v16sf)_mm512_cvtepi32_ps(__A), |
| 3693 | 3443 | (__v16sf)_mm512_setzero_ps()); |
| 3694 | 3444 | } |
| 3695 | 3445 | |
| 3696 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 3697 | _mm512_cvtepu32_pd(__m256i __A) | |
| 3698 | { | |
| 3446 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3447 | _mm512_cvtepu32_pd(__m256i __A) { | |
| 3699 | 3448 | return (__m512d)__builtin_convertvector((__v8su)__A, __v8df); |
| 3700 | 3449 | } |
| 3701 | 3450 | |
| 3702 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3703 | _mm512_mask_cvtepu32_pd (__m512d __W, __mmask8 __U, __m256i __A) | |
| 3704 | { | |
| 3451 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3452 | _mm512_mask_cvtepu32_pd(__m512d __W, __mmask8 __U, __m256i __A) { | |
| 3705 | 3453 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, |
| 3706 | 3454 | (__v8df)_mm512_cvtepu32_pd(__A), |
| 3707 | 3455 | (__v8df)__W); |
| 3708 | 3456 | } |
| 3709 | 3457 | |
| 3710 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3711 | _mm512_maskz_cvtepu32_pd (__mmask8 __U, __m256i __A) | |
| 3712 | { | |
| 3458 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3459 | _mm512_maskz_cvtepu32_pd(__mmask8 __U, __m256i __A) { | |
| 3713 | 3460 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, |
| 3714 | 3461 | (__v8df)_mm512_cvtepu32_pd(__A), |
| 3715 | 3462 | (__v8df)_mm512_setzero_pd()); |
| 3716 | 3463 | } |
| 3717 | 3464 | |
| 3718 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3719 | _mm512_cvtepu32lo_pd(__m512i __A) | |
| 3720 | { | |
| 3465 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3466 | _mm512_cvtepu32lo_pd(__m512i __A) { | |
| 3721 | 3467 | return (__m512d) _mm512_cvtepu32_pd(_mm512_castsi512_si256(__A)); |
| 3722 | 3468 | } |
| 3723 | 3469 | |
| 3724 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 3725 | _mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U,__m512i __A) | |
| 3726 | { | |
| 3470 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3471 | _mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U, __m512i __A) { | |
| 3727 | 3472 | return (__m512d) _mm512_mask_cvtepu32_pd(__W, __U, _mm512_castsi512_si256(__A)); |
| 3728 | 3473 | } |
| 3729 | 3474 | |
| ... | ... | @@ -3742,44 +3487,38 @@ _mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U,__m512i __A) |
| 3742 | 3487 | (__v8sf)_mm256_setzero_ps(), \ |
| 3743 | 3488 | (__mmask8)(U), (int)(R))) |
| 3744 | 3489 | |
| 3745 | static __inline__ __m256 __DEFAULT_FN_ATTRS512 | |
| 3746 | _mm512_cvtpd_ps (__m512d __A) | |
| 3747 | { | |
| 3748 | return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A, | |
| 3749 | (__v8sf) _mm256_undefined_ps (), | |
| 3750 | (__mmask8) -1, | |
| 3751 | _MM_FROUND_CUR_DIRECTION); | |
| 3490 | static __inline__ __m256 | |
| 3491 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_cvtpd_ps(__m512d __A) { | |
| 3492 | return (__m256)__builtin_ia32_cvtpd2ps512_mask( | |
| 3493 | (__v8df)__A, (__v8sf)_mm256_setzero_ps(), (__mmask8)-1, | |
| 3494 | _MM_FROUND_CUR_DIRECTION); | |
| 3752 | 3495 | } |
| 3753 | 3496 | |
| 3754 | static __inline__ __m256 __DEFAULT_FN_ATTRS512 | |
| 3755 | _mm512_mask_cvtpd_ps (__m256 __W, __mmask8 __U, __m512d __A) | |
| 3756 | { | |
| 3497 | static __inline__ __m256 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3498 | _mm512_mask_cvtpd_ps(__m256 __W, __mmask8 __U, __m512d __A) { | |
| 3757 | 3499 | return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A, |
| 3758 | 3500 | (__v8sf) __W, |
| 3759 | 3501 | (__mmask8) __U, |
| 3760 | 3502 | _MM_FROUND_CUR_DIRECTION); |
| 3761 | 3503 | } |
| 3762 | 3504 | |
| 3763 | static __inline__ __m256 __DEFAULT_FN_ATTRS512 | |
| 3764 | _mm512_maskz_cvtpd_ps (__mmask8 __U, __m512d __A) | |
| 3765 | { | |
| 3505 | static __inline__ __m256 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3506 | _mm512_maskz_cvtpd_ps(__mmask8 __U, __m512d __A) { | |
| 3766 | 3507 | return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A, |
| 3767 | 3508 | (__v8sf) _mm256_setzero_ps (), |
| 3768 | 3509 | (__mmask8) __U, |
| 3769 | 3510 | _MM_FROUND_CUR_DIRECTION); |
| 3770 | 3511 | } |
| 3771 | 3512 | |
| 3772 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3773 | _mm512_cvtpd_pslo (__m512d __A) | |
| 3774 | { | |
| 3513 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3514 | _mm512_cvtpd_pslo(__m512d __A) { | |
| 3775 | 3515 | return (__m512) __builtin_shufflevector((__v8sf) _mm512_cvtpd_ps(__A), |
| 3776 | 3516 | (__v8sf) _mm256_setzero_ps (), |
| 3777 | 3517 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); |
| 3778 | 3518 | } |
| 3779 | 3519 | |
| 3780 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 3781 | _mm512_mask_cvtpd_pslo (__m512 __W, __mmask8 __U,__m512d __A) | |
| 3782 | { | |
| 3520 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3521 | _mm512_mask_cvtpd_pslo(__m512 __W, __mmask8 __U, __m512d __A) { | |
| 3783 | 3522 | return (__m512) __builtin_shufflevector ( |
| 3784 | 3523 | (__v8sf) _mm512_mask_cvtpd_ps (_mm512_castps512_ps256(__W), |
| 3785 | 3524 | __U, __A), |
| ... | ... | @@ -4123,9 +3862,8 @@ _mm512_cvtss_f32(__m512 __a) |
| 4123 | 3862 | |
| 4124 | 3863 | /* Unpack and Interleave */ |
| 4125 | 3864 | |
| 4126 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 4127 | _mm512_unpackhi_pd(__m512d __a, __m512d __b) | |
| 4128 | { | |
| 3865 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3866 | _mm512_unpackhi_pd(__m512d __a, __m512d __b) { | |
| 4129 | 3867 | return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b, |
| 4130 | 3868 | 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6); |
| 4131 | 3869 | } |
| ... | ... | @@ -4146,9 +3884,8 @@ _mm512_maskz_unpackhi_pd(__mmask8 __U, __m512d __A, __m512d __B) |
| 4146 | 3884 | (__v8df)_mm512_setzero_pd()); |
| 4147 | 3885 | } |
| 4148 | 3886 | |
| 4149 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 4150 | _mm512_unpacklo_pd(__m512d __a, __m512d __b) | |
| 4151 | { | |
| 3887 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3888 | _mm512_unpacklo_pd(__m512d __a, __m512d __b) { | |
| 4152 | 3889 | return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b, |
| 4153 | 3890 | 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6); |
| 4154 | 3891 | } |
| ... | ... | @@ -4169,9 +3906,8 @@ _mm512_maskz_unpacklo_pd (__mmask8 __U, __m512d __A, __m512d __B) |
| 4169 | 3906 | (__v8df)_mm512_setzero_pd()); |
| 4170 | 3907 | } |
| 4171 | 3908 | |
| 4172 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 4173 | _mm512_unpackhi_ps(__m512 __a, __m512 __b) | |
| 4174 | { | |
| 3909 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3910 | _mm512_unpackhi_ps(__m512 __a, __m512 __b) { | |
| 4175 | 3911 | return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b, |
| 4176 | 3912 | 2, 18, 3, 19, |
| 4177 | 3913 | 2+4, 18+4, 3+4, 19+4, |
| ... | ... | @@ -4195,9 +3931,8 @@ _mm512_maskz_unpackhi_ps (__mmask16 __U, __m512 __A, __m512 __B) |
| 4195 | 3931 | (__v16sf)_mm512_setzero_ps()); |
| 4196 | 3932 | } |
| 4197 | 3933 | |
| 4198 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 4199 | _mm512_unpacklo_ps(__m512 __a, __m512 __b) | |
| 4200 | { | |
| 3934 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3935 | _mm512_unpacklo_ps(__m512 __a, __m512 __b) { | |
| 4201 | 3936 | return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b, |
| 4202 | 3937 | 0, 16, 1, 17, |
| 4203 | 3938 | 0+4, 16+4, 1+4, 17+4, |
| ... | ... | @@ -4221,9 +3956,8 @@ _mm512_maskz_unpacklo_ps (__mmask16 __U, __m512 __A, __m512 __B) |
| 4221 | 3956 | (__v16sf)_mm512_setzero_ps()); |
| 4222 | 3957 | } |
| 4223 | 3958 | |
| 4224 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4225 | _mm512_unpackhi_epi32(__m512i __A, __m512i __B) | |
| 4226 | { | |
| 3959 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3960 | _mm512_unpackhi_epi32(__m512i __A, __m512i __B) { | |
| 4227 | 3961 | return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B, |
| 4228 | 3962 | 2, 18, 3, 19, |
| 4229 | 3963 | 2+4, 18+4, 3+4, 19+4, |
| ... | ... | @@ -4247,9 +3981,8 @@ _mm512_maskz_unpackhi_epi32(__mmask16 __U, __m512i __A, __m512i __B) |
| 4247 | 3981 | (__v16si)_mm512_setzero_si512()); |
| 4248 | 3982 | } |
| 4249 | 3983 | |
| 4250 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4251 | _mm512_unpacklo_epi32(__m512i __A, __m512i __B) | |
| 4252 | { | |
| 3984 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3985 | _mm512_unpacklo_epi32(__m512i __A, __m512i __B) { | |
| 4253 | 3986 | return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B, |
| 4254 | 3987 | 0, 16, 1, 17, |
| 4255 | 3988 | 0+4, 16+4, 1+4, 17+4, |
| ... | ... | @@ -4273,9 +4006,8 @@ _mm512_maskz_unpacklo_epi32(__mmask16 __U, __m512i __A, __m512i __B) |
| 4273 | 4006 | (__v16si)_mm512_setzero_si512()); |
| 4274 | 4007 | } |
| 4275 | 4008 | |
| 4276 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4277 | _mm512_unpackhi_epi64(__m512i __A, __m512i __B) | |
| 4278 | { | |
| 4009 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4010 | _mm512_unpackhi_epi64(__m512i __A, __m512i __B) { | |
| 4279 | 4011 | return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B, |
| 4280 | 4012 | 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6); |
| 4281 | 4013 | } |
| ... | ... | @@ -4296,9 +4028,8 @@ _mm512_maskz_unpackhi_epi64(__mmask8 __U, __m512i __A, __m512i __B) |
| 4296 | 4028 | (__v8di)_mm512_setzero_si512()); |
| 4297 | 4029 | } |
| 4298 | 4030 | |
| 4299 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4300 | _mm512_unpacklo_epi64 (__m512i __A, __m512i __B) | |
| 4301 | { | |
| 4031 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4032 | _mm512_unpacklo_epi64(__m512i __A, __m512i __B) { | |
| 4302 | 4033 | return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B, |
| 4303 | 4034 | 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6); |
| 4304 | 4035 | } |
| ... | ... | @@ -4619,9 +4350,8 @@ _mm512_store_epi64 (void *__P, __m512i __A) |
| 4619 | 4350 | |
| 4620 | 4351 | /* Mask ops */ |
| 4621 | 4352 | |
| 4622 | static __inline __mmask16 __DEFAULT_FN_ATTRS | |
| 4623 | _mm512_knot(__mmask16 __M) | |
| 4624 | { | |
| 4353 | static __inline __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4354 | _mm512_knot(__mmask16 __M) { | |
| 4625 | 4355 | return __builtin_ia32_knothi(__M); |
| 4626 | 4356 | } |
| 4627 | 4357 | |
| ... | ... | @@ -4727,237 +4457,207 @@ _mm512_knot(__mmask16 __M) |
| 4727 | 4457 | #define _mm512_mask_cmpneq_epu64_mask(k, A, B) \ |
| 4728 | 4458 | _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE) |
| 4729 | 4459 | |
| 4730 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4731 | _mm512_cvtepi8_epi32(__m128i __A) | |
| 4732 | { | |
| 4460 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4461 | _mm512_cvtepi8_epi32(__m128i __A) { | |
| 4733 | 4462 | /* This function always performs a signed extension, but __v16qi is a char |
| 4734 | 4463 | which may be signed or unsigned, so use __v16qs. */ |
| 4735 | 4464 | return (__m512i)__builtin_convertvector((__v16qs)__A, __v16si); |
| 4736 | 4465 | } |
| 4737 | 4466 | |
| 4738 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4739 | _mm512_mask_cvtepi8_epi32(__m512i __W, __mmask16 __U, __m128i __A) | |
| 4740 | { | |
| 4467 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4468 | _mm512_mask_cvtepi8_epi32(__m512i __W, __mmask16 __U, __m128i __A) { | |
| 4741 | 4469 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 4742 | 4470 | (__v16si)_mm512_cvtepi8_epi32(__A), |
| 4743 | 4471 | (__v16si)__W); |
| 4744 | 4472 | } |
| 4745 | 4473 | |
| 4746 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4747 | _mm512_maskz_cvtepi8_epi32(__mmask16 __U, __m128i __A) | |
| 4748 | { | |
| 4474 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4475 | _mm512_maskz_cvtepi8_epi32(__mmask16 __U, __m128i __A) { | |
| 4749 | 4476 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 4750 | 4477 | (__v16si)_mm512_cvtepi8_epi32(__A), |
| 4751 | 4478 | (__v16si)_mm512_setzero_si512()); |
| 4752 | 4479 | } |
| 4753 | 4480 | |
| 4754 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4755 | _mm512_cvtepi8_epi64(__m128i __A) | |
| 4756 | { | |
| 4481 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4482 | _mm512_cvtepi8_epi64(__m128i __A) { | |
| 4757 | 4483 | /* This function always performs a signed extension, but __v16qi is a char |
| 4758 | 4484 | which may be signed or unsigned, so use __v16qs. */ |
| 4759 | 4485 | return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__A, (__v16qs)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di); |
| 4760 | 4486 | } |
| 4761 | 4487 | |
| 4762 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4763 | _mm512_mask_cvtepi8_epi64(__m512i __W, __mmask8 __U, __m128i __A) | |
| 4764 | { | |
| 4488 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4489 | _mm512_mask_cvtepi8_epi64(__m512i __W, __mmask8 __U, __m128i __A) { | |
| 4765 | 4490 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4766 | 4491 | (__v8di)_mm512_cvtepi8_epi64(__A), |
| 4767 | 4492 | (__v8di)__W); |
| 4768 | 4493 | } |
| 4769 | 4494 | |
| 4770 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4771 | _mm512_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) | |
| 4772 | { | |
| 4495 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4496 | _mm512_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) { | |
| 4773 | 4497 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4774 | 4498 | (__v8di)_mm512_cvtepi8_epi64(__A), |
| 4775 | 4499 | (__v8di)_mm512_setzero_si512 ()); |
| 4776 | 4500 | } |
| 4777 | 4501 | |
| 4778 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4779 | _mm512_cvtepi32_epi64(__m256i __X) | |
| 4780 | { | |
| 4502 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4503 | _mm512_cvtepi32_epi64(__m256i __X) { | |
| 4781 | 4504 | return (__m512i)__builtin_convertvector((__v8si)__X, __v8di); |
| 4782 | 4505 | } |
| 4783 | 4506 | |
| 4784 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4785 | _mm512_mask_cvtepi32_epi64(__m512i __W, __mmask8 __U, __m256i __X) | |
| 4786 | { | |
| 4507 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4508 | _mm512_mask_cvtepi32_epi64(__m512i __W, __mmask8 __U, __m256i __X) { | |
| 4787 | 4509 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4788 | 4510 | (__v8di)_mm512_cvtepi32_epi64(__X), |
| 4789 | 4511 | (__v8di)__W); |
| 4790 | 4512 | } |
| 4791 | 4513 | |
| 4792 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4793 | _mm512_maskz_cvtepi32_epi64(__mmask8 __U, __m256i __X) | |
| 4794 | { | |
| 4514 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4515 | _mm512_maskz_cvtepi32_epi64(__mmask8 __U, __m256i __X) { | |
| 4795 | 4516 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4796 | 4517 | (__v8di)_mm512_cvtepi32_epi64(__X), |
| 4797 | 4518 | (__v8di)_mm512_setzero_si512()); |
| 4798 | 4519 | } |
| 4799 | 4520 | |
| 4800 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4801 | _mm512_cvtepi16_epi32(__m256i __A) | |
| 4802 | { | |
| 4521 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4522 | _mm512_cvtepi16_epi32(__m256i __A) { | |
| 4803 | 4523 | return (__m512i)__builtin_convertvector((__v16hi)__A, __v16si); |
| 4804 | 4524 | } |
| 4805 | 4525 | |
| 4806 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4807 | _mm512_mask_cvtepi16_epi32(__m512i __W, __mmask16 __U, __m256i __A) | |
| 4808 | { | |
| 4526 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4527 | _mm512_mask_cvtepi16_epi32(__m512i __W, __mmask16 __U, __m256i __A) { | |
| 4809 | 4528 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 4810 | 4529 | (__v16si)_mm512_cvtepi16_epi32(__A), |
| 4811 | 4530 | (__v16si)__W); |
| 4812 | 4531 | } |
| 4813 | 4532 | |
| 4814 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4815 | _mm512_maskz_cvtepi16_epi32(__mmask16 __U, __m256i __A) | |
| 4816 | { | |
| 4533 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4534 | _mm512_maskz_cvtepi16_epi32(__mmask16 __U, __m256i __A) { | |
| 4817 | 4535 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 4818 | 4536 | (__v16si)_mm512_cvtepi16_epi32(__A), |
| 4819 | 4537 | (__v16si)_mm512_setzero_si512 ()); |
| 4820 | 4538 | } |
| 4821 | 4539 | |
| 4822 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4823 | _mm512_cvtepi16_epi64(__m128i __A) | |
| 4824 | { | |
| 4540 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4541 | _mm512_cvtepi16_epi64(__m128i __A) { | |
| 4825 | 4542 | return (__m512i)__builtin_convertvector((__v8hi)__A, __v8di); |
| 4826 | 4543 | } |
| 4827 | 4544 | |
| 4828 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4829 | _mm512_mask_cvtepi16_epi64(__m512i __W, __mmask8 __U, __m128i __A) | |
| 4830 | { | |
| 4545 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4546 | _mm512_mask_cvtepi16_epi64(__m512i __W, __mmask8 __U, __m128i __A) { | |
| 4831 | 4547 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4832 | 4548 | (__v8di)_mm512_cvtepi16_epi64(__A), |
| 4833 | 4549 | (__v8di)__W); |
| 4834 | 4550 | } |
| 4835 | 4551 | |
| 4836 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4837 | _mm512_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) | |
| 4838 | { | |
| 4552 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4553 | _mm512_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) { | |
| 4839 | 4554 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4840 | 4555 | (__v8di)_mm512_cvtepi16_epi64(__A), |
| 4841 | 4556 | (__v8di)_mm512_setzero_si512()); |
| 4842 | 4557 | } |
| 4843 | 4558 | |
| 4844 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4845 | _mm512_cvtepu8_epi32(__m128i __A) | |
| 4846 | { | |
| 4559 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4560 | _mm512_cvtepu8_epi32(__m128i __A) { | |
| 4847 | 4561 | return (__m512i)__builtin_convertvector((__v16qu)__A, __v16si); |
| 4848 | 4562 | } |
| 4849 | 4563 | |
| 4850 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4851 | _mm512_mask_cvtepu8_epi32(__m512i __W, __mmask16 __U, __m128i __A) | |
| 4852 | { | |
| 4564 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4565 | _mm512_mask_cvtepu8_epi32(__m512i __W, __mmask16 __U, __m128i __A) { | |
| 4853 | 4566 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 4854 | 4567 | (__v16si)_mm512_cvtepu8_epi32(__A), |
| 4855 | 4568 | (__v16si)__W); |
| 4856 | 4569 | } |
| 4857 | 4570 | |
| 4858 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4859 | _mm512_maskz_cvtepu8_epi32(__mmask16 __U, __m128i __A) | |
| 4860 | { | |
| 4571 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4572 | _mm512_maskz_cvtepu8_epi32(__mmask16 __U, __m128i __A) { | |
| 4861 | 4573 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 4862 | 4574 | (__v16si)_mm512_cvtepu8_epi32(__A), |
| 4863 | 4575 | (__v16si)_mm512_setzero_si512()); |
| 4864 | 4576 | } |
| 4865 | 4577 | |
| 4866 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4867 | _mm512_cvtepu8_epi64(__m128i __A) | |
| 4868 | { | |
| 4578 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4579 | _mm512_cvtepu8_epi64(__m128i __A) { | |
| 4869 | 4580 | return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__A, (__v16qu)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di); |
| 4870 | 4581 | } |
| 4871 | 4582 | |
| 4872 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4873 | _mm512_mask_cvtepu8_epi64(__m512i __W, __mmask8 __U, __m128i __A) | |
| 4874 | { | |
| 4583 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4584 | _mm512_mask_cvtepu8_epi64(__m512i __W, __mmask8 __U, __m128i __A) { | |
| 4875 | 4585 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4876 | 4586 | (__v8di)_mm512_cvtepu8_epi64(__A), |
| 4877 | 4587 | (__v8di)__W); |
| 4878 | 4588 | } |
| 4879 | 4589 | |
| 4880 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4881 | _mm512_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A) | |
| 4882 | { | |
| 4590 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4591 | _mm512_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A) { | |
| 4883 | 4592 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4884 | 4593 | (__v8di)_mm512_cvtepu8_epi64(__A), |
| 4885 | 4594 | (__v8di)_mm512_setzero_si512()); |
| 4886 | 4595 | } |
| 4887 | 4596 | |
| 4888 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4889 | _mm512_cvtepu32_epi64(__m256i __X) | |
| 4890 | { | |
| 4597 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4598 | _mm512_cvtepu32_epi64(__m256i __X) { | |
| 4891 | 4599 | return (__m512i)__builtin_convertvector((__v8su)__X, __v8di); |
| 4892 | 4600 | } |
| 4893 | 4601 | |
| 4894 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4895 | _mm512_mask_cvtepu32_epi64(__m512i __W, __mmask8 __U, __m256i __X) | |
| 4896 | { | |
| 4602 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4603 | _mm512_mask_cvtepu32_epi64(__m512i __W, __mmask8 __U, __m256i __X) { | |
| 4897 | 4604 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4898 | 4605 | (__v8di)_mm512_cvtepu32_epi64(__X), |
| 4899 | 4606 | (__v8di)__W); |
| 4900 | 4607 | } |
| 4901 | 4608 | |
| 4902 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4903 | _mm512_maskz_cvtepu32_epi64(__mmask8 __U, __m256i __X) | |
| 4904 | { | |
| 4609 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4610 | _mm512_maskz_cvtepu32_epi64(__mmask8 __U, __m256i __X) { | |
| 4905 | 4611 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4906 | 4612 | (__v8di)_mm512_cvtepu32_epi64(__X), |
| 4907 | 4613 | (__v8di)_mm512_setzero_si512()); |
| 4908 | 4614 | } |
| 4909 | 4615 | |
| 4910 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4911 | _mm512_cvtepu16_epi32(__m256i __A) | |
| 4912 | { | |
| 4616 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4617 | _mm512_cvtepu16_epi32(__m256i __A) { | |
| 4913 | 4618 | return (__m512i)__builtin_convertvector((__v16hu)__A, __v16si); |
| 4914 | 4619 | } |
| 4915 | 4620 | |
| 4916 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4917 | _mm512_mask_cvtepu16_epi32(__m512i __W, __mmask16 __U, __m256i __A) | |
| 4918 | { | |
| 4621 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4622 | _mm512_mask_cvtepu16_epi32(__m512i __W, __mmask16 __U, __m256i __A) { | |
| 4919 | 4623 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 4920 | 4624 | (__v16si)_mm512_cvtepu16_epi32(__A), |
| 4921 | 4625 | (__v16si)__W); |
| 4922 | 4626 | } |
| 4923 | 4627 | |
| 4924 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4925 | _mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A) | |
| 4926 | { | |
| 4628 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4629 | _mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A) { | |
| 4927 | 4630 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 4928 | 4631 | (__v16si)_mm512_cvtepu16_epi32(__A), |
| 4929 | 4632 | (__v16si)_mm512_setzero_si512()); |
| 4930 | 4633 | } |
| 4931 | 4634 | |
| 4932 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4933 | _mm512_cvtepu16_epi64(__m128i __A) | |
| 4934 | { | |
| 4635 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4636 | _mm512_cvtepu16_epi64(__m128i __A) { | |
| 4935 | 4637 | return (__m512i)__builtin_convertvector((__v8hu)__A, __v8di); |
| 4936 | 4638 | } |
| 4937 | 4639 | |
| 4938 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4939 | _mm512_mask_cvtepu16_epi64(__m512i __W, __mmask8 __U, __m128i __A) | |
| 4940 | { | |
| 4640 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4641 | _mm512_mask_cvtepu16_epi64(__m512i __W, __mmask8 __U, __m128i __A) { | |
| 4941 | 4642 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4942 | 4643 | (__v8di)_mm512_cvtepu16_epi64(__A), |
| 4943 | 4644 | (__v8di)__W); |
| 4944 | 4645 | } |
| 4945 | 4646 | |
| 4946 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4947 | _mm512_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) | |
| 4948 | { | |
| 4647 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4648 | _mm512_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) { | |
| 4949 | 4649 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 4950 | 4650 | (__v8di)_mm512_cvtepu16_epi64(__A), |
| 4951 | 4651 | (__v8di)_mm512_setzero_si512()); |
| 4952 | 4652 | } |
| 4953 | 4653 | |
| 4954 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4654 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4955 | 4655 | _mm512_rorv_epi32 (__m512i __A, __m512i __B) |
| 4956 | 4656 | { |
| 4957 | return (__m512i)__builtin_ia32_prorvd512((__v16si)__A, (__v16si)__B); | |
| 4657 | return (__m512i)__builtin_elementwise_fshr((__v16su)__A,(__v16su)__A, (__v16su)__B); | |
| 4958 | 4658 | } |
| 4959 | 4659 | |
| 4960 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4660 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4961 | 4661 | _mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) |
| 4962 | 4662 | { |
| 4963 | 4663 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| ... | ... | @@ -4965,7 +4665,7 @@ _mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) |
| 4965 | 4665 | (__v16si)__W); |
| 4966 | 4666 | } |
| 4967 | 4667 | |
| 4968 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4668 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4969 | 4669 | _mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B) |
| 4970 | 4670 | { |
| 4971 | 4671 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| ... | ... | @@ -4973,13 +4673,13 @@ _mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B) |
| 4973 | 4673 | (__v16si)_mm512_setzero_si512()); |
| 4974 | 4674 | } |
| 4975 | 4675 | |
| 4976 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4676 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4977 | 4677 | _mm512_rorv_epi64 (__m512i __A, __m512i __B) |
| 4978 | 4678 | { |
| 4979 | return (__m512i)__builtin_ia32_prorvq512((__v8di)__A, (__v8di)__B); | |
| 4679 | return (__m512i)__builtin_elementwise_fshr((__v8du)__A, (__v8du)__A, (__v8du)__B); | |
| 4980 | 4680 | } |
| 4981 | 4681 | |
| 4982 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4682 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4983 | 4683 | _mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) |
| 4984 | 4684 | { |
| 4985 | 4685 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| ... | ... | @@ -4987,7 +4687,7 @@ _mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) |
| 4987 | 4687 | (__v8di)__W); |
| 4988 | 4688 | } |
| 4989 | 4689 | |
| 4990 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4690 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4991 | 4691 | _mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B) |
| 4992 | 4692 | { |
| 4993 | 4693 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| ... | ... | @@ -5063,13 +4763,13 @@ _mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B) |
| 5063 | 4763 | (__v8di)_mm512_rol_epi64((a), (b)), \ |
| 5064 | 4764 | (__v8di)_mm512_setzero_si512())) |
| 5065 | 4765 | |
| 5066 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4766 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5067 | 4767 | _mm512_rolv_epi32 (__m512i __A, __m512i __B) |
| 5068 | 4768 | { |
| 5069 | return (__m512i)__builtin_ia32_prolvd512((__v16si)__A, (__v16si)__B); | |
| 4769 | return (__m512i)__builtin_elementwise_fshl((__v16su)__A, (__v16su)__A, (__v16su)__B); | |
| 5070 | 4770 | } |
| 5071 | 4771 | |
| 5072 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4772 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5073 | 4773 | _mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) |
| 5074 | 4774 | { |
| 5075 | 4775 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| ... | ... | @@ -5077,7 +4777,7 @@ _mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) |
| 5077 | 4777 | (__v16si)__W); |
| 5078 | 4778 | } |
| 5079 | 4779 | |
| 5080 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4780 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5081 | 4781 | _mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B) |
| 5082 | 4782 | { |
| 5083 | 4783 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| ... | ... | @@ -5085,13 +4785,13 @@ _mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B) |
| 5085 | 4785 | (__v16si)_mm512_setzero_si512()); |
| 5086 | 4786 | } |
| 5087 | 4787 | |
| 5088 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4788 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5089 | 4789 | _mm512_rolv_epi64 (__m512i __A, __m512i __B) |
| 5090 | 4790 | { |
| 5091 | return (__m512i)__builtin_ia32_prolvq512((__v8di)__A, (__v8di)__B); | |
| 4791 | return (__m512i)__builtin_elementwise_fshl((__v8du)__A, (__v8du)__A, (__v8du)__B); | |
| 5092 | 4792 | } |
| 5093 | 4793 | |
| 5094 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4794 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5095 | 4795 | _mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) |
| 5096 | 4796 | { |
| 5097 | 4797 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| ... | ... | @@ -5099,7 +4799,7 @@ _mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) |
| 5099 | 4799 | (__v8di)__W); |
| 5100 | 4800 | } |
| 5101 | 4801 | |
| 5102 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4802 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5103 | 4803 | _mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B) |
| 5104 | 4804 | { |
| 5105 | 4805 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| ... | ... | @@ -5133,91 +4833,81 @@ _mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B) |
| 5133 | 4833 | (__v8di)_mm512_ror_epi64((A), (B)), \ |
| 5134 | 4834 | (__v8di)_mm512_setzero_si512())) |
| 5135 | 4835 | |
| 5136 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5137 | _mm512_slli_epi32(__m512i __A, unsigned int __B) | |
| 5138 | { | |
| 4836 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4837 | _mm512_slli_epi32(__m512i __A, unsigned int __B) { | |
| 5139 | 4838 | return (__m512i)__builtin_ia32_pslldi512((__v16si)__A, (int)__B); |
| 5140 | 4839 | } |
| 5141 | 4840 | |
| 5142 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4841 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5143 | 4842 | _mm512_mask_slli_epi32(__m512i __W, __mmask16 __U, __m512i __A, |
| 5144 | unsigned int __B) | |
| 5145 | { | |
| 4843 | unsigned int __B) { | |
| 5146 | 4844 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5147 | 4845 | (__v16si)_mm512_slli_epi32(__A, __B), |
| 5148 | 4846 | (__v16si)__W); |
| 5149 | 4847 | } |
| 5150 | 4848 | |
| 5151 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4849 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5152 | 4850 | _mm512_maskz_slli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) { |
| 5153 | 4851 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5154 | 4852 | (__v16si)_mm512_slli_epi32(__A, __B), |
| 5155 | 4853 | (__v16si)_mm512_setzero_si512()); |
| 5156 | 4854 | } |
| 5157 | 4855 | |
| 5158 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5159 | _mm512_slli_epi64(__m512i __A, unsigned int __B) | |
| 5160 | { | |
| 4856 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4857 | _mm512_slli_epi64(__m512i __A, unsigned int __B) { | |
| 5161 | 4858 | return (__m512i)__builtin_ia32_psllqi512((__v8di)__A, (int)__B); |
| 5162 | 4859 | } |
| 5163 | 4860 | |
| 5164 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5165 | _mm512_mask_slli_epi64(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B) | |
| 5166 | { | |
| 4861 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4862 | _mm512_mask_slli_epi64(__m512i __W, __mmask8 __U, __m512i __A, | |
| 4863 | unsigned int __B) { | |
| 5167 | 4864 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5168 | 4865 | (__v8di)_mm512_slli_epi64(__A, __B), |
| 5169 | 4866 | (__v8di)__W); |
| 5170 | 4867 | } |
| 5171 | 4868 | |
| 5172 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5173 | _mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A, unsigned int __B) | |
| 5174 | { | |
| 4869 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4870 | _mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A, unsigned int __B) { | |
| 5175 | 4871 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5176 | 4872 | (__v8di)_mm512_slli_epi64(__A, __B), |
| 5177 | 4873 | (__v8di)_mm512_setzero_si512()); |
| 5178 | 4874 | } |
| 5179 | 4875 | |
| 5180 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5181 | _mm512_srli_epi32(__m512i __A, unsigned int __B) | |
| 5182 | { | |
| 4876 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4877 | _mm512_srli_epi32(__m512i __A, unsigned int __B) { | |
| 5183 | 4878 | return (__m512i)__builtin_ia32_psrldi512((__v16si)__A, (int)__B); |
| 5184 | 4879 | } |
| 5185 | 4880 | |
| 5186 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4881 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5187 | 4882 | _mm512_mask_srli_epi32(__m512i __W, __mmask16 __U, __m512i __A, |
| 5188 | unsigned int __B) | |
| 5189 | { | |
| 4883 | unsigned int __B) { | |
| 5190 | 4884 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5191 | 4885 | (__v16si)_mm512_srli_epi32(__A, __B), |
| 5192 | 4886 | (__v16si)__W); |
| 5193 | 4887 | } |
| 5194 | 4888 | |
| 5195 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4889 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5196 | 4890 | _mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) { |
| 5197 | 4891 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5198 | 4892 | (__v16si)_mm512_srli_epi32(__A, __B), |
| 5199 | 4893 | (__v16si)_mm512_setzero_si512()); |
| 5200 | 4894 | } |
| 5201 | 4895 | |
| 5202 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5203 | _mm512_srli_epi64(__m512i __A, unsigned int __B) | |
| 5204 | { | |
| 4896 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4897 | _mm512_srli_epi64(__m512i __A, unsigned int __B) { | |
| 5205 | 4898 | return (__m512i)__builtin_ia32_psrlqi512((__v8di)__A, (int)__B); |
| 5206 | 4899 | } |
| 5207 | 4900 | |
| 5208 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 4901 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5209 | 4902 | _mm512_mask_srli_epi64(__m512i __W, __mmask8 __U, __m512i __A, |
| 5210 | unsigned int __B) | |
| 5211 | { | |
| 4903 | unsigned int __B) { | |
| 5212 | 4904 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5213 | 4905 | (__v8di)_mm512_srli_epi64(__A, __B), |
| 5214 | 4906 | (__v8di)__W); |
| 5215 | 4907 | } |
| 5216 | 4908 | |
| 5217 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5218 | _mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A, | |
| 5219 | unsigned int __B) | |
| 5220 | { | |
| 4909 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 4910 | _mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A, unsigned int __B) { | |
| 5221 | 4911 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5222 | 4912 | (__v8di)_mm512_srli_epi64(__A, __B), |
| 5223 | 4913 | (__v8di)_mm512_setzero_si512()); |
| ... | ... | @@ -5303,7 +4993,7 @@ _mm512_mask_store_epi64 (void *__P, __mmask8 __U, __m512i __A) |
| 5303 | 4993 | (__mmask8) __U); |
| 5304 | 4994 | } |
| 5305 | 4995 | |
| 5306 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 4996 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5307 | 4997 | _mm512_movedup_pd (__m512d __A) |
| 5308 | 4998 | { |
| 5309 | 4999 | return (__m512d)__builtin_shufflevector((__v8df)__A, (__v8df)__A, |
| ... | ... | @@ -5664,10 +5354,9 @@ _mm_maskz_getexp_ss (__mmask8 __U, __m128 __A, __m128 __B) |
| 5664 | 5354 | (int)(((D)<<2) | (C)), \ |
| 5665 | 5355 | (__v4sf)_mm_setzero_ps(), \ |
| 5666 | 5356 | (__mmask8)(U), (int)(R))) |
| 5667 | ||
| 5668 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 5669 | _mm512_kmov (__mmask16 __A) | |
| 5670 | { | |
| 5357 | ||
| 5358 | static __inline__ __mmask16 | |
| 5359 | __DEFAULT_FN_ATTRS_CONSTEXPR _mm512_kmov(__mmask16 __A) { | |
| 5671 | 5360 | return __A; |
| 5672 | 5361 | } |
| 5673 | 5362 | |
| ... | ... | @@ -5684,79 +5373,70 @@ _mm512_kmov (__mmask16 __A) |
| 5684 | 5373 | ((long long)__builtin_ia32_vcvtsd2si64((__v2df)(__m128d)(A), (int)(R))) |
| 5685 | 5374 | #endif |
| 5686 | 5375 | |
| 5687 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5688 | _mm512_sll_epi32(__m512i __A, __m128i __B) | |
| 5689 | { | |
| 5376 | static __inline__ __m512i | |
| 5377 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_sll_epi32(__m512i __A, __m128i __B) { | |
| 5690 | 5378 | return (__m512i)__builtin_ia32_pslld512((__v16si) __A, (__v4si)__B); |
| 5691 | 5379 | } |
| 5692 | 5380 | |
| 5693 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5694 | _mm512_mask_sll_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) | |
| 5695 | { | |
| 5381 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5382 | _mm512_mask_sll_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) { | |
| 5696 | 5383 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5697 | 5384 | (__v16si)_mm512_sll_epi32(__A, __B), |
| 5698 | 5385 | (__v16si)__W); |
| 5699 | 5386 | } |
| 5700 | 5387 | |
| 5701 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5702 | _mm512_maskz_sll_epi32(__mmask16 __U, __m512i __A, __m128i __B) | |
| 5703 | { | |
| 5388 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5389 | _mm512_maskz_sll_epi32(__mmask16 __U, __m512i __A, __m128i __B) { | |
| 5704 | 5390 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5705 | 5391 | (__v16si)_mm512_sll_epi32(__A, __B), |
| 5706 | 5392 | (__v16si)_mm512_setzero_si512()); |
| 5707 | 5393 | } |
| 5708 | 5394 | |
| 5709 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5710 | _mm512_sll_epi64(__m512i __A, __m128i __B) | |
| 5711 | { | |
| 5395 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5396 | _mm512_sll_epi64(__m512i __A, __m128i __B) { | |
| 5712 | 5397 | return (__m512i)__builtin_ia32_psllq512((__v8di)__A, (__v2di)__B); |
| 5713 | 5398 | } |
| 5714 | 5399 | |
| 5715 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5716 | _mm512_mask_sll_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) | |
| 5717 | { | |
| 5400 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5401 | _mm512_mask_sll_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) { | |
| 5718 | 5402 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5719 | 5403 | (__v8di)_mm512_sll_epi64(__A, __B), |
| 5720 | 5404 | (__v8di)__W); |
| 5721 | 5405 | } |
| 5722 | 5406 | |
| 5723 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5724 | _mm512_maskz_sll_epi64(__mmask8 __U, __m512i __A, __m128i __B) | |
| 5725 | { | |
| 5407 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5408 | _mm512_maskz_sll_epi64(__mmask8 __U, __m512i __A, __m128i __B) { | |
| 5726 | 5409 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5727 | 5410 | (__v8di)_mm512_sll_epi64(__A, __B), |
| 5728 | 5411 | (__v8di)_mm512_setzero_si512()); |
| 5729 | 5412 | } |
| 5730 | 5413 | |
| 5731 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5732 | _mm512_sllv_epi32(__m512i __X, __m512i __Y) | |
| 5733 | { | |
| 5414 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5415 | _mm512_sllv_epi32(__m512i __X, __m512i __Y) { | |
| 5734 | 5416 | return (__m512i)__builtin_ia32_psllv16si((__v16si)__X, (__v16si)__Y); |
| 5735 | 5417 | } |
| 5736 | 5418 | |
| 5737 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5738 | _mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) | |
| 5739 | { | |
| 5419 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5420 | _mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) { | |
| 5740 | 5421 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5741 | 5422 | (__v16si)_mm512_sllv_epi32(__X, __Y), |
| 5742 | 5423 | (__v16si)__W); |
| 5743 | 5424 | } |
| 5744 | 5425 | |
| 5745 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5746 | _mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) | |
| 5747 | { | |
| 5426 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5427 | _mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) { | |
| 5748 | 5428 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5749 | 5429 | (__v16si)_mm512_sllv_epi32(__X, __Y), |
| 5750 | 5430 | (__v16si)_mm512_setzero_si512()); |
| 5751 | 5431 | } |
| 5752 | 5432 | |
| 5753 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5433 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5754 | 5434 | _mm512_sllv_epi64(__m512i __X, __m512i __Y) |
| 5755 | 5435 | { |
| 5756 | 5436 | return (__m512i)__builtin_ia32_psllv8di((__v8di)__X, (__v8di)__Y); |
| 5757 | 5437 | } |
| 5758 | 5438 | |
| 5759 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5439 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5760 | 5440 | _mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) |
| 5761 | 5441 | { |
| 5762 | 5442 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| ... | ... | @@ -5764,7 +5444,7 @@ _mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) |
| 5764 | 5444 | (__v8di)__W); |
| 5765 | 5445 | } |
| 5766 | 5446 | |
| 5767 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5447 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5768 | 5448 | _mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y) |
| 5769 | 5449 | { |
| 5770 | 5450 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| ... | ... | @@ -5772,79 +5452,70 @@ _mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y) |
| 5772 | 5452 | (__v8di)_mm512_setzero_si512()); |
| 5773 | 5453 | } |
| 5774 | 5454 | |
| 5775 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5776 | _mm512_sra_epi32(__m512i __A, __m128i __B) | |
| 5777 | { | |
| 5455 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5456 | _mm512_sra_epi32(__m512i __A, __m128i __B) { | |
| 5778 | 5457 | return (__m512i)__builtin_ia32_psrad512((__v16si) __A, (__v4si)__B); |
| 5779 | 5458 | } |
| 5780 | 5459 | |
| 5781 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5782 | _mm512_mask_sra_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) | |
| 5783 | { | |
| 5460 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5461 | _mm512_mask_sra_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) { | |
| 5784 | 5462 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5785 | 5463 | (__v16si)_mm512_sra_epi32(__A, __B), |
| 5786 | 5464 | (__v16si)__W); |
| 5787 | 5465 | } |
| 5788 | 5466 | |
| 5789 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5790 | _mm512_maskz_sra_epi32(__mmask16 __U, __m512i __A, __m128i __B) | |
| 5791 | { | |
| 5467 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5468 | _mm512_maskz_sra_epi32(__mmask16 __U, __m512i __A, __m128i __B) { | |
| 5792 | 5469 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5793 | 5470 | (__v16si)_mm512_sra_epi32(__A, __B), |
| 5794 | 5471 | (__v16si)_mm512_setzero_si512()); |
| 5795 | 5472 | } |
| 5796 | 5473 | |
| 5797 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5798 | _mm512_sra_epi64(__m512i __A, __m128i __B) | |
| 5799 | { | |
| 5474 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5475 | _mm512_sra_epi64(__m512i __A, __m128i __B) { | |
| 5800 | 5476 | return (__m512i)__builtin_ia32_psraq512((__v8di)__A, (__v2di)__B); |
| 5801 | 5477 | } |
| 5802 | 5478 | |
| 5803 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5804 | _mm512_mask_sra_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) | |
| 5805 | { | |
| 5479 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5480 | _mm512_mask_sra_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) { | |
| 5806 | 5481 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5807 | 5482 | (__v8di)_mm512_sra_epi64(__A, __B), |
| 5808 | 5483 | (__v8di)__W); |
| 5809 | 5484 | } |
| 5810 | 5485 | |
| 5811 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5812 | _mm512_maskz_sra_epi64(__mmask8 __U, __m512i __A, __m128i __B) | |
| 5813 | { | |
| 5486 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5487 | _mm512_maskz_sra_epi64(__mmask8 __U, __m512i __A, __m128i __B) { | |
| 5814 | 5488 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5815 | 5489 | (__v8di)_mm512_sra_epi64(__A, __B), |
| 5816 | 5490 | (__v8di)_mm512_setzero_si512()); |
| 5817 | 5491 | } |
| 5818 | 5492 | |
| 5819 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5820 | _mm512_srav_epi32(__m512i __X, __m512i __Y) | |
| 5821 | { | |
| 5493 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5494 | _mm512_srav_epi32(__m512i __X, __m512i __Y) { | |
| 5822 | 5495 | return (__m512i)__builtin_ia32_psrav16si((__v16si)__X, (__v16si)__Y); |
| 5823 | 5496 | } |
| 5824 | 5497 | |
| 5825 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5826 | _mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) | |
| 5827 | { | |
| 5498 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5499 | _mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) { | |
| 5828 | 5500 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5829 | 5501 | (__v16si)_mm512_srav_epi32(__X, __Y), |
| 5830 | 5502 | (__v16si)__W); |
| 5831 | 5503 | } |
| 5832 | 5504 | |
| 5833 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5834 | _mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y) | |
| 5835 | { | |
| 5505 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5506 | _mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y) { | |
| 5836 | 5507 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5837 | 5508 | (__v16si)_mm512_srav_epi32(__X, __Y), |
| 5838 | 5509 | (__v16si)_mm512_setzero_si512()); |
| 5839 | 5510 | } |
| 5840 | 5511 | |
| 5841 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5512 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5842 | 5513 | _mm512_srav_epi64(__m512i __X, __m512i __Y) |
| 5843 | 5514 | { |
| 5844 | 5515 | return (__m512i)__builtin_ia32_psrav8di((__v8di)__X, (__v8di)__Y); |
| 5845 | 5516 | } |
| 5846 | 5517 | |
| 5847 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5518 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5848 | 5519 | _mm512_mask_srav_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) |
| 5849 | 5520 | { |
| 5850 | 5521 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| ... | ... | @@ -5852,7 +5523,7 @@ _mm512_mask_srav_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) |
| 5852 | 5523 | (__v8di)__W); |
| 5853 | 5524 | } |
| 5854 | 5525 | |
| 5855 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5526 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5856 | 5527 | _mm512_maskz_srav_epi64(__mmask8 __U, __m512i __X, __m512i __Y) |
| 5857 | 5528 | { |
| 5858 | 5529 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| ... | ... | @@ -5860,79 +5531,70 @@ _mm512_maskz_srav_epi64(__mmask8 __U, __m512i __X, __m512i __Y) |
| 5860 | 5531 | (__v8di)_mm512_setzero_si512()); |
| 5861 | 5532 | } |
| 5862 | 5533 | |
| 5863 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5864 | _mm512_srl_epi32(__m512i __A, __m128i __B) | |
| 5865 | { | |
| 5534 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5535 | _mm512_srl_epi32(__m512i __A, __m128i __B) { | |
| 5866 | 5536 | return (__m512i)__builtin_ia32_psrld512((__v16si) __A, (__v4si)__B); |
| 5867 | 5537 | } |
| 5868 | 5538 | |
| 5869 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5870 | _mm512_mask_srl_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) | |
| 5871 | { | |
| 5539 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5540 | _mm512_mask_srl_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) { | |
| 5872 | 5541 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5873 | 5542 | (__v16si)_mm512_srl_epi32(__A, __B), |
| 5874 | 5543 | (__v16si)__W); |
| 5875 | 5544 | } |
| 5876 | 5545 | |
| 5877 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5878 | _mm512_maskz_srl_epi32(__mmask16 __U, __m512i __A, __m128i __B) | |
| 5879 | { | |
| 5546 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5547 | _mm512_maskz_srl_epi32(__mmask16 __U, __m512i __A, __m128i __B) { | |
| 5880 | 5548 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5881 | 5549 | (__v16si)_mm512_srl_epi32(__A, __B), |
| 5882 | 5550 | (__v16si)_mm512_setzero_si512()); |
| 5883 | 5551 | } |
| 5884 | 5552 | |
| 5885 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5886 | _mm512_srl_epi64(__m512i __A, __m128i __B) | |
| 5887 | { | |
| 5553 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5554 | _mm512_srl_epi64(__m512i __A, __m128i __B) { | |
| 5888 | 5555 | return (__m512i)__builtin_ia32_psrlq512((__v8di)__A, (__v2di)__B); |
| 5889 | 5556 | } |
| 5890 | 5557 | |
| 5891 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5892 | _mm512_mask_srl_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) | |
| 5893 | { | |
| 5558 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5559 | _mm512_mask_srl_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) { | |
| 5894 | 5560 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5895 | 5561 | (__v8di)_mm512_srl_epi64(__A, __B), |
| 5896 | 5562 | (__v8di)__W); |
| 5897 | 5563 | } |
| 5898 | 5564 | |
| 5899 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5900 | _mm512_maskz_srl_epi64(__mmask8 __U, __m512i __A, __m128i __B) | |
| 5901 | { | |
| 5565 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5566 | _mm512_maskz_srl_epi64(__mmask8 __U, __m512i __A, __m128i __B) { | |
| 5902 | 5567 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 5903 | 5568 | (__v8di)_mm512_srl_epi64(__A, __B), |
| 5904 | 5569 | (__v8di)_mm512_setzero_si512()); |
| 5905 | 5570 | } |
| 5906 | 5571 | |
| 5907 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5908 | _mm512_srlv_epi32(__m512i __X, __m512i __Y) | |
| 5909 | { | |
| 5572 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5573 | _mm512_srlv_epi32(__m512i __X, __m512i __Y) { | |
| 5910 | 5574 | return (__m512i)__builtin_ia32_psrlv16si((__v16si)__X, (__v16si)__Y); |
| 5911 | 5575 | } |
| 5912 | 5576 | |
| 5913 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5914 | _mm512_mask_srlv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) | |
| 5915 | { | |
| 5577 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5578 | _mm512_mask_srlv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) { | |
| 5916 | 5579 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5917 | 5580 | (__v16si)_mm512_srlv_epi32(__X, __Y), |
| 5918 | 5581 | (__v16si)__W); |
| 5919 | 5582 | } |
| 5920 | 5583 | |
| 5921 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5922 | _mm512_maskz_srlv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) | |
| 5923 | { | |
| 5584 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5585 | _mm512_maskz_srlv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) { | |
| 5924 | 5586 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 5925 | 5587 | (__v16si)_mm512_srlv_epi32(__X, __Y), |
| 5926 | 5588 | (__v16si)_mm512_setzero_si512()); |
| 5927 | 5589 | } |
| 5928 | 5590 | |
| 5929 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5591 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5930 | 5592 | _mm512_srlv_epi64 (__m512i __X, __m512i __Y) |
| 5931 | 5593 | { |
| 5932 | 5594 | return (__m512i)__builtin_ia32_psrlv8di((__v8di)__X, (__v8di)__Y); |
| 5933 | 5595 | } |
| 5934 | 5596 | |
| 5935 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5597 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5936 | 5598 | _mm512_mask_srlv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) |
| 5937 | 5599 | { |
| 5938 | 5600 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| ... | ... | @@ -5940,7 +5602,7 @@ _mm512_mask_srlv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) |
| 5940 | 5602 | (__v8di)__W); |
| 5941 | 5603 | } |
| 5942 | 5604 | |
| 5943 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 5605 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5944 | 5606 | _mm512_maskz_srlv_epi64(__mmask8 __U, __m512i __X, __m512i __Y) |
| 5945 | 5607 | { |
| 5946 | 5608 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| ... | ... | @@ -6190,115 +5852,104 @@ _mm_cvttss_u64 (__m128 __A) |
| 6190 | 5852 | (__v16sf)_mm512_permute_ps((X), (C)), \ |
| 6191 | 5853 | (__v16sf)_mm512_setzero_ps())) |
| 6192 | 5854 | |
| 6193 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 6194 | _mm512_permutevar_pd(__m512d __A, __m512i __C) | |
| 6195 | { | |
| 5855 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5856 | _mm512_permutevar_pd(__m512d __A, __m512i __C) { | |
| 6196 | 5857 | return (__m512d)__builtin_ia32_vpermilvarpd512((__v8df)__A, (__v8di)__C); |
| 6197 | 5858 | } |
| 6198 | 5859 | |
| 6199 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 6200 | _mm512_mask_permutevar_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512i __C) | |
| 6201 | { | |
| 5860 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5861 | _mm512_mask_permutevar_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512i __C) { | |
| 6202 | 5862 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 6203 | 5863 | (__v8df)_mm512_permutevar_pd(__A, __C), |
| 6204 | 5864 | (__v8df)__W); |
| 6205 | 5865 | } |
| 6206 | 5866 | |
| 6207 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 6208 | _mm512_maskz_permutevar_pd(__mmask8 __U, __m512d __A, __m512i __C) | |
| 6209 | { | |
| 5867 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5868 | _mm512_maskz_permutevar_pd(__mmask8 __U, __m512d __A, __m512i __C) { | |
| 6210 | 5869 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 6211 | 5870 | (__v8df)_mm512_permutevar_pd(__A, __C), |
| 6212 | 5871 | (__v8df)_mm512_setzero_pd()); |
| 6213 | 5872 | } |
| 6214 | 5873 | |
| 6215 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6216 | _mm512_permutevar_ps(__m512 __A, __m512i __C) | |
| 6217 | { | |
| 5874 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5875 | _mm512_permutevar_ps(__m512 __A, __m512i __C) { | |
| 6218 | 5876 | return (__m512)__builtin_ia32_vpermilvarps512((__v16sf)__A, (__v16si)__C); |
| 6219 | 5877 | } |
| 6220 | 5878 | |
| 6221 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6222 | _mm512_mask_permutevar_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512i __C) | |
| 6223 | { | |
| 5879 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5880 | _mm512_mask_permutevar_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512i __C) { | |
| 6224 | 5881 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 6225 | 5882 | (__v16sf)_mm512_permutevar_ps(__A, __C), |
| 6226 | 5883 | (__v16sf)__W); |
| 6227 | 5884 | } |
| 6228 | 5885 | |
| 6229 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6230 | _mm512_maskz_permutevar_ps(__mmask16 __U, __m512 __A, __m512i __C) | |
| 6231 | { | |
| 5886 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5887 | _mm512_maskz_permutevar_ps(__mmask16 __U, __m512 __A, __m512i __C) { | |
| 6232 | 5888 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 6233 | 5889 | (__v16sf)_mm512_permutevar_ps(__A, __C), |
| 6234 | 5890 | (__v16sf)_mm512_setzero_ps()); |
| 6235 | 5891 | } |
| 6236 | 5892 | |
| 6237 | static __inline __m512d __DEFAULT_FN_ATTRS512 | |
| 6238 | _mm512_permutex2var_pd(__m512d __A, __m512i __I, __m512d __B) | |
| 6239 | { | |
| 5893 | static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5894 | _mm512_permutex2var_pd(__m512d __A, __m512i __I, __m512d __B) { | |
| 6240 | 5895 | return (__m512d)__builtin_ia32_vpermi2varpd512((__v8df)__A, (__v8di)__I, |
| 6241 | 5896 | (__v8df)__B); |
| 6242 | 5897 | } |
| 6243 | 5898 | |
| 6244 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 6245 | _mm512_mask_permutex2var_pd(__m512d __A, __mmask8 __U, __m512i __I, __m512d __B) | |
| 6246 | { | |
| 5899 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5900 | _mm512_mask_permutex2var_pd(__m512d __A, __mmask8 __U, __m512i __I, | |
| 5901 | __m512d __B) { | |
| 6247 | 5902 | return (__m512d)__builtin_ia32_selectpd_512(__U, |
| 6248 | 5903 | (__v8df)_mm512_permutex2var_pd(__A, __I, __B), |
| 6249 | 5904 | (__v8df)__A); |
| 6250 | 5905 | } |
| 6251 | 5906 | |
| 6252 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 5907 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6253 | 5908 | _mm512_mask2_permutex2var_pd(__m512d __A, __m512i __I, __mmask8 __U, |
| 6254 | __m512d __B) | |
| 6255 | { | |
| 5909 | __m512d __B) { | |
| 6256 | 5910 | return (__m512d)__builtin_ia32_selectpd_512(__U, |
| 6257 | 5911 | (__v8df)_mm512_permutex2var_pd(__A, __I, __B), |
| 6258 | 5912 | (__v8df)(__m512d)__I); |
| 6259 | 5913 | } |
| 6260 | 5914 | |
| 6261 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 5915 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6262 | 5916 | _mm512_maskz_permutex2var_pd(__mmask8 __U, __m512d __A, __m512i __I, |
| 6263 | __m512d __B) | |
| 6264 | { | |
| 5917 | __m512d __B) { | |
| 6265 | 5918 | return (__m512d)__builtin_ia32_selectpd_512(__U, |
| 6266 | 5919 | (__v8df)_mm512_permutex2var_pd(__A, __I, __B), |
| 6267 | 5920 | (__v8df)_mm512_setzero_pd()); |
| 6268 | 5921 | } |
| 6269 | 5922 | |
| 6270 | static __inline __m512 __DEFAULT_FN_ATTRS512 | |
| 6271 | _mm512_permutex2var_ps(__m512 __A, __m512i __I, __m512 __B) | |
| 6272 | { | |
| 5923 | static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5924 | _mm512_permutex2var_ps(__m512 __A, __m512i __I, __m512 __B) { | |
| 6273 | 5925 | return (__m512)__builtin_ia32_vpermi2varps512((__v16sf)__A, (__v16si)__I, |
| 6274 | 5926 | (__v16sf) __B); |
| 6275 | 5927 | } |
| 6276 | 5928 | |
| 6277 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6278 | _mm512_mask_permutex2var_ps(__m512 __A, __mmask16 __U, __m512i __I, __m512 __B) | |
| 6279 | { | |
| 5929 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5930 | _mm512_mask_permutex2var_ps(__m512 __A, __mmask16 __U, __m512i __I, | |
| 5931 | __m512 __B) { | |
| 6280 | 5932 | return (__m512)__builtin_ia32_selectps_512(__U, |
| 6281 | 5933 | (__v16sf)_mm512_permutex2var_ps(__A, __I, __B), |
| 6282 | 5934 | (__v16sf)__A); |
| 6283 | 5935 | } |
| 6284 | 5936 | |
| 6285 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6286 | _mm512_mask2_permutex2var_ps(__m512 __A, __m512i __I, __mmask16 __U, __m512 __B) | |
| 6287 | { | |
| 5937 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5938 | _mm512_mask2_permutex2var_ps(__m512 __A, __m512i __I, __mmask16 __U, | |
| 5939 | __m512 __B) { | |
| 6288 | 5940 | return (__m512)__builtin_ia32_selectps_512(__U, |
| 6289 | 5941 | (__v16sf)_mm512_permutex2var_ps(__A, __I, __B), |
| 6290 | 5942 | (__v16sf)(__m512)__I); |
| 6291 | 5943 | } |
| 6292 | 5944 | |
| 6293 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6294 | _mm512_maskz_permutex2var_ps(__mmask16 __U, __m512 __A, __m512i __I, __m512 __B) | |
| 6295 | { | |
| 5945 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 5946 | _mm512_maskz_permutex2var_ps(__mmask16 __U, __m512 __A, __m512i __I, | |
| 5947 | __m512 __B) { | |
| 6296 | 5948 | return (__m512)__builtin_ia32_selectps_512(__U, |
| 6297 | 5949 | (__v16sf)_mm512_permutex2var_ps(__A, __I, __B), |
| 6298 | 5950 | (__v16sf)_mm512_setzero_ps()); |
| 6299 | 5951 | } |
| 6300 | 5952 | |
| 6301 | ||
| 6302 | 5953 | #define _mm512_cvtt_roundpd_epu32(A, R) \ |
| 6303 | 5954 | ((__m256i)__builtin_ia32_cvttpd2udq512_mask((__v8df)(__m512d)(A), \ |
| 6304 | 5955 | (__v8si)_mm256_undefined_si256(), \ |
| ... | ... | @@ -6622,46 +6273,41 @@ _mm_maskz_scalef_ss (__mmask8 __U, __m128 __A, __m128 __B) |
| 6622 | 6273 | (__mmask8)(U), \ |
| 6623 | 6274 | (int)(R))) |
| 6624 | 6275 | |
| 6625 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6626 | _mm512_srai_epi32(__m512i __A, unsigned int __B) | |
| 6627 | { | |
| 6276 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6277 | _mm512_srai_epi32(__m512i __A, unsigned int __B) { | |
| 6628 | 6278 | return (__m512i)__builtin_ia32_psradi512((__v16si)__A, (int)__B); |
| 6629 | 6279 | } |
| 6630 | 6280 | |
| 6631 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6281 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6632 | 6282 | _mm512_mask_srai_epi32(__m512i __W, __mmask16 __U, __m512i __A, |
| 6633 | unsigned int __B) | |
| 6634 | { | |
| 6283 | unsigned int __B) { | |
| 6635 | 6284 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 6636 | 6285 | (__v16si)_mm512_srai_epi32(__A, __B), |
| 6637 | 6286 | (__v16si)__W); |
| 6638 | 6287 | } |
| 6639 | 6288 | |
| 6640 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6641 | _mm512_maskz_srai_epi32(__mmask16 __U, __m512i __A, | |
| 6642 | unsigned int __B) { | |
| 6289 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6290 | _mm512_maskz_srai_epi32(__mmask16 __U, __m512i __A, unsigned int __B) { | |
| 6643 | 6291 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, |
| 6644 | 6292 | (__v16si)_mm512_srai_epi32(__A, __B), |
| 6645 | 6293 | (__v16si)_mm512_setzero_si512()); |
| 6646 | 6294 | } |
| 6647 | 6295 | |
| 6648 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6649 | _mm512_srai_epi64(__m512i __A, unsigned int __B) | |
| 6650 | { | |
| 6296 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6297 | _mm512_srai_epi64(__m512i __A, unsigned int __B) { | |
| 6651 | 6298 | return (__m512i)__builtin_ia32_psraqi512((__v8di)__A, (int)__B); |
| 6652 | 6299 | } |
| 6653 | 6300 | |
| 6654 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6655 | _mm512_mask_srai_epi64(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B) | |
| 6656 | { | |
| 6301 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6302 | _mm512_mask_srai_epi64(__m512i __W, __mmask8 __U, __m512i __A, | |
| 6303 | unsigned int __B) { | |
| 6657 | 6304 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 6658 | 6305 | (__v8di)_mm512_srai_epi64(__A, __B), |
| 6659 | 6306 | (__v8di)__W); |
| 6660 | 6307 | } |
| 6661 | 6308 | |
| 6662 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6663 | _mm512_maskz_srai_epi64(__mmask8 __U, __m512i __A, unsigned int __B) | |
| 6664 | { | |
| 6309 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6310 | _mm512_maskz_srai_epi64(__mmask8 __U, __m512i __A, unsigned int __B) { | |
| 6665 | 6311 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, |
| 6666 | 6312 | (__v8di)_mm512_srai_epi64(__A, __B), |
| 6667 | 6313 | (__v8di)_mm512_setzero_si512()); |
| ... | ... | @@ -6827,33 +6473,29 @@ _mm_maskz_sqrt_ss (__mmask8 __U, __m128 __A, __m128 __B) |
| 6827 | 6473 | (__v4sf)_mm_setzero_ps(), \ |
| 6828 | 6474 | (__mmask8)(U), (int)(R))) |
| 6829 | 6475 | |
| 6830 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6831 | _mm512_broadcast_f32x4(__m128 __A) | |
| 6832 | { | |
| 6476 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6477 | _mm512_broadcast_f32x4(__m128 __A) { | |
| 6833 | 6478 | return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, |
| 6834 | 6479 | 0, 1, 2, 3, 0, 1, 2, 3, |
| 6835 | 6480 | 0, 1, 2, 3, 0, 1, 2, 3); |
| 6836 | 6481 | } |
| 6837 | 6482 | |
| 6838 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6839 | _mm512_mask_broadcast_f32x4(__m512 __O, __mmask16 __M, __m128 __A) | |
| 6840 | { | |
| 6483 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6484 | _mm512_mask_broadcast_f32x4(__m512 __O, __mmask16 __M, __m128 __A) { | |
| 6841 | 6485 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__M, |
| 6842 | 6486 | (__v16sf)_mm512_broadcast_f32x4(__A), |
| 6843 | 6487 | (__v16sf)__O); |
| 6844 | 6488 | } |
| 6845 | 6489 | |
| 6846 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6847 | _mm512_maskz_broadcast_f32x4(__mmask16 __M, __m128 __A) | |
| 6848 | { | |
| 6490 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6491 | _mm512_maskz_broadcast_f32x4(__mmask16 __M, __m128 __A) { | |
| 6849 | 6492 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__M, |
| 6850 | 6493 | (__v16sf)_mm512_broadcast_f32x4(__A), |
| 6851 | 6494 | (__v16sf)_mm512_setzero_ps()); |
| 6852 | 6495 | } |
| 6853 | 6496 | |
| 6854 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 6855 | _mm512_broadcast_f64x4(__m256d __A) | |
| 6856 | { | |
| 6497 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6498 | _mm512_broadcast_f64x4(__m256d __A) { | |
| 6857 | 6499 | return (__m512d)__builtin_shufflevector((__v4df)__A, (__v4df)__A, |
| 6858 | 6500 | 0, 1, 2, 3, 0, 1, 2, 3); |
| 6859 | 6501 | } |
| ... | ... | @@ -6874,33 +6516,29 @@ _mm512_maskz_broadcast_f64x4(__mmask8 __M, __m256d __A) |
| 6874 | 6516 | (__v8df)_mm512_setzero_pd()); |
| 6875 | 6517 | } |
| 6876 | 6518 | |
| 6877 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6878 | _mm512_broadcast_i32x4(__m128i __A) | |
| 6879 | { | |
| 6519 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6520 | _mm512_broadcast_i32x4(__m128i __A) { | |
| 6880 | 6521 | return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, |
| 6881 | 6522 | 0, 1, 2, 3, 0, 1, 2, 3, |
| 6882 | 6523 | 0, 1, 2, 3, 0, 1, 2, 3); |
| 6883 | 6524 | } |
| 6884 | 6525 | |
| 6885 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6886 | _mm512_mask_broadcast_i32x4(__m512i __O, __mmask16 __M, __m128i __A) | |
| 6887 | { | |
| 6526 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6527 | _mm512_mask_broadcast_i32x4(__m512i __O, __mmask16 __M, __m128i __A) { | |
| 6888 | 6528 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 6889 | 6529 | (__v16si)_mm512_broadcast_i32x4(__A), |
| 6890 | 6530 | (__v16si)__O); |
| 6891 | 6531 | } |
| 6892 | 6532 | |
| 6893 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6894 | _mm512_maskz_broadcast_i32x4(__mmask16 __M, __m128i __A) | |
| 6895 | { | |
| 6533 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6534 | _mm512_maskz_broadcast_i32x4(__mmask16 __M, __m128i __A) { | |
| 6896 | 6535 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 6897 | 6536 | (__v16si)_mm512_broadcast_i32x4(__A), |
| 6898 | 6537 | (__v16si)_mm512_setzero_si512()); |
| 6899 | 6538 | } |
| 6900 | 6539 | |
| 6901 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 6902 | _mm512_broadcast_i64x4(__m256i __A) | |
| 6903 | { | |
| 6540 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6541 | _mm512_broadcast_i64x4(__m256i __A) { | |
| 6904 | 6542 | return (__m512i)__builtin_shufflevector((__v4di)__A, (__v4di)__A, |
| 6905 | 6543 | 0, 1, 2, 3, 0, 1, 2, 3); |
| 6906 | 6544 | } |
| ... | ... | @@ -6921,33 +6559,29 @@ _mm512_maskz_broadcast_i64x4(__mmask8 __M, __m256i __A) |
| 6921 | 6559 | (__v8di)_mm512_setzero_si512()); |
| 6922 | 6560 | } |
| 6923 | 6561 | |
| 6924 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 6925 | _mm512_mask_broadcastsd_pd (__m512d __O, __mmask8 __M, __m128d __A) | |
| 6926 | { | |
| 6562 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6563 | _mm512_mask_broadcastsd_pd(__m512d __O, __mmask8 __M, __m128d __A) { | |
| 6927 | 6564 | return (__m512d)__builtin_ia32_selectpd_512(__M, |
| 6928 | 6565 | (__v8df) _mm512_broadcastsd_pd(__A), |
| 6929 | 6566 | (__v8df) __O); |
| 6930 | 6567 | } |
| 6931 | 6568 | |
| 6932 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 6933 | _mm512_maskz_broadcastsd_pd (__mmask8 __M, __m128d __A) | |
| 6934 | { | |
| 6569 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6570 | _mm512_maskz_broadcastsd_pd(__mmask8 __M, __m128d __A) { | |
| 6935 | 6571 | return (__m512d)__builtin_ia32_selectpd_512(__M, |
| 6936 | 6572 | (__v8df) _mm512_broadcastsd_pd(__A), |
| 6937 | 6573 | (__v8df) _mm512_setzero_pd()); |
| 6938 | 6574 | } |
| 6939 | 6575 | |
| 6940 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6941 | _mm512_mask_broadcastss_ps (__m512 __O, __mmask16 __M, __m128 __A) | |
| 6942 | { | |
| 6576 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6577 | _mm512_mask_broadcastss_ps(__m512 __O, __mmask16 __M, __m128 __A) { | |
| 6943 | 6578 | return (__m512)__builtin_ia32_selectps_512(__M, |
| 6944 | 6579 | (__v16sf) _mm512_broadcastss_ps(__A), |
| 6945 | 6580 | (__v16sf) __O); |
| 6946 | 6581 | } |
| 6947 | 6582 | |
| 6948 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 6949 | _mm512_maskz_broadcastss_ps (__mmask16 __M, __m128 __A) | |
| 6950 | { | |
| 6583 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 6584 | _mm512_maskz_broadcastss_ps(__mmask16 __M, __m128 __A) { | |
| 6951 | 6585 | return (__m512)__builtin_ia32_selectps_512(__M, |
| 6952 | 6586 | (__v16sf) _mm512_broadcastss_ps(__A), |
| 6953 | 6587 | (__v16sf) _mm512_setzero_ps()); |
| ... | ... | @@ -7391,10 +7025,10 @@ _mm512_mask_cvtepi64_storeu_epi16 (void *__P, __mmask8 __M, __m512i __A) |
| 7391 | 7025 | __builtin_ia32_pmovqw512mem_mask ((__v8hi *) __P, (__v8di) __A, __M); |
| 7392 | 7026 | } |
| 7393 | 7027 | |
| 7394 | #define _mm512_extracti32x4_epi32(A, imm) \ | |
| 7395 | ((__m128i)__builtin_ia32_extracti32x4_mask((__v16si)(__m512i)(A), (int)(imm), \ | |
| 7396 | (__v4si)_mm_undefined_si128(), \ | |
| 7397 | (__mmask8)-1)) | |
| 7028 | #define _mm512_extracti32x4_epi32(A, imm) \ | |
| 7029 | ((__m128i)__builtin_ia32_extracti32x4_mask( \ | |
| 7030 | (__v16si)(__m512i)(A), (int)(imm), (__v4si)_mm_setzero_si128(), \ | |
| 7031 | (__mmask8) - 1)) | |
| 7398 | 7032 | |
| 7399 | 7033 | #define _mm512_mask_extracti32x4_epi32(W, U, A, imm) \ |
| 7400 | 7034 | ((__m128i)__builtin_ia32_extracti32x4_mask((__v16si)(__m512i)(A), (int)(imm), \ |
| ... | ... | @@ -7406,10 +7040,10 @@ _mm512_mask_cvtepi64_storeu_epi16 (void *__P, __mmask8 __M, __m512i __A) |
| 7406 | 7040 | (__v4si)_mm_setzero_si128(), \ |
| 7407 | 7041 | (__mmask8)(U))) |
| 7408 | 7042 | |
| 7409 | #define _mm512_extracti64x4_epi64(A, imm) \ | |
| 7043 | #define _mm512_extracti64x4_epi64(A, imm) \ | |
| 7410 | 7044 | ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \ |
| 7411 | (__v4di)_mm256_undefined_si256(), \ | |
| 7412 | (__mmask8)-1)) | |
| 7045 | (__v4di)_mm256_setzero_si256(), \ | |
| 7046 | (__mmask8) - 1)) | |
| 7413 | 7047 | |
| 7414 | 7048 | #define _mm512_mask_extracti64x4_epi64(W, U, A, imm) \ |
| 7415 | 7049 | ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \ |
| ... | ... | @@ -8274,93 +7908,82 @@ _mm_mask3_fnmsub_sd (__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U) |
| 8274 | 7908 | (__v8di)_mm512_permutex_epi64((X), (C)), \ |
| 8275 | 7909 | (__v8di)_mm512_setzero_si512())) |
| 8276 | 7910 | |
| 8277 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8278 | _mm512_permutexvar_pd (__m512i __X, __m512d __Y) | |
| 8279 | { | |
| 7911 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7912 | _mm512_permutexvar_pd(__m512i __X, __m512d __Y) { | |
| 8280 | 7913 | return (__m512d)__builtin_ia32_permvardf512((__v8df) __Y, (__v8di) __X); |
| 8281 | 7914 | } |
| 8282 | 7915 | |
| 8283 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8284 | _mm512_mask_permutexvar_pd (__m512d __W, __mmask8 __U, __m512i __X, __m512d __Y) | |
| 8285 | { | |
| 7916 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7917 | _mm512_mask_permutexvar_pd(__m512d __W, __mmask8 __U, __m512i __X, | |
| 7918 | __m512d __Y) { | |
| 8286 | 7919 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 8287 | 7920 | (__v8df)_mm512_permutexvar_pd(__X, __Y), |
| 8288 | 7921 | (__v8df)__W); |
| 8289 | 7922 | } |
| 8290 | 7923 | |
| 8291 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8292 | _mm512_maskz_permutexvar_pd (__mmask8 __U, __m512i __X, __m512d __Y) | |
| 8293 | { | |
| 7924 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7925 | _mm512_maskz_permutexvar_pd(__mmask8 __U, __m512i __X, __m512d __Y) { | |
| 8294 | 7926 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 8295 | 7927 | (__v8df)_mm512_permutexvar_pd(__X, __Y), |
| 8296 | 7928 | (__v8df)_mm512_setzero_pd()); |
| 8297 | 7929 | } |
| 8298 | 7930 | |
| 8299 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 8300 | _mm512_permutexvar_epi64 (__m512i __X, __m512i __Y) | |
| 8301 | { | |
| 7931 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7932 | _mm512_permutexvar_epi64(__m512i __X, __m512i __Y) { | |
| 8302 | 7933 | return (__m512i)__builtin_ia32_permvardi512((__v8di)__Y, (__v8di)__X); |
| 8303 | 7934 | } |
| 8304 | 7935 | |
| 8305 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 8306 | _mm512_maskz_permutexvar_epi64 (__mmask8 __M, __m512i __X, __m512i __Y) | |
| 8307 | { | |
| 7936 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7937 | _mm512_maskz_permutexvar_epi64(__mmask8 __M, __m512i __X, __m512i __Y) { | |
| 8308 | 7938 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 8309 | 7939 | (__v8di)_mm512_permutexvar_epi64(__X, __Y), |
| 8310 | 7940 | (__v8di)_mm512_setzero_si512()); |
| 8311 | 7941 | } |
| 8312 | 7942 | |
| 8313 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 8314 | _mm512_mask_permutexvar_epi64 (__m512i __W, __mmask8 __M, __m512i __X, | |
| 8315 | __m512i __Y) | |
| 8316 | { | |
| 7943 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7944 | _mm512_mask_permutexvar_epi64(__m512i __W, __mmask8 __M, __m512i __X, | |
| 7945 | __m512i __Y) { | |
| 8317 | 7946 | return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, |
| 8318 | 7947 | (__v8di)_mm512_permutexvar_epi64(__X, __Y), |
| 8319 | 7948 | (__v8di)__W); |
| 8320 | 7949 | } |
| 8321 | 7950 | |
| 8322 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8323 | _mm512_permutexvar_ps (__m512i __X, __m512 __Y) | |
| 8324 | { | |
| 7951 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7952 | _mm512_permutexvar_ps(__m512i __X, __m512 __Y) { | |
| 8325 | 7953 | return (__m512)__builtin_ia32_permvarsf512((__v16sf)__Y, (__v16si)__X); |
| 8326 | 7954 | } |
| 8327 | 7955 | |
| 8328 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8329 | _mm512_mask_permutexvar_ps (__m512 __W, __mmask16 __U, __m512i __X, __m512 __Y) | |
| 8330 | { | |
| 7956 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7957 | _mm512_mask_permutexvar_ps(__m512 __W, __mmask16 __U, __m512i __X, __m512 __Y) { | |
| 8331 | 7958 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 8332 | 7959 | (__v16sf)_mm512_permutexvar_ps(__X, __Y), |
| 8333 | 7960 | (__v16sf)__W); |
| 8334 | 7961 | } |
| 8335 | 7962 | |
| 8336 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8337 | _mm512_maskz_permutexvar_ps (__mmask16 __U, __m512i __X, __m512 __Y) | |
| 8338 | { | |
| 7963 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7964 | _mm512_maskz_permutexvar_ps(__mmask16 __U, __m512i __X, __m512 __Y) { | |
| 8339 | 7965 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 8340 | 7966 | (__v16sf)_mm512_permutexvar_ps(__X, __Y), |
| 8341 | 7967 | (__v16sf)_mm512_setzero_ps()); |
| 8342 | 7968 | } |
| 8343 | 7969 | |
| 8344 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 8345 | _mm512_permutexvar_epi32 (__m512i __X, __m512i __Y) | |
| 8346 | { | |
| 7970 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7971 | _mm512_permutexvar_epi32(__m512i __X, __m512i __Y) { | |
| 8347 | 7972 | return (__m512i)__builtin_ia32_permvarsi512((__v16si)__Y, (__v16si)__X); |
| 8348 | 7973 | } |
| 8349 | 7974 | |
| 8350 | 7975 | #define _mm512_permutevar_epi32 _mm512_permutexvar_epi32 |
| 8351 | 7976 | |
| 8352 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 8353 | _mm512_maskz_permutexvar_epi32 (__mmask16 __M, __m512i __X, __m512i __Y) | |
| 8354 | { | |
| 7977 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7978 | _mm512_maskz_permutexvar_epi32(__mmask16 __M, __m512i __X, __m512i __Y) { | |
| 8355 | 7979 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 8356 | 7980 | (__v16si)_mm512_permutexvar_epi32(__X, __Y), |
| 8357 | 7981 | (__v16si)_mm512_setzero_si512()); |
| 8358 | 7982 | } |
| 8359 | 7983 | |
| 8360 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 8361 | _mm512_mask_permutexvar_epi32 (__m512i __W, __mmask16 __M, __m512i __X, | |
| 8362 | __m512i __Y) | |
| 8363 | { | |
| 7984 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 7985 | _mm512_mask_permutexvar_epi32(__m512i __W, __mmask16 __M, __m512i __X, | |
| 7986 | __m512i __Y) { | |
| 8364 | 7987 | return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, |
| 8365 | 7988 | (__v16si)_mm512_permutexvar_epi32(__X, __Y), |
| 8366 | 7989 | (__v16si)__W); |
| ... | ... | @@ -8368,69 +7991,59 @@ _mm512_mask_permutexvar_epi32 (__m512i __W, __mmask16 __M, __m512i __X, |
| 8368 | 7991 | |
| 8369 | 7992 | #define _mm512_mask_permutevar_epi32 _mm512_mask_permutexvar_epi32 |
| 8370 | 7993 | |
| 8371 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 8372 | _mm512_kand (__mmask16 __A, __mmask16 __B) | |
| 8373 | { | |
| 7994 | static __inline__ __mmask16 | |
| 7995 | __DEFAULT_FN_ATTRS_CONSTEXPR _mm512_kand(__mmask16 __A, __mmask16 __B) { | |
| 8374 | 7996 | return (__mmask16) __builtin_ia32_kandhi ((__mmask16) __A, (__mmask16) __B); |
| 8375 | 7997 | } |
| 8376 | 7998 | |
| 8377 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 8378 | _mm512_kandn (__mmask16 __A, __mmask16 __B) | |
| 8379 | { | |
| 7999 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8000 | _mm512_kandn(__mmask16 __A, __mmask16 __B) { | |
| 8380 | 8001 | return (__mmask16) __builtin_ia32_kandnhi ((__mmask16) __A, (__mmask16) __B); |
| 8381 | 8002 | } |
| 8382 | 8003 | |
| 8383 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 8384 | _mm512_kor (__mmask16 __A, __mmask16 __B) | |
| 8385 | { | |
| 8004 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8005 | _mm512_kor(__mmask16 __A, __mmask16 __B) { | |
| 8386 | 8006 | return (__mmask16) __builtin_ia32_korhi ((__mmask16) __A, (__mmask16) __B); |
| 8387 | 8007 | } |
| 8388 | 8008 | |
| 8389 | static __inline__ int __DEFAULT_FN_ATTRS | |
| 8390 | _mm512_kortestc (__mmask16 __A, __mmask16 __B) | |
| 8391 | { | |
| 8009 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8010 | _mm512_kortestc(__mmask16 __A, __mmask16 __B) { | |
| 8392 | 8011 | return __builtin_ia32_kortestchi ((__mmask16) __A, (__mmask16) __B); |
| 8393 | 8012 | } |
| 8394 | 8013 | |
| 8395 | static __inline__ int __DEFAULT_FN_ATTRS | |
| 8396 | _mm512_kortestz (__mmask16 __A, __mmask16 __B) | |
| 8397 | { | |
| 8014 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8015 | _mm512_kortestz(__mmask16 __A, __mmask16 __B) { | |
| 8398 | 8016 | return __builtin_ia32_kortestzhi ((__mmask16) __A, (__mmask16) __B); |
| 8399 | 8017 | } |
| 8400 | 8018 | |
| 8401 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 8402 | _kortestc_mask16_u8(__mmask16 __A, __mmask16 __B) | |
| 8403 | { | |
| 8019 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8020 | _kortestc_mask16_u8(__mmask16 __A, __mmask16 __B) { | |
| 8404 | 8021 | return (unsigned char)__builtin_ia32_kortestchi(__A, __B); |
| 8405 | 8022 | } |
| 8406 | 8023 | |
| 8407 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 8408 | _kortestz_mask16_u8(__mmask16 __A, __mmask16 __B) | |
| 8409 | { | |
| 8024 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8025 | _kortestz_mask16_u8(__mmask16 __A, __mmask16 __B) { | |
| 8410 | 8026 | return (unsigned char)__builtin_ia32_kortestzhi(__A, __B); |
| 8411 | 8027 | } |
| 8412 | 8028 | |
| 8413 | static __inline__ unsigned char __DEFAULT_FN_ATTRS | |
| 8029 | static __inline__ unsigned char __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8414 | 8030 | _kortest_mask16_u8(__mmask16 __A, __mmask16 __B, unsigned char *__C) { |
| 8415 | 8031 | *__C = (unsigned char)__builtin_ia32_kortestchi(__A, __B); |
| 8416 | 8032 | return (unsigned char)__builtin_ia32_kortestzhi(__A, __B); |
| 8417 | 8033 | } |
| 8418 | 8034 | |
| 8419 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 8420 | _mm512_kunpackb (__mmask16 __A, __mmask16 __B) | |
| 8421 | { | |
| 8035 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8036 | _mm512_kunpackb(__mmask16 __A, __mmask16 __B) { | |
| 8422 | 8037 | return (__mmask16) __builtin_ia32_kunpckhi ((__mmask16) __A, (__mmask16) __B); |
| 8423 | 8038 | } |
| 8424 | 8039 | |
| 8425 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 8426 | _mm512_kxnor (__mmask16 __A, __mmask16 __B) | |
| 8427 | { | |
| 8040 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8041 | _mm512_kxnor(__mmask16 __A, __mmask16 __B) { | |
| 8428 | 8042 | return (__mmask16) __builtin_ia32_kxnorhi ((__mmask16) __A, (__mmask16) __B); |
| 8429 | 8043 | } |
| 8430 | 8044 | |
| 8431 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 8432 | _mm512_kxor (__mmask16 __A, __mmask16 __B) | |
| 8433 | { | |
| 8045 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8046 | _mm512_kxor(__mmask16 __A, __mmask16 __B) { | |
| 8434 | 8047 | return (__mmask16) __builtin_ia32_kxorhi ((__mmask16) __A, (__mmask16) __B); |
| 8435 | 8048 | } |
| 8436 | 8049 | |
| ... | ... | @@ -8447,12 +8060,12 @@ _mm512_kxor (__mmask16 __A, __mmask16 __B) |
| 8447 | 8060 | #define _kshiftri_mask16(A, I) \ |
| 8448 | 8061 | ((__mmask16)__builtin_ia32_kshiftrihi((__mmask16)(A), (unsigned int)(I))) |
| 8449 | 8062 | |
| 8450 | static __inline__ unsigned int __DEFAULT_FN_ATTRS | |
| 8451 | _cvtmask16_u32(__mmask16 __A) { | |
| 8063 | static __inline__ unsigned int | |
| 8064 | __DEFAULT_FN_ATTRS_CONSTEXPR _cvtmask16_u32(__mmask16 __A) { | |
| 8452 | 8065 | return (unsigned int)__builtin_ia32_kmovw((__mmask16)__A); |
| 8453 | 8066 | } |
| 8454 | 8067 | |
| 8455 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS | |
| 8068 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 8456 | 8069 | _cvtu32_mask16(unsigned int __A) { |
| 8457 | 8070 | return (__mmask16)__builtin_ia32_kmovw((__mmask16)__A); |
| 8458 | 8071 | } |
| ... | ... | @@ -8665,74 +8278,66 @@ _mm512_mask_testn_epi64_mask (__mmask8 __U, __m512i __A, __m512i __B) |
| 8665 | 8278 | _mm512_setzero_si512()); |
| 8666 | 8279 | } |
| 8667 | 8280 | |
| 8668 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8281 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8669 | 8282 | _mm512_movehdup_ps (__m512 __A) |
| 8670 | 8283 | { |
| 8671 | 8284 | return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A, |
| 8672 | 8285 | 1, 1, 3, 3, 5, 5, 7, 7, 9, 9, 11, 11, 13, 13, 15, 15); |
| 8673 | 8286 | } |
| 8674 | 8287 | |
| 8675 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8676 | _mm512_mask_movehdup_ps (__m512 __W, __mmask16 __U, __m512 __A) | |
| 8677 | { | |
| 8288 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8289 | _mm512_mask_movehdup_ps(__m512 __W, __mmask16 __U, __m512 __A) { | |
| 8678 | 8290 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 8679 | 8291 | (__v16sf)_mm512_movehdup_ps(__A), |
| 8680 | 8292 | (__v16sf)__W); |
| 8681 | 8293 | } |
| 8682 | 8294 | |
| 8683 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8684 | _mm512_maskz_movehdup_ps (__mmask16 __U, __m512 __A) | |
| 8685 | { | |
| 8295 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8296 | _mm512_maskz_movehdup_ps(__mmask16 __U, __m512 __A) { | |
| 8686 | 8297 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 8687 | 8298 | (__v16sf)_mm512_movehdup_ps(__A), |
| 8688 | 8299 | (__v16sf)_mm512_setzero_ps()); |
| 8689 | 8300 | } |
| 8690 | 8301 | |
| 8691 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8302 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8692 | 8303 | _mm512_moveldup_ps (__m512 __A) |
| 8693 | 8304 | { |
| 8694 | 8305 | return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A, |
| 8695 | 8306 | 0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14); |
| 8696 | 8307 | } |
| 8697 | 8308 | |
| 8698 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8699 | _mm512_mask_moveldup_ps (__m512 __W, __mmask16 __U, __m512 __A) | |
| 8700 | { | |
| 8309 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8310 | _mm512_mask_moveldup_ps(__m512 __W, __mmask16 __U, __m512 __A) { | |
| 8701 | 8311 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 8702 | 8312 | (__v16sf)_mm512_moveldup_ps(__A), |
| 8703 | 8313 | (__v16sf)__W); |
| 8704 | 8314 | } |
| 8705 | 8315 | |
| 8706 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8707 | _mm512_maskz_moveldup_ps (__mmask16 __U, __m512 __A) | |
| 8708 | { | |
| 8316 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8317 | _mm512_maskz_moveldup_ps(__mmask16 __U, __m512 __A) { | |
| 8709 | 8318 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, |
| 8710 | 8319 | (__v16sf)_mm512_moveldup_ps(__A), |
| 8711 | 8320 | (__v16sf)_mm512_setzero_ps()); |
| 8712 | 8321 | } |
| 8713 | 8322 | |
| 8714 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 8715 | _mm_mask_move_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) | |
| 8716 | { | |
| 8323 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 8324 | _mm_mask_move_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { | |
| 8717 | 8325 | return __builtin_ia32_selectss_128(__U, _mm_move_ss(__A, __B), __W); |
| 8718 | 8326 | } |
| 8719 | 8327 | |
| 8720 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 8721 | _mm_maskz_move_ss (__mmask8 __U, __m128 __A, __m128 __B) | |
| 8722 | { | |
| 8328 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 8329 | _mm_maskz_move_ss(__mmask8 __U, __m128 __A, __m128 __B) { | |
| 8723 | 8330 | return __builtin_ia32_selectss_128(__U, _mm_move_ss(__A, __B), |
| 8724 | 8331 | _mm_setzero_ps()); |
| 8725 | 8332 | } |
| 8726 | 8333 | |
| 8727 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 8728 | _mm_mask_move_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) | |
| 8729 | { | |
| 8334 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 8335 | _mm_mask_move_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { | |
| 8730 | 8336 | return __builtin_ia32_selectsd_128(__U, _mm_move_sd(__A, __B), __W); |
| 8731 | 8337 | } |
| 8732 | 8338 | |
| 8733 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 8734 | _mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B) | |
| 8735 | { | |
| 8339 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 8340 | _mm_maskz_move_sd(__mmask8 __U, __m128d __A, __m128d __B) { | |
| 8736 | 8341 | return __builtin_ia32_selectsd_128(__U, _mm_move_sd(__A, __B), |
| 8737 | 8342 | _mm_setzero_pd()); |
| 8738 | 8343 | } |
| ... | ... | @@ -8941,70 +8546,57 @@ _mm512_maskz_expand_epi32 (__mmask16 __U, __m512i __A) |
| 8941 | 8546 | (__v8df)_mm512_setzero_pd(), \ |
| 8942 | 8547 | (__mmask8)(U), (int)(R))) |
| 8943 | 8548 | |
| 8944 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8945 | _mm512_cvtps_pd (__m256 __A) | |
| 8946 | { | |
| 8549 | static __inline__ __m512d | |
| 8550 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_cvtps_pd(__m256 __A) { | |
| 8947 | 8551 | return (__m512d) __builtin_convertvector((__v8sf)__A, __v8df); |
| 8948 | 8552 | } |
| 8949 | 8553 | |
| 8950 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8951 | _mm512_mask_cvtps_pd (__m512d __W, __mmask8 __U, __m256 __A) | |
| 8952 | { | |
| 8554 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8555 | _mm512_mask_cvtps_pd(__m512d __W, __mmask8 __U, __m256 __A) { | |
| 8953 | 8556 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 8954 | 8557 | (__v8df)_mm512_cvtps_pd(__A), |
| 8955 | 8558 | (__v8df)__W); |
| 8956 | 8559 | } |
| 8957 | 8560 | |
| 8958 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8959 | _mm512_maskz_cvtps_pd (__mmask8 __U, __m256 __A) | |
| 8960 | { | |
| 8561 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8562 | _mm512_maskz_cvtps_pd(__mmask8 __U, __m256 __A) { | |
| 8961 | 8563 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, |
| 8962 | 8564 | (__v8df)_mm512_cvtps_pd(__A), |
| 8963 | 8565 | (__v8df)_mm512_setzero_pd()); |
| 8964 | 8566 | } |
| 8965 | 8567 | |
| 8966 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8967 | _mm512_cvtpslo_pd (__m512 __A) | |
| 8968 | { | |
| 8568 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8569 | _mm512_cvtpslo_pd(__m512 __A) { | |
| 8969 | 8570 | return (__m512d) _mm512_cvtps_pd(_mm512_castps512_ps256(__A)); |
| 8970 | 8571 | } |
| 8971 | 8572 | |
| 8972 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8973 | _mm512_mask_cvtpslo_pd (__m512d __W, __mmask8 __U, __m512 __A) | |
| 8974 | { | |
| 8573 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8574 | _mm512_mask_cvtpslo_pd(__m512d __W, __mmask8 __U, __m512 __A) { | |
| 8975 | 8575 | return (__m512d) _mm512_mask_cvtps_pd(__W, __U, _mm512_castps512_ps256(__A)); |
| 8976 | 8576 | } |
| 8977 | 8577 | |
| 8978 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8979 | _mm512_mask_mov_pd (__m512d __W, __mmask8 __U, __m512d __A) | |
| 8980 | { | |
| 8981 | return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U, | |
| 8982 | (__v8df) __A, | |
| 8983 | (__v8df) __W); | |
| 8578 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8579 | _mm512_mask_mov_pd(__m512d __W, __mmask8 __U, __m512d __A) { | |
| 8580 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, (__v8df)__A, | |
| 8581 | (__v8df)__W); | |
| 8984 | 8582 | } |
| 8985 | 8583 | |
| 8986 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 8987 | _mm512_maskz_mov_pd (__mmask8 __U, __m512d __A) | |
| 8988 | { | |
| 8989 | return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U, | |
| 8990 | (__v8df) __A, | |
| 8991 | (__v8df) _mm512_setzero_pd ()); | |
| 8584 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8585 | _mm512_maskz_mov_pd(__mmask8 __U, __m512d __A) { | |
| 8586 | return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, (__v8df)__A, | |
| 8587 | (__v8df)_mm512_setzero_pd()); | |
| 8992 | 8588 | } |
| 8993 | 8589 | |
| 8994 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 8995 | _mm512_mask_mov_ps (__m512 __W, __mmask16 __U, __m512 __A) | |
| 8996 | { | |
| 8997 | return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U, | |
| 8998 | (__v16sf) __A, | |
| 8999 | (__v16sf) __W); | |
| 8590 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8591 | _mm512_mask_mov_ps(__m512 __W, __mmask16 __U, __m512 __A) { | |
| 8592 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, (__v16sf)__A, | |
| 8593 | (__v16sf)__W); | |
| 9000 | 8594 | } |
| 9001 | 8595 | |
| 9002 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 9003 | _mm512_maskz_mov_ps (__mmask16 __U, __m512 __A) | |
| 9004 | { | |
| 9005 | return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U, | |
| 9006 | (__v16sf) __A, | |
| 9007 | (__v16sf) _mm512_setzero_ps ()); | |
| 8596 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8597 | _mm512_maskz_mov_ps(__mmask16 __U, __m512 __A) { | |
| 8598 | return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, (__v16sf)__A, | |
| 8599 | (__v16sf)_mm512_setzero_ps()); | |
| 9008 | 8600 | } |
| 9009 | 8601 | |
| 9010 | 8602 | static __inline__ void __DEFAULT_FN_ATTRS512 |
| ... | ... | @@ -9053,18 +8645,16 @@ _mm512_mask_compressstoreu_epi32 (void *__P, __mmask16 __U, __m512i __A) |
| 9053 | 8645 | (__v4sf)_mm_setzero_ps(), \ |
| 9054 | 8646 | (__mmask8)(U), (int)(R))) |
| 9055 | 8647 | |
| 9056 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 9057 | _mm_mask_cvtsd_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128d __B) | |
| 9058 | { | |
| 8648 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 8649 | _mm_mask_cvtsd_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128d __B) { | |
| 9059 | 8650 | return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)__A, |
| 9060 | 8651 | (__v2df)__B, |
| 9061 | 8652 | (__v4sf)__W, |
| 9062 | 8653 | (__mmask8)__U, _MM_FROUND_CUR_DIRECTION); |
| 9063 | 8654 | } |
| 9064 | 8655 | |
| 9065 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 9066 | _mm_maskz_cvtsd_ss (__mmask8 __U, __m128 __A, __m128d __B) | |
| 9067 | { | |
| 8656 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 8657 | _mm_maskz_cvtsd_ss(__mmask8 __U, __m128 __A, __m128d __B) { | |
| 9068 | 8658 | return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)__A, |
| 9069 | 8659 | (__v2df)__B, |
| 9070 | 8660 | (__v4sf)_mm_setzero_ps(), |
| ... | ... | @@ -9188,34 +8778,32 @@ _mm_cvtu64_ss (__m128 __A, unsigned long long __B) |
| 9188 | 8778 | } |
| 9189 | 8779 | #endif |
| 9190 | 8780 | |
| 9191 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 9192 | _mm512_mask_set1_epi32 (__m512i __O, __mmask16 __M, int __A) | |
| 9193 | { | |
| 8781 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8782 | _mm512_mask_set1_epi32(__m512i __O, __mmask16 __M, int __A) { | |
| 9194 | 8783 | return (__m512i) __builtin_ia32_selectd_512(__M, |
| 9195 | 8784 | (__v16si) _mm512_set1_epi32(__A), |
| 9196 | 8785 | (__v16si) __O); |
| 9197 | 8786 | } |
| 9198 | 8787 | |
| 9199 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 9200 | _mm512_mask_set1_epi64 (__m512i __O, __mmask8 __M, long long __A) | |
| 9201 | { | |
| 8788 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8789 | _mm512_mask_set1_epi64(__m512i __O, __mmask8 __M, long long __A) { | |
| 9202 | 8790 | return (__m512i) __builtin_ia32_selectq_512(__M, |
| 9203 | 8791 | (__v8di) _mm512_set1_epi64(__A), |
| 9204 | 8792 | (__v8di) __O); |
| 9205 | 8793 | } |
| 9206 | 8794 | |
| 9207 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 9208 | _mm512_set_epi8 (char __e63, char __e62, char __e61, char __e60, char __e59, | |
| 9209 | char __e58, char __e57, char __e56, char __e55, char __e54, char __e53, | |
| 9210 | char __e52, char __e51, char __e50, char __e49, char __e48, char __e47, | |
| 9211 | char __e46, char __e45, char __e44, char __e43, char __e42, char __e41, | |
| 9212 | char __e40, char __e39, char __e38, char __e37, char __e36, char __e35, | |
| 9213 | char __e34, char __e33, char __e32, char __e31, char __e30, char __e29, | |
| 9214 | char __e28, char __e27, char __e26, char __e25, char __e24, char __e23, | |
| 9215 | char __e22, char __e21, char __e20, char __e19, char __e18, char __e17, | |
| 9216 | char __e16, char __e15, char __e14, char __e13, char __e12, char __e11, | |
| 9217 | char __e10, char __e9, char __e8, char __e7, char __e6, char __e5, | |
| 9218 | char __e4, char __e3, char __e2, char __e1, char __e0) { | |
| 8795 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set_epi8( | |
| 8796 | char __e63, char __e62, char __e61, char __e60, char __e59, char __e58, | |
| 8797 | char __e57, char __e56, char __e55, char __e54, char __e53, char __e52, | |
| 8798 | char __e51, char __e50, char __e49, char __e48, char __e47, char __e46, | |
| 8799 | char __e45, char __e44, char __e43, char __e42, char __e41, char __e40, | |
| 8800 | char __e39, char __e38, char __e37, char __e36, char __e35, char __e34, | |
| 8801 | char __e33, char __e32, char __e31, char __e30, char __e29, char __e28, | |
| 8802 | char __e27, char __e26, char __e25, char __e24, char __e23, char __e22, | |
| 8803 | char __e21, char __e20, char __e19, char __e18, char __e17, char __e16, | |
| 8804 | char __e15, char __e14, char __e13, char __e12, char __e11, char __e10, | |
| 8805 | char __e9, char __e8, char __e7, char __e6, char __e5, char __e4, char __e3, | |
| 8806 | char __e2, char __e1, char __e0) { | |
| 9219 | 8807 | |
| 9220 | 8808 | return __extension__ (__m512i)(__v64qi) |
| 9221 | 8809 | {__e0, __e1, __e2, __e3, __e4, __e5, __e6, __e7, |
| ... | ... | @@ -9228,14 +8816,13 @@ _mm512_set_epi8 (char __e63, char __e62, char __e61, char __e60, char __e59, |
| 9228 | 8816 | __e56, __e57, __e58, __e59, __e60, __e61, __e62, __e63}; |
| 9229 | 8817 | } |
| 9230 | 8818 | |
| 9231 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 9232 | _mm512_set_epi16(short __e31, short __e30, short __e29, short __e28, | |
| 9233 | short __e27, short __e26, short __e25, short __e24, short __e23, | |
| 9234 | short __e22, short __e21, short __e20, short __e19, short __e18, | |
| 9235 | short __e17, short __e16, short __e15, short __e14, short __e13, | |
| 9236 | short __e12, short __e11, short __e10, short __e9, short __e8, | |
| 9237 | short __e7, short __e6, short __e5, short __e4, short __e3, | |
| 9238 | short __e2, short __e1, short __e0) { | |
| 8819 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set_epi16( | |
| 8820 | short __e31, short __e30, short __e29, short __e28, short __e27, | |
| 8821 | short __e26, short __e25, short __e24, short __e23, short __e22, | |
| 8822 | short __e21, short __e20, short __e19, short __e18, short __e17, | |
| 8823 | short __e16, short __e15, short __e14, short __e13, short __e12, | |
| 8824 | short __e11, short __e10, short __e9, short __e8, short __e7, short __e6, | |
| 8825 | short __e5, short __e4, short __e3, short __e2, short __e1, short __e0) { | |
| 9239 | 8826 | return __extension__ (__m512i)(__v32hi) |
| 9240 | 8827 | {__e0, __e1, __e2, __e3, __e4, __e5, __e6, __e7, |
| 9241 | 8828 | __e8, __e9, __e10, __e11, __e12, __e13, __e14, __e15, |
| ... | ... | @@ -9243,81 +8830,81 @@ _mm512_set_epi16(short __e31, short __e30, short __e29, short __e28, |
| 9243 | 8830 | __e24, __e25, __e26, __e27, __e28, __e29, __e30, __e31 }; |
| 9244 | 8831 | } |
| 9245 | 8832 | |
| 9246 | static __inline __m512i __DEFAULT_FN_ATTRS512 | |
| 9247 | _mm512_set_epi32 (int __A, int __B, int __C, int __D, | |
| 9248 | int __E, int __F, int __G, int __H, | |
| 9249 | int __I, int __J, int __K, int __L, | |
| 9250 | int __M, int __N, int __O, int __P) | |
| 9251 | { | |
| 8833 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set_epi32( | |
| 8834 | int __A, int __B, int __C, int __D, int __E, int __F, int __G, int __H, | |
| 8835 | int __I, int __J, int __K, int __L, int __M, int __N, int __O, int __P) { | |
| 9252 | 8836 | return __extension__ (__m512i)(__v16si) |
| 9253 | 8837 | { __P, __O, __N, __M, __L, __K, __J, __I, |
| 9254 | 8838 | __H, __G, __F, __E, __D, __C, __B, __A }; |
| 9255 | 8839 | } |
| 9256 | 8840 | |
| 9257 | #define _mm512_setr_epi32(e0,e1,e2,e3,e4,e5,e6,e7, \ | |
| 9258 | e8,e9,e10,e11,e12,e13,e14,e15) \ | |
| 9259 | _mm512_set_epi32((e15),(e14),(e13),(e12),(e11),(e10),(e9),(e8),(e7),(e6), \ | |
| 9260 | (e5),(e4),(e3),(e2),(e1),(e0)) | |
| 8841 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_setr_epi32( | |
| 8842 | int e0, int e1, int e2, int e3, int e4, int e5, int e6, int e7, int e8, | |
| 8843 | int e9, int e10, int e11, int e12, int e13, int e14, int e15) { | |
| 8844 | return _mm512_set_epi32(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, | |
| 8845 | e3, e2, e1, e0); | |
| 8846 | } | |
| 9261 | 8847 | |
| 9262 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 9263 | _mm512_set_epi64 (long long __A, long long __B, long long __C, | |
| 9264 | long long __D, long long __E, long long __F, | |
| 9265 | long long __G, long long __H) | |
| 9266 | { | |
| 8848 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8849 | _mm512_set_epi64(long long __A, long long __B, long long __C, long long __D, | |
| 8850 | long long __E, long long __F, long long __G, long long __H) { | |
| 9267 | 8851 | return __extension__ (__m512i) (__v8di) |
| 9268 | 8852 | { __H, __G, __F, __E, __D, __C, __B, __A }; |
| 9269 | 8853 | } |
| 9270 | 8854 | |
| 9271 | #define _mm512_setr_epi64(e0,e1,e2,e3,e4,e5,e6,e7) \ | |
| 9272 | _mm512_set_epi64((e7),(e6),(e5),(e4),(e3),(e2),(e1),(e0)) | |
| 8855 | static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8856 | _mm512_setr_epi64(long long e0, long long e1, long long e2, long long e3, | |
| 8857 | long long e4, long long e5, long long e6, long long e7) { | |
| 8858 | return _mm512_set_epi64(e7, e6, e5, e4, e3, e2, e1, e0); | |
| 8859 | } | |
| 9273 | 8860 | |
| 9274 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 9275 | _mm512_set_pd (double __A, double __B, double __C, double __D, | |
| 9276 | double __E, double __F, double __G, double __H) | |
| 9277 | { | |
| 8861 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8862 | _mm512_set_pd(double __A, double __B, double __C, double __D, double __E, | |
| 8863 | double __F, double __G, double __H) { | |
| 9278 | 8864 | return __extension__ (__m512d) |
| 9279 | 8865 | { __H, __G, __F, __E, __D, __C, __B, __A }; |
| 9280 | 8866 | } |
| 9281 | 8867 | |
| 9282 | #define _mm512_setr_pd(e0,e1,e2,e3,e4,e5,e6,e7) \ | |
| 9283 | _mm512_set_pd((e7),(e6),(e5),(e4),(e3),(e2),(e1),(e0)) | |
| 8868 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8869 | _mm512_setr_pd(double e0, double e1, double e2, double e3, double e4, double e5, | |
| 8870 | double e6, double e7) { | |
| 8871 | return _mm512_set_pd(e7, e6, e5, e4, e3, e2, e1, e0); | |
| 8872 | } | |
| 9284 | 8873 | |
| 9285 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 9286 | _mm512_set_ps (float __A, float __B, float __C, float __D, | |
| 9287 | float __E, float __F, float __G, float __H, | |
| 9288 | float __I, float __J, float __K, float __L, | |
| 9289 | float __M, float __N, float __O, float __P) | |
| 9290 | { | |
| 8874 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8875 | _mm512_set_ps(float __A, float __B, float __C, float __D, float __E, float __F, | |
| 8876 | float __G, float __H, float __I, float __J, float __K, float __L, | |
| 8877 | float __M, float __N, float __O, float __P) { | |
| 9291 | 8878 | return __extension__ (__m512) |
| 9292 | 8879 | { __P, __O, __N, __M, __L, __K, __J, __I, |
| 9293 | 8880 | __H, __G, __F, __E, __D, __C, __B, __A }; |
| 9294 | 8881 | } |
| 9295 | 8882 | |
| 9296 | #define _mm512_setr_ps(e0,e1,e2,e3,e4,e5,e6,e7,e8,e9,e10,e11,e12,e13,e14,e15) \ | |
| 9297 | _mm512_set_ps((e15),(e14),(e13),(e12),(e11),(e10),(e9),(e8),(e7),(e6),(e5), \ | |
| 9298 | (e4),(e3),(e2),(e1),(e0)) | |
| 8883 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8884 | _mm512_setr_ps(float e0, float e1, float e2, float e3, float e4, float e5, | |
| 8885 | float e6, float e7, float e8, float e9, float e10, float e11, | |
| 8886 | float e12, float e13, float e14, float e15) { | |
| 8887 | return _mm512_set_ps(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, | |
| 8888 | e2, e1, e0); | |
| 8889 | } | |
| 9299 | 8890 | |
| 9300 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 9301 | _mm512_abs_ps(__m512 __A) | |
| 9302 | { | |
| 8891 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8892 | _mm512_abs_ps(__m512 __A) { | |
| 9303 | 8893 | return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFFFFFF),(__m512i)__A) ; |
| 9304 | 8894 | } |
| 9305 | 8895 | |
| 9306 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 | |
| 9307 | _mm512_mask_abs_ps(__m512 __W, __mmask16 __K, __m512 __A) | |
| 9308 | { | |
| 8896 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8897 | _mm512_mask_abs_ps(__m512 __W, __mmask16 __K, __m512 __A) { | |
| 9309 | 8898 | return (__m512)_mm512_mask_and_epi32((__m512i)__W, __K, _mm512_set1_epi32(0x7FFFFFFF),(__m512i)__A) ; |
| 9310 | 8899 | } |
| 9311 | 8900 | |
| 9312 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 9313 | _mm512_abs_pd(__m512d __A) | |
| 9314 | { | |
| 8901 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8902 | _mm512_abs_pd(__m512d __A) { | |
| 9315 | 8903 | return (__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A) ; |
| 9316 | 8904 | } |
| 9317 | 8905 | |
| 9318 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 | |
| 9319 | _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A) | |
| 9320 | { | |
| 8906 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8907 | _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A) { | |
| 9321 | 8908 | return (__m512d)_mm512_mask_and_epi64((__v8di)__W, __K, _mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A); |
| 9322 | 8909 | } |
| 9323 | 8910 | |
| ... | ... | @@ -9337,19 +8924,23 @@ _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A) |
| 9337 | 8924 | * This takes log2(n) steps where n is the number of elements in the vector. |
| 9338 | 8925 | */ |
| 9339 | 8926 | |
| 9340 | static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_add_epi64(__m512i __W) { | |
| 8927 | static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8928 | _mm512_reduce_add_epi64(__m512i __W) { | |
| 9341 | 8929 | return __builtin_reduce_add((__v8di)__W); |
| 9342 | 8930 | } |
| 9343 | 8931 | |
| 9344 | static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_mul_epi64(__m512i __W) { | |
| 8932 | static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8933 | _mm512_reduce_mul_epi64(__m512i __W) { | |
| 9345 | 8934 | return __builtin_reduce_mul((__v8di)__W); |
| 9346 | 8935 | } |
| 9347 | 8936 | |
| 9348 | static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_and_epi64(__m512i __W) { | |
| 8937 | static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8938 | _mm512_reduce_and_epi64(__m512i __W) { | |
| 9349 | 8939 | return __builtin_reduce_and((__v8di)__W); |
| 9350 | 8940 | } |
| 9351 | 8941 | |
| 9352 | static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_or_epi64(__m512i __W) { | |
| 8942 | static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 8943 | _mm512_reduce_or_epi64(__m512i __W) { | |
| 9353 | 8944 | return __builtin_reduce_or((__v8di)__W); |
| 9354 | 8945 | } |
| 9355 | 8946 | |
| ... | ... | @@ -9400,22 +8991,22 @@ _mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W) { |
| 9400 | 8991 | return __builtin_ia32_reduce_fmul_pd512(1.0, __W); |
| 9401 | 8992 | } |
| 9402 | 8993 | |
| 9403 | static __inline__ int __DEFAULT_FN_ATTRS512 | |
| 8994 | static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9404 | 8995 | _mm512_reduce_add_epi32(__m512i __W) { |
| 9405 | 8996 | return __builtin_reduce_add((__v16si)__W); |
| 9406 | 8997 | } |
| 9407 | 8998 | |
| 9408 | static __inline__ int __DEFAULT_FN_ATTRS512 | |
| 8999 | static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9409 | 9000 | _mm512_reduce_mul_epi32(__m512i __W) { |
| 9410 | 9001 | return __builtin_reduce_mul((__v16si)__W); |
| 9411 | 9002 | } |
| 9412 | 9003 | |
| 9413 | static __inline__ int __DEFAULT_FN_ATTRS512 | |
| 9004 | static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9414 | 9005 | _mm512_reduce_and_epi32(__m512i __W) { |
| 9415 | 9006 | return __builtin_reduce_and((__v16si)__W); |
| 9416 | 9007 | } |
| 9417 | 9008 | |
| 9418 | static __inline__ int __DEFAULT_FN_ATTRS512 | |
| 9009 | static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9419 | 9010 | _mm512_reduce_or_epi32(__m512i __W) { |
| 9420 | 9011 | return __builtin_reduce_or((__v16si)__W); |
| 9421 | 9012 | } |
| ... | ... | @@ -9466,22 +9057,22 @@ _mm512_mask_reduce_mul_ps(__mmask16 __M, __m512 __W) { |
| 9466 | 9057 | return __builtin_ia32_reduce_fmul_ps512(1.0f, __W); |
| 9467 | 9058 | } |
| 9468 | 9059 | |
| 9469 | static __inline__ long long __DEFAULT_FN_ATTRS512 | |
| 9060 | static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9470 | 9061 | _mm512_reduce_max_epi64(__m512i __V) { |
| 9471 | 9062 | return __builtin_reduce_max((__v8di)__V); |
| 9472 | 9063 | } |
| 9473 | 9064 | |
| 9474 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS512 | |
| 9065 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9475 | 9066 | _mm512_reduce_max_epu64(__m512i __V) { |
| 9476 | 9067 | return __builtin_reduce_max((__v8du)__V); |
| 9477 | 9068 | } |
| 9478 | 9069 | |
| 9479 | static __inline__ long long __DEFAULT_FN_ATTRS512 | |
| 9070 | static __inline__ long long __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9480 | 9071 | _mm512_reduce_min_epi64(__m512i __V) { |
| 9481 | 9072 | return __builtin_reduce_min((__v8di)__V); |
| 9482 | 9073 | } |
| 9483 | 9074 | |
| 9484 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS512 | |
| 9075 | static __inline__ unsigned long long __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9485 | 9076 | _mm512_reduce_min_epu64(__m512i __V) { |
| 9486 | 9077 | return __builtin_reduce_min((__v8du)__V); |
| 9487 | 9078 | } |
| ... | ... | @@ -9509,22 +9100,22 @@ _mm512_mask_reduce_min_epu64(__mmask8 __M, __m512i __V) { |
| 9509 | 9100 | __V = _mm512_mask_mov_epi64(_mm512_set1_epi64(-1LL), __M, __V); |
| 9510 | 9101 | return __builtin_reduce_min((__v8du)__V); |
| 9511 | 9102 | } |
| 9512 | static __inline__ int __DEFAULT_FN_ATTRS512 | |
| 9103 | static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9513 | 9104 | _mm512_reduce_max_epi32(__m512i __V) { |
| 9514 | 9105 | return __builtin_reduce_max((__v16si)__V); |
| 9515 | 9106 | } |
| 9516 | 9107 | |
| 9517 | static __inline__ unsigned int __DEFAULT_FN_ATTRS512 | |
| 9108 | static __inline__ unsigned int __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9518 | 9109 | _mm512_reduce_max_epu32(__m512i __V) { |
| 9519 | 9110 | return __builtin_reduce_max((__v16su)__V); |
| 9520 | 9111 | } |
| 9521 | 9112 | |
| 9522 | static __inline__ int __DEFAULT_FN_ATTRS512 | |
| 9113 | static __inline__ int __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9523 | 9114 | _mm512_reduce_min_epi32(__m512i __V) { |
| 9524 | 9115 | return __builtin_reduce_min((__v16si)__V); |
| 9525 | 9116 | } |
| 9526 | 9117 | |
| 9527 | static __inline__ unsigned int __DEFAULT_FN_ATTRS512 | |
| 9118 | static __inline__ unsigned int __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 9528 | 9119 | _mm512_reduce_min_epu32(__m512i __V) { |
| 9529 | 9120 | return __builtin_reduce_min((__v16su)__V); |
| 9530 | 9121 | } |
lib/include/avx512fp16intrin.h+112-110| ... | ... | @@ -22,26 +22,36 @@ typedef _Float16 __m512h_u __attribute__((__vector_size__(64), __aligned__(1))); |
| 22 | 22 | |
| 23 | 23 | /* Define the default attributes for the functions in this file. */ |
| 24 | 24 | #define __DEFAULT_FN_ATTRS512 \ |
| 25 | __attribute__((__always_inline__, __nodebug__, \ | |
| 26 | __target__("avx512fp16,evex512"), __min_vector_width__(512))) | |
| 25 | __attribute__((__always_inline__, __nodebug__, __target__("avx512fp16"), \ | |
| 26 | __min_vector_width__(512))) | |
| 27 | 27 | #define __DEFAULT_FN_ATTRS256 \ |
| 28 | __attribute__((__always_inline__, __nodebug__, \ | |
| 29 | __target__("avx512fp16,no-evex512"), \ | |
| 28 | __attribute__((__always_inline__, __nodebug__, __target__("avx512fp16"), \ | |
| 30 | 29 | __min_vector_width__(256))) |
| 31 | 30 | #define __DEFAULT_FN_ATTRS128 \ |
| 32 | __attribute__((__always_inline__, __nodebug__, \ | |
| 33 | __target__("avx512fp16,no-evex512"), \ | |
| 31 | __attribute__((__always_inline__, __nodebug__, __target__("avx512fp16"), \ | |
| 34 | 32 | __min_vector_width__(128))) |
| 35 | 33 | |
| 36 | static __inline__ _Float16 __DEFAULT_FN_ATTRS512 _mm512_cvtsh_h(__m512h __a) { | |
| 34 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 35 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr | |
| 36 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 37 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 38 | #else | |
| 39 | #define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 | |
| 40 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 41 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 42 | #endif | |
| 43 | ||
| 44 | static __inline__ _Float16 __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 45 | _mm512_cvtsh_h(__m512h __a) { | |
| 37 | 46 | return __a[0]; |
| 38 | 47 | } |
| 39 | 48 | |
| 40 | static __inline __m128h __DEFAULT_FN_ATTRS128 _mm_setzero_ph(void) { | |
| 49 | static __inline __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_setzero_ph(void) { | |
| 41 | 50 | return (__m128h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}; |
| 42 | 51 | } |
| 43 | 52 | |
| 44 | static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_setzero_ph(void) { | |
| 53 | static __inline __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 54 | _mm256_setzero_ph(void) { | |
| 45 | 55 | return (__m256h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, |
| 46 | 56 | 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}; |
| 47 | 57 | } |
| ... | ... | @@ -50,7 +60,8 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_undefined_ph(void) { |
| 50 | 60 | return (__m256h)__builtin_ia32_undef256(); |
| 51 | 61 | } |
| 52 | 62 | |
| 53 | static __inline __m512h __DEFAULT_FN_ATTRS512 _mm512_setzero_ph(void) { | |
| 63 | static __inline __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 64 | _mm512_setzero_ph(void) { | |
| 54 | 65 | return (__m512h){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, |
| 55 | 66 | 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, |
| 56 | 67 | 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}; |
| ... | ... | @@ -64,14 +75,15 @@ static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_undefined_ph(void) { |
| 64 | 75 | return (__m512h)__builtin_ia32_undef512(); |
| 65 | 76 | } |
| 66 | 77 | |
| 67 | static __inline __m512h __DEFAULT_FN_ATTRS512 _mm512_set1_ph(_Float16 __h) { | |
| 78 | static __inline __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 79 | _mm512_set1_ph(_Float16 __h) { | |
| 68 | 80 | return (__m512h)(__v32hf){__h, __h, __h, __h, __h, __h, __h, __h, |
| 69 | 81 | __h, __h, __h, __h, __h, __h, __h, __h, |
| 70 | 82 | __h, __h, __h, __h, __h, __h, __h, __h, |
| 71 | 83 | __h, __h, __h, __h, __h, __h, __h, __h}; |
| 72 | 84 | } |
| 73 | 85 | |
| 74 | static __inline __m512h __DEFAULT_FN_ATTRS512 | |
| 86 | static __inline __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 75 | 87 | _mm512_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4, |
| 76 | 88 | _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8, |
| 77 | 89 | _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12, |
| ... | ... | @@ -87,106 +99,111 @@ _mm512_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4, |
| 87 | 99 | __h4, __h3, __h2, __h1}; |
| 88 | 100 | } |
| 89 | 101 | |
| 90 | #define _mm512_setr_ph(h1, h2, h3, h4, h5, h6, h7, h8, h9, h10, h11, h12, h13, \ | |
| 91 | h14, h15, h16, h17, h18, h19, h20, h21, h22, h23, h24, \ | |
| 92 | h25, h26, h27, h28, h29, h30, h31, h32) \ | |
| 93 | _mm512_set_ph((h32), (h31), (h30), (h29), (h28), (h27), (h26), (h25), (h24), \ | |
| 94 | (h23), (h22), (h21), (h20), (h19), (h18), (h17), (h16), (h15), \ | |
| 95 | (h14), (h13), (h12), (h11), (h10), (h9), (h8), (h7), (h6), \ | |
| 96 | (h5), (h4), (h3), (h2), (h1)) | |
| 102 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_setr_ph( | |
| 103 | _Float16 e0, _Float16 e1, _Float16 e2, _Float16 e3, _Float16 e4, | |
| 104 | _Float16 e5, _Float16 e6, _Float16 e7, _Float16 e8, _Float16 e9, | |
| 105 | _Float16 e10, _Float16 e11, _Float16 e12, _Float16 e13, _Float16 e14, | |
| 106 | _Float16 e15, _Float16 e16, _Float16 e17, _Float16 e18, _Float16 e19, | |
| 107 | _Float16 e20, _Float16 e21, _Float16 e22, _Float16 e23, _Float16 e24, | |
| 108 | _Float16 e25, _Float16 e26, _Float16 e27, _Float16 e28, _Float16 e29, | |
| 109 | _Float16 e30, _Float16 e31) { | |
| 110 | return _mm512_set_ph(e31, e30, e29, e28, e27, e26, e25, e24, e23, e22, e21, | |
| 111 | e20, e19, e18, e17, e16, e15, e14, e13, e12, e11, e10, | |
| 112 | e9, e8, e7, e6, e5, e4, e3, e2, e1, e0); | |
| 113 | } | |
| 97 | 114 | |
| 98 | static __inline __m512h __DEFAULT_FN_ATTRS512 | |
| 115 | static __inline __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 99 | 116 | _mm512_set1_pch(_Float16 _Complex __h) { |
| 100 | 117 | return (__m512h)_mm512_set1_ps(__builtin_bit_cast(float, __h)); |
| 101 | 118 | } |
| 102 | 119 | |
| 103 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_castph_ps(__m128h __a) { | |
| 120 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castph_ps(__m128h __a) { | |
| 104 | 121 | return (__m128)__a; |
| 105 | 122 | } |
| 106 | 123 | |
| 107 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_castph_ps(__m256h __a) { | |
| 124 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_castph_ps(__m256h __a) { | |
| 108 | 125 | return (__m256)__a; |
| 109 | 126 | } |
| 110 | 127 | |
| 111 | static __inline__ __m512 __DEFAULT_FN_ATTRS512 _mm512_castph_ps(__m512h __a) { | |
| 128 | static __inline__ __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_castph_ps(__m512h __a) { | |
| 112 | 129 | return (__m512)__a; |
| 113 | 130 | } |
| 114 | 131 | |
| 115 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_castph_pd(__m128h __a) { | |
| 132 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castph_pd(__m128h __a) { | |
| 116 | 133 | return (__m128d)__a; |
| 117 | 134 | } |
| 118 | 135 | |
| 119 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_castph_pd(__m256h __a) { | |
| 136 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_castph_pd(__m256h __a) { | |
| 120 | 137 | return (__m256d)__a; |
| 121 | 138 | } |
| 122 | 139 | |
| 123 | static __inline__ __m512d __DEFAULT_FN_ATTRS512 _mm512_castph_pd(__m512h __a) { | |
| 140 | static __inline__ __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_castph_pd(__m512h __a) { | |
| 124 | 141 | return (__m512d)__a; |
| 125 | 142 | } |
| 126 | 143 | |
| 127 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_castph_si128(__m128h __a) { | |
| 144 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castph_si128(__m128h __a) { | |
| 128 | 145 | return (__m128i)__a; |
| 129 | 146 | } |
| 130 | 147 | |
| 131 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 148 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 132 | 149 | _mm256_castph_si256(__m256h __a) { |
| 133 | 150 | return (__m256i)__a; |
| 134 | 151 | } |
| 135 | 152 | |
| 136 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 | |
| 153 | static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 137 | 154 | _mm512_castph_si512(__m512h __a) { |
| 138 | 155 | return (__m512i)__a; |
| 139 | 156 | } |
| 140 | 157 | |
| 141 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_castps_ph(__m128 __a) { | |
| 158 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castps_ph(__m128 __a) { | |
| 142 | 159 | return (__m128h)__a; |
| 143 | 160 | } |
| 144 | 161 | |
| 145 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_castps_ph(__m256 __a) { | |
| 162 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_castps_ph(__m256 __a) { | |
| 146 | 163 | return (__m256h)__a; |
| 147 | 164 | } |
| 148 | 165 | |
| 149 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_castps_ph(__m512 __a) { | |
| 166 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_castps_ph(__m512 __a) { | |
| 150 | 167 | return (__m512h)__a; |
| 151 | 168 | } |
| 152 | 169 | |
| 153 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_castpd_ph(__m128d __a) { | |
| 170 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castpd_ph(__m128d __a) { | |
| 154 | 171 | return (__m128h)__a; |
| 155 | 172 | } |
| 156 | 173 | |
| 157 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_castpd_ph(__m256d __a) { | |
| 174 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_castpd_ph(__m256d __a) { | |
| 158 | 175 | return (__m256h)__a; |
| 159 | 176 | } |
| 160 | 177 | |
| 161 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_castpd_ph(__m512d __a) { | |
| 178 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_castpd_ph(__m512d __a) { | |
| 162 | 179 | return (__m512h)__a; |
| 163 | 180 | } |
| 164 | 181 | |
| 165 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_castsi128_ph(__m128i __a) { | |
| 182 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_castsi128_ph(__m128i __a) { | |
| 166 | 183 | return (__m128h)__a; |
| 167 | 184 | } |
| 168 | 185 | |
| 169 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 186 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 170 | 187 | _mm256_castsi256_ph(__m256i __a) { |
| 171 | 188 | return (__m256h)__a; |
| 172 | 189 | } |
| 173 | 190 | |
| 174 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 191 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 175 | 192 | _mm512_castsi512_ph(__m512i __a) { |
| 176 | 193 | return (__m512h)__a; |
| 177 | 194 | } |
| 178 | 195 | |
| 179 | static __inline__ __m128h __DEFAULT_FN_ATTRS256 | |
| 196 | static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 180 | 197 | _mm256_castph256_ph128(__m256h __a) { |
| 181 | 198 | return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7); |
| 182 | 199 | } |
| 183 | 200 | |
| 184 | static __inline__ __m128h __DEFAULT_FN_ATTRS512 | |
| 201 | static __inline__ __m128h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 185 | 202 | _mm512_castph512_ph128(__m512h __a) { |
| 186 | 203 | return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7); |
| 187 | 204 | } |
| 188 | 205 | |
| 189 | static __inline__ __m256h __DEFAULT_FN_ATTRS512 | |
| 206 | static __inline__ __m256h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 190 | 207 | _mm512_castph512_ph256(__m512h __a) { |
| 191 | 208 | return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, |
| 192 | 209 | 12, 13, 14, 15); |
| ... | ... | @@ -229,7 +246,7 @@ _mm512_castph256_ph512(__m256h __a) { |
| 229 | 246 | /// A 128-bit vector of [8 x half]. |
| 230 | 247 | /// \returns A 512-bit floating-point vector of [16 x half]. The lower 128 bits |
| 231 | 248 | /// contain the value of the parameter. The upper 384 bits are set to zero. |
| 232 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 249 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 233 | 250 | _mm256_zextph128_ph256(__m128h __a) { |
| 234 | 251 | return __builtin_shufflevector(__a, (__v8hf)_mm_setzero_ph(), 0, 1, 2, 3, 4, |
| 235 | 252 | 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); |
| ... | ... | @@ -248,7 +265,7 @@ _mm256_zextph128_ph256(__m128h __a) { |
| 248 | 265 | /// A 128-bit vector of [8 x half]. |
| 249 | 266 | /// \returns A 512-bit floating-point vector of [32 x half]. The lower 128 bits |
| 250 | 267 | /// contain the value of the parameter. The upper 384 bits are set to zero. |
| 251 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 268 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 252 | 269 | _mm512_zextph128_ph512(__m128h __a) { |
| 253 | 270 | return __builtin_shufflevector( |
| 254 | 271 | __a, (__v8hf)_mm_setzero_ph(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, |
| ... | ... | @@ -268,7 +285,7 @@ _mm512_zextph128_ph512(__m128h __a) { |
| 268 | 285 | /// A 256-bit vector of [16 x half]. |
| 269 | 286 | /// \returns A 512-bit floating-point vector of [32 x half]. The lower 256 bits |
| 270 | 287 | /// contain the value of the parameter. The upper 256 bits are set to zero. |
| 271 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 288 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 272 | 289 | _mm512_zextph256_ph512(__m256h __a) { |
| 273 | 290 | return __builtin_shufflevector(__a, (__v16hf)_mm256_setzero_ph(), 0, 1, 2, 3, |
| 274 | 291 | 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, |
| ... | ... | @@ -482,19 +499,19 @@ _mm512_maskz_div_ph(__mmask32 __U, __m512h __A, __m512h __B) { |
| 482 | 499 | (__mmask32)(U), (__v32hf)_mm512_div_round_ph((A), (B), (R)), \ |
| 483 | 500 | (__v32hf)_mm512_setzero_ph())) |
| 484 | 501 | |
| 485 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_min_ph(__m512h __A, | |
| 486 | __m512h __B) { | |
| 502 | static __inline__ __m512h | |
| 503 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_min_ph(__m512h __A, __m512h __B) { | |
| 487 | 504 | return (__m512h)__builtin_ia32_minph512((__v32hf)__A, (__v32hf)__B, |
| 488 | 505 | _MM_FROUND_CUR_DIRECTION); |
| 489 | 506 | } |
| 490 | 507 | |
| 491 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 508 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 492 | 509 | _mm512_mask_min_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) { |
| 493 | 510 | return (__m512h)__builtin_ia32_selectph_512( |
| 494 | 511 | (__mmask32)__U, (__v32hf)_mm512_min_ph(__A, __B), (__v32hf)__W); |
| 495 | 512 | } |
| 496 | 513 | |
| 497 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 514 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 498 | 515 | _mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) { |
| 499 | 516 | return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U, |
| 500 | 517 | (__v32hf)_mm512_min_ph(__A, __B), |
| ... | ... | @@ -515,19 +532,19 @@ _mm512_maskz_min_ph(__mmask32 __U, __m512h __A, __m512h __B) { |
| 515 | 532 | (__mmask32)(U), (__v32hf)_mm512_min_round_ph((A), (B), (R)), \ |
| 516 | 533 | (__v32hf)_mm512_setzero_ph())) |
| 517 | 534 | |
| 518 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_max_ph(__m512h __A, | |
| 519 | __m512h __B) { | |
| 535 | static __inline__ __m512h | |
| 536 | __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_max_ph(__m512h __A, __m512h __B) { | |
| 520 | 537 | return (__m512h)__builtin_ia32_maxph512((__v32hf)__A, (__v32hf)__B, |
| 521 | 538 | _MM_FROUND_CUR_DIRECTION); |
| 522 | 539 | } |
| 523 | 540 | |
| 524 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 541 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 525 | 542 | _mm512_mask_max_ph(__m512h __W, __mmask32 __U, __m512h __A, __m512h __B) { |
| 526 | 543 | return (__m512h)__builtin_ia32_selectph_512( |
| 527 | 544 | (__mmask32)__U, (__v32hf)_mm512_max_ph(__A, __B), (__v32hf)__W); |
| 528 | 545 | } |
| 529 | 546 | |
| 530 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 547 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 531 | 548 | _mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) { |
| 532 | 549 | return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U, |
| 533 | 550 | (__v32hf)_mm512_max_ph(__A, __B), |
| ... | ... | @@ -548,7 +565,8 @@ _mm512_maskz_max_ph(__mmask32 __U, __m512h __A, __m512h __B) { |
| 548 | 565 | (__mmask32)(U), (__v32hf)_mm512_max_round_ph((A), (B), (R)), \ |
| 549 | 566 | (__v32hf)_mm512_setzero_ph())) |
| 550 | 567 | |
| 551 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_abs_ph(__m512h __A) { | |
| 568 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 569 | _mm512_abs_ph(__m512h __A) { | |
| 552 | 570 | return (__m512h)_mm512_and_epi32(_mm512_set1_epi32(0x7FFF7FFF), (__m512i)__A); |
| 553 | 571 | } |
| 554 | 572 | |
| ... | ... | @@ -570,23 +588,20 @@ _mm512_maskz_conj_pch(__mmask16 __U, __m512h __A) { |
| 570 | 588 | (__v16sf)_mm512_setzero_ps()); |
| 571 | 589 | } |
| 572 | 590 | |
| 573 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_add_sh(__m128h __A, | |
| 574 | __m128h __B) { | |
| 591 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 592 | _mm_add_sh(__m128h __A, __m128h __B) { | |
| 575 | 593 | __A[0] += __B[0]; |
| 576 | 594 | return __A; |
| 577 | 595 | } |
| 578 | 596 | |
| 579 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_add_sh(__m128h __W, | |
| 580 | __mmask8 __U, | |
| 581 | __m128h __A, | |
| 582 | __m128h __B) { | |
| 597 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 598 | _mm_mask_add_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { | |
| 583 | 599 | __A = _mm_add_sh(__A, __B); |
| 584 | 600 | return __builtin_ia32_selectsh_128(__U, __A, __W); |
| 585 | 601 | } |
| 586 | 602 | |
| 587 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_add_sh(__mmask8 __U, | |
| 588 | __m128h __A, | |
| 589 | __m128h __B) { | |
| 603 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 604 | _mm_maskz_add_sh(__mmask8 __U, __m128h __A, __m128h __B) { | |
| 590 | 605 | __A = _mm_add_sh(__A, __B); |
| 591 | 606 | return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph()); |
| 592 | 607 | } |
| ... | ... | @@ -606,23 +621,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_add_sh(__mmask8 __U, |
| 606 | 621 | (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \ |
| 607 | 622 | (__mmask8)(U), (int)(R))) |
| 608 | 623 | |
| 609 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_sub_sh(__m128h __A, | |
| 610 | __m128h __B) { | |
| 624 | static __inline__ __m128h | |
| 625 | __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_sub_sh(__m128h __A, __m128h __B) { | |
| 611 | 626 | __A[0] -= __B[0]; |
| 612 | 627 | return __A; |
| 613 | 628 | } |
| 614 | 629 | |
| 615 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_sub_sh(__m128h __W, | |
| 616 | __mmask8 __U, | |
| 617 | __m128h __A, | |
| 618 | __m128h __B) { | |
| 630 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 631 | _mm_mask_sub_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { | |
| 619 | 632 | __A = _mm_sub_sh(__A, __B); |
| 620 | 633 | return __builtin_ia32_selectsh_128(__U, __A, __W); |
| 621 | 634 | } |
| 622 | 635 | |
| 623 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sub_sh(__mmask8 __U, | |
| 624 | __m128h __A, | |
| 625 | __m128h __B) { | |
| 636 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 637 | _mm_maskz_sub_sh(__mmask8 __U, __m128h __A, __m128h __B) { | |
| 626 | 638 | __A = _mm_sub_sh(__A, __B); |
| 627 | 639 | return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph()); |
| 628 | 640 | } |
| ... | ... | @@ -642,23 +654,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sub_sh(__mmask8 __U, |
| 642 | 654 | (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \ |
| 643 | 655 | (__mmask8)(U), (int)(R))) |
| 644 | 656 | |
| 645 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mul_sh(__m128h __A, | |
| 646 | __m128h __B) { | |
| 657 | static __inline__ __m128h | |
| 658 | __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mul_sh(__m128h __A, __m128h __B) { | |
| 647 | 659 | __A[0] *= __B[0]; |
| 648 | 660 | return __A; |
| 649 | 661 | } |
| 650 | 662 | |
| 651 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_mul_sh(__m128h __W, | |
| 652 | __mmask8 __U, | |
| 653 | __m128h __A, | |
| 654 | __m128h __B) { | |
| 663 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 664 | _mm_mask_mul_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { | |
| 655 | 665 | __A = _mm_mul_sh(__A, __B); |
| 656 | 666 | return __builtin_ia32_selectsh_128(__U, __A, __W); |
| 657 | 667 | } |
| 658 | 668 | |
| 659 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_mul_sh(__mmask8 __U, | |
| 660 | __m128h __A, | |
| 661 | __m128h __B) { | |
| 669 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 670 | _mm_maskz_mul_sh(__mmask8 __U, __m128h __A, __m128h __B) { | |
| 662 | 671 | __A = _mm_mul_sh(__A, __B); |
| 663 | 672 | return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph()); |
| 664 | 673 | } |
| ... | ... | @@ -678,23 +687,20 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_mul_sh(__mmask8 __U, |
| 678 | 687 | (__v8hf)(__m128h)(A), (__v8hf)(__m128h)(B), (__v8hf)_mm_setzero_ph(), \ |
| 679 | 688 | (__mmask8)(U), (int)(R))) |
| 680 | 689 | |
| 681 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_div_sh(__m128h __A, | |
| 682 | __m128h __B) { | |
| 690 | static __inline__ __m128h | |
| 691 | __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_div_sh(__m128h __A, __m128h __B) { | |
| 683 | 692 | __A[0] /= __B[0]; |
| 684 | 693 | return __A; |
| 685 | 694 | } |
| 686 | 695 | |
| 687 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_div_sh(__m128h __W, | |
| 688 | __mmask8 __U, | |
| 689 | __m128h __A, | |
| 690 | __m128h __B) { | |
| 696 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 697 | _mm_mask_div_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { | |
| 691 | 698 | __A = _mm_div_sh(__A, __B); |
| 692 | 699 | return __builtin_ia32_selectsh_128(__U, __A, __W); |
| 693 | 700 | } |
| 694 | 701 | |
| 695 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_div_sh(__mmask8 __U, | |
| 696 | __m128h __A, | |
| 697 | __m128h __B) { | |
| 702 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 703 | _mm_maskz_div_sh(__mmask8 __U, __m128h __A, __m128h __B) { | |
| 698 | 704 | __A = _mm_div_sh(__A, __B); |
| 699 | 705 | return __builtin_ia32_selectsh_128(__U, __A, _mm_setzero_ph()); |
| 700 | 706 | } |
| ... | ... | @@ -942,22 +948,19 @@ static __inline__ void __DEFAULT_FN_ATTRS128 _mm_storeu_ph(void *__P, |
| 942 | 948 | } |
| 943 | 949 | |
| 944 | 950 | // moves with vmovsh: |
| 945 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_move_sh(__m128h __a, | |
| 946 | __m128h __b) { | |
| 951 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 952 | _mm_move_sh(__m128h __a, __m128h __b) { | |
| 947 | 953 | __a[0] = __b[0]; |
| 948 | 954 | return __a; |
| 949 | 955 | } |
| 950 | 956 | |
| 951 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_move_sh(__m128h __W, | |
| 952 | __mmask8 __U, | |
| 953 | __m128h __A, | |
| 954 | __m128h __B) { | |
| 957 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 958 | _mm_mask_move_sh(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { | |
| 955 | 959 | return __builtin_ia32_selectsh_128(__U, _mm_move_sh(__A, __B), __W); |
| 956 | 960 | } |
| 957 | 961 | |
| 958 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_move_sh(__mmask8 __U, | |
| 959 | __m128h __A, | |
| 960 | __m128h __B) { | |
| 962 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 963 | _mm_maskz_move_sh(__mmask8 __U, __m128h __A, __m128h __B) { | |
| 961 | 964 | return __builtin_ia32_selectsh_128(__U, _mm_move_sh(__A, __B), |
| 962 | 965 | _mm_setzero_ph()); |
| 963 | 966 | } |
| ... | ... | @@ -1383,24 +1386,20 @@ _mm_maskz_scalef_sh(__mmask8 __U, __m128h __A, __m128h __B) { |
| 1383 | 1386 | (__v32hf)_mm512_setzero_ph())) |
| 1384 | 1387 | |
| 1385 | 1388 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_sqrt_ph(__m512h __A) { |
| 1386 | return (__m512h)__builtin_ia32_sqrtph512((__v32hf)__A, | |
| 1387 | _MM_FROUND_CUR_DIRECTION); | |
| 1389 | return (__m512h)__builtin_elementwise_sqrt((__v32hf)__A); | |
| 1388 | 1390 | } |
| 1389 | 1391 | |
| 1390 | 1392 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 |
| 1391 | 1393 | _mm512_mask_sqrt_ph(__m512h __W, __mmask32 __U, __m512h __A) { |
| 1392 | 1394 | return (__m512h)__builtin_ia32_selectph_512( |
| 1393 | (__mmask32)(__U), | |
| 1394 | (__v32hf)__builtin_ia32_sqrtph512((__A), (_MM_FROUND_CUR_DIRECTION)), | |
| 1395 | (__v32hf)(__m512h)(__W)); | |
| 1395 | (__mmask32)(__U), (__v32hf)_mm512_sqrt_ph(__A), (__v32hf)(__m512h)(__W)); | |
| 1396 | 1396 | } |
| 1397 | 1397 | |
| 1398 | 1398 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 |
| 1399 | 1399 | _mm512_maskz_sqrt_ph(__mmask32 __U, __m512h __A) { |
| 1400 | return (__m512h)__builtin_ia32_selectph_512( | |
| 1401 | (__mmask32)(__U), | |
| 1402 | (__v32hf)__builtin_ia32_sqrtph512((__A), (_MM_FROUND_CUR_DIRECTION)), | |
| 1403 | (__v32hf)_mm512_setzero_ph()); | |
| 1400 | return (__m512h)__builtin_ia32_selectph_512((__mmask32)(__U), | |
| 1401 | (__v32hf)_mm512_sqrt_ph(__A), | |
| 1402 | (__v32hf)_mm512_setzero_ph()); | |
| 1404 | 1403 | } |
| 1405 | 1404 | |
| 1406 | 1405 | #define _mm_sqrt_round_sh(A, B, R) \ |
| ... | ... | @@ -3292,19 +3291,19 @@ _mm512_reduce_min_ph(__m512h __V) { |
| 3292 | 3291 | return __builtin_ia32_reduce_fmin_ph512(__V); |
| 3293 | 3292 | } |
| 3294 | 3293 | |
| 3295 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 3294 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3296 | 3295 | _mm512_mask_blend_ph(__mmask32 __U, __m512h __A, __m512h __W) { |
| 3297 | 3296 | return (__m512h)__builtin_ia32_selectph_512((__mmask32)__U, (__v32hf)__W, |
| 3298 | 3297 | (__v32hf)__A); |
| 3299 | 3298 | } |
| 3300 | 3299 | |
| 3301 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 3300 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3302 | 3301 | _mm512_permutex2var_ph(__m512h __A, __m512i __I, __m512h __B) { |
| 3303 | 3302 | return (__m512h)__builtin_ia32_vpermi2varhi512((__v32hi)__A, (__v32hi)__I, |
| 3304 | 3303 | (__v32hi)__B); |
| 3305 | 3304 | } |
| 3306 | 3305 | |
| 3307 | static __inline__ __m512h __DEFAULT_FN_ATTRS512 | |
| 3306 | static __inline__ __m512h __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3308 | 3307 | _mm512_permutexvar_ph(__m512i __A, __m512h __B) { |
| 3309 | 3308 | return (__m512h)__builtin_ia32_permvarhi512((__v32hi)__B, (__v32hi)__A); |
| 3310 | 3309 | } |
| ... | ... | @@ -3348,6 +3347,9 @@ _mm512_permutexvar_ph(__m512i __A, __m512h __B) { |
| 3348 | 3347 | #undef __DEFAULT_FN_ATTRS128 |
| 3349 | 3348 | #undef __DEFAULT_FN_ATTRS256 |
| 3350 | 3349 | #undef __DEFAULT_FN_ATTRS512 |
| 3350 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3351 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3352 | #undef __DEFAULT_FN_ATTRS512_CONSTEXPR | |
| 3351 | 3353 | |
| 3352 | 3354 | #endif |
| 3353 | 3355 | #endif |
lib/include/avx512ifmaintrin.h+32-34| ... | ... | @@ -15,54 +15,52 @@ |
| 15 | 15 | #define __IFMAINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 18 | 19 | #define __DEFAULT_FN_ATTRS \ |
| 19 | __attribute__((__always_inline__, __nodebug__, \ | |
| 20 | __target__("avx512ifma,evex512"), __min_vector_width__(512))) | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avx512ifma"), \ | |
| 21 | __min_vector_width__(512))) constexpr | |
| 22 | #else | |
| 23 | #define __DEFAULT_FN_ATTRS \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx512ifma"), \ | |
| 25 | __min_vector_width__(512))) | |
| 26 | #endif | |
| 21 | 27 | |
| 22 | 28 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 23 | _mm512_madd52hi_epu64 (__m512i __X, __m512i __Y, __m512i __Z) | |
| 24 | { | |
| 25 | return (__m512i)__builtin_ia32_vpmadd52huq512((__v8di) __X, (__v8di) __Y, | |
| 26 | (__v8di) __Z); | |
| 29 | _mm512_madd52hi_epu64(__m512i __X, __m512i __Y, __m512i __Z) { | |
| 30 | return (__m512i)__builtin_ia32_vpmadd52huq512((__v8di)__X, (__v8di)__Y, | |
| 31 | (__v8di)__Z); | |
| 27 | 32 | } |
| 28 | 33 | |
| 29 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 30 | _mm512_mask_madd52hi_epu64 (__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) | |
| 31 | { | |
| 32 | return (__m512i)__builtin_ia32_selectq_512(__M, | |
| 33 | (__v8di)_mm512_madd52hi_epu64(__W, __X, __Y), | |
| 34 | (__v8di)__W); | |
| 34 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_madd52hi_epu64( | |
| 35 | __m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) { | |
| 36 | return (__m512i)__builtin_ia32_selectq_512( | |
| 37 | __M, (__v8di)_mm512_madd52hi_epu64(__W, __X, __Y), (__v8di)__W); | |
| 35 | 38 | } |
| 36 | 39 | |
| 37 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 38 | _mm512_maskz_madd52hi_epu64 (__mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z) | |
| 39 | { | |
| 40 | return (__m512i)__builtin_ia32_selectq_512(__M, | |
| 41 | (__v8di)_mm512_madd52hi_epu64(__X, __Y, __Z), | |
| 42 | (__v8di)_mm512_setzero_si512()); | |
| 40 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_madd52hi_epu64( | |
| 41 | __mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z) { | |
| 42 | return (__m512i)__builtin_ia32_selectq_512( | |
| 43 | __M, (__v8di)_mm512_madd52hi_epu64(__X, __Y, __Z), | |
| 44 | (__v8di)_mm512_setzero_si512()); | |
| 43 | 45 | } |
| 44 | 46 | |
| 45 | 47 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 46 | _mm512_madd52lo_epu64 (__m512i __X, __m512i __Y, __m512i __Z) | |
| 47 | { | |
| 48 | return (__m512i)__builtin_ia32_vpmadd52luq512((__v8di) __X, (__v8di) __Y, | |
| 49 | (__v8di) __Z); | |
| 48 | _mm512_madd52lo_epu64(__m512i __X, __m512i __Y, __m512i __Z) { | |
| 49 | return (__m512i)__builtin_ia32_vpmadd52luq512((__v8di)__X, (__v8di)__Y, | |
| 50 | (__v8di)__Z); | |
| 50 | 51 | } |
| 51 | 52 | |
| 52 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 53 | _mm512_mask_madd52lo_epu64 (__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) | |
| 54 | { | |
| 55 | return (__m512i)__builtin_ia32_selectq_512(__M, | |
| 56 | (__v8di)_mm512_madd52lo_epu64(__W, __X, __Y), | |
| 57 | (__v8di)__W); | |
| 53 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_madd52lo_epu64( | |
| 54 | __m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) { | |
| 55 | return (__m512i)__builtin_ia32_selectq_512( | |
| 56 | __M, (__v8di)_mm512_madd52lo_epu64(__W, __X, __Y), (__v8di)__W); | |
| 58 | 57 | } |
| 59 | 58 | |
| 60 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 61 | _mm512_maskz_madd52lo_epu64 (__mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z) | |
| 62 | { | |
| 63 | return (__m512i)__builtin_ia32_selectq_512(__M, | |
| 64 | (__v8di)_mm512_madd52lo_epu64(__X, __Y, __Z), | |
| 65 | (__v8di)_mm512_setzero_si512()); | |
| 59 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_madd52lo_epu64( | |
| 60 | __mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z) { | |
| 61 | return (__m512i)__builtin_ia32_selectq_512( | |
| 62 | __M, (__v8di)_mm512_madd52lo_epu64(__X, __Y, __Z), | |
| 63 | (__v8di)_mm512_setzero_si512()); | |
| 66 | 64 | } |
| 67 | 65 | |
| 68 | 66 | #undef __DEFAULT_FN_ATTRS |
lib/include/avx512ifmavlintrin.h+73-46| ... | ... | @@ -8,22 +8,35 @@ |
| 8 | 8 | *===-----------------------------------------------------------------------=== |
| 9 | 9 | */ |
| 10 | 10 | #ifndef __IMMINTRIN_H |
| 11 | #error "Never use <avx512ifmavlintrin.h> directly; include <immintrin.h> instead." | |
| 11 | #error \ | |
| 12 | "Never use <avx512ifmavlintrin.h> directly; include <immintrin.h> instead." | |
| 12 | 13 | #endif |
| 13 | 14 | |
| 14 | 15 | #ifndef __IFMAVLINTRIN_H |
| 15 | 16 | #define __IFMAVLINTRIN_H |
| 16 | 17 | |
| 17 | 18 | /* Define the default attributes for the functions in this file. */ |
| 19 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 18 | 20 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 21 | __attribute__((__always_inline__, __nodebug__, \ |
| 20 | __target__("avx512ifma,avx512vl,no-evex512"), \ | |
| 22 | __target__("avx512ifma,avx512vl"), \ | |
| 23 | __min_vector_width__(128))) constexpr | |
| 24 | #define __DEFAULT_FN_ATTRS256 \ | |
| 25 | __attribute__((__always_inline__, __nodebug__, \ | |
| 26 | __target__("avx512ifma,avx512vl"), \ | |
| 27 | __min_vector_width__(256))) constexpr | |
| 28 | #else | |
| 29 | #define __DEFAULT_FN_ATTRS128 \ | |
| 30 | __attribute__((__always_inline__, __nodebug__, \ | |
| 31 | __target__("avx512ifma,avx512vl"), \ | |
| 21 | 32 | __min_vector_width__(128))) |
| 22 | 33 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | 34 | __attribute__((__always_inline__, __nodebug__, \ |
| 24 | __target__("avx512ifma,avx512vl,no-evex512"), \ | |
| 35 | __target__("avx512ifma,avx512vl"), \ | |
| 25 | 36 | __min_vector_width__(256))) |
| 37 | #endif | |
| 26 | 38 | |
| 39 | #if !(defined(__AVXIFMA__) || defined(__AVX512IFMA__)) | |
| 27 | 40 | #define _mm_madd52hi_epu64(X, Y, Z) \ |
| 28 | 41 | ((__m128i)__builtin_ia32_vpmadd52huq128((__v2di)(X), (__v2di)(Y), \ |
| 29 | 42 | (__v2di)(Z))) |
| ... | ... | @@ -39,71 +52,85 @@ |
| 39 | 52 | #define _mm256_madd52lo_epu64(X, Y, Z) \ |
| 40 | 53 | ((__m256i)__builtin_ia32_vpmadd52luq256((__v4di)(X), (__v4di)(Y), \ |
| 41 | 54 | (__v4di)(Z))) |
| 55 | #endif | |
| 42 | 56 | |
| 57 | #if defined(__AVX512IFMA__) | |
| 43 | 58 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 44 | _mm_mask_madd52hi_epu64 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) | |
| 45 | { | |
| 46 | return (__m128i)__builtin_ia32_selectq_128(__M, | |
| 47 | (__v2di)_mm_madd52hi_epu64(__W, __X, __Y), | |
| 48 | (__v2di)__W); | |
| 59 | _mm_madd52hi_epu64(__m128i __X, __m128i __Y, __m128i __Z) { | |
| 60 | return (__m128i)__builtin_ia32_vpmadd52huq128((__v2di)__X, (__v2di)__Y, | |
| 61 | (__v2di)__Z); | |
| 62 | } | |
| 63 | ||
| 64 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 65 | _mm256_madd52hi_epu64(__m256i __X, __m256i __Y, __m256i __Z) { | |
| 66 | return (__m256i)__builtin_ia32_vpmadd52huq256((__v4di)__X, (__v4di)__Y, | |
| 67 | (__v4di)__Z); | |
| 49 | 68 | } |
| 50 | 69 | |
| 51 | 70 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 52 | _mm_maskz_madd52hi_epu64 (__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z) | |
| 53 | { | |
| 54 | return (__m128i)__builtin_ia32_selectq_128(__M, | |
| 55 | (__v2di)_mm_madd52hi_epu64(__X, __Y, __Z), | |
| 56 | (__v2di)_mm_setzero_si128()); | |
| 71 | _mm_madd52lo_epu64(__m128i __X, __m128i __Y, __m128i __Z) { | |
| 72 | return (__m128i)__builtin_ia32_vpmadd52luq128((__v2di)__X, (__v2di)__Y, | |
| 73 | (__v2di)__Z); | |
| 57 | 74 | } |
| 58 | 75 | |
| 59 | 76 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 60 | _mm256_mask_madd52hi_epu64 (__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) | |
| 61 | { | |
| 62 | return (__m256i)__builtin_ia32_selectq_256(__M, | |
| 63 | (__v4di)_mm256_madd52hi_epu64(__W, __X, __Y), | |
| 64 | (__v4di)__W); | |
| 77 | _mm256_madd52lo_epu64(__m256i __X, __m256i __Y, __m256i __Z) { | |
| 78 | return (__m256i)__builtin_ia32_vpmadd52luq256((__v4di)__X, (__v4di)__Y, | |
| 79 | (__v4di)__Z); | |
| 65 | 80 | } |
| 81 | #endif | |
| 66 | 82 | |
| 67 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 68 | _mm256_maskz_madd52hi_epu64 (__mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z) | |
| 69 | { | |
| 70 | return (__m256i)__builtin_ia32_selectq_256(__M, | |
| 71 | (__v4di)_mm256_madd52hi_epu64(__X, __Y, __Z), | |
| 72 | (__v4di)_mm256_setzero_si256()); | |
| 83 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 84 | _mm_mask_madd52hi_epu64(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) { | |
| 85 | return (__m128i)__builtin_ia32_selectq_128( | |
| 86 | __M, (__v2di)__builtin_ia32_vpmadd52huq128(__W, __X, __Y), (__v2di)__W); | |
| 73 | 87 | } |
| 74 | 88 | |
| 75 | 89 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 76 | _mm_mask_madd52lo_epu64 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) | |
| 77 | { | |
| 78 | return (__m128i)__builtin_ia32_selectq_128(__M, | |
| 79 | (__v2di)_mm_madd52lo_epu64(__W, __X, __Y), | |
| 80 | (__v2di)__W); | |
| 90 | _mm_maskz_madd52hi_epu64(__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z) { | |
| 91 | return (__m128i)__builtin_ia32_selectq_128( | |
| 92 | __M, (__v2di)__builtin_ia32_vpmadd52huq128(__X, __Y, __Z), | |
| 93 | (__v2di)_mm_setzero_si128()); | |
| 94 | } | |
| 95 | ||
| 96 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_madd52hi_epu64( | |
| 97 | __m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) { | |
| 98 | return (__m256i)__builtin_ia32_selectq_256( | |
| 99 | __M, (__v4di)__builtin_ia32_vpmadd52huq256(__W, __X, __Y), (__v4di)__W); | |
| 100 | } | |
| 101 | ||
| 102 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_madd52hi_epu64( | |
| 103 | __mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z) { | |
| 104 | return (__m256i)__builtin_ia32_selectq_256( | |
| 105 | __M, (__v4di)__builtin_ia32_vpmadd52huq256(__X, __Y, __Z), | |
| 106 | (__v4di)_mm256_setzero_si256()); | |
| 81 | 107 | } |
| 82 | 108 | |
| 83 | 109 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 84 | _mm_maskz_madd52lo_epu64 (__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z) | |
| 85 | { | |
| 86 | return (__m128i)__builtin_ia32_selectq_128(__M, | |
| 87 | (__v2di)_mm_madd52lo_epu64(__X, __Y, __Z), | |
| 88 | (__v2di)_mm_setzero_si128()); | |
| 110 | _mm_mask_madd52lo_epu64(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) { | |
| 111 | return (__m128i)__builtin_ia32_selectq_128( | |
| 112 | __M, (__v2di)__builtin_ia32_vpmadd52luq128(__W, __X, __Y), (__v2di)__W); | |
| 89 | 113 | } |
| 90 | 114 | |
| 91 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 92 | _mm256_mask_madd52lo_epu64 (__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) | |
| 93 | { | |
| 94 | return (__m256i)__builtin_ia32_selectq_256(__M, | |
| 95 | (__v4di)_mm256_madd52lo_epu64(__W, __X, __Y), | |
| 96 | (__v4di)__W); | |
| 115 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 116 | _mm_maskz_madd52lo_epu64(__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z) { | |
| 117 | return (__m128i)__builtin_ia32_selectq_128( | |
| 118 | __M, (__v2di)__builtin_ia32_vpmadd52luq128(__X, __Y, __Z), | |
| 119 | (__v2di)_mm_setzero_si128()); | |
| 97 | 120 | } |
| 98 | 121 | |
| 99 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 100 | _mm256_maskz_madd52lo_epu64 (__mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z) | |
| 101 | { | |
| 102 | return (__m256i)__builtin_ia32_selectq_256(__M, | |
| 103 | (__v4di)_mm256_madd52lo_epu64(__X, __Y, __Z), | |
| 104 | (__v4di)_mm256_setzero_si256()); | |
| 122 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_madd52lo_epu64( | |
| 123 | __m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) { | |
| 124 | return (__m256i)__builtin_ia32_selectq_256( | |
| 125 | __M, (__v4di)__builtin_ia32_vpmadd52luq256(__W, __X, __Y), (__v4di)__W); | |
| 105 | 126 | } |
| 106 | 127 | |
| 128 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_madd52lo_epu64( | |
| 129 | __mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z) { | |
| 130 | return (__m256i)__builtin_ia32_selectq_256( | |
| 131 | __M, (__v4di)__builtin_ia32_vpmadd52luq256(__X, __Y, __Z), | |
| 132 | (__v4di)_mm256_setzero_si256()); | |
| 133 | } | |
| 107 | 134 | |
| 108 | 135 | #undef __DEFAULT_FN_ATTRS128 |
| 109 | 136 | #undef __DEFAULT_FN_ATTRS256 |
lib/include/avx512vbmi2intrin.h+43-32| ... | ... | @@ -15,8 +15,15 @@ |
| 15 | 15 | #define __AVX512VBMI2INTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vbmi2,evex512"), __min_vector_width__(512))) | |
| 19 | ||
| 18 | #define __DEFAULT_FN_ATTRS \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx512vbmi2"), \ | |
| 20 | __min_vector_width__(512))) | |
| 21 | ||
| 22 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 23 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 24 | #else | |
| 25 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 26 | #endif | |
| 20 | 27 | |
| 21 | 28 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 22 | 29 | _mm512_mask_compress_epi16(__m512i __S, __mmask32 __U, __m512i __D) |
| ... | ... | @@ -212,14 +219,14 @@ _mm512_maskz_expandloadu_epi8(__mmask64 __U, void const *__P) |
| 212 | 219 | (__v32hi)_mm512_shrdi_epi16((A), (B), (I)), \ |
| 213 | 220 | (__v32hi)_mm512_setzero_si512())) |
| 214 | 221 | |
| 215 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 222 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 216 | 223 | _mm512_shldv_epi64(__m512i __A, __m512i __B, __m512i __C) |
| 217 | 224 | { |
| 218 | return (__m512i)__builtin_ia32_vpshldvq512((__v8di)__A, (__v8di)__B, | |
| 219 | (__v8di)__C); | |
| 225 | return (__m512i)__builtin_elementwise_fshl((__v8du)__A, (__v8du)__B, | |
| 226 | (__v8du)__C); | |
| 220 | 227 | } |
| 221 | 228 | |
| 222 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 229 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 223 | 230 | _mm512_mask_shldv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C) |
| 224 | 231 | { |
| 225 | 232 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| ... | ... | @@ -227,7 +234,7 @@ _mm512_mask_shldv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C) |
| 227 | 234 | (__v8di)__A); |
| 228 | 235 | } |
| 229 | 236 | |
| 230 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 237 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 231 | 238 | _mm512_maskz_shldv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C) |
| 232 | 239 | { |
| 233 | 240 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| ... | ... | @@ -235,14 +242,14 @@ _mm512_maskz_shldv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C) |
| 235 | 242 | (__v8di)_mm512_setzero_si512()); |
| 236 | 243 | } |
| 237 | 244 | |
| 238 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 245 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 239 | 246 | _mm512_shldv_epi32(__m512i __A, __m512i __B, __m512i __C) |
| 240 | 247 | { |
| 241 | return (__m512i)__builtin_ia32_vpshldvd512((__v16si)__A, (__v16si)__B, | |
| 242 | (__v16si)__C); | |
| 248 | return (__m512i)__builtin_elementwise_fshl((__v16su)__A, (__v16su)__B, | |
| 249 | (__v16su)__C); | |
| 243 | 250 | } |
| 244 | 251 | |
| 245 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 252 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 246 | 253 | _mm512_mask_shldv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) |
| 247 | 254 | { |
| 248 | 255 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| ... | ... | @@ -250,7 +257,7 @@ _mm512_mask_shldv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) |
| 250 | 257 | (__v16si)__A); |
| 251 | 258 | } |
| 252 | 259 | |
| 253 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 260 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 254 | 261 | _mm512_maskz_shldv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C) |
| 255 | 262 | { |
| 256 | 263 | return (__m512i)__builtin_ia32_selectd_512(__U, |
| ... | ... | @@ -258,14 +265,14 @@ _mm512_maskz_shldv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C) |
| 258 | 265 | (__v16si)_mm512_setzero_si512()); |
| 259 | 266 | } |
| 260 | 267 | |
| 261 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 268 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 262 | 269 | _mm512_shldv_epi16(__m512i __A, __m512i __B, __m512i __C) |
| 263 | 270 | { |
| 264 | return (__m512i)__builtin_ia32_vpshldvw512((__v32hi)__A, (__v32hi)__B, | |
| 265 | (__v32hi)__C); | |
| 271 | return (__m512i)__builtin_elementwise_fshl((__v32hu)__A, (__v32hu)__B, | |
| 272 | (__v32hu)__C); | |
| 266 | 273 | } |
| 267 | 274 | |
| 268 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 275 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 269 | 276 | _mm512_mask_shldv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C) |
| 270 | 277 | { |
| 271 | 278 | return (__m512i)__builtin_ia32_selectw_512(__U, |
| ... | ... | @@ -273,7 +280,7 @@ _mm512_mask_shldv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C) |
| 273 | 280 | (__v32hi)__A); |
| 274 | 281 | } |
| 275 | 282 | |
| 276 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 283 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 277 | 284 | _mm512_maskz_shldv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C) |
| 278 | 285 | { |
| 279 | 286 | return (__m512i)__builtin_ia32_selectw_512(__U, |
| ... | ... | @@ -281,14 +288,15 @@ _mm512_maskz_shldv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C) |
| 281 | 288 | (__v32hi)_mm512_setzero_si512()); |
| 282 | 289 | } |
| 283 | 290 | |
| 284 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 291 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 285 | 292 | _mm512_shrdv_epi64(__m512i __A, __m512i __B, __m512i __C) |
| 286 | 293 | { |
| 287 | return (__m512i)__builtin_ia32_vpshrdvq512((__v8di)__A, (__v8di)__B, | |
| 288 | (__v8di)__C); | |
| 294 | // Ops __A and __B are swapped. | |
| 295 | return (__m512i)__builtin_elementwise_fshr((__v8du)__B, (__v8du)__A, | |
| 296 | (__v8du)__C); | |
| 289 | 297 | } |
| 290 | 298 | |
| 291 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 299 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 292 | 300 | _mm512_mask_shrdv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C) |
| 293 | 301 | { |
| 294 | 302 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| ... | ... | @@ -296,7 +304,7 @@ _mm512_mask_shrdv_epi64(__m512i __A, __mmask8 __U, __m512i __B, __m512i __C) |
| 296 | 304 | (__v8di)__A); |
| 297 | 305 | } |
| 298 | 306 | |
| 299 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 307 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 300 | 308 | _mm512_maskz_shrdv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C) |
| 301 | 309 | { |
| 302 | 310 | return (__m512i)__builtin_ia32_selectq_512(__U, |
| ... | ... | @@ -304,14 +312,15 @@ _mm512_maskz_shrdv_epi64(__mmask8 __U, __m512i __A, __m512i __B, __m512i __C) |
| 304 | 312 | (__v8di)_mm512_setzero_si512()); |
| 305 | 313 | } |
| 306 | 314 | |
| 307 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 315 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 308 | 316 | _mm512_shrdv_epi32(__m512i __A, __m512i __B, __m512i __C) |
| 309 | 317 | { |
| 310 | return (__m512i)__builtin_ia32_vpshrdvd512((__v16si)__A, (__v16si)__B, | |
| 311 | (__v16si)__C); | |
| 318 | // Ops __A and __B are swapped. | |
| 319 | return (__m512i)__builtin_elementwise_fshr((__v16su)__B, (__v16su)__A, | |
| 320 | (__v16su)__C); | |
| 312 | 321 | } |
| 313 | 322 | |
| 314 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 323 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 315 | 324 | _mm512_mask_shrdv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) |
| 316 | 325 | { |
| 317 | 326 | return (__m512i) __builtin_ia32_selectd_512(__U, |
| ... | ... | @@ -319,7 +328,7 @@ _mm512_mask_shrdv_epi32(__m512i __A, __mmask16 __U, __m512i __B, __m512i __C) |
| 319 | 328 | (__v16si)__A); |
| 320 | 329 | } |
| 321 | 330 | |
| 322 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 331 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 323 | 332 | _mm512_maskz_shrdv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C) |
| 324 | 333 | { |
| 325 | 334 | return (__m512i) __builtin_ia32_selectd_512(__U, |
| ... | ... | @@ -327,14 +336,15 @@ _mm512_maskz_shrdv_epi32(__mmask16 __U, __m512i __A, __m512i __B, __m512i __C) |
| 327 | 336 | (__v16si)_mm512_setzero_si512()); |
| 328 | 337 | } |
| 329 | 338 | |
| 330 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 339 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 331 | 340 | _mm512_shrdv_epi16(__m512i __A, __m512i __B, __m512i __C) |
| 332 | 341 | { |
| 333 | return (__m512i)__builtin_ia32_vpshrdvw512((__v32hi)__A, (__v32hi)__B, | |
| 334 | (__v32hi)__C); | |
| 342 | // Ops __A and __B are swapped. | |
| 343 | return (__m512i)__builtin_elementwise_fshr((__v32hu)__B, (__v32hu)__A, | |
| 344 | (__v32hu)__C); | |
| 335 | 345 | } |
| 336 | 346 | |
| 337 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 347 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 338 | 348 | _mm512_mask_shrdv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C) |
| 339 | 349 | { |
| 340 | 350 | return (__m512i)__builtin_ia32_selectw_512(__U, |
| ... | ... | @@ -342,7 +352,7 @@ _mm512_mask_shrdv_epi16(__m512i __A, __mmask32 __U, __m512i __B, __m512i __C) |
| 342 | 352 | (__v32hi)__A); |
| 343 | 353 | } |
| 344 | 354 | |
| 345 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 355 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 346 | 356 | _mm512_maskz_shrdv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C) |
| 347 | 357 | { |
| 348 | 358 | return (__m512i)__builtin_ia32_selectw_512(__U, |
| ... | ... | @@ -352,6 +362,7 @@ _mm512_maskz_shrdv_epi16(__mmask32 __U, __m512i __A, __m512i __B, __m512i __C) |
| 352 | 362 | |
| 353 | 363 | |
| 354 | 364 | #undef __DEFAULT_FN_ATTRS |
| 365 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 355 | 366 | |
| 356 | 367 | #endif |
| 357 | 368 |
lib/include/avx512vbmiintrin.h+19-27| ... | ... | @@ -15,63 +15,57 @@ |
| 15 | 15 | #define __VBMIINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 18 | 19 | #define __DEFAULT_FN_ATTRS \ |
| 19 | __attribute__((__always_inline__, __nodebug__, \ | |
| 20 | __target__("avx512vbmi,evex512"), __min_vector_width__(512))) | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avx512vbmi"), \ | |
| 21 | __min_vector_width__(512))) constexpr | |
| 22 | #else | |
| 23 | #define __DEFAULT_FN_ATTRS \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, __target__("avx512vbmi"), \ | |
| 25 | __min_vector_width__(512))) | |
| 26 | #endif | |
| 21 | 27 | |
| 22 | 28 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 23 | _mm512_permutex2var_epi8(__m512i __A, __m512i __I, __m512i __B) | |
| 24 | { | |
| 29 | _mm512_permutex2var_epi8(__m512i __A, __m512i __I, __m512i __B) { | |
| 25 | 30 | return (__m512i)__builtin_ia32_vpermi2varqi512((__v64qi)__A, (__v64qi)__I, |
| 26 | 31 | (__v64qi) __B); |
| 27 | 32 | } |
| 28 | 33 | |
| 29 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 30 | _mm512_mask_permutex2var_epi8(__m512i __A, __mmask64 __U, __m512i __I, | |
| 31 | __m512i __B) | |
| 32 | { | |
| 34 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_permutex2var_epi8( | |
| 35 | __m512i __A, __mmask64 __U, __m512i __I, __m512i __B) { | |
| 33 | 36 | return (__m512i)__builtin_ia32_selectb_512(__U, |
| 34 | 37 | (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B), |
| 35 | 38 | (__v64qi)__A); |
| 36 | 39 | } |
| 37 | 40 | |
| 38 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 39 | _mm512_mask2_permutex2var_epi8(__m512i __A, __m512i __I, __mmask64 __U, | |
| 40 | __m512i __B) | |
| 41 | { | |
| 41 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask2_permutex2var_epi8( | |
| 42 | __m512i __A, __m512i __I, __mmask64 __U, __m512i __B) { | |
| 42 | 43 | return (__m512i)__builtin_ia32_selectb_512(__U, |
| 43 | 44 | (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B), |
| 44 | 45 | (__v64qi)__I); |
| 45 | 46 | } |
| 46 | 47 | |
| 47 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 48 | _mm512_maskz_permutex2var_epi8(__mmask64 __U, __m512i __A, __m512i __I, | |
| 49 | __m512i __B) | |
| 50 | { | |
| 48 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_maskz_permutex2var_epi8( | |
| 49 | __mmask64 __U, __m512i __A, __m512i __I, __m512i __B) { | |
| 51 | 50 | return (__m512i)__builtin_ia32_selectb_512(__U, |
| 52 | 51 | (__v64qi)_mm512_permutex2var_epi8(__A, __I, __B), |
| 53 | 52 | (__v64qi)_mm512_setzero_si512()); |
| 54 | 53 | } |
| 55 | 54 | |
| 56 | 55 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 57 | _mm512_permutexvar_epi8 (__m512i __A, __m512i __B) | |
| 58 | { | |
| 56 | _mm512_permutexvar_epi8(__m512i __A, __m512i __B) { | |
| 59 | 57 | return (__m512i)__builtin_ia32_permvarqi512((__v64qi) __B, (__v64qi) __A); |
| 60 | 58 | } |
| 61 | 59 | |
| 62 | 60 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 63 | _mm512_maskz_permutexvar_epi8 (__mmask64 __M, __m512i __A, | |
| 64 | __m512i __B) | |
| 65 | { | |
| 61 | _mm512_maskz_permutexvar_epi8(__mmask64 __M, __m512i __A, __m512i __B) { | |
| 66 | 62 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 67 | 63 | (__v64qi)_mm512_permutexvar_epi8(__A, __B), |
| 68 | 64 | (__v64qi)_mm512_setzero_si512()); |
| 69 | 65 | } |
| 70 | 66 | |
| 71 | static __inline__ __m512i __DEFAULT_FN_ATTRS | |
| 72 | _mm512_mask_permutexvar_epi8 (__m512i __W, __mmask64 __M, __m512i __A, | |
| 73 | __m512i __B) | |
| 74 | { | |
| 67 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_mask_permutexvar_epi8( | |
| 68 | __m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { | |
| 75 | 69 | return (__m512i)__builtin_ia32_selectb_512((__mmask64)__M, |
| 76 | 70 | (__v64qi)_mm512_permutexvar_epi8(__A, __B), |
| 77 | 71 | (__v64qi)__W); |
| ... | ... | @@ -100,7 +94,5 @@ _mm512_maskz_multishift_epi64_epi8(__mmask64 __M, __m512i __X, __m512i __Y) |
| 100 | 94 | (__v64qi)_mm512_setzero_si512()); |
| 101 | 95 | } |
| 102 | 96 | |
| 103 | ||
| 104 | 97 | #undef __DEFAULT_FN_ATTRS |
| 105 | ||
| 106 | 98 | #endif |
lib/include/avx512vbmivlintrin.h+35-49| ... | ... | @@ -15,126 +15,114 @@ |
| 15 | 15 | #define __VBMIVLINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 18 | 19 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 20 | __attribute__((__always_inline__, __nodebug__, \ |
| 20 | __target__("avx512vbmi,avx512vl,no-evex512"), \ | |
| 21 | __target__("avx512vbmi,avx512vl"), \ | |
| 22 | __min_vector_width__(128))) constexpr | |
| 23 | #define __DEFAULT_FN_ATTRS256 \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, \ | |
| 25 | __target__("avx512vbmi,avx512vl"), \ | |
| 26 | __min_vector_width__(256))) constexpr | |
| 27 | #else | |
| 28 | #define __DEFAULT_FN_ATTRS128 \ | |
| 29 | __attribute__((__always_inline__, __nodebug__, \ | |
| 30 | __target__("avx512vbmi,avx512vl"), \ | |
| 21 | 31 | __min_vector_width__(128))) |
| 22 | 32 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | 33 | __attribute__((__always_inline__, __nodebug__, \ |
| 24 | __target__("avx512vbmi,avx512vl,no-evex512"), \ | |
| 34 | __target__("avx512vbmi,avx512vl"), \ | |
| 25 | 35 | __min_vector_width__(256))) |
| 36 | #endif | |
| 26 | 37 | |
| 27 | 38 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 28 | _mm_permutex2var_epi8(__m128i __A, __m128i __I, __m128i __B) | |
| 29 | { | |
| 39 | _mm_permutex2var_epi8(__m128i __A, __m128i __I, __m128i __B) { | |
| 30 | 40 | return (__m128i)__builtin_ia32_vpermi2varqi128((__v16qi)__A, |
| 31 | 41 | (__v16qi)__I, |
| 32 | 42 | (__v16qi)__B); |
| 33 | 43 | } |
| 34 | 44 | |
| 35 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 36 | _mm_mask_permutex2var_epi8(__m128i __A, __mmask16 __U, __m128i __I, | |
| 37 | __m128i __B) | |
| 38 | { | |
| 45 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_permutex2var_epi8( | |
| 46 | __m128i __A, __mmask16 __U, __m128i __I, __m128i __B) { | |
| 39 | 47 | return (__m128i)__builtin_ia32_selectb_128(__U, |
| 40 | 48 | (__v16qi)_mm_permutex2var_epi8(__A, __I, __B), |
| 41 | 49 | (__v16qi)__A); |
| 42 | 50 | } |
| 43 | 51 | |
| 44 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 45 | _mm_mask2_permutex2var_epi8(__m128i __A, __m128i __I, __mmask16 __U, | |
| 46 | __m128i __B) | |
| 47 | { | |
| 52 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask2_permutex2var_epi8( | |
| 53 | __m128i __A, __m128i __I, __mmask16 __U, __m128i __B) { | |
| 48 | 54 | return (__m128i)__builtin_ia32_selectb_128(__U, |
| 49 | 55 | (__v16qi)_mm_permutex2var_epi8(__A, __I, __B), |
| 50 | 56 | (__v16qi)__I); |
| 51 | 57 | } |
| 52 | 58 | |
| 53 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 54 | _mm_maskz_permutex2var_epi8(__mmask16 __U, __m128i __A, __m128i __I, | |
| 55 | __m128i __B) | |
| 56 | { | |
| 59 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_maskz_permutex2var_epi8( | |
| 60 | __mmask16 __U, __m128i __A, __m128i __I, __m128i __B) { | |
| 57 | 61 | return (__m128i)__builtin_ia32_selectb_128(__U, |
| 58 | 62 | (__v16qi)_mm_permutex2var_epi8(__A, __I, __B), |
| 59 | 63 | (__v16qi)_mm_setzero_si128()); |
| 60 | 64 | } |
| 61 | 65 | |
| 62 | 66 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 63 | _mm256_permutex2var_epi8(__m256i __A, __m256i __I, __m256i __B) | |
| 64 | { | |
| 67 | _mm256_permutex2var_epi8(__m256i __A, __m256i __I, __m256i __B) { | |
| 65 | 68 | return (__m256i)__builtin_ia32_vpermi2varqi256((__v32qi)__A, (__v32qi)__I, |
| 66 | 69 | (__v32qi)__B); |
| 67 | 70 | } |
| 68 | 71 | |
| 69 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 70 | _mm256_mask_permutex2var_epi8(__m256i __A, __mmask32 __U, __m256i __I, | |
| 71 | __m256i __B) | |
| 72 | { | |
| 72 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_permutex2var_epi8( | |
| 73 | __m256i __A, __mmask32 __U, __m256i __I, __m256i __B) { | |
| 73 | 74 | return (__m256i)__builtin_ia32_selectb_256(__U, |
| 74 | 75 | (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B), |
| 75 | 76 | (__v32qi)__A); |
| 76 | 77 | } |
| 77 | 78 | |
| 78 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 79 | _mm256_mask2_permutex2var_epi8(__m256i __A, __m256i __I, __mmask32 __U, | |
| 80 | __m256i __B) | |
| 81 | { | |
| 79 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask2_permutex2var_epi8( | |
| 80 | __m256i __A, __m256i __I, __mmask32 __U, __m256i __B) { | |
| 82 | 81 | return (__m256i)__builtin_ia32_selectb_256(__U, |
| 83 | 82 | (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B), |
| 84 | 83 | (__v32qi)__I); |
| 85 | 84 | } |
| 86 | 85 | |
| 87 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 88 | _mm256_maskz_permutex2var_epi8(__mmask32 __U, __m256i __A, __m256i __I, | |
| 89 | __m256i __B) | |
| 90 | { | |
| 86 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_maskz_permutex2var_epi8( | |
| 87 | __mmask32 __U, __m256i __A, __m256i __I, __m256i __B) { | |
| 91 | 88 | return (__m256i)__builtin_ia32_selectb_256(__U, |
| 92 | 89 | (__v32qi)_mm256_permutex2var_epi8(__A, __I, __B), |
| 93 | 90 | (__v32qi)_mm256_setzero_si256()); |
| 94 | 91 | } |
| 95 | 92 | |
| 96 | 93 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 97 | _mm_permutexvar_epi8 (__m128i __A, __m128i __B) | |
| 98 | { | |
| 94 | _mm_permutexvar_epi8(__m128i __A, __m128i __B) { | |
| 99 | 95 | return (__m128i)__builtin_ia32_permvarqi128((__v16qi)__B, (__v16qi)__A); |
| 100 | 96 | } |
| 101 | 97 | |
| 102 | 98 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 103 | _mm_maskz_permutexvar_epi8 (__mmask16 __M, __m128i __A, __m128i __B) | |
| 104 | { | |
| 99 | _mm_maskz_permutexvar_epi8(__mmask16 __M, __m128i __A, __m128i __B) { | |
| 105 | 100 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 106 | 101 | (__v16qi)_mm_permutexvar_epi8(__A, __B), |
| 107 | 102 | (__v16qi)_mm_setzero_si128()); |
| 108 | 103 | } |
| 109 | 104 | |
| 110 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 111 | _mm_mask_permutexvar_epi8 (__m128i __W, __mmask16 __M, __m128i __A, | |
| 112 | __m128i __B) | |
| 113 | { | |
| 105 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_permutexvar_epi8( | |
| 106 | __m128i __W, __mmask16 __M, __m128i __A, __m128i __B) { | |
| 114 | 107 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 115 | 108 | (__v16qi)_mm_permutexvar_epi8(__A, __B), |
| 116 | 109 | (__v16qi)__W); |
| 117 | 110 | } |
| 118 | 111 | |
| 119 | 112 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 120 | _mm256_permutexvar_epi8 (__m256i __A, __m256i __B) | |
| 121 | { | |
| 113 | _mm256_permutexvar_epi8(__m256i __A, __m256i __B) { | |
| 122 | 114 | return (__m256i)__builtin_ia32_permvarqi256((__v32qi) __B, (__v32qi) __A); |
| 123 | 115 | } |
| 124 | 116 | |
| 125 | 117 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 126 | _mm256_maskz_permutexvar_epi8 (__mmask32 __M, __m256i __A, | |
| 127 | __m256i __B) | |
| 128 | { | |
| 118 | _mm256_maskz_permutexvar_epi8(__mmask32 __M, __m256i __A, __m256i __B) { | |
| 129 | 119 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 130 | 120 | (__v32qi)_mm256_permutexvar_epi8(__A, __B), |
| 131 | 121 | (__v32qi)_mm256_setzero_si256()); |
| 132 | 122 | } |
| 133 | 123 | |
| 134 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 135 | _mm256_mask_permutexvar_epi8 (__m256i __W, __mmask32 __M, __m256i __A, | |
| 136 | __m256i __B) | |
| 137 | { | |
| 124 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_permutexvar_epi8( | |
| 125 | __m256i __W, __mmask32 __M, __m256i __A, __m256i __B) { | |
| 138 | 126 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 139 | 127 | (__v32qi)_mm256_permutexvar_epi8(__A, __B), |
| 140 | 128 | (__v32qi)__W); |
| ... | ... | @@ -186,8 +174,6 @@ _mm256_maskz_multishift_epi64_epi8(__mmask32 __M, __m256i __X, __m256i __Y) |
| 186 | 174 | (__v32qi)_mm256_setzero_si256()); |
| 187 | 175 | } |
| 188 | 176 | |
| 189 | ||
| 190 | 177 | #undef __DEFAULT_FN_ATTRS128 |
| 191 | 178 | #undef __DEFAULT_FN_ATTRS256 |
| 192 | ||
| 193 | 179 | #endif |
lib/include/avx512vlbf16intrin.h+32-22| ... | ... | @@ -17,13 +17,21 @@ |
| 17 | 17 | |
| 18 | 18 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 19 | __attribute__((__always_inline__, __nodebug__, \ |
| 20 | __target__("avx512vl,avx512bf16,no-evex512"), \ | |
| 20 | __target__("avx512vl,avx512bf16"), \ | |
| 21 | 21 | __min_vector_width__(128))) |
| 22 | 22 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | 23 | __attribute__((__always_inline__, __nodebug__, \ |
| 24 | __target__("avx512vl,avx512bf16,no-evex512"), \ | |
| 24 | __target__("avx512vl,avx512bf16"), \ | |
| 25 | 25 | __min_vector_width__(256))) |
| 26 | 26 | |
| 27 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 28 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 29 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 30 | #else | |
| 31 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 32 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 33 | #endif | |
| 34 | ||
| 27 | 35 | /// Convert Two Packed Single Data to One Packed BF16 Data. |
| 28 | 36 | /// |
| 29 | 37 | /// \headerfile <x86intrin.h> |
| ... | ... | @@ -421,9 +429,10 @@ static __inline__ __bf16 __DEFAULT_FN_ATTRS128 _mm_cvtness_sbh(float __A) { |
| 421 | 429 | /// \param __A |
| 422 | 430 | /// A 128-bit vector of [4 x bfloat]. |
| 423 | 431 | /// \returns A 128-bit vector of [4 x float] come from conversion of __A |
| 424 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_cvtpbh_ps(__m128bh __A) { | |
| 425 | return _mm_castsi128_ps( | |
| 426 | (__m128i)_mm_slli_epi32((__m128i)_mm_cvtepi16_epi32((__m128i)__A), 16)); | |
| 432 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 433 | _mm_cvtpbh_ps(__m128bh __A) { | |
| 434 | return (__m128)_mm256_castps256_ps128( | |
| 435 | (__m256) __builtin_convertvector(__A, __v8sf)); | |
| 427 | 436 | } |
| 428 | 437 | |
| 429 | 438 | /// Convert Packed BF16 Data to Packed float Data. |
| ... | ... | @@ -433,9 +442,9 @@ static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_cvtpbh_ps(__m128bh __A) { |
| 433 | 442 | /// \param __A |
| 434 | 443 | /// A 128-bit vector of [8 x bfloat]. |
| 435 | 444 | /// \returns A 256-bit vector of [8 x float] come from conversion of __A |
| 436 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_cvtpbh_ps(__m128bh __A) { | |
| 437 | return _mm256_castsi256_ps((__m256i)_mm256_slli_epi32( | |
| 438 | (__m256i)_mm256_cvtepi16_epi32((__m128i)__A), 16)); | |
| 445 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 446 | _mm256_cvtpbh_ps(__m128bh __A) { | |
| 447 | return (__m256) __builtin_convertvector(__A, __v8sf); | |
| 439 | 448 | } |
| 440 | 449 | |
| 441 | 450 | /// Convert Packed BF16 Data to Packed float Data using zeroing mask. |
| ... | ... | @@ -448,10 +457,10 @@ static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_cvtpbh_ps(__m128bh __A) { |
| 448 | 457 | /// \param __A |
| 449 | 458 | /// A 128-bit vector of [4 x bfloat]. |
| 450 | 459 | /// \returns A 128-bit vector of [4 x float] come from conversion of __A |
| 451 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 460 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 452 | 461 | _mm_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) { |
| 453 | return _mm_castsi128_ps((__m128i)_mm_slli_epi32( | |
| 454 | (__m128i)_mm_maskz_cvtepi16_epi32((__mmask8)__U, (__m128i)__A), 16)); | |
| 462 | return (__m128)__builtin_ia32_selectps_128( | |
| 463 | (__mmask8)__U, (__v4sf)_mm_cvtpbh_ps(__A), (__v4sf)_mm_setzero_ps()); | |
| 455 | 464 | } |
| 456 | 465 | |
| 457 | 466 | /// Convert Packed BF16 Data to Packed float Data using zeroing mask. |
| ... | ... | @@ -464,10 +473,11 @@ _mm_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) { |
| 464 | 473 | /// \param __A |
| 465 | 474 | /// A 128-bit vector of [8 x bfloat]. |
| 466 | 475 | /// \returns A 256-bit vector of [8 x float] come from conversion of __A |
| 467 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 476 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 468 | 477 | _mm256_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) { |
| 469 | return _mm256_castsi256_ps((__m256i)_mm256_slli_epi32( | |
| 470 | (__m256i)_mm256_maskz_cvtepi16_epi32((__mmask8)__U, (__m128i)__A), 16)); | |
| 478 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, | |
| 479 | (__v8sf)_mm256_cvtpbh_ps(__A), | |
| 480 | (__v8sf)_mm256_setzero_ps()); | |
| 471 | 481 | } |
| 472 | 482 | |
| 473 | 483 | /// Convert Packed BF16 Data to Packed float Data using merging mask. |
| ... | ... | @@ -483,11 +493,10 @@ _mm256_maskz_cvtpbh_ps(__mmask8 __U, __m128bh __A) { |
| 483 | 493 | /// \param __A |
| 484 | 494 | /// A 128-bit vector of [4 x bfloat]. |
| 485 | 495 | /// \returns A 128-bit vector of [4 x float] come from conversion of __A |
| 486 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 496 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 487 | 497 | _mm_mask_cvtpbh_ps(__m128 __S, __mmask8 __U, __m128bh __A) { |
| 488 | return _mm_castsi128_ps((__m128i)_mm_mask_slli_epi32( | |
| 489 | (__m128i)__S, (__mmask8)__U, (__m128i)_mm_cvtepi16_epi32((__m128i)__A), | |
| 490 | 16)); | |
| 498 | return (__m128)__builtin_ia32_selectps_128( | |
| 499 | (__mmask8)__U, (__v4sf)_mm_cvtpbh_ps(__A), (__v4sf)__S); | |
| 491 | 500 | } |
| 492 | 501 | |
| 493 | 502 | /// Convert Packed BF16 Data to Packed float Data using merging mask. |
| ... | ... | @@ -503,15 +512,16 @@ _mm_mask_cvtpbh_ps(__m128 __S, __mmask8 __U, __m128bh __A) { |
| 503 | 512 | /// \param __A |
| 504 | 513 | /// A 128-bit vector of [8 x bfloat]. |
| 505 | 514 | /// \returns A 256-bit vector of [8 x float] come from conversion of __A |
| 506 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 515 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 507 | 516 | _mm256_mask_cvtpbh_ps(__m256 __S, __mmask8 __U, __m128bh __A) { |
| 508 | return _mm256_castsi256_ps((__m256i)_mm256_mask_slli_epi32( | |
| 509 | (__m256i)__S, (__mmask8)__U, (__m256i)_mm256_cvtepi16_epi32((__m128i)__A), | |
| 510 | 16)); | |
| 517 | return (__m256)__builtin_ia32_selectps_256( | |
| 518 | (__mmask8)__U, (__v8sf)_mm256_cvtpbh_ps(__A), (__v8sf)__S); | |
| 511 | 519 | } |
| 512 | 520 | |
| 513 | 521 | #undef __DEFAULT_FN_ATTRS128 |
| 514 | 522 | #undef __DEFAULT_FN_ATTRS256 |
| 523 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 524 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 515 | 525 | |
| 516 | 526 | #endif |
| 517 | 527 | #endif |
lib/include/avx512vlbitalgintrin.h+37-53| ... | ... | @@ -15,101 +15,86 @@ |
| 15 | 15 | #define __AVX512VLBITALGINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 18 | 19 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 20 | __attribute__((__always_inline__, __nodebug__, \ |
| 20 | __target__("avx512vl,avx512bitalg,no-evex512"), \ | |
| 21 | __target__("avx512vl,avx512bitalg"), \ | |
| 22 | __min_vector_width__(128))) constexpr | |
| 23 | #define __DEFAULT_FN_ATTRS256 \ | |
| 24 | __attribute__((__always_inline__, __nodebug__, \ | |
| 25 | __target__("avx512vl,avx512bitalg"), \ | |
| 26 | __min_vector_width__(256))) constexpr | |
| 27 | #else | |
| 28 | #define __DEFAULT_FN_ATTRS128 \ | |
| 29 | __attribute__((__always_inline__, __nodebug__, \ | |
| 30 | __target__("avx512vl,avx512bitalg"), \ | |
| 21 | 31 | __min_vector_width__(128))) |
| 22 | 32 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | 33 | __attribute__((__always_inline__, __nodebug__, \ |
| 24 | __target__("avx512vl,avx512bitalg,no-evex512"), \ | |
| 34 | __target__("avx512vl,avx512bitalg"), \ | |
| 25 | 35 | __min_vector_width__(256))) |
| 36 | #endif | |
| 26 | 37 | |
| 27 | 38 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 28 | _mm256_popcnt_epi16(__m256i __A) | |
| 29 | { | |
| 39 | _mm256_popcnt_epi16(__m256i __A) { | |
| 30 | 40 | return (__m256i)__builtin_elementwise_popcount((__v16hu)__A); |
| 31 | 41 | } |
| 32 | 42 | |
| 33 | 43 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 34 | _mm256_mask_popcnt_epi16(__m256i __A, __mmask16 __U, __m256i __B) | |
| 35 | { | |
| 36 | return (__m256i) __builtin_ia32_selectw_256((__mmask16) __U, | |
| 37 | (__v16hi) _mm256_popcnt_epi16(__B), | |
| 38 | (__v16hi) __A); | |
| 44 | _mm256_mask_popcnt_epi16(__m256i __A, __mmask16 __U, __m256i __B) { | |
| 45 | return (__m256i)__builtin_ia32_selectw_256( | |
| 46 | (__mmask16)__U, (__v16hi)_mm256_popcnt_epi16(__B), (__v16hi)__A); | |
| 39 | 47 | } |
| 40 | 48 | |
| 41 | 49 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 42 | _mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B) | |
| 43 | { | |
| 44 | return _mm256_mask_popcnt_epi16((__m256i) _mm256_setzero_si256(), | |
| 45 | __U, | |
| 46 | __B); | |
| 50 | _mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B) { | |
| 51 | return _mm256_mask_popcnt_epi16((__m256i)_mm256_setzero_si256(), __U, __B); | |
| 47 | 52 | } |
| 48 | 53 | |
| 49 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 50 | _mm_popcnt_epi16(__m128i __A) | |
| 51 | { | |
| 54 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_popcnt_epi16(__m128i __A) { | |
| 52 | 55 | return (__m128i)__builtin_elementwise_popcount((__v8hu)__A); |
| 53 | 56 | } |
| 54 | 57 | |
| 55 | 58 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 56 | _mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B) | |
| 57 | { | |
| 58 | return (__m128i) __builtin_ia32_selectw_128((__mmask8) __U, | |
| 59 | (__v8hi) _mm_popcnt_epi16(__B), | |
| 60 | (__v8hi) __A); | |
| 59 | _mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B) { | |
| 60 | return (__m128i)__builtin_ia32_selectw_128( | |
| 61 | (__mmask8)__U, (__v8hi)_mm_popcnt_epi16(__B), (__v8hi)__A); | |
| 61 | 62 | } |
| 62 | 63 | |
| 63 | 64 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 64 | _mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B) | |
| 65 | { | |
| 66 | return _mm_mask_popcnt_epi16((__m128i) _mm_setzero_si128(), | |
| 67 | __U, | |
| 68 | __B); | |
| 65 | _mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B) { | |
| 66 | return _mm_mask_popcnt_epi16((__m128i)_mm_setzero_si128(), __U, __B); | |
| 69 | 67 | } |
| 70 | 68 | |
| 71 | 69 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 72 | _mm256_popcnt_epi8(__m256i __A) | |
| 73 | { | |
| 70 | _mm256_popcnt_epi8(__m256i __A) { | |
| 74 | 71 | return (__m256i)__builtin_elementwise_popcount((__v32qu)__A); |
| 75 | 72 | } |
| 76 | 73 | |
| 77 | 74 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 78 | _mm256_mask_popcnt_epi8(__m256i __A, __mmask32 __U, __m256i __B) | |
| 79 | { | |
| 80 | return (__m256i) __builtin_ia32_selectb_256((__mmask32) __U, | |
| 81 | (__v32qi) _mm256_popcnt_epi8(__B), | |
| 82 | (__v32qi) __A); | |
| 75 | _mm256_mask_popcnt_epi8(__m256i __A, __mmask32 __U, __m256i __B) { | |
| 76 | return (__m256i)__builtin_ia32_selectb_256( | |
| 77 | (__mmask32)__U, (__v32qi)_mm256_popcnt_epi8(__B), (__v32qi)__A); | |
| 83 | 78 | } |
| 84 | 79 | |
| 85 | 80 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 86 | _mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B) | |
| 87 | { | |
| 88 | return _mm256_mask_popcnt_epi8((__m256i) _mm256_setzero_si256(), | |
| 89 | __U, | |
| 90 | __B); | |
| 81 | _mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B) { | |
| 82 | return _mm256_mask_popcnt_epi8((__m256i)_mm256_setzero_si256(), __U, __B); | |
| 91 | 83 | } |
| 92 | 84 | |
| 93 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 94 | _mm_popcnt_epi8(__m128i __A) | |
| 95 | { | |
| 85 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_popcnt_epi8(__m128i __A) { | |
| 96 | 86 | return (__m128i)__builtin_elementwise_popcount((__v16qu)__A); |
| 97 | 87 | } |
| 98 | 88 | |
| 99 | 89 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 100 | _mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B) | |
| 101 | { | |
| 102 | return (__m128i) __builtin_ia32_selectb_128((__mmask16) __U, | |
| 103 | (__v16qi) _mm_popcnt_epi8(__B), | |
| 104 | (__v16qi) __A); | |
| 90 | _mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B) { | |
| 91 | return (__m128i)__builtin_ia32_selectb_128( | |
| 92 | (__mmask16)__U, (__v16qi)_mm_popcnt_epi8(__B), (__v16qi)__A); | |
| 105 | 93 | } |
| 106 | 94 | |
| 107 | 95 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 108 | _mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B) | |
| 109 | { | |
| 110 | return _mm_mask_popcnt_epi8((__m128i) _mm_setzero_si128(), | |
| 111 | __U, | |
| 112 | __B); | |
| 96 | _mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B) { | |
| 97 | return _mm_mask_popcnt_epi8((__m128i)_mm_setzero_si128(), __U, __B); | |
| 113 | 98 | } |
| 114 | 99 | |
| 115 | 100 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 |
| ... | ... | @@ -147,5 +132,4 @@ _mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B) |
| 147 | 132 | |
| 148 | 133 | #undef __DEFAULT_FN_ATTRS128 |
| 149 | 134 | #undef __DEFAULT_FN_ATTRS256 |
| 150 | ||
| 151 | 135 | #endif |
lib/include/avx512vlbwintrin.h+470-573| ... | ... | @@ -17,12 +17,18 @@ |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | 18 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 19 | __attribute__((__always_inline__, __nodebug__, \ |
| 20 | __target__("avx512vl,avx512bw,no-evex512"), \ | |
| 21 | __min_vector_width__(128))) | |
| 20 | __target__("avx512vl,avx512bw"), __min_vector_width__(128))) | |
| 22 | 21 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | 22 | __attribute__((__always_inline__, __nodebug__, \ |
| 24 | __target__("avx512vl,avx512bw,no-evex512"), \ | |
| 25 | __min_vector_width__(256))) | |
| 23 | __target__("avx512vl,avx512bw"), __min_vector_width__(256))) | |
| 24 | ||
| 25 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 26 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 27 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 28 | #else | |
| 29 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 30 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 31 | #endif | |
| 26 | 32 | |
| 27 | 33 | /* Integer compare */ |
| 28 | 34 | |
| ... | ... | @@ -306,250 +312,238 @@ |
| 306 | 312 | #define _mm256_mask_cmpneq_epu16_mask(k, A, B) \ |
| 307 | 313 | _mm256_mask_cmp_epu16_mask((k), (A), (B), _MM_CMPINT_NE) |
| 308 | 314 | |
| 309 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 310 | _mm256_mask_add_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B){ | |
| 315 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 316 | _mm256_mask_add_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { | |
| 311 | 317 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 312 | 318 | (__v32qi)_mm256_add_epi8(__A, __B), |
| 313 | 319 | (__v32qi)__W); |
| 314 | 320 | } |
| 315 | 321 | |
| 316 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 322 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 317 | 323 | _mm256_maskz_add_epi8(__mmask32 __U, __m256i __A, __m256i __B) { |
| 318 | 324 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 319 | 325 | (__v32qi)_mm256_add_epi8(__A, __B), |
| 320 | 326 | (__v32qi)_mm256_setzero_si256()); |
| 321 | 327 | } |
| 322 | 328 | |
| 323 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 329 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 324 | 330 | _mm256_mask_add_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { |
| 325 | 331 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 326 | 332 | (__v16hi)_mm256_add_epi16(__A, __B), |
| 327 | 333 | (__v16hi)__W); |
| 328 | 334 | } |
| 329 | 335 | |
| 330 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 336 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 331 | 337 | _mm256_maskz_add_epi16(__mmask16 __U, __m256i __A, __m256i __B) { |
| 332 | 338 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 333 | 339 | (__v16hi)_mm256_add_epi16(__A, __B), |
| 334 | 340 | (__v16hi)_mm256_setzero_si256()); |
| 335 | 341 | } |
| 336 | 342 | |
| 337 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 343 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 338 | 344 | _mm256_mask_sub_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { |
| 339 | 345 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 340 | 346 | (__v32qi)_mm256_sub_epi8(__A, __B), |
| 341 | 347 | (__v32qi)__W); |
| 342 | 348 | } |
| 343 | 349 | |
| 344 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 350 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 345 | 351 | _mm256_maskz_sub_epi8(__mmask32 __U, __m256i __A, __m256i __B) { |
| 346 | 352 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 347 | 353 | (__v32qi)_mm256_sub_epi8(__A, __B), |
| 348 | 354 | (__v32qi)_mm256_setzero_si256()); |
| 349 | 355 | } |
| 350 | 356 | |
| 351 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 357 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 352 | 358 | _mm256_mask_sub_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { |
| 353 | 359 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 354 | 360 | (__v16hi)_mm256_sub_epi16(__A, __B), |
| 355 | 361 | (__v16hi)__W); |
| 356 | 362 | } |
| 357 | 363 | |
| 358 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 364 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 359 | 365 | _mm256_maskz_sub_epi16(__mmask16 __U, __m256i __A, __m256i __B) { |
| 360 | 366 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 361 | 367 | (__v16hi)_mm256_sub_epi16(__A, __B), |
| 362 | 368 | (__v16hi)_mm256_setzero_si256()); |
| 363 | 369 | } |
| 364 | 370 | |
| 365 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 371 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 366 | 372 | _mm_mask_add_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { |
| 367 | 373 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 368 | 374 | (__v16qi)_mm_add_epi8(__A, __B), |
| 369 | 375 | (__v16qi)__W); |
| 370 | 376 | } |
| 371 | 377 | |
| 372 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 378 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 373 | 379 | _mm_maskz_add_epi8(__mmask16 __U, __m128i __A, __m128i __B) { |
| 374 | 380 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 375 | 381 | (__v16qi)_mm_add_epi8(__A, __B), |
| 376 | 382 | (__v16qi)_mm_setzero_si128()); |
| 377 | 383 | } |
| 378 | 384 | |
| 379 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 385 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 380 | 386 | _mm_mask_add_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 381 | 387 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 382 | 388 | (__v8hi)_mm_add_epi16(__A, __B), |
| 383 | 389 | (__v8hi)__W); |
| 384 | 390 | } |
| 385 | 391 | |
| 386 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 392 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 387 | 393 | _mm_maskz_add_epi16(__mmask8 __U, __m128i __A, __m128i __B) { |
| 388 | 394 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 389 | 395 | (__v8hi)_mm_add_epi16(__A, __B), |
| 390 | 396 | (__v8hi)_mm_setzero_si128()); |
| 391 | 397 | } |
| 392 | 398 | |
| 393 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 399 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 394 | 400 | _mm_mask_sub_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { |
| 395 | 401 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 396 | 402 | (__v16qi)_mm_sub_epi8(__A, __B), |
| 397 | 403 | (__v16qi)__W); |
| 398 | 404 | } |
| 399 | 405 | |
| 400 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 406 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 401 | 407 | _mm_maskz_sub_epi8(__mmask16 __U, __m128i __A, __m128i __B) { |
| 402 | 408 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 403 | 409 | (__v16qi)_mm_sub_epi8(__A, __B), |
| 404 | 410 | (__v16qi)_mm_setzero_si128()); |
| 405 | 411 | } |
| 406 | 412 | |
| 407 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 413 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 408 | 414 | _mm_mask_sub_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 409 | 415 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 410 | 416 | (__v8hi)_mm_sub_epi16(__A, __B), |
| 411 | 417 | (__v8hi)__W); |
| 412 | 418 | } |
| 413 | 419 | |
| 414 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 420 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 415 | 421 | _mm_maskz_sub_epi16(__mmask8 __U, __m128i __A, __m128i __B) { |
| 416 | 422 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 417 | 423 | (__v8hi)_mm_sub_epi16(__A, __B), |
| 418 | 424 | (__v8hi)_mm_setzero_si128()); |
| 419 | 425 | } |
| 420 | 426 | |
| 421 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 427 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 422 | 428 | _mm256_mask_mullo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { |
| 423 | 429 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 424 | 430 | (__v16hi)_mm256_mullo_epi16(__A, __B), |
| 425 | 431 | (__v16hi)__W); |
| 426 | 432 | } |
| 427 | 433 | |
| 428 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 434 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 429 | 435 | _mm256_maskz_mullo_epi16(__mmask16 __U, __m256i __A, __m256i __B) { |
| 430 | 436 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 431 | 437 | (__v16hi)_mm256_mullo_epi16(__A, __B), |
| 432 | 438 | (__v16hi)_mm256_setzero_si256()); |
| 433 | 439 | } |
| 434 | 440 | |
| 435 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 441 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 436 | 442 | _mm_mask_mullo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 437 | 443 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 438 | 444 | (__v8hi)_mm_mullo_epi16(__A, __B), |
| 439 | 445 | (__v8hi)__W); |
| 440 | 446 | } |
| 441 | 447 | |
| 442 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 448 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 443 | 449 | _mm_maskz_mullo_epi16(__mmask8 __U, __m128i __A, __m128i __B) { |
| 444 | 450 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 445 | 451 | (__v8hi)_mm_mullo_epi16(__A, __B), |
| 446 | 452 | (__v8hi)_mm_setzero_si128()); |
| 447 | 453 | } |
| 448 | 454 | |
| 449 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 450 | _mm_mask_blend_epi8 (__mmask16 __U, __m128i __A, __m128i __W) | |
| 451 | { | |
| 455 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 456 | _mm_mask_blend_epi8(__mmask16 __U, __m128i __A, __m128i __W) { | |
| 452 | 457 | return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U, |
| 453 | 458 | (__v16qi) __W, |
| 454 | 459 | (__v16qi) __A); |
| 455 | 460 | } |
| 456 | 461 | |
| 457 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 458 | _mm256_mask_blend_epi8 (__mmask32 __U, __m256i __A, __m256i __W) | |
| 459 | { | |
| 462 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 463 | _mm256_mask_blend_epi8(__mmask32 __U, __m256i __A, __m256i __W) { | |
| 460 | 464 | return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U, |
| 461 | 465 | (__v32qi) __W, |
| 462 | 466 | (__v32qi) __A); |
| 463 | 467 | } |
| 464 | 468 | |
| 465 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 466 | _mm_mask_blend_epi16 (__mmask8 __U, __m128i __A, __m128i __W) | |
| 467 | { | |
| 469 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 470 | _mm_mask_blend_epi16(__mmask8 __U, __m128i __A, __m128i __W) { | |
| 468 | 471 | return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U, |
| 469 | 472 | (__v8hi) __W, |
| 470 | 473 | (__v8hi) __A); |
| 471 | 474 | } |
| 472 | 475 | |
| 473 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 474 | _mm256_mask_blend_epi16 (__mmask16 __U, __m256i __A, __m256i __W) | |
| 475 | { | |
| 476 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 477 | _mm256_mask_blend_epi16(__mmask16 __U, __m256i __A, __m256i __W) { | |
| 476 | 478 | return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U, |
| 477 | 479 | (__v16hi) __W, |
| 478 | 480 | (__v16hi) __A); |
| 479 | 481 | } |
| 480 | 482 | |
| 481 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 482 | _mm_mask_abs_epi8(__m128i __W, __mmask16 __U, __m128i __A) | |
| 483 | { | |
| 483 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 484 | _mm_mask_abs_epi8(__m128i __W, __mmask16 __U, __m128i __A) { | |
| 484 | 485 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 485 | 486 | (__v16qi)_mm_abs_epi8(__A), |
| 486 | 487 | (__v16qi)__W); |
| 487 | 488 | } |
| 488 | 489 | |
| 489 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 490 | _mm_maskz_abs_epi8(__mmask16 __U, __m128i __A) | |
| 491 | { | |
| 490 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 491 | _mm_maskz_abs_epi8(__mmask16 __U, __m128i __A) { | |
| 492 | 492 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 493 | 493 | (__v16qi)_mm_abs_epi8(__A), |
| 494 | 494 | (__v16qi)_mm_setzero_si128()); |
| 495 | 495 | } |
| 496 | 496 | |
| 497 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 498 | _mm256_mask_abs_epi8(__m256i __W, __mmask32 __U, __m256i __A) | |
| 499 | { | |
| 497 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 498 | _mm256_mask_abs_epi8(__m256i __W, __mmask32 __U, __m256i __A) { | |
| 500 | 499 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 501 | 500 | (__v32qi)_mm256_abs_epi8(__A), |
| 502 | 501 | (__v32qi)__W); |
| 503 | 502 | } |
| 504 | 503 | |
| 505 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 506 | _mm256_maskz_abs_epi8 (__mmask32 __U, __m256i __A) | |
| 507 | { | |
| 504 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 505 | _mm256_maskz_abs_epi8(__mmask32 __U, __m256i __A) { | |
| 508 | 506 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 509 | 507 | (__v32qi)_mm256_abs_epi8(__A), |
| 510 | 508 | (__v32qi)_mm256_setzero_si256()); |
| 511 | 509 | } |
| 512 | 510 | |
| 513 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 514 | _mm_mask_abs_epi16(__m128i __W, __mmask8 __U, __m128i __A) | |
| 515 | { | |
| 511 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 512 | _mm_mask_abs_epi16(__m128i __W, __mmask8 __U, __m128i __A) { | |
| 516 | 513 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 517 | 514 | (__v8hi)_mm_abs_epi16(__A), |
| 518 | 515 | (__v8hi)__W); |
| 519 | 516 | } |
| 520 | 517 | |
| 521 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 522 | _mm_maskz_abs_epi16(__mmask8 __U, __m128i __A) | |
| 523 | { | |
| 518 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 519 | _mm_maskz_abs_epi16(__mmask8 __U, __m128i __A) { | |
| 524 | 520 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 525 | 521 | (__v8hi)_mm_abs_epi16(__A), |
| 526 | 522 | (__v8hi)_mm_setzero_si128()); |
| 527 | 523 | } |
| 528 | 524 | |
| 529 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 530 | _mm256_mask_abs_epi16(__m256i __W, __mmask16 __U, __m256i __A) | |
| 531 | { | |
| 525 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 526 | _mm256_mask_abs_epi16(__m256i __W, __mmask16 __U, __m256i __A) { | |
| 532 | 527 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 533 | 528 | (__v16hi)_mm256_abs_epi16(__A), |
| 534 | 529 | (__v16hi)__W); |
| 535 | 530 | } |
| 536 | 531 | |
| 537 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 538 | _mm256_maskz_abs_epi16(__mmask16 __U, __m256i __A) | |
| 539 | { | |
| 532 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 533 | _mm256_maskz_abs_epi16(__mmask16 __U, __m256i __A) { | |
| 540 | 534 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 541 | 535 | (__v16hi)_mm256_abs_epi16(__A), |
| 542 | 536 | (__v16hi)_mm256_setzero_si256()); |
| 543 | 537 | } |
| 544 | 538 | |
| 545 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 539 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 546 | 540 | _mm_maskz_packs_epi32(__mmask8 __M, __m128i __A, __m128i __B) { |
| 547 | 541 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 548 | 542 | (__v8hi)_mm_packs_epi32(__A, __B), |
| 549 | 543 | (__v8hi)_mm_setzero_si128()); |
| 550 | 544 | } |
| 551 | 545 | |
| 552 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 546 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 553 | 547 | _mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) |
| 554 | 548 | { |
| 555 | 549 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| ... | ... | @@ -557,7 +551,7 @@ _mm_mask_packs_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) |
| 557 | 551 | (__v8hi)__W); |
| 558 | 552 | } |
| 559 | 553 | |
| 560 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 554 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 561 | 555 | _mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B) |
| 562 | 556 | { |
| 563 | 557 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| ... | ... | @@ -565,7 +559,7 @@ _mm256_maskz_packs_epi32(__mmask16 __M, __m256i __A, __m256i __B) |
| 565 | 559 | (__v16hi)_mm256_setzero_si256()); |
| 566 | 560 | } |
| 567 | 561 | |
| 568 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 562 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 569 | 563 | _mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) |
| 570 | 564 | { |
| 571 | 565 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| ... | ... | @@ -573,7 +567,7 @@ _mm256_mask_packs_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) |
| 573 | 567 | (__v16hi)__W); |
| 574 | 568 | } |
| 575 | 569 | |
| 576 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 570 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 577 | 571 | _mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B) |
| 578 | 572 | { |
| 579 | 573 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| ... | ... | @@ -581,7 +575,7 @@ _mm_maskz_packs_epi16(__mmask16 __M, __m128i __A, __m128i __B) |
| 581 | 575 | (__v16qi)_mm_setzero_si128()); |
| 582 | 576 | } |
| 583 | 577 | |
| 584 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 578 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 585 | 579 | _mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) |
| 586 | 580 | { |
| 587 | 581 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| ... | ... | @@ -589,7 +583,7 @@ _mm_mask_packs_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) |
| 589 | 583 | (__v16qi)__W); |
| 590 | 584 | } |
| 591 | 585 | |
| 592 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 586 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 593 | 587 | _mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B) |
| 594 | 588 | { |
| 595 | 589 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| ... | ... | @@ -597,7 +591,7 @@ _mm256_maskz_packs_epi16(__mmask32 __M, __m256i __A, __m256i __B) |
| 597 | 591 | (__v32qi)_mm256_setzero_si256()); |
| 598 | 592 | } |
| 599 | 593 | |
| 600 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 594 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 601 | 595 | _mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) |
| 602 | 596 | { |
| 603 | 597 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| ... | ... | @@ -605,7 +599,7 @@ _mm256_mask_packs_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) |
| 605 | 599 | (__v32qi)__W); |
| 606 | 600 | } |
| 607 | 601 | |
| 608 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 602 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 609 | 603 | _mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B) |
| 610 | 604 | { |
| 611 | 605 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| ... | ... | @@ -613,7 +607,7 @@ _mm_maskz_packus_epi32(__mmask8 __M, __m128i __A, __m128i __B) |
| 613 | 607 | (__v8hi)_mm_setzero_si128()); |
| 614 | 608 | } |
| 615 | 609 | |
| 616 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 610 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 617 | 611 | _mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) |
| 618 | 612 | { |
| 619 | 613 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| ... | ... | @@ -621,7 +615,7 @@ _mm_mask_packus_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) |
| 621 | 615 | (__v8hi)__W); |
| 622 | 616 | } |
| 623 | 617 | |
| 624 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 618 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 625 | 619 | _mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B) |
| 626 | 620 | { |
| 627 | 621 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| ... | ... | @@ -629,7 +623,7 @@ _mm256_maskz_packus_epi32(__mmask16 __M, __m256i __A, __m256i __B) |
| 629 | 623 | (__v16hi)_mm256_setzero_si256()); |
| 630 | 624 | } |
| 631 | 625 | |
| 632 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 626 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 633 | 627 | _mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) |
| 634 | 628 | { |
| 635 | 629 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| ... | ... | @@ -637,7 +631,7 @@ _mm256_mask_packus_epi32(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) |
| 637 | 631 | (__v16hi)__W); |
| 638 | 632 | } |
| 639 | 633 | |
| 640 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 634 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 641 | 635 | _mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B) |
| 642 | 636 | { |
| 643 | 637 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| ... | ... | @@ -645,7 +639,7 @@ _mm_maskz_packus_epi16(__mmask16 __M, __m128i __A, __m128i __B) |
| 645 | 639 | (__v16qi)_mm_setzero_si128()); |
| 646 | 640 | } |
| 647 | 641 | |
| 648 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 642 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 649 | 643 | _mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) |
| 650 | 644 | { |
| 651 | 645 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| ... | ... | @@ -653,7 +647,7 @@ _mm_mask_packus_epi16(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) |
| 653 | 647 | (__v16qi)__W); |
| 654 | 648 | } |
| 655 | 649 | |
| 656 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 650 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 657 | 651 | _mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B) |
| 658 | 652 | { |
| 659 | 653 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| ... | ... | @@ -661,7 +655,7 @@ _mm256_maskz_packus_epi16(__mmask32 __M, __m256i __A, __m256i __B) |
| 661 | 655 | (__v32qi)_mm256_setzero_si256()); |
| 662 | 656 | } |
| 663 | 657 | |
| 664 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 658 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 665 | 659 | _mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) |
| 666 | 660 | { |
| 667 | 661 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| ... | ... | @@ -669,7 +663,7 @@ _mm256_mask_packus_epi16(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) |
| 669 | 663 | (__v32qi)__W); |
| 670 | 664 | } |
| 671 | 665 | |
| 672 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 666 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 673 | 667 | _mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) |
| 674 | 668 | { |
| 675 | 669 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| ... | ... | @@ -677,7 +671,7 @@ _mm_mask_adds_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) |
| 677 | 671 | (__v16qi)__W); |
| 678 | 672 | } |
| 679 | 673 | |
| 680 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 674 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 681 | 675 | _mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B) |
| 682 | 676 | { |
| 683 | 677 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| ... | ... | @@ -685,7 +679,7 @@ _mm_maskz_adds_epi8(__mmask16 __U, __m128i __A, __m128i __B) |
| 685 | 679 | (__v16qi)_mm_setzero_si128()); |
| 686 | 680 | } |
| 687 | 681 | |
| 688 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 682 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 689 | 683 | _mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) |
| 690 | 684 | { |
| 691 | 685 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| ... | ... | @@ -693,7 +687,7 @@ _mm256_mask_adds_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) |
| 693 | 687 | (__v32qi)__W); |
| 694 | 688 | } |
| 695 | 689 | |
| 696 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 690 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 697 | 691 | _mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B) |
| 698 | 692 | { |
| 699 | 693 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| ... | ... | @@ -701,7 +695,7 @@ _mm256_maskz_adds_epi8(__mmask32 __U, __m256i __A, __m256i __B) |
| 701 | 695 | (__v32qi)_mm256_setzero_si256()); |
| 702 | 696 | } |
| 703 | 697 | |
| 704 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 698 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 705 | 699 | _mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 706 | 700 | { |
| 707 | 701 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -709,7 +703,7 @@ _mm_mask_adds_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 709 | 703 | (__v8hi)__W); |
| 710 | 704 | } |
| 711 | 705 | |
| 712 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 706 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 713 | 707 | _mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B) |
| 714 | 708 | { |
| 715 | 709 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -717,7 +711,7 @@ _mm_maskz_adds_epi16(__mmask8 __U, __m128i __A, __m128i __B) |
| 717 | 711 | (__v8hi)_mm_setzero_si128()); |
| 718 | 712 | } |
| 719 | 713 | |
| 720 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 714 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 721 | 715 | _mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 722 | 716 | { |
| 723 | 717 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -725,7 +719,7 @@ _mm256_mask_adds_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 725 | 719 | (__v16hi)__W); |
| 726 | 720 | } |
| 727 | 721 | |
| 728 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 722 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 729 | 723 | _mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 730 | 724 | { |
| 731 | 725 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -733,7 +727,7 @@ _mm256_maskz_adds_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 733 | 727 | (__v16hi)_mm256_setzero_si256()); |
| 734 | 728 | } |
| 735 | 729 | |
| 736 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 730 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 737 | 731 | _mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) |
| 738 | 732 | { |
| 739 | 733 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| ... | ... | @@ -741,7 +735,7 @@ _mm_mask_adds_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) |
| 741 | 735 | (__v16qi)__W); |
| 742 | 736 | } |
| 743 | 737 | |
| 744 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 738 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 745 | 739 | _mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B) |
| 746 | 740 | { |
| 747 | 741 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| ... | ... | @@ -749,7 +743,7 @@ _mm_maskz_adds_epu8(__mmask16 __U, __m128i __A, __m128i __B) |
| 749 | 743 | (__v16qi)_mm_setzero_si128()); |
| 750 | 744 | } |
| 751 | 745 | |
| 752 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 746 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 753 | 747 | _mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) |
| 754 | 748 | { |
| 755 | 749 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| ... | ... | @@ -757,7 +751,7 @@ _mm256_mask_adds_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) |
| 757 | 751 | (__v32qi)__W); |
| 758 | 752 | } |
| 759 | 753 | |
| 760 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 754 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 761 | 755 | _mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B) |
| 762 | 756 | { |
| 763 | 757 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| ... | ... | @@ -765,7 +759,7 @@ _mm256_maskz_adds_epu8(__mmask32 __U, __m256i __A, __m256i __B) |
| 765 | 759 | (__v32qi)_mm256_setzero_si256()); |
| 766 | 760 | } |
| 767 | 761 | |
| 768 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 762 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 769 | 763 | _mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 770 | 764 | { |
| 771 | 765 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -773,7 +767,7 @@ _mm_mask_adds_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 773 | 767 | (__v8hi)__W); |
| 774 | 768 | } |
| 775 | 769 | |
| 776 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 770 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 777 | 771 | _mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B) |
| 778 | 772 | { |
| 779 | 773 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -781,7 +775,7 @@ _mm_maskz_adds_epu16(__mmask8 __U, __m128i __A, __m128i __B) |
| 781 | 775 | (__v8hi)_mm_setzero_si128()); |
| 782 | 776 | } |
| 783 | 777 | |
| 784 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 778 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 785 | 779 | _mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 786 | 780 | { |
| 787 | 781 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -789,7 +783,7 @@ _mm256_mask_adds_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 789 | 783 | (__v16hi)__W); |
| 790 | 784 | } |
| 791 | 785 | |
| 792 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 786 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 793 | 787 | _mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B) |
| 794 | 788 | { |
| 795 | 789 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -797,359 +791,311 @@ _mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B) |
| 797 | 791 | (__v16hi)_mm256_setzero_si256()); |
| 798 | 792 | } |
| 799 | 793 | |
| 800 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 801 | _mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) | |
| 802 | { | |
| 803 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, | |
| 804 | (__v16qi)_mm_avg_epu8(__A, __B), | |
| 805 | (__v16qi)__W); | |
| 794 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 795 | _mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { | |
| 796 | return (__m128i)__builtin_ia32_selectb_128( | |
| 797 | (__mmask16)__U, (__v16qi)_mm_avg_epu8(__A, __B), (__v16qi)__W); | |
| 806 | 798 | } |
| 807 | 799 | |
| 808 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 809 | _mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B) | |
| 810 | { | |
| 800 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 801 | _mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B) { | |
| 811 | 802 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 812 | 803 | (__v16qi)_mm_avg_epu8(__A, __B), |
| 813 | 804 | (__v16qi)_mm_setzero_si128()); |
| 814 | 805 | } |
| 815 | 806 | |
| 816 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 817 | _mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) | |
| 818 | { | |
| 819 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, | |
| 820 | (__v32qi)_mm256_avg_epu8(__A, __B), | |
| 821 | (__v32qi)__W); | |
| 807 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 808 | _mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { | |
| 809 | return (__m256i)__builtin_ia32_selectb_256( | |
| 810 | (__mmask32)__U, (__v32qi)_mm256_avg_epu8(__A, __B), (__v32qi)__W); | |
| 822 | 811 | } |
| 823 | 812 | |
| 824 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 825 | _mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B) | |
| 826 | { | |
| 813 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 814 | _mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B) { | |
| 827 | 815 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 828 | 816 | (__v32qi)_mm256_avg_epu8(__A, __B), |
| 829 | 817 | (__v32qi)_mm256_setzero_si256()); |
| 830 | 818 | } |
| 831 | 819 | |
| 832 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 833 | _mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 834 | { | |
| 835 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, | |
| 836 | (__v8hi)_mm_avg_epu16(__A, __B), | |
| 837 | (__v8hi)__W); | |
| 820 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 821 | _mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 822 | return (__m128i)__builtin_ia32_selectw_128( | |
| 823 | (__mmask8)__U, (__v8hi)_mm_avg_epu16(__A, __B), (__v8hi)__W); | |
| 838 | 824 | } |
| 839 | 825 | |
| 840 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 841 | _mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B) | |
| 842 | { | |
| 826 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 827 | _mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 843 | 828 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 844 | 829 | (__v8hi)_mm_avg_epu16(__A, __B), |
| 845 | 830 | (__v8hi)_mm_setzero_si128()); |
| 846 | 831 | } |
| 847 | 832 | |
| 848 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 849 | _mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) | |
| 850 | { | |
| 851 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, | |
| 852 | (__v16hi)_mm256_avg_epu16(__A, __B), | |
| 853 | (__v16hi)__W); | |
| 833 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 834 | _mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { | |
| 835 | return (__m256i)__builtin_ia32_selectw_256( | |
| 836 | (__mmask16)__U, (__v16hi)_mm256_avg_epu16(__A, __B), (__v16hi)__W); | |
| 854 | 837 | } |
| 855 | 838 | |
| 856 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 857 | _mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B) | |
| 858 | { | |
| 859 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, | |
| 860 | (__v16hi)_mm256_avg_epu16(__A, __B), | |
| 861 | (__v16hi)_mm256_setzero_si256()); | |
| 839 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 840 | _mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B) { | |
| 841 | return (__m256i)__builtin_ia32_selectw_256( | |
| 842 | (__mmask16)__U, (__v16hi)_mm256_avg_epu16(__A, __B), | |
| 843 | (__v16hi)_mm256_setzero_si256()); | |
| 862 | 844 | } |
| 863 | 845 | |
| 864 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 865 | _mm_maskz_max_epi8(__mmask16 __M, __m128i __A, __m128i __B) | |
| 866 | { | |
| 846 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 847 | _mm_maskz_max_epi8(__mmask16 __M, __m128i __A, __m128i __B) { | |
| 867 | 848 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 868 | 849 | (__v16qi)_mm_max_epi8(__A, __B), |
| 869 | 850 | (__v16qi)_mm_setzero_si128()); |
| 870 | 851 | } |
| 871 | 852 | |
| 872 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 873 | _mm_mask_max_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) | |
| 874 | { | |
| 853 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 854 | _mm_mask_max_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) { | |
| 875 | 855 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 876 | 856 | (__v16qi)_mm_max_epi8(__A, __B), |
| 877 | 857 | (__v16qi)__W); |
| 878 | 858 | } |
| 879 | 859 | |
| 880 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 881 | _mm256_maskz_max_epi8(__mmask32 __M, __m256i __A, __m256i __B) | |
| 882 | { | |
| 860 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 861 | _mm256_maskz_max_epi8(__mmask32 __M, __m256i __A, __m256i __B) { | |
| 883 | 862 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 884 | 863 | (__v32qi)_mm256_max_epi8(__A, __B), |
| 885 | 864 | (__v32qi)_mm256_setzero_si256()); |
| 886 | 865 | } |
| 887 | 866 | |
| 888 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 889 | _mm256_mask_max_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) | |
| 890 | { | |
| 867 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 868 | _mm256_mask_max_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) { | |
| 891 | 869 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 892 | 870 | (__v32qi)_mm256_max_epi8(__A, __B), |
| 893 | 871 | (__v32qi)__W); |
| 894 | 872 | } |
| 895 | 873 | |
| 896 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 897 | _mm_maskz_max_epi16(__mmask8 __M, __m128i __A, __m128i __B) | |
| 898 | { | |
| 874 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 875 | _mm_maskz_max_epi16(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 899 | 876 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 900 | 877 | (__v8hi)_mm_max_epi16(__A, __B), |
| 901 | 878 | (__v8hi)_mm_setzero_si128()); |
| 902 | 879 | } |
| 903 | 880 | |
| 904 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 905 | _mm_mask_max_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) | |
| 906 | { | |
| 881 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 882 | _mm_mask_max_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 907 | 883 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 908 | 884 | (__v8hi)_mm_max_epi16(__A, __B), |
| 909 | 885 | (__v8hi)__W); |
| 910 | 886 | } |
| 911 | 887 | |
| 912 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 913 | _mm256_maskz_max_epi16(__mmask16 __M, __m256i __A, __m256i __B) | |
| 914 | { | |
| 888 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 889 | _mm256_maskz_max_epi16(__mmask16 __M, __m256i __A, __m256i __B) { | |
| 915 | 890 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 916 | 891 | (__v16hi)_mm256_max_epi16(__A, __B), |
| 917 | 892 | (__v16hi)_mm256_setzero_si256()); |
| 918 | 893 | } |
| 919 | 894 | |
| 920 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 921 | _mm256_mask_max_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) | |
| 922 | { | |
| 895 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 896 | _mm256_mask_max_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) { | |
| 923 | 897 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 924 | 898 | (__v16hi)_mm256_max_epi16(__A, __B), |
| 925 | 899 | (__v16hi)__W); |
| 926 | 900 | } |
| 927 | 901 | |
| 928 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 929 | _mm_maskz_max_epu8(__mmask16 __M, __m128i __A, __m128i __B) | |
| 930 | { | |
| 902 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 903 | _mm_maskz_max_epu8(__mmask16 __M, __m128i __A, __m128i __B) { | |
| 931 | 904 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 932 | 905 | (__v16qi)_mm_max_epu8(__A, __B), |
| 933 | 906 | (__v16qi)_mm_setzero_si128()); |
| 934 | 907 | } |
| 935 | 908 | |
| 936 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 937 | _mm_mask_max_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) | |
| 938 | { | |
| 909 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 910 | _mm_mask_max_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) { | |
| 939 | 911 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 940 | 912 | (__v16qi)_mm_max_epu8(__A, __B), |
| 941 | 913 | (__v16qi)__W); |
| 942 | 914 | } |
| 943 | 915 | |
| 944 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 945 | _mm256_maskz_max_epu8 (__mmask32 __M, __m256i __A, __m256i __B) | |
| 946 | { | |
| 916 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 917 | _mm256_maskz_max_epu8(__mmask32 __M, __m256i __A, __m256i __B) { | |
| 947 | 918 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 948 | 919 | (__v32qi)_mm256_max_epu8(__A, __B), |
| 949 | 920 | (__v32qi)_mm256_setzero_si256()); |
| 950 | 921 | } |
| 951 | 922 | |
| 952 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 953 | _mm256_mask_max_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) | |
| 954 | { | |
| 923 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 924 | _mm256_mask_max_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) { | |
| 955 | 925 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 956 | 926 | (__v32qi)_mm256_max_epu8(__A, __B), |
| 957 | 927 | (__v32qi)__W); |
| 958 | 928 | } |
| 959 | 929 | |
| 960 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 961 | _mm_maskz_max_epu16(__mmask8 __M, __m128i __A, __m128i __B) | |
| 962 | { | |
| 930 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 931 | _mm_maskz_max_epu16(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 963 | 932 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 964 | 933 | (__v8hi)_mm_max_epu16(__A, __B), |
| 965 | 934 | (__v8hi)_mm_setzero_si128()); |
| 966 | 935 | } |
| 967 | 936 | |
| 968 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 969 | _mm_mask_max_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) | |
| 970 | { | |
| 937 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 938 | _mm_mask_max_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 971 | 939 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 972 | 940 | (__v8hi)_mm_max_epu16(__A, __B), |
| 973 | 941 | (__v8hi)__W); |
| 974 | 942 | } |
| 975 | 943 | |
| 976 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 977 | _mm256_maskz_max_epu16(__mmask16 __M, __m256i __A, __m256i __B) | |
| 978 | { | |
| 944 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 945 | _mm256_maskz_max_epu16(__mmask16 __M, __m256i __A, __m256i __B) { | |
| 979 | 946 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 980 | 947 | (__v16hi)_mm256_max_epu16(__A, __B), |
| 981 | 948 | (__v16hi)_mm256_setzero_si256()); |
| 982 | 949 | } |
| 983 | 950 | |
| 984 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 985 | _mm256_mask_max_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) | |
| 986 | { | |
| 951 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 952 | _mm256_mask_max_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) { | |
| 987 | 953 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 988 | 954 | (__v16hi)_mm256_max_epu16(__A, __B), |
| 989 | 955 | (__v16hi)__W); |
| 990 | 956 | } |
| 991 | 957 | |
| 992 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 993 | _mm_maskz_min_epi8(__mmask16 __M, __m128i __A, __m128i __B) | |
| 994 | { | |
| 958 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 959 | _mm_maskz_min_epi8(__mmask16 __M, __m128i __A, __m128i __B) { | |
| 995 | 960 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 996 | 961 | (__v16qi)_mm_min_epi8(__A, __B), |
| 997 | 962 | (__v16qi)_mm_setzero_si128()); |
| 998 | 963 | } |
| 999 | 964 | |
| 1000 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1001 | _mm_mask_min_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) | |
| 1002 | { | |
| 965 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 966 | _mm_mask_min_epi8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) { | |
| 1003 | 967 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 1004 | 968 | (__v16qi)_mm_min_epi8(__A, __B), |
| 1005 | 969 | (__v16qi)__W); |
| 1006 | 970 | } |
| 1007 | 971 | |
| 1008 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1009 | _mm256_maskz_min_epi8(__mmask32 __M, __m256i __A, __m256i __B) | |
| 1010 | { | |
| 972 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 973 | _mm256_maskz_min_epi8(__mmask32 __M, __m256i __A, __m256i __B) { | |
| 1011 | 974 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 1012 | 975 | (__v32qi)_mm256_min_epi8(__A, __B), |
| 1013 | 976 | (__v32qi)_mm256_setzero_si256()); |
| 1014 | 977 | } |
| 1015 | 978 | |
| 1016 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1017 | _mm256_mask_min_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) | |
| 1018 | { | |
| 979 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 980 | _mm256_mask_min_epi8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) { | |
| 1019 | 981 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 1020 | 982 | (__v32qi)_mm256_min_epi8(__A, __B), |
| 1021 | 983 | (__v32qi)__W); |
| 1022 | 984 | } |
| 1023 | 985 | |
| 1024 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1025 | _mm_maskz_min_epi16(__mmask8 __M, __m128i __A, __m128i __B) | |
| 1026 | { | |
| 986 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 987 | _mm_maskz_min_epi16(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 1027 | 988 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 1028 | 989 | (__v8hi)_mm_min_epi16(__A, __B), |
| 1029 | 990 | (__v8hi)_mm_setzero_si128()); |
| 1030 | 991 | } |
| 1031 | 992 | |
| 1032 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1033 | _mm_mask_min_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) | |
| 1034 | { | |
| 993 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 994 | _mm_mask_min_epi16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 1035 | 995 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 1036 | 996 | (__v8hi)_mm_min_epi16(__A, __B), |
| 1037 | 997 | (__v8hi)__W); |
| 1038 | 998 | } |
| 1039 | 999 | |
| 1040 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1041 | _mm256_maskz_min_epi16(__mmask16 __M, __m256i __A, __m256i __B) | |
| 1042 | { | |
| 1000 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1001 | _mm256_maskz_min_epi16(__mmask16 __M, __m256i __A, __m256i __B) { | |
| 1043 | 1002 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 1044 | 1003 | (__v16hi)_mm256_min_epi16(__A, __B), |
| 1045 | 1004 | (__v16hi)_mm256_setzero_si256()); |
| 1046 | 1005 | } |
| 1047 | 1006 | |
| 1048 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1049 | _mm256_mask_min_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) | |
| 1050 | { | |
| 1007 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1008 | _mm256_mask_min_epi16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) { | |
| 1051 | 1009 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 1052 | 1010 | (__v16hi)_mm256_min_epi16(__A, __B), |
| 1053 | 1011 | (__v16hi)__W); |
| 1054 | 1012 | } |
| 1055 | 1013 | |
| 1056 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1057 | _mm_maskz_min_epu8(__mmask16 __M, __m128i __A, __m128i __B) | |
| 1058 | { | |
| 1014 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1015 | _mm_maskz_min_epu8(__mmask16 __M, __m128i __A, __m128i __B) { | |
| 1059 | 1016 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 1060 | 1017 | (__v16qi)_mm_min_epu8(__A, __B), |
| 1061 | 1018 | (__v16qi)_mm_setzero_si128()); |
| 1062 | 1019 | } |
| 1063 | 1020 | |
| 1064 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1065 | _mm_mask_min_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) | |
| 1066 | { | |
| 1021 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1022 | _mm_mask_min_epu8(__m128i __W, __mmask16 __M, __m128i __A, __m128i __B) { | |
| 1067 | 1023 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 1068 | 1024 | (__v16qi)_mm_min_epu8(__A, __B), |
| 1069 | 1025 | (__v16qi)__W); |
| 1070 | 1026 | } |
| 1071 | 1027 | |
| 1072 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1073 | _mm256_maskz_min_epu8 (__mmask32 __M, __m256i __A, __m256i __B) | |
| 1074 | { | |
| 1028 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1029 | _mm256_maskz_min_epu8(__mmask32 __M, __m256i __A, __m256i __B) { | |
| 1075 | 1030 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 1076 | 1031 | (__v32qi)_mm256_min_epu8(__A, __B), |
| 1077 | 1032 | (__v32qi)_mm256_setzero_si256()); |
| 1078 | 1033 | } |
| 1079 | 1034 | |
| 1080 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1081 | _mm256_mask_min_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) | |
| 1082 | { | |
| 1035 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1036 | _mm256_mask_min_epu8(__m256i __W, __mmask32 __M, __m256i __A, __m256i __B) { | |
| 1083 | 1037 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__M, |
| 1084 | 1038 | (__v32qi)_mm256_min_epu8(__A, __B), |
| 1085 | 1039 | (__v32qi)__W); |
| 1086 | 1040 | } |
| 1087 | 1041 | |
| 1088 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1089 | _mm_maskz_min_epu16(__mmask8 __M, __m128i __A, __m128i __B) | |
| 1090 | { | |
| 1042 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1043 | _mm_maskz_min_epu16(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 1091 | 1044 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 1092 | 1045 | (__v8hi)_mm_min_epu16(__A, __B), |
| 1093 | 1046 | (__v8hi)_mm_setzero_si128()); |
| 1094 | 1047 | } |
| 1095 | 1048 | |
| 1096 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1097 | _mm_mask_min_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) | |
| 1098 | { | |
| 1049 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1050 | _mm_mask_min_epu16(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 1099 | 1051 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 1100 | 1052 | (__v8hi)_mm_min_epu16(__A, __B), |
| 1101 | 1053 | (__v8hi)__W); |
| 1102 | 1054 | } |
| 1103 | 1055 | |
| 1104 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1105 | _mm256_maskz_min_epu16(__mmask16 __M, __m256i __A, __m256i __B) | |
| 1106 | { | |
| 1056 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1057 | _mm256_maskz_min_epu16(__mmask16 __M, __m256i __A, __m256i __B) { | |
| 1107 | 1058 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 1108 | 1059 | (__v16hi)_mm256_min_epu16(__A, __B), |
| 1109 | 1060 | (__v16hi)_mm256_setzero_si256()); |
| 1110 | 1061 | } |
| 1111 | 1062 | |
| 1112 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1113 | _mm256_mask_min_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) | |
| 1114 | { | |
| 1063 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1064 | _mm256_mask_min_epu16(__m256i __W, __mmask16 __M, __m256i __A, __m256i __B) { | |
| 1115 | 1065 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 1116 | 1066 | (__v16hi)_mm256_min_epu16(__A, __B), |
| 1117 | 1067 | (__v16hi)__W); |
| 1118 | 1068 | } |
| 1119 | 1069 | |
| 1120 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1121 | _mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) | |
| 1122 | { | |
| 1070 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1071 | _mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { | |
| 1123 | 1072 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 1124 | 1073 | (__v16qi)_mm_shuffle_epi8(__A, __B), |
| 1125 | 1074 | (__v16qi)__W); |
| 1126 | 1075 | } |
| 1127 | 1076 | |
| 1128 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1129 | _mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B) | |
| 1130 | { | |
| 1077 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1078 | _mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B) { | |
| 1131 | 1079 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 1132 | 1080 | (__v16qi)_mm_shuffle_epi8(__A, __B), |
| 1133 | 1081 | (__v16qi)_mm_setzero_si128()); |
| 1134 | 1082 | } |
| 1135 | 1083 | |
| 1136 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1137 | _mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) | |
| 1138 | { | |
| 1084 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1085 | _mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { | |
| 1139 | 1086 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 1140 | 1087 | (__v32qi)_mm256_shuffle_epi8(__A, __B), |
| 1141 | 1088 | (__v32qi)__W); |
| 1142 | 1089 | } |
| 1143 | 1090 | |
| 1144 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1145 | _mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B) | |
| 1146 | { | |
| 1091 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1092 | _mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B) { | |
| 1147 | 1093 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 1148 | 1094 | (__v32qi)_mm256_shuffle_epi8(__A, __B), |
| 1149 | 1095 | (__v32qi)_mm256_setzero_si256()); |
| 1150 | 1096 | } |
| 1151 | 1097 | |
| 1152 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1098 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1153 | 1099 | _mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) |
| 1154 | 1100 | { |
| 1155 | 1101 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| ... | ... | @@ -1157,7 +1103,7 @@ _mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) |
| 1157 | 1103 | (__v16qi)__W); |
| 1158 | 1104 | } |
| 1159 | 1105 | |
| 1160 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1106 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1161 | 1107 | _mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B) |
| 1162 | 1108 | { |
| 1163 | 1109 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| ... | ... | @@ -1165,7 +1111,7 @@ _mm_maskz_subs_epi8(__mmask16 __U, __m128i __A, __m128i __B) |
| 1165 | 1111 | (__v16qi)_mm_setzero_si128()); |
| 1166 | 1112 | } |
| 1167 | 1113 | |
| 1168 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1114 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1169 | 1115 | _mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) |
| 1170 | 1116 | { |
| 1171 | 1117 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| ... | ... | @@ -1173,7 +1119,7 @@ _mm256_mask_subs_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) |
| 1173 | 1119 | (__v32qi)__W); |
| 1174 | 1120 | } |
| 1175 | 1121 | |
| 1176 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1122 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1177 | 1123 | _mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B) |
| 1178 | 1124 | { |
| 1179 | 1125 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| ... | ... | @@ -1181,7 +1127,7 @@ _mm256_maskz_subs_epi8(__mmask32 __U, __m256i __A, __m256i __B) |
| 1181 | 1127 | (__v32qi)_mm256_setzero_si256()); |
| 1182 | 1128 | } |
| 1183 | 1129 | |
| 1184 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1130 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1185 | 1131 | _mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 1186 | 1132 | { |
| 1187 | 1133 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1189,7 +1135,7 @@ _mm_mask_subs_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 1189 | 1135 | (__v8hi)__W); |
| 1190 | 1136 | } |
| 1191 | 1137 | |
| 1192 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1138 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1193 | 1139 | _mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B) |
| 1194 | 1140 | { |
| 1195 | 1141 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1197,7 +1143,7 @@ _mm_maskz_subs_epi16(__mmask8 __U, __m128i __A, __m128i __B) |
| 1197 | 1143 | (__v8hi)_mm_setzero_si128()); |
| 1198 | 1144 | } |
| 1199 | 1145 | |
| 1200 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1146 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1201 | 1147 | _mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 1202 | 1148 | { |
| 1203 | 1149 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1205,7 +1151,7 @@ _mm256_mask_subs_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 1205 | 1151 | (__v16hi)__W); |
| 1206 | 1152 | } |
| 1207 | 1153 | |
| 1208 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1154 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1209 | 1155 | _mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 1210 | 1156 | { |
| 1211 | 1157 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1213,7 +1159,7 @@ _mm256_maskz_subs_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 1213 | 1159 | (__v16hi)_mm256_setzero_si256()); |
| 1214 | 1160 | } |
| 1215 | 1161 | |
| 1216 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1162 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1217 | 1163 | _mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) |
| 1218 | 1164 | { |
| 1219 | 1165 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| ... | ... | @@ -1221,7 +1167,7 @@ _mm_mask_subs_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) |
| 1221 | 1167 | (__v16qi)__W); |
| 1222 | 1168 | } |
| 1223 | 1169 | |
| 1224 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1170 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1225 | 1171 | _mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B) |
| 1226 | 1172 | { |
| 1227 | 1173 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| ... | ... | @@ -1229,7 +1175,7 @@ _mm_maskz_subs_epu8(__mmask16 __U, __m128i __A, __m128i __B) |
| 1229 | 1175 | (__v16qi)_mm_setzero_si128()); |
| 1230 | 1176 | } |
| 1231 | 1177 | |
| 1232 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1178 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1233 | 1179 | _mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) |
| 1234 | 1180 | { |
| 1235 | 1181 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| ... | ... | @@ -1237,7 +1183,7 @@ _mm256_mask_subs_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) |
| 1237 | 1183 | (__v32qi)__W); |
| 1238 | 1184 | } |
| 1239 | 1185 | |
| 1240 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1186 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1241 | 1187 | _mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B) |
| 1242 | 1188 | { |
| 1243 | 1189 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| ... | ... | @@ -1245,7 +1191,7 @@ _mm256_maskz_subs_epu8(__mmask32 __U, __m256i __A, __m256i __B) |
| 1245 | 1191 | (__v32qi)_mm256_setzero_si256()); |
| 1246 | 1192 | } |
| 1247 | 1193 | |
| 1248 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1194 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1249 | 1195 | _mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 1250 | 1196 | { |
| 1251 | 1197 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1253,7 +1199,7 @@ _mm_mask_subs_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 1253 | 1199 | (__v8hi)__W); |
| 1254 | 1200 | } |
| 1255 | 1201 | |
| 1256 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1202 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1257 | 1203 | _mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B) |
| 1258 | 1204 | { |
| 1259 | 1205 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1261,7 +1207,7 @@ _mm_maskz_subs_epu16(__mmask8 __U, __m128i __A, __m128i __B) |
| 1261 | 1207 | (__v8hi)_mm_setzero_si128()); |
| 1262 | 1208 | } |
| 1263 | 1209 | |
| 1264 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1210 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1265 | 1211 | _mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A, |
| 1266 | 1212 | __m256i __B) { |
| 1267 | 1213 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1269,7 +1215,7 @@ _mm256_mask_subs_epu16(__m256i __W, __mmask16 __U, __m256i __A, |
| 1269 | 1215 | (__v16hi)__W); |
| 1270 | 1216 | } |
| 1271 | 1217 | |
| 1272 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1218 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1273 | 1219 | _mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B) |
| 1274 | 1220 | { |
| 1275 | 1221 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1277,89 +1223,81 @@ _mm256_maskz_subs_epu16(__mmask16 __U, __m256i __A, __m256i __B) |
| 1277 | 1223 | (__v16hi)_mm256_setzero_si256()); |
| 1278 | 1224 | } |
| 1279 | 1225 | |
| 1280 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1281 | _mm_permutex2var_epi16(__m128i __A, __m128i __I, __m128i __B) | |
| 1282 | { | |
| 1226 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1227 | _mm_permutex2var_epi16(__m128i __A, __m128i __I, __m128i __B) { | |
| 1283 | 1228 | return (__m128i)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I, |
| 1284 | 1229 | (__v8hi) __B); |
| 1285 | 1230 | } |
| 1286 | 1231 | |
| 1287 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1232 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1288 | 1233 | _mm_mask_permutex2var_epi16(__m128i __A, __mmask8 __U, __m128i __I, |
| 1289 | __m128i __B) | |
| 1290 | { | |
| 1234 | __m128i __B) { | |
| 1291 | 1235 | return (__m128i)__builtin_ia32_selectw_128(__U, |
| 1292 | 1236 | (__v8hi)_mm_permutex2var_epi16(__A, __I, __B), |
| 1293 | 1237 | (__v8hi)__A); |
| 1294 | 1238 | } |
| 1295 | 1239 | |
| 1296 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1240 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1297 | 1241 | _mm_mask2_permutex2var_epi16(__m128i __A, __m128i __I, __mmask8 __U, |
| 1298 | __m128i __B) | |
| 1299 | { | |
| 1242 | __m128i __B) { | |
| 1300 | 1243 | return (__m128i)__builtin_ia32_selectw_128(__U, |
| 1301 | 1244 | (__v8hi)_mm_permutex2var_epi16(__A, __I, __B), |
| 1302 | 1245 | (__v8hi)__I); |
| 1303 | 1246 | } |
| 1304 | 1247 | |
| 1305 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1306 | _mm_maskz_permutex2var_epi16 (__mmask8 __U, __m128i __A, __m128i __I, | |
| 1307 | __m128i __B) | |
| 1308 | { | |
| 1248 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1249 | _mm_maskz_permutex2var_epi16(__mmask8 __U, __m128i __A, __m128i __I, | |
| 1250 | __m128i __B) { | |
| 1309 | 1251 | return (__m128i)__builtin_ia32_selectw_128(__U, |
| 1310 | 1252 | (__v8hi)_mm_permutex2var_epi16(__A, __I, __B), |
| 1311 | 1253 | (__v8hi)_mm_setzero_si128()); |
| 1312 | 1254 | } |
| 1313 | 1255 | |
| 1314 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1315 | _mm256_permutex2var_epi16(__m256i __A, __m256i __I, __m256i __B) | |
| 1316 | { | |
| 1256 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1257 | _mm256_permutex2var_epi16(__m256i __A, __m256i __I, __m256i __B) { | |
| 1317 | 1258 | return (__m256i)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I, |
| 1318 | 1259 | (__v16hi)__B); |
| 1319 | 1260 | } |
| 1320 | 1261 | |
| 1321 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1262 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1322 | 1263 | _mm256_mask_permutex2var_epi16(__m256i __A, __mmask16 __U, __m256i __I, |
| 1323 | __m256i __B) | |
| 1324 | { | |
| 1264 | __m256i __B) { | |
| 1325 | 1265 | return (__m256i)__builtin_ia32_selectw_256(__U, |
| 1326 | 1266 | (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B), |
| 1327 | 1267 | (__v16hi)__A); |
| 1328 | 1268 | } |
| 1329 | 1269 | |
| 1330 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1270 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1331 | 1271 | _mm256_mask2_permutex2var_epi16(__m256i __A, __m256i __I, __mmask16 __U, |
| 1332 | __m256i __B) | |
| 1333 | { | |
| 1272 | __m256i __B) { | |
| 1334 | 1273 | return (__m256i)__builtin_ia32_selectw_256(__U, |
| 1335 | 1274 | (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B), |
| 1336 | 1275 | (__v16hi)__I); |
| 1337 | 1276 | } |
| 1338 | 1277 | |
| 1339 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1340 | _mm256_maskz_permutex2var_epi16 (__mmask16 __U, __m256i __A, __m256i __I, | |
| 1341 | __m256i __B) | |
| 1342 | { | |
| 1278 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1279 | _mm256_maskz_permutex2var_epi16(__mmask16 __U, __m256i __A, __m256i __I, | |
| 1280 | __m256i __B) { | |
| 1343 | 1281 | return (__m256i)__builtin_ia32_selectw_256(__U, |
| 1344 | 1282 | (__v16hi)_mm256_permutex2var_epi16(__A, __I, __B), |
| 1345 | 1283 | (__v16hi)_mm256_setzero_si256()); |
| 1346 | 1284 | } |
| 1347 | 1285 | |
| 1348 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1286 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1349 | 1287 | _mm_mask_maddubs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { |
| 1350 | 1288 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1351 | 1289 | (__v8hi)_mm_maddubs_epi16(__X, __Y), |
| 1352 | 1290 | (__v8hi)__W); |
| 1353 | 1291 | } |
| 1354 | 1292 | |
| 1355 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1293 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1356 | 1294 | _mm_maskz_maddubs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) { |
| 1357 | 1295 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1358 | 1296 | (__v8hi)_mm_maddubs_epi16(__X, __Y), |
| 1359 | 1297 | (__v8hi)_mm_setzero_si128()); |
| 1360 | 1298 | } |
| 1361 | 1299 | |
| 1362 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1300 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1363 | 1301 | _mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X, |
| 1364 | 1302 | __m256i __Y) { |
| 1365 | 1303 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1367,35 +1305,35 @@ _mm256_mask_maddubs_epi16(__m256i __W, __mmask16 __U, __m256i __X, |
| 1367 | 1305 | (__v16hi)__W); |
| 1368 | 1306 | } |
| 1369 | 1307 | |
| 1370 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1308 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1371 | 1309 | _mm256_maskz_maddubs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) { |
| 1372 | 1310 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1373 | 1311 | (__v16hi)_mm256_maddubs_epi16(__X, __Y), |
| 1374 | 1312 | (__v16hi)_mm256_setzero_si256()); |
| 1375 | 1313 | } |
| 1376 | 1314 | |
| 1377 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1315 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1378 | 1316 | _mm_mask_madd_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 1379 | 1317 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 1380 | 1318 | (__v4si)_mm_madd_epi16(__A, __B), |
| 1381 | 1319 | (__v4si)__W); |
| 1382 | 1320 | } |
| 1383 | 1321 | |
| 1384 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1322 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1385 | 1323 | _mm_maskz_madd_epi16(__mmask8 __U, __m128i __A, __m128i __B) { |
| 1386 | 1324 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 1387 | 1325 | (__v4si)_mm_madd_epi16(__A, __B), |
| 1388 | 1326 | (__v4si)_mm_setzero_si128()); |
| 1389 | 1327 | } |
| 1390 | 1328 | |
| 1391 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1329 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1392 | 1330 | _mm256_mask_madd_epi16(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { |
| 1393 | 1331 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 1394 | 1332 | (__v8si)_mm256_madd_epi16(__A, __B), |
| 1395 | 1333 | (__v8si)__W); |
| 1396 | 1334 | } |
| 1397 | 1335 | |
| 1398 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1336 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1399 | 1337 | _mm256_maskz_madd_epi16(__mmask8 __U, __m256i __A, __m256i __B) { |
| 1400 | 1338 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 1401 | 1339 | (__v8si)_mm256_madd_epi16(__A, __B), |
| ... | ... | @@ -1486,8 +1424,8 @@ _mm256_maskz_cvtusepi16_epi8 (__mmask16 __M, __m256i __A) { |
| 1486 | 1424 | __M); |
| 1487 | 1425 | } |
| 1488 | 1426 | |
| 1489 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1490 | _mm_cvtepi16_epi8 (__m128i __A) { | |
| 1427 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1428 | _mm_cvtepi16_epi8(__m128i __A) { | |
| 1491 | 1429 | return (__m128i)__builtin_shufflevector( |
| 1492 | 1430 | __builtin_convertvector((__v8hi)__A, __v8qi), |
| 1493 | 1431 | (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, |
| ... | ... | @@ -1527,20 +1465,20 @@ _mm_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) |
| 1527 | 1465 | __builtin_ia32_pmovuswb128mem_mask ((__v16qi *) __P, (__v8hi) __A, __M); |
| 1528 | 1466 | } |
| 1529 | 1467 | |
| 1530 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 1531 | _mm256_cvtepi16_epi8 (__m256i __A) { | |
| 1468 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1469 | _mm256_cvtepi16_epi8(__m256i __A) { | |
| 1532 | 1470 | return (__m128i)__builtin_convertvector((__v16hi) __A, __v16qi); |
| 1533 | 1471 | } |
| 1534 | 1472 | |
| 1535 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 1536 | _mm256_mask_cvtepi16_epi8 (__m128i __O, __mmask16 __M, __m256i __A) { | |
| 1473 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1474 | _mm256_mask_cvtepi16_epi8(__m128i __O, __mmask16 __M, __m256i __A) { | |
| 1537 | 1475 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 1538 | 1476 | (__v16qi)_mm256_cvtepi16_epi8(__A), |
| 1539 | 1477 | (__v16qi)__O); |
| 1540 | 1478 | } |
| 1541 | 1479 | |
| 1542 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 1543 | _mm256_maskz_cvtepi16_epi8 (__mmask16 __M, __m256i __A) { | |
| 1480 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1481 | _mm256_maskz_cvtepi16_epi8(__mmask16 __M, __m256i __A) { | |
| 1544 | 1482 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__M, |
| 1545 | 1483 | (__v16qi)_mm256_cvtepi16_epi8(__A), |
| 1546 | 1484 | (__v16qi)_mm_setzero_si128()); |
| ... | ... | @@ -1564,203 +1502,198 @@ _mm256_mask_cvtusepi16_storeu_epi8 (void * __P, __mmask16 __M, __m256i __A) |
| 1564 | 1502 | __builtin_ia32_pmovuswb256mem_mask ((__v16qi*) __P, (__v16hi) __A, __M); |
| 1565 | 1503 | } |
| 1566 | 1504 | |
| 1567 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1505 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1568 | 1506 | _mm_mask_mulhrs_epi16(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { |
| 1569 | 1507 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1570 | 1508 | (__v8hi)_mm_mulhrs_epi16(__X, __Y), |
| 1571 | 1509 | (__v8hi)__W); |
| 1572 | 1510 | } |
| 1573 | 1511 | |
| 1574 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1512 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1575 | 1513 | _mm_maskz_mulhrs_epi16(__mmask8 __U, __m128i __X, __m128i __Y) { |
| 1576 | 1514 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1577 | 1515 | (__v8hi)_mm_mulhrs_epi16(__X, __Y), |
| 1578 | 1516 | (__v8hi)_mm_setzero_si128()); |
| 1579 | 1517 | } |
| 1580 | 1518 | |
| 1581 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1519 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1582 | 1520 | _mm256_mask_mulhrs_epi16(__m256i __W, __mmask16 __U, __m256i __X, __m256i __Y) { |
| 1583 | 1521 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1584 | 1522 | (__v16hi)_mm256_mulhrs_epi16(__X, __Y), |
| 1585 | 1523 | (__v16hi)__W); |
| 1586 | 1524 | } |
| 1587 | 1525 | |
| 1588 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1526 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1589 | 1527 | _mm256_maskz_mulhrs_epi16(__mmask16 __U, __m256i __X, __m256i __Y) { |
| 1590 | 1528 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1591 | 1529 | (__v16hi)_mm256_mulhrs_epi16(__X, __Y), |
| 1592 | 1530 | (__v16hi)_mm256_setzero_si256()); |
| 1593 | 1531 | } |
| 1594 | 1532 | |
| 1595 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1533 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1596 | 1534 | _mm_mask_mulhi_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 1597 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, | |
| 1598 | (__v8hi)_mm_mulhi_epu16(__A, __B), | |
| 1599 | (__v8hi)__W); | |
| 1535 | return (__m128i)__builtin_ia32_selectw_128( | |
| 1536 | (__mmask8)__U, (__v8hi)_mm_mulhi_epu16(__A, __B), (__v8hi)__W); | |
| 1600 | 1537 | } |
| 1601 | 1538 | |
| 1602 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1539 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1603 | 1540 | _mm_maskz_mulhi_epu16(__mmask8 __U, __m128i __A, __m128i __B) { |
| 1604 | 1541 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1605 | 1542 | (__v8hi)_mm_mulhi_epu16(__A, __B), |
| 1606 | 1543 | (__v8hi)_mm_setzero_si128()); |
| 1607 | 1544 | } |
| 1608 | 1545 | |
| 1609 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1546 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1610 | 1547 | _mm256_mask_mulhi_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { |
| 1611 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, | |
| 1612 | (__v16hi)_mm256_mulhi_epu16(__A, __B), | |
| 1613 | (__v16hi)__W); | |
| 1548 | return (__m256i)__builtin_ia32_selectw_256( | |
| 1549 | (__mmask16)__U, (__v16hi)_mm256_mulhi_epu16(__A, __B), (__v16hi)__W); | |
| 1614 | 1550 | } |
| 1615 | 1551 | |
| 1616 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1552 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1617 | 1553 | _mm256_maskz_mulhi_epu16(__mmask16 __U, __m256i __A, __m256i __B) { |
| 1618 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, | |
| 1619 | (__v16hi)_mm256_mulhi_epu16(__A, __B), | |
| 1620 | (__v16hi)_mm256_setzero_si256()); | |
| 1554 | return (__m256i)__builtin_ia32_selectw_256( | |
| 1555 | (__mmask16)__U, (__v16hi)_mm256_mulhi_epu16(__A, __B), | |
| 1556 | (__v16hi)_mm256_setzero_si256()); | |
| 1621 | 1557 | } |
| 1622 | 1558 | |
| 1623 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1559 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1624 | 1560 | _mm_mask_mulhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 1625 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, | |
| 1626 | (__v8hi)_mm_mulhi_epi16(__A, __B), | |
| 1627 | (__v8hi)__W); | |
| 1561 | return (__m128i)__builtin_ia32_selectw_128( | |
| 1562 | (__mmask8)__U, (__v8hi)_mm_mulhi_epi16(__A, __B), (__v8hi)__W); | |
| 1628 | 1563 | } |
| 1629 | 1564 | |
| 1630 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1565 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1631 | 1566 | _mm_maskz_mulhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) { |
| 1632 | 1567 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1633 | 1568 | (__v8hi)_mm_mulhi_epi16(__A, __B), |
| 1634 | 1569 | (__v8hi)_mm_setzero_si128()); |
| 1635 | 1570 | } |
| 1636 | 1571 | |
| 1637 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1572 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1638 | 1573 | _mm256_mask_mulhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { |
| 1639 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, | |
| 1640 | (__v16hi)_mm256_mulhi_epi16(__A, __B), | |
| 1641 | (__v16hi)__W); | |
| 1574 | return (__m256i)__builtin_ia32_selectw_256( | |
| 1575 | (__mmask16)__U, (__v16hi)_mm256_mulhi_epi16(__A, __B), (__v16hi)__W); | |
| 1642 | 1576 | } |
| 1643 | 1577 | |
| 1644 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1578 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1645 | 1579 | _mm256_maskz_mulhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) { |
| 1646 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, | |
| 1647 | (__v16hi)_mm256_mulhi_epi16(__A, __B), | |
| 1648 | (__v16hi)_mm256_setzero_si256()); | |
| 1580 | return (__m256i)__builtin_ia32_selectw_256( | |
| 1581 | (__mmask16)__U, (__v16hi)_mm256_mulhi_epi16(__A, __B), | |
| 1582 | (__v16hi)_mm256_setzero_si256()); | |
| 1649 | 1583 | } |
| 1650 | 1584 | |
| 1651 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1585 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1652 | 1586 | _mm_mask_unpackhi_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { |
| 1653 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, | |
| 1654 | (__v16qi)_mm_unpackhi_epi8(__A, __B), | |
| 1655 | (__v16qi)__W); | |
| 1587 | return (__m128i)__builtin_ia32_selectb_128( | |
| 1588 | (__mmask16)__U, (__v16qi)_mm_unpackhi_epi8(__A, __B), (__v16qi)__W); | |
| 1656 | 1589 | } |
| 1657 | 1590 | |
| 1658 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1591 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1659 | 1592 | _mm_maskz_unpackhi_epi8(__mmask16 __U, __m128i __A, __m128i __B) { |
| 1660 | 1593 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 1661 | 1594 | (__v16qi)_mm_unpackhi_epi8(__A, __B), |
| 1662 | 1595 | (__v16qi)_mm_setzero_si128()); |
| 1663 | 1596 | } |
| 1664 | 1597 | |
| 1665 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1598 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1666 | 1599 | _mm256_mask_unpackhi_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { |
| 1667 | 1600 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 1668 | 1601 | (__v32qi)_mm256_unpackhi_epi8(__A, __B), |
| 1669 | 1602 | (__v32qi)__W); |
| 1670 | 1603 | } |
| 1671 | 1604 | |
| 1672 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1605 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1673 | 1606 | _mm256_maskz_unpackhi_epi8(__mmask32 __U, __m256i __A, __m256i __B) { |
| 1674 | 1607 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 1675 | 1608 | (__v32qi)_mm256_unpackhi_epi8(__A, __B), |
| 1676 | 1609 | (__v32qi)_mm256_setzero_si256()); |
| 1677 | 1610 | } |
| 1678 | 1611 | |
| 1679 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1612 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1680 | 1613 | _mm_mask_unpackhi_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 1681 | 1614 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1682 | 1615 | (__v8hi)_mm_unpackhi_epi16(__A, __B), |
| 1683 | 1616 | (__v8hi)__W); |
| 1684 | 1617 | } |
| 1685 | 1618 | |
| 1686 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1619 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1687 | 1620 | _mm_maskz_unpackhi_epi16(__mmask8 __U, __m128i __A, __m128i __B) { |
| 1688 | 1621 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1689 | 1622 | (__v8hi)_mm_unpackhi_epi16(__A, __B), |
| 1690 | 1623 | (__v8hi) _mm_setzero_si128()); |
| 1691 | 1624 | } |
| 1692 | 1625 | |
| 1693 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1626 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1694 | 1627 | _mm256_mask_unpackhi_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { |
| 1695 | 1628 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1696 | 1629 | (__v16hi)_mm256_unpackhi_epi16(__A, __B), |
| 1697 | 1630 | (__v16hi)__W); |
| 1698 | 1631 | } |
| 1699 | 1632 | |
| 1700 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1633 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1701 | 1634 | _mm256_maskz_unpackhi_epi16(__mmask16 __U, __m256i __A, __m256i __B) { |
| 1702 | 1635 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1703 | 1636 | (__v16hi)_mm256_unpackhi_epi16(__A, __B), |
| 1704 | 1637 | (__v16hi)_mm256_setzero_si256()); |
| 1705 | 1638 | } |
| 1706 | 1639 | |
| 1707 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1640 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1708 | 1641 | _mm_mask_unpacklo_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) { |
| 1709 | 1642 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 1710 | 1643 | (__v16qi)_mm_unpacklo_epi8(__A, __B), |
| 1711 | 1644 | (__v16qi)__W); |
| 1712 | 1645 | } |
| 1713 | 1646 | |
| 1714 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1647 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1715 | 1648 | _mm_maskz_unpacklo_epi8(__mmask16 __U, __m128i __A, __m128i __B) { |
| 1716 | 1649 | return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U, |
| 1717 | 1650 | (__v16qi)_mm_unpacklo_epi8(__A, __B), |
| 1718 | 1651 | (__v16qi)_mm_setzero_si128()); |
| 1719 | 1652 | } |
| 1720 | 1653 | |
| 1721 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1654 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1722 | 1655 | _mm256_mask_unpacklo_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) { |
| 1723 | 1656 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 1724 | 1657 | (__v32qi)_mm256_unpacklo_epi8(__A, __B), |
| 1725 | 1658 | (__v32qi)__W); |
| 1726 | 1659 | } |
| 1727 | 1660 | |
| 1728 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1661 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1729 | 1662 | _mm256_maskz_unpacklo_epi8(__mmask32 __U, __m256i __A, __m256i __B) { |
| 1730 | 1663 | return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U, |
| 1731 | 1664 | (__v32qi)_mm256_unpacklo_epi8(__A, __B), |
| 1732 | 1665 | (__v32qi)_mm256_setzero_si256()); |
| 1733 | 1666 | } |
| 1734 | 1667 | |
| 1735 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1668 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1736 | 1669 | _mm_mask_unpacklo_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 1737 | 1670 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1738 | 1671 | (__v8hi)_mm_unpacklo_epi16(__A, __B), |
| 1739 | 1672 | (__v8hi)__W); |
| 1740 | 1673 | } |
| 1741 | 1674 | |
| 1742 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1675 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1743 | 1676 | _mm_maskz_unpacklo_epi16(__mmask8 __U, __m128i __A, __m128i __B) { |
| 1744 | 1677 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 1745 | 1678 | (__v8hi)_mm_unpacklo_epi16(__A, __B), |
| 1746 | 1679 | (__v8hi) _mm_setzero_si128()); |
| 1747 | 1680 | } |
| 1748 | 1681 | |
| 1749 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1682 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1750 | 1683 | _mm256_mask_unpacklo_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) { |
| 1751 | 1684 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1752 | 1685 | (__v16hi)_mm256_unpacklo_epi16(__A, __B), |
| 1753 | 1686 | (__v16hi)__W); |
| 1754 | 1687 | } |
| 1755 | 1688 | |
| 1756 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1689 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1757 | 1690 | _mm256_maskz_unpacklo_epi16(__mmask16 __U, __m256i __A, __m256i __B) { |
| 1758 | 1691 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1759 | 1692 | (__v16hi)_mm256_unpacklo_epi16(__A, __B), |
| 1760 | 1693 | (__v16hi)_mm256_setzero_si256()); |
| 1761 | 1694 | } |
| 1762 | 1695 | |
| 1763 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1696 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1764 | 1697 | _mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A) |
| 1765 | 1698 | { |
| 1766 | 1699 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1768,7 +1701,7 @@ _mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A) |
| 1768 | 1701 | (__v8hi)__W); |
| 1769 | 1702 | } |
| 1770 | 1703 | |
| 1771 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1704 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1772 | 1705 | _mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A) |
| 1773 | 1706 | { |
| 1774 | 1707 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1776,7 +1709,7 @@ _mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A) |
| 1776 | 1709 | (__v8hi)_mm_setzero_si128()); |
| 1777 | 1710 | } |
| 1778 | 1711 | |
| 1779 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1712 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1780 | 1713 | _mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A) |
| 1781 | 1714 | { |
| 1782 | 1715 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1784,7 +1717,7 @@ _mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A) |
| 1784 | 1717 | (__v16hi)__W); |
| 1785 | 1718 | } |
| 1786 | 1719 | |
| 1787 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1720 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1788 | 1721 | _mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A) |
| 1789 | 1722 | { |
| 1790 | 1723 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1793,7 +1726,7 @@ _mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A) |
| 1793 | 1726 | } |
| 1794 | 1727 | |
| 1795 | 1728 | |
| 1796 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1729 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1797 | 1730 | _mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A) |
| 1798 | 1731 | { |
| 1799 | 1732 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1801,7 +1734,7 @@ _mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A) |
| 1801 | 1734 | (__v8hi)__W); |
| 1802 | 1735 | } |
| 1803 | 1736 | |
| 1804 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1737 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1805 | 1738 | _mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A) |
| 1806 | 1739 | { |
| 1807 | 1740 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1809,7 +1742,7 @@ _mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A) |
| 1809 | 1742 | (__v8hi)_mm_setzero_si128()); |
| 1810 | 1743 | } |
| 1811 | 1744 | |
| 1812 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1745 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1813 | 1746 | _mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A) |
| 1814 | 1747 | { |
| 1815 | 1748 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1817,7 +1750,7 @@ _mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A) |
| 1817 | 1750 | (__v16hi)__W); |
| 1818 | 1751 | } |
| 1819 | 1752 | |
| 1820 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1753 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1821 | 1754 | _mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A) |
| 1822 | 1755 | { |
| 1823 | 1756 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1868,13 +1801,13 @@ _mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A) |
| 1868 | 1801 | (imm)), \ |
| 1869 | 1802 | (__v16hi)_mm256_setzero_si256())) |
| 1870 | 1803 | |
| 1871 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1804 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1872 | 1805 | _mm256_sllv_epi16(__m256i __A, __m256i __B) |
| 1873 | 1806 | { |
| 1874 | 1807 | return (__m256i)__builtin_ia32_psllv16hi((__v16hi)__A, (__v16hi)__B); |
| 1875 | 1808 | } |
| 1876 | 1809 | |
| 1877 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1810 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1878 | 1811 | _mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 1879 | 1812 | { |
| 1880 | 1813 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1882,7 +1815,7 @@ _mm256_mask_sllv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 1882 | 1815 | (__v16hi)__W); |
| 1883 | 1816 | } |
| 1884 | 1817 | |
| 1885 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1818 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1886 | 1819 | _mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 1887 | 1820 | { |
| 1888 | 1821 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1890,13 +1823,13 @@ _mm256_maskz_sllv_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 1890 | 1823 | (__v16hi)_mm256_setzero_si256()); |
| 1891 | 1824 | } |
| 1892 | 1825 | |
| 1893 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1826 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1894 | 1827 | _mm_sllv_epi16(__m128i __A, __m128i __B) |
| 1895 | 1828 | { |
| 1896 | 1829 | return (__m128i)__builtin_ia32_psllv8hi((__v8hi)__A, (__v8hi)__B); |
| 1897 | 1830 | } |
| 1898 | 1831 | |
| 1899 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1832 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1900 | 1833 | _mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 1901 | 1834 | { |
| 1902 | 1835 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1904,7 +1837,7 @@ _mm_mask_sllv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 1904 | 1837 | (__v8hi)__W); |
| 1905 | 1838 | } |
| 1906 | 1839 | |
| 1907 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1840 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1908 | 1841 | _mm_maskz_sllv_epi16(__mmask8 __U, __m128i __A, __m128i __B) |
| 1909 | 1842 | { |
| 1910 | 1843 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1944,7 +1877,7 @@ _mm256_maskz_sll_epi16(__mmask16 __U, __m256i __A, __m128i __B) |
| 1944 | 1877 | (__v16hi)_mm256_setzero_si256()); |
| 1945 | 1878 | } |
| 1946 | 1879 | |
| 1947 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1880 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1948 | 1881 | _mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) |
| 1949 | 1882 | { |
| 1950 | 1883 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1952,7 +1885,7 @@ _mm_mask_slli_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) |
| 1952 | 1885 | (__v8hi)__W); |
| 1953 | 1886 | } |
| 1954 | 1887 | |
| 1955 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1888 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1956 | 1889 | _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B) |
| 1957 | 1890 | { |
| 1958 | 1891 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -1960,30 +1893,28 @@ _mm_maskz_slli_epi16 (__mmask8 __U, __m128i __A, unsigned int __B) |
| 1960 | 1893 | (__v8hi)_mm_setzero_si128()); |
| 1961 | 1894 | } |
| 1962 | 1895 | |
| 1963 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1896 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1964 | 1897 | _mm256_mask_slli_epi16(__m256i __W, __mmask16 __U, __m256i __A, |
| 1965 | unsigned int __B) | |
| 1966 | { | |
| 1898 | unsigned int __B) { | |
| 1967 | 1899 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1968 | 1900 | (__v16hi)_mm256_slli_epi16(__A, (int)__B), |
| 1969 | 1901 | (__v16hi)__W); |
| 1970 | 1902 | } |
| 1971 | 1903 | |
| 1972 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1973 | _mm256_maskz_slli_epi16(__mmask16 __U, __m256i __A, unsigned int __B) | |
| 1974 | { | |
| 1904 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1905 | _mm256_maskz_slli_epi16(__mmask16 __U, __m256i __A, unsigned int __B) { | |
| 1975 | 1906 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 1976 | 1907 | (__v16hi)_mm256_slli_epi16(__A, (int)__B), |
| 1977 | 1908 | (__v16hi)_mm256_setzero_si256()); |
| 1978 | 1909 | } |
| 1979 | 1910 | |
| 1980 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1911 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1981 | 1912 | _mm256_srlv_epi16(__m256i __A, __m256i __B) |
| 1982 | 1913 | { |
| 1983 | 1914 | return (__m256i)__builtin_ia32_psrlv16hi((__v16hi)__A, (__v16hi)__B); |
| 1984 | 1915 | } |
| 1985 | 1916 | |
| 1986 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1917 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1987 | 1918 | _mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 1988 | 1919 | { |
| 1989 | 1920 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1991,7 +1922,7 @@ _mm256_mask_srlv_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 1991 | 1922 | (__v16hi)__W); |
| 1992 | 1923 | } |
| 1993 | 1924 | |
| 1994 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1925 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1995 | 1926 | _mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 1996 | 1927 | { |
| 1997 | 1928 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -1999,13 +1930,13 @@ _mm256_maskz_srlv_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 1999 | 1930 | (__v16hi)_mm256_setzero_si256()); |
| 2000 | 1931 | } |
| 2001 | 1932 | |
| 2002 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1933 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2003 | 1934 | _mm_srlv_epi16(__m128i __A, __m128i __B) |
| 2004 | 1935 | { |
| 2005 | 1936 | return (__m128i)__builtin_ia32_psrlv8hi((__v8hi)__A, (__v8hi)__B); |
| 2006 | 1937 | } |
| 2007 | 1938 | |
| 2008 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1939 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2009 | 1940 | _mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 2010 | 1941 | { |
| 2011 | 1942 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -2013,7 +1944,7 @@ _mm_mask_srlv_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 2013 | 1944 | (__v8hi)__W); |
| 2014 | 1945 | } |
| 2015 | 1946 | |
| 2016 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1947 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2017 | 1948 | _mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B) |
| 2018 | 1949 | { |
| 2019 | 1950 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -2021,13 +1952,13 @@ _mm_maskz_srlv_epi16(__mmask8 __U, __m128i __A, __m128i __B) |
| 2021 | 1952 | (__v8hi)_mm_setzero_si128()); |
| 2022 | 1953 | } |
| 2023 | 1954 | |
| 2024 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1955 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2025 | 1956 | _mm256_srav_epi16(__m256i __A, __m256i __B) |
| 2026 | 1957 | { |
| 2027 | 1958 | return (__m256i)__builtin_ia32_psrav16hi((__v16hi)__A, (__v16hi)__B); |
| 2028 | 1959 | } |
| 2029 | 1960 | |
| 2030 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1961 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2031 | 1962 | _mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 2032 | 1963 | { |
| 2033 | 1964 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -2035,7 +1966,7 @@ _mm256_mask_srav_epi16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) |
| 2035 | 1966 | (__v16hi)__W); |
| 2036 | 1967 | } |
| 2037 | 1968 | |
| 2038 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1969 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2039 | 1970 | _mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 2040 | 1971 | { |
| 2041 | 1972 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| ... | ... | @@ -2043,13 +1974,13 @@ _mm256_maskz_srav_epi16(__mmask16 __U, __m256i __A, __m256i __B) |
| 2043 | 1974 | (__v16hi)_mm256_setzero_si256()); |
| 2044 | 1975 | } |
| 2045 | 1976 | |
| 2046 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1977 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2047 | 1978 | _mm_srav_epi16(__m128i __A, __m128i __B) |
| 2048 | 1979 | { |
| 2049 | 1980 | return (__m128i)__builtin_ia32_psrav8hi((__v8hi)__A, (__v8hi)__B); |
| 2050 | 1981 | } |
| 2051 | 1982 | |
| 2052 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1983 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2053 | 1984 | _mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 2054 | 1985 | { |
| 2055 | 1986 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -2057,7 +1988,7 @@ _mm_mask_srav_epi16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 2057 | 1988 | (__v8hi)__W); |
| 2058 | 1989 | } |
| 2059 | 1990 | |
| 2060 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1991 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2061 | 1992 | _mm_maskz_srav_epi16(__mmask8 __U, __m128i __A, __m128i __B) |
| 2062 | 1993 | { |
| 2063 | 1994 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| ... | ... | @@ -2097,34 +2028,30 @@ _mm256_maskz_sra_epi16(__mmask16 __U, __m256i __A, __m128i __B) |
| 2097 | 2028 | (__v16hi)_mm256_setzero_si256()); |
| 2098 | 2029 | } |
| 2099 | 2030 | |
| 2100 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2101 | _mm_mask_srai_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) | |
| 2102 | { | |
| 2031 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2032 | _mm_mask_srai_epi16(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { | |
| 2103 | 2033 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 2104 | 2034 | (__v8hi)_mm_srai_epi16(__A, (int)__B), |
| 2105 | 2035 | (__v8hi)__W); |
| 2106 | 2036 | } |
| 2107 | 2037 | |
| 2108 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2109 | _mm_maskz_srai_epi16(__mmask8 __U, __m128i __A, unsigned int __B) | |
| 2110 | { | |
| 2038 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2039 | _mm_maskz_srai_epi16(__mmask8 __U, __m128i __A, unsigned int __B) { | |
| 2111 | 2040 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 2112 | 2041 | (__v8hi)_mm_srai_epi16(__A, (int)__B), |
| 2113 | 2042 | (__v8hi)_mm_setzero_si128()); |
| 2114 | 2043 | } |
| 2115 | 2044 | |
| 2116 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2045 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2117 | 2046 | _mm256_mask_srai_epi16(__m256i __W, __mmask16 __U, __m256i __A, |
| 2118 | unsigned int __B) | |
| 2119 | { | |
| 2047 | unsigned int __B) { | |
| 2120 | 2048 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 2121 | 2049 | (__v16hi)_mm256_srai_epi16(__A, (int)__B), |
| 2122 | 2050 | (__v16hi)__W); |
| 2123 | 2051 | } |
| 2124 | 2052 | |
| 2125 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2126 | _mm256_maskz_srai_epi16(__mmask16 __U, __m256i __A, unsigned int __B) | |
| 2127 | { | |
| 2053 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2054 | _mm256_maskz_srai_epi16(__mmask16 __U, __m256i __A, unsigned int __B) { | |
| 2128 | 2055 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 2129 | 2056 | (__v16hi)_mm256_srai_epi16(__A, (int)__B), |
| 2130 | 2057 | (__v16hi)_mm256_setzero_si256()); |
| ... | ... | @@ -2162,104 +2089,91 @@ _mm256_maskz_srl_epi16(__mmask16 __U, __m256i __A, __m128i __B) |
| 2162 | 2089 | (__v16hi)_mm256_setzero_si256()); |
| 2163 | 2090 | } |
| 2164 | 2091 | |
| 2165 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2166 | _mm_mask_srli_epi16(__m128i __W, __mmask8 __U, __m128i __A, int __B) | |
| 2167 | { | |
| 2092 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2093 | _mm_mask_srli_epi16(__m128i __W, __mmask8 __U, __m128i __A, int __B) { | |
| 2168 | 2094 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 2169 | 2095 | (__v8hi)_mm_srli_epi16(__A, __B), |
| 2170 | 2096 | (__v8hi)__W); |
| 2171 | 2097 | } |
| 2172 | 2098 | |
| 2173 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2174 | _mm_maskz_srli_epi16 (__mmask8 __U, __m128i __A, int __B) | |
| 2175 | { | |
| 2099 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2100 | _mm_maskz_srli_epi16(__mmask8 __U, __m128i __A, int __B) { | |
| 2176 | 2101 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, |
| 2177 | 2102 | (__v8hi)_mm_srli_epi16(__A, __B), |
| 2178 | 2103 | (__v8hi)_mm_setzero_si128()); |
| 2179 | 2104 | } |
| 2180 | 2105 | |
| 2181 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2182 | _mm256_mask_srli_epi16(__m256i __W, __mmask16 __U, __m256i __A, int __B) | |
| 2183 | { | |
| 2106 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2107 | _mm256_mask_srli_epi16(__m256i __W, __mmask16 __U, __m256i __A, int __B) { | |
| 2184 | 2108 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 2185 | 2109 | (__v16hi)_mm256_srli_epi16(__A, __B), |
| 2186 | 2110 | (__v16hi)__W); |
| 2187 | 2111 | } |
| 2188 | 2112 | |
| 2189 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2190 | _mm256_maskz_srli_epi16(__mmask16 __U, __m256i __A, int __B) | |
| 2191 | { | |
| 2113 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2114 | _mm256_maskz_srli_epi16(__mmask16 __U, __m256i __A, int __B) { | |
| 2192 | 2115 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, |
| 2193 | 2116 | (__v16hi)_mm256_srli_epi16(__A, __B), |
| 2194 | 2117 | (__v16hi)_mm256_setzero_si256()); |
| 2195 | 2118 | } |
| 2196 | 2119 | |
| 2197 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2198 | _mm_mask_mov_epi16 (__m128i __W, __mmask8 __U, __m128i __A) | |
| 2199 | { | |
| 2120 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2121 | _mm_mask_mov_epi16(__m128i __W, __mmask8 __U, __m128i __A) { | |
| 2200 | 2122 | return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U, |
| 2201 | 2123 | (__v8hi) __A, |
| 2202 | 2124 | (__v8hi) __W); |
| 2203 | 2125 | } |
| 2204 | 2126 | |
| 2205 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2206 | _mm_maskz_mov_epi16 (__mmask8 __U, __m128i __A) | |
| 2207 | { | |
| 2127 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2128 | _mm_maskz_mov_epi16(__mmask8 __U, __m128i __A) { | |
| 2208 | 2129 | return (__m128i) __builtin_ia32_selectw_128 ((__mmask8) __U, |
| 2209 | 2130 | (__v8hi) __A, |
| 2210 | 2131 | (__v8hi) _mm_setzero_si128 ()); |
| 2211 | 2132 | } |
| 2212 | 2133 | |
| 2213 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2214 | _mm256_mask_mov_epi16 (__m256i __W, __mmask16 __U, __m256i __A) | |
| 2215 | { | |
| 2134 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2135 | _mm256_mask_mov_epi16(__m256i __W, __mmask16 __U, __m256i __A) { | |
| 2216 | 2136 | return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U, |
| 2217 | 2137 | (__v16hi) __A, |
| 2218 | 2138 | (__v16hi) __W); |
| 2219 | 2139 | } |
| 2220 | 2140 | |
| 2221 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2222 | _mm256_maskz_mov_epi16 (__mmask16 __U, __m256i __A) | |
| 2223 | { | |
| 2141 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2142 | _mm256_maskz_mov_epi16(__mmask16 __U, __m256i __A) { | |
| 2224 | 2143 | return (__m256i) __builtin_ia32_selectw_256 ((__mmask16) __U, |
| 2225 | 2144 | (__v16hi) __A, |
| 2226 | 2145 | (__v16hi) _mm256_setzero_si256 ()); |
| 2227 | 2146 | } |
| 2228 | 2147 | |
| 2229 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2230 | _mm_mask_mov_epi8 (__m128i __W, __mmask16 __U, __m128i __A) | |
| 2231 | { | |
| 2148 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2149 | _mm_mask_mov_epi8(__m128i __W, __mmask16 __U, __m128i __A) { | |
| 2232 | 2150 | return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U, |
| 2233 | 2151 | (__v16qi) __A, |
| 2234 | 2152 | (__v16qi) __W); |
| 2235 | 2153 | } |
| 2236 | 2154 | |
| 2237 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2238 | _mm_maskz_mov_epi8 (__mmask16 __U, __m128i __A) | |
| 2239 | { | |
| 2155 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2156 | _mm_maskz_mov_epi8(__mmask16 __U, __m128i __A) { | |
| 2240 | 2157 | return (__m128i) __builtin_ia32_selectb_128 ((__mmask16) __U, |
| 2241 | 2158 | (__v16qi) __A, |
| 2242 | 2159 | (__v16qi) _mm_setzero_si128 ()); |
| 2243 | 2160 | } |
| 2244 | 2161 | |
| 2245 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2246 | _mm256_mask_mov_epi8 (__m256i __W, __mmask32 __U, __m256i __A) | |
| 2247 | { | |
| 2162 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2163 | _mm256_mask_mov_epi8(__m256i __W, __mmask32 __U, __m256i __A) { | |
| 2248 | 2164 | return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U, |
| 2249 | 2165 | (__v32qi) __A, |
| 2250 | 2166 | (__v32qi) __W); |
| 2251 | 2167 | } |
| 2252 | 2168 | |
| 2253 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2254 | _mm256_maskz_mov_epi8 (__mmask32 __U, __m256i __A) | |
| 2255 | { | |
| 2169 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2170 | _mm256_maskz_mov_epi8(__mmask32 __U, __m256i __A) { | |
| 2256 | 2171 | return (__m256i) __builtin_ia32_selectb_256 ((__mmask32) __U, |
| 2257 | 2172 | (__v32qi) __A, |
| 2258 | 2173 | (__v32qi) _mm256_setzero_si256 ()); |
| 2259 | 2174 | } |
| 2260 | 2175 | |
| 2261 | ||
| 2262 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2176 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2263 | 2177 | _mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A) |
| 2264 | 2178 | { |
| 2265 | 2179 | return (__m128i) __builtin_ia32_selectb_128(__M, |
| ... | ... | @@ -2267,7 +2181,7 @@ _mm_mask_set1_epi8 (__m128i __O, __mmask16 __M, char __A) |
| 2267 | 2181 | (__v16qi) __O); |
| 2268 | 2182 | } |
| 2269 | 2183 | |
| 2270 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2184 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2271 | 2185 | _mm_maskz_set1_epi8 (__mmask16 __M, char __A) |
| 2272 | 2186 | { |
| 2273 | 2187 | return (__m128i) __builtin_ia32_selectb_128(__M, |
| ... | ... | @@ -2275,7 +2189,7 @@ _mm_maskz_set1_epi8 (__mmask16 __M, char __A) |
| 2275 | 2189 | (__v16qi) _mm_setzero_si128()); |
| 2276 | 2190 | } |
| 2277 | 2191 | |
| 2278 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2192 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2279 | 2193 | _mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A) |
| 2280 | 2194 | { |
| 2281 | 2195 | return (__m256i) __builtin_ia32_selectb_256(__M, |
| ... | ... | @@ -2283,7 +2197,7 @@ _mm256_mask_set1_epi8 (__m256i __O, __mmask32 __M, char __A) |
| 2283 | 2197 | (__v32qi) __O); |
| 2284 | 2198 | } |
| 2285 | 2199 | |
| 2286 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2200 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2287 | 2201 | _mm256_maskz_set1_epi8 (__mmask32 __M, char __A) |
| 2288 | 2202 | { |
| 2289 | 2203 | return (__m256i) __builtin_ia32_selectb_256(__M, |
| ... | ... | @@ -2463,22 +2377,19 @@ _mm256_mask_storeu_epi8 (void *__P, __mmask32 __U, __m256i __A) |
| 2463 | 2377 | (__mmask32) __U); |
| 2464 | 2378 | } |
| 2465 | 2379 | |
| 2466 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 | |
| 2467 | _mm_test_epi8_mask (__m128i __A, __m128i __B) | |
| 2468 | { | |
| 2380 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2381 | _mm_test_epi8_mask(__m128i __A, __m128i __B) { | |
| 2469 | 2382 | return _mm_cmpneq_epi8_mask (_mm_and_si128(__A, __B), _mm_setzero_si128()); |
| 2470 | 2383 | } |
| 2471 | 2384 | |
| 2472 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 | |
| 2473 | _mm_mask_test_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B) | |
| 2474 | { | |
| 2385 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2386 | _mm_mask_test_epi8_mask(__mmask16 __U, __m128i __A, __m128i __B) { | |
| 2475 | 2387 | return _mm_mask_cmpneq_epi8_mask (__U, _mm_and_si128 (__A, __B), |
| 2476 | 2388 | _mm_setzero_si128()); |
| 2477 | 2389 | } |
| 2478 | 2390 | |
| 2479 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 | |
| 2480 | _mm256_test_epi8_mask (__m256i __A, __m256i __B) | |
| 2481 | { | |
| 2391 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2392 | _mm256_test_epi8_mask(__m256i __A, __m256i __B) { | |
| 2482 | 2393 | return _mm256_cmpneq_epi8_mask (_mm256_and_si256(__A, __B), |
| 2483 | 2394 | _mm256_setzero_si256()); |
| 2484 | 2395 | } |
| ... | ... | @@ -2517,9 +2428,8 @@ _mm256_mask_test_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B) |
| 2517 | 2428 | _mm256_setzero_si256()); |
| 2518 | 2429 | } |
| 2519 | 2430 | |
| 2520 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 | |
| 2521 | _mm_testn_epi8_mask (__m128i __A, __m128i __B) | |
| 2522 | { | |
| 2431 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2432 | _mm_testn_epi8_mask(__m128i __A, __m128i __B) { | |
| 2523 | 2433 | return _mm_cmpeq_epi8_mask (_mm_and_si128 (__A, __B), _mm_setzero_si128()); |
| 2524 | 2434 | } |
| 2525 | 2435 | |
| ... | ... | @@ -2570,55 +2480,47 @@ _mm256_mask_testn_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B) |
| 2570 | 2480 | _mm256_setzero_si256()); |
| 2571 | 2481 | } |
| 2572 | 2482 | |
| 2573 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS128 | |
| 2574 | _mm_movepi8_mask (__m128i __A) | |
| 2575 | { | |
| 2483 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2484 | _mm_movepi8_mask(__m128i __A) { | |
| 2576 | 2485 | return (__mmask16) __builtin_ia32_cvtb2mask128 ((__v16qi) __A); |
| 2577 | 2486 | } |
| 2578 | 2487 | |
| 2579 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS256 | |
| 2580 | _mm256_movepi8_mask (__m256i __A) | |
| 2581 | { | |
| 2488 | static __inline__ __mmask32 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2489 | _mm256_movepi8_mask(__m256i __A) { | |
| 2582 | 2490 | return (__mmask32) __builtin_ia32_cvtb2mask256 ((__v32qi) __A); |
| 2583 | 2491 | } |
| 2584 | 2492 | |
| 2585 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 | |
| 2586 | _mm_movepi16_mask (__m128i __A) | |
| 2587 | { | |
| 2493 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2494 | _mm_movepi16_mask(__m128i __A) { | |
| 2588 | 2495 | return (__mmask8) __builtin_ia32_cvtw2mask128 ((__v8hi) __A); |
| 2589 | 2496 | } |
| 2590 | 2497 | |
| 2591 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS256 | |
| 2592 | _mm256_movepi16_mask (__m256i __A) | |
| 2593 | { | |
| 2498 | static __inline__ __mmask16 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2499 | _mm256_movepi16_mask(__m256i __A) { | |
| 2594 | 2500 | return (__mmask16) __builtin_ia32_cvtw2mask256 ((__v16hi) __A); |
| 2595 | 2501 | } |
| 2596 | 2502 | |
| 2597 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2598 | _mm_movm_epi8 (__mmask16 __A) | |
| 2599 | { | |
| 2503 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2504 | _mm_movm_epi8(__mmask16 __A) { | |
| 2600 | 2505 | return (__m128i) __builtin_ia32_cvtmask2b128 (__A); |
| 2601 | 2506 | } |
| 2602 | 2507 | |
| 2603 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2604 | _mm256_movm_epi8 (__mmask32 __A) | |
| 2605 | { | |
| 2508 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2509 | _mm256_movm_epi8(__mmask32 __A) { | |
| 2606 | 2510 | return (__m256i) __builtin_ia32_cvtmask2b256 (__A); |
| 2607 | 2511 | } |
| 2608 | 2512 | |
| 2609 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2610 | _mm_movm_epi16 (__mmask8 __A) | |
| 2611 | { | |
| 2513 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2514 | _mm_movm_epi16(__mmask8 __A) { | |
| 2612 | 2515 | return (__m128i) __builtin_ia32_cvtmask2w128 (__A); |
| 2613 | 2516 | } |
| 2614 | 2517 | |
| 2615 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2616 | _mm256_movm_epi16 (__mmask16 __A) | |
| 2617 | { | |
| 2518 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2519 | _mm256_movm_epi16(__mmask16 __A) { | |
| 2618 | 2520 | return (__m256i) __builtin_ia32_cvtmask2w256 (__A); |
| 2619 | 2521 | } |
| 2620 | 2522 | |
| 2621 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2523 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2622 | 2524 | _mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A) |
| 2623 | 2525 | { |
| 2624 | 2526 | return (__m128i)__builtin_ia32_selectb_128(__M, |
| ... | ... | @@ -2626,7 +2528,7 @@ _mm_mask_broadcastb_epi8 (__m128i __O, __mmask16 __M, __m128i __A) |
| 2626 | 2528 | (__v16qi) __O); |
| 2627 | 2529 | } |
| 2628 | 2530 | |
| 2629 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2531 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2630 | 2532 | _mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A) |
| 2631 | 2533 | { |
| 2632 | 2534 | return (__m128i)__builtin_ia32_selectb_128(__M, |
| ... | ... | @@ -2634,7 +2536,7 @@ _mm_maskz_broadcastb_epi8 (__mmask16 __M, __m128i __A) |
| 2634 | 2536 | (__v16qi) _mm_setzero_si128()); |
| 2635 | 2537 | } |
| 2636 | 2538 | |
| 2637 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2539 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2638 | 2540 | _mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A) |
| 2639 | 2541 | { |
| 2640 | 2542 | return (__m256i)__builtin_ia32_selectb_256(__M, |
| ... | ... | @@ -2642,7 +2544,7 @@ _mm256_mask_broadcastb_epi8 (__m256i __O, __mmask32 __M, __m128i __A) |
| 2642 | 2544 | (__v32qi) __O); |
| 2643 | 2545 | } |
| 2644 | 2546 | |
| 2645 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2547 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2646 | 2548 | _mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A) |
| 2647 | 2549 | { |
| 2648 | 2550 | return (__m256i)__builtin_ia32_selectb_256(__M, |
| ... | ... | @@ -2650,7 +2552,7 @@ _mm256_maskz_broadcastb_epi8 (__mmask32 __M, __m128i __A) |
| 2650 | 2552 | (__v32qi) _mm256_setzero_si256()); |
| 2651 | 2553 | } |
| 2652 | 2554 | |
| 2653 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2555 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2654 | 2556 | _mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A) |
| 2655 | 2557 | { |
| 2656 | 2558 | return (__m128i)__builtin_ia32_selectw_128(__M, |
| ... | ... | @@ -2658,7 +2560,7 @@ _mm_mask_broadcastw_epi16 (__m128i __O, __mmask8 __M, __m128i __A) |
| 2658 | 2560 | (__v8hi) __O); |
| 2659 | 2561 | } |
| 2660 | 2562 | |
| 2661 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2563 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2662 | 2564 | _mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A) |
| 2663 | 2565 | { |
| 2664 | 2566 | return (__m128i)__builtin_ia32_selectw_128(__M, |
| ... | ... | @@ -2666,7 +2568,7 @@ _mm_maskz_broadcastw_epi16 (__mmask8 __M, __m128i __A) |
| 2666 | 2568 | (__v8hi) _mm_setzero_si128()); |
| 2667 | 2569 | } |
| 2668 | 2570 | |
| 2669 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2571 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2670 | 2572 | _mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A) |
| 2671 | 2573 | { |
| 2672 | 2574 | return (__m256i)__builtin_ia32_selectw_256(__M, |
| ... | ... | @@ -2674,7 +2576,7 @@ _mm256_mask_broadcastw_epi16 (__m256i __O, __mmask16 __M, __m128i __A) |
| 2674 | 2576 | (__v16hi) __O); |
| 2675 | 2577 | } |
| 2676 | 2578 | |
| 2677 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2579 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2678 | 2580 | _mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A) |
| 2679 | 2581 | { |
| 2680 | 2582 | return (__m256i)__builtin_ia32_selectw_256(__M, |
| ... | ... | @@ -2682,7 +2584,7 @@ _mm256_maskz_broadcastw_epi16 (__mmask16 __M, __m128i __A) |
| 2682 | 2584 | (__v16hi) _mm256_setzero_si256()); |
| 2683 | 2585 | } |
| 2684 | 2586 | |
| 2685 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2587 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2686 | 2588 | _mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A) |
| 2687 | 2589 | { |
| 2688 | 2590 | return (__m256i) __builtin_ia32_selectw_256 (__M, |
| ... | ... | @@ -2690,7 +2592,7 @@ _mm256_mask_set1_epi16 (__m256i __O, __mmask16 __M, short __A) |
| 2690 | 2592 | (__v16hi) __O); |
| 2691 | 2593 | } |
| 2692 | 2594 | |
| 2693 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2595 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2694 | 2596 | _mm256_maskz_set1_epi16 (__mmask16 __M, short __A) |
| 2695 | 2597 | { |
| 2696 | 2598 | return (__m256i) __builtin_ia32_selectw_256(__M, |
| ... | ... | @@ -2698,7 +2600,7 @@ _mm256_maskz_set1_epi16 (__mmask16 __M, short __A) |
| 2698 | 2600 | (__v16hi) _mm256_setzero_si256()); |
| 2699 | 2601 | } |
| 2700 | 2602 | |
| 2701 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2603 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2702 | 2604 | _mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A) |
| 2703 | 2605 | { |
| 2704 | 2606 | return (__m128i) __builtin_ia32_selectw_128(__M, |
| ... | ... | @@ -2706,7 +2608,7 @@ _mm_mask_set1_epi16 (__m128i __O, __mmask8 __M, short __A) |
| 2706 | 2608 | (__v8hi) __O); |
| 2707 | 2609 | } |
| 2708 | 2610 | |
| 2709 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2611 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2710 | 2612 | _mm_maskz_set1_epi16 (__mmask8 __M, short __A) |
| 2711 | 2613 | { |
| 2712 | 2614 | return (__m128i) __builtin_ia32_selectw_128(__M, |
| ... | ... | @@ -2714,48 +2616,41 @@ _mm_maskz_set1_epi16 (__mmask8 __M, short __A) |
| 2714 | 2616 | (__v8hi) _mm_setzero_si128()); |
| 2715 | 2617 | } |
| 2716 | 2618 | |
| 2717 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2718 | _mm_permutexvar_epi16 (__m128i __A, __m128i __B) | |
| 2719 | { | |
| 2619 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2620 | _mm_permutexvar_epi16(__m128i __A, __m128i __B) { | |
| 2720 | 2621 | return (__m128i)__builtin_ia32_permvarhi128((__v8hi) __B, (__v8hi) __A); |
| 2721 | 2622 | } |
| 2722 | 2623 | |
| 2723 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2724 | _mm_maskz_permutexvar_epi16 (__mmask8 __M, __m128i __A, __m128i __B) | |
| 2725 | { | |
| 2624 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2625 | _mm_maskz_permutexvar_epi16(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 2726 | 2626 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 2727 | 2627 | (__v8hi)_mm_permutexvar_epi16(__A, __B), |
| 2728 | 2628 | (__v8hi) _mm_setzero_si128()); |
| 2729 | 2629 | } |
| 2730 | 2630 | |
| 2731 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2732 | _mm_mask_permutexvar_epi16 (__m128i __W, __mmask8 __M, __m128i __A, | |
| 2733 | __m128i __B) | |
| 2734 | { | |
| 2631 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2632 | _mm_mask_permutexvar_epi16(__m128i __W, __mmask8 __M, __m128i __A, | |
| 2633 | __m128i __B) { | |
| 2735 | 2634 | return (__m128i)__builtin_ia32_selectw_128((__mmask8)__M, |
| 2736 | 2635 | (__v8hi)_mm_permutexvar_epi16(__A, __B), |
| 2737 | 2636 | (__v8hi)__W); |
| 2738 | 2637 | } |
| 2739 | 2638 | |
| 2740 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2741 | _mm256_permutexvar_epi16 (__m256i __A, __m256i __B) | |
| 2742 | { | |
| 2639 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2640 | _mm256_permutexvar_epi16(__m256i __A, __m256i __B) { | |
| 2743 | 2641 | return (__m256i)__builtin_ia32_permvarhi256((__v16hi) __B, (__v16hi) __A); |
| 2744 | 2642 | } |
| 2745 | 2643 | |
| 2746 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2747 | _mm256_maskz_permutexvar_epi16 (__mmask16 __M, __m256i __A, | |
| 2748 | __m256i __B) | |
| 2749 | { | |
| 2644 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2645 | _mm256_maskz_permutexvar_epi16(__mmask16 __M, __m256i __A, __m256i __B) { | |
| 2750 | 2646 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 2751 | 2647 | (__v16hi)_mm256_permutexvar_epi16(__A, __B), |
| 2752 | 2648 | (__v16hi)_mm256_setzero_si256()); |
| 2753 | 2649 | } |
| 2754 | 2650 | |
| 2755 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2756 | _mm256_mask_permutexvar_epi16 (__m256i __W, __mmask16 __M, __m256i __A, | |
| 2757 | __m256i __B) | |
| 2758 | { | |
| 2651 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2652 | _mm256_mask_permutexvar_epi16(__m256i __W, __mmask16 __M, __m256i __A, | |
| 2653 | __m256i __B) { | |
| 2759 | 2654 | return (__m256i)__builtin_ia32_selectw_256((__mmask16)__M, |
| 2760 | 2655 | (__v16hi)_mm256_permutexvar_epi16(__A, __B), |
| 2761 | 2656 | (__v16hi)__W); |
| ... | ... | @@ -2809,353 +2704,353 @@ _mm256_mask_permutexvar_epi16 (__m256i __W, __mmask16 __M, __m256i __A, |
| 2809 | 2704 | (__v16hi)_mm256_dbsad_epu8((A), (B), (imm)), \ |
| 2810 | 2705 | (__v16hi)_mm256_setzero_si256())) |
| 2811 | 2706 | |
| 2812 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2707 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2813 | 2708 | _mm_reduce_add_epi16(__m128i __W) { |
| 2814 | 2709 | return __builtin_reduce_add((__v8hi)__W); |
| 2815 | 2710 | } |
| 2816 | 2711 | |
| 2817 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2712 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2818 | 2713 | _mm_reduce_mul_epi16(__m128i __W) { |
| 2819 | 2714 | return __builtin_reduce_mul((__v8hi)__W); |
| 2820 | 2715 | } |
| 2821 | 2716 | |
| 2822 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2717 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2823 | 2718 | _mm_reduce_and_epi16(__m128i __W) { |
| 2824 | 2719 | return __builtin_reduce_and((__v8hi)__W); |
| 2825 | 2720 | } |
| 2826 | 2721 | |
| 2827 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2722 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2828 | 2723 | _mm_reduce_or_epi16(__m128i __W) { |
| 2829 | 2724 | return __builtin_reduce_or((__v8hi)__W); |
| 2830 | 2725 | } |
| 2831 | 2726 | |
| 2832 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2833 | _mm_mask_reduce_add_epi16( __mmask8 __M, __m128i __W) { | |
| 2727 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2728 | _mm_mask_reduce_add_epi16(__mmask8 __M, __m128i __W) { | |
| 2834 | 2729 | __W = _mm_maskz_mov_epi16(__M, __W); |
| 2835 | 2730 | return __builtin_reduce_add((__v8hi)__W); |
| 2836 | 2731 | } |
| 2837 | 2732 | |
| 2838 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2839 | _mm_mask_reduce_mul_epi16( __mmask8 __M, __m128i __W) { | |
| 2733 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2734 | _mm_mask_reduce_mul_epi16(__mmask8 __M, __m128i __W) { | |
| 2840 | 2735 | __W = _mm_mask_mov_epi16(_mm_set1_epi16(1), __M, __W); |
| 2841 | 2736 | return __builtin_reduce_mul((__v8hi)__W); |
| 2842 | 2737 | } |
| 2843 | 2738 | |
| 2844 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2845 | _mm_mask_reduce_and_epi16( __mmask8 __M, __m128i __W) { | |
| 2739 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2740 | _mm_mask_reduce_and_epi16(__mmask8 __M, __m128i __W) { | |
| 2846 | 2741 | __W = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __W); |
| 2847 | 2742 | return __builtin_reduce_and((__v8hi)__W); |
| 2848 | 2743 | } |
| 2849 | 2744 | |
| 2850 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2745 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2851 | 2746 | _mm_mask_reduce_or_epi16(__mmask8 __M, __m128i __W) { |
| 2852 | 2747 | __W = _mm_maskz_mov_epi16(__M, __W); |
| 2853 | 2748 | return __builtin_reduce_or((__v8hi)__W); |
| 2854 | 2749 | } |
| 2855 | 2750 | |
| 2856 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2751 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2857 | 2752 | _mm_reduce_max_epi16(__m128i __V) { |
| 2858 | 2753 | return __builtin_reduce_max((__v8hi)__V); |
| 2859 | 2754 | } |
| 2860 | 2755 | |
| 2861 | static __inline__ unsigned short __DEFAULT_FN_ATTRS128 | |
| 2756 | static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2862 | 2757 | _mm_reduce_max_epu16(__m128i __V) { |
| 2863 | 2758 | return __builtin_reduce_max((__v8hu)__V); |
| 2864 | 2759 | } |
| 2865 | 2760 | |
| 2866 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2761 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2867 | 2762 | _mm_reduce_min_epi16(__m128i __V) { |
| 2868 | 2763 | return __builtin_reduce_min((__v8hi)__V); |
| 2869 | 2764 | } |
| 2870 | 2765 | |
| 2871 | static __inline__ unsigned short __DEFAULT_FN_ATTRS128 | |
| 2766 | static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2872 | 2767 | _mm_reduce_min_epu16(__m128i __V) { |
| 2873 | 2768 | return __builtin_reduce_min((__v8hu)__V); |
| 2874 | 2769 | } |
| 2875 | 2770 | |
| 2876 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2771 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2877 | 2772 | _mm_mask_reduce_max_epi16(__mmask16 __M, __m128i __V) { |
| 2878 | 2773 | __V = _mm_mask_mov_epi16(_mm_set1_epi16(-32767-1), __M, __V); |
| 2879 | 2774 | return __builtin_reduce_max((__v8hi)__V); |
| 2880 | 2775 | } |
| 2881 | 2776 | |
| 2882 | static __inline__ unsigned short __DEFAULT_FN_ATTRS128 | |
| 2777 | static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2883 | 2778 | _mm_mask_reduce_max_epu16(__mmask16 __M, __m128i __V) { |
| 2884 | 2779 | __V = _mm_maskz_mov_epi16(__M, __V); |
| 2885 | 2780 | return __builtin_reduce_max((__v8hu)__V); |
| 2886 | 2781 | } |
| 2887 | 2782 | |
| 2888 | static __inline__ short __DEFAULT_FN_ATTRS128 | |
| 2783 | static __inline__ short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2889 | 2784 | _mm_mask_reduce_min_epi16(__mmask16 __M, __m128i __V) { |
| 2890 | 2785 | __V = _mm_mask_mov_epi16(_mm_set1_epi16(32767), __M, __V); |
| 2891 | 2786 | return __builtin_reduce_min((__v8hi)__V); |
| 2892 | 2787 | } |
| 2893 | 2788 | |
| 2894 | static __inline__ unsigned short __DEFAULT_FN_ATTRS128 | |
| 2789 | static __inline__ unsigned short __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2895 | 2790 | _mm_mask_reduce_min_epu16(__mmask16 __M, __m128i __V) { |
| 2896 | 2791 | __V = _mm_mask_mov_epi16(_mm_set1_epi16(-1), __M, __V); |
| 2897 | 2792 | return __builtin_reduce_min((__v8hu)__V); |
| 2898 | 2793 | } |
| 2899 | 2794 | |
| 2900 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2795 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2901 | 2796 | _mm256_reduce_add_epi16(__m256i __W) { |
| 2902 | 2797 | return __builtin_reduce_add((__v16hi)__W); |
| 2903 | 2798 | } |
| 2904 | 2799 | |
| 2905 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2800 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2906 | 2801 | _mm256_reduce_mul_epi16(__m256i __W) { |
| 2907 | 2802 | return __builtin_reduce_mul((__v16hi)__W); |
| 2908 | 2803 | } |
| 2909 | 2804 | |
| 2910 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2805 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2911 | 2806 | _mm256_reduce_and_epi16(__m256i __W) { |
| 2912 | 2807 | return __builtin_reduce_and((__v16hi)__W); |
| 2913 | 2808 | } |
| 2914 | 2809 | |
| 2915 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2810 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2916 | 2811 | _mm256_reduce_or_epi16(__m256i __W) { |
| 2917 | 2812 | return __builtin_reduce_or((__v16hi)__W); |
| 2918 | 2813 | } |
| 2919 | 2814 | |
| 2920 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2921 | _mm256_mask_reduce_add_epi16( __mmask16 __M, __m256i __W) { | |
| 2815 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2816 | _mm256_mask_reduce_add_epi16(__mmask16 __M, __m256i __W) { | |
| 2922 | 2817 | __W = _mm256_maskz_mov_epi16(__M, __W); |
| 2923 | 2818 | return __builtin_reduce_add((__v16hi)__W); |
| 2924 | 2819 | } |
| 2925 | 2820 | |
| 2926 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2927 | _mm256_mask_reduce_mul_epi16( __mmask16 __M, __m256i __W) { | |
| 2821 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2822 | _mm256_mask_reduce_mul_epi16(__mmask16 __M, __m256i __W) { | |
| 2928 | 2823 | __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(1), __M, __W); |
| 2929 | 2824 | return __builtin_reduce_mul((__v16hi)__W); |
| 2930 | 2825 | } |
| 2931 | 2826 | |
| 2932 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2933 | _mm256_mask_reduce_and_epi16( __mmask16 __M, __m256i __W) { | |
| 2827 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2828 | _mm256_mask_reduce_and_epi16(__mmask16 __M, __m256i __W) { | |
| 2934 | 2829 | __W = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __W); |
| 2935 | 2830 | return __builtin_reduce_and((__v16hi)__W); |
| 2936 | 2831 | } |
| 2937 | 2832 | |
| 2938 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2833 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2939 | 2834 | _mm256_mask_reduce_or_epi16(__mmask16 __M, __m256i __W) { |
| 2940 | 2835 | __W = _mm256_maskz_mov_epi16(__M, __W); |
| 2941 | 2836 | return __builtin_reduce_or((__v16hi)__W); |
| 2942 | 2837 | } |
| 2943 | 2838 | |
| 2944 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2839 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2945 | 2840 | _mm256_reduce_max_epi16(__m256i __V) { |
| 2946 | 2841 | return __builtin_reduce_max((__v16hi)__V); |
| 2947 | 2842 | } |
| 2948 | 2843 | |
| 2949 | static __inline__ unsigned short __DEFAULT_FN_ATTRS256 | |
| 2844 | static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2950 | 2845 | _mm256_reduce_max_epu16(__m256i __V) { |
| 2951 | 2846 | return __builtin_reduce_max((__v16hu)__V); |
| 2952 | 2847 | } |
| 2953 | 2848 | |
| 2954 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2849 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2955 | 2850 | _mm256_reduce_min_epi16(__m256i __V) { |
| 2956 | 2851 | return __builtin_reduce_min((__v16hi)__V); |
| 2957 | 2852 | } |
| 2958 | 2853 | |
| 2959 | static __inline__ unsigned short __DEFAULT_FN_ATTRS256 | |
| 2854 | static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2960 | 2855 | _mm256_reduce_min_epu16(__m256i __V) { |
| 2961 | 2856 | return __builtin_reduce_min((__v16hu)__V); |
| 2962 | 2857 | } |
| 2963 | 2858 | |
| 2964 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2859 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2965 | 2860 | _mm256_mask_reduce_max_epi16(__mmask16 __M, __m256i __V) { |
| 2966 | 2861 | __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-32767-1), __M, __V); |
| 2967 | 2862 | return __builtin_reduce_max((__v16hi)__V); |
| 2968 | 2863 | } |
| 2969 | 2864 | |
| 2970 | static __inline__ unsigned short __DEFAULT_FN_ATTRS256 | |
| 2865 | static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2971 | 2866 | _mm256_mask_reduce_max_epu16(__mmask16 __M, __m256i __V) { |
| 2972 | 2867 | __V = _mm256_maskz_mov_epi16(__M, __V); |
| 2973 | 2868 | return __builtin_reduce_max((__v16hu)__V); |
| 2974 | 2869 | } |
| 2975 | 2870 | |
| 2976 | static __inline__ short __DEFAULT_FN_ATTRS256 | |
| 2871 | static __inline__ short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2977 | 2872 | _mm256_mask_reduce_min_epi16(__mmask16 __M, __m256i __V) { |
| 2978 | 2873 | __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(32767), __M, __V); |
| 2979 | 2874 | return __builtin_reduce_min((__v16hi)__V); |
| 2980 | 2875 | } |
| 2981 | 2876 | |
| 2982 | static __inline__ unsigned short __DEFAULT_FN_ATTRS256 | |
| 2877 | static __inline__ unsigned short __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2983 | 2878 | _mm256_mask_reduce_min_epu16(__mmask16 __M, __m256i __V) { |
| 2984 | 2879 | __V = _mm256_mask_mov_epi16(_mm256_set1_epi16(-1), __M, __V); |
| 2985 | 2880 | return __builtin_reduce_min((__v16hu)__V); |
| 2986 | 2881 | } |
| 2987 | 2882 | |
| 2988 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2883 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2989 | 2884 | _mm_reduce_add_epi8(__m128i __W) { |
| 2990 | 2885 | return __builtin_reduce_add((__v16qs)__W); |
| 2991 | 2886 | } |
| 2992 | 2887 | |
| 2993 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2888 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2994 | 2889 | _mm_reduce_mul_epi8(__m128i __W) { |
| 2995 | 2890 | return __builtin_reduce_mul((__v16qs)__W); |
| 2996 | 2891 | } |
| 2997 | 2892 | |
| 2998 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2893 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2999 | 2894 | _mm_reduce_and_epi8(__m128i __W) { |
| 3000 | 2895 | return __builtin_reduce_and((__v16qs)__W); |
| 3001 | 2896 | } |
| 3002 | 2897 | |
| 3003 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2898 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3004 | 2899 | _mm_reduce_or_epi8(__m128i __W) { |
| 3005 | 2900 | return __builtin_reduce_or((__v16qs)__W); |
| 3006 | 2901 | } |
| 3007 | 2902 | |
| 3008 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2903 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3009 | 2904 | _mm_mask_reduce_add_epi8(__mmask16 __M, __m128i __W) { |
| 3010 | 2905 | __W = _mm_maskz_mov_epi8(__M, __W); |
| 3011 | 2906 | return __builtin_reduce_add((__v16qs)__W); |
| 3012 | 2907 | } |
| 3013 | 2908 | |
| 3014 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2909 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3015 | 2910 | _mm_mask_reduce_mul_epi8(__mmask16 __M, __m128i __W) { |
| 3016 | 2911 | __W = _mm_mask_mov_epi8(_mm_set1_epi8(1), __M, __W); |
| 3017 | 2912 | return __builtin_reduce_mul((__v16qs)__W); |
| 3018 | 2913 | } |
| 3019 | 2914 | |
| 3020 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2915 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3021 | 2916 | _mm_mask_reduce_and_epi8(__mmask16 __M, __m128i __W) { |
| 3022 | 2917 | __W = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __W); |
| 3023 | 2918 | return __builtin_reduce_and((__v16qs)__W); |
| 3024 | 2919 | } |
| 3025 | 2920 | |
| 3026 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2921 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3027 | 2922 | _mm_mask_reduce_or_epi8(__mmask16 __M, __m128i __W) { |
| 3028 | 2923 | __W = _mm_maskz_mov_epi8(__M, __W); |
| 3029 | 2924 | return __builtin_reduce_or((__v16qs)__W); |
| 3030 | 2925 | } |
| 3031 | 2926 | |
| 3032 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2927 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3033 | 2928 | _mm_reduce_max_epi8(__m128i __V) { |
| 3034 | 2929 | return __builtin_reduce_max((__v16qs)__V); |
| 3035 | 2930 | } |
| 3036 | 2931 | |
| 3037 | static __inline__ unsigned char __DEFAULT_FN_ATTRS128 | |
| 2932 | static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3038 | 2933 | _mm_reduce_max_epu8(__m128i __V) { |
| 3039 | 2934 | return __builtin_reduce_max((__v16qu)__V); |
| 3040 | 2935 | } |
| 3041 | 2936 | |
| 3042 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2937 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3043 | 2938 | _mm_reduce_min_epi8(__m128i __V) { |
| 3044 | 2939 | return __builtin_reduce_min((__v16qs)__V); |
| 3045 | 2940 | } |
| 3046 | 2941 | |
| 3047 | static __inline__ unsigned char __DEFAULT_FN_ATTRS128 | |
| 2942 | static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3048 | 2943 | _mm_reduce_min_epu8(__m128i __V) { |
| 3049 | 2944 | return __builtin_reduce_min((__v16qu)__V); |
| 3050 | 2945 | } |
| 3051 | 2946 | |
| 3052 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2947 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3053 | 2948 | _mm_mask_reduce_max_epi8(__mmask16 __M, __m128i __V) { |
| 3054 | 2949 | __V = _mm_mask_mov_epi8(_mm_set1_epi8(-127-1), __M, __V); |
| 3055 | 2950 | return __builtin_reduce_max((__v16qs)__V); |
| 3056 | 2951 | } |
| 3057 | 2952 | |
| 3058 | static __inline__ unsigned char __DEFAULT_FN_ATTRS128 | |
| 2953 | static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3059 | 2954 | _mm_mask_reduce_max_epu8(__mmask16 __M, __m128i __V) { |
| 3060 | 2955 | __V = _mm_maskz_mov_epi8(__M, __V); |
| 3061 | 2956 | return __builtin_reduce_max((__v16qu)__V); |
| 3062 | 2957 | } |
| 3063 | 2958 | |
| 3064 | static __inline__ signed char __DEFAULT_FN_ATTRS128 | |
| 2959 | static __inline__ signed char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3065 | 2960 | _mm_mask_reduce_min_epi8(__mmask16 __M, __m128i __V) { |
| 3066 | 2961 | __V = _mm_mask_mov_epi8(_mm_set1_epi8(127), __M, __V); |
| 3067 | 2962 | return __builtin_reduce_min((__v16qs)__V); |
| 3068 | 2963 | } |
| 3069 | 2964 | |
| 3070 | static __inline__ unsigned char __DEFAULT_FN_ATTRS128 | |
| 2965 | static __inline__ unsigned char __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3071 | 2966 | _mm_mask_reduce_min_epu8(__mmask16 __M, __m128i __V) { |
| 3072 | 2967 | __V = _mm_mask_mov_epi8(_mm_set1_epi8(-1), __M, __V); |
| 3073 | 2968 | return __builtin_reduce_min((__v16qu)__V); |
| 3074 | 2969 | } |
| 3075 | 2970 | |
| 3076 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 2971 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3077 | 2972 | _mm256_reduce_add_epi8(__m256i __W) { |
| 3078 | 2973 | return __builtin_reduce_add((__v32qs)__W); |
| 3079 | 2974 | } |
| 3080 | 2975 | |
| 3081 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 2976 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3082 | 2977 | _mm256_reduce_mul_epi8(__m256i __W) { |
| 3083 | 2978 | return __builtin_reduce_mul((__v32qs)__W); |
| 3084 | 2979 | } |
| 3085 | 2980 | |
| 3086 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 2981 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3087 | 2982 | _mm256_reduce_and_epi8(__m256i __W) { |
| 3088 | 2983 | return __builtin_reduce_and((__v32qs)__W); |
| 3089 | 2984 | } |
| 3090 | 2985 | |
| 3091 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 2986 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3092 | 2987 | _mm256_reduce_or_epi8(__m256i __W) { |
| 3093 | 2988 | return __builtin_reduce_or((__v32qs)__W); |
| 3094 | 2989 | } |
| 3095 | 2990 | |
| 3096 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 2991 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3097 | 2992 | _mm256_mask_reduce_add_epi8(__mmask32 __M, __m256i __W) { |
| 3098 | 2993 | __W = _mm256_maskz_mov_epi8(__M, __W); |
| 3099 | 2994 | return __builtin_reduce_add((__v32qs)__W); |
| 3100 | 2995 | } |
| 3101 | 2996 | |
| 3102 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 2997 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3103 | 2998 | _mm256_mask_reduce_mul_epi8(__mmask32 __M, __m256i __W) { |
| 3104 | 2999 | __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(1), __M, __W); |
| 3105 | 3000 | return __builtin_reduce_mul((__v32qs)__W); |
| 3106 | 3001 | } |
| 3107 | 3002 | |
| 3108 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 3003 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3109 | 3004 | _mm256_mask_reduce_and_epi8(__mmask32 __M, __m256i __W) { |
| 3110 | 3005 | __W = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __W); |
| 3111 | 3006 | return __builtin_reduce_and((__v32qs)__W); |
| 3112 | 3007 | } |
| 3113 | 3008 | |
| 3114 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 3009 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3115 | 3010 | _mm256_mask_reduce_or_epi8(__mmask32 __M, __m256i __W) { |
| 3116 | 3011 | __W = _mm256_maskz_mov_epi8(__M, __W); |
| 3117 | 3012 | return __builtin_reduce_or((__v32qs)__W); |
| 3118 | 3013 | } |
| 3119 | 3014 | |
| 3120 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 3015 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3121 | 3016 | _mm256_reduce_max_epi8(__m256i __V) { |
| 3122 | 3017 | return __builtin_reduce_max((__v32qs)__V); |
| 3123 | 3018 | } |
| 3124 | 3019 | |
| 3125 | static __inline__ unsigned char __DEFAULT_FN_ATTRS256 | |
| 3020 | static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3126 | 3021 | _mm256_reduce_max_epu8(__m256i __V) { |
| 3127 | 3022 | return __builtin_reduce_max((__v32qu)__V); |
| 3128 | 3023 | } |
| 3129 | 3024 | |
| 3130 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 3025 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3131 | 3026 | _mm256_reduce_min_epi8(__m256i __V) { |
| 3132 | 3027 | return __builtin_reduce_min((__v32qs)__V); |
| 3133 | 3028 | } |
| 3134 | 3029 | |
| 3135 | static __inline__ unsigned char __DEFAULT_FN_ATTRS256 | |
| 3030 | static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3136 | 3031 | _mm256_reduce_min_epu8(__m256i __V) { |
| 3137 | 3032 | return __builtin_reduce_min((__v32qu)__V); |
| 3138 | 3033 | } |
| 3139 | 3034 | |
| 3140 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 3035 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3141 | 3036 | _mm256_mask_reduce_max_epi8(__mmask32 __M, __m256i __V) { |
| 3142 | 3037 | __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-127-1), __M, __V); |
| 3143 | 3038 | return __builtin_reduce_max((__v32qs)__V); |
| 3144 | 3039 | } |
| 3145 | 3040 | |
| 3146 | static __inline__ unsigned char __DEFAULT_FN_ATTRS256 | |
| 3041 | static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3147 | 3042 | _mm256_mask_reduce_max_epu8(__mmask32 __M, __m256i __V) { |
| 3148 | 3043 | __V = _mm256_maskz_mov_epi8(__M, __V); |
| 3149 | 3044 | return __builtin_reduce_max((__v32qu)__V); |
| 3150 | 3045 | } |
| 3151 | 3046 | |
| 3152 | static __inline__ signed char __DEFAULT_FN_ATTRS256 | |
| 3047 | static __inline__ signed char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3153 | 3048 | _mm256_mask_reduce_min_epi8(__mmask32 __M, __m256i __V) { |
| 3154 | 3049 | __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(127), __M, __V); |
| 3155 | 3050 | return __builtin_reduce_min((__v32qs)__V); |
| 3156 | 3051 | } |
| 3157 | 3052 | |
| 3158 | static __inline__ unsigned char __DEFAULT_FN_ATTRS256 | |
| 3053 | static __inline__ unsigned char __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3159 | 3054 | _mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) { |
| 3160 | 3055 | __V = _mm256_mask_mov_epi8(_mm256_set1_epi8(-1), __M, __V); |
| 3161 | 3056 | return __builtin_reduce_min((__v32qu)__V); |
| ... | ... | @@ -3163,5 +3058,7 @@ _mm256_mask_reduce_min_epu8(__mmask32 __M, __m256i __V) { |
| 3163 | 3058 | |
| 3164 | 3059 | #undef __DEFAULT_FN_ATTRS128 |
| 3165 | 3060 | #undef __DEFAULT_FN_ATTRS256 |
| 3061 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3062 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3166 | 3063 | |
| 3167 | 3064 | #endif /* __AVX512VLBWINTRIN_H */ |
lib/include/avx512vlcdintrin.h+74-102| ... | ... | @@ -14,211 +14,183 @@ |
| 14 | 14 | #define __AVX512VLCDINTRIN_H |
| 15 | 15 | |
| 16 | 16 | /* Define the default attributes for the functions in this file. */ |
| 17 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 17 | 18 | #define __DEFAULT_FN_ATTRS128 \ |
| 18 | 19 | __attribute__((__always_inline__, __nodebug__, \ |
| 19 | __target__("avx512vl,avx512cd,no-evex512"), \ | |
| 20 | __min_vector_width__(128))) | |
| 20 | __target__("avx512vl,avx512cd"), \ | |
| 21 | __min_vector_width__(128))) constexpr | |
| 21 | 22 | #define __DEFAULT_FN_ATTRS256 \ |
| 22 | 23 | __attribute__((__always_inline__, __nodebug__, \ |
| 23 | __target__("avx512vl,avx512cd,no-evex512"), \ | |
| 24 | __min_vector_width__(256))) | |
| 24 | __target__("avx512vl,avx512cd"), \ | |
| 25 | __min_vector_width__(256))) constexpr | |
| 26 | #else | |
| 27 | #define __DEFAULT_FN_ATTRS128 \ | |
| 28 | __attribute__((__always_inline__, __nodebug__, \ | |
| 29 | __target__("avx512vl,avx512cd"), __min_vector_width__(128))) | |
| 30 | #define __DEFAULT_FN_ATTRS256 \ | |
| 31 | __attribute__((__always_inline__, __nodebug__, \ | |
| 32 | __target__("avx512vl,avx512cd"), __min_vector_width__(256))) | |
| 33 | #endif | |
| 25 | 34 | |
| 26 | 35 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 27 | _mm_broadcastmb_epi64 (__mmask8 __A) | |
| 28 | { | |
| 36 | _mm_broadcastmb_epi64(__mmask8 __A) { | |
| 29 | 37 | return (__m128i) _mm_set1_epi64x((long long) __A); |
| 30 | 38 | } |
| 31 | 39 | |
| 32 | 40 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 33 | _mm256_broadcastmb_epi64 (__mmask8 __A) | |
| 34 | { | |
| 35 | return (__m256i) _mm256_set1_epi64x((long long)__A); | |
| 41 | _mm256_broadcastmb_epi64(__mmask8 __A) { | |
| 42 | return (__m256i)_mm256_set1_epi64x((long long)__A); | |
| 36 | 43 | } |
| 37 | 44 | |
| 38 | 45 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 39 | _mm_broadcastmw_epi32 (__mmask16 __A) | |
| 40 | { | |
| 46 | _mm_broadcastmw_epi32(__mmask16 __A) { | |
| 41 | 47 | return (__m128i) _mm_set1_epi32((int)__A); |
| 42 | 48 | } |
| 43 | 49 | |
| 44 | 50 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 45 | _mm256_broadcastmw_epi32 (__mmask16 __A) | |
| 46 | { | |
| 51 | _mm256_broadcastmw_epi32(__mmask16 __A) { | |
| 47 | 52 | return (__m256i) _mm256_set1_epi32((int)__A); |
| 48 | 53 | } |
| 49 | 54 | |
| 50 | ||
| 51 | 55 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 52 | _mm_conflict_epi64 (__m128i __A) | |
| 53 | { | |
| 54 | return (__m128i) __builtin_ia32_vpconflictdi_128 ((__v2di) __A); | |
| 56 | _mm_conflict_epi64(__m128i __A) { | |
| 57 | return (__m128i)__builtin_ia32_vpconflictdi_128((__v2di)__A); | |
| 55 | 58 | } |
| 56 | 59 | |
| 57 | 60 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 58 | _mm_mask_conflict_epi64 (__m128i __W, __mmask8 __U, __m128i __A) | |
| 59 | { | |
| 60 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, | |
| 61 | (__v2di)_mm_conflict_epi64(__A), | |
| 62 | (__v2di)__W); | |
| 61 | _mm_mask_conflict_epi64(__m128i __W, __mmask8 __U, __m128i __A) { | |
| 62 | return (__m128i)__builtin_ia32_selectq_128( | |
| 63 | (__mmask8)__U, (__v2di)_mm_conflict_epi64(__A), (__v2di)__W); | |
| 63 | 64 | } |
| 64 | 65 | |
| 65 | 66 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 66 | _mm_maskz_conflict_epi64 (__mmask8 __U, __m128i __A) | |
| 67 | { | |
| 67 | _mm_maskz_conflict_epi64(__mmask8 __U, __m128i __A) { | |
| 68 | 68 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 69 | 69 | (__v2di)_mm_conflict_epi64(__A), |
| 70 | 70 | (__v2di)_mm_setzero_si128()); |
| 71 | 71 | } |
| 72 | 72 | |
| 73 | 73 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 74 | _mm256_conflict_epi64 (__m256i __A) | |
| 75 | { | |
| 76 | return (__m256i) __builtin_ia32_vpconflictdi_256 ((__v4di) __A); | |
| 74 | _mm256_conflict_epi64(__m256i __A) { | |
| 75 | return (__m256i)__builtin_ia32_vpconflictdi_256((__v4di)__A); | |
| 77 | 76 | } |
| 78 | 77 | |
| 79 | 78 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 80 | _mm256_mask_conflict_epi64 (__m256i __W, __mmask8 __U, __m256i __A) | |
| 81 | { | |
| 82 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, | |
| 83 | (__v4di)_mm256_conflict_epi64(__A), | |
| 84 | (__v4di)__W); | |
| 79 | _mm256_mask_conflict_epi64(__m256i __W, __mmask8 __U, __m256i __A) { | |
| 80 | return (__m256i)__builtin_ia32_selectq_256( | |
| 81 | (__mmask8)__U, (__v4di)_mm256_conflict_epi64(__A), (__v4di)__W); | |
| 85 | 82 | } |
| 86 | 83 | |
| 87 | 84 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 88 | _mm256_maskz_conflict_epi64 (__mmask8 __U, __m256i __A) | |
| 89 | { | |
| 85 | _mm256_maskz_conflict_epi64(__mmask8 __U, __m256i __A) { | |
| 90 | 86 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 91 | 87 | (__v4di)_mm256_conflict_epi64(__A), |
| 92 | 88 | (__v4di)_mm256_setzero_si256()); |
| 93 | 89 | } |
| 94 | 90 | |
| 95 | 91 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 96 | _mm_conflict_epi32 (__m128i __A) | |
| 97 | { | |
| 98 | return (__m128i) __builtin_ia32_vpconflictsi_128 ((__v4si) __A); | |
| 92 | _mm_conflict_epi32(__m128i __A) { | |
| 93 | return (__m128i)__builtin_ia32_vpconflictsi_128((__v4si)__A); | |
| 99 | 94 | } |
| 100 | 95 | |
| 101 | 96 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 102 | _mm_mask_conflict_epi32 (__m128i __W, __mmask8 __U, __m128i __A) | |
| 103 | { | |
| 104 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, | |
| 105 | (__v4si)_mm_conflict_epi32(__A), | |
| 106 | (__v4si)__W); | |
| 97 | _mm_mask_conflict_epi32(__m128i __W, __mmask8 __U, __m128i __A) { | |
| 98 | return (__m128i)__builtin_ia32_selectd_128( | |
| 99 | (__mmask8)__U, (__v4si)_mm_conflict_epi32(__A), (__v4si)__W); | |
| 107 | 100 | } |
| 108 | 101 | |
| 109 | 102 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 110 | _mm_maskz_conflict_epi32 (__mmask8 __U, __m128i __A) | |
| 111 | { | |
| 103 | _mm_maskz_conflict_epi32(__mmask8 __U, __m128i __A) { | |
| 112 | 104 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 113 | 105 | (__v4si)_mm_conflict_epi32(__A), |
| 114 | 106 | (__v4si)_mm_setzero_si128()); |
| 115 | 107 | } |
| 116 | 108 | |
| 117 | 109 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 118 | _mm256_conflict_epi32 (__m256i __A) | |
| 119 | { | |
| 120 | return (__m256i) __builtin_ia32_vpconflictsi_256 ((__v8si) __A); | |
| 110 | _mm256_conflict_epi32(__m256i __A) { | |
| 111 | return (__m256i)__builtin_ia32_vpconflictsi_256((__v8si)__A); | |
| 121 | 112 | } |
| 122 | 113 | |
| 123 | 114 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 124 | _mm256_mask_conflict_epi32 (__m256i __W, __mmask8 __U, __m256i __A) | |
| 125 | { | |
| 126 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, | |
| 127 | (__v8si)_mm256_conflict_epi32(__A), | |
| 128 | (__v8si)__W); | |
| 115 | _mm256_mask_conflict_epi32(__m256i __W, __mmask8 __U, __m256i __A) { | |
| 116 | return (__m256i)__builtin_ia32_selectd_256( | |
| 117 | (__mmask8)__U, (__v8si)_mm256_conflict_epi32(__A), (__v8si)__W); | |
| 129 | 118 | } |
| 130 | 119 | |
| 131 | 120 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 132 | _mm256_maskz_conflict_epi32 (__mmask8 __U, __m256i __A) | |
| 133 | { | |
| 121 | _mm256_maskz_conflict_epi32(__mmask8 __U, __m256i __A) { | |
| 134 | 122 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 135 | 123 | (__v8si)_mm256_conflict_epi32(__A), |
| 136 | 124 | (__v8si)_mm256_setzero_si256()); |
| 137 | 125 | } |
| 138 | 126 | |
| 139 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 140 | _mm_lzcnt_epi32 (__m128i __A) | |
| 141 | { | |
| 142 | return (__m128i) __builtin_ia32_vplzcntd_128 ((__v4si) __A); | |
| 127 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_lzcnt_epi32(__m128i __A) { | |
| 128 | return (__m128i)__builtin_elementwise_clzg((__v4si)__A, | |
| 129 | (__v4si)_mm_set1_epi32(32)); | |
| 143 | 130 | } |
| 144 | 131 | |
| 145 | 132 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 146 | _mm_mask_lzcnt_epi32 (__m128i __W, __mmask8 __U, __m128i __A) | |
| 147 | { | |
| 148 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, | |
| 149 | (__v4si)_mm_lzcnt_epi32(__A), | |
| 150 | (__v4si)__W); | |
| 133 | _mm_mask_lzcnt_epi32(__m128i __W, __mmask8 __U, __m128i __A) { | |
| 134 | return (__m128i)__builtin_ia32_selectd_128( | |
| 135 | (__mmask8)__U, (__v4si)_mm_lzcnt_epi32(__A), (__v4si)__W); | |
| 151 | 136 | } |
| 152 | 137 | |
| 153 | 138 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 154 | _mm_maskz_lzcnt_epi32 (__mmask8 __U, __m128i __A) | |
| 155 | { | |
| 156 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, | |
| 157 | (__v4si)_mm_lzcnt_epi32(__A), | |
| 158 | (__v4si)_mm_setzero_si128()); | |
| 139 | _mm_maskz_lzcnt_epi32(__mmask8 __U, __m128i __A) { | |
| 140 | return (__m128i)__builtin_ia32_selectd_128( | |
| 141 | (__mmask8)__U, (__v4si)_mm_lzcnt_epi32(__A), (__v4si)_mm_setzero_si128()); | |
| 159 | 142 | } |
| 160 | 143 | |
| 161 | 144 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 162 | _mm256_lzcnt_epi32 (__m256i __A) | |
| 163 | { | |
| 164 | return (__m256i) __builtin_ia32_vplzcntd_256 ((__v8si) __A); | |
| 145 | _mm256_lzcnt_epi32(__m256i __A) { | |
| 146 | return (__m256i)__builtin_elementwise_clzg((__v8si)__A, | |
| 147 | (__v8si)_mm256_set1_epi32(32)); | |
| 165 | 148 | } |
| 166 | 149 | |
| 167 | 150 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 168 | _mm256_mask_lzcnt_epi32 (__m256i __W, __mmask8 __U, __m256i __A) | |
| 169 | { | |
| 170 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, | |
| 171 | (__v8si)_mm256_lzcnt_epi32(__A), | |
| 172 | (__v8si)__W); | |
| 151 | _mm256_mask_lzcnt_epi32(__m256i __W, __mmask8 __U, __m256i __A) { | |
| 152 | return (__m256i)__builtin_ia32_selectd_256( | |
| 153 | (__mmask8)__U, (__v8si)_mm256_lzcnt_epi32(__A), (__v8si)__W); | |
| 173 | 154 | } |
| 174 | 155 | |
| 175 | 156 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 176 | _mm256_maskz_lzcnt_epi32 (__mmask8 __U, __m256i __A) | |
| 177 | { | |
| 157 | _mm256_maskz_lzcnt_epi32(__mmask8 __U, __m256i __A) { | |
| 178 | 158 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 179 | 159 | (__v8si)_mm256_lzcnt_epi32(__A), |
| 180 | 160 | (__v8si)_mm256_setzero_si256()); |
| 181 | 161 | } |
| 182 | 162 | |
| 183 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 184 | _mm_lzcnt_epi64 (__m128i __A) | |
| 185 | { | |
| 186 | return (__m128i) __builtin_ia32_vplzcntq_128 ((__v2di) __A); | |
| 163 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_lzcnt_epi64(__m128i __A) { | |
| 164 | return (__m128i)__builtin_elementwise_clzg( | |
| 165 | (__v2di)__A, (__v2di)_mm_set1_epi64x((long long)64)); | |
| 187 | 166 | } |
| 188 | 167 | |
| 189 | 168 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 190 | _mm_mask_lzcnt_epi64 (__m128i __W, __mmask8 __U, __m128i __A) | |
| 191 | { | |
| 192 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, | |
| 193 | (__v2di)_mm_lzcnt_epi64(__A), | |
| 194 | (__v2di)__W); | |
| 169 | _mm_mask_lzcnt_epi64(__m128i __W, __mmask8 __U, __m128i __A) { | |
| 170 | return (__m128i)__builtin_ia32_selectq_128( | |
| 171 | (__mmask8)__U, (__v2di)_mm_lzcnt_epi64(__A), (__v2di)__W); | |
| 195 | 172 | } |
| 196 | 173 | |
| 197 | 174 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 198 | _mm_maskz_lzcnt_epi64 (__mmask8 __U, __m128i __A) | |
| 199 | { | |
| 200 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, | |
| 201 | (__v2di)_mm_lzcnt_epi64(__A), | |
| 202 | (__v2di)_mm_setzero_si128()); | |
| 175 | _mm_maskz_lzcnt_epi64(__mmask8 __U, __m128i __A) { | |
| 176 | return (__m128i)__builtin_ia32_selectq_128( | |
| 177 | (__mmask8)__U, (__v2di)_mm_lzcnt_epi64(__A), (__v2di)_mm_setzero_si128()); | |
| 203 | 178 | } |
| 204 | 179 | |
| 205 | 180 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 206 | _mm256_lzcnt_epi64 (__m256i __A) | |
| 207 | { | |
| 208 | return (__m256i) __builtin_ia32_vplzcntq_256 ((__v4di) __A); | |
| 181 | _mm256_lzcnt_epi64(__m256i __A) { | |
| 182 | return (__m256i)__builtin_elementwise_clzg( | |
| 183 | (__v4di)__A, (__v4di)_mm256_set1_epi64x((long long)64)); | |
| 209 | 184 | } |
| 210 | 185 | |
| 211 | 186 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 212 | _mm256_mask_lzcnt_epi64 (__m256i __W, __mmask8 __U, __m256i __A) | |
| 213 | { | |
| 214 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, | |
| 215 | (__v4di)_mm256_lzcnt_epi64(__A), | |
| 216 | (__v4di)__W); | |
| 187 | _mm256_mask_lzcnt_epi64(__m256i __W, __mmask8 __U, __m256i __A) { | |
| 188 | return (__m256i)__builtin_ia32_selectq_256( | |
| 189 | (__mmask8)__U, (__v4di)_mm256_lzcnt_epi64(__A), (__v4di)__W); | |
| 217 | 190 | } |
| 218 | 191 | |
| 219 | 192 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 220 | _mm256_maskz_lzcnt_epi64 (__mmask8 __U, __m256i __A) | |
| 221 | { | |
| 193 | _mm256_maskz_lzcnt_epi64(__mmask8 __U, __m256i __A) { | |
| 222 | 194 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 223 | 195 | (__v4di)_mm256_lzcnt_epi64(__A), |
| 224 | 196 | (__v4di)_mm256_setzero_si256()); |
lib/include/avx512vldqintrin.h+110-127| ... | ... | @@ -17,45 +17,51 @@ |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | 18 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 19 | __attribute__((__always_inline__, __nodebug__, \ |
| 20 | __target__("avx512vl,avx512dq,no-evex512"), \ | |
| 21 | __min_vector_width__(128))) | |
| 20 | __target__("avx512vl,avx512dq"), __min_vector_width__(128))) | |
| 22 | 21 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | 22 | __attribute__((__always_inline__, __nodebug__, \ |
| 24 | __target__("avx512vl,avx512dq,no-evex512"), \ | |
| 25 | __min_vector_width__(256))) | |
| 23 | __target__("avx512vl,avx512dq"), __min_vector_width__(256))) | |
| 24 | ||
| 25 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 26 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 27 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 28 | #else | |
| 29 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 30 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 31 | #endif | |
| 26 | 32 | |
| 27 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 28 | _mm256_mullo_epi64 (__m256i __A, __m256i __B) { | |
| 33 | static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 34 | _mm256_mullo_epi64(__m256i __A, __m256i __B) { | |
| 29 | 35 | return (__m256i) ((__v4du) __A * (__v4du) __B); |
| 30 | 36 | } |
| 31 | 37 | |
| 32 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 38 | static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 33 | 39 | _mm256_mask_mullo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { |
| 34 | 40 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 35 | 41 | (__v4di)_mm256_mullo_epi64(__A, __B), |
| 36 | 42 | (__v4di)__W); |
| 37 | 43 | } |
| 38 | 44 | |
| 39 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 45 | static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 40 | 46 | _mm256_maskz_mullo_epi64(__mmask8 __U, __m256i __A, __m256i __B) { |
| 41 | 47 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 42 | 48 | (__v4di)_mm256_mullo_epi64(__A, __B), |
| 43 | 49 | (__v4di)_mm256_setzero_si256()); |
| 44 | 50 | } |
| 45 | 51 | |
| 46 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 47 | _mm_mullo_epi64 (__m128i __A, __m128i __B) { | |
| 52 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 53 | _mm_mullo_epi64(__m128i __A, __m128i __B) { | |
| 48 | 54 | return (__m128i) ((__v2du) __A * (__v2du) __B); |
| 49 | 55 | } |
| 50 | 56 | |
| 51 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 57 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 52 | 58 | _mm_mask_mullo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { |
| 53 | 59 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 54 | 60 | (__v2di)_mm_mullo_epi64(__A, __B), |
| 55 | 61 | (__v2di)__W); |
| 56 | 62 | } |
| 57 | 63 | |
| 58 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 64 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 59 | 65 | _mm_maskz_mullo_epi64(__mmask8 __U, __m128i __A, __m128i __B) { |
| 60 | 66 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 61 | 67 | (__v2di)_mm_mullo_epi64(__A, __B), |
| ... | ... | @@ -454,39 +460,39 @@ _mm256_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A) { |
| 454 | 460 | (__mmask8) __U); |
| 455 | 461 | } |
| 456 | 462 | |
| 457 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 458 | _mm_cvtepi64_pd (__m128i __A) { | |
| 463 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 464 | _mm_cvtepi64_pd(__m128i __A) { | |
| 459 | 465 | return (__m128d)__builtin_convertvector((__v2di)__A, __v2df); |
| 460 | 466 | } |
| 461 | 467 | |
| 462 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 463 | _mm_mask_cvtepi64_pd (__m128d __W, __mmask8 __U, __m128i __A) { | |
| 468 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 469 | _mm_mask_cvtepi64_pd(__m128d __W, __mmask8 __U, __m128i __A) { | |
| 464 | 470 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 465 | 471 | (__v2df)_mm_cvtepi64_pd(__A), |
| 466 | 472 | (__v2df)__W); |
| 467 | 473 | } |
| 468 | 474 | |
| 469 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 470 | _mm_maskz_cvtepi64_pd (__mmask8 __U, __m128i __A) { | |
| 475 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 476 | _mm_maskz_cvtepi64_pd(__mmask8 __U, __m128i __A) { | |
| 471 | 477 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 472 | 478 | (__v2df)_mm_cvtepi64_pd(__A), |
| 473 | 479 | (__v2df)_mm_setzero_pd()); |
| 474 | 480 | } |
| 475 | 481 | |
| 476 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 477 | _mm256_cvtepi64_pd (__m256i __A) { | |
| 482 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 483 | _mm256_cvtepi64_pd(__m256i __A) { | |
| 478 | 484 | return (__m256d)__builtin_convertvector((__v4di)__A, __v4df); |
| 479 | 485 | } |
| 480 | 486 | |
| 481 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 482 | _mm256_mask_cvtepi64_pd (__m256d __W, __mmask8 __U, __m256i __A) { | |
| 487 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 488 | _mm256_mask_cvtepi64_pd(__m256d __W, __mmask8 __U, __m256i __A) { | |
| 483 | 489 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 484 | 490 | (__v4df)_mm256_cvtepi64_pd(__A), |
| 485 | 491 | (__v4df)__W); |
| 486 | 492 | } |
| 487 | 493 | |
| 488 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 489 | _mm256_maskz_cvtepi64_pd (__mmask8 __U, __m256i __A) { | |
| 494 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 495 | _mm256_maskz_cvtepi64_pd(__mmask8 __U, __m256i __A) { | |
| 490 | 496 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 491 | 497 | (__v4df)_mm256_cvtepi64_pd(__A), |
| 492 | 498 | (__v4df)_mm256_setzero_pd()); |
| ... | ... | @@ -513,20 +519,20 @@ _mm_maskz_cvtepi64_ps (__mmask8 __U, __m128i __A) { |
| 513 | 519 | (__mmask8) __U); |
| 514 | 520 | } |
| 515 | 521 | |
| 516 | static __inline__ __m128 __DEFAULT_FN_ATTRS256 | |
| 517 | _mm256_cvtepi64_ps (__m256i __A) { | |
| 522 | static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 523 | _mm256_cvtepi64_ps(__m256i __A) { | |
| 518 | 524 | return (__m128)__builtin_convertvector((__v4di)__A, __v4sf); |
| 519 | 525 | } |
| 520 | 526 | |
| 521 | static __inline__ __m128 __DEFAULT_FN_ATTRS256 | |
| 522 | _mm256_mask_cvtepi64_ps (__m128 __W, __mmask8 __U, __m256i __A) { | |
| 527 | static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 528 | _mm256_mask_cvtepi64_ps(__m128 __W, __mmask8 __U, __m256i __A) { | |
| 523 | 529 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 524 | 530 | (__v4sf)_mm256_cvtepi64_ps(__A), |
| 525 | 531 | (__v4sf)__W); |
| 526 | 532 | } |
| 527 | 533 | |
| 528 | static __inline__ __m128 __DEFAULT_FN_ATTRS256 | |
| 529 | _mm256_maskz_cvtepi64_ps (__mmask8 __U, __m256i __A) { | |
| 534 | static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 535 | _mm256_maskz_cvtepi64_ps(__mmask8 __U, __m256i __A) { | |
| 530 | 536 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 531 | 537 | (__v4sf)_mm256_cvtepi64_ps(__A), |
| 532 | 538 | (__v4sf)_mm_setzero_ps()); |
| ... | ... | @@ -700,39 +706,39 @@ _mm256_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A) { |
| 700 | 706 | (__mmask8) __U); |
| 701 | 707 | } |
| 702 | 708 | |
| 703 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 704 | _mm_cvtepu64_pd (__m128i __A) { | |
| 709 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 710 | _mm_cvtepu64_pd(__m128i __A) { | |
| 705 | 711 | return (__m128d)__builtin_convertvector((__v2du)__A, __v2df); |
| 706 | 712 | } |
| 707 | 713 | |
| 708 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 709 | _mm_mask_cvtepu64_pd (__m128d __W, __mmask8 __U, __m128i __A) { | |
| 714 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 715 | _mm_mask_cvtepu64_pd(__m128d __W, __mmask8 __U, __m128i __A) { | |
| 710 | 716 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 711 | 717 | (__v2df)_mm_cvtepu64_pd(__A), |
| 712 | 718 | (__v2df)__W); |
| 713 | 719 | } |
| 714 | 720 | |
| 715 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 716 | _mm_maskz_cvtepu64_pd (__mmask8 __U, __m128i __A) { | |
| 721 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 722 | _mm_maskz_cvtepu64_pd(__mmask8 __U, __m128i __A) { | |
| 717 | 723 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 718 | 724 | (__v2df)_mm_cvtepu64_pd(__A), |
| 719 | 725 | (__v2df)_mm_setzero_pd()); |
| 720 | 726 | } |
| 721 | 727 | |
| 722 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 723 | _mm256_cvtepu64_pd (__m256i __A) { | |
| 728 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 729 | _mm256_cvtepu64_pd(__m256i __A) { | |
| 724 | 730 | return (__m256d)__builtin_convertvector((__v4du)__A, __v4df); |
| 725 | 731 | } |
| 726 | 732 | |
| 727 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 728 | _mm256_mask_cvtepu64_pd (__m256d __W, __mmask8 __U, __m256i __A) { | |
| 733 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 734 | _mm256_mask_cvtepu64_pd(__m256d __W, __mmask8 __U, __m256i __A) { | |
| 729 | 735 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 730 | 736 | (__v4df)_mm256_cvtepu64_pd(__A), |
| 731 | 737 | (__v4df)__W); |
| 732 | 738 | } |
| 733 | 739 | |
| 734 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 735 | _mm256_maskz_cvtepu64_pd (__mmask8 __U, __m256i __A) { | |
| 740 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 741 | _mm256_maskz_cvtepu64_pd(__mmask8 __U, __m256i __A) { | |
| 736 | 742 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 737 | 743 | (__v4df)_mm256_cvtepu64_pd(__A), |
| 738 | 744 | (__v4df)_mm256_setzero_pd()); |
| ... | ... | @@ -759,20 +765,20 @@ _mm_maskz_cvtepu64_ps (__mmask8 __U, __m128i __A) { |
| 759 | 765 | (__mmask8) __U); |
| 760 | 766 | } |
| 761 | 767 | |
| 762 | static __inline__ __m128 __DEFAULT_FN_ATTRS256 | |
| 763 | _mm256_cvtepu64_ps (__m256i __A) { | |
| 768 | static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 769 | _mm256_cvtepu64_ps(__m256i __A) { | |
| 764 | 770 | return (__m128)__builtin_convertvector((__v4du)__A, __v4sf); |
| 765 | 771 | } |
| 766 | 772 | |
| 767 | static __inline__ __m128 __DEFAULT_FN_ATTRS256 | |
| 768 | _mm256_mask_cvtepu64_ps (__m128 __W, __mmask8 __U, __m256i __A) { | |
| 773 | static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 774 | _mm256_mask_cvtepu64_ps(__m128 __W, __mmask8 __U, __m256i __A) { | |
| 769 | 775 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 770 | 776 | (__v4sf)_mm256_cvtepu64_ps(__A), |
| 771 | 777 | (__v4sf)__W); |
| 772 | 778 | } |
| 773 | 779 | |
| 774 | static __inline__ __m128 __DEFAULT_FN_ATTRS256 | |
| 775 | _mm256_maskz_cvtepu64_ps (__mmask8 __U, __m256i __A) { | |
| 780 | static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 781 | _mm256_maskz_cvtepu64_ps(__mmask8 __U, __m256i __A) { | |
| 776 | 782 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 777 | 783 | (__v4sf)_mm256_cvtepu64_ps(__A), |
| 778 | 784 | (__v4sf)_mm_setzero_ps()); |
| ... | ... | @@ -908,174 +914,150 @@ _mm256_maskz_cvtepu64_ps (__mmask8 __U, __m256i __A) { |
| 908 | 914 | (__v8sf)_mm256_setzero_ps(), \ |
| 909 | 915 | (__mmask8)(U))) |
| 910 | 916 | |
| 911 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 | |
| 912 | _mm_movepi32_mask (__m128i __A) | |
| 913 | { | |
| 917 | static __inline__ __mmask8 | |
| 918 | __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_movepi32_mask(__m128i __A) { | |
| 914 | 919 | return (__mmask8) __builtin_ia32_cvtd2mask128 ((__v4si) __A); |
| 915 | 920 | } |
| 916 | 921 | |
| 917 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 | |
| 918 | _mm256_movepi32_mask (__m256i __A) | |
| 919 | { | |
| 922 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 923 | _mm256_movepi32_mask(__m256i __A) { | |
| 920 | 924 | return (__mmask8) __builtin_ia32_cvtd2mask256 ((__v8si) __A); |
| 921 | 925 | } |
| 922 | 926 | |
| 923 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 924 | _mm_movm_epi32 (__mmask8 __A) | |
| 925 | { | |
| 927 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 928 | _mm_movm_epi32(__mmask8 __A) { | |
| 926 | 929 | return (__m128i) __builtin_ia32_cvtmask2d128 (__A); |
| 927 | 930 | } |
| 928 | 931 | |
| 929 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 930 | _mm256_movm_epi32 (__mmask8 __A) | |
| 931 | { | |
| 932 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 933 | _mm256_movm_epi32(__mmask8 __A) { | |
| 932 | 934 | return (__m256i) __builtin_ia32_cvtmask2d256 (__A); |
| 933 | 935 | } |
| 934 | 936 | |
| 935 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 936 | _mm_movm_epi64 (__mmask8 __A) | |
| 937 | { | |
| 937 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 938 | _mm_movm_epi64(__mmask8 __A) { | |
| 938 | 939 | return (__m128i) __builtin_ia32_cvtmask2q128 (__A); |
| 939 | 940 | } |
| 940 | 941 | |
| 941 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 942 | _mm256_movm_epi64 (__mmask8 __A) | |
| 943 | { | |
| 942 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 943 | _mm256_movm_epi64(__mmask8 __A) { | |
| 944 | 944 | return (__m256i) __builtin_ia32_cvtmask2q256 (__A); |
| 945 | 945 | } |
| 946 | 946 | |
| 947 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS128 | |
| 948 | _mm_movepi64_mask (__m128i __A) | |
| 949 | { | |
| 947 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 948 | _mm_movepi64_mask(__m128i __A) { | |
| 950 | 949 | return (__mmask8) __builtin_ia32_cvtq2mask128 ((__v2di) __A); |
| 951 | 950 | } |
| 952 | 951 | |
| 953 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS256 | |
| 954 | _mm256_movepi64_mask (__m256i __A) | |
| 955 | { | |
| 952 | static __inline__ __mmask8 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 953 | _mm256_movepi64_mask(__m256i __A) { | |
| 956 | 954 | return (__mmask8) __builtin_ia32_cvtq2mask256 ((__v4di) __A); |
| 957 | 955 | } |
| 958 | 956 | |
| 959 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 960 | _mm256_broadcast_f32x2 (__m128 __A) | |
| 961 | { | |
| 957 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 958 | _mm256_broadcast_f32x2(__m128 __A) { | |
| 962 | 959 | return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, |
| 963 | 960 | 0, 1, 0, 1, 0, 1, 0, 1); |
| 964 | 961 | } |
| 965 | 962 | |
| 966 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 967 | _mm256_mask_broadcast_f32x2 (__m256 __O, __mmask8 __M, __m128 __A) | |
| 968 | { | |
| 963 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 964 | _mm256_mask_broadcast_f32x2(__m256 __O, __mmask8 __M, __m128 __A) { | |
| 969 | 965 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__M, |
| 970 | 966 | (__v8sf)_mm256_broadcast_f32x2(__A), |
| 971 | 967 | (__v8sf)__O); |
| 972 | 968 | } |
| 973 | 969 | |
| 974 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 975 | _mm256_maskz_broadcast_f32x2 (__mmask8 __M, __m128 __A) | |
| 976 | { | |
| 970 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 971 | _mm256_maskz_broadcast_f32x2(__mmask8 __M, __m128 __A) { | |
| 977 | 972 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__M, |
| 978 | 973 | (__v8sf)_mm256_broadcast_f32x2(__A), |
| 979 | 974 | (__v8sf)_mm256_setzero_ps()); |
| 980 | 975 | } |
| 981 | 976 | |
| 982 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 983 | _mm256_broadcast_f64x2(__m128d __A) | |
| 984 | { | |
| 977 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 978 | _mm256_broadcast_f64x2(__m128d __A) { | |
| 985 | 979 | return (__m256d)__builtin_shufflevector((__v2df)__A, (__v2df)__A, |
| 986 | 980 | 0, 1, 0, 1); |
| 987 | 981 | } |
| 988 | 982 | |
| 989 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 990 | _mm256_mask_broadcast_f64x2(__m256d __O, __mmask8 __M, __m128d __A) | |
| 991 | { | |
| 983 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 984 | _mm256_mask_broadcast_f64x2(__m256d __O, __mmask8 __M, __m128d __A) { | |
| 992 | 985 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__M, |
| 993 | 986 | (__v4df)_mm256_broadcast_f64x2(__A), |
| 994 | 987 | (__v4df)__O); |
| 995 | 988 | } |
| 996 | 989 | |
| 997 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 998 | _mm256_maskz_broadcast_f64x2 (__mmask8 __M, __m128d __A) | |
| 999 | { | |
| 990 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 991 | _mm256_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A) { | |
| 1000 | 992 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__M, |
| 1001 | 993 | (__v4df)_mm256_broadcast_f64x2(__A), |
| 1002 | 994 | (__v4df)_mm256_setzero_pd()); |
| 1003 | 995 | } |
| 1004 | 996 | |
| 1005 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1006 | _mm_broadcast_i32x2 (__m128i __A) | |
| 1007 | { | |
| 997 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 998 | _mm_broadcast_i32x2(__m128i __A) { | |
| 1008 | 999 | return (__m128i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, |
| 1009 | 1000 | 0, 1, 0, 1); |
| 1010 | 1001 | } |
| 1011 | 1002 | |
| 1012 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1013 | _mm_mask_broadcast_i32x2 (__m128i __O, __mmask8 __M, __m128i __A) | |
| 1014 | { | |
| 1003 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1004 | _mm_mask_broadcast_i32x2(__m128i __O, __mmask8 __M, __m128i __A) { | |
| 1015 | 1005 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 1016 | 1006 | (__v4si)_mm_broadcast_i32x2(__A), |
| 1017 | 1007 | (__v4si)__O); |
| 1018 | 1008 | } |
| 1019 | 1009 | |
| 1020 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1021 | _mm_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A) | |
| 1022 | { | |
| 1010 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1011 | _mm_maskz_broadcast_i32x2(__mmask8 __M, __m128i __A) { | |
| 1023 | 1012 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 1024 | 1013 | (__v4si)_mm_broadcast_i32x2(__A), |
| 1025 | 1014 | (__v4si)_mm_setzero_si128()); |
| 1026 | 1015 | } |
| 1027 | 1016 | |
| 1028 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1029 | _mm256_broadcast_i32x2 (__m128i __A) | |
| 1030 | { | |
| 1017 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1018 | _mm256_broadcast_i32x2(__m128i __A) { | |
| 1031 | 1019 | return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, |
| 1032 | 1020 | 0, 1, 0, 1, 0, 1, 0, 1); |
| 1033 | 1021 | } |
| 1034 | 1022 | |
| 1035 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1036 | _mm256_mask_broadcast_i32x2 (__m256i __O, __mmask8 __M, __m128i __A) | |
| 1037 | { | |
| 1023 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1024 | _mm256_mask_broadcast_i32x2(__m256i __O, __mmask8 __M, __m128i __A) { | |
| 1038 | 1025 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 1039 | 1026 | (__v8si)_mm256_broadcast_i32x2(__A), |
| 1040 | 1027 | (__v8si)__O); |
| 1041 | 1028 | } |
| 1042 | 1029 | |
| 1043 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1044 | _mm256_maskz_broadcast_i32x2 (__mmask8 __M, __m128i __A) | |
| 1045 | { | |
| 1030 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1031 | _mm256_maskz_broadcast_i32x2(__mmask8 __M, __m128i __A) { | |
| 1046 | 1032 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 1047 | 1033 | (__v8si)_mm256_broadcast_i32x2(__A), |
| 1048 | 1034 | (__v8si)_mm256_setzero_si256()); |
| 1049 | 1035 | } |
| 1050 | 1036 | |
| 1051 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1052 | _mm256_broadcast_i64x2(__m128i __A) | |
| 1053 | { | |
| 1037 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1038 | _mm256_broadcast_i64x2(__m128i __A) { | |
| 1054 | 1039 | return (__m256i)__builtin_shufflevector((__v2di)__A, (__v2di)__A, |
| 1055 | 1040 | 0, 1, 0, 1); |
| 1056 | 1041 | } |
| 1057 | 1042 | |
| 1058 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1059 | _mm256_mask_broadcast_i64x2(__m256i __O, __mmask8 __M, __m128i __A) | |
| 1060 | { | |
| 1043 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1044 | _mm256_mask_broadcast_i64x2(__m256i __O, __mmask8 __M, __m128i __A) { | |
| 1061 | 1045 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 1062 | 1046 | (__v4di)_mm256_broadcast_i64x2(__A), |
| 1063 | 1047 | (__v4di)__O); |
| 1064 | 1048 | } |
| 1065 | 1049 | |
| 1066 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1067 | _mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A) | |
| 1068 | { | |
| 1050 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1051 | _mm256_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A) { | |
| 1069 | 1052 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 1070 | 1053 | (__v4di)_mm256_broadcast_i64x2(__A), |
| 1071 | 1054 | (__v4di)_mm256_setzero_si256()); |
| 1072 | 1055 | } |
| 1073 | 1056 | |
| 1074 | #define _mm256_extractf64x2_pd(A, imm) \ | |
| 1075 | ((__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \ | |
| 1076 | (int)(imm), \ | |
| 1077 | (__v2df)_mm_undefined_pd(), \ | |
| 1078 | (__mmask8)-1)) | |
| 1057 | #define _mm256_extractf64x2_pd(A, imm) \ | |
| 1058 | ((__m128d)__builtin_ia32_extractf64x2_256_mask( \ | |
| 1059 | (__v4df)(__m256d)(A), (int)(imm), (__v2df)_mm_setzero_pd(), \ | |
| 1060 | (__mmask8) - 1)) | |
| 1079 | 1061 | |
| 1080 | 1062 | #define _mm256_mask_extractf64x2_pd(W, U, A, imm) \ |
| 1081 | 1063 | ((__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \ |
| ... | ... | @@ -1089,11 +1071,10 @@ _mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A) |
| 1089 | 1071 | (__v2df)_mm_setzero_pd(), \ |
| 1090 | 1072 | (__mmask8)(U))) |
| 1091 | 1073 | |
| 1092 | #define _mm256_extracti64x2_epi64(A, imm) \ | |
| 1093 | ((__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \ | |
| 1094 | (int)(imm), \ | |
| 1095 | (__v2di)_mm_undefined_si128(), \ | |
| 1096 | (__mmask8)-1)) | |
| 1074 | #define _mm256_extracti64x2_epi64(A, imm) \ | |
| 1075 | ((__m128i)__builtin_ia32_extracti64x2_256_mask( \ | |
| 1076 | (__v4di)(__m256i)(A), (int)(imm), (__v2di)_mm_setzero_si128(), \ | |
| 1077 | (__mmask8) - 1)) | |
| 1097 | 1078 | |
| 1098 | 1079 | #define _mm256_mask_extracti64x2_epi64(W, U, A, imm) \ |
| 1099 | 1080 | ((__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \ |
| ... | ... | @@ -1169,5 +1150,7 @@ _mm256_maskz_broadcast_i64x2 (__mmask8 __M, __m128i __A) |
| 1169 | 1150 | |
| 1170 | 1151 | #undef __DEFAULT_FN_ATTRS128 |
| 1171 | 1152 | #undef __DEFAULT_FN_ATTRS256 |
| 1153 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1154 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1172 | 1155 | |
| 1173 | 1156 | #endif |
lib/include/avx512vlfp16intrin.h+130-111| ... | ... | @@ -19,51 +19,64 @@ |
| 19 | 19 | /* Define the default attributes for the functions in this file. */ |
| 20 | 20 | #define __DEFAULT_FN_ATTRS256 \ |
| 21 | 21 | __attribute__((__always_inline__, __nodebug__, \ |
| 22 | __target__("avx512fp16,avx512vl,no-evex512"), \ | |
| 22 | __target__("avx512fp16,avx512vl"), \ | |
| 23 | 23 | __min_vector_width__(256))) |
| 24 | 24 | #define __DEFAULT_FN_ATTRS128 \ |
| 25 | 25 | __attribute__((__always_inline__, __nodebug__, \ |
| 26 | __target__("avx512fp16,avx512vl,no-evex512"), \ | |
| 26 | __target__("avx512fp16,avx512vl"), \ | |
| 27 | 27 | __min_vector_width__(128))) |
| 28 | 28 | |
| 29 | static __inline__ _Float16 __DEFAULT_FN_ATTRS128 _mm_cvtsh_h(__m128h __a) { | |
| 29 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 30 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 31 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 32 | #else | |
| 33 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 34 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 35 | #endif | |
| 36 | ||
| 37 | static __inline__ _Float16 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 38 | _mm_cvtsh_h(__m128h __a) { | |
| 30 | 39 | return __a[0]; |
| 31 | 40 | } |
| 32 | 41 | |
| 33 | static __inline__ _Float16 __DEFAULT_FN_ATTRS256 _mm256_cvtsh_h(__m256h __a) { | |
| 42 | static __inline__ _Float16 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 43 | _mm256_cvtsh_h(__m256h __a) { | |
| 34 | 44 | return __a[0]; |
| 35 | 45 | } |
| 36 | 46 | |
| 37 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_set_sh(_Float16 __h) { | |
| 47 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 48 | _mm_set_sh(_Float16 __h) { | |
| 38 | 49 | return __extension__(__m128h){__h, 0, 0, 0, 0, 0, 0, 0}; |
| 39 | 50 | } |
| 40 | 51 | |
| 41 | static __inline __m128h __DEFAULT_FN_ATTRS128 _mm_set1_ph(_Float16 __h) { | |
| 52 | static __inline __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 53 | _mm_set1_ph(_Float16 __h) { | |
| 42 | 54 | return (__m128h)(__v8hf){__h, __h, __h, __h, __h, __h, __h, __h}; |
| 43 | 55 | } |
| 44 | 56 | |
| 45 | static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_set1_ph(_Float16 __h) { | |
| 57 | static __inline __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 58 | _mm256_set1_ph(_Float16 __h) { | |
| 46 | 59 | return (__m256h)(__v16hf){__h, __h, __h, __h, __h, __h, __h, __h, |
| 47 | 60 | __h, __h, __h, __h, __h, __h, __h, __h}; |
| 48 | 61 | } |
| 49 | 62 | |
| 50 | static __inline __m128h __DEFAULT_FN_ATTRS128 | |
| 63 | static __inline __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 51 | 64 | _mm_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4, |
| 52 | 65 | _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8) { |
| 53 | 66 | return (__m128h)(__v8hf){__h8, __h7, __h6, __h5, __h4, __h3, __h2, __h1}; |
| 54 | 67 | } |
| 55 | 68 | |
| 56 | static __inline __m256h __DEFAULT_FN_ATTRS256 | |
| 69 | static __inline __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 57 | 70 | _mm256_set1_pch(_Float16 _Complex h) { |
| 58 | 71 | return (__m256h)_mm256_set1_ps(__builtin_bit_cast(float, h)); |
| 59 | 72 | } |
| 60 | 73 | |
| 61 | static __inline __m128h __DEFAULT_FN_ATTRS128 | |
| 74 | static __inline __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 62 | 75 | _mm_set1_pch(_Float16 _Complex h) { |
| 63 | 76 | return (__m128h)_mm_set1_ps(__builtin_bit_cast(float, h)); |
| 64 | 77 | } |
| 65 | 78 | |
| 66 | static __inline __m256h __DEFAULT_FN_ATTRS256 | |
| 79 | static __inline __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 67 | 80 | _mm256_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4, |
| 68 | 81 | _Float16 __h5, _Float16 __h6, _Float16 __h7, _Float16 __h8, |
| 69 | 82 | _Float16 __h9, _Float16 __h10, _Float16 __h11, _Float16 __h12, |
| ... | ... | @@ -73,13 +86,20 @@ _mm256_set_ph(_Float16 __h1, _Float16 __h2, _Float16 __h3, _Float16 __h4, |
| 73 | 86 | __h4, __h3, __h2, __h1}; |
| 74 | 87 | } |
| 75 | 88 | |
| 76 | #define _mm_setr_ph(h1, h2, h3, h4, h5, h6, h7, h8) \ | |
| 77 | _mm_set_ph((h8), (h7), (h6), (h5), (h4), (h3), (h2), (h1)) | |
| 89 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 90 | _mm_setr_ph(_Float16 e0, _Float16 e1, _Float16 e2, _Float16 e3, _Float16 e4, | |
| 91 | _Float16 e5, _Float16 e6, _Float16 e7) { | |
| 92 | return _mm_set_ph(e7, e6, e5, e4, e3, e2, e1, e0); | |
| 93 | } | |
| 78 | 94 | |
| 79 | #define _mm256_setr_ph(h1, h2, h3, h4, h5, h6, h7, h8, h9, h10, h11, h12, h13, \ | |
| 80 | h14, h15, h16) \ | |
| 81 | _mm256_set_ph((h16), (h15), (h14), (h13), (h12), (h11), (h10), (h9), (h8), \ | |
| 82 | (h7), (h6), (h5), (h4), (h3), (h2), (h1)) | |
| 95 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 96 | _mm256_setr_ph(_Float16 e0, _Float16 e1, _Float16 e2, _Float16 e3, _Float16 e4, | |
| 97 | _Float16 e5, _Float16 e6, _Float16 e7, _Float16 e8, _Float16 e9, | |
| 98 | _Float16 e10, _Float16 e11, _Float16 e12, _Float16 e13, | |
| 99 | _Float16 e14, _Float16 e15) { | |
| 100 | return _mm256_set_ph(e15, e14, e13, e12, e11, e10, e9, e8, e7, e6, e5, e4, e3, | |
| 101 | e2, e1, e0); | |
| 102 | } | |
| 83 | 103 | |
| 84 | 104 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_add_ph(__m256h __A, |
| 85 | 105 | __m256h __B) { |
| ... | ... | @@ -229,12 +249,12 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_div_ph(__mmask8 __U, |
| 229 | 249 | (__v8hf)_mm_setzero_ph()); |
| 230 | 250 | } |
| 231 | 251 | |
| 232 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_min_ph(__m256h __A, | |
| 233 | __m256h __B) { | |
| 252 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 253 | _mm256_min_ph(__m256h __A, __m256h __B) { | |
| 234 | 254 | return (__m256h)__builtin_ia32_minph256((__v16hf)__A, (__v16hf)__B); |
| 235 | 255 | } |
| 236 | 256 | |
| 237 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 257 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 238 | 258 | _mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { |
| 239 | 259 | return (__m256h)__builtin_ia32_selectph_256( |
| 240 | 260 | (__mmask16)__U, |
| ... | ... | @@ -242,7 +262,7 @@ _mm256_mask_min_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { |
| 242 | 262 | (__v16hf)__W); |
| 243 | 263 | } |
| 244 | 264 | |
| 245 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 265 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 246 | 266 | _mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) { |
| 247 | 267 | return (__m256h)__builtin_ia32_selectph_256( |
| 248 | 268 | (__mmask16)__U, |
| ... | ... | @@ -250,34 +270,31 @@ _mm256_maskz_min_ph(__mmask16 __U, __m256h __A, __m256h __B) { |
| 250 | 270 | (__v16hf)_mm256_setzero_ph()); |
| 251 | 271 | } |
| 252 | 272 | |
| 253 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_min_ph(__m128h __A, | |
| 254 | __m128h __B) { | |
| 273 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 274 | _mm_min_ph(__m128h __A, __m128h __B) { | |
| 255 | 275 | return (__m128h)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B); |
| 256 | 276 | } |
| 257 | 277 | |
| 258 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_min_ph(__m128h __W, | |
| 259 | __mmask8 __U, | |
| 260 | __m128h __A, | |
| 261 | __m128h __B) { | |
| 278 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 279 | _mm_mask_min_ph(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { | |
| 262 | 280 | return (__m128h)__builtin_ia32_selectph_128( |
| 263 | 281 | (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B), |
| 264 | 282 | (__v8hf)__W); |
| 265 | 283 | } |
| 266 | 284 | |
| 267 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_min_ph(__mmask8 __U, | |
| 268 | __m128h __A, | |
| 269 | __m128h __B) { | |
| 285 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 286 | _mm_maskz_min_ph(__mmask8 __U, __m128h __A, __m128h __B) { | |
| 270 | 287 | return (__m128h)__builtin_ia32_selectph_128( |
| 271 | 288 | (__mmask8)__U, (__v8hf)__builtin_ia32_minph128((__v8hf)__A, (__v8hf)__B), |
| 272 | 289 | (__v8hf)_mm_setzero_ph()); |
| 273 | 290 | } |
| 274 | 291 | |
| 275 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_max_ph(__m256h __A, | |
| 276 | __m256h __B) { | |
| 292 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 293 | _mm256_max_ph(__m256h __A, __m256h __B) { | |
| 277 | 294 | return (__m256h)__builtin_ia32_maxph256((__v16hf)__A, (__v16hf)__B); |
| 278 | 295 | } |
| 279 | 296 | |
| 280 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 297 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 281 | 298 | _mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { |
| 282 | 299 | return (__m256h)__builtin_ia32_selectph_256( |
| 283 | 300 | (__mmask16)__U, |
| ... | ... | @@ -285,7 +302,7 @@ _mm256_mask_max_ph(__m256h __W, __mmask16 __U, __m256h __A, __m256h __B) { |
| 285 | 302 | (__v16hf)__W); |
| 286 | 303 | } |
| 287 | 304 | |
| 288 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 305 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 289 | 306 | _mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) { |
| 290 | 307 | return (__m256h)__builtin_ia32_selectph_256( |
| 291 | 308 | (__mmask16)__U, |
| ... | ... | @@ -293,33 +310,32 @@ _mm256_maskz_max_ph(__mmask16 __U, __m256h __A, __m256h __B) { |
| 293 | 310 | (__v16hf)_mm256_setzero_ph()); |
| 294 | 311 | } |
| 295 | 312 | |
| 296 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_max_ph(__m128h __A, | |
| 297 | __m128h __B) { | |
| 313 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 314 | _mm_max_ph(__m128h __A, __m128h __B) { | |
| 298 | 315 | return (__m128h)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B); |
| 299 | 316 | } |
| 300 | 317 | |
| 301 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_max_ph(__m128h __W, | |
| 302 | __mmask8 __U, | |
| 303 | __m128h __A, | |
| 304 | __m128h __B) { | |
| 318 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 319 | _mm_mask_max_ph(__m128h __W, __mmask8 __U, __m128h __A, __m128h __B) { | |
| 305 | 320 | return (__m128h)__builtin_ia32_selectph_128( |
| 306 | 321 | (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B), |
| 307 | 322 | (__v8hf)__W); |
| 308 | 323 | } |
| 309 | 324 | |
| 310 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_max_ph(__mmask8 __U, | |
| 311 | __m128h __A, | |
| 312 | __m128h __B) { | |
| 325 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 326 | _mm_maskz_max_ph(__mmask8 __U, __m128h __A, __m128h __B) { | |
| 313 | 327 | return (__m128h)__builtin_ia32_selectph_128( |
| 314 | 328 | (__mmask8)__U, (__v8hf)__builtin_ia32_maxph128((__v8hf)__A, (__v8hf)__B), |
| 315 | 329 | (__v8hf)_mm_setzero_ph()); |
| 316 | 330 | } |
| 317 | 331 | |
| 318 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_abs_ph(__m256h __A) { | |
| 332 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 333 | _mm256_abs_ph(__m256h __A) { | |
| 319 | 334 | return (__m256h)_mm256_and_epi32(_mm256_set1_epi32(0x7FFF7FFF), (__m256i)__A); |
| 320 | 335 | } |
| 321 | 336 | |
| 322 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_abs_ph(__m128h __A) { | |
| 337 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 338 | _mm_abs_ph(__m128h __A) { | |
| 323 | 339 | return (__m128h)_mm_and_epi32(_mm_set1_epi32(0x7FFF7FFF), (__m128i)__A); |
| 324 | 340 | } |
| 325 | 341 | |
| ... | ... | @@ -601,7 +617,7 @@ _mm256_maskz_scalef_ph(__mmask16 __U, __m256h __A, __m256h __B) { |
| 601 | 617 | (__mmask16)(U))) |
| 602 | 618 | |
| 603 | 619 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_sqrt_ph(__m128h __a) { |
| 604 | return __builtin_ia32_sqrtph((__v8hf)__a); | |
| 620 | return __builtin_elementwise_sqrt(__a); | |
| 605 | 621 | } |
| 606 | 622 | |
| 607 | 623 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_sqrt_ph(__m128h __W, |
| ... | ... | @@ -618,7 +634,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_sqrt_ph(__mmask8 __U, |
| 618 | 634 | } |
| 619 | 635 | |
| 620 | 636 | static __inline __m256h __DEFAULT_FN_ATTRS256 _mm256_sqrt_ph(__m256h __a) { |
| 621 | return (__m256h)__builtin_ia32_sqrtph256((__v16hf)__a); | |
| 637 | return __builtin_elementwise_sqrt(__a); | |
| 622 | 638 | } |
| 623 | 639 | |
| 624 | 640 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| ... | ... | @@ -790,34 +806,35 @@ _mm256_maskz_cvttph_epi16(__mmask16 __U, __m256h __A) { |
| 790 | 806 | (__v16hf)__A, (__v16hi)_mm256_setzero_si256(), (__mmask16)__U); |
| 791 | 807 | } |
| 792 | 808 | |
| 793 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepi16_ph(__m128i __A) { | |
| 809 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 810 | _mm_cvtepi16_ph(__m128i __A) { | |
| 794 | 811 | return (__m128h) __builtin_convertvector((__v8hi)__A, __v8hf); |
| 795 | 812 | } |
| 796 | 813 | |
| 797 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 | |
| 814 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 798 | 815 | _mm_mask_cvtepi16_ph(__m128h __W, __mmask8 __U, __m128i __A) { |
| 799 | 816 | return (__m128h)__builtin_ia32_selectph_128( |
| 800 | 817 | (__mmask8)__U, (__v8hf)_mm_cvtepi16_ph(__A), (__v8hf)__W); |
| 801 | 818 | } |
| 802 | 819 | |
| 803 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 | |
| 820 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 804 | 821 | _mm_maskz_cvtepi16_ph(__mmask8 __U, __m128i __A) { |
| 805 | 822 | return (__m128h)__builtin_ia32_selectph_128( |
| 806 | 823 | (__mmask8)__U, (__v8hf)_mm_cvtepi16_ph(__A), (__v8hf)_mm_setzero_ph()); |
| 807 | 824 | } |
| 808 | 825 | |
| 809 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 826 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 810 | 827 | _mm256_cvtepi16_ph(__m256i __A) { |
| 811 | 828 | return (__m256h) __builtin_convertvector((__v16hi)__A, __v16hf); |
| 812 | 829 | } |
| 813 | 830 | |
| 814 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 831 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 815 | 832 | _mm256_mask_cvtepi16_ph(__m256h __W, __mmask16 __U, __m256i __A) { |
| 816 | 833 | return (__m256h)__builtin_ia32_selectph_256( |
| 817 | 834 | (__mmask16)__U, (__v16hf)_mm256_cvtepi16_ph(__A), (__v16hf)__W); |
| 818 | 835 | } |
| 819 | 836 | |
| 820 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 837 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 821 | 838 | _mm256_maskz_cvtepi16_ph(__mmask16 __U, __m256i __A) { |
| 822 | 839 | return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, |
| 823 | 840 | (__v16hf)_mm256_cvtepi16_ph(__A), |
| ... | ... | @@ -894,34 +911,35 @@ _mm256_maskz_cvttph_epu16(__mmask16 __U, __m256h __A) { |
| 894 | 911 | (__v16hf)__A, (__v16hu)_mm256_setzero_si256(), (__mmask16)__U); |
| 895 | 912 | } |
| 896 | 913 | |
| 897 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtepu16_ph(__m128i __A) { | |
| 914 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 915 | _mm_cvtepu16_ph(__m128i __A) { | |
| 898 | 916 | return (__m128h) __builtin_convertvector((__v8hu)__A, __v8hf); |
| 899 | 917 | } |
| 900 | 918 | |
| 901 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 | |
| 919 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 902 | 920 | _mm_mask_cvtepu16_ph(__m128h __W, __mmask8 __U, __m128i __A) { |
| 903 | 921 | return (__m128h)__builtin_ia32_selectph_128( |
| 904 | 922 | (__mmask8)__U, (__v8hf)_mm_cvtepu16_ph(__A), (__v8hf)__W); |
| 905 | 923 | } |
| 906 | 924 | |
| 907 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 | |
| 925 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 908 | 926 | _mm_maskz_cvtepu16_ph(__mmask8 __U, __m128i __A) { |
| 909 | 927 | return (__m128h)__builtin_ia32_selectph_128( |
| 910 | 928 | (__mmask8)__U, (__v8hf)_mm_cvtepu16_ph(__A), (__v8hf)_mm_setzero_ph()); |
| 911 | 929 | } |
| 912 | 930 | |
| 913 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 931 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 914 | 932 | _mm256_cvtepu16_ph(__m256i __A) { |
| 915 | 933 | return (__m256h) __builtin_convertvector((__v16hu)__A, __v16hf); |
| 916 | 934 | } |
| 917 | 935 | |
| 918 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 936 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 919 | 937 | _mm256_mask_cvtepu16_ph(__m256h __W, __mmask16 __U, __m256i __A) { |
| 920 | 938 | return (__m256h)__builtin_ia32_selectph_256( |
| 921 | 939 | (__mmask16)__U, (__v16hf)_mm256_cvtepu16_ph(__A), (__v16hf)__W); |
| 922 | 940 | } |
| 923 | 941 | |
| 924 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 942 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 925 | 943 | _mm256_maskz_cvtepu16_ph(__mmask16 __U, __m256i __A) { |
| 926 | 944 | return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, |
| 927 | 945 | (__v16hf)_mm256_cvtepu16_ph(__A), |
| ... | ... | @@ -1015,18 +1033,18 @@ _mm_maskz_cvtepi32_ph(__mmask8 __U, __m128i __A) { |
| 1015 | 1033 | (__v4si)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); |
| 1016 | 1034 | } |
| 1017 | 1035 | |
| 1018 | static __inline__ __m128h __DEFAULT_FN_ATTRS256 | |
| 1036 | static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1019 | 1037 | _mm256_cvtepi32_ph(__m256i __A) { |
| 1020 | 1038 | return (__m128h) __builtin_convertvector((__v8si)__A, __v8hf); |
| 1021 | 1039 | } |
| 1022 | 1040 | |
| 1023 | static __inline__ __m128h __DEFAULT_FN_ATTRS256 | |
| 1041 | static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1024 | 1042 | _mm256_mask_cvtepi32_ph(__m128h __W, __mmask8 __U, __m256i __A) { |
| 1025 | 1043 | return (__m128h)__builtin_ia32_selectph_128( |
| 1026 | 1044 | (__mmask8)__U, (__v8hf)_mm256_cvtepi32_ph(__A), (__v8hf)__W); |
| 1027 | 1045 | } |
| 1028 | 1046 | |
| 1029 | static __inline__ __m128h __DEFAULT_FN_ATTRS256 | |
| 1047 | static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1030 | 1048 | _mm256_maskz_cvtepi32_ph(__mmask8 __U, __m256i __A) { |
| 1031 | 1049 | return (__m128h)__builtin_ia32_selectph_128( |
| 1032 | 1050 | (__mmask8)__U, (__v8hf)_mm256_cvtepi32_ph(__A), (__v8hf)_mm_setzero_ph()); |
| ... | ... | @@ -1049,18 +1067,18 @@ _mm_maskz_cvtepu32_ph(__mmask8 __U, __m128i __A) { |
| 1049 | 1067 | (__v4su)__A, (__v8hf)_mm_setzero_ph(), (__mmask8)__U); |
| 1050 | 1068 | } |
| 1051 | 1069 | |
| 1052 | static __inline__ __m128h __DEFAULT_FN_ATTRS256 | |
| 1070 | static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1053 | 1071 | _mm256_cvtepu32_ph(__m256i __A) { |
| 1054 | 1072 | return (__m128h) __builtin_convertvector((__v8su)__A, __v8hf); |
| 1055 | 1073 | } |
| 1056 | 1074 | |
| 1057 | static __inline__ __m128h __DEFAULT_FN_ATTRS256 | |
| 1075 | static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1058 | 1076 | _mm256_mask_cvtepu32_ph(__m128h __W, __mmask8 __U, __m256i __A) { |
| 1059 | 1077 | return (__m128h)__builtin_ia32_selectph_128( |
| 1060 | 1078 | (__mmask8)__U, (__v8hf)_mm256_cvtepu32_ph(__A), (__v8hf)__W); |
| 1061 | 1079 | } |
| 1062 | 1080 | |
| 1063 | static __inline__ __m128h __DEFAULT_FN_ATTRS256 | |
| 1081 | static __inline__ __m128h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1064 | 1082 | _mm256_maskz_cvtepu32_ph(__mmask8 __U, __m256i __A) { |
| 1065 | 1083 | return (__m128h)__builtin_ia32_selectph_128( |
| 1066 | 1084 | (__mmask8)__U, (__v8hf)_mm256_cvtepu32_ph(__A), (__v8hf)_mm_setzero_ph()); |
| ... | ... | @@ -1419,8 +1437,8 @@ _mm256_maskz_cvtxps_ph(__mmask8 __U, __m256 __A) { |
| 1419 | 1437 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmadd_ph(__m128h __A, |
| 1420 | 1438 | __m128h __B, |
| 1421 | 1439 | __m128h __C) { |
| 1422 | return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, | |
| 1423 | (__v8hf)__C); | |
| 1440 | return (__m128h)__builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, | |
| 1441 | (__v8hf)__C); | |
| 1424 | 1442 | } |
| 1425 | 1443 | |
| 1426 | 1444 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A, |
| ... | ... | @@ -1429,7 +1447,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A, |
| 1429 | 1447 | __m128h __C) { |
| 1430 | 1448 | return (__m128h)__builtin_ia32_selectph_128( |
| 1431 | 1449 | (__mmask8)__U, |
| 1432 | __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1450 | __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1433 | 1451 | (__v8hf)__A); |
| 1434 | 1452 | } |
| 1435 | 1453 | |
| ... | ... | @@ -1437,7 +1455,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1437 | 1455 | _mm_mask3_fmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { |
| 1438 | 1456 | return (__m128h)__builtin_ia32_selectph_128( |
| 1439 | 1457 | (__mmask8)__U, |
| 1440 | __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1458 | __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1441 | 1459 | (__v8hf)__C); |
| 1442 | 1460 | } |
| 1443 | 1461 | |
| ... | ... | @@ -1445,15 +1463,15 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1445 | 1463 | _mm_maskz_fmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { |
| 1446 | 1464 | return (__m128h)__builtin_ia32_selectph_128( |
| 1447 | 1465 | (__mmask8)__U, |
| 1448 | __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1466 | __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1449 | 1467 | (__v8hf)_mm_setzero_ph()); |
| 1450 | 1468 | } |
| 1451 | 1469 | |
| 1452 | 1470 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmsub_ph(__m128h __A, |
| 1453 | 1471 | __m128h __B, |
| 1454 | 1472 | __m128h __C) { |
| 1455 | return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, | |
| 1456 | -(__v8hf)__C); | |
| 1473 | return (__m128h)__builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, | |
| 1474 | -(__v8hf)__C); | |
| 1457 | 1475 | } |
| 1458 | 1476 | |
| 1459 | 1477 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmsub_ph(__m128h __A, |
| ... | ... | @@ -1476,7 +1494,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1476 | 1494 | _mm_mask3_fnmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { |
| 1477 | 1495 | return (__m128h)__builtin_ia32_selectph_128( |
| 1478 | 1496 | (__mmask8)__U, |
| 1479 | __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1497 | __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1480 | 1498 | (__v8hf)__C); |
| 1481 | 1499 | } |
| 1482 | 1500 | |
| ... | ... | @@ -1484,7 +1502,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1484 | 1502 | _mm_maskz_fnmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { |
| 1485 | 1503 | return (__m128h)__builtin_ia32_selectph_128( |
| 1486 | 1504 | (__mmask8)__U, |
| 1487 | __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1505 | __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), | |
| 1488 | 1506 | (__v8hf)_mm_setzero_ph()); |
| 1489 | 1507 | } |
| 1490 | 1508 | |
| ... | ... | @@ -1492,22 +1510,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1492 | 1510 | _mm_maskz_fnmsub_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { |
| 1493 | 1511 | return (__m128h)__builtin_ia32_selectph_128( |
| 1494 | 1512 | (__mmask8)__U, |
| 1495 | __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), | |
| 1513 | __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), | |
| 1496 | 1514 | (__v8hf)_mm_setzero_ph()); |
| 1497 | 1515 | } |
| 1498 | 1516 | |
| 1499 | 1517 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmadd_ph(__m256h __A, |
| 1500 | 1518 | __m256h __B, |
| 1501 | 1519 | __m256h __C) { |
| 1502 | return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, | |
| 1503 | (__v16hf)__C); | |
| 1520 | return (__m256h)__builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, | |
| 1521 | (__v16hf)__C); | |
| 1504 | 1522 | } |
| 1505 | 1523 | |
| 1506 | 1524 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1507 | 1525 | _mm256_mask_fmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { |
| 1508 | 1526 | return (__m256h)__builtin_ia32_selectph_256( |
| 1509 | 1527 | (__mmask16)__U, |
| 1510 | __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1528 | __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1511 | 1529 | (__v16hf)__A); |
| 1512 | 1530 | } |
| 1513 | 1531 | |
| ... | ... | @@ -1515,7 +1533,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1515 | 1533 | _mm256_mask3_fmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { |
| 1516 | 1534 | return (__m256h)__builtin_ia32_selectph_256( |
| 1517 | 1535 | (__mmask16)__U, |
| 1518 | __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1536 | __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1519 | 1537 | (__v16hf)__C); |
| 1520 | 1538 | } |
| 1521 | 1539 | |
| ... | ... | @@ -1523,22 +1541,22 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1523 | 1541 | _mm256_maskz_fmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { |
| 1524 | 1542 | return (__m256h)__builtin_ia32_selectph_256( |
| 1525 | 1543 | (__mmask16)__U, |
| 1526 | __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1544 | __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1527 | 1545 | (__v16hf)_mm256_setzero_ph()); |
| 1528 | 1546 | } |
| 1529 | 1547 | |
| 1530 | 1548 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmsub_ph(__m256h __A, |
| 1531 | 1549 | __m256h __B, |
| 1532 | 1550 | __m256h __C) { |
| 1533 | return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, | |
| 1534 | -(__v16hf)__C); | |
| 1551 | return (__m256h)__builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, | |
| 1552 | -(__v16hf)__C); | |
| 1535 | 1553 | } |
| 1536 | 1554 | |
| 1537 | 1555 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1538 | 1556 | _mm256_mask_fmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { |
| 1539 | 1557 | return (__m256h)__builtin_ia32_selectph_256( |
| 1540 | 1558 | (__mmask16)__U, |
| 1541 | __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), | |
| 1559 | __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), | |
| 1542 | 1560 | (__v16hf)__A); |
| 1543 | 1561 | } |
| 1544 | 1562 | |
| ... | ... | @@ -1546,7 +1564,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1546 | 1564 | _mm256_maskz_fmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { |
| 1547 | 1565 | return (__m256h)__builtin_ia32_selectph_256( |
| 1548 | 1566 | (__mmask16)__U, |
| 1549 | __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), | |
| 1567 | __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), | |
| 1550 | 1568 | (__v16hf)_mm256_setzero_ph()); |
| 1551 | 1569 | } |
| 1552 | 1570 | |
| ... | ... | @@ -1554,7 +1572,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1554 | 1572 | _mm256_mask3_fnmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { |
| 1555 | 1573 | return (__m256h)__builtin_ia32_selectph_256( |
| 1556 | 1574 | (__mmask16)__U, |
| 1557 | __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1575 | __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1558 | 1576 | (__v16hf)__C); |
| 1559 | 1577 | } |
| 1560 | 1578 | |
| ... | ... | @@ -1562,7 +1580,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1562 | 1580 | _mm256_maskz_fnmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { |
| 1563 | 1581 | return (__m256h)__builtin_ia32_selectph_256( |
| 1564 | 1582 | (__mmask16)__U, |
| 1565 | __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1583 | __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), | |
| 1566 | 1584 | (__v16hf)_mm256_setzero_ph()); |
| 1567 | 1585 | } |
| 1568 | 1586 | |
| ... | ... | @@ -1570,7 +1588,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1570 | 1588 | _mm256_maskz_fnmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { |
| 1571 | 1589 | return (__m256h)__builtin_ia32_selectph_256( |
| 1572 | 1590 | (__mmask16)__U, |
| 1573 | __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), | |
| 1591 | __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), | |
| 1574 | 1592 | (__v16hf)_mm256_setzero_ph()); |
| 1575 | 1593 | } |
| 1576 | 1594 | |
| ... | ... | @@ -1684,7 +1702,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1684 | 1702 | _mm_mask3_fmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { |
| 1685 | 1703 | return (__m128h)__builtin_ia32_selectph_128( |
| 1686 | 1704 | (__mmask8)__U, |
| 1687 | __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), | |
| 1705 | __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), | |
| 1688 | 1706 | (__v8hf)__C); |
| 1689 | 1707 | } |
| 1690 | 1708 | |
| ... | ... | @@ -1692,7 +1710,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1692 | 1710 | _mm256_mask3_fmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { |
| 1693 | 1711 | return (__m256h)__builtin_ia32_selectph_256( |
| 1694 | 1712 | (__mmask16)__U, |
| 1695 | __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), | |
| 1713 | __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), | |
| 1696 | 1714 | (__v16hf)__C); |
| 1697 | 1715 | } |
| 1698 | 1716 | |
| ... | ... | @@ -1715,45 +1733,45 @@ _mm256_mask3_fmsubadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { |
| 1715 | 1733 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmadd_ph(__m128h __A, |
| 1716 | 1734 | __m128h __B, |
| 1717 | 1735 | __m128h __C) { |
| 1718 | return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, | |
| 1719 | (__v8hf)__C); | |
| 1736 | return (__m128h)__builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, | |
| 1737 | (__v8hf)__C); | |
| 1720 | 1738 | } |
| 1721 | 1739 | |
| 1722 | 1740 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1723 | 1741 | _mm_mask_fnmadd_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { |
| 1724 | 1742 | return (__m128h)__builtin_ia32_selectph_128( |
| 1725 | 1743 | (__mmask8)__U, |
| 1726 | __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, (__v8hf)__C), | |
| 1744 | __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, (__v8hf)__C), | |
| 1727 | 1745 | (__v8hf)__A); |
| 1728 | 1746 | } |
| 1729 | 1747 | |
| 1730 | 1748 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmadd_ph(__m256h __A, |
| 1731 | 1749 | __m256h __B, |
| 1732 | 1750 | __m256h __C) { |
| 1733 | return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, | |
| 1734 | (__v16hf)__C); | |
| 1751 | return (__m256h)__builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, | |
| 1752 | (__v16hf)__C); | |
| 1735 | 1753 | } |
| 1736 | 1754 | |
| 1737 | 1755 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1738 | 1756 | _mm256_mask_fnmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { |
| 1739 | 1757 | return (__m256h)__builtin_ia32_selectph_256( |
| 1740 | 1758 | (__mmask16)__U, |
| 1741 | __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, (__v16hf)__C), | |
| 1759 | __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, (__v16hf)__C), | |
| 1742 | 1760 | (__v16hf)__A); |
| 1743 | 1761 | } |
| 1744 | 1762 | |
| 1745 | 1763 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmsub_ph(__m128h __A, |
| 1746 | 1764 | __m128h __B, |
| 1747 | 1765 | __m128h __C) { |
| 1748 | return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, | |
| 1749 | -(__v8hf)__C); | |
| 1766 | return (__m128h)__builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, | |
| 1767 | -(__v8hf)__C); | |
| 1750 | 1768 | } |
| 1751 | 1769 | |
| 1752 | 1770 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1753 | 1771 | _mm_mask_fnmsub_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { |
| 1754 | 1772 | return (__m128h)__builtin_ia32_selectph_128( |
| 1755 | 1773 | (__mmask8)__U, |
| 1756 | __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), | |
| 1774 | __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), | |
| 1757 | 1775 | (__v8hf)__A); |
| 1758 | 1776 | } |
| 1759 | 1777 | |
| ... | ... | @@ -1761,22 +1779,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 |
| 1761 | 1779 | _mm_mask3_fnmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { |
| 1762 | 1780 | return (__m128h)__builtin_ia32_selectph_128( |
| 1763 | 1781 | (__mmask8)__U, |
| 1764 | __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), | |
| 1782 | __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), | |
| 1765 | 1783 | (__v8hf)__C); |
| 1766 | 1784 | } |
| 1767 | 1785 | |
| 1768 | 1786 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmsub_ph(__m256h __A, |
| 1769 | 1787 | __m256h __B, |
| 1770 | 1788 | __m256h __C) { |
| 1771 | return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, | |
| 1772 | -(__v16hf)__C); | |
| 1789 | return (__m256h)__builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, | |
| 1790 | -(__v16hf)__C); | |
| 1773 | 1791 | } |
| 1774 | 1792 | |
| 1775 | 1793 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1776 | 1794 | _mm256_mask_fnmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { |
| 1777 | 1795 | return (__m256h)__builtin_ia32_selectph_256( |
| 1778 | 1796 | (__mmask16)__U, |
| 1779 | __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), | |
| 1797 | __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), | |
| 1780 | 1798 | (__v16hf)__A); |
| 1781 | 1799 | } |
| 1782 | 1800 | |
| ... | ... | @@ -1784,7 +1802,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 |
| 1784 | 1802 | _mm256_mask3_fnmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { |
| 1785 | 1803 | return (__m256h)__builtin_ia32_selectph_256( |
| 1786 | 1804 | (__mmask16)__U, |
| 1787 | __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), | |
| 1805 | __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), | |
| 1788 | 1806 | (__v16hf)__C); |
| 1789 | 1807 | } |
| 1790 | 1808 | |
| ... | ... | @@ -1974,37 +1992,36 @@ _mm256_maskz_fmadd_pch(__mmask8 __U, __m256h __A, __m256h __B, __m256h __C) { |
| 1974 | 1992 | (__v8sf)__C, (__mmask8)__U); |
| 1975 | 1993 | } |
| 1976 | 1994 | |
| 1977 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_blend_ph(__mmask8 __U, | |
| 1978 | __m128h __A, | |
| 1979 | __m128h __W) { | |
| 1995 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1996 | _mm_mask_blend_ph(__mmask8 __U, __m128h __A, __m128h __W) { | |
| 1980 | 1997 | return (__m128h)__builtin_ia32_selectph_128((__mmask8)__U, (__v8hf)__W, |
| 1981 | 1998 | (__v8hf)__A); |
| 1982 | 1999 | } |
| 1983 | 2000 | |
| 1984 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 2001 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1985 | 2002 | _mm256_mask_blend_ph(__mmask16 __U, __m256h __A, __m256h __W) { |
| 1986 | 2003 | return (__m256h)__builtin_ia32_selectph_256((__mmask16)__U, (__v16hf)__W, |
| 1987 | 2004 | (__v16hf)__A); |
| 1988 | 2005 | } |
| 1989 | 2006 | |
| 1990 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 | |
| 2007 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1991 | 2008 | _mm_permutex2var_ph(__m128h __A, __m128i __I, __m128h __B) { |
| 1992 | 2009 | return (__m128h)__builtin_ia32_vpermi2varhi128((__v8hi)__A, (__v8hi)__I, |
| 1993 | 2010 | (__v8hi)__B); |
| 1994 | 2011 | } |
| 1995 | 2012 | |
| 1996 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 2013 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1997 | 2014 | _mm256_permutex2var_ph(__m256h __A, __m256i __I, __m256h __B) { |
| 1998 | 2015 | return (__m256h)__builtin_ia32_vpermi2varhi256((__v16hi)__A, (__v16hi)__I, |
| 1999 | 2016 | (__v16hi)__B); |
| 2000 | 2017 | } |
| 2001 | 2018 | |
| 2002 | static __inline__ __m128h __DEFAULT_FN_ATTRS128 | |
| 2019 | static __inline__ __m128h __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2003 | 2020 | _mm_permutexvar_ph(__m128i __A, __m128h __B) { |
| 2004 | 2021 | return (__m128h)__builtin_ia32_permvarhi128((__v8hi)__B, (__v8hi)__A); |
| 2005 | 2022 | } |
| 2006 | 2023 | |
| 2007 | static __inline__ __m256h __DEFAULT_FN_ATTRS256 | |
| 2024 | static __inline__ __m256h __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2008 | 2025 | _mm256_permutexvar_ph(__m256i __A, __m256h __B) { |
| 2009 | 2026 | return (__m256h)__builtin_ia32_permvarhi256((__v16hi)__B, (__v16hi)__A); |
| 2010 | 2027 | } |
| ... | ... | @@ -2066,6 +2083,8 @@ _mm_reduce_min_ph(__m128h __V) { |
| 2066 | 2083 | |
| 2067 | 2084 | #undef __DEFAULT_FN_ATTRS128 |
| 2068 | 2085 | #undef __DEFAULT_FN_ATTRS256 |
| 2086 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2087 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2069 | 2088 | |
| 2070 | 2089 | #endif |
| 2071 | 2090 | #endif |
lib/include/avx512vlintrin.h+945-1299| ... | ... | @@ -15,14 +15,20 @@ |
| 15 | 15 | #define __AVX512VLINTRIN_H |
| 16 | 16 | |
| 17 | 17 | #define __DEFAULT_FN_ATTRS128 \ |
| 18 | __attribute__((__always_inline__, __nodebug__, \ | |
| 19 | __target__("avx512vl,no-evex512"), \ | |
| 18 | __attribute__((__always_inline__, __nodebug__, __target__("avx512vl"), \ | |
| 20 | 19 | __min_vector_width__(128))) |
| 21 | 20 | #define __DEFAULT_FN_ATTRS256 \ |
| 22 | __attribute__((__always_inline__, __nodebug__, \ | |
| 23 | __target__("avx512vl,no-evex512"), \ | |
| 21 | __attribute__((__always_inline__, __nodebug__, __target__("avx512vl"), \ | |
| 24 | 22 | __min_vector_width__(256))) |
| 25 | 23 | |
| 24 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 25 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 26 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 27 | #else | |
| 28 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 29 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 30 | #endif | |
| 31 | ||
| 26 | 32 | typedef short __v2hi __attribute__((__vector_size__(4))); |
| 27 | 33 | typedef char __v4qi __attribute__((__vector_size__(4))); |
| 28 | 34 | typedef char __v2qi __attribute__((__vector_size__(2))); |
| ... | ... | @@ -229,209 +235,183 @@ typedef char __v2qi __attribute__((__vector_size__(2))); |
| 229 | 235 | #define _mm256_mask_cmpneq_epu64_mask(k, A, B) \ |
| 230 | 236 | _mm256_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE) |
| 231 | 237 | |
| 232 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 233 | _mm256_mask_add_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) | |
| 234 | { | |
| 238 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 239 | _mm256_mask_add_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { | |
| 235 | 240 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 236 | 241 | (__v8si)_mm256_add_epi32(__A, __B), |
| 237 | 242 | (__v8si)__W); |
| 238 | 243 | } |
| 239 | 244 | |
| 240 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 241 | _mm256_maskz_add_epi32(__mmask8 __U, __m256i __A, __m256i __B) | |
| 242 | { | |
| 245 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 246 | _mm256_maskz_add_epi32(__mmask8 __U, __m256i __A, __m256i __B) { | |
| 243 | 247 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 244 | 248 | (__v8si)_mm256_add_epi32(__A, __B), |
| 245 | 249 | (__v8si)_mm256_setzero_si256()); |
| 246 | 250 | } |
| 247 | 251 | |
| 248 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 249 | _mm256_mask_add_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) | |
| 250 | { | |
| 252 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 253 | _mm256_mask_add_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { | |
| 251 | 254 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 252 | 255 | (__v4di)_mm256_add_epi64(__A, __B), |
| 253 | 256 | (__v4di)__W); |
| 254 | 257 | } |
| 255 | 258 | |
| 256 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 257 | _mm256_maskz_add_epi64(__mmask8 __U, __m256i __A, __m256i __B) | |
| 258 | { | |
| 259 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 260 | _mm256_maskz_add_epi64(__mmask8 __U, __m256i __A, __m256i __B) { | |
| 259 | 261 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 260 | 262 | (__v4di)_mm256_add_epi64(__A, __B), |
| 261 | 263 | (__v4di)_mm256_setzero_si256()); |
| 262 | 264 | } |
| 263 | 265 | |
| 264 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 265 | _mm256_mask_sub_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) | |
| 266 | { | |
| 266 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 267 | _mm256_mask_sub_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { | |
| 267 | 268 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 268 | 269 | (__v8si)_mm256_sub_epi32(__A, __B), |
| 269 | 270 | (__v8si)__W); |
| 270 | 271 | } |
| 271 | 272 | |
| 272 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 273 | _mm256_maskz_sub_epi32(__mmask8 __U, __m256i __A, __m256i __B) | |
| 274 | { | |
| 273 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 274 | _mm256_maskz_sub_epi32(__mmask8 __U, __m256i __A, __m256i __B) { | |
| 275 | 275 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 276 | 276 | (__v8si)_mm256_sub_epi32(__A, __B), |
| 277 | 277 | (__v8si)_mm256_setzero_si256()); |
| 278 | 278 | } |
| 279 | 279 | |
| 280 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 281 | _mm256_mask_sub_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) | |
| 282 | { | |
| 280 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 281 | _mm256_mask_sub_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { | |
| 283 | 282 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 284 | 283 | (__v4di)_mm256_sub_epi64(__A, __B), |
| 285 | 284 | (__v4di)__W); |
| 286 | 285 | } |
| 287 | 286 | |
| 288 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 289 | _mm256_maskz_sub_epi64(__mmask8 __U, __m256i __A, __m256i __B) | |
| 290 | { | |
| 287 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 288 | _mm256_maskz_sub_epi64(__mmask8 __U, __m256i __A, __m256i __B) { | |
| 291 | 289 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 292 | 290 | (__v4di)_mm256_sub_epi64(__A, __B), |
| 293 | 291 | (__v4di)_mm256_setzero_si256()); |
| 294 | 292 | } |
| 295 | 293 | |
| 296 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 297 | _mm_mask_add_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 298 | { | |
| 294 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 295 | _mm_mask_add_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 299 | 296 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 300 | 297 | (__v4si)_mm_add_epi32(__A, __B), |
| 301 | 298 | (__v4si)__W); |
| 302 | 299 | } |
| 303 | 300 | |
| 304 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 305 | _mm_maskz_add_epi32(__mmask8 __U, __m128i __A, __m128i __B) | |
| 306 | { | |
| 301 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 302 | _mm_maskz_add_epi32(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 307 | 303 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 308 | 304 | (__v4si)_mm_add_epi32(__A, __B), |
| 309 | 305 | (__v4si)_mm_setzero_si128()); |
| 310 | 306 | } |
| 311 | 307 | |
| 312 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 313 | _mm_mask_add_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 314 | { | |
| 308 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 309 | _mm_mask_add_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 315 | 310 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 316 | 311 | (__v2di)_mm_add_epi64(__A, __B), |
| 317 | 312 | (__v2di)__W); |
| 318 | 313 | } |
| 319 | 314 | |
| 320 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 321 | _mm_maskz_add_epi64(__mmask8 __U, __m128i __A, __m128i __B) | |
| 322 | { | |
| 315 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 316 | _mm_maskz_add_epi64(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 323 | 317 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 324 | 318 | (__v2di)_mm_add_epi64(__A, __B), |
| 325 | 319 | (__v2di)_mm_setzero_si128()); |
| 326 | 320 | } |
| 327 | 321 | |
| 328 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 329 | _mm_mask_sub_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 330 | { | |
| 322 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 323 | _mm_mask_sub_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 331 | 324 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 332 | 325 | (__v4si)_mm_sub_epi32(__A, __B), |
| 333 | 326 | (__v4si)__W); |
| 334 | 327 | } |
| 335 | 328 | |
| 336 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 337 | _mm_maskz_sub_epi32(__mmask8 __U, __m128i __A, __m128i __B) | |
| 338 | { | |
| 329 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 330 | _mm_maskz_sub_epi32(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 339 | 331 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 340 | 332 | (__v4si)_mm_sub_epi32(__A, __B), |
| 341 | 333 | (__v4si)_mm_setzero_si128()); |
| 342 | 334 | } |
| 343 | 335 | |
| 344 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 345 | _mm_mask_sub_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 346 | { | |
| 336 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 337 | _mm_mask_sub_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 347 | 338 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 348 | 339 | (__v2di)_mm_sub_epi64(__A, __B), |
| 349 | 340 | (__v2di)__W); |
| 350 | 341 | } |
| 351 | 342 | |
| 352 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 353 | _mm_maskz_sub_epi64(__mmask8 __U, __m128i __A, __m128i __B) | |
| 354 | { | |
| 343 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 344 | _mm_maskz_sub_epi64(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 355 | 345 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 356 | 346 | (__v2di)_mm_sub_epi64(__A, __B), |
| 357 | 347 | (__v2di)_mm_setzero_si128()); |
| 358 | 348 | } |
| 359 | 349 | |
| 360 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 361 | _mm256_mask_mul_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) | |
| 362 | { | |
| 350 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 351 | _mm256_mask_mul_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) { | |
| 363 | 352 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 364 | 353 | (__v4di)_mm256_mul_epi32(__X, __Y), |
| 365 | 354 | (__v4di)__W); |
| 366 | 355 | } |
| 367 | 356 | |
| 368 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 369 | _mm256_maskz_mul_epi32(__mmask8 __M, __m256i __X, __m256i __Y) | |
| 370 | { | |
| 357 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 358 | _mm256_maskz_mul_epi32(__mmask8 __M, __m256i __X, __m256i __Y) { | |
| 371 | 359 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 372 | 360 | (__v4di)_mm256_mul_epi32(__X, __Y), |
| 373 | 361 | (__v4di)_mm256_setzero_si256()); |
| 374 | 362 | } |
| 375 | 363 | |
| 376 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 377 | _mm_mask_mul_epi32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) | |
| 378 | { | |
| 364 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 365 | _mm_mask_mul_epi32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) { | |
| 379 | 366 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 380 | 367 | (__v2di)_mm_mul_epi32(__X, __Y), |
| 381 | 368 | (__v2di)__W); |
| 382 | 369 | } |
| 383 | 370 | |
| 384 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 385 | _mm_maskz_mul_epi32(__mmask8 __M, __m128i __X, __m128i __Y) | |
| 386 | { | |
| 371 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 372 | _mm_maskz_mul_epi32(__mmask8 __M, __m128i __X, __m128i __Y) { | |
| 387 | 373 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 388 | 374 | (__v2di)_mm_mul_epi32(__X, __Y), |
| 389 | 375 | (__v2di)_mm_setzero_si128()); |
| 390 | 376 | } |
| 391 | 377 | |
| 392 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 393 | _mm256_mask_mul_epu32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) | |
| 394 | { | |
| 378 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 379 | _mm256_mask_mul_epu32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) { | |
| 395 | 380 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 396 | 381 | (__v4di)_mm256_mul_epu32(__X, __Y), |
| 397 | 382 | (__v4di)__W); |
| 398 | 383 | } |
| 399 | 384 | |
| 400 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 401 | _mm256_maskz_mul_epu32(__mmask8 __M, __m256i __X, __m256i __Y) | |
| 402 | { | |
| 385 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 386 | _mm256_maskz_mul_epu32(__mmask8 __M, __m256i __X, __m256i __Y) { | |
| 403 | 387 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 404 | 388 | (__v4di)_mm256_mul_epu32(__X, __Y), |
| 405 | 389 | (__v4di)_mm256_setzero_si256()); |
| 406 | 390 | } |
| 407 | 391 | |
| 408 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 409 | _mm_mask_mul_epu32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) | |
| 410 | { | |
| 392 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 393 | _mm_mask_mul_epu32(__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) { | |
| 411 | 394 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 412 | 395 | (__v2di)_mm_mul_epu32(__X, __Y), |
| 413 | 396 | (__v2di)__W); |
| 414 | 397 | } |
| 415 | 398 | |
| 416 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 417 | _mm_maskz_mul_epu32(__mmask8 __M, __m128i __X, __m128i __Y) | |
| 418 | { | |
| 399 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 400 | _mm_maskz_mul_epu32(__mmask8 __M, __m128i __X, __m128i __Y) { | |
| 419 | 401 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 420 | 402 | (__v2di)_mm_mul_epu32(__X, __Y), |
| 421 | 403 | (__v2di)_mm_setzero_si128()); |
| 422 | 404 | } |
| 423 | 405 | |
| 424 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 425 | _mm256_maskz_mullo_epi32(__mmask8 __M, __m256i __A, __m256i __B) | |
| 426 | { | |
| 406 | static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 407 | _mm256_maskz_mullo_epi32(__mmask8 __M, __m256i __A, __m256i __B) { | |
| 427 | 408 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 428 | 409 | (__v8si)_mm256_mullo_epi32(__A, __B), |
| 429 | 410 | (__v8si)_mm256_setzero_si256()); |
| 430 | 411 | } |
| 431 | 412 | |
| 432 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 433 | _mm256_mask_mullo_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) | |
| 434 | { | |
| 413 | static __inline__ __m256i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 414 | _mm256_mask_mullo_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 435 | 415 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 436 | 416 | (__v8si)_mm256_mullo_epi32(__A, __B), |
| 437 | 417 | (__v8si)__W); |
| ... | ... | @@ -453,9 +433,8 @@ _mm_mask_mullo_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) |
| 453 | 433 | (__v4si)__W); |
| 454 | 434 | } |
| 455 | 435 | |
| 456 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 457 | _mm256_and_epi32(__m256i __a, __m256i __b) | |
| 458 | { | |
| 436 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 437 | _mm256_and_epi32(__m256i __a, __m256i __b) { | |
| 459 | 438 | return (__m256i)((__v8su)__a & (__v8su)__b); |
| 460 | 439 | } |
| 461 | 440 | |
| ... | ... | @@ -473,9 +452,8 @@ _mm256_maskz_and_epi32(__mmask8 __U, __m256i __A, __m256i __B) |
| 473 | 452 | return (__m256i)_mm256_mask_and_epi32(_mm256_setzero_si256(), __U, __A, __B); |
| 474 | 453 | } |
| 475 | 454 | |
| 476 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 477 | _mm_and_epi32(__m128i __a, __m128i __b) | |
| 478 | { | |
| 455 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 456 | _mm_and_epi32(__m128i __a, __m128i __b) { | |
| 479 | 457 | return (__m128i)((__v4su)__a & (__v4su)__b); |
| 480 | 458 | } |
| 481 | 459 | |
| ... | ... | @@ -896,329 +874,312 @@ _mm_maskz_xor_epi64(__mmask8 __U, __m128i __A, __m128i __B) |
| 896 | 874 | (__v2df)(__m128d)(b), (int)(p), \ |
| 897 | 875 | (__mmask8)(m))) |
| 898 | 876 | |
| 899 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 900 | _mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) | |
| 901 | { | |
| 902 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 903 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 904 | (__v2df) __B, | |
| 905 | (__v2df) __C), | |
| 906 | (__v2df) __A); | |
| 877 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 878 | _mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { | |
| 879 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 880 | (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C), (__v2df)__A); | |
| 907 | 881 | } |
| 908 | 882 | |
| 909 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 910 | _mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) | |
| 911 | { | |
| 912 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 913 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 914 | (__v2df) __B, | |
| 915 | (__v2df) __C), | |
| 916 | (__v2df) __C); | |
| 883 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 884 | _mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { | |
| 885 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 886 | (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C), (__v2df)__C); | |
| 917 | 887 | } |
| 918 | 888 | |
| 919 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 920 | _mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) | |
| 921 | { | |
| 922 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 923 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 924 | (__v2df) __B, | |
| 925 | (__v2df) __C), | |
| 926 | (__v2df)_mm_setzero_pd()); | |
| 889 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 890 | _mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { | |
| 891 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 892 | (__mmask8)__U, (__v2df)_mm_fmadd_pd(__A, __B, __C), | |
| 893 | (__v2df)_mm_setzero_pd()); | |
| 927 | 894 | } |
| 928 | 895 | |
| 929 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 930 | _mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) | |
| 931 | { | |
| 932 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 933 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 934 | (__v2df) __B, | |
| 935 | -(__v2df) __C), | |
| 936 | (__v2df) __A); | |
| 896 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 897 | _mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { | |
| 898 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 899 | (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C), (__v2df)__A); | |
| 937 | 900 | } |
| 938 | 901 | |
| 939 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 940 | _mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) | |
| 941 | { | |
| 942 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 943 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 944 | (__v2df) __B, | |
| 945 | -(__v2df) __C), | |
| 946 | (__v2df)_mm_setzero_pd()); | |
| 902 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 903 | _mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { | |
| 904 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 905 | (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C), (__v2df)__C); | |
| 947 | 906 | } |
| 948 | 907 | |
| 949 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 950 | _mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) | |
| 951 | { | |
| 952 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 953 | __builtin_ia32_vfmaddpd (-(__v2df) __A, | |
| 954 | (__v2df) __B, | |
| 955 | (__v2df) __C), | |
| 956 | (__v2df) __C); | |
| 908 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 909 | _mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { | |
| 910 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 911 | (__mmask8)__U, (__v2df)_mm_fmsub_pd(__A, __B, __C), | |
| 912 | (__v2df)_mm_setzero_pd()); | |
| 957 | 913 | } |
| 958 | 914 | |
| 959 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 960 | _mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) | |
| 961 | { | |
| 962 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 963 | __builtin_ia32_vfmaddpd (-(__v2df) __A, | |
| 964 | (__v2df) __B, | |
| 965 | (__v2df) __C), | |
| 966 | (__v2df)_mm_setzero_pd()); | |
| 915 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 916 | _mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { | |
| 917 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 918 | (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C), (__v2df)__A); | |
| 967 | 919 | } |
| 968 | 920 | |
| 969 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 970 | _mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) | |
| 971 | { | |
| 972 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 973 | __builtin_ia32_vfmaddpd (-(__v2df) __A, | |
| 974 | (__v2df) __B, | |
| 975 | -(__v2df) __C), | |
| 976 | (__v2df)_mm_setzero_pd()); | |
| 921 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 922 | _mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { | |
| 923 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 924 | (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C), (__v2df)__C); | |
| 977 | 925 | } |
| 978 | 926 | |
| 979 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 980 | _mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) | |
| 981 | { | |
| 982 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 983 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 984 | (__v4df) __B, | |
| 985 | (__v4df) __C), | |
| 986 | (__v4df) __A); | |
| 927 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 928 | _mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { | |
| 929 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 930 | (__mmask8)__U, (__v2df)_mm_fnmadd_pd(__A, __B, __C), | |
| 931 | (__v2df)_mm_setzero_pd()); | |
| 987 | 932 | } |
| 988 | 933 | |
| 989 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 990 | _mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) | |
| 991 | { | |
| 992 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 993 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 994 | (__v4df) __B, | |
| 995 | (__v4df) __C), | |
| 996 | (__v4df) __C); | |
| 934 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 935 | _mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { | |
| 936 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 937 | (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C), (__v2df)__A); | |
| 997 | 938 | } |
| 998 | 939 | |
| 999 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1000 | _mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) | |
| 1001 | { | |
| 1002 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1003 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 1004 | (__v4df) __B, | |
| 1005 | (__v4df) __C), | |
| 1006 | (__v4df)_mm256_setzero_pd()); | |
| 940 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 941 | _mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { | |
| 942 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 943 | (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C), (__v2df)__C); | |
| 1007 | 944 | } |
| 1008 | 945 | |
| 1009 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1010 | _mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) | |
| 1011 | { | |
| 1012 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1013 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 1014 | (__v4df) __B, | |
| 1015 | -(__v4df) __C), | |
| 1016 | (__v4df) __A); | |
| 946 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 947 | _mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { | |
| 948 | return (__m128d)__builtin_ia32_selectpd_128( | |
| 949 | (__mmask8)__U, (__v2df)_mm_fnmsub_pd(__A, __B, __C), | |
| 950 | (__v2df)_mm_setzero_pd()); | |
| 1017 | 951 | } |
| 1018 | 952 | |
| 1019 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1020 | _mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) | |
| 1021 | { | |
| 1022 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1023 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 1024 | (__v4df) __B, | |
| 1025 | -(__v4df) __C), | |
| 1026 | (__v4df)_mm256_setzero_pd()); | |
| 953 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 954 | _mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { | |
| 955 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 956 | (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C), (__v4df)__A); | |
| 1027 | 957 | } |
| 1028 | 958 | |
| 1029 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1030 | _mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) | |
| 1031 | { | |
| 1032 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1033 | __builtin_ia32_vfmaddpd256 (-(__v4df) __A, | |
| 1034 | (__v4df) __B, | |
| 1035 | (__v4df) __C), | |
| 1036 | (__v4df) __C); | |
| 959 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 960 | _mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { | |
| 961 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 962 | (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C), (__v4df)__C); | |
| 1037 | 963 | } |
| 1038 | 964 | |
| 1039 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1040 | _mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) | |
| 1041 | { | |
| 1042 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1043 | __builtin_ia32_vfmaddpd256 (-(__v4df) __A, | |
| 1044 | (__v4df) __B, | |
| 1045 | (__v4df) __C), | |
| 1046 | (__v4df)_mm256_setzero_pd()); | |
| 965 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 966 | _mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { | |
| 967 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 968 | (__mmask8)__U, (__v4df)_mm256_fmadd_pd(__A, __B, __C), | |
| 969 | (__v4df)_mm256_setzero_pd()); | |
| 1047 | 970 | } |
| 1048 | 971 | |
| 1049 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1050 | _mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) | |
| 1051 | { | |
| 1052 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1053 | __builtin_ia32_vfmaddpd256 (-(__v4df) __A, | |
| 1054 | (__v4df) __B, | |
| 1055 | -(__v4df) __C), | |
| 1056 | (__v4df)_mm256_setzero_pd()); | |
| 972 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 973 | _mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { | |
| 974 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 975 | (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C), (__v4df)__A); | |
| 1057 | 976 | } |
| 1058 | 977 | |
| 1059 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1060 | _mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) | |
| 1061 | { | |
| 1062 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1063 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1064 | (__v4sf) __B, | |
| 1065 | (__v4sf) __C), | |
| 1066 | (__v4sf) __A); | |
| 978 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 979 | _mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { | |
| 980 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 981 | (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C), (__v4df)__C); | |
| 1067 | 982 | } |
| 1068 | 983 | |
| 1069 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1070 | _mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) | |
| 1071 | { | |
| 1072 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1073 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1074 | (__v4sf) __B, | |
| 1075 | (__v4sf) __C), | |
| 1076 | (__v4sf) __C); | |
| 984 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 985 | _mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { | |
| 986 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 987 | (__mmask8)__U, (__v4df)_mm256_fmsub_pd(__A, __B, __C), | |
| 988 | (__v4df)_mm256_setzero_pd()); | |
| 1077 | 989 | } |
| 1078 | 990 | |
| 1079 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1080 | _mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) | |
| 1081 | { | |
| 1082 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1083 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1084 | (__v4sf) __B, | |
| 1085 | (__v4sf) __C), | |
| 1086 | (__v4sf)_mm_setzero_ps()); | |
| 991 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 992 | _mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { | |
| 993 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 994 | (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C), (__v4df)__A); | |
| 1087 | 995 | } |
| 1088 | 996 | |
| 1089 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1090 | _mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) | |
| 1091 | { | |
| 1092 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1093 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1094 | (__v4sf) __B, | |
| 1095 | -(__v4sf) __C), | |
| 1096 | (__v4sf) __A); | |
| 997 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 998 | _mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { | |
| 999 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 1000 | (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C), (__v4df)__C); | |
| 1097 | 1001 | } |
| 1098 | 1002 | |
| 1099 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1100 | _mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) | |
| 1101 | { | |
| 1102 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1103 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1104 | (__v4sf) __B, | |
| 1105 | -(__v4sf) __C), | |
| 1106 | (__v4sf)_mm_setzero_ps()); | |
| 1003 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1004 | _mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { | |
| 1005 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 1006 | (__mmask8)__U, (__v4df)_mm256_fnmadd_pd(__A, __B, __C), | |
| 1007 | (__v4df)_mm256_setzero_pd()); | |
| 1107 | 1008 | } |
| 1108 | 1009 | |
| 1109 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1110 | _mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) | |
| 1111 | { | |
| 1112 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1113 | __builtin_ia32_vfmaddps (-(__v4sf) __A, | |
| 1114 | (__v4sf) __B, | |
| 1115 | (__v4sf) __C), | |
| 1116 | (__v4sf) __C); | |
| 1010 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1011 | _mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { | |
| 1012 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 1013 | (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C), (__v4df)__A); | |
| 1117 | 1014 | } |
| 1118 | 1015 | |
| 1119 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1120 | _mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) | |
| 1121 | { | |
| 1122 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1123 | __builtin_ia32_vfmaddps (-(__v4sf) __A, | |
| 1124 | (__v4sf) __B, | |
| 1125 | (__v4sf) __C), | |
| 1126 | (__v4sf)_mm_setzero_ps()); | |
| 1016 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1017 | _mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { | |
| 1018 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 1019 | (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C), (__v4df)__C); | |
| 1127 | 1020 | } |
| 1128 | 1021 | |
| 1129 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1130 | _mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) | |
| 1131 | { | |
| 1132 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1133 | __builtin_ia32_vfmaddps (-(__v4sf) __A, | |
| 1134 | (__v4sf) __B, | |
| 1135 | -(__v4sf) __C), | |
| 1136 | (__v4sf)_mm_setzero_ps()); | |
| 1022 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1023 | _mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { | |
| 1024 | return (__m256d)__builtin_ia32_selectpd_256( | |
| 1025 | (__mmask8)__U, (__v4df)_mm256_fnmsub_pd(__A, __B, __C), | |
| 1026 | (__v4df)_mm256_setzero_pd()); | |
| 1137 | 1027 | } |
| 1138 | 1028 | |
| 1139 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1140 | _mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) | |
| 1141 | { | |
| 1142 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1143 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1144 | (__v8sf) __B, | |
| 1145 | (__v8sf) __C), | |
| 1146 | (__v8sf) __A); | |
| 1029 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1030 | _mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { | |
| 1031 | return (__m128)__builtin_ia32_selectps_128( | |
| 1032 | (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C), (__v4sf)__A); | |
| 1147 | 1033 | } |
| 1148 | 1034 | |
| 1149 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1150 | _mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) | |
| 1151 | { | |
| 1152 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1153 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1154 | (__v8sf) __B, | |
| 1155 | (__v8sf) __C), | |
| 1156 | (__v8sf) __C); | |
| 1035 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1036 | _mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { | |
| 1037 | return (__m128)__builtin_ia32_selectps_128( | |
| 1038 | (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C), (__v4sf)__C); | |
| 1157 | 1039 | } |
| 1158 | 1040 | |
| 1159 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1160 | _mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) | |
| 1161 | { | |
| 1162 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1163 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1164 | (__v8sf) __B, | |
| 1165 | (__v8sf) __C), | |
| 1166 | (__v8sf)_mm256_setzero_ps()); | |
| 1041 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1042 | _mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { | |
| 1043 | return (__m128)__builtin_ia32_selectps_128( | |
| 1044 | (__mmask8)__U, (__v4sf)_mm_fmadd_ps(__A, __B, __C), | |
| 1045 | (__v4sf)_mm_setzero_ps()); | |
| 1167 | 1046 | } |
| 1168 | 1047 | |
| 1169 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1170 | _mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) | |
| 1171 | { | |
| 1172 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1173 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1174 | (__v8sf) __B, | |
| 1175 | -(__v8sf) __C), | |
| 1176 | (__v8sf) __A); | |
| 1048 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1049 | _mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { | |
| 1050 | return (__m128)__builtin_ia32_selectps_128( | |
| 1051 | (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C), (__v4sf)__A); | |
| 1177 | 1052 | } |
| 1178 | 1053 | |
| 1179 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1180 | _mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) | |
| 1181 | { | |
| 1182 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1183 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1184 | (__v8sf) __B, | |
| 1185 | -(__v8sf) __C), | |
| 1186 | (__v8sf)_mm256_setzero_ps()); | |
| 1054 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1055 | _mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { | |
| 1056 | return (__m128)__builtin_ia32_selectps_128( | |
| 1057 | (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C), (__v4sf)__C); | |
| 1187 | 1058 | } |
| 1188 | 1059 | |
| 1189 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1190 | _mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) | |
| 1191 | { | |
| 1192 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1193 | __builtin_ia32_vfmaddps256 (-(__v8sf) __A, | |
| 1194 | (__v8sf) __B, | |
| 1195 | (__v8sf) __C), | |
| 1196 | (__v8sf) __C); | |
| 1060 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1061 | _mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { | |
| 1062 | return (__m128)__builtin_ia32_selectps_128( | |
| 1063 | (__mmask8)__U, (__v4sf)_mm_fmsub_ps(__A, __B, __C), | |
| 1064 | (__v4sf)_mm_setzero_ps()); | |
| 1197 | 1065 | } |
| 1198 | 1066 | |
| 1199 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1200 | _mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) | |
| 1201 | { | |
| 1202 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1203 | __builtin_ia32_vfmaddps256 (-(__v8sf) __A, | |
| 1204 | (__v8sf) __B, | |
| 1205 | (__v8sf) __C), | |
| 1206 | (__v8sf)_mm256_setzero_ps()); | |
| 1067 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1068 | _mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { | |
| 1069 | return (__m128)__builtin_ia32_selectps_128( | |
| 1070 | (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C), (__v4sf)__A); | |
| 1207 | 1071 | } |
| 1208 | 1072 | |
| 1209 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1210 | _mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) | |
| 1211 | { | |
| 1212 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1213 | __builtin_ia32_vfmaddps256 (-(__v8sf) __A, | |
| 1214 | (__v8sf) __B, | |
| 1215 | -(__v8sf) __C), | |
| 1216 | (__v8sf)_mm256_setzero_ps()); | |
| 1073 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1074 | _mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { | |
| 1075 | return (__m128)__builtin_ia32_selectps_128( | |
| 1076 | (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C), (__v4sf)__C); | |
| 1077 | } | |
| 1078 | ||
| 1079 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1080 | _mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { | |
| 1081 | return (__m128)__builtin_ia32_selectps_128( | |
| 1082 | (__mmask8)__U, (__v4sf)_mm_fnmadd_ps(__A, __B, __C), | |
| 1083 | (__v4sf)_mm_setzero_ps()); | |
| 1084 | } | |
| 1085 | ||
| 1086 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1087 | _mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { | |
| 1088 | return (__m128)__builtin_ia32_selectps_128( | |
| 1089 | (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C), (__v4sf)__A); | |
| 1090 | } | |
| 1091 | ||
| 1092 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1093 | _mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { | |
| 1094 | return (__m128)__builtin_ia32_selectps_128( | |
| 1095 | (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C), (__v4sf)__C); | |
| 1096 | } | |
| 1097 | ||
| 1098 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1099 | _mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { | |
| 1100 | return (__m128)__builtin_ia32_selectps_128( | |
| 1101 | (__mmask8)__U, (__v4sf)_mm_fnmsub_ps(__A, __B, __C), | |
| 1102 | (__v4sf)_mm_setzero_ps()); | |
| 1103 | } | |
| 1104 | ||
| 1105 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1106 | _mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { | |
| 1107 | return (__m256)__builtin_ia32_selectps_256( | |
| 1108 | (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C), (__v8sf)__A); | |
| 1109 | } | |
| 1110 | ||
| 1111 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1112 | _mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { | |
| 1113 | return (__m256)__builtin_ia32_selectps_256( | |
| 1114 | (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C), (__v8sf)__C); | |
| 1115 | } | |
| 1116 | ||
| 1117 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1118 | _mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { | |
| 1119 | return (__m256)__builtin_ia32_selectps_256( | |
| 1120 | (__mmask8)__U, (__v8sf)_mm256_fmadd_ps(__A, __B, __C), | |
| 1121 | (__v8sf)_mm256_setzero_ps()); | |
| 1122 | } | |
| 1123 | ||
| 1124 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1125 | _mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { | |
| 1126 | return (__m256)__builtin_ia32_selectps_256( | |
| 1127 | (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C), (__v8sf)__A); | |
| 1128 | } | |
| 1129 | ||
| 1130 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1131 | _mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { | |
| 1132 | return (__m256)__builtin_ia32_selectps_256( | |
| 1133 | (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C), (__v8sf)__C); | |
| 1134 | } | |
| 1135 | ||
| 1136 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1137 | _mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { | |
| 1138 | return (__m256)__builtin_ia32_selectps_256( | |
| 1139 | (__mmask8)__U, (__v8sf)_mm256_fmsub_ps(__A, __B, __C), | |
| 1140 | (__v8sf)_mm256_setzero_ps()); | |
| 1141 | } | |
| 1142 | ||
| 1143 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1144 | _mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { | |
| 1145 | return (__m256)__builtin_ia32_selectps_256( | |
| 1146 | (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C), (__v8sf)__A); | |
| 1147 | } | |
| 1148 | ||
| 1149 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1150 | _mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { | |
| 1151 | return (__m256)__builtin_ia32_selectps_256( | |
| 1152 | (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C), (__v8sf)__C); | |
| 1153 | } | |
| 1154 | ||
| 1155 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1156 | _mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { | |
| 1157 | return (__m256)__builtin_ia32_selectps_256( | |
| 1158 | (__mmask8)__U, (__v8sf)_mm256_fnmadd_ps(__A, __B, __C), | |
| 1159 | (__v8sf)_mm256_setzero_ps()); | |
| 1160 | } | |
| 1161 | ||
| 1162 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1163 | _mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { | |
| 1164 | return (__m256)__builtin_ia32_selectps_256( | |
| 1165 | (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C), (__v8sf)__A); | |
| 1166 | } | |
| 1167 | ||
| 1168 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1169 | _mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { | |
| 1170 | return (__m256)__builtin_ia32_selectps_256( | |
| 1171 | (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C), (__v8sf)__C); | |
| 1172 | } | |
| 1173 | ||
| 1174 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1175 | _mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { | |
| 1176 | return (__m256)__builtin_ia32_selectps_256( | |
| 1177 | (__mmask8)__U, (__v8sf)_mm256_fnmsub_ps(__A, __B, __C), | |
| 1178 | (__v8sf)_mm256_setzero_ps()); | |
| 1217 | 1179 | } |
| 1218 | 1180 | |
| 1219 | 1181 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 |
| 1220 | _mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) | |
| 1221 | { | |
| 1182 | _mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { | |
| 1222 | 1183 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, |
| 1223 | 1184 | __builtin_ia32_vfmaddsubpd ((__v2df) __A, |
| 1224 | 1185 | (__v2df) __B, |
| ... | ... | @@ -1417,46 +1378,6 @@ _mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) |
| 1417 | 1378 | (__v8sf)_mm256_setzero_ps()); |
| 1418 | 1379 | } |
| 1419 | 1380 | |
| 1420 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1421 | _mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) | |
| 1422 | { | |
| 1423 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 1424 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 1425 | (__v2df) __B, | |
| 1426 | -(__v2df) __C), | |
| 1427 | (__v2df) __C); | |
| 1428 | } | |
| 1429 | ||
| 1430 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1431 | _mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) | |
| 1432 | { | |
| 1433 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1434 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 1435 | (__v4df) __B, | |
| 1436 | -(__v4df) __C), | |
| 1437 | (__v4df) __C); | |
| 1438 | } | |
| 1439 | ||
| 1440 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1441 | _mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) | |
| 1442 | { | |
| 1443 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1444 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1445 | (__v4sf) __B, | |
| 1446 | -(__v4sf) __C), | |
| 1447 | (__v4sf) __C); | |
| 1448 | } | |
| 1449 | ||
| 1450 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1451 | _mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) | |
| 1452 | { | |
| 1453 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1454 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1455 | (__v8sf) __B, | |
| 1456 | -(__v8sf) __C), | |
| 1457 | (__v8sf) __C); | |
| 1458 | } | |
| 1459 | ||
| 1460 | 1381 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 |
| 1461 | 1382 | _mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) |
| 1462 | 1383 | { |
| ... | ... | @@ -1497,233 +1418,113 @@ _mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) |
| 1497 | 1418 | (__v8sf) __C); |
| 1498 | 1419 | } |
| 1499 | 1420 | |
| 1500 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1501 | _mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) | |
| 1502 | { | |
| 1503 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 1504 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 1505 | -(__v2df) __B, | |
| 1506 | (__v2df) __C), | |
| 1507 | (__v2df) __A); | |
| 1508 | } | |
| 1509 | ||
| 1510 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1511 | _mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) | |
| 1512 | { | |
| 1513 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1514 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 1515 | -(__v4df) __B, | |
| 1516 | (__v4df) __C), | |
| 1517 | (__v4df) __A); | |
| 1518 | } | |
| 1519 | ||
| 1520 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1521 | _mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) | |
| 1522 | { | |
| 1523 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1524 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1525 | -(__v4sf) __B, | |
| 1526 | (__v4sf) __C), | |
| 1527 | (__v4sf) __A); | |
| 1528 | } | |
| 1529 | ||
| 1530 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1531 | _mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) | |
| 1532 | { | |
| 1533 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1534 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1535 | -(__v8sf) __B, | |
| 1536 | (__v8sf) __C), | |
| 1537 | (__v8sf) __A); | |
| 1538 | } | |
| 1539 | ||
| 1540 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1541 | _mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) | |
| 1542 | { | |
| 1543 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 1544 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 1545 | -(__v2df) __B, | |
| 1546 | -(__v2df) __C), | |
| 1547 | (__v2df) __A); | |
| 1548 | } | |
| 1549 | ||
| 1550 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1551 | _mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) | |
| 1552 | { | |
| 1553 | return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, | |
| 1554 | __builtin_ia32_vfmaddpd ((__v2df) __A, | |
| 1555 | -(__v2df) __B, | |
| 1556 | -(__v2df) __C), | |
| 1557 | (__v2df) __C); | |
| 1558 | } | |
| 1559 | ||
| 1560 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1561 | _mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) | |
| 1562 | { | |
| 1563 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1564 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 1565 | -(__v4df) __B, | |
| 1566 | -(__v4df) __C), | |
| 1567 | (__v4df) __A); | |
| 1568 | } | |
| 1569 | ||
| 1570 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1571 | _mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) | |
| 1572 | { | |
| 1573 | return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, | |
| 1574 | __builtin_ia32_vfmaddpd256 ((__v4df) __A, | |
| 1575 | -(__v4df) __B, | |
| 1576 | -(__v4df) __C), | |
| 1577 | (__v4df) __C); | |
| 1578 | } | |
| 1579 | ||
| 1580 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1581 | _mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) | |
| 1582 | { | |
| 1583 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1584 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1585 | -(__v4sf) __B, | |
| 1586 | -(__v4sf) __C), | |
| 1587 | (__v4sf) __A); | |
| 1588 | } | |
| 1589 | ||
| 1590 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1591 | _mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) | |
| 1592 | { | |
| 1593 | return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, | |
| 1594 | __builtin_ia32_vfmaddps ((__v4sf) __A, | |
| 1595 | -(__v4sf) __B, | |
| 1596 | -(__v4sf) __C), | |
| 1597 | (__v4sf) __C); | |
| 1598 | } | |
| 1599 | ||
| 1600 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1601 | _mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) | |
| 1602 | { | |
| 1603 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1604 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1605 | -(__v8sf) __B, | |
| 1606 | -(__v8sf) __C), | |
| 1607 | (__v8sf) __A); | |
| 1608 | } | |
| 1609 | ||
| 1610 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1611 | _mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) | |
| 1612 | { | |
| 1613 | return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, | |
| 1614 | __builtin_ia32_vfmaddps256 ((__v8sf) __A, | |
| 1615 | -(__v8sf) __B, | |
| 1616 | -(__v8sf) __C), | |
| 1617 | (__v8sf) __C); | |
| 1618 | } | |
| 1619 | ||
| 1620 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1421 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1621 | 1422 | _mm_mask_add_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { |
| 1622 | 1423 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 1623 | 1424 | (__v2df)_mm_add_pd(__A, __B), |
| 1624 | 1425 | (__v2df)__W); |
| 1625 | 1426 | } |
| 1626 | 1427 | |
| 1627 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1428 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1628 | 1429 | _mm_maskz_add_pd(__mmask8 __U, __m128d __A, __m128d __B) { |
| 1629 | 1430 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 1630 | 1431 | (__v2df)_mm_add_pd(__A, __B), |
| 1631 | 1432 | (__v2df)_mm_setzero_pd()); |
| 1632 | 1433 | } |
| 1633 | 1434 | |
| 1634 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1435 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1635 | 1436 | _mm256_mask_add_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { |
| 1636 | 1437 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 1637 | 1438 | (__v4df)_mm256_add_pd(__A, __B), |
| 1638 | 1439 | (__v4df)__W); |
| 1639 | 1440 | } |
| 1640 | 1441 | |
| 1641 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1442 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1642 | 1443 | _mm256_maskz_add_pd(__mmask8 __U, __m256d __A, __m256d __B) { |
| 1643 | 1444 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 1644 | 1445 | (__v4df)_mm256_add_pd(__A, __B), |
| 1645 | 1446 | (__v4df)_mm256_setzero_pd()); |
| 1646 | 1447 | } |
| 1647 | 1448 | |
| 1648 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1449 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1649 | 1450 | _mm_mask_add_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { |
| 1650 | 1451 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 1651 | 1452 | (__v4sf)_mm_add_ps(__A, __B), |
| 1652 | 1453 | (__v4sf)__W); |
| 1653 | 1454 | } |
| 1654 | 1455 | |
| 1655 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1456 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1656 | 1457 | _mm_maskz_add_ps(__mmask8 __U, __m128 __A, __m128 __B) { |
| 1657 | 1458 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 1658 | 1459 | (__v4sf)_mm_add_ps(__A, __B), |
| 1659 | 1460 | (__v4sf)_mm_setzero_ps()); |
| 1660 | 1461 | } |
| 1661 | 1462 | |
| 1662 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1463 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1663 | 1464 | _mm256_mask_add_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { |
| 1664 | 1465 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 1665 | 1466 | (__v8sf)_mm256_add_ps(__A, __B), |
| 1666 | 1467 | (__v8sf)__W); |
| 1667 | 1468 | } |
| 1668 | 1469 | |
| 1669 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1470 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1670 | 1471 | _mm256_maskz_add_ps(__mmask8 __U, __m256 __A, __m256 __B) { |
| 1671 | 1472 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 1672 | 1473 | (__v8sf)_mm256_add_ps(__A, __B), |
| 1673 | 1474 | (__v8sf)_mm256_setzero_ps()); |
| 1674 | 1475 | } |
| 1675 | 1476 | |
| 1676 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1677 | _mm_mask_blend_epi32 (__mmask8 __U, __m128i __A, __m128i __W) { | |
| 1477 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1478 | _mm_mask_blend_epi32(__mmask8 __U, __m128i __A, __m128i __W) { | |
| 1678 | 1479 | return (__m128i) __builtin_ia32_selectd_128 ((__mmask8) __U, |
| 1679 | 1480 | (__v4si) __W, |
| 1680 | 1481 | (__v4si) __A); |
| 1681 | 1482 | } |
| 1682 | 1483 | |
| 1683 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1684 | _mm256_mask_blend_epi32 (__mmask8 __U, __m256i __A, __m256i __W) { | |
| 1484 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1485 | _mm256_mask_blend_epi32(__mmask8 __U, __m256i __A, __m256i __W) { | |
| 1685 | 1486 | return (__m256i) __builtin_ia32_selectd_256 ((__mmask8) __U, |
| 1686 | 1487 | (__v8si) __W, |
| 1687 | 1488 | (__v8si) __A); |
| 1688 | 1489 | } |
| 1689 | 1490 | |
| 1690 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1691 | _mm_mask_blend_pd (__mmask8 __U, __m128d __A, __m128d __W) { | |
| 1491 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1492 | _mm_mask_blend_pd(__mmask8 __U, __m128d __A, __m128d __W) { | |
| 1692 | 1493 | return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U, |
| 1693 | 1494 | (__v2df) __W, |
| 1694 | 1495 | (__v2df) __A); |
| 1695 | 1496 | } |
| 1696 | 1497 | |
| 1697 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1698 | _mm256_mask_blend_pd (__mmask8 __U, __m256d __A, __m256d __W) { | |
| 1498 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1499 | _mm256_mask_blend_pd(__mmask8 __U, __m256d __A, __m256d __W) { | |
| 1699 | 1500 | return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U, |
| 1700 | 1501 | (__v4df) __W, |
| 1701 | 1502 | (__v4df) __A); |
| 1702 | 1503 | } |
| 1703 | 1504 | |
| 1704 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1705 | _mm_mask_blend_ps (__mmask8 __U, __m128 __A, __m128 __W) { | |
| 1505 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1506 | _mm_mask_blend_ps(__mmask8 __U, __m128 __A, __m128 __W) { | |
| 1706 | 1507 | return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U, |
| 1707 | 1508 | (__v4sf) __W, |
| 1708 | 1509 | (__v4sf) __A); |
| 1709 | 1510 | } |
| 1710 | 1511 | |
| 1711 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1712 | _mm256_mask_blend_ps (__mmask8 __U, __m256 __A, __m256 __W) { | |
| 1512 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1513 | _mm256_mask_blend_ps(__mmask8 __U, __m256 __A, __m256 __W) { | |
| 1713 | 1514 | return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U, |
| 1714 | 1515 | (__v8sf) __W, |
| 1715 | 1516 | (__v8sf) __A); |
| 1716 | 1517 | } |
| 1717 | 1518 | |
| 1718 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 1719 | _mm_mask_blend_epi64 (__mmask8 __U, __m128i __A, __m128i __W) { | |
| 1519 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1520 | _mm_mask_blend_epi64(__mmask8 __U, __m128i __A, __m128i __W) { | |
| 1720 | 1521 | return (__m128i) __builtin_ia32_selectq_128 ((__mmask8) __U, |
| 1721 | 1522 | (__v2di) __W, |
| 1722 | 1523 | (__v2di) __A); |
| 1723 | 1524 | } |
| 1724 | 1525 | |
| 1725 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 1726 | _mm256_mask_blend_epi64 (__mmask8 __U, __m256i __A, __m256i __W) { | |
| 1526 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1527 | _mm256_mask_blend_epi64(__mmask8 __U, __m256i __A, __m256i __W) { | |
| 1727 | 1528 | return (__m256i) __builtin_ia32_selectq_256 ((__mmask8) __U, |
| 1728 | 1529 | (__v4di) __W, |
| 1729 | 1530 | (__v4di) __A); |
| ... | ... | @@ -1905,57 +1706,57 @@ _mm256_mask_compressstoreu_epi32 (void *__P, __mmask8 __U, __m256i __A) { |
| 1905 | 1706 | (__mmask8) __U); |
| 1906 | 1707 | } |
| 1907 | 1708 | |
| 1908 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1909 | _mm_mask_cvtepi32_pd (__m128d __W, __mmask8 __U, __m128i __A) { | |
| 1709 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1710 | _mm_mask_cvtepi32_pd(__m128d __W, __mmask8 __U, __m128i __A) { | |
| 1910 | 1711 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U, |
| 1911 | 1712 | (__v2df)_mm_cvtepi32_pd(__A), |
| 1912 | 1713 | (__v2df)__W); |
| 1913 | 1714 | } |
| 1914 | 1715 | |
| 1915 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 1916 | _mm_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) { | |
| 1716 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1717 | _mm_maskz_cvtepi32_pd(__mmask8 __U, __m128i __A) { | |
| 1917 | 1718 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U, |
| 1918 | 1719 | (__v2df)_mm_cvtepi32_pd(__A), |
| 1919 | 1720 | (__v2df)_mm_setzero_pd()); |
| 1920 | 1721 | } |
| 1921 | 1722 | |
| 1922 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1923 | _mm256_mask_cvtepi32_pd (__m256d __W, __mmask8 __U, __m128i __A) { | |
| 1723 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1724 | _mm256_mask_cvtepi32_pd(__m256d __W, __mmask8 __U, __m128i __A) { | |
| 1924 | 1725 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U, |
| 1925 | 1726 | (__v4df)_mm256_cvtepi32_pd(__A), |
| 1926 | 1727 | (__v4df)__W); |
| 1927 | 1728 | } |
| 1928 | 1729 | |
| 1929 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 1930 | _mm256_maskz_cvtepi32_pd (__mmask8 __U, __m128i __A) { | |
| 1730 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1731 | _mm256_maskz_cvtepi32_pd(__mmask8 __U, __m128i __A) { | |
| 1931 | 1732 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U, |
| 1932 | 1733 | (__v4df)_mm256_cvtepi32_pd(__A), |
| 1933 | 1734 | (__v4df)_mm256_setzero_pd()); |
| 1934 | 1735 | } |
| 1935 | 1736 | |
| 1936 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1937 | _mm_mask_cvtepi32_ps (__m128 __W, __mmask8 __U, __m128i __A) { | |
| 1737 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1738 | _mm_mask_cvtepi32_ps(__m128 __W, __mmask8 __U, __m128i __A) { | |
| 1938 | 1739 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 1939 | 1740 | (__v4sf)_mm_cvtepi32_ps(__A), |
| 1940 | 1741 | (__v4sf)__W); |
| 1941 | 1742 | } |
| 1942 | 1743 | |
| 1943 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1944 | _mm_maskz_cvtepi32_ps (__mmask8 __U, __m128i __A) { | |
| 1744 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1745 | _mm_maskz_cvtepi32_ps(__mmask8 __U, __m128i __A) { | |
| 1945 | 1746 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 1946 | 1747 | (__v4sf)_mm_cvtepi32_ps(__A), |
| 1947 | 1748 | (__v4sf)_mm_setzero_ps()); |
| 1948 | 1749 | } |
| 1949 | 1750 | |
| 1950 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1951 | _mm256_mask_cvtepi32_ps (__m256 __W, __mmask8 __U, __m256i __A) { | |
| 1751 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1752 | _mm256_mask_cvtepi32_ps(__m256 __W, __mmask8 __U, __m256i __A) { | |
| 1952 | 1753 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 1953 | 1754 | (__v8sf)_mm256_cvtepi32_ps(__A), |
| 1954 | 1755 | (__v8sf)__W); |
| 1955 | 1756 | } |
| 1956 | 1757 | |
| 1957 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 1958 | _mm256_maskz_cvtepi32_ps (__mmask8 __U, __m256i __A) { | |
| 1758 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1759 | _mm256_maskz_cvtepi32_ps(__mmask8 __U, __m256i __A) { | |
| 1959 | 1760 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 1960 | 1761 | (__v8sf)_mm256_cvtepi32_ps(__A), |
| 1961 | 1762 | (__v8sf)_mm256_setzero_ps()); |
| ... | ... | @@ -1990,30 +1791,30 @@ _mm256_maskz_cvtpd_epi32 (__mmask8 __U, __m256d __A) { |
| 1990 | 1791 | (__v4si)_mm_setzero_si128()); |
| 1991 | 1792 | } |
| 1992 | 1793 | |
| 1993 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 1994 | _mm_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m128d __A) { | |
| 1794 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1795 | _mm_mask_cvtpd_ps(__m128 __W, __mmask8 __U, __m128d __A) { | |
| 1995 | 1796 | return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A, |
| 1996 | 1797 | (__v4sf) __W, |
| 1997 | 1798 | (__mmask8) __U); |
| 1998 | 1799 | } |
| 1999 | 1800 | |
| 2000 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2001 | _mm_maskz_cvtpd_ps (__mmask8 __U, __m128d __A) { | |
| 1801 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 1802 | _mm_maskz_cvtpd_ps(__mmask8 __U, __m128d __A) { | |
| 2002 | 1803 | return (__m128) __builtin_ia32_cvtpd2ps_mask ((__v2df) __A, |
| 2003 | 1804 | (__v4sf) |
| 2004 | 1805 | _mm_setzero_ps (), |
| 2005 | 1806 | (__mmask8) __U); |
| 2006 | 1807 | } |
| 2007 | 1808 | |
| 2008 | static __inline__ __m128 __DEFAULT_FN_ATTRS256 | |
| 2009 | _mm256_mask_cvtpd_ps (__m128 __W, __mmask8 __U, __m256d __A) { | |
| 1809 | static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1810 | _mm256_mask_cvtpd_ps(__m128 __W, __mmask8 __U, __m256d __A) { | |
| 2010 | 1811 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2011 | 1812 | (__v4sf)_mm256_cvtpd_ps(__A), |
| 2012 | 1813 | (__v4sf)__W); |
| 2013 | 1814 | } |
| 2014 | 1815 | |
| 2015 | static __inline__ __m128 __DEFAULT_FN_ATTRS256 | |
| 2016 | _mm256_maskz_cvtpd_ps (__mmask8 __U, __m256d __A) { | |
| 1816 | static __inline__ __m128 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 1817 | _mm256_maskz_cvtpd_ps(__mmask8 __U, __m256d __A) { | |
| 2017 | 1818 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2018 | 1819 | (__v4sf)_mm256_cvtpd_ps(__A), |
| 2019 | 1820 | (__v4sf)_mm_setzero_ps()); |
| ... | ... | @@ -2316,133 +2117,133 @@ _mm256_maskz_cvttps_epu32 (__mmask8 __U, __m256 __A) { |
| 2316 | 2117 | (__mmask8) __U); |
| 2317 | 2118 | } |
| 2318 | 2119 | |
| 2319 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2320 | _mm_cvtepu32_pd (__m128i __A) { | |
| 2120 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2121 | _mm_cvtepu32_pd(__m128i __A) { | |
| 2321 | 2122 | return (__m128d) __builtin_convertvector( |
| 2322 | 2123 | __builtin_shufflevector((__v4su)__A, (__v4su)__A, 0, 1), __v2df); |
| 2323 | 2124 | } |
| 2324 | 2125 | |
| 2325 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2326 | _mm_mask_cvtepu32_pd (__m128d __W, __mmask8 __U, __m128i __A) { | |
| 2126 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2127 | _mm_mask_cvtepu32_pd(__m128d __W, __mmask8 __U, __m128i __A) { | |
| 2327 | 2128 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U, |
| 2328 | 2129 | (__v2df)_mm_cvtepu32_pd(__A), |
| 2329 | 2130 | (__v2df)__W); |
| 2330 | 2131 | } |
| 2331 | 2132 | |
| 2332 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2333 | _mm_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) { | |
| 2133 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2134 | _mm_maskz_cvtepu32_pd(__mmask8 __U, __m128i __A) { | |
| 2334 | 2135 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8) __U, |
| 2335 | 2136 | (__v2df)_mm_cvtepu32_pd(__A), |
| 2336 | 2137 | (__v2df)_mm_setzero_pd()); |
| 2337 | 2138 | } |
| 2338 | 2139 | |
| 2339 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2340 | _mm256_cvtepu32_pd (__m128i __A) { | |
| 2140 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2141 | _mm256_cvtepu32_pd(__m128i __A) { | |
| 2341 | 2142 | return (__m256d)__builtin_convertvector((__v4su)__A, __v4df); |
| 2342 | 2143 | } |
| 2343 | 2144 | |
| 2344 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2345 | _mm256_mask_cvtepu32_pd (__m256d __W, __mmask8 __U, __m128i __A) { | |
| 2145 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2146 | _mm256_mask_cvtepu32_pd(__m256d __W, __mmask8 __U, __m128i __A) { | |
| 2346 | 2147 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U, |
| 2347 | 2148 | (__v4df)_mm256_cvtepu32_pd(__A), |
| 2348 | 2149 | (__v4df)__W); |
| 2349 | 2150 | } |
| 2350 | 2151 | |
| 2351 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2352 | _mm256_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) { | |
| 2152 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2153 | _mm256_maskz_cvtepu32_pd(__mmask8 __U, __m128i __A) { | |
| 2353 | 2154 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8) __U, |
| 2354 | 2155 | (__v4df)_mm256_cvtepu32_pd(__A), |
| 2355 | 2156 | (__v4df)_mm256_setzero_pd()); |
| 2356 | 2157 | } |
| 2357 | 2158 | |
| 2358 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2359 | _mm_cvtepu32_ps (__m128i __A) { | |
| 2159 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2160 | _mm_cvtepu32_ps(__m128i __A) { | |
| 2360 | 2161 | return (__m128)__builtin_convertvector((__v4su)__A, __v4sf); |
| 2361 | 2162 | } |
| 2362 | 2163 | |
| 2363 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2364 | _mm_mask_cvtepu32_ps (__m128 __W, __mmask8 __U, __m128i __A) { | |
| 2164 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2165 | _mm_mask_cvtepu32_ps(__m128 __W, __mmask8 __U, __m128i __A) { | |
| 2365 | 2166 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2366 | 2167 | (__v4sf)_mm_cvtepu32_ps(__A), |
| 2367 | 2168 | (__v4sf)__W); |
| 2368 | 2169 | } |
| 2369 | 2170 | |
| 2370 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2371 | _mm_maskz_cvtepu32_ps (__mmask8 __U, __m128i __A) { | |
| 2171 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2172 | _mm_maskz_cvtepu32_ps(__mmask8 __U, __m128i __A) { | |
| 2372 | 2173 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2373 | 2174 | (__v4sf)_mm_cvtepu32_ps(__A), |
| 2374 | 2175 | (__v4sf)_mm_setzero_ps()); |
| 2375 | 2176 | } |
| 2376 | 2177 | |
| 2377 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2378 | _mm256_cvtepu32_ps (__m256i __A) { | |
| 2178 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2179 | _mm256_cvtepu32_ps(__m256i __A) { | |
| 2379 | 2180 | return (__m256)__builtin_convertvector((__v8su)__A, __v8sf); |
| 2380 | 2181 | } |
| 2381 | 2182 | |
| 2382 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2383 | _mm256_mask_cvtepu32_ps (__m256 __W, __mmask8 __U, __m256i __A) { | |
| 2183 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2184 | _mm256_mask_cvtepu32_ps(__m256 __W, __mmask8 __U, __m256i __A) { | |
| 2384 | 2185 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2385 | 2186 | (__v8sf)_mm256_cvtepu32_ps(__A), |
| 2386 | 2187 | (__v8sf)__W); |
| 2387 | 2188 | } |
| 2388 | 2189 | |
| 2389 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2390 | _mm256_maskz_cvtepu32_ps (__mmask8 __U, __m256i __A) { | |
| 2190 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2191 | _mm256_maskz_cvtepu32_ps(__mmask8 __U, __m256i __A) { | |
| 2391 | 2192 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2392 | 2193 | (__v8sf)_mm256_cvtepu32_ps(__A), |
| 2393 | 2194 | (__v8sf)_mm256_setzero_ps()); |
| 2394 | 2195 | } |
| 2395 | 2196 | |
| 2396 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2197 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2397 | 2198 | _mm_mask_div_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { |
| 2398 | 2199 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 2399 | 2200 | (__v2df)_mm_div_pd(__A, __B), |
| 2400 | 2201 | (__v2df)__W); |
| 2401 | 2202 | } |
| 2402 | 2203 | |
| 2403 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2204 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2404 | 2205 | _mm_maskz_div_pd(__mmask8 __U, __m128d __A, __m128d __B) { |
| 2405 | 2206 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 2406 | 2207 | (__v2df)_mm_div_pd(__A, __B), |
| 2407 | 2208 | (__v2df)_mm_setzero_pd()); |
| 2408 | 2209 | } |
| 2409 | 2210 | |
| 2410 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2211 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2411 | 2212 | _mm256_mask_div_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { |
| 2412 | 2213 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 2413 | 2214 | (__v4df)_mm256_div_pd(__A, __B), |
| 2414 | 2215 | (__v4df)__W); |
| 2415 | 2216 | } |
| 2416 | 2217 | |
| 2417 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2218 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2418 | 2219 | _mm256_maskz_div_pd(__mmask8 __U, __m256d __A, __m256d __B) { |
| 2419 | 2220 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 2420 | 2221 | (__v4df)_mm256_div_pd(__A, __B), |
| 2421 | 2222 | (__v4df)_mm256_setzero_pd()); |
| 2422 | 2223 | } |
| 2423 | 2224 | |
| 2424 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2225 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2425 | 2226 | _mm_mask_div_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { |
| 2426 | 2227 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2427 | 2228 | (__v4sf)_mm_div_ps(__A, __B), |
| 2428 | 2229 | (__v4sf)__W); |
| 2429 | 2230 | } |
| 2430 | 2231 | |
| 2431 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2232 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2432 | 2233 | _mm_maskz_div_ps(__mmask8 __U, __m128 __A, __m128 __B) { |
| 2433 | 2234 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2434 | 2235 | (__v4sf)_mm_div_ps(__A, __B), |
| 2435 | 2236 | (__v4sf)_mm_setzero_ps()); |
| 2436 | 2237 | } |
| 2437 | 2238 | |
| 2438 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2239 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2439 | 2240 | _mm256_mask_div_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { |
| 2440 | 2241 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2441 | 2242 | (__v8sf)_mm256_div_ps(__A, __B), |
| 2442 | 2243 | (__v8sf)__W); |
| 2443 | 2244 | } |
| 2444 | 2245 | |
| 2445 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2246 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2446 | 2247 | _mm256_maskz_div_ps(__mmask8 __U, __m256 __A, __m256 __B) { |
| 2447 | 2248 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2448 | 2249 | (__v8sf)_mm256_div_ps(__A, __B), |
| ... | ... | @@ -2796,499 +2597,499 @@ _mm256_maskz_getexp_ps (__mmask8 __U, __m256 __A) { |
| 2796 | 2597 | (__mmask8) __U); |
| 2797 | 2598 | } |
| 2798 | 2599 | |
| 2799 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2600 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2800 | 2601 | _mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { |
| 2801 | 2602 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 2802 | 2603 | (__v2df)_mm_max_pd(__A, __B), |
| 2803 | 2604 | (__v2df)__W); |
| 2804 | 2605 | } |
| 2805 | 2606 | |
| 2806 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2607 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2807 | 2608 | _mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B) { |
| 2808 | 2609 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 2809 | 2610 | (__v2df)_mm_max_pd(__A, __B), |
| 2810 | 2611 | (__v2df)_mm_setzero_pd()); |
| 2811 | 2612 | } |
| 2812 | 2613 | |
| 2813 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2614 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2814 | 2615 | _mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { |
| 2815 | 2616 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 2816 | 2617 | (__v4df)_mm256_max_pd(__A, __B), |
| 2817 | 2618 | (__v4df)__W); |
| 2818 | 2619 | } |
| 2819 | 2620 | |
| 2820 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2621 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2821 | 2622 | _mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B) { |
| 2822 | 2623 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 2823 | 2624 | (__v4df)_mm256_max_pd(__A, __B), |
| 2824 | 2625 | (__v4df)_mm256_setzero_pd()); |
| 2825 | 2626 | } |
| 2826 | 2627 | |
| 2827 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2628 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2828 | 2629 | _mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { |
| 2829 | 2630 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2830 | 2631 | (__v4sf)_mm_max_ps(__A, __B), |
| 2831 | 2632 | (__v4sf)__W); |
| 2832 | 2633 | } |
| 2833 | 2634 | |
| 2834 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2635 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2835 | 2636 | _mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B) { |
| 2836 | 2637 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2837 | 2638 | (__v4sf)_mm_max_ps(__A, __B), |
| 2838 | 2639 | (__v4sf)_mm_setzero_ps()); |
| 2839 | 2640 | } |
| 2840 | 2641 | |
| 2841 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2642 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2842 | 2643 | _mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { |
| 2843 | 2644 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2844 | 2645 | (__v8sf)_mm256_max_ps(__A, __B), |
| 2845 | 2646 | (__v8sf)__W); |
| 2846 | 2647 | } |
| 2847 | 2648 | |
| 2848 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2649 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2849 | 2650 | _mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B) { |
| 2850 | 2651 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2851 | 2652 | (__v8sf)_mm256_max_ps(__A, __B), |
| 2852 | 2653 | (__v8sf)_mm256_setzero_ps()); |
| 2853 | 2654 | } |
| 2854 | 2655 | |
| 2855 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2656 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2856 | 2657 | _mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { |
| 2857 | 2658 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 2858 | 2659 | (__v2df)_mm_min_pd(__A, __B), |
| 2859 | 2660 | (__v2df)__W); |
| 2860 | 2661 | } |
| 2861 | 2662 | |
| 2862 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2663 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2863 | 2664 | _mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B) { |
| 2864 | 2665 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 2865 | 2666 | (__v2df)_mm_min_pd(__A, __B), |
| 2866 | 2667 | (__v2df)_mm_setzero_pd()); |
| 2867 | 2668 | } |
| 2868 | 2669 | |
| 2869 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2670 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2870 | 2671 | _mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { |
| 2871 | 2672 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 2872 | 2673 | (__v4df)_mm256_min_pd(__A, __B), |
| 2873 | 2674 | (__v4df)__W); |
| 2874 | 2675 | } |
| 2875 | 2676 | |
| 2876 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2677 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2877 | 2678 | _mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B) { |
| 2878 | 2679 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 2879 | 2680 | (__v4df)_mm256_min_pd(__A, __B), |
| 2880 | 2681 | (__v4df)_mm256_setzero_pd()); |
| 2881 | 2682 | } |
| 2882 | 2683 | |
| 2883 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2684 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2884 | 2685 | _mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { |
| 2885 | 2686 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2886 | 2687 | (__v4sf)_mm_min_ps(__A, __B), |
| 2887 | 2688 | (__v4sf)__W); |
| 2888 | 2689 | } |
| 2889 | 2690 | |
| 2890 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2691 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2891 | 2692 | _mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B) { |
| 2892 | 2693 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2893 | 2694 | (__v4sf)_mm_min_ps(__A, __B), |
| 2894 | 2695 | (__v4sf)_mm_setzero_ps()); |
| 2895 | 2696 | } |
| 2896 | 2697 | |
| 2897 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2698 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2898 | 2699 | _mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { |
| 2899 | 2700 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2900 | 2701 | (__v8sf)_mm256_min_ps(__A, __B), |
| 2901 | 2702 | (__v8sf)__W); |
| 2902 | 2703 | } |
| 2903 | 2704 | |
| 2904 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2705 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2905 | 2706 | _mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B) { |
| 2906 | 2707 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2907 | 2708 | (__v8sf)_mm256_min_ps(__A, __B), |
| 2908 | 2709 | (__v8sf)_mm256_setzero_ps()); |
| 2909 | 2710 | } |
| 2910 | 2711 | |
| 2911 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2712 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2912 | 2713 | _mm_mask_mul_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { |
| 2913 | 2714 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 2914 | 2715 | (__v2df)_mm_mul_pd(__A, __B), |
| 2915 | 2716 | (__v2df)__W); |
| 2916 | 2717 | } |
| 2917 | 2718 | |
| 2918 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 2719 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2919 | 2720 | _mm_maskz_mul_pd(__mmask8 __U, __m128d __A, __m128d __B) { |
| 2920 | 2721 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 2921 | 2722 | (__v2df)_mm_mul_pd(__A, __B), |
| 2922 | 2723 | (__v2df)_mm_setzero_pd()); |
| 2923 | 2724 | } |
| 2924 | 2725 | |
| 2925 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2726 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2926 | 2727 | _mm256_mask_mul_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { |
| 2927 | 2728 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 2928 | 2729 | (__v4df)_mm256_mul_pd(__A, __B), |
| 2929 | 2730 | (__v4df)__W); |
| 2930 | 2731 | } |
| 2931 | 2732 | |
| 2932 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 2733 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2933 | 2734 | _mm256_maskz_mul_pd(__mmask8 __U, __m256d __A, __m256d __B) { |
| 2934 | 2735 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 2935 | 2736 | (__v4df)_mm256_mul_pd(__A, __B), |
| 2936 | 2737 | (__v4df)_mm256_setzero_pd()); |
| 2937 | 2738 | } |
| 2938 | 2739 | |
| 2939 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2740 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2940 | 2741 | _mm_mask_mul_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { |
| 2941 | 2742 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2942 | 2743 | (__v4sf)_mm_mul_ps(__A, __B), |
| 2943 | 2744 | (__v4sf)__W); |
| 2944 | 2745 | } |
| 2945 | 2746 | |
| 2946 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 2747 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2947 | 2748 | _mm_maskz_mul_ps(__mmask8 __U, __m128 __A, __m128 __B) { |
| 2948 | 2749 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 2949 | 2750 | (__v4sf)_mm_mul_ps(__A, __B), |
| 2950 | 2751 | (__v4sf)_mm_setzero_ps()); |
| 2951 | 2752 | } |
| 2952 | 2753 | |
| 2953 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2754 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2954 | 2755 | _mm256_mask_mul_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { |
| 2955 | 2756 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2956 | 2757 | (__v8sf)_mm256_mul_ps(__A, __B), |
| 2957 | 2758 | (__v8sf)__W); |
| 2958 | 2759 | } |
| 2959 | 2760 | |
| 2960 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 2761 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2961 | 2762 | _mm256_maskz_mul_ps(__mmask8 __U, __m256 __A, __m256 __B) { |
| 2962 | 2763 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 2963 | 2764 | (__v8sf)_mm256_mul_ps(__A, __B), |
| 2964 | 2765 | (__v8sf)_mm256_setzero_ps()); |
| 2965 | 2766 | } |
| 2966 | 2767 | |
| 2967 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2768 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2968 | 2769 | _mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A) { |
| 2969 | 2770 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 2970 | 2771 | (__v4si)_mm_abs_epi32(__A), |
| 2971 | 2772 | (__v4si)__W); |
| 2972 | 2773 | } |
| 2973 | 2774 | |
| 2974 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2775 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2975 | 2776 | _mm_maskz_abs_epi32(__mmask8 __U, __m128i __A) { |
| 2976 | 2777 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 2977 | 2778 | (__v4si)_mm_abs_epi32(__A), |
| 2978 | 2779 | (__v4si)_mm_setzero_si128()); |
| 2979 | 2780 | } |
| 2980 | 2781 | |
| 2981 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2782 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2982 | 2783 | _mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) { |
| 2983 | 2784 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 2984 | 2785 | (__v8si)_mm256_abs_epi32(__A), |
| 2985 | 2786 | (__v8si)__W); |
| 2986 | 2787 | } |
| 2987 | 2788 | |
| 2988 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2789 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2989 | 2790 | _mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A) { |
| 2990 | 2791 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 2991 | 2792 | (__v8si)_mm256_abs_epi32(__A), |
| 2992 | 2793 | (__v8si)_mm256_setzero_si256()); |
| 2993 | 2794 | } |
| 2994 | 2795 | |
| 2995 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2996 | _mm_abs_epi64 (__m128i __A) { | |
| 2796 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2797 | _mm_abs_epi64(__m128i __A) { | |
| 2997 | 2798 | return (__m128i)__builtin_elementwise_abs((__v2di)__A); |
| 2998 | 2799 | } |
| 2999 | 2800 | |
| 3000 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3001 | _mm_mask_abs_epi64 (__m128i __W, __mmask8 __U, __m128i __A) { | |
| 2801 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2802 | _mm_mask_abs_epi64(__m128i __W, __mmask8 __U, __m128i __A) { | |
| 3002 | 2803 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 3003 | 2804 | (__v2di)_mm_abs_epi64(__A), |
| 3004 | 2805 | (__v2di)__W); |
| 3005 | 2806 | } |
| 3006 | 2807 | |
| 3007 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3008 | _mm_maskz_abs_epi64 (__mmask8 __U, __m128i __A) { | |
| 2808 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2809 | _mm_maskz_abs_epi64(__mmask8 __U, __m128i __A) { | |
| 3009 | 2810 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 3010 | 2811 | (__v2di)_mm_abs_epi64(__A), |
| 3011 | 2812 | (__v2di)_mm_setzero_si128()); |
| 3012 | 2813 | } |
| 3013 | 2814 | |
| 3014 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3015 | _mm256_abs_epi64 (__m256i __A) { | |
| 2815 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2816 | _mm256_abs_epi64(__m256i __A) { | |
| 3016 | 2817 | return (__m256i)__builtin_elementwise_abs((__v4di)__A); |
| 3017 | 2818 | } |
| 3018 | 2819 | |
| 3019 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3020 | _mm256_mask_abs_epi64 (__m256i __W, __mmask8 __U, __m256i __A) { | |
| 2820 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2821 | _mm256_mask_abs_epi64(__m256i __W, __mmask8 __U, __m256i __A) { | |
| 3021 | 2822 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 3022 | 2823 | (__v4di)_mm256_abs_epi64(__A), |
| 3023 | 2824 | (__v4di)__W); |
| 3024 | 2825 | } |
| 3025 | 2826 | |
| 3026 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3027 | _mm256_maskz_abs_epi64 (__mmask8 __U, __m256i __A) { | |
| 2827 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2828 | _mm256_maskz_abs_epi64(__mmask8 __U, __m256i __A) { | |
| 3028 | 2829 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 3029 | 2830 | (__v4di)_mm256_abs_epi64(__A), |
| 3030 | 2831 | (__v4di)_mm256_setzero_si256()); |
| 3031 | 2832 | } |
| 3032 | 2833 | |
| 3033 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2834 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3034 | 2835 | _mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) { |
| 3035 | 2836 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 3036 | 2837 | (__v4si)_mm_max_epi32(__A, __B), |
| 3037 | 2838 | (__v4si)_mm_setzero_si128()); |
| 3038 | 2839 | } |
| 3039 | 2840 | |
| 3040 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2841 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3041 | 2842 | _mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { |
| 3042 | 2843 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 3043 | 2844 | (__v4si)_mm_max_epi32(__A, __B), |
| 3044 | 2845 | (__v4si)__W); |
| 3045 | 2846 | } |
| 3046 | 2847 | |
| 3047 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2848 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3048 | 2849 | _mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) { |
| 3049 | 2850 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 3050 | 2851 | (__v8si)_mm256_max_epi32(__A, __B), |
| 3051 | 2852 | (__v8si)_mm256_setzero_si256()); |
| 3052 | 2853 | } |
| 3053 | 2854 | |
| 3054 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2855 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3055 | 2856 | _mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { |
| 3056 | 2857 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 3057 | 2858 | (__v8si)_mm256_max_epi32(__A, __B), |
| 3058 | 2859 | (__v8si)__W); |
| 3059 | 2860 | } |
| 3060 | 2861 | |
| 3061 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3062 | _mm_max_epi64 (__m128i __A, __m128i __B) { | |
| 2862 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2863 | _mm_max_epi64(__m128i __A, __m128i __B) { | |
| 3063 | 2864 | return (__m128i)__builtin_elementwise_max((__v2di)__A, (__v2di)__B); |
| 3064 | 2865 | } |
| 3065 | 2866 | |
| 3066 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3067 | _mm_maskz_max_epi64 (__mmask8 __M, __m128i __A, __m128i __B) { | |
| 2867 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2868 | _mm_maskz_max_epi64(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 3068 | 2869 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 3069 | 2870 | (__v2di)_mm_max_epi64(__A, __B), |
| 3070 | 2871 | (__v2di)_mm_setzero_si128()); |
| 3071 | 2872 | } |
| 3072 | 2873 | |
| 3073 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3074 | _mm_mask_max_epi64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 2874 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2875 | _mm_mask_max_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 3075 | 2876 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 3076 | 2877 | (__v2di)_mm_max_epi64(__A, __B), |
| 3077 | 2878 | (__v2di)__W); |
| 3078 | 2879 | } |
| 3079 | 2880 | |
| 3080 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3081 | _mm256_max_epi64 (__m256i __A, __m256i __B) { | |
| 2881 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2882 | _mm256_max_epi64(__m256i __A, __m256i __B) { | |
| 3082 | 2883 | return (__m256i)__builtin_elementwise_max((__v4di)__A, (__v4di)__B); |
| 3083 | 2884 | } |
| 3084 | 2885 | |
| 3085 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3086 | _mm256_maskz_max_epi64 (__mmask8 __M, __m256i __A, __m256i __B) { | |
| 2886 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2887 | _mm256_maskz_max_epi64(__mmask8 __M, __m256i __A, __m256i __B) { | |
| 3087 | 2888 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 3088 | 2889 | (__v4di)_mm256_max_epi64(__A, __B), |
| 3089 | 2890 | (__v4di)_mm256_setzero_si256()); |
| 3090 | 2891 | } |
| 3091 | 2892 | |
| 3092 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3093 | _mm256_mask_max_epi64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 2893 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2894 | _mm256_mask_max_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 3094 | 2895 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 3095 | 2896 | (__v4di)_mm256_max_epi64(__A, __B), |
| 3096 | 2897 | (__v4di)__W); |
| 3097 | 2898 | } |
| 3098 | 2899 | |
| 3099 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2900 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3100 | 2901 | _mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) { |
| 3101 | 2902 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 3102 | 2903 | (__v4si)_mm_max_epu32(__A, __B), |
| 3103 | 2904 | (__v4si)_mm_setzero_si128()); |
| 3104 | 2905 | } |
| 3105 | 2906 | |
| 3106 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2907 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3107 | 2908 | _mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { |
| 3108 | 2909 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 3109 | 2910 | (__v4si)_mm_max_epu32(__A, __B), |
| 3110 | 2911 | (__v4si)__W); |
| 3111 | 2912 | } |
| 3112 | 2913 | |
| 3113 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2914 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3114 | 2915 | _mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) { |
| 3115 | 2916 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 3116 | 2917 | (__v8si)_mm256_max_epu32(__A, __B), |
| 3117 | 2918 | (__v8si)_mm256_setzero_si256()); |
| 3118 | 2919 | } |
| 3119 | 2920 | |
| 3120 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2921 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3121 | 2922 | _mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { |
| 3122 | 2923 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 3123 | 2924 | (__v8si)_mm256_max_epu32(__A, __B), |
| 3124 | 2925 | (__v8si)__W); |
| 3125 | 2926 | } |
| 3126 | 2927 | |
| 3127 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3128 | _mm_max_epu64 (__m128i __A, __m128i __B) { | |
| 2928 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2929 | _mm_max_epu64(__m128i __A, __m128i __B) { | |
| 3129 | 2930 | return (__m128i)__builtin_elementwise_max((__v2du)__A, (__v2du)__B); |
| 3130 | 2931 | } |
| 3131 | 2932 | |
| 3132 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3133 | _mm_maskz_max_epu64 (__mmask8 __M, __m128i __A, __m128i __B) { | |
| 2933 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2934 | _mm_maskz_max_epu64(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 3134 | 2935 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 3135 | 2936 | (__v2di)_mm_max_epu64(__A, __B), |
| 3136 | 2937 | (__v2di)_mm_setzero_si128()); |
| 3137 | 2938 | } |
| 3138 | 2939 | |
| 3139 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3140 | _mm_mask_max_epu64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 2940 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2941 | _mm_mask_max_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 3141 | 2942 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 3142 | 2943 | (__v2di)_mm_max_epu64(__A, __B), |
| 3143 | 2944 | (__v2di)__W); |
| 3144 | 2945 | } |
| 3145 | 2946 | |
| 3146 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3147 | _mm256_max_epu64 (__m256i __A, __m256i __B) { | |
| 2947 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2948 | _mm256_max_epu64(__m256i __A, __m256i __B) { | |
| 3148 | 2949 | return (__m256i)__builtin_elementwise_max((__v4du)__A, (__v4du)__B); |
| 3149 | 2950 | } |
| 3150 | 2951 | |
| 3151 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3152 | _mm256_maskz_max_epu64 (__mmask8 __M, __m256i __A, __m256i __B) { | |
| 2952 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2953 | _mm256_maskz_max_epu64(__mmask8 __M, __m256i __A, __m256i __B) { | |
| 3153 | 2954 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 3154 | 2955 | (__v4di)_mm256_max_epu64(__A, __B), |
| 3155 | 2956 | (__v4di)_mm256_setzero_si256()); |
| 3156 | 2957 | } |
| 3157 | 2958 | |
| 3158 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3159 | _mm256_mask_max_epu64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 2959 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 2960 | _mm256_mask_max_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 3160 | 2961 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 3161 | 2962 | (__v4di)_mm256_max_epu64(__A, __B), |
| 3162 | 2963 | (__v4di)__W); |
| 3163 | 2964 | } |
| 3164 | 2965 | |
| 3165 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2966 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3166 | 2967 | _mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) { |
| 3167 | 2968 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 3168 | 2969 | (__v4si)_mm_min_epi32(__A, __B), |
| 3169 | 2970 | (__v4si)_mm_setzero_si128()); |
| 3170 | 2971 | } |
| 3171 | 2972 | |
| 3172 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 2973 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3173 | 2974 | _mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { |
| 3174 | 2975 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 3175 | 2976 | (__v4si)_mm_min_epi32(__A, __B), |
| 3176 | 2977 | (__v4si)__W); |
| 3177 | 2978 | } |
| 3178 | 2979 | |
| 3179 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2980 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3180 | 2981 | _mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) { |
| 3181 | 2982 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 3182 | 2983 | (__v8si)_mm256_min_epi32(__A, __B), |
| 3183 | 2984 | (__v8si)_mm256_setzero_si256()); |
| 3184 | 2985 | } |
| 3185 | 2986 | |
| 3186 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 2987 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3187 | 2988 | _mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { |
| 3188 | 2989 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 3189 | 2990 | (__v8si)_mm256_min_epi32(__A, __B), |
| 3190 | 2991 | (__v8si)__W); |
| 3191 | 2992 | } |
| 3192 | 2993 | |
| 3193 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3194 | _mm_min_epi64 (__m128i __A, __m128i __B) { | |
| 2994 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2995 | _mm_min_epi64(__m128i __A, __m128i __B) { | |
| 3195 | 2996 | return (__m128i)__builtin_elementwise_min((__v2di)__A, (__v2di)__B); |
| 3196 | 2997 | } |
| 3197 | 2998 | |
| 3198 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3199 | _mm_mask_min_epi64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 2999 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3000 | _mm_mask_min_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 3200 | 3001 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 3201 | 3002 | (__v2di)_mm_min_epi64(__A, __B), |
| 3202 | 3003 | (__v2di)__W); |
| 3203 | 3004 | } |
| 3204 | 3005 | |
| 3205 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3206 | _mm_maskz_min_epi64 (__mmask8 __M, __m128i __A, __m128i __B) { | |
| 3006 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3007 | _mm_maskz_min_epi64(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 3207 | 3008 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 3208 | 3009 | (__v2di)_mm_min_epi64(__A, __B), |
| 3209 | 3010 | (__v2di)_mm_setzero_si128()); |
| 3210 | 3011 | } |
| 3211 | 3012 | |
| 3212 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3213 | _mm256_min_epi64 (__m256i __A, __m256i __B) { | |
| 3013 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3014 | _mm256_min_epi64(__m256i __A, __m256i __B) { | |
| 3214 | 3015 | return (__m256i)__builtin_elementwise_min((__v4di)__A, (__v4di)__B); |
| 3215 | 3016 | } |
| 3216 | 3017 | |
| 3217 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3218 | _mm256_mask_min_epi64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 3018 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3019 | _mm256_mask_min_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 3219 | 3020 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 3220 | 3021 | (__v4di)_mm256_min_epi64(__A, __B), |
| 3221 | 3022 | (__v4di)__W); |
| 3222 | 3023 | } |
| 3223 | 3024 | |
| 3224 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3225 | _mm256_maskz_min_epi64 (__mmask8 __M, __m256i __A, __m256i __B) { | |
| 3025 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3026 | _mm256_maskz_min_epi64(__mmask8 __M, __m256i __A, __m256i __B) { | |
| 3226 | 3027 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 3227 | 3028 | (__v4di)_mm256_min_epi64(__A, __B), |
| 3228 | 3029 | (__v4di)_mm256_setzero_si256()); |
| 3229 | 3030 | } |
| 3230 | 3031 | |
| 3231 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3032 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3232 | 3033 | _mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) { |
| 3233 | 3034 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 3234 | 3035 | (__v4si)_mm_min_epu32(__A, __B), |
| 3235 | 3036 | (__v4si)_mm_setzero_si128()); |
| 3236 | 3037 | } |
| 3237 | 3038 | |
| 3238 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3039 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3239 | 3040 | _mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { |
| 3240 | 3041 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 3241 | 3042 | (__v4si)_mm_min_epu32(__A, __B), |
| 3242 | 3043 | (__v4si)__W); |
| 3243 | 3044 | } |
| 3244 | 3045 | |
| 3245 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3046 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3246 | 3047 | _mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) { |
| 3247 | 3048 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 3248 | 3049 | (__v8si)_mm256_min_epu32(__A, __B), |
| 3249 | 3050 | (__v8si)_mm256_setzero_si256()); |
| 3250 | 3051 | } |
| 3251 | 3052 | |
| 3252 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3053 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3253 | 3054 | _mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { |
| 3254 | 3055 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 3255 | 3056 | (__v8si)_mm256_min_epu32(__A, __B), |
| 3256 | 3057 | (__v8si)__W); |
| 3257 | 3058 | } |
| 3258 | 3059 | |
| 3259 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3260 | _mm_min_epu64 (__m128i __A, __m128i __B) { | |
| 3060 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3061 | _mm_min_epu64(__m128i __A, __m128i __B) { | |
| 3261 | 3062 | return (__m128i)__builtin_elementwise_min((__v2du)__A, (__v2du)__B); |
| 3262 | 3063 | } |
| 3263 | 3064 | |
| 3264 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3265 | _mm_mask_min_epu64 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 3065 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3066 | _mm_mask_min_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { | |
| 3266 | 3067 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 3267 | 3068 | (__v2di)_mm_min_epu64(__A, __B), |
| 3268 | 3069 | (__v2di)__W); |
| 3269 | 3070 | } |
| 3270 | 3071 | |
| 3271 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3272 | _mm_maskz_min_epu64 (__mmask8 __M, __m128i __A, __m128i __B) { | |
| 3072 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3073 | _mm_maskz_min_epu64(__mmask8 __M, __m128i __A, __m128i __B) { | |
| 3273 | 3074 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__M, |
| 3274 | 3075 | (__v2di)_mm_min_epu64(__A, __B), |
| 3275 | 3076 | (__v2di)_mm_setzero_si128()); |
| 3276 | 3077 | } |
| 3277 | 3078 | |
| 3278 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3279 | _mm256_min_epu64 (__m256i __A, __m256i __B) { | |
| 3079 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3080 | _mm256_min_epu64(__m256i __A, __m256i __B) { | |
| 3280 | 3081 | return (__m256i)__builtin_elementwise_min((__v4du)__A, (__v4du)__B); |
| 3281 | 3082 | } |
| 3282 | 3083 | |
| 3283 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3284 | _mm256_mask_min_epu64 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 3084 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3085 | _mm256_mask_min_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { | |
| 3285 | 3086 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 3286 | 3087 | (__v4di)_mm256_min_epu64(__A, __B), |
| 3287 | 3088 | (__v4di)__W); |
| 3288 | 3089 | } |
| 3289 | 3090 | |
| 3290 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3291 | _mm256_maskz_min_epu64 (__mmask8 __M, __m256i __A, __m256i __B) { | |
| 3091 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3092 | _mm256_maskz_min_epu64(__mmask8 __M, __m256i __A, __m256i __B) { | |
| 3292 | 3093 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 3293 | 3094 | (__v4di)_mm256_min_epu64(__A, __B), |
| 3294 | 3095 | (__v4di)_mm256_setzero_si256()); |
| ... | ... | @@ -3691,69 +3492,69 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3691 | 3492 | (__v8sf)_mm256_setzero_ps()); |
| 3692 | 3493 | } |
| 3693 | 3494 | |
| 3694 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 3495 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3695 | 3496 | _mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { |
| 3696 | 3497 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 3697 | 3498 | (__v2df)_mm_sub_pd(__A, __B), |
| 3698 | 3499 | (__v2df)__W); |
| 3699 | 3500 | } |
| 3700 | 3501 | |
| 3701 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 3502 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3702 | 3503 | _mm_maskz_sub_pd(__mmask8 __U, __m128d __A, __m128d __B) { |
| 3703 | 3504 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 3704 | 3505 | (__v2df)_mm_sub_pd(__A, __B), |
| 3705 | 3506 | (__v2df)_mm_setzero_pd()); |
| 3706 | 3507 | } |
| 3707 | 3508 | |
| 3708 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 3509 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3709 | 3510 | _mm256_mask_sub_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { |
| 3710 | 3511 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 3711 | 3512 | (__v4df)_mm256_sub_pd(__A, __B), |
| 3712 | 3513 | (__v4df)__W); |
| 3713 | 3514 | } |
| 3714 | 3515 | |
| 3715 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 3516 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3716 | 3517 | _mm256_maskz_sub_pd(__mmask8 __U, __m256d __A, __m256d __B) { |
| 3717 | 3518 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 3718 | 3519 | (__v4df)_mm256_sub_pd(__A, __B), |
| 3719 | 3520 | (__v4df)_mm256_setzero_pd()); |
| 3720 | 3521 | } |
| 3721 | 3522 | |
| 3722 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 3523 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3723 | 3524 | _mm_mask_sub_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { |
| 3724 | 3525 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 3725 | 3526 | (__v4sf)_mm_sub_ps(__A, __B), |
| 3726 | 3527 | (__v4sf)__W); |
| 3727 | 3528 | } |
| 3728 | 3529 | |
| 3729 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 3530 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3730 | 3531 | _mm_maskz_sub_ps(__mmask8 __U, __m128 __A, __m128 __B) { |
| 3731 | 3532 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 3732 | 3533 | (__v4sf)_mm_sub_ps(__A, __B), |
| 3733 | 3534 | (__v4sf)_mm_setzero_ps()); |
| 3734 | 3535 | } |
| 3735 | 3536 | |
| 3736 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 3537 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3737 | 3538 | _mm256_mask_sub_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { |
| 3738 | 3539 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 3739 | 3540 | (__v8sf)_mm256_sub_ps(__A, __B), |
| 3740 | 3541 | (__v8sf)__W); |
| 3741 | 3542 | } |
| 3742 | 3543 | |
| 3743 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 3544 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3744 | 3545 | _mm256_maskz_sub_ps(__mmask8 __U, __m256 __A, __m256 __B) { |
| 3745 | 3546 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 3746 | 3547 | (__v8sf)_mm256_sub_ps(__A, __B), |
| 3747 | 3548 | (__v8sf)_mm256_setzero_ps()); |
| 3748 | 3549 | } |
| 3749 | 3550 | |
| 3750 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3551 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3751 | 3552 | _mm_permutex2var_epi32(__m128i __A, __m128i __I, __m128i __B) { |
| 3752 | 3553 | return (__m128i)__builtin_ia32_vpermi2vard128((__v4si) __A, (__v4si)__I, |
| 3753 | 3554 | (__v4si)__B); |
| 3754 | 3555 | } |
| 3755 | 3556 | |
| 3756 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3557 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3757 | 3558 | _mm_mask_permutex2var_epi32(__m128i __A, __mmask8 __U, __m128i __I, |
| 3758 | 3559 | __m128i __B) { |
| 3759 | 3560 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -3761,7 +3562,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3761 | 3562 | (__v4si)__A); |
| 3762 | 3563 | } |
| 3763 | 3564 | |
| 3764 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3565 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3765 | 3566 | _mm_mask2_permutex2var_epi32(__m128i __A, __m128i __I, __mmask8 __U, |
| 3766 | 3567 | __m128i __B) { |
| 3767 | 3568 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -3769,7 +3570,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3769 | 3570 | (__v4si)__I); |
| 3770 | 3571 | } |
| 3771 | 3572 | |
| 3772 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3573 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3773 | 3574 | _mm_maskz_permutex2var_epi32(__mmask8 __U, __m128i __A, __m128i __I, |
| 3774 | 3575 | __m128i __B) { |
| 3775 | 3576 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -3777,13 +3578,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3777 | 3578 | (__v4si)_mm_setzero_si128()); |
| 3778 | 3579 | } |
| 3779 | 3580 | |
| 3780 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3581 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3781 | 3582 | _mm256_permutex2var_epi32(__m256i __A, __m256i __I, __m256i __B) { |
| 3782 | 3583 | return (__m256i)__builtin_ia32_vpermi2vard256((__v8si)__A, (__v8si) __I, |
| 3783 | 3584 | (__v8si) __B); |
| 3784 | 3585 | } |
| 3785 | 3586 | |
| 3786 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3587 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3787 | 3588 | _mm256_mask_permutex2var_epi32(__m256i __A, __mmask8 __U, __m256i __I, |
| 3788 | 3589 | __m256i __B) { |
| 3789 | 3590 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -3791,7 +3592,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3791 | 3592 | (__v8si)__A); |
| 3792 | 3593 | } |
| 3793 | 3594 | |
| 3794 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3595 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3795 | 3596 | _mm256_mask2_permutex2var_epi32(__m256i __A, __m256i __I, __mmask8 __U, |
| 3796 | 3597 | __m256i __B) { |
| 3797 | 3598 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -3799,7 +3600,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3799 | 3600 | (__v8si)__I); |
| 3800 | 3601 | } |
| 3801 | 3602 | |
| 3802 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3603 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3803 | 3604 | _mm256_maskz_permutex2var_epi32(__mmask8 __U, __m256i __A, __m256i __I, |
| 3804 | 3605 | __m256i __B) { |
| 3805 | 3606 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -3807,40 +3608,43 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3807 | 3608 | (__v8si)_mm256_setzero_si256()); |
| 3808 | 3609 | } |
| 3809 | 3610 | |
| 3810 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 3611 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3811 | 3612 | _mm_permutex2var_pd(__m128d __A, __m128i __I, __m128d __B) { |
| 3812 | 3613 | return (__m128d)__builtin_ia32_vpermi2varpd128((__v2df)__A, (__v2di)__I, |
| 3813 | 3614 | (__v2df)__B); |
| 3814 | 3615 | } |
| 3815 | 3616 | |
| 3816 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 3817 | _mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I, __m128d __B) { | |
| 3617 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3618 | _mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I, | |
| 3619 | __m128d __B) { | |
| 3818 | 3620 | return (__m128d)__builtin_ia32_selectpd_128(__U, |
| 3819 | 3621 | (__v2df)_mm_permutex2var_pd(__A, __I, __B), |
| 3820 | 3622 | (__v2df)__A); |
| 3821 | 3623 | } |
| 3822 | 3624 | |
| 3823 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 3824 | _mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U, __m128d __B) { | |
| 3625 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3626 | _mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U, | |
| 3627 | __m128d __B) { | |
| 3825 | 3628 | return (__m128d)__builtin_ia32_selectpd_128(__U, |
| 3826 | 3629 | (__v2df)_mm_permutex2var_pd(__A, __I, __B), |
| 3827 | 3630 | (__v2df)(__m128d)__I); |
| 3828 | 3631 | } |
| 3829 | 3632 | |
| 3830 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 3831 | _mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I, __m128d __B) { | |
| 3633 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3634 | _mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I, | |
| 3635 | __m128d __B) { | |
| 3832 | 3636 | return (__m128d)__builtin_ia32_selectpd_128(__U, |
| 3833 | 3637 | (__v2df)_mm_permutex2var_pd(__A, __I, __B), |
| 3834 | 3638 | (__v2df)_mm_setzero_pd()); |
| 3835 | 3639 | } |
| 3836 | 3640 | |
| 3837 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 3641 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3838 | 3642 | _mm256_permutex2var_pd(__m256d __A, __m256i __I, __m256d __B) { |
| 3839 | 3643 | return (__m256d)__builtin_ia32_vpermi2varpd256((__v4df)__A, (__v4di)__I, |
| 3840 | 3644 | (__v4df)__B); |
| 3841 | 3645 | } |
| 3842 | 3646 | |
| 3843 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 3647 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3844 | 3648 | _mm256_mask_permutex2var_pd(__m256d __A, __mmask8 __U, __m256i __I, |
| 3845 | 3649 | __m256d __B) { |
| 3846 | 3650 | return (__m256d)__builtin_ia32_selectpd_256(__U, |
| ... | ... | @@ -3848,7 +3652,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3848 | 3652 | (__v4df)__A); |
| 3849 | 3653 | } |
| 3850 | 3654 | |
| 3851 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 3655 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3852 | 3656 | _mm256_mask2_permutex2var_pd(__m256d __A, __m256i __I, __mmask8 __U, |
| 3853 | 3657 | __m256d __B) { |
| 3854 | 3658 | return (__m256d)__builtin_ia32_selectpd_256(__U, |
| ... | ... | @@ -3856,7 +3660,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3856 | 3660 | (__v4df)(__m256d)__I); |
| 3857 | 3661 | } |
| 3858 | 3662 | |
| 3859 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 3663 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3860 | 3664 | _mm256_maskz_permutex2var_pd(__mmask8 __U, __m256d __A, __m256i __I, |
| 3861 | 3665 | __m256d __B) { |
| 3862 | 3666 | return (__m256d)__builtin_ia32_selectpd_256(__U, |
| ... | ... | @@ -3864,47 +3668,48 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3864 | 3668 | (__v4df)_mm256_setzero_pd()); |
| 3865 | 3669 | } |
| 3866 | 3670 | |
| 3867 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 3671 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3868 | 3672 | _mm_permutex2var_ps(__m128 __A, __m128i __I, __m128 __B) { |
| 3869 | 3673 | return (__m128)__builtin_ia32_vpermi2varps128((__v4sf)__A, (__v4si)__I, |
| 3870 | 3674 | (__v4sf)__B); |
| 3871 | 3675 | } |
| 3872 | 3676 | |
| 3873 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 3677 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3874 | 3678 | _mm_mask_permutex2var_ps(__m128 __A, __mmask8 __U, __m128i __I, __m128 __B) { |
| 3875 | 3679 | return (__m128)__builtin_ia32_selectps_128(__U, |
| 3876 | 3680 | (__v4sf)_mm_permutex2var_ps(__A, __I, __B), |
| 3877 | 3681 | (__v4sf)__A); |
| 3878 | 3682 | } |
| 3879 | 3683 | |
| 3880 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 3684 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3881 | 3685 | _mm_mask2_permutex2var_ps(__m128 __A, __m128i __I, __mmask8 __U, __m128 __B) { |
| 3882 | 3686 | return (__m128)__builtin_ia32_selectps_128(__U, |
| 3883 | 3687 | (__v4sf)_mm_permutex2var_ps(__A, __I, __B), |
| 3884 | 3688 | (__v4sf)(__m128)__I); |
| 3885 | 3689 | } |
| 3886 | 3690 | |
| 3887 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 3691 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3888 | 3692 | _mm_maskz_permutex2var_ps(__mmask8 __U, __m128 __A, __m128i __I, __m128 __B) { |
| 3889 | 3693 | return (__m128)__builtin_ia32_selectps_128(__U, |
| 3890 | 3694 | (__v4sf)_mm_permutex2var_ps(__A, __I, __B), |
| 3891 | 3695 | (__v4sf)_mm_setzero_ps()); |
| 3892 | 3696 | } |
| 3893 | 3697 | |
| 3894 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 3698 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3895 | 3699 | _mm256_permutex2var_ps(__m256 __A, __m256i __I, __m256 __B) { |
| 3896 | 3700 | return (__m256)__builtin_ia32_vpermi2varps256((__v8sf)__A, (__v8si)__I, |
| 3897 | 3701 | (__v8sf) __B); |
| 3898 | 3702 | } |
| 3899 | 3703 | |
| 3900 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 3901 | _mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I, __m256 __B) { | |
| 3704 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3705 | _mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I, | |
| 3706 | __m256 __B) { | |
| 3902 | 3707 | return (__m256)__builtin_ia32_selectps_256(__U, |
| 3903 | 3708 | (__v8sf)_mm256_permutex2var_ps(__A, __I, __B), |
| 3904 | 3709 | (__v8sf)__A); |
| 3905 | 3710 | } |
| 3906 | 3711 | |
| 3907 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 3712 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3908 | 3713 | _mm256_mask2_permutex2var_ps(__m256 __A, __m256i __I, __mmask8 __U, |
| 3909 | 3714 | __m256 __B) { |
| 3910 | 3715 | return (__m256)__builtin_ia32_selectps_256(__U, |
| ... | ... | @@ -3912,7 +3717,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3912 | 3717 | (__v8sf)(__m256)__I); |
| 3913 | 3718 | } |
| 3914 | 3719 | |
| 3915 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 3720 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3916 | 3721 | _mm256_maskz_permutex2var_ps(__mmask8 __U, __m256 __A, __m256i __I, |
| 3917 | 3722 | __m256 __B) { |
| 3918 | 3723 | return (__m256)__builtin_ia32_selectps_256(__U, |
| ... | ... | @@ -3920,13 +3725,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3920 | 3725 | (__v8sf)_mm256_setzero_ps()); |
| 3921 | 3726 | } |
| 3922 | 3727 | |
| 3923 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3728 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3924 | 3729 | _mm_permutex2var_epi64(__m128i __A, __m128i __I, __m128i __B) { |
| 3925 | 3730 | return (__m128i)__builtin_ia32_vpermi2varq128((__v2di)__A, (__v2di)__I, |
| 3926 | 3731 | (__v2di)__B); |
| 3927 | 3732 | } |
| 3928 | 3733 | |
| 3929 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3734 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3930 | 3735 | _mm_mask_permutex2var_epi64(__m128i __A, __mmask8 __U, __m128i __I, |
| 3931 | 3736 | __m128i __B) { |
| 3932 | 3737 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -3934,7 +3739,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3934 | 3739 | (__v2di)__A); |
| 3935 | 3740 | } |
| 3936 | 3741 | |
| 3937 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3742 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3938 | 3743 | _mm_mask2_permutex2var_epi64(__m128i __A, __m128i __I, __mmask8 __U, |
| 3939 | 3744 | __m128i __B) { |
| 3940 | 3745 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -3942,7 +3747,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3942 | 3747 | (__v2di)__I); |
| 3943 | 3748 | } |
| 3944 | 3749 | |
| 3945 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 3750 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 3946 | 3751 | _mm_maskz_permutex2var_epi64(__mmask8 __U, __m128i __A, __m128i __I, |
| 3947 | 3752 | __m128i __B) { |
| 3948 | 3753 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -3950,14 +3755,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3950 | 3755 | (__v2di)_mm_setzero_si128()); |
| 3951 | 3756 | } |
| 3952 | 3757 | |
| 3953 | ||
| 3954 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3758 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3955 | 3759 | _mm256_permutex2var_epi64(__m256i __A, __m256i __I, __m256i __B) { |
| 3956 | 3760 | return (__m256i)__builtin_ia32_vpermi2varq256((__v4di)__A, (__v4di) __I, |
| 3957 | 3761 | (__v4di) __B); |
| 3958 | 3762 | } |
| 3959 | 3763 | |
| 3960 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3764 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3961 | 3765 | _mm256_mask_permutex2var_epi64(__m256i __A, __mmask8 __U, __m256i __I, |
| 3962 | 3766 | __m256i __B) { |
| 3963 | 3767 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -3965,7 +3769,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3965 | 3769 | (__v4di)__A); |
| 3966 | 3770 | } |
| 3967 | 3771 | |
| 3968 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3772 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3969 | 3773 | _mm256_mask2_permutex2var_epi64(__m256i __A, __m256i __I, __mmask8 __U, |
| 3970 | 3774 | __m256i __B) { |
| 3971 | 3775 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -3973,7 +3777,7 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 3973 | 3777 | (__v4di)__I); |
| 3974 | 3778 | } |
| 3975 | 3779 | |
| 3976 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 3780 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 3977 | 3781 | _mm256_maskz_permutex2var_epi64(__mmask8 __U, __m256i __A, __m256i __I, |
| 3978 | 3782 | __m256i __B) { |
| 3979 | 3783 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -4355,13 +4159,13 @@ _mm256_maskz_scalef_ps (__mmask8 __U, __m256 __A, __m256 __B) { |
| 4355 | 4159 | (__v4di)_mm256_rol_epi64((a), (b)), \ |
| 4356 | 4160 | (__v4di)_mm256_setzero_si256())) |
| 4357 | 4161 | |
| 4358 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4162 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4359 | 4163 | _mm_rolv_epi32 (__m128i __A, __m128i __B) |
| 4360 | 4164 | { |
| 4361 | return (__m128i)__builtin_ia32_prolvd128((__v4si)__A, (__v4si)__B); | |
| 4165 | return (__m128i)__builtin_elementwise_fshl((__v4su)__A, (__v4su)__A, (__v4su)__B); | |
| 4362 | 4166 | } |
| 4363 | 4167 | |
| 4364 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4168 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4365 | 4169 | _mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 4366 | 4170 | { |
| 4367 | 4171 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -4369,7 +4173,7 @@ _mm_mask_rolv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 4369 | 4173 | (__v4si)__W); |
| 4370 | 4174 | } |
| 4371 | 4175 | |
| 4372 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4176 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4373 | 4177 | _mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B) |
| 4374 | 4178 | { |
| 4375 | 4179 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -4377,13 +4181,13 @@ _mm_maskz_rolv_epi32 (__mmask8 __U, __m128i __A, __m128i __B) |
| 4377 | 4181 | (__v4si)_mm_setzero_si128()); |
| 4378 | 4182 | } |
| 4379 | 4183 | |
| 4380 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4184 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4381 | 4185 | _mm256_rolv_epi32 (__m256i __A, __m256i __B) |
| 4382 | 4186 | { |
| 4383 | return (__m256i)__builtin_ia32_prolvd256((__v8si)__A, (__v8si)__B); | |
| 4187 | return (__m256i)__builtin_elementwise_fshl((__v8su)__A, (__v8su)__A, (__v8su)__B); | |
| 4384 | 4188 | } |
| 4385 | 4189 | |
| 4386 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4190 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4387 | 4191 | _mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
| 4388 | 4192 | { |
| 4389 | 4193 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -4391,7 +4195,7 @@ _mm256_mask_rolv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
| 4391 | 4195 | (__v8si)__W); |
| 4392 | 4196 | } |
| 4393 | 4197 | |
| 4394 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4198 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4395 | 4199 | _mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B) |
| 4396 | 4200 | { |
| 4397 | 4201 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -4399,13 +4203,13 @@ _mm256_maskz_rolv_epi32 (__mmask8 __U, __m256i __A, __m256i __B) |
| 4399 | 4203 | (__v8si)_mm256_setzero_si256()); |
| 4400 | 4204 | } |
| 4401 | 4205 | |
| 4402 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4206 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4403 | 4207 | _mm_rolv_epi64 (__m128i __A, __m128i __B) |
| 4404 | 4208 | { |
| 4405 | return (__m128i)__builtin_ia32_prolvq128((__v2di)__A, (__v2di)__B); | |
| 4209 | return (__m128i)__builtin_elementwise_fshl((__v2du)__A, (__v2du)__A, (__v2du)__B); | |
| 4406 | 4210 | } |
| 4407 | 4211 | |
| 4408 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4212 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4409 | 4213 | _mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 4410 | 4214 | { |
| 4411 | 4215 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -4413,7 +4217,7 @@ _mm_mask_rolv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 4413 | 4217 | (__v2di)__W); |
| 4414 | 4218 | } |
| 4415 | 4219 | |
| 4416 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4220 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4417 | 4221 | _mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B) |
| 4418 | 4222 | { |
| 4419 | 4223 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -4421,13 +4225,13 @@ _mm_maskz_rolv_epi64 (__mmask8 __U, __m128i __A, __m128i __B) |
| 4421 | 4225 | (__v2di)_mm_setzero_si128()); |
| 4422 | 4226 | } |
| 4423 | 4227 | |
| 4424 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4228 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4425 | 4229 | _mm256_rolv_epi64 (__m256i __A, __m256i __B) |
| 4426 | 4230 | { |
| 4427 | return (__m256i)__builtin_ia32_prolvq256((__v4di)__A, (__v4di)__B); | |
| 4231 | return (__m256i)__builtin_elementwise_fshl((__v4du)__A, (__v4du)__A, (__v4du)__B); | |
| 4428 | 4232 | } |
| 4429 | 4233 | |
| 4430 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4234 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4431 | 4235 | _mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
| 4432 | 4236 | { |
| 4433 | 4237 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -4435,7 +4239,7 @@ _mm256_mask_rolv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
| 4435 | 4239 | (__v4di)__W); |
| 4436 | 4240 | } |
| 4437 | 4241 | |
| 4438 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4242 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4439 | 4243 | _mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B) |
| 4440 | 4244 | { |
| 4441 | 4245 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -4495,33 +4299,29 @@ _mm256_maskz_rolv_epi64 (__mmask8 __U, __m256i __A, __m256i __B) |
| 4495 | 4299 | (__v4di)_mm256_ror_epi64((a), (b)), \ |
| 4496 | 4300 | (__v4di)_mm256_setzero_si256())) |
| 4497 | 4301 | |
| 4498 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4499 | _mm_mask_sll_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 4500 | { | |
| 4302 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4303 | _mm_mask_sll_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 4501 | 4304 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 4502 | 4305 | (__v4si)_mm_sll_epi32(__A, __B), |
| 4503 | 4306 | (__v4si)__W); |
| 4504 | 4307 | } |
| 4505 | 4308 | |
| 4506 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4507 | _mm_maskz_sll_epi32(__mmask8 __U, __m128i __A, __m128i __B) | |
| 4508 | { | |
| 4309 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4310 | _mm_maskz_sll_epi32(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 4509 | 4311 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 4510 | 4312 | (__v4si)_mm_sll_epi32(__A, __B), |
| 4511 | 4313 | (__v4si)_mm_setzero_si128()); |
| 4512 | 4314 | } |
| 4513 | 4315 | |
| 4514 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4515 | _mm256_mask_sll_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) | |
| 4516 | { | |
| 4316 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4317 | _mm256_mask_sll_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { | |
| 4517 | 4318 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 4518 | 4319 | (__v8si)_mm256_sll_epi32(__A, __B), |
| 4519 | 4320 | (__v8si)__W); |
| 4520 | 4321 | } |
| 4521 | 4322 | |
| 4522 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4523 | _mm256_maskz_sll_epi32(__mmask8 __U, __m256i __A, __m128i __B) | |
| 4524 | { | |
| 4323 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4324 | _mm256_maskz_sll_epi32(__mmask8 __U, __m256i __A, __m128i __B) { | |
| 4525 | 4325 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 4526 | 4326 | (__v8si)_mm256_sll_epi32(__A, __B), |
| 4527 | 4327 | (__v8si)_mm256_setzero_si256()); |
| ... | ... | @@ -4543,49 +4343,44 @@ _mm_maskz_slli_epi32(__mmask8 __U, __m128i __A, unsigned int __B) |
| 4543 | 4343 | (__v4si)_mm_setzero_si128()); |
| 4544 | 4344 | } |
| 4545 | 4345 | |
| 4546 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4547 | _mm256_mask_slli_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) | |
| 4548 | { | |
| 4346 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4347 | _mm256_mask_slli_epi32(__m256i __W, __mmask8 __U, __m256i __A, | |
| 4348 | unsigned int __B) { | |
| 4549 | 4349 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 4550 | 4350 | (__v8si)_mm256_slli_epi32(__A, (int)__B), |
| 4551 | 4351 | (__v8si)__W); |
| 4552 | 4352 | } |
| 4553 | 4353 | |
| 4554 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4555 | _mm256_maskz_slli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) | |
| 4556 | { | |
| 4354 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4355 | _mm256_maskz_slli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) { | |
| 4557 | 4356 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 4558 | 4357 | (__v8si)_mm256_slli_epi32(__A, (int)__B), |
| 4559 | 4358 | (__v8si)_mm256_setzero_si256()); |
| 4560 | 4359 | } |
| 4561 | 4360 | |
| 4562 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4563 | _mm_mask_sll_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 4564 | { | |
| 4361 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4362 | _mm_mask_sll_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 4565 | 4363 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 4566 | 4364 | (__v2di)_mm_sll_epi64(__A, __B), |
| 4567 | 4365 | (__v2di)__W); |
| 4568 | 4366 | } |
| 4569 | 4367 | |
| 4570 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4571 | _mm_maskz_sll_epi64(__mmask8 __U, __m128i __A, __m128i __B) | |
| 4572 | { | |
| 4368 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4369 | _mm_maskz_sll_epi64(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 4573 | 4370 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 4574 | 4371 | (__v2di)_mm_sll_epi64(__A, __B), |
| 4575 | 4372 | (__v2di)_mm_setzero_si128()); |
| 4576 | 4373 | } |
| 4577 | 4374 | |
| 4578 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4579 | _mm256_mask_sll_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) | |
| 4580 | { | |
| 4375 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4376 | _mm256_mask_sll_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { | |
| 4581 | 4377 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 4582 | 4378 | (__v4di)_mm256_sll_epi64(__A, __B), |
| 4583 | 4379 | (__v4di)__W); |
| 4584 | 4380 | } |
| 4585 | 4381 | |
| 4586 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4587 | _mm256_maskz_sll_epi64(__mmask8 __U, __m256i __A, __m128i __B) | |
| 4588 | { | |
| 4382 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4383 | _mm256_maskz_sll_epi64(__mmask8 __U, __m256i __A, __m128i __B) { | |
| 4589 | 4384 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 4590 | 4385 | (__v4di)_mm256_sll_epi64(__A, __B), |
| 4591 | 4386 | (__v4di)_mm256_setzero_si256()); |
| ... | ... | @@ -4607,29 +4402,28 @@ _mm_maskz_slli_epi64(__mmask8 __U, __m128i __A, unsigned int __B) |
| 4607 | 4402 | (__v2di)_mm_setzero_si128()); |
| 4608 | 4403 | } |
| 4609 | 4404 | |
| 4610 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4611 | _mm256_mask_slli_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) | |
| 4612 | { | |
| 4405 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4406 | _mm256_mask_slli_epi64(__m256i __W, __mmask8 __U, __m256i __A, | |
| 4407 | unsigned int __B) { | |
| 4613 | 4408 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 4614 | 4409 | (__v4di)_mm256_slli_epi64(__A, (int)__B), |
| 4615 | 4410 | (__v4di)__W); |
| 4616 | 4411 | } |
| 4617 | 4412 | |
| 4618 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4619 | _mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) | |
| 4620 | { | |
| 4413 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4414 | _mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) { | |
| 4621 | 4415 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 4622 | 4416 | (__v4di)_mm256_slli_epi64(__A, (int)__B), |
| 4623 | 4417 | (__v4di)_mm256_setzero_si256()); |
| 4624 | 4418 | } |
| 4625 | 4419 | |
| 4626 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4420 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4627 | 4421 | _mm_rorv_epi32 (__m128i __A, __m128i __B) |
| 4628 | 4422 | { |
| 4629 | return (__m128i)__builtin_ia32_prorvd128((__v4si)__A, (__v4si)__B); | |
| 4423 | return (__m128i)__builtin_elementwise_fshr((__v4su)__A, (__v4su)__A, (__v4su)__B); | |
| 4630 | 4424 | } |
| 4631 | 4425 | |
| 4632 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4426 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4633 | 4427 | _mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 4634 | 4428 | { |
| 4635 | 4429 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -4637,7 +4431,7 @@ _mm_mask_rorv_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 4637 | 4431 | (__v4si)__W); |
| 4638 | 4432 | } |
| 4639 | 4433 | |
| 4640 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4434 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4641 | 4435 | _mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B) |
| 4642 | 4436 | { |
| 4643 | 4437 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -4645,13 +4439,13 @@ _mm_maskz_rorv_epi32 (__mmask8 __U, __m128i __A, __m128i __B) |
| 4645 | 4439 | (__v4si)_mm_setzero_si128()); |
| 4646 | 4440 | } |
| 4647 | 4441 | |
| 4648 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4442 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4649 | 4443 | _mm256_rorv_epi32 (__m256i __A, __m256i __B) |
| 4650 | 4444 | { |
| 4651 | return (__m256i)__builtin_ia32_prorvd256((__v8si)__A, (__v8si)__B); | |
| 4445 | return (__m256i)__builtin_elementwise_fshr((__v8su)__A, (__v8su)__A, (__v8su)__B); | |
| 4652 | 4446 | } |
| 4653 | 4447 | |
| 4654 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4448 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4655 | 4449 | _mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
| 4656 | 4450 | { |
| 4657 | 4451 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -4659,7 +4453,7 @@ _mm256_mask_rorv_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
| 4659 | 4453 | (__v8si)__W); |
| 4660 | 4454 | } |
| 4661 | 4455 | |
| 4662 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4456 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4663 | 4457 | _mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B) |
| 4664 | 4458 | { |
| 4665 | 4459 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -4667,13 +4461,13 @@ _mm256_maskz_rorv_epi32 (__mmask8 __U, __m256i __A, __m256i __B) |
| 4667 | 4461 | (__v8si)_mm256_setzero_si256()); |
| 4668 | 4462 | } |
| 4669 | 4463 | |
| 4670 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4464 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4671 | 4465 | _mm_rorv_epi64 (__m128i __A, __m128i __B) |
| 4672 | 4466 | { |
| 4673 | return (__m128i)__builtin_ia32_prorvq128((__v2di)__A, (__v2di)__B); | |
| 4467 | return (__m128i)__builtin_elementwise_fshr((__v2du)__A, (__v2du)__A, (__v2du)__B); | |
| 4674 | 4468 | } |
| 4675 | 4469 | |
| 4676 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4470 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4677 | 4471 | _mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 4678 | 4472 | { |
| 4679 | 4473 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -4681,7 +4475,7 @@ _mm_mask_rorv_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
| 4681 | 4475 | (__v2di)__W); |
| 4682 | 4476 | } |
| 4683 | 4477 | |
| 4684 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4478 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4685 | 4479 | _mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B) |
| 4686 | 4480 | { |
| 4687 | 4481 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -4689,13 +4483,13 @@ _mm_maskz_rorv_epi64 (__mmask8 __U, __m128i __A, __m128i __B) |
| 4689 | 4483 | (__v2di)_mm_setzero_si128()); |
| 4690 | 4484 | } |
| 4691 | 4485 | |
| 4692 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4486 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4693 | 4487 | _mm256_rorv_epi64 (__m256i __A, __m256i __B) |
| 4694 | 4488 | { |
| 4695 | return (__m256i)__builtin_ia32_prorvq256((__v4di)__A, (__v4di)__B); | |
| 4489 | return (__m256i)__builtin_elementwise_fshr((__v4du)__A, (__v4du)__A, (__v4du)__B); | |
| 4696 | 4490 | } |
| 4697 | 4491 | |
| 4698 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4492 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4699 | 4493 | _mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
| 4700 | 4494 | { |
| 4701 | 4495 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -4703,7 +4497,7 @@ _mm256_mask_rorv_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
| 4703 | 4497 | (__v4di)__W); |
| 4704 | 4498 | } |
| 4705 | 4499 | |
| 4706 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4500 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4707 | 4501 | _mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B) |
| 4708 | 4502 | { |
| 4709 | 4503 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -4711,7 +4505,7 @@ _mm256_maskz_rorv_epi64 (__mmask8 __U, __m256i __A, __m256i __B) |
| 4711 | 4505 | (__v4di)_mm256_setzero_si256()); |
| 4712 | 4506 | } |
| 4713 | 4507 | |
| 4714 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4508 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4715 | 4509 | _mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4716 | 4510 | { |
| 4717 | 4511 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| ... | ... | @@ -4719,7 +4513,7 @@ _mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4719 | 4513 | (__v2di)__W); |
| 4720 | 4514 | } |
| 4721 | 4515 | |
| 4722 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4516 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4723 | 4517 | _mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4724 | 4518 | { |
| 4725 | 4519 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| ... | ... | @@ -4727,7 +4521,7 @@ _mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4727 | 4521 | (__v2di)_mm_setzero_si128()); |
| 4728 | 4522 | } |
| 4729 | 4523 | |
| 4730 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4524 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4731 | 4525 | _mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4732 | 4526 | { |
| 4733 | 4527 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| ... | ... | @@ -4735,7 +4529,7 @@ _mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4735 | 4529 | (__v4di)__W); |
| 4736 | 4530 | } |
| 4737 | 4531 | |
| 4738 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4532 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4739 | 4533 | _mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4740 | 4534 | { |
| 4741 | 4535 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| ... | ... | @@ -4743,7 +4537,7 @@ _mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4743 | 4537 | (__v4di)_mm256_setzero_si256()); |
| 4744 | 4538 | } |
| 4745 | 4539 | |
| 4746 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4540 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4747 | 4541 | _mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4748 | 4542 | { |
| 4749 | 4543 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| ... | ... | @@ -4751,7 +4545,7 @@ _mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4751 | 4545 | (__v4si)__W); |
| 4752 | 4546 | } |
| 4753 | 4547 | |
| 4754 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4548 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4755 | 4549 | _mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4756 | 4550 | { |
| 4757 | 4551 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| ... | ... | @@ -4759,7 +4553,7 @@ _mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4759 | 4553 | (__v4si)_mm_setzero_si128()); |
| 4760 | 4554 | } |
| 4761 | 4555 | |
| 4762 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4556 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4763 | 4557 | _mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4764 | 4558 | { |
| 4765 | 4559 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| ... | ... | @@ -4767,7 +4561,7 @@ _mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4767 | 4561 | (__v8si)__W); |
| 4768 | 4562 | } |
| 4769 | 4563 | |
| 4770 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4564 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4771 | 4565 | _mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4772 | 4566 | { |
| 4773 | 4567 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| ... | ... | @@ -4775,7 +4569,7 @@ _mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4775 | 4569 | (__v8si)_mm256_setzero_si256()); |
| 4776 | 4570 | } |
| 4777 | 4571 | |
| 4778 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4572 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4779 | 4573 | _mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4780 | 4574 | { |
| 4781 | 4575 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| ... | ... | @@ -4783,7 +4577,7 @@ _mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4783 | 4577 | (__v2di)__W); |
| 4784 | 4578 | } |
| 4785 | 4579 | |
| 4786 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4580 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4787 | 4581 | _mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4788 | 4582 | { |
| 4789 | 4583 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| ... | ... | @@ -4791,7 +4585,7 @@ _mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4791 | 4585 | (__v2di)_mm_setzero_si128()); |
| 4792 | 4586 | } |
| 4793 | 4587 | |
| 4794 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4588 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4795 | 4589 | _mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4796 | 4590 | { |
| 4797 | 4591 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| ... | ... | @@ -4799,7 +4593,7 @@ _mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4799 | 4593 | (__v4di)__W); |
| 4800 | 4594 | } |
| 4801 | 4595 | |
| 4802 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4596 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4803 | 4597 | _mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4804 | 4598 | { |
| 4805 | 4599 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| ... | ... | @@ -4807,7 +4601,7 @@ _mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4807 | 4601 | (__v4di)_mm256_setzero_si256()); |
| 4808 | 4602 | } |
| 4809 | 4603 | |
| 4810 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4604 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4811 | 4605 | _mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4812 | 4606 | { |
| 4813 | 4607 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| ... | ... | @@ -4815,7 +4609,7 @@ _mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4815 | 4609 | (__v4si)__W); |
| 4816 | 4610 | } |
| 4817 | 4611 | |
| 4818 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4612 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4819 | 4613 | _mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4820 | 4614 | { |
| 4821 | 4615 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| ... | ... | @@ -4823,7 +4617,7 @@ _mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4823 | 4617 | (__v4si)_mm_setzero_si128()); |
| 4824 | 4618 | } |
| 4825 | 4619 | |
| 4826 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4620 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4827 | 4621 | _mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4828 | 4622 | { |
| 4829 | 4623 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| ... | ... | @@ -4831,7 +4625,7 @@ _mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4831 | 4625 | (__v8si)__W); |
| 4832 | 4626 | } |
| 4833 | 4627 | |
| 4834 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4628 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4835 | 4629 | _mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4836 | 4630 | { |
| 4837 | 4631 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| ... | ... | @@ -4839,33 +4633,29 @@ _mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4839 | 4633 | (__v8si)_mm256_setzero_si256()); |
| 4840 | 4634 | } |
| 4841 | 4635 | |
| 4842 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4843 | _mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 4844 | { | |
| 4636 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4637 | _mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 4845 | 4638 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 4846 | 4639 | (__v4si)_mm_srl_epi32(__A, __B), |
| 4847 | 4640 | (__v4si)__W); |
| 4848 | 4641 | } |
| 4849 | 4642 | |
| 4850 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4851 | _mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B) | |
| 4852 | { | |
| 4643 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4644 | _mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 4853 | 4645 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 4854 | 4646 | (__v4si)_mm_srl_epi32(__A, __B), |
| 4855 | 4647 | (__v4si)_mm_setzero_si128()); |
| 4856 | 4648 | } |
| 4857 | 4649 | |
| 4858 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4859 | _mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) | |
| 4860 | { | |
| 4650 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4651 | _mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { | |
| 4861 | 4652 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 4862 | 4653 | (__v8si)_mm256_srl_epi32(__A, __B), |
| 4863 | 4654 | (__v8si)__W); |
| 4864 | 4655 | } |
| 4865 | 4656 | |
| 4866 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4867 | _mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B) | |
| 4868 | { | |
| 4657 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4658 | _mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B) { | |
| 4869 | 4659 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 4870 | 4660 | (__v8si)_mm256_srl_epi32(__A, __B), |
| 4871 | 4661 | (__v8si)_mm256_setzero_si256()); |
| ... | ... | @@ -4887,49 +4677,44 @@ _mm_maskz_srli_epi32(__mmask8 __U, __m128i __A, unsigned int __B) |
| 4887 | 4677 | (__v4si)_mm_setzero_si128()); |
| 4888 | 4678 | } |
| 4889 | 4679 | |
| 4890 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4891 | _mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) | |
| 4892 | { | |
| 4680 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4681 | _mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A, | |
| 4682 | unsigned int __B) { | |
| 4893 | 4683 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 4894 | 4684 | (__v8si)_mm256_srli_epi32(__A, (int)__B), |
| 4895 | 4685 | (__v8si)__W); |
| 4896 | 4686 | } |
| 4897 | 4687 | |
| 4898 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4899 | _mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) | |
| 4900 | { | |
| 4688 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4689 | _mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A, unsigned int __B) { | |
| 4901 | 4690 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 4902 | 4691 | (__v8si)_mm256_srli_epi32(__A, (int)__B), |
| 4903 | 4692 | (__v8si)_mm256_setzero_si256()); |
| 4904 | 4693 | } |
| 4905 | 4694 | |
| 4906 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4907 | _mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 4908 | { | |
| 4695 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4696 | _mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 4909 | 4697 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 4910 | 4698 | (__v2di)_mm_srl_epi64(__A, __B), |
| 4911 | 4699 | (__v2di)__W); |
| 4912 | 4700 | } |
| 4913 | 4701 | |
| 4914 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4915 | _mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B) | |
| 4916 | { | |
| 4702 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4703 | _mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 4917 | 4704 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 4918 | 4705 | (__v2di)_mm_srl_epi64(__A, __B), |
| 4919 | 4706 | (__v2di)_mm_setzero_si128()); |
| 4920 | 4707 | } |
| 4921 | 4708 | |
| 4922 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4923 | _mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) | |
| 4924 | { | |
| 4709 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4710 | _mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { | |
| 4925 | 4711 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 4926 | 4712 | (__v4di)_mm256_srl_epi64(__A, __B), |
| 4927 | 4713 | (__v4di)__W); |
| 4928 | 4714 | } |
| 4929 | 4715 | |
| 4930 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4931 | _mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B) | |
| 4932 | { | |
| 4716 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4717 | _mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B) { | |
| 4933 | 4718 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 4934 | 4719 | (__v4di)_mm256_srl_epi64(__A, __B), |
| 4935 | 4720 | (__v4di)_mm256_setzero_si256()); |
| ... | ... | @@ -4951,23 +4736,22 @@ _mm_maskz_srli_epi64(__mmask8 __U, __m128i __A, unsigned int __B) |
| 4951 | 4736 | (__v2di)_mm_setzero_si128()); |
| 4952 | 4737 | } |
| 4953 | 4738 | |
| 4954 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4955 | _mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) | |
| 4956 | { | |
| 4739 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4740 | _mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A, | |
| 4741 | unsigned int __B) { | |
| 4957 | 4742 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 4958 | 4743 | (__v4di)_mm256_srli_epi64(__A, (int)__B), |
| 4959 | 4744 | (__v4di)__W); |
| 4960 | 4745 | } |
| 4961 | 4746 | |
| 4962 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4963 | _mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) | |
| 4964 | { | |
| 4747 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4748 | _mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A, unsigned int __B) { | |
| 4965 | 4749 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 4966 | 4750 | (__v4di)_mm256_srli_epi64(__A, (int)__B), |
| 4967 | 4751 | (__v4di)_mm256_setzero_si256()); |
| 4968 | 4752 | } |
| 4969 | 4753 | |
| 4970 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4754 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4971 | 4755 | _mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4972 | 4756 | { |
| 4973 | 4757 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| ... | ... | @@ -4975,7 +4759,7 @@ _mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 4975 | 4759 | (__v4si)__W); |
| 4976 | 4760 | } |
| 4977 | 4761 | |
| 4978 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4762 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 4979 | 4763 | _mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4980 | 4764 | { |
| 4981 | 4765 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| ... | ... | @@ -4983,7 +4767,7 @@ _mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y) |
| 4983 | 4767 | (__v4si)_mm_setzero_si128()); |
| 4984 | 4768 | } |
| 4985 | 4769 | |
| 4986 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4770 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4987 | 4771 | _mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4988 | 4772 | { |
| 4989 | 4773 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| ... | ... | @@ -4991,7 +4775,7 @@ _mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 4991 | 4775 | (__v8si)__W); |
| 4992 | 4776 | } |
| 4993 | 4777 | |
| 4994 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4778 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 4995 | 4779 | _mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4996 | 4780 | { |
| 4997 | 4781 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| ... | ... | @@ -4999,13 +4783,13 @@ _mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y) |
| 4999 | 4783 | (__v8si)_mm256_setzero_si256()); |
| 5000 | 4784 | } |
| 5001 | 4785 | |
| 5002 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4786 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5003 | 4787 | _mm_srav_epi64(__m128i __X, __m128i __Y) |
| 5004 | 4788 | { |
| 5005 | 4789 | return (__m128i)__builtin_ia32_psravq128((__v2di)__X, (__v2di)__Y); |
| 5006 | 4790 | } |
| 5007 | 4791 | |
| 5008 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4792 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5009 | 4793 | _mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 5010 | 4794 | { |
| 5011 | 4795 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| ... | ... | @@ -5013,7 +4797,7 @@ _mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) |
| 5013 | 4797 | (__v2di)__W); |
| 5014 | 4798 | } |
| 5015 | 4799 | |
| 5016 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 4800 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5017 | 4801 | _mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y) |
| 5018 | 4802 | { |
| 5019 | 4803 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| ... | ... | @@ -5021,13 +4805,13 @@ _mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y) |
| 5021 | 4805 | (__v2di)_mm_setzero_si128()); |
| 5022 | 4806 | } |
| 5023 | 4807 | |
| 5024 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4808 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5025 | 4809 | _mm256_srav_epi64(__m256i __X, __m256i __Y) |
| 5026 | 4810 | { |
| 5027 | 4811 | return (__m256i)__builtin_ia32_psravq256((__v4di)__X, (__v4di) __Y); |
| 5028 | 4812 | } |
| 5029 | 4813 | |
| 5030 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4814 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5031 | 4815 | _mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 5032 | 4816 | { |
| 5033 | 4817 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| ... | ... | @@ -5035,7 +4819,7 @@ _mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) |
| 5035 | 4819 | (__v4di)__W); |
| 5036 | 4820 | } |
| 5037 | 4821 | |
| 5038 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 4822 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5039 | 4823 | _mm256_maskz_srav_epi64 (__mmask8 __U, __m256i __X, __m256i __Y) |
| 5040 | 4824 | { |
| 5041 | 4825 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| ... | ... | @@ -5296,69 +5080,55 @@ _mm256_maskz_movedup_pd (__mmask8 __U, __m256d __A) |
| 5296 | 5080 | (__v4df)_mm256_setzero_pd()); |
| 5297 | 5081 | } |
| 5298 | 5082 | |
| 5299 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 5300 | _mm_mask_set1_epi32(__m128i __O, __mmask8 __M, int __A) | |
| 5301 | { | |
| 5302 | return (__m128i)__builtin_ia32_selectd_128(__M, | |
| 5303 | (__v4si) _mm_set1_epi32(__A), | |
| 5304 | (__v4si)__O); | |
| 5083 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5084 | _mm_mask_set1_epi32(__m128i __O, __mmask8 __M, int __A) { | |
| 5085 | return (__m128i)__builtin_ia32_selectd_128(__M, (__v4si)_mm_set1_epi32(__A), | |
| 5086 | (__v4si)__O); | |
| 5305 | 5087 | } |
| 5306 | 5088 | |
| 5307 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 5308 | _mm_maskz_set1_epi32( __mmask8 __M, int __A) | |
| 5309 | { | |
| 5310 | return (__m128i)__builtin_ia32_selectd_128(__M, | |
| 5311 | (__v4si) _mm_set1_epi32(__A), | |
| 5312 | (__v4si)_mm_setzero_si128()); | |
| 5089 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5090 | _mm_maskz_set1_epi32(__mmask8 __M, int __A) { | |
| 5091 | return (__m128i)__builtin_ia32_selectd_128(__M, (__v4si)_mm_set1_epi32(__A), | |
| 5092 | (__v4si)_mm_setzero_si128()); | |
| 5313 | 5093 | } |
| 5314 | 5094 | |
| 5315 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 5316 | _mm256_mask_set1_epi32(__m256i __O, __mmask8 __M, int __A) | |
| 5317 | { | |
| 5318 | return (__m256i)__builtin_ia32_selectd_256(__M, | |
| 5319 | (__v8si) _mm256_set1_epi32(__A), | |
| 5320 | (__v8si)__O); | |
| 5095 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5096 | _mm256_mask_set1_epi32(__m256i __O, __mmask8 __M, int __A) { | |
| 5097 | return (__m256i)__builtin_ia32_selectd_256( | |
| 5098 | __M, (__v8si)_mm256_set1_epi32(__A), (__v8si)__O); | |
| 5321 | 5099 | } |
| 5322 | 5100 | |
| 5323 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 5324 | _mm256_maskz_set1_epi32( __mmask8 __M, int __A) | |
| 5325 | { | |
| 5326 | return (__m256i)__builtin_ia32_selectd_256(__M, | |
| 5327 | (__v8si) _mm256_set1_epi32(__A), | |
| 5328 | (__v8si)_mm256_setzero_si256()); | |
| 5101 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5102 | _mm256_maskz_set1_epi32(__mmask8 __M, int __A) { | |
| 5103 | return (__m256i)__builtin_ia32_selectd_256( | |
| 5104 | __M, (__v8si)_mm256_set1_epi32(__A), (__v8si)_mm256_setzero_si256()); | |
| 5329 | 5105 | } |
| 5330 | 5106 | |
| 5331 | ||
| 5332 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 5333 | _mm_mask_set1_epi64 (__m128i __O, __mmask8 __M, long long __A) | |
| 5334 | { | |
| 5107 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5108 | _mm_mask_set1_epi64(__m128i __O, __mmask8 __M, long long __A) { | |
| 5335 | 5109 | return (__m128i) __builtin_ia32_selectq_128(__M, |
| 5336 | 5110 | (__v2di) _mm_set1_epi64x(__A), |
| 5337 | 5111 | (__v2di) __O); |
| 5338 | 5112 | } |
| 5339 | 5113 | |
| 5340 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 5341 | _mm_maskz_set1_epi64 (__mmask8 __M, long long __A) | |
| 5342 | { | |
| 5114 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5115 | _mm_maskz_set1_epi64(__mmask8 __M, long long __A) { | |
| 5343 | 5116 | return (__m128i) __builtin_ia32_selectq_128(__M, |
| 5344 | 5117 | (__v2di) _mm_set1_epi64x(__A), |
| 5345 | 5118 | (__v2di) _mm_setzero_si128()); |
| 5346 | 5119 | } |
| 5347 | 5120 | |
| 5348 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 5349 | _mm256_mask_set1_epi64 (__m256i __O, __mmask8 __M, long long __A) | |
| 5350 | { | |
| 5121 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5122 | _mm256_mask_set1_epi64(__m256i __O, __mmask8 __M, long long __A) { | |
| 5351 | 5123 | return (__m256i) __builtin_ia32_selectq_256(__M, |
| 5352 | 5124 | (__v4di) _mm256_set1_epi64x(__A), |
| 5353 | 5125 | (__v4di) __O) ; |
| 5354 | 5126 | } |
| 5355 | 5127 | |
| 5356 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 5357 | _mm256_maskz_set1_epi64 (__mmask8 __M, long long __A) | |
| 5358 | { | |
| 5359 | return (__m256i) __builtin_ia32_selectq_256(__M, | |
| 5360 | (__v4di) _mm256_set1_epi64x(__A), | |
| 5361 | (__v4di) _mm256_setzero_si256()); | |
| 5128 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5129 | _mm256_maskz_set1_epi64(__mmask8 __M, long long __A) { | |
| 5130 | return (__m256i)__builtin_ia32_selectq_256( | |
| 5131 | __M, (__v4di)_mm256_set1_epi64x(__A), (__v4di)_mm256_setzero_si256()); | |
| 5362 | 5132 | } |
| 5363 | 5133 | |
| 5364 | 5134 | #define _mm_fixupimm_pd(A, B, C, imm) \ |
| ... | ... | @@ -5805,130 +5575,113 @@ _mm256_mask_storeu_ps (void *__P, __mmask8 __U, __m256 __A) |
| 5805 | 5575 | (__mmask8) __U); |
| 5806 | 5576 | } |
| 5807 | 5577 | |
| 5808 | ||
| 5809 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 5810 | _mm_mask_unpackhi_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) | |
| 5811 | { | |
| 5578 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5579 | _mm_mask_unpackhi_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { | |
| 5812 | 5580 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 5813 | 5581 | (__v2df)_mm_unpackhi_pd(__A, __B), |
| 5814 | 5582 | (__v2df)__W); |
| 5815 | 5583 | } |
| 5816 | 5584 | |
| 5817 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 5818 | _mm_maskz_unpackhi_pd(__mmask8 __U, __m128d __A, __m128d __B) | |
| 5819 | { | |
| 5585 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5586 | _mm_maskz_unpackhi_pd(__mmask8 __U, __m128d __A, __m128d __B) { | |
| 5820 | 5587 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 5821 | 5588 | (__v2df)_mm_unpackhi_pd(__A, __B), |
| 5822 | 5589 | (__v2df)_mm_setzero_pd()); |
| 5823 | 5590 | } |
| 5824 | 5591 | |
| 5825 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 5826 | _mm256_mask_unpackhi_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) | |
| 5827 | { | |
| 5592 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5593 | _mm256_mask_unpackhi_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { | |
| 5828 | 5594 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 5829 | 5595 | (__v4df)_mm256_unpackhi_pd(__A, __B), |
| 5830 | 5596 | (__v4df)__W); |
| 5831 | 5597 | } |
| 5832 | 5598 | |
| 5833 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 5834 | _mm256_maskz_unpackhi_pd(__mmask8 __U, __m256d __A, __m256d __B) | |
| 5835 | { | |
| 5599 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5600 | _mm256_maskz_unpackhi_pd(__mmask8 __U, __m256d __A, __m256d __B) { | |
| 5836 | 5601 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 5837 | 5602 | (__v4df)_mm256_unpackhi_pd(__A, __B), |
| 5838 | 5603 | (__v4df)_mm256_setzero_pd()); |
| 5839 | 5604 | } |
| 5840 | 5605 | |
| 5841 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 5842 | _mm_mask_unpackhi_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) | |
| 5843 | { | |
| 5606 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5607 | _mm_mask_unpackhi_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { | |
| 5844 | 5608 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 5845 | 5609 | (__v4sf)_mm_unpackhi_ps(__A, __B), |
| 5846 | 5610 | (__v4sf)__W); |
| 5847 | 5611 | } |
| 5848 | 5612 | |
| 5849 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 5850 | _mm_maskz_unpackhi_ps(__mmask8 __U, __m128 __A, __m128 __B) | |
| 5851 | { | |
| 5613 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5614 | _mm_maskz_unpackhi_ps(__mmask8 __U, __m128 __A, __m128 __B) { | |
| 5852 | 5615 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 5853 | 5616 | (__v4sf)_mm_unpackhi_ps(__A, __B), |
| 5854 | 5617 | (__v4sf)_mm_setzero_ps()); |
| 5855 | 5618 | } |
| 5856 | 5619 | |
| 5857 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 5858 | _mm256_mask_unpackhi_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) | |
| 5859 | { | |
| 5620 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5621 | _mm256_mask_unpackhi_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { | |
| 5860 | 5622 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 5861 | 5623 | (__v8sf)_mm256_unpackhi_ps(__A, __B), |
| 5862 | 5624 | (__v8sf)__W); |
| 5863 | 5625 | } |
| 5864 | 5626 | |
| 5865 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 5866 | _mm256_maskz_unpackhi_ps(__mmask8 __U, __m256 __A, __m256 __B) | |
| 5867 | { | |
| 5627 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5628 | _mm256_maskz_unpackhi_ps(__mmask8 __U, __m256 __A, __m256 __B) { | |
| 5868 | 5629 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 5869 | 5630 | (__v8sf)_mm256_unpackhi_ps(__A, __B), |
| 5870 | 5631 | (__v8sf)_mm256_setzero_ps()); |
| 5871 | 5632 | } |
| 5872 | 5633 | |
| 5873 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 5874 | _mm_mask_unpacklo_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) | |
| 5875 | { | |
| 5634 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5635 | _mm_mask_unpacklo_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { | |
| 5876 | 5636 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 5877 | 5637 | (__v2df)_mm_unpacklo_pd(__A, __B), |
| 5878 | 5638 | (__v2df)__W); |
| 5879 | 5639 | } |
| 5880 | 5640 | |
| 5881 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 5882 | _mm_maskz_unpacklo_pd(__mmask8 __U, __m128d __A, __m128d __B) | |
| 5883 | { | |
| 5641 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5642 | _mm_maskz_unpacklo_pd(__mmask8 __U, __m128d __A, __m128d __B) { | |
| 5884 | 5643 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 5885 | 5644 | (__v2df)_mm_unpacklo_pd(__A, __B), |
| 5886 | 5645 | (__v2df)_mm_setzero_pd()); |
| 5887 | 5646 | } |
| 5888 | 5647 | |
| 5889 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 5890 | _mm256_mask_unpacklo_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) | |
| 5891 | { | |
| 5648 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5649 | _mm256_mask_unpacklo_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { | |
| 5892 | 5650 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 5893 | 5651 | (__v4df)_mm256_unpacklo_pd(__A, __B), |
| 5894 | 5652 | (__v4df)__W); |
| 5895 | 5653 | } |
| 5896 | 5654 | |
| 5897 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 5898 | _mm256_maskz_unpacklo_pd(__mmask8 __U, __m256d __A, __m256d __B) | |
| 5899 | { | |
| 5655 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5656 | _mm256_maskz_unpacklo_pd(__mmask8 __U, __m256d __A, __m256d __B) { | |
| 5900 | 5657 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 5901 | 5658 | (__v4df)_mm256_unpacklo_pd(__A, __B), |
| 5902 | 5659 | (__v4df)_mm256_setzero_pd()); |
| 5903 | 5660 | } |
| 5904 | 5661 | |
| 5905 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 5906 | _mm_mask_unpacklo_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) | |
| 5907 | { | |
| 5662 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5663 | _mm_mask_unpacklo_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { | |
| 5908 | 5664 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 5909 | 5665 | (__v4sf)_mm_unpacklo_ps(__A, __B), |
| 5910 | 5666 | (__v4sf)__W); |
| 5911 | 5667 | } |
| 5912 | 5668 | |
| 5913 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 5914 | _mm_maskz_unpacklo_ps(__mmask8 __U, __m128 __A, __m128 __B) | |
| 5915 | { | |
| 5669 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5670 | _mm_maskz_unpacklo_ps(__mmask8 __U, __m128 __A, __m128 __B) { | |
| 5916 | 5671 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 5917 | 5672 | (__v4sf)_mm_unpacklo_ps(__A, __B), |
| 5918 | 5673 | (__v4sf)_mm_setzero_ps()); |
| 5919 | 5674 | } |
| 5920 | 5675 | |
| 5921 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 5922 | _mm256_mask_unpacklo_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) | |
| 5923 | { | |
| 5676 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5677 | _mm256_mask_unpacklo_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { | |
| 5924 | 5678 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 5925 | 5679 | (__v8sf)_mm256_unpacklo_ps(__A, __B), |
| 5926 | 5680 | (__v8sf)__W); |
| 5927 | 5681 | } |
| 5928 | 5682 | |
| 5929 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 5930 | _mm256_maskz_unpacklo_ps(__mmask8 __U, __m256 __A, __m256 __B) | |
| 5931 | { | |
| 5683 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5684 | _mm256_maskz_unpacklo_ps(__mmask8 __U, __m256 __A, __m256 __B) { | |
| 5932 | 5685 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 5933 | 5686 | (__v8sf)_mm256_unpacklo_ps(__A, __B), |
| 5934 | 5687 | (__v8sf)_mm256_setzero_ps()); |
| ... | ... | @@ -6078,65 +5831,57 @@ _mm256_maskz_rcp14_ps (__mmask8 __U, __m256 __A) |
| 6078 | 5831 | (__v8sf)_mm256_permute_ps((X), (C)), \ |
| 6079 | 5832 | (__v8sf)_mm256_setzero_ps())) |
| 6080 | 5833 | |
| 6081 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 6082 | _mm_mask_permutevar_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128i __C) | |
| 6083 | { | |
| 5834 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5835 | _mm_mask_permutevar_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128i __C) { | |
| 6084 | 5836 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 6085 | 5837 | (__v2df)_mm_permutevar_pd(__A, __C), |
| 6086 | 5838 | (__v2df)__W); |
| 6087 | 5839 | } |
| 6088 | 5840 | |
| 6089 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 6090 | _mm_maskz_permutevar_pd(__mmask8 __U, __m128d __A, __m128i __C) | |
| 6091 | { | |
| 5841 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5842 | _mm_maskz_permutevar_pd(__mmask8 __U, __m128d __A, __m128i __C) { | |
| 6092 | 5843 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, |
| 6093 | 5844 | (__v2df)_mm_permutevar_pd(__A, __C), |
| 6094 | 5845 | (__v2df)_mm_setzero_pd()); |
| 6095 | 5846 | } |
| 6096 | 5847 | |
| 6097 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 6098 | _mm256_mask_permutevar_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256i __C) | |
| 6099 | { | |
| 5848 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5849 | _mm256_mask_permutevar_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256i __C) { | |
| 6100 | 5850 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 6101 | 5851 | (__v4df)_mm256_permutevar_pd(__A, __C), |
| 6102 | 5852 | (__v4df)__W); |
| 6103 | 5853 | } |
| 6104 | 5854 | |
| 6105 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 6106 | _mm256_maskz_permutevar_pd(__mmask8 __U, __m256d __A, __m256i __C) | |
| 6107 | { | |
| 5855 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5856 | _mm256_maskz_permutevar_pd(__mmask8 __U, __m256d __A, __m256i __C) { | |
| 6108 | 5857 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 6109 | 5858 | (__v4df)_mm256_permutevar_pd(__A, __C), |
| 6110 | 5859 | (__v4df)_mm256_setzero_pd()); |
| 6111 | 5860 | } |
| 6112 | 5861 | |
| 6113 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 6114 | _mm_mask_permutevar_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128i __C) | |
| 6115 | { | |
| 5862 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5863 | _mm_mask_permutevar_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128i __C) { | |
| 6116 | 5864 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 6117 | 5865 | (__v4sf)_mm_permutevar_ps(__A, __C), |
| 6118 | 5866 | (__v4sf)__W); |
| 6119 | 5867 | } |
| 6120 | 5868 | |
| 6121 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 6122 | _mm_maskz_permutevar_ps(__mmask8 __U, __m128 __A, __m128i __C) | |
| 6123 | { | |
| 5869 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5870 | _mm_maskz_permutevar_ps(__mmask8 __U, __m128 __A, __m128i __C) { | |
| 6124 | 5871 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 6125 | 5872 | (__v4sf)_mm_permutevar_ps(__A, __C), |
| 6126 | 5873 | (__v4sf)_mm_setzero_ps()); |
| 6127 | 5874 | } |
| 6128 | 5875 | |
| 6129 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 6130 | _mm256_mask_permutevar_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256i __C) | |
| 6131 | { | |
| 5876 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5877 | _mm256_mask_permutevar_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256i __C) { | |
| 6132 | 5878 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 6133 | 5879 | (__v8sf)_mm256_permutevar_ps(__A, __C), |
| 6134 | 5880 | (__v8sf)__W); |
| 6135 | 5881 | } |
| 6136 | 5882 | |
| 6137 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 6138 | _mm256_maskz_permutevar_ps(__mmask8 __U, __m256 __A, __m256i __C) | |
| 6139 | { | |
| 5883 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 5884 | _mm256_maskz_permutevar_ps(__mmask8 __U, __m256 __A, __m256i __C) { | |
| 6140 | 5885 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 6141 | 5886 | (__v8sf)_mm256_permutevar_ps(__A, __C), |
| 6142 | 5887 | (__v8sf)_mm256_setzero_ps()); |
| ... | ... | @@ -6250,282 +5995,251 @@ _mm256_mask_testn_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B) |
| 6250 | 5995 | _mm256_setzero_si256()); |
| 6251 | 5996 | } |
| 6252 | 5997 | |
| 6253 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6254 | _mm_mask_unpackhi_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 6255 | { | |
| 5998 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 5999 | _mm_mask_unpackhi_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 6256 | 6000 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 6257 | 6001 | (__v4si)_mm_unpackhi_epi32(__A, __B), |
| 6258 | 6002 | (__v4si)__W); |
| 6259 | 6003 | } |
| 6260 | 6004 | |
| 6261 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6262 | _mm_maskz_unpackhi_epi32(__mmask8 __U, __m128i __A, __m128i __B) | |
| 6263 | { | |
| 6005 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6006 | _mm_maskz_unpackhi_epi32(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 6264 | 6007 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 6265 | 6008 | (__v4si)_mm_unpackhi_epi32(__A, __B), |
| 6266 | 6009 | (__v4si)_mm_setzero_si128()); |
| 6267 | 6010 | } |
| 6268 | 6011 | |
| 6269 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6270 | _mm256_mask_unpackhi_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) | |
| 6271 | { | |
| 6012 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6013 | _mm256_mask_unpackhi_epi32(__m256i __W, __mmask8 __U, __m256i __A, | |
| 6014 | __m256i __B) { | |
| 6272 | 6015 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 6273 | 6016 | (__v8si)_mm256_unpackhi_epi32(__A, __B), |
| 6274 | 6017 | (__v8si)__W); |
| 6275 | 6018 | } |
| 6276 | 6019 | |
| 6277 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6278 | _mm256_maskz_unpackhi_epi32(__mmask8 __U, __m256i __A, __m256i __B) | |
| 6279 | { | |
| 6020 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6021 | _mm256_maskz_unpackhi_epi32(__mmask8 __U, __m256i __A, __m256i __B) { | |
| 6280 | 6022 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 6281 | 6023 | (__v8si)_mm256_unpackhi_epi32(__A, __B), |
| 6282 | 6024 | (__v8si)_mm256_setzero_si256()); |
| 6283 | 6025 | } |
| 6284 | 6026 | |
| 6285 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6286 | _mm_mask_unpackhi_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 6287 | { | |
| 6027 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6028 | _mm_mask_unpackhi_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 6288 | 6029 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 6289 | 6030 | (__v2di)_mm_unpackhi_epi64(__A, __B), |
| 6290 | 6031 | (__v2di)__W); |
| 6291 | 6032 | } |
| 6292 | 6033 | |
| 6293 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6294 | _mm_maskz_unpackhi_epi64(__mmask8 __U, __m128i __A, __m128i __B) | |
| 6295 | { | |
| 6034 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6035 | _mm_maskz_unpackhi_epi64(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 6296 | 6036 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 6297 | 6037 | (__v2di)_mm_unpackhi_epi64(__A, __B), |
| 6298 | 6038 | (__v2di)_mm_setzero_si128()); |
| 6299 | 6039 | } |
| 6300 | 6040 | |
| 6301 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6302 | _mm256_mask_unpackhi_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) | |
| 6303 | { | |
| 6041 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6042 | _mm256_mask_unpackhi_epi64(__m256i __W, __mmask8 __U, __m256i __A, | |
| 6043 | __m256i __B) { | |
| 6304 | 6044 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 6305 | 6045 | (__v4di)_mm256_unpackhi_epi64(__A, __B), |
| 6306 | 6046 | (__v4di)__W); |
| 6307 | 6047 | } |
| 6308 | 6048 | |
| 6309 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6310 | _mm256_maskz_unpackhi_epi64(__mmask8 __U, __m256i __A, __m256i __B) | |
| 6311 | { | |
| 6049 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6050 | _mm256_maskz_unpackhi_epi64(__mmask8 __U, __m256i __A, __m256i __B) { | |
| 6312 | 6051 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 6313 | 6052 | (__v4di)_mm256_unpackhi_epi64(__A, __B), |
| 6314 | 6053 | (__v4di)_mm256_setzero_si256()); |
| 6315 | 6054 | } |
| 6316 | 6055 | |
| 6317 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6318 | _mm_mask_unpacklo_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 6319 | { | |
| 6056 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6057 | _mm_mask_unpacklo_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 6320 | 6058 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 6321 | 6059 | (__v4si)_mm_unpacklo_epi32(__A, __B), |
| 6322 | 6060 | (__v4si)__W); |
| 6323 | 6061 | } |
| 6324 | 6062 | |
| 6325 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6326 | _mm_maskz_unpacklo_epi32(__mmask8 __U, __m128i __A, __m128i __B) | |
| 6327 | { | |
| 6063 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6064 | _mm_maskz_unpacklo_epi32(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 6328 | 6065 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 6329 | 6066 | (__v4si)_mm_unpacklo_epi32(__A, __B), |
| 6330 | 6067 | (__v4si)_mm_setzero_si128()); |
| 6331 | 6068 | } |
| 6332 | 6069 | |
| 6333 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6334 | _mm256_mask_unpacklo_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) | |
| 6335 | { | |
| 6070 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6071 | _mm256_mask_unpacklo_epi32(__m256i __W, __mmask8 __U, __m256i __A, | |
| 6072 | __m256i __B) { | |
| 6336 | 6073 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 6337 | 6074 | (__v8si)_mm256_unpacklo_epi32(__A, __B), |
| 6338 | 6075 | (__v8si)__W); |
| 6339 | 6076 | } |
| 6340 | 6077 | |
| 6341 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6342 | _mm256_maskz_unpacklo_epi32(__mmask8 __U, __m256i __A, __m256i __B) | |
| 6343 | { | |
| 6078 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6079 | _mm256_maskz_unpacklo_epi32(__mmask8 __U, __m256i __A, __m256i __B) { | |
| 6344 | 6080 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 6345 | 6081 | (__v8si)_mm256_unpacklo_epi32(__A, __B), |
| 6346 | 6082 | (__v8si)_mm256_setzero_si256()); |
| 6347 | 6083 | } |
| 6348 | 6084 | |
| 6349 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6350 | _mm_mask_unpacklo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 6351 | { | |
| 6085 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6086 | _mm_mask_unpacklo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 6352 | 6087 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 6353 | 6088 | (__v2di)_mm_unpacklo_epi64(__A, __B), |
| 6354 | 6089 | (__v2di)__W); |
| 6355 | 6090 | } |
| 6356 | 6091 | |
| 6357 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6358 | _mm_maskz_unpacklo_epi64(__mmask8 __U, __m128i __A, __m128i __B) | |
| 6359 | { | |
| 6092 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6093 | _mm_maskz_unpacklo_epi64(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 6360 | 6094 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, |
| 6361 | 6095 | (__v2di)_mm_unpacklo_epi64(__A, __B), |
| 6362 | 6096 | (__v2di)_mm_setzero_si128()); |
| 6363 | 6097 | } |
| 6364 | 6098 | |
| 6365 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6366 | _mm256_mask_unpacklo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) | |
| 6367 | { | |
| 6099 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6100 | _mm256_mask_unpacklo_epi64(__m256i __W, __mmask8 __U, __m256i __A, | |
| 6101 | __m256i __B) { | |
| 6368 | 6102 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 6369 | 6103 | (__v4di)_mm256_unpacklo_epi64(__A, __B), |
| 6370 | 6104 | (__v4di)__W); |
| 6371 | 6105 | } |
| 6372 | 6106 | |
| 6373 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6374 | _mm256_maskz_unpacklo_epi64(__mmask8 __U, __m256i __A, __m256i __B) | |
| 6375 | { | |
| 6107 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6108 | _mm256_maskz_unpacklo_epi64(__mmask8 __U, __m256i __A, __m256i __B) { | |
| 6376 | 6109 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, |
| 6377 | 6110 | (__v4di)_mm256_unpacklo_epi64(__A, __B), |
| 6378 | 6111 | (__v4di)_mm256_setzero_si256()); |
| 6379 | 6112 | } |
| 6380 | 6113 | |
| 6381 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6382 | _mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 6383 | { | |
| 6114 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6115 | _mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 6384 | 6116 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 6385 | 6117 | (__v4si)_mm_sra_epi32(__A, __B), |
| 6386 | 6118 | (__v4si)__W); |
| 6387 | 6119 | } |
| 6388 | 6120 | |
| 6389 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6390 | _mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B) | |
| 6391 | { | |
| 6121 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6122 | _mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 6392 | 6123 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 6393 | 6124 | (__v4si)_mm_sra_epi32(__A, __B), |
| 6394 | 6125 | (__v4si)_mm_setzero_si128()); |
| 6395 | 6126 | } |
| 6396 | 6127 | |
| 6397 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6398 | _mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) | |
| 6399 | { | |
| 6128 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6129 | _mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { | |
| 6400 | 6130 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 6401 | 6131 | (__v8si)_mm256_sra_epi32(__A, __B), |
| 6402 | 6132 | (__v8si)__W); |
| 6403 | 6133 | } |
| 6404 | 6134 | |
| 6405 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6406 | _mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B) | |
| 6407 | { | |
| 6135 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6136 | _mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B) { | |
| 6408 | 6137 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 6409 | 6138 | (__v8si)_mm256_sra_epi32(__A, __B), |
| 6410 | 6139 | (__v8si)_mm256_setzero_si256()); |
| 6411 | 6140 | } |
| 6412 | 6141 | |
| 6413 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6414 | _mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) | |
| 6415 | { | |
| 6142 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6143 | _mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { | |
| 6416 | 6144 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 6417 | 6145 | (__v4si)_mm_srai_epi32(__A, (int)__B), |
| 6418 | 6146 | (__v4si)__W); |
| 6419 | 6147 | } |
| 6420 | 6148 | |
| 6421 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6422 | _mm_maskz_srai_epi32(__mmask8 __U, __m128i __A, unsigned int __B) | |
| 6423 | { | |
| 6149 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6150 | _mm_maskz_srai_epi32(__mmask8 __U, __m128i __A, unsigned int __B) { | |
| 6424 | 6151 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__U, |
| 6425 | 6152 | (__v4si)_mm_srai_epi32(__A, (int)__B), |
| 6426 | 6153 | (__v4si)_mm_setzero_si128()); |
| 6427 | 6154 | } |
| 6428 | 6155 | |
| 6429 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6430 | _mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) | |
| 6431 | { | |
| 6156 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6157 | _mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A, | |
| 6158 | unsigned int __B) { | |
| 6432 | 6159 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 6433 | 6160 | (__v8si)_mm256_srai_epi32(__A, (int)__B), |
| 6434 | 6161 | (__v8si)__W); |
| 6435 | 6162 | } |
| 6436 | 6163 | |
| 6437 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6438 | _mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A, unsigned int __B) | |
| 6439 | { | |
| 6164 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6165 | _mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A, unsigned int __B) { | |
| 6440 | 6166 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U, |
| 6441 | 6167 | (__v8si)_mm256_srai_epi32(__A, (int)__B), |
| 6442 | 6168 | (__v8si)_mm256_setzero_si256()); |
| 6443 | 6169 | } |
| 6444 | 6170 | |
| 6445 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6446 | _mm_sra_epi64(__m128i __A, __m128i __B) | |
| 6447 | { | |
| 6171 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6172 | _mm_sra_epi64(__m128i __A, __m128i __B) { | |
| 6448 | 6173 | return (__m128i)__builtin_ia32_psraq128((__v2di)__A, (__v2di)__B); |
| 6449 | 6174 | } |
| 6450 | 6175 | |
| 6451 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6452 | _mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) | |
| 6453 | { | |
| 6176 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6177 | _mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { | |
| 6454 | 6178 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \ |
| 6455 | 6179 | (__v2di)_mm_sra_epi64(__A, __B), \ |
| 6456 | 6180 | (__v2di)__W); |
| 6457 | 6181 | } |
| 6458 | 6182 | |
| 6459 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6460 | _mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B) | |
| 6461 | { | |
| 6183 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6184 | _mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B) { | |
| 6462 | 6185 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \ |
| 6463 | 6186 | (__v2di)_mm_sra_epi64(__A, __B), \ |
| 6464 | 6187 | (__v2di)_mm_setzero_si128()); |
| 6465 | 6188 | } |
| 6466 | 6189 | |
| 6467 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6468 | _mm256_sra_epi64(__m256i __A, __m128i __B) | |
| 6469 | { | |
| 6190 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6191 | _mm256_sra_epi64(__m256i __A, __m128i __B) { | |
| 6470 | 6192 | return (__m256i)__builtin_ia32_psraq256((__v4di) __A, (__v2di) __B); |
| 6471 | 6193 | } |
| 6472 | 6194 | |
| 6473 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6474 | _mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) | |
| 6475 | { | |
| 6195 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6196 | _mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { | |
| 6476 | 6197 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \ |
| 6477 | 6198 | (__v4di)_mm256_sra_epi64(__A, __B), \ |
| 6478 | 6199 | (__v4di)__W); |
| 6479 | 6200 | } |
| 6480 | 6201 | |
| 6481 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6482 | _mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B) | |
| 6483 | { | |
| 6202 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6203 | _mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B) { | |
| 6484 | 6204 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \ |
| 6485 | 6205 | (__v4di)_mm256_sra_epi64(__A, __B), \ |
| 6486 | 6206 | (__v4di)_mm256_setzero_si256()); |
| 6487 | 6207 | } |
| 6488 | 6208 | |
| 6489 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6490 | _mm_srai_epi64(__m128i __A, unsigned int __imm) | |
| 6491 | { | |
| 6209 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6210 | _mm_srai_epi64(__m128i __A, unsigned int __imm) { | |
| 6492 | 6211 | return (__m128i)__builtin_ia32_psraqi128((__v2di)__A, (int)__imm); |
| 6493 | 6212 | } |
| 6494 | 6213 | |
| 6495 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6496 | _mm_mask_srai_epi64(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __imm) | |
| 6497 | { | |
| 6214 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_mask_srai_epi64( | |
| 6215 | __m128i __W, __mmask8 __U, __m128i __A, unsigned int __imm) { | |
| 6498 | 6216 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \ |
| 6499 | 6217 | (__v2di)_mm_srai_epi64(__A, __imm), \ |
| 6500 | 6218 | (__v2di)__W); |
| 6501 | 6219 | } |
| 6502 | 6220 | |
| 6503 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6504 | _mm_maskz_srai_epi64(__mmask8 __U, __m128i __A, unsigned int __imm) | |
| 6505 | { | |
| 6221 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6222 | _mm_maskz_srai_epi64(__mmask8 __U, __m128i __A, unsigned int __imm) { | |
| 6506 | 6223 | return (__m128i)__builtin_ia32_selectq_128((__mmask8)__U, \ |
| 6507 | 6224 | (__v2di)_mm_srai_epi64(__A, __imm), \ |
| 6508 | 6225 | (__v2di)_mm_setzero_si128()); |
| 6509 | 6226 | } |
| 6510 | 6227 | |
| 6511 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6512 | _mm256_srai_epi64(__m256i __A, unsigned int __imm) | |
| 6513 | { | |
| 6228 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6229 | _mm256_srai_epi64(__m256i __A, unsigned int __imm) { | |
| 6514 | 6230 | return (__m256i)__builtin_ia32_psraqi256((__v4di)__A, (int)__imm); |
| 6515 | 6231 | } |
| 6516 | 6232 | |
| 6517 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6233 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6518 | 6234 | _mm256_mask_srai_epi64(__m256i __W, __mmask8 __U, __m256i __A, |
| 6519 | unsigned int __imm) | |
| 6520 | { | |
| 6235 | unsigned int __imm) { | |
| 6521 | 6236 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \ |
| 6522 | 6237 | (__v4di)_mm256_srai_epi64(__A, __imm), \ |
| 6523 | 6238 | (__v4di)__W); |
| 6524 | 6239 | } |
| 6525 | 6240 | |
| 6526 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6527 | _mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A, unsigned int __imm) | |
| 6528 | { | |
| 6241 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6242 | _mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A, unsigned int __imm) { | |
| 6529 | 6243 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__U, \ |
| 6530 | 6244 | (__v4di)_mm256_srai_epi64(__A, __imm), \ |
| 6531 | 6245 | (__v4di)_mm256_setzero_si256()); |
| ... | ... | @@ -6792,159 +6506,139 @@ _mm256_maskz_rsqrt14_ps (__mmask8 __U, __m256 __A) |
| 6792 | 6506 | (__mmask8) __U); |
| 6793 | 6507 | } |
| 6794 | 6508 | |
| 6795 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 6796 | _mm256_broadcast_f32x4(__m128 __A) | |
| 6797 | { | |
| 6509 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6510 | _mm256_broadcast_f32x4(__m128 __A) { | |
| 6798 | 6511 | return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, |
| 6799 | 6512 | 0, 1, 2, 3, 0, 1, 2, 3); |
| 6800 | 6513 | } |
| 6801 | 6514 | |
| 6802 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 6803 | _mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A) | |
| 6804 | { | |
| 6515 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6516 | _mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A) { | |
| 6805 | 6517 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__M, |
| 6806 | 6518 | (__v8sf)_mm256_broadcast_f32x4(__A), |
| 6807 | 6519 | (__v8sf)__O); |
| 6808 | 6520 | } |
| 6809 | 6521 | |
| 6810 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 6811 | _mm256_maskz_broadcast_f32x4 (__mmask8 __M, __m128 __A) | |
| 6812 | { | |
| 6522 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6523 | _mm256_maskz_broadcast_f32x4(__mmask8 __M, __m128 __A) { | |
| 6813 | 6524 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__M, |
| 6814 | 6525 | (__v8sf)_mm256_broadcast_f32x4(__A), |
| 6815 | 6526 | (__v8sf)_mm256_setzero_ps()); |
| 6816 | 6527 | } |
| 6817 | 6528 | |
| 6818 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6819 | _mm256_broadcast_i32x4(__m128i __A) | |
| 6820 | { | |
| 6529 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6530 | _mm256_broadcast_i32x4(__m128i __A) { | |
| 6821 | 6531 | return (__m256i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, |
| 6822 | 6532 | 0, 1, 2, 3, 0, 1, 2, 3); |
| 6823 | 6533 | } |
| 6824 | 6534 | |
| 6825 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6826 | _mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i __A) | |
| 6827 | { | |
| 6535 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6536 | _mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i __A) { | |
| 6828 | 6537 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 6829 | 6538 | (__v8si)_mm256_broadcast_i32x4(__A), |
| 6830 | 6539 | (__v8si)__O); |
| 6831 | 6540 | } |
| 6832 | 6541 | |
| 6833 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6834 | _mm256_maskz_broadcast_i32x4(__mmask8 __M, __m128i __A) | |
| 6835 | { | |
| 6542 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6543 | _mm256_maskz_broadcast_i32x4(__mmask8 __M, __m128i __A) { | |
| 6836 | 6544 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 6837 | 6545 | (__v8si)_mm256_broadcast_i32x4(__A), |
| 6838 | 6546 | (__v8si)_mm256_setzero_si256()); |
| 6839 | 6547 | } |
| 6840 | 6548 | |
| 6841 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 6842 | _mm256_mask_broadcastsd_pd (__m256d __O, __mmask8 __M, __m128d __A) | |
| 6843 | { | |
| 6549 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6550 | _mm256_mask_broadcastsd_pd(__m256d __O, __mmask8 __M, __m128d __A) { | |
| 6844 | 6551 | return (__m256d)__builtin_ia32_selectpd_256(__M, |
| 6845 | 6552 | (__v4df) _mm256_broadcastsd_pd(__A), |
| 6846 | 6553 | (__v4df) __O); |
| 6847 | 6554 | } |
| 6848 | 6555 | |
| 6849 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 6850 | _mm256_maskz_broadcastsd_pd (__mmask8 __M, __m128d __A) | |
| 6851 | { | |
| 6556 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6557 | _mm256_maskz_broadcastsd_pd(__mmask8 __M, __m128d __A) { | |
| 6852 | 6558 | return (__m256d)__builtin_ia32_selectpd_256(__M, |
| 6853 | 6559 | (__v4df) _mm256_broadcastsd_pd(__A), |
| 6854 | 6560 | (__v4df) _mm256_setzero_pd()); |
| 6855 | 6561 | } |
| 6856 | 6562 | |
| 6857 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 6858 | _mm_mask_broadcastss_ps (__m128 __O, __mmask8 __M, __m128 __A) | |
| 6859 | { | |
| 6563 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6564 | _mm_mask_broadcastss_ps(__m128 __O, __mmask8 __M, __m128 __A) { | |
| 6860 | 6565 | return (__m128)__builtin_ia32_selectps_128(__M, |
| 6861 | 6566 | (__v4sf) _mm_broadcastss_ps(__A), |
| 6862 | 6567 | (__v4sf) __O); |
| 6863 | 6568 | } |
| 6864 | 6569 | |
| 6865 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 6866 | _mm_maskz_broadcastss_ps (__mmask8 __M, __m128 __A) | |
| 6867 | { | |
| 6570 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6571 | _mm_maskz_broadcastss_ps(__mmask8 __M, __m128 __A) { | |
| 6868 | 6572 | return (__m128)__builtin_ia32_selectps_128(__M, |
| 6869 | 6573 | (__v4sf) _mm_broadcastss_ps(__A), |
| 6870 | 6574 | (__v4sf) _mm_setzero_ps()); |
| 6871 | 6575 | } |
| 6872 | 6576 | |
| 6873 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 6874 | _mm256_mask_broadcastss_ps (__m256 __O, __mmask8 __M, __m128 __A) | |
| 6875 | { | |
| 6577 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6578 | _mm256_mask_broadcastss_ps(__m256 __O, __mmask8 __M, __m128 __A) { | |
| 6876 | 6579 | return (__m256)__builtin_ia32_selectps_256(__M, |
| 6877 | 6580 | (__v8sf) _mm256_broadcastss_ps(__A), |
| 6878 | 6581 | (__v8sf) __O); |
| 6879 | 6582 | } |
| 6880 | 6583 | |
| 6881 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 6882 | _mm256_maskz_broadcastss_ps (__mmask8 __M, __m128 __A) | |
| 6883 | { | |
| 6584 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6585 | _mm256_maskz_broadcastss_ps(__mmask8 __M, __m128 __A) { | |
| 6884 | 6586 | return (__m256)__builtin_ia32_selectps_256(__M, |
| 6885 | 6587 | (__v8sf) _mm256_broadcastss_ps(__A), |
| 6886 | 6588 | (__v8sf) _mm256_setzero_ps()); |
| 6887 | 6589 | } |
| 6888 | 6590 | |
| 6889 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6890 | _mm_mask_broadcastd_epi32 (__m128i __O, __mmask8 __M, __m128i __A) | |
| 6891 | { | |
| 6591 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6592 | _mm_mask_broadcastd_epi32(__m128i __O, __mmask8 __M, __m128i __A) { | |
| 6892 | 6593 | return (__m128i)__builtin_ia32_selectd_128(__M, |
| 6893 | 6594 | (__v4si) _mm_broadcastd_epi32(__A), |
| 6894 | 6595 | (__v4si) __O); |
| 6895 | 6596 | } |
| 6896 | 6597 | |
| 6897 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6898 | _mm_maskz_broadcastd_epi32 (__mmask8 __M, __m128i __A) | |
| 6899 | { | |
| 6598 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6599 | _mm_maskz_broadcastd_epi32(__mmask8 __M, __m128i __A) { | |
| 6900 | 6600 | return (__m128i)__builtin_ia32_selectd_128(__M, |
| 6901 | 6601 | (__v4si) _mm_broadcastd_epi32(__A), |
| 6902 | 6602 | (__v4si) _mm_setzero_si128()); |
| 6903 | 6603 | } |
| 6904 | 6604 | |
| 6905 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6906 | _mm256_mask_broadcastd_epi32 (__m256i __O, __mmask8 __M, __m128i __A) | |
| 6907 | { | |
| 6605 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6606 | _mm256_mask_broadcastd_epi32(__m256i __O, __mmask8 __M, __m128i __A) { | |
| 6908 | 6607 | return (__m256i)__builtin_ia32_selectd_256(__M, |
| 6909 | 6608 | (__v8si) _mm256_broadcastd_epi32(__A), |
| 6910 | 6609 | (__v8si) __O); |
| 6911 | 6610 | } |
| 6912 | 6611 | |
| 6913 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6914 | _mm256_maskz_broadcastd_epi32 (__mmask8 __M, __m128i __A) | |
| 6915 | { | |
| 6612 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6613 | _mm256_maskz_broadcastd_epi32(__mmask8 __M, __m128i __A) { | |
| 6916 | 6614 | return (__m256i)__builtin_ia32_selectd_256(__M, |
| 6917 | 6615 | (__v8si) _mm256_broadcastd_epi32(__A), |
| 6918 | 6616 | (__v8si) _mm256_setzero_si256()); |
| 6919 | 6617 | } |
| 6920 | 6618 | |
| 6921 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6922 | _mm_mask_broadcastq_epi64 (__m128i __O, __mmask8 __M, __m128i __A) | |
| 6923 | { | |
| 6619 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6620 | _mm_mask_broadcastq_epi64(__m128i __O, __mmask8 __M, __m128i __A) { | |
| 6924 | 6621 | return (__m128i)__builtin_ia32_selectq_128(__M, |
| 6925 | 6622 | (__v2di) _mm_broadcastq_epi64(__A), |
| 6926 | 6623 | (__v2di) __O); |
| 6927 | 6624 | } |
| 6928 | 6625 | |
| 6929 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 6930 | _mm_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A) | |
| 6931 | { | |
| 6626 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 6627 | _mm_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) { | |
| 6932 | 6628 | return (__m128i)__builtin_ia32_selectq_128(__M, |
| 6933 | 6629 | (__v2di) _mm_broadcastq_epi64(__A), |
| 6934 | 6630 | (__v2di) _mm_setzero_si128()); |
| 6935 | 6631 | } |
| 6936 | 6632 | |
| 6937 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6938 | _mm256_mask_broadcastq_epi64 (__m256i __O, __mmask8 __M, __m128i __A) | |
| 6939 | { | |
| 6633 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6634 | _mm256_mask_broadcastq_epi64(__m256i __O, __mmask8 __M, __m128i __A) { | |
| 6940 | 6635 | return (__m256i)__builtin_ia32_selectq_256(__M, |
| 6941 | 6636 | (__v4di) _mm256_broadcastq_epi64(__A), |
| 6942 | 6637 | (__v4di) __O); |
| 6943 | 6638 | } |
| 6944 | 6639 | |
| 6945 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 6946 | _mm256_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A) | |
| 6947 | { | |
| 6640 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 6641 | _mm256_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) { | |
| 6948 | 6642 | return (__m256i)__builtin_ia32_selectq_256(__M, |
| 6949 | 6643 | (__v4di) _mm256_broadcastq_epi64(__A), |
| 6950 | 6644 | (__v4di) _mm256_setzero_si256()); |
| ... | ... | @@ -7536,9 +7230,8 @@ _mm256_mask_cvtusepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) |
| 7536 | 7230 | __builtin_ia32_pmovusqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M); |
| 7537 | 7231 | } |
| 7538 | 7232 | |
| 7539 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 7540 | _mm_cvtepi32_epi8 (__m128i __A) | |
| 7541 | { | |
| 7233 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7234 | _mm_cvtepi32_epi8(__m128i __A) { | |
| 7542 | 7235 | return (__m128i)__builtin_shufflevector( |
| 7543 | 7236 | __builtin_convertvector((__v4si)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1, |
| 7544 | 7237 | 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); |
| ... | ... | @@ -7566,9 +7259,8 @@ _mm_mask_cvtepi32_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) |
| 7566 | 7259 | __builtin_ia32_pmovdb128mem_mask ((__v16qi *) __P, (__v4si) __A, __M); |
| 7567 | 7260 | } |
| 7568 | 7261 | |
| 7569 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 7570 | _mm256_cvtepi32_epi8 (__m256i __A) | |
| 7571 | { | |
| 7262 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7263 | _mm256_cvtepi32_epi8(__m256i __A) { | |
| 7572 | 7264 | return (__m128i)__builtin_shufflevector( |
| 7573 | 7265 | __builtin_convertvector((__v8si)__A, __v8qi), |
| 7574 | 7266 | (__v8qi){0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, |
| ... | ... | @@ -7576,8 +7268,7 @@ _mm256_cvtepi32_epi8 (__m256i __A) |
| 7576 | 7268 | } |
| 7577 | 7269 | |
| 7578 | 7270 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 |
| 7579 | _mm256_mask_cvtepi32_epi8 (__m128i __O, __mmask8 __M, __m256i __A) | |
| 7580 | { | |
| 7271 | _mm256_mask_cvtepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A) { | |
| 7581 | 7272 | return (__m128i) __builtin_ia32_pmovdb256_mask ((__v8si) __A, |
| 7582 | 7273 | (__v16qi) __O, __M); |
| 7583 | 7274 | } |
| ... | ... | @@ -7596,9 +7287,8 @@ _mm256_mask_cvtepi32_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A) |
| 7596 | 7287 | __builtin_ia32_pmovdb256mem_mask ((__v16qi *) __P, (__v8si) __A, __M); |
| 7597 | 7288 | } |
| 7598 | 7289 | |
| 7599 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 7600 | _mm_cvtepi32_epi16 (__m128i __A) | |
| 7601 | { | |
| 7290 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7291 | _mm_cvtepi32_epi16(__m128i __A) { | |
| 7602 | 7292 | return (__m128i)__builtin_shufflevector( |
| 7603 | 7293 | __builtin_convertvector((__v4si)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1, |
| 7604 | 7294 | 2, 3, 4, 5, 6, 7); |
| ... | ... | @@ -7625,9 +7315,8 @@ _mm_mask_cvtepi32_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A) |
| 7625 | 7315 | __builtin_ia32_pmovdw128mem_mask ((__v8hi *) __P, (__v4si) __A, __M); |
| 7626 | 7316 | } |
| 7627 | 7317 | |
| 7628 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 7629 | _mm256_cvtepi32_epi16 (__m256i __A) | |
| 7630 | { | |
| 7318 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7319 | _mm256_cvtepi32_epi16(__m256i __A) { | |
| 7631 | 7320 | return (__m128i)__builtin_convertvector((__v8si)__A, __v8hi); |
| 7632 | 7321 | } |
| 7633 | 7322 | |
| ... | ... | @@ -7652,9 +7341,8 @@ _mm256_mask_cvtepi32_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) |
| 7652 | 7341 | __builtin_ia32_pmovdw256mem_mask ((__v8hi *) __P, (__v8si) __A, __M); |
| 7653 | 7342 | } |
| 7654 | 7343 | |
| 7655 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 7656 | _mm_cvtepi64_epi8 (__m128i __A) | |
| 7657 | { | |
| 7344 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7345 | _mm_cvtepi64_epi8(__m128i __A) { | |
| 7658 | 7346 | return (__m128i)__builtin_shufflevector( |
| 7659 | 7347 | __builtin_convertvector((__v2di)__A, __v2qi), (__v2qi){0, 0}, 0, 1, 2, 3, |
| 7660 | 7348 | 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3); |
| ... | ... | @@ -7681,9 +7369,8 @@ _mm_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m128i __A) |
| 7681 | 7369 | __builtin_ia32_pmovqb128mem_mask ((__v16qi *) __P, (__v2di) __A, __M); |
| 7682 | 7370 | } |
| 7683 | 7371 | |
| 7684 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 7685 | _mm256_cvtepi64_epi8 (__m256i __A) | |
| 7686 | { | |
| 7372 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7373 | _mm256_cvtepi64_epi8(__m256i __A) { | |
| 7687 | 7374 | return (__m128i)__builtin_shufflevector( |
| 7688 | 7375 | __builtin_convertvector((__v4di)__A, __v4qi), (__v4qi){0, 0, 0, 0}, 0, 1, |
| 7689 | 7376 | 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); |
| ... | ... | @@ -7710,9 +7397,8 @@ _mm256_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m256i __A) |
| 7710 | 7397 | __builtin_ia32_pmovqb256mem_mask ((__v16qi *) __P, (__v4di) __A, __M); |
| 7711 | 7398 | } |
| 7712 | 7399 | |
| 7713 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 7714 | _mm_cvtepi64_epi32 (__m128i __A) | |
| 7715 | { | |
| 7400 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7401 | _mm_cvtepi64_epi32(__m128i __A) { | |
| 7716 | 7402 | return (__m128i)__builtin_shufflevector( |
| 7717 | 7403 | __builtin_convertvector((__v2di)__A, __v2si), (__v2si){0, 0}, 0, 1, 2, 3); |
| 7718 | 7404 | } |
| ... | ... | @@ -7738,23 +7424,20 @@ _mm_mask_cvtepi64_storeu_epi32 (void * __P, __mmask8 __M, __m128i __A) |
| 7738 | 7424 | __builtin_ia32_pmovqd128mem_mask ((__v4si *) __P, (__v2di) __A, __M); |
| 7739 | 7425 | } |
| 7740 | 7426 | |
| 7741 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 7742 | _mm256_cvtepi64_epi32 (__m256i __A) | |
| 7743 | { | |
| 7427 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7428 | _mm256_cvtepi64_epi32(__m256i __A) { | |
| 7744 | 7429 | return (__m128i)__builtin_convertvector((__v4di)__A, __v4si); |
| 7745 | 7430 | } |
| 7746 | 7431 | |
| 7747 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 7748 | _mm256_mask_cvtepi64_epi32 (__m128i __O, __mmask8 __M, __m256i __A) | |
| 7749 | { | |
| 7432 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7433 | _mm256_mask_cvtepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A) { | |
| 7750 | 7434 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 7751 | 7435 | (__v4si)_mm256_cvtepi64_epi32(__A), |
| 7752 | 7436 | (__v4si)__O); |
| 7753 | 7437 | } |
| 7754 | 7438 | |
| 7755 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 7756 | _mm256_maskz_cvtepi64_epi32 (__mmask8 __M, __m256i __A) | |
| 7757 | { | |
| 7439 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7440 | _mm256_maskz_cvtepi64_epi32(__mmask8 __M, __m256i __A) { | |
| 7758 | 7441 | return (__m128i)__builtin_ia32_selectd_128((__mmask8)__M, |
| 7759 | 7442 | (__v4si)_mm256_cvtepi64_epi32(__A), |
| 7760 | 7443 | (__v4si)_mm_setzero_si128()); |
| ... | ... | @@ -7766,9 +7449,8 @@ _mm256_mask_cvtepi64_storeu_epi32 (void * __P, __mmask8 __M, __m256i __A) |
| 7766 | 7449 | __builtin_ia32_pmovqd256mem_mask ((__v4si *) __P, (__v4di) __A, __M); |
| 7767 | 7450 | } |
| 7768 | 7451 | |
| 7769 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 7770 | _mm_cvtepi64_epi16 (__m128i __A) | |
| 7771 | { | |
| 7452 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7453 | _mm_cvtepi64_epi16(__m128i __A) { | |
| 7772 | 7454 | return (__m128i)__builtin_shufflevector( |
| 7773 | 7455 | __builtin_convertvector((__v2di)__A, __v2hi), (__v2hi){0, 0}, 0, 1, 2, 3, |
| 7774 | 7456 | 3, 3, 3, 3); |
| ... | ... | @@ -7796,9 +7478,8 @@ _mm_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m128i __A) |
| 7796 | 7478 | __builtin_ia32_pmovqw128mem_mask ((__v8hi *) __P, (__v2di) __A, __M); |
| 7797 | 7479 | } |
| 7798 | 7480 | |
| 7799 | static __inline__ __m128i __DEFAULT_FN_ATTRS256 | |
| 7800 | _mm256_cvtepi64_epi16 (__m256i __A) | |
| 7801 | { | |
| 7481 | static __inline__ __m128i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7482 | _mm256_cvtepi64_epi16(__m256i __A) { | |
| 7802 | 7483 | return (__m128i)__builtin_shufflevector( |
| 7803 | 7484 | __builtin_convertvector((__v4di)__A, __v4hi), (__v4hi){0, 0, 0, 0}, 0, 1, |
| 7804 | 7485 | 2, 3, 4, 5, 6, 7); |
| ... | ... | @@ -7825,11 +7506,10 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) |
| 7825 | 7506 | __builtin_ia32_pmovqw256mem_mask ((__v8hi *) __P, (__v4di) __A, __M); |
| 7826 | 7507 | } |
| 7827 | 7508 | |
| 7828 | #define _mm256_extractf32x4_ps(A, imm) \ | |
| 7829 | ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \ | |
| 7830 | (int)(imm), \ | |
| 7831 | (__v4sf)_mm_undefined_ps(), \ | |
| 7832 | (__mmask8)-1)) | |
| 7509 | #define _mm256_extractf32x4_ps(A, imm) \ | |
| 7510 | ((__m128)__builtin_ia32_extractf32x4_256_mask( \ | |
| 7511 | (__v8sf)(__m256)(A), (int)(imm), (__v4sf)_mm_setzero_ps(), \ | |
| 7512 | (__mmask8) - 1)) | |
| 7833 | 7513 | |
| 7834 | 7514 | #define _mm256_mask_extractf32x4_ps(W, U, A, imm) \ |
| 7835 | 7515 | ((__m128)__builtin_ia32_extractf32x4_256_mask((__v8sf)(__m256)(A), \ |
| ... | ... | @@ -7843,11 +7523,10 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) |
| 7843 | 7523 | (__v4sf)_mm_setzero_ps(), \ |
| 7844 | 7524 | (__mmask8)(U))) |
| 7845 | 7525 | |
| 7846 | #define _mm256_extracti32x4_epi32(A, imm) \ | |
| 7847 | ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \ | |
| 7848 | (int)(imm), \ | |
| 7849 | (__v4si)_mm_undefined_si128(), \ | |
| 7850 | (__mmask8)-1)) | |
| 7526 | #define _mm256_extracti32x4_epi32(A, imm) \ | |
| 7527 | ((__m128i)__builtin_ia32_extracti32x4_256_mask( \ | |
| 7528 | (__v8si)(__m256i)(A), (int)(imm), (__v4si)_mm_setzero_si128(), \ | |
| 7529 | (__mmask8) - 1)) | |
| 7851 | 7530 | |
| 7852 | 7531 | #define _mm256_mask_extracti32x4_epi32(W, U, A, imm) \ |
| 7853 | 7532 | ((__m128i)__builtin_ia32_extracti32x4_256_mask((__v8si)(__m256i)(A), \ |
| ... | ... | @@ -8083,47 +7762,41 @@ _mm256_mask_cvtepi64_storeu_epi16 (void * __P, __mmask8 __M, __m256i __A) |
| 8083 | 7762 | (__v4di)_mm256_permutex_epi64((X), (C)), \ |
| 8084 | 7763 | (__v4di)_mm256_setzero_si256())) |
| 8085 | 7764 | |
| 8086 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 8087 | _mm256_permutexvar_pd (__m256i __X, __m256d __Y) | |
| 8088 | { | |
| 7765 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7766 | _mm256_permutexvar_pd(__m256i __X, __m256d __Y) { | |
| 8089 | 7767 | return (__m256d)__builtin_ia32_permvardf256((__v4df)__Y, (__v4di)__X); |
| 8090 | 7768 | } |
| 8091 | 7769 | |
| 8092 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 8093 | _mm256_mask_permutexvar_pd (__m256d __W, __mmask8 __U, __m256i __X, | |
| 8094 | __m256d __Y) | |
| 8095 | { | |
| 7770 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7771 | _mm256_mask_permutexvar_pd(__m256d __W, __mmask8 __U, __m256i __X, | |
| 7772 | __m256d __Y) { | |
| 8096 | 7773 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 8097 | 7774 | (__v4df)_mm256_permutexvar_pd(__X, __Y), |
| 8098 | 7775 | (__v4df)__W); |
| 8099 | 7776 | } |
| 8100 | 7777 | |
| 8101 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 8102 | _mm256_maskz_permutexvar_pd (__mmask8 __U, __m256i __X, __m256d __Y) | |
| 8103 | { | |
| 7778 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7779 | _mm256_maskz_permutexvar_pd(__mmask8 __U, __m256i __X, __m256d __Y) { | |
| 8104 | 7780 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, |
| 8105 | 7781 | (__v4df)_mm256_permutexvar_pd(__X, __Y), |
| 8106 | 7782 | (__v4df)_mm256_setzero_pd()); |
| 8107 | 7783 | } |
| 8108 | 7784 | |
| 8109 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 8110 | _mm256_permutexvar_epi64 ( __m256i __X, __m256i __Y) | |
| 8111 | { | |
| 7785 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7786 | _mm256_permutexvar_epi64(__m256i __X, __m256i __Y) { | |
| 8112 | 7787 | return (__m256i)__builtin_ia32_permvardi256((__v4di) __Y, (__v4di) __X); |
| 8113 | 7788 | } |
| 8114 | 7789 | |
| 8115 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 8116 | _mm256_maskz_permutexvar_epi64 (__mmask8 __M, __m256i __X, __m256i __Y) | |
| 8117 | { | |
| 7790 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7791 | _mm256_maskz_permutexvar_epi64(__mmask8 __M, __m256i __X, __m256i __Y) { | |
| 8118 | 7792 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 8119 | 7793 | (__v4di)_mm256_permutexvar_epi64(__X, __Y), |
| 8120 | 7794 | (__v4di)_mm256_setzero_si256()); |
| 8121 | 7795 | } |
| 8122 | 7796 | |
| 8123 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 8124 | _mm256_mask_permutexvar_epi64 (__m256i __W, __mmask8 __M, __m256i __X, | |
| 8125 | __m256i __Y) | |
| 8126 | { | |
| 7797 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7798 | _mm256_mask_permutexvar_epi64(__m256i __W, __mmask8 __M, __m256i __X, | |
| 7799 | __m256i __Y) { | |
| 8127 | 7800 | return (__m256i)__builtin_ia32_selectq_256((__mmask8)__M, |
| 8128 | 7801 | (__v4di)_mm256_permutexvar_epi64(__X, __Y), |
| 8129 | 7802 | (__v4di)__W); |
| ... | ... | @@ -8131,17 +7804,15 @@ _mm256_mask_permutexvar_epi64 (__m256i __W, __mmask8 __M, __m256i __X, |
| 8131 | 7804 | |
| 8132 | 7805 | #define _mm256_permutexvar_ps(A, B) _mm256_permutevar8x32_ps((B), (A)) |
| 8133 | 7806 | |
| 8134 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 8135 | _mm256_mask_permutexvar_ps(__m256 __W, __mmask8 __U, __m256i __X, __m256 __Y) | |
| 8136 | { | |
| 7807 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7808 | _mm256_mask_permutexvar_ps(__m256 __W, __mmask8 __U, __m256i __X, __m256 __Y) { | |
| 8137 | 7809 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 8138 | 7810 | (__v8sf)_mm256_permutexvar_ps(__X, __Y), |
| 8139 | 7811 | (__v8sf)__W); |
| 8140 | 7812 | } |
| 8141 | 7813 | |
| 8142 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 8143 | _mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y) | |
| 8144 | { | |
| 7814 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7815 | _mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y) { | |
| 8145 | 7816 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 8146 | 7817 | (__v8sf)_mm256_permutexvar_ps(__X, __Y), |
| 8147 | 7818 | (__v8sf)_mm256_setzero_ps()); |
| ... | ... | @@ -8149,18 +7820,16 @@ _mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y) |
| 8149 | 7820 | |
| 8150 | 7821 | #define _mm256_permutexvar_epi32(A, B) _mm256_permutevar8x32_epi32((B), (A)) |
| 8151 | 7822 | |
| 8152 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 7823 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 8153 | 7824 | _mm256_mask_permutexvar_epi32(__m256i __W, __mmask8 __M, __m256i __X, |
| 8154 | __m256i __Y) | |
| 8155 | { | |
| 7825 | __m256i __Y) { | |
| 8156 | 7826 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 8157 | 7827 | (__v8si)_mm256_permutexvar_epi32(__X, __Y), |
| 8158 | 7828 | (__v8si)__W); |
| 8159 | 7829 | } |
| 8160 | 7830 | |
| 8161 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 8162 | _mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y) | |
| 8163 | { | |
| 7831 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7832 | _mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y) { | |
| 8164 | 7833 | return (__m256i)__builtin_ia32_selectd_256((__mmask8)__M, |
| 8165 | 7834 | (__v8si)_mm256_permutexvar_epi32(__X, __Y), |
| 8166 | 7835 | (__v8si)_mm256_setzero_si256()); |
| ... | ... | @@ -8222,65 +7891,57 @@ _mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y) |
| 8222 | 7891 | (__v4di)_mm256_alignr_epi64((A), (B), (imm)), \ |
| 8223 | 7892 | (__v4di)_mm256_setzero_si256())) |
| 8224 | 7893 | |
| 8225 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 8226 | _mm_mask_movehdup_ps (__m128 __W, __mmask8 __U, __m128 __A) | |
| 8227 | { | |
| 7894 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7895 | _mm_mask_movehdup_ps(__m128 __W, __mmask8 __U, __m128 __A) { | |
| 8228 | 7896 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 8229 | 7897 | (__v4sf)_mm_movehdup_ps(__A), |
| 8230 | 7898 | (__v4sf)__W); |
| 8231 | 7899 | } |
| 8232 | 7900 | |
| 8233 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 8234 | _mm_maskz_movehdup_ps (__mmask8 __U, __m128 __A) | |
| 8235 | { | |
| 7901 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7902 | _mm_maskz_movehdup_ps(__mmask8 __U, __m128 __A) { | |
| 8236 | 7903 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 8237 | 7904 | (__v4sf)_mm_movehdup_ps(__A), |
| 8238 | 7905 | (__v4sf)_mm_setzero_ps()); |
| 8239 | 7906 | } |
| 8240 | 7907 | |
| 8241 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 8242 | _mm256_mask_movehdup_ps (__m256 __W, __mmask8 __U, __m256 __A) | |
| 8243 | { | |
| 7908 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7909 | _mm256_mask_movehdup_ps(__m256 __W, __mmask8 __U, __m256 __A) { | |
| 8244 | 7910 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 8245 | 7911 | (__v8sf)_mm256_movehdup_ps(__A), |
| 8246 | 7912 | (__v8sf)__W); |
| 8247 | 7913 | } |
| 8248 | 7914 | |
| 8249 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 8250 | _mm256_maskz_movehdup_ps (__mmask8 __U, __m256 __A) | |
| 8251 | { | |
| 7915 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7916 | _mm256_maskz_movehdup_ps(__mmask8 __U, __m256 __A) { | |
| 8252 | 7917 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 8253 | 7918 | (__v8sf)_mm256_movehdup_ps(__A), |
| 8254 | 7919 | (__v8sf)_mm256_setzero_ps()); |
| 8255 | 7920 | } |
| 8256 | 7921 | |
| 8257 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 8258 | _mm_mask_moveldup_ps (__m128 __W, __mmask8 __U, __m128 __A) | |
| 8259 | { | |
| 7922 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7923 | _mm_mask_moveldup_ps(__m128 __W, __mmask8 __U, __m128 __A) { | |
| 8260 | 7924 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 8261 | 7925 | (__v4sf)_mm_moveldup_ps(__A), |
| 8262 | 7926 | (__v4sf)__W); |
| 8263 | 7927 | } |
| 8264 | 7928 | |
| 8265 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 8266 | _mm_maskz_moveldup_ps (__mmask8 __U, __m128 __A) | |
| 8267 | { | |
| 7929 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7930 | _mm_maskz_moveldup_ps(__mmask8 __U, __m128 __A) { | |
| 8268 | 7931 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, |
| 8269 | 7932 | (__v4sf)_mm_moveldup_ps(__A), |
| 8270 | 7933 | (__v4sf)_mm_setzero_ps()); |
| 8271 | 7934 | } |
| 8272 | 7935 | |
| 8273 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 8274 | _mm256_mask_moveldup_ps (__m256 __W, __mmask8 __U, __m256 __A) | |
| 8275 | { | |
| 7936 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7937 | _mm256_mask_moveldup_ps(__m256 __W, __mmask8 __U, __m256 __A) { | |
| 8276 | 7938 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 8277 | 7939 | (__v8sf)_mm256_moveldup_ps(__A), |
| 8278 | 7940 | (__v8sf)__W); |
| 8279 | 7941 | } |
| 8280 | 7942 | |
| 8281 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 8282 | _mm256_maskz_moveldup_ps (__mmask8 __U, __m256 __A) | |
| 8283 | { | |
| 7943 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7944 | _mm256_maskz_moveldup_ps(__mmask8 __U, __m256 __A) { | |
| 8284 | 7945 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, |
| 8285 | 7946 | (__v8sf)_mm256_moveldup_ps(__A), |
| 8286 | 7947 | (__v8sf)_mm256_setzero_ps()); |
| ... | ... | @@ -8306,68 +7967,52 @@ _mm256_maskz_moveldup_ps (__mmask8 __U, __m256 __A) |
| 8306 | 7967 | (__v4si)_mm_shuffle_epi32((A), (I)), \ |
| 8307 | 7968 | (__v4si)_mm_setzero_si128())) |
| 8308 | 7969 | |
| 8309 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 8310 | _mm_mask_mov_pd (__m128d __W, __mmask8 __U, __m128d __A) | |
| 8311 | { | |
| 8312 | return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U, | |
| 8313 | (__v2df) __A, | |
| 8314 | (__v2df) __W); | |
| 7970 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7971 | _mm_mask_mov_pd(__m128d __W, __mmask8 __U, __m128d __A) { | |
| 7972 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)__A, | |
| 7973 | (__v2df)__W); | |
| 8315 | 7974 | } |
| 8316 | 7975 | |
| 8317 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 8318 | _mm_maskz_mov_pd (__mmask8 __U, __m128d __A) | |
| 8319 | { | |
| 8320 | return (__m128d) __builtin_ia32_selectpd_128 ((__mmask8) __U, | |
| 8321 | (__v2df) __A, | |
| 8322 | (__v2df) _mm_setzero_pd ()); | |
| 7976 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7977 | _mm_maskz_mov_pd(__mmask8 __U, __m128d __A) { | |
| 7978 | return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U, (__v2df)__A, | |
| 7979 | (__v2df)_mm_setzero_pd()); | |
| 8323 | 7980 | } |
| 8324 | 7981 | |
| 8325 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 8326 | _mm256_mask_mov_pd (__m256d __W, __mmask8 __U, __m256d __A) | |
| 8327 | { | |
| 8328 | return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U, | |
| 8329 | (__v4df) __A, | |
| 8330 | (__v4df) __W); | |
| 7982 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7983 | _mm256_mask_mov_pd(__m256d __W, __mmask8 __U, __m256d __A) { | |
| 7984 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)__A, | |
| 7985 | (__v4df)__W); | |
| 8331 | 7986 | } |
| 8332 | 7987 | |
| 8333 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 8334 | _mm256_maskz_mov_pd (__mmask8 __U, __m256d __A) | |
| 8335 | { | |
| 8336 | return (__m256d) __builtin_ia32_selectpd_256 ((__mmask8) __U, | |
| 8337 | (__v4df) __A, | |
| 8338 | (__v4df) _mm256_setzero_pd ()); | |
| 7988 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 7989 | _mm256_maskz_mov_pd(__mmask8 __U, __m256d __A) { | |
| 7990 | return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U, (__v4df)__A, | |
| 7991 | (__v4df)_mm256_setzero_pd()); | |
| 8339 | 7992 | } |
| 8340 | 7993 | |
| 8341 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 8342 | _mm_mask_mov_ps (__m128 __W, __mmask8 __U, __m128 __A) | |
| 8343 | { | |
| 8344 | return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U, | |
| 8345 | (__v4sf) __A, | |
| 8346 | (__v4sf) __W); | |
| 7994 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 7995 | _mm_mask_mov_ps(__m128 __W, __mmask8 __U, __m128 __A) { | |
| 7996 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)__A, | |
| 7997 | (__v4sf)__W); | |
| 8347 | 7998 | } |
| 8348 | 7999 | |
| 8349 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 8350 | _mm_maskz_mov_ps (__mmask8 __U, __m128 __A) | |
| 8351 | { | |
| 8352 | return (__m128) __builtin_ia32_selectps_128 ((__mmask8) __U, | |
| 8353 | (__v4sf) __A, | |
| 8354 | (__v4sf) _mm_setzero_ps ()); | |
| 8000 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 8001 | _mm_maskz_mov_ps(__mmask8 __U, __m128 __A) { | |
| 8002 | return (__m128)__builtin_ia32_selectps_128((__mmask8)__U, (__v4sf)__A, | |
| 8003 | (__v4sf)_mm_setzero_ps()); | |
| 8355 | 8004 | } |
| 8356 | 8005 | |
| 8357 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 8358 | _mm256_mask_mov_ps (__m256 __W, __mmask8 __U, __m256 __A) | |
| 8359 | { | |
| 8360 | return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U, | |
| 8361 | (__v8sf) __A, | |
| 8362 | (__v8sf) __W); | |
| 8006 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 8007 | _mm256_mask_mov_ps(__m256 __W, __mmask8 __U, __m256 __A) { | |
| 8008 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)__A, | |
| 8009 | (__v8sf)__W); | |
| 8363 | 8010 | } |
| 8364 | 8011 | |
| 8365 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 8366 | _mm256_maskz_mov_ps (__mmask8 __U, __m256 __A) | |
| 8367 | { | |
| 8368 | return (__m256) __builtin_ia32_selectps_256 ((__mmask8) __U, | |
| 8369 | (__v8sf) __A, | |
| 8370 | (__v8sf) _mm256_setzero_ps ()); | |
| 8012 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 8013 | _mm256_maskz_mov_ps(__mmask8 __U, __m256 __A) { | |
| 8014 | return (__m256)__builtin_ia32_selectps_256((__mmask8)__U, (__v8sf)__A, | |
| 8015 | (__v8sf)_mm256_setzero_ps()); | |
| 8371 | 8016 | } |
| 8372 | 8017 | |
| 8373 | 8018 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 |
| ... | ... | @@ -8430,8 +8075,9 @@ _mm256_maskz_cvtph_ps (__mmask8 __U, __m128i __A) |
| 8430 | 8075 | #define _mm256_mask_cvtps_ph _mm256_mask_cvt_roundps_ph |
| 8431 | 8076 | #define _mm256_maskz_cvtps_ph _mm256_maskz_cvt_roundps_ph |
| 8432 | 8077 | |
| 8433 | ||
| 8434 | 8078 | #undef __DEFAULT_FN_ATTRS128 |
| 8435 | 8079 | #undef __DEFAULT_FN_ATTRS256 |
| 8080 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 8081 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 8436 | 8082 | |
| 8437 | 8083 | #endif /* __AVX512VLINTRIN_H */ |
lib/include/avx512vlvbmi2intrin.h+78-63| ... | ... | @@ -17,13 +17,21 @@ |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | 18 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 19 | __attribute__((__always_inline__, __nodebug__, \ |
| 20 | __target__("avx512vl,avx512vbmi2,no-evex512"), \ | |
| 20 | __target__("avx512vl,avx512vbmi2"), \ | |
| 21 | 21 | __min_vector_width__(128))) |
| 22 | 22 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | 23 | __attribute__((__always_inline__, __nodebug__, \ |
| 24 | __target__("avx512vl,avx512vbmi2,no-evex512"), \ | |
| 24 | __target__("avx512vl,avx512vbmi2"), \ | |
| 25 | 25 | __min_vector_width__(256))) |
| 26 | 26 | |
| 27 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 28 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 29 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 30 | #else | |
| 31 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 32 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 33 | #endif | |
| 34 | ||
| 27 | 35 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 28 | 36 | _mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D) |
| 29 | 37 | { |
| ... | ... | @@ -412,14 +420,14 @@ _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P) |
| 412 | 420 | (__v8hi)_mm_shrdi_epi16((A), (B), (I)), \ |
| 413 | 421 | (__v8hi)_mm_setzero_si128())) |
| 414 | 422 | |
| 415 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 423 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 416 | 424 | _mm256_shldv_epi64(__m256i __A, __m256i __B, __m256i __C) |
| 417 | 425 | { |
| 418 | return (__m256i)__builtin_ia32_vpshldvq256((__v4di)__A, (__v4di)__B, | |
| 419 | (__v4di)__C); | |
| 426 | return (__m256i)__builtin_elementwise_fshl((__v4du)__A, (__v4du)__B, | |
| 427 | (__v4du)__C); | |
| 420 | 428 | } |
| 421 | 429 | |
| 422 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 430 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 423 | 431 | _mm256_mask_shldv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) |
| 424 | 432 | { |
| 425 | 433 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -427,7 +435,7 @@ _mm256_mask_shldv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) |
| 427 | 435 | (__v4di)__A); |
| 428 | 436 | } |
| 429 | 437 | |
| 430 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 438 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 431 | 439 | _mm256_maskz_shldv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) |
| 432 | 440 | { |
| 433 | 441 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -435,14 +443,14 @@ _mm256_maskz_shldv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) |
| 435 | 443 | (__v4di)_mm256_setzero_si256()); |
| 436 | 444 | } |
| 437 | 445 | |
| 438 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 446 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 439 | 447 | _mm_shldv_epi64(__m128i __A, __m128i __B, __m128i __C) |
| 440 | 448 | { |
| 441 | return (__m128i)__builtin_ia32_vpshldvq128((__v2di)__A, (__v2di)__B, | |
| 442 | (__v2di)__C); | |
| 449 | return (__m128i)__builtin_elementwise_fshl((__v2du)__A, (__v2du)__B, | |
| 450 | (__v2du)__C); | |
| 443 | 451 | } |
| 444 | 452 | |
| 445 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 453 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 446 | 454 | _mm_mask_shldv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 447 | 455 | { |
| 448 | 456 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -450,7 +458,7 @@ _mm_mask_shldv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 450 | 458 | (__v2di)__A); |
| 451 | 459 | } |
| 452 | 460 | |
| 453 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 461 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 454 | 462 | _mm_maskz_shldv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 455 | 463 | { |
| 456 | 464 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -458,14 +466,14 @@ _mm_maskz_shldv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 458 | 466 | (__v2di)_mm_setzero_si128()); |
| 459 | 467 | } |
| 460 | 468 | |
| 461 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 469 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 462 | 470 | _mm256_shldv_epi32(__m256i __A, __m256i __B, __m256i __C) |
| 463 | 471 | { |
| 464 | return (__m256i)__builtin_ia32_vpshldvd256((__v8si)__A, (__v8si)__B, | |
| 465 | (__v8si)__C); | |
| 472 | return (__m256i)__builtin_elementwise_fshl((__v8su)__A, (__v8su)__B, | |
| 473 | (__v8su)__C); | |
| 466 | 474 | } |
| 467 | 475 | |
| 468 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 476 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 469 | 477 | _mm256_mask_shldv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) |
| 470 | 478 | { |
| 471 | 479 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -473,7 +481,7 @@ _mm256_mask_shldv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) |
| 473 | 481 | (__v8si)__A); |
| 474 | 482 | } |
| 475 | 483 | |
| 476 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 484 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 477 | 485 | _mm256_maskz_shldv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) |
| 478 | 486 | { |
| 479 | 487 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -481,14 +489,14 @@ _mm256_maskz_shldv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) |
| 481 | 489 | (__v8si)_mm256_setzero_si256()); |
| 482 | 490 | } |
| 483 | 491 | |
| 484 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 492 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 485 | 493 | _mm_shldv_epi32(__m128i __A, __m128i __B, __m128i __C) |
| 486 | 494 | { |
| 487 | return (__m128i)__builtin_ia32_vpshldvd128((__v4si)__A, (__v4si)__B, | |
| 488 | (__v4si)__C); | |
| 495 | return (__m128i)__builtin_elementwise_fshl((__v4su)__A, (__v4su)__B, | |
| 496 | (__v4su)__C); | |
| 489 | 497 | } |
| 490 | 498 | |
| 491 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 499 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 492 | 500 | _mm_mask_shldv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 493 | 501 | { |
| 494 | 502 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -496,7 +504,7 @@ _mm_mask_shldv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 496 | 504 | (__v4si)__A); |
| 497 | 505 | } |
| 498 | 506 | |
| 499 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 507 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 500 | 508 | _mm_maskz_shldv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 501 | 509 | { |
| 502 | 510 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -504,14 +512,14 @@ _mm_maskz_shldv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 504 | 512 | (__v4si)_mm_setzero_si128()); |
| 505 | 513 | } |
| 506 | 514 | |
| 507 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 515 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 508 | 516 | _mm256_shldv_epi16(__m256i __A, __m256i __B, __m256i __C) |
| 509 | 517 | { |
| 510 | return (__m256i)__builtin_ia32_vpshldvw256((__v16hi)__A, (__v16hi)__B, | |
| 511 | (__v16hi)__C); | |
| 518 | return (__m256i)__builtin_elementwise_fshl((__v16hu)__A, (__v16hu)__B, | |
| 519 | (__v16hu)__C); | |
| 512 | 520 | } |
| 513 | 521 | |
| 514 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 522 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 515 | 523 | _mm256_mask_shldv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C) |
| 516 | 524 | { |
| 517 | 525 | return (__m256i)__builtin_ia32_selectw_256(__U, |
| ... | ... | @@ -519,7 +527,7 @@ _mm256_mask_shldv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C) |
| 519 | 527 | (__v16hi)__A); |
| 520 | 528 | } |
| 521 | 529 | |
| 522 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 530 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 523 | 531 | _mm256_maskz_shldv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C) |
| 524 | 532 | { |
| 525 | 533 | return (__m256i)__builtin_ia32_selectw_256(__U, |
| ... | ... | @@ -527,14 +535,14 @@ _mm256_maskz_shldv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C) |
| 527 | 535 | (__v16hi)_mm256_setzero_si256()); |
| 528 | 536 | } |
| 529 | 537 | |
| 530 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 538 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 531 | 539 | _mm_shldv_epi16(__m128i __A, __m128i __B, __m128i __C) |
| 532 | 540 | { |
| 533 | return (__m128i)__builtin_ia32_vpshldvw128((__v8hi)__A, (__v8hi)__B, | |
| 534 | (__v8hi)__C); | |
| 541 | return (__m128i)__builtin_elementwise_fshl((__v8hu)__A, (__v8hu)__B, | |
| 542 | (__v8hu)__C); | |
| 535 | 543 | } |
| 536 | 544 | |
| 537 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 545 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 538 | 546 | _mm_mask_shldv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 539 | 547 | { |
| 540 | 548 | return (__m128i)__builtin_ia32_selectw_128(__U, |
| ... | ... | @@ -542,7 +550,7 @@ _mm_mask_shldv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 542 | 550 | (__v8hi)__A); |
| 543 | 551 | } |
| 544 | 552 | |
| 545 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 553 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 546 | 554 | _mm_maskz_shldv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 547 | 555 | { |
| 548 | 556 | return (__m128i)__builtin_ia32_selectw_128(__U, |
| ... | ... | @@ -550,14 +558,15 @@ _mm_maskz_shldv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 550 | 558 | (__v8hi)_mm_setzero_si128()); |
| 551 | 559 | } |
| 552 | 560 | |
| 553 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 561 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 554 | 562 | _mm256_shrdv_epi64(__m256i __A, __m256i __B, __m256i __C) |
| 555 | 563 | { |
| 556 | return (__m256i)__builtin_ia32_vpshrdvq256((__v4di)__A, (__v4di)__B, | |
| 557 | (__v4di)__C); | |
| 564 | // Ops __A and __B are swapped. | |
| 565 | return (__m256i)__builtin_elementwise_fshr((__v4du)__B, (__v4du)__A, | |
| 566 | (__v4du)__C); | |
| 558 | 567 | } |
| 559 | 568 | |
| 560 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 569 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 561 | 570 | _mm256_mask_shrdv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) |
| 562 | 571 | { |
| 563 | 572 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -565,7 +574,7 @@ _mm256_mask_shrdv_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) |
| 565 | 574 | (__v4di)__A); |
| 566 | 575 | } |
| 567 | 576 | |
| 568 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 577 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 569 | 578 | _mm256_maskz_shrdv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) |
| 570 | 579 | { |
| 571 | 580 | return (__m256i)__builtin_ia32_selectq_256(__U, |
| ... | ... | @@ -573,14 +582,15 @@ _mm256_maskz_shrdv_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) |
| 573 | 582 | (__v4di)_mm256_setzero_si256()); |
| 574 | 583 | } |
| 575 | 584 | |
| 576 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 585 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 577 | 586 | _mm_shrdv_epi64(__m128i __A, __m128i __B, __m128i __C) |
| 578 | 587 | { |
| 579 | return (__m128i)__builtin_ia32_vpshrdvq128((__v2di)__A, (__v2di)__B, | |
| 580 | (__v2di)__C); | |
| 588 | // Ops __A and __B are swapped. | |
| 589 | return (__m128i)__builtin_elementwise_fshr((__v2du)__B, (__v2du)__A, | |
| 590 | (__v2du)__C); | |
| 581 | 591 | } |
| 582 | 592 | |
| 583 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 593 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 584 | 594 | _mm_mask_shrdv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 585 | 595 | { |
| 586 | 596 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -588,7 +598,7 @@ _mm_mask_shrdv_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 588 | 598 | (__v2di)__A); |
| 589 | 599 | } |
| 590 | 600 | |
| 591 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 601 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 592 | 602 | _mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 593 | 603 | { |
| 594 | 604 | return (__m128i)__builtin_ia32_selectq_128(__U, |
| ... | ... | @@ -596,14 +606,15 @@ _mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 596 | 606 | (__v2di)_mm_setzero_si128()); |
| 597 | 607 | } |
| 598 | 608 | |
| 599 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 609 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 600 | 610 | _mm256_shrdv_epi32(__m256i __A, __m256i __B, __m256i __C) |
| 601 | 611 | { |
| 602 | return (__m256i)__builtin_ia32_vpshrdvd256((__v8si)__A, (__v8si)__B, | |
| 603 | (__v8si)__C); | |
| 612 | // Ops __A and __B are swapped. | |
| 613 | return (__m256i)__builtin_elementwise_fshr((__v8su)__B, (__v8su)__A, | |
| 614 | (__v8su)__C); | |
| 604 | 615 | } |
| 605 | 616 | |
| 606 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 617 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 607 | 618 | _mm256_mask_shrdv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) |
| 608 | 619 | { |
| 609 | 620 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -611,7 +622,7 @@ _mm256_mask_shrdv_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) |
| 611 | 622 | (__v8si)__A); |
| 612 | 623 | } |
| 613 | 624 | |
| 614 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 625 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 615 | 626 | _mm256_maskz_shrdv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) |
| 616 | 627 | { |
| 617 | 628 | return (__m256i)__builtin_ia32_selectd_256(__U, |
| ... | ... | @@ -619,14 +630,15 @@ _mm256_maskz_shrdv_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) |
| 619 | 630 | (__v8si)_mm256_setzero_si256()); |
| 620 | 631 | } |
| 621 | 632 | |
| 622 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 633 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 623 | 634 | _mm_shrdv_epi32(__m128i __A, __m128i __B, __m128i __C) |
| 624 | 635 | { |
| 625 | return (__m128i)__builtin_ia32_vpshrdvd128((__v4si)__A, (__v4si)__B, | |
| 626 | (__v4si)__C); | |
| 636 | // Ops __A and __B are swapped. | |
| 637 | return (__m128i)__builtin_elementwise_fshr((__v4su)__B, (__v4su)__A, | |
| 638 | (__v4su)__C); | |
| 627 | 639 | } |
| 628 | 640 | |
| 629 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 641 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 630 | 642 | _mm_mask_shrdv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 631 | 643 | { |
| 632 | 644 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -634,7 +646,7 @@ _mm_mask_shrdv_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 634 | 646 | (__v4si)__A); |
| 635 | 647 | } |
| 636 | 648 | |
| 637 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 649 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 638 | 650 | _mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 639 | 651 | { |
| 640 | 652 | return (__m128i)__builtin_ia32_selectd_128(__U, |
| ... | ... | @@ -642,14 +654,15 @@ _mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 642 | 654 | (__v4si)_mm_setzero_si128()); |
| 643 | 655 | } |
| 644 | 656 | |
| 645 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 657 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 646 | 658 | _mm256_shrdv_epi16(__m256i __A, __m256i __B, __m256i __C) |
| 647 | 659 | { |
| 648 | return (__m256i)__builtin_ia32_vpshrdvw256((__v16hi)__A, (__v16hi)__B, | |
| 649 | (__v16hi)__C); | |
| 660 | // Ops __A and __B are swapped. | |
| 661 | return (__m256i)__builtin_elementwise_fshr((__v16hu)__B, (__v16hu)__A, | |
| 662 | (__v16hu)__C); | |
| 650 | 663 | } |
| 651 | 664 | |
| 652 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 665 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 653 | 666 | _mm256_mask_shrdv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C) |
| 654 | 667 | { |
| 655 | 668 | return (__m256i)__builtin_ia32_selectw_256(__U, |
| ... | ... | @@ -657,7 +670,7 @@ _mm256_mask_shrdv_epi16(__m256i __A, __mmask16 __U, __m256i __B, __m256i __C) |
| 657 | 670 | (__v16hi)__A); |
| 658 | 671 | } |
| 659 | 672 | |
| 660 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 673 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 661 | 674 | _mm256_maskz_shrdv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C) |
| 662 | 675 | { |
| 663 | 676 | return (__m256i)__builtin_ia32_selectw_256(__U, |
| ... | ... | @@ -665,14 +678,15 @@ _mm256_maskz_shrdv_epi16(__mmask16 __U, __m256i __A, __m256i __B, __m256i __C) |
| 665 | 678 | (__v16hi)_mm256_setzero_si256()); |
| 666 | 679 | } |
| 667 | 680 | |
| 668 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 681 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 669 | 682 | _mm_shrdv_epi16(__m128i __A, __m128i __B, __m128i __C) |
| 670 | 683 | { |
| 671 | return (__m128i)__builtin_ia32_vpshrdvw128((__v8hi)__A, (__v8hi)__B, | |
| 672 | (__v8hi)__C); | |
| 684 | // Ops __A and __B are swapped. | |
| 685 | return (__m128i)__builtin_elementwise_fshr((__v8hu)__B, (__v8hu)__A, | |
| 686 | (__v8hu)__C); | |
| 673 | 687 | } |
| 674 | 688 | |
| 675 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 689 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 676 | 690 | _mm_mask_shrdv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 677 | 691 | { |
| 678 | 692 | return (__m128i)__builtin_ia32_selectw_128(__U, |
| ... | ... | @@ -680,7 +694,7 @@ _mm_mask_shrdv_epi16(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) |
| 680 | 694 | (__v8hi)__A); |
| 681 | 695 | } |
| 682 | 696 | |
| 683 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 | |
| 697 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 684 | 698 | _mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 685 | 699 | { |
| 686 | 700 | return (__m128i)__builtin_ia32_selectw_128(__U, |
| ... | ... | @@ -688,8 +702,9 @@ _mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) |
| 688 | 702 | (__v8hi)_mm_setzero_si128()); |
| 689 | 703 | } |
| 690 | 704 | |
| 691 | ||
| 692 | 705 | #undef __DEFAULT_FN_ATTRS128 |
| 693 | 706 | #undef __DEFAULT_FN_ATTRS256 |
| 707 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 708 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 694 | 709 | |
| 695 | 710 | #endif |
lib/include/avx512vlvnniintrin.h+21-18| ... | ... | @@ -17,11 +17,11 @@ |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | 18 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 19 | __attribute__((__always_inline__, __nodebug__, \ |
| 20 | __target__("avx512vl,avx512vnni,no-evex512"), \ | |
| 20 | __target__("avx512vl,avx512vnni"), \ | |
| 21 | 21 | __min_vector_width__(128))) |
| 22 | 22 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | 23 | __attribute__((__always_inline__, __nodebug__, \ |
| 24 | __target__("avx512vl,avx512vnni,no-evex512"), \ | |
| 24 | __target__("avx512vl,avx512vnni"), \ | |
| 25 | 25 | __min_vector_width__(256))) |
| 26 | 26 | |
| 27 | 27 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with |
| ... | ... | @@ -41,8 +41,8 @@ |
| 41 | 41 | /// ENDFOR |
| 42 | 42 | /// DST[MAX:256] := 0 |
| 43 | 43 | /// \endcode |
| 44 | #define _mm256_dpbusd_epi32(S, A, B) \ | |
| 45 | ((__m256i)__builtin_ia32_vpdpbusd256((__v8si)(S), (__v8si)(A), (__v8si)(B))) | |
| 44 | #define _mm256_dpbusd_epi32(S, A, B) \ | |
| 45 | ((__m256i)__builtin_ia32_vpdpbusd256((__v8si)(S), (__v32qu)(A), (__v32qi)(B))) | |
| 46 | 46 | |
| 47 | 47 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with |
| 48 | 48 | /// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed |
| ... | ... | @@ -61,8 +61,9 @@ |
| 61 | 61 | /// ENDFOR |
| 62 | 62 | /// DST[MAX:256] := 0 |
| 63 | 63 | /// \endcode |
| 64 | #define _mm256_dpbusds_epi32(S, A, B) \ | |
| 65 | ((__m256i)__builtin_ia32_vpdpbusds256((__v8si)(S), (__v8si)(A), (__v8si)(B))) | |
| 64 | #define _mm256_dpbusds_epi32(S, A, B) \ | |
| 65 | ((__m256i)__builtin_ia32_vpdpbusds256((__v8si)(S), (__v32qu)(A), \ | |
| 66 | (__v32qi)(B))) | |
| 66 | 67 | |
| 67 | 68 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with |
| 68 | 69 | /// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit |
| ... | ... | @@ -79,8 +80,8 @@ |
| 79 | 80 | /// ENDFOR |
| 80 | 81 | /// DST[MAX:256] := 0 |
| 81 | 82 | /// \endcode |
| 82 | #define _mm256_dpwssd_epi32(S, A, B) \ | |
| 83 | ((__m256i)__builtin_ia32_vpdpwssd256((__v8si)(S), (__v8si)(A), (__v8si)(B))) | |
| 83 | #define _mm256_dpwssd_epi32(S, A, B) \ | |
| 84 | ((__m256i)__builtin_ia32_vpdpwssd256((__v8si)(S), (__v16hi)(A), (__v16hi)(B))) | |
| 84 | 85 | |
| 85 | 86 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with |
| 86 | 87 | /// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit |
| ... | ... | @@ -97,8 +98,9 @@ |
| 97 | 98 | /// ENDFOR |
| 98 | 99 | /// DST[MAX:256] := 0 |
| 99 | 100 | /// \endcode |
| 100 | #define _mm256_dpwssds_epi32(S, A, B) \ | |
| 101 | ((__m256i)__builtin_ia32_vpdpwssds256((__v8si)(S), (__v8si)(A), (__v8si)(B))) | |
| 101 | #define _mm256_dpwssds_epi32(S, A, B) \ | |
| 102 | ((__m256i)__builtin_ia32_vpdpwssds256((__v8si)(S), (__v16hi)(A), \ | |
| 103 | (__v16hi)(B))) | |
| 102 | 104 | |
| 103 | 105 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with |
| 104 | 106 | /// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed |
| ... | ... | @@ -117,8 +119,8 @@ |
| 117 | 119 | /// ENDFOR |
| 118 | 120 | /// DST[MAX:128] := 0 |
| 119 | 121 | /// \endcode |
| 120 | #define _mm_dpbusd_epi32(S, A, B) \ | |
| 121 | ((__m128i)__builtin_ia32_vpdpbusd128((__v4si)(S), (__v4si)(A), (__v4si)(B))) | |
| 122 | #define _mm_dpbusd_epi32(S, A, B) \ | |
| 123 | ((__m128i)__builtin_ia32_vpdpbusd128((__v4si)(S), (__v16qu)(A), (__v16qi)(B))) | |
| 122 | 124 | |
| 123 | 125 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with |
| 124 | 126 | /// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed |
| ... | ... | @@ -137,8 +139,9 @@ |
| 137 | 139 | /// ENDFOR |
| 138 | 140 | /// DST[MAX:128] := 0 |
| 139 | 141 | /// \endcode |
| 140 | #define _mm_dpbusds_epi32(S, A, B) \ | |
| 141 | ((__m128i)__builtin_ia32_vpdpbusds128((__v4si)(S), (__v4si)(A), (__v4si)(B))) | |
| 142 | #define _mm_dpbusds_epi32(S, A, B) \ | |
| 143 | ((__m128i)__builtin_ia32_vpdpbusds128((__v4si)(S), (__v16qu)(A), \ | |
| 144 | (__v16qi)(B))) | |
| 142 | 145 | |
| 143 | 146 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with |
| 144 | 147 | /// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit |
| ... | ... | @@ -155,8 +158,8 @@ |
| 155 | 158 | /// ENDFOR |
| 156 | 159 | /// DST[MAX:128] := 0 |
| 157 | 160 | /// \endcode |
| 158 | #define _mm_dpwssd_epi32(S, A, B) \ | |
| 159 | ((__m128i)__builtin_ia32_vpdpwssd128((__v4si)(S), (__v4si)(A), (__v4si)(B))) | |
| 161 | #define _mm_dpwssd_epi32(S, A, B) \ | |
| 162 | ((__m128i)__builtin_ia32_vpdpwssd128((__v4si)(S), (__v8hi)(A), (__v8hi)(B))) | |
| 160 | 163 | |
| 161 | 164 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with |
| 162 | 165 | /// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit |
| ... | ... | @@ -173,8 +176,8 @@ |
| 173 | 176 | /// ENDFOR |
| 174 | 177 | /// DST[MAX:128] := 0 |
| 175 | 178 | /// \endcode |
| 176 | #define _mm_dpwssds_epi32(S, A, B) \ | |
| 177 | ((__m128i)__builtin_ia32_vpdpwssds128((__v4si)(S), (__v4si)(A), (__v4si)(B))) | |
| 179 | #define _mm_dpwssds_epi32(S, A, B) \ | |
| 180 | ((__m128i)__builtin_ia32_vpdpwssds128((__v4si)(S), (__v8hi)(A), (__v8hi)(B))) | |
| 178 | 181 | |
| 179 | 182 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 180 | 183 | _mm256_mask_dpbusd_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B) |
lib/include/avx512vlvp2intersectintrin.h+2-2| ... | ... | @@ -30,12 +30,12 @@ |
| 30 | 30 | |
| 31 | 31 | #define __DEFAULT_FN_ATTRS128 \ |
| 32 | 32 | __attribute__((__always_inline__, __nodebug__, \ |
| 33 | __target__("avx512vl,avx512vp2intersect,no-evex512"), \ | |
| 33 | __target__("avx512vl,avx512vp2intersect"), \ | |
| 34 | 34 | __min_vector_width__(128))) |
| 35 | 35 | |
| 36 | 36 | #define __DEFAULT_FN_ATTRS256 \ |
| 37 | 37 | __attribute__((__always_inline__, __nodebug__, \ |
| 38 | __target__("avx512vl,avx512vp2intersect,no-evex512"), \ | |
| 38 | __target__("avx512vl,avx512vp2intersect"), \ | |
| 39 | 39 | __min_vector_width__(256))) |
| 40 | 40 | /// Store, in an even/odd pair of mask registers, the indicators of the |
| 41 | 41 | /// locations of value matches between dwords in operands __a and __b. |
lib/include/avx512vnniintrin.h+10-10| ... | ... | @@ -16,14 +16,14 @@ |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | 18 | #define __DEFAULT_FN_ATTRS \ |
| 19 | __attribute__((__always_inline__, __nodebug__, \ | |
| 20 | __target__("avx512vnni,evex512"), __min_vector_width__(512))) | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("avx512vnni"), \ | |
| 20 | __min_vector_width__(512))) | |
| 21 | 21 | |
| 22 | 22 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 23 | 23 | _mm512_dpbusd_epi32(__m512i __S, __m512i __A, __m512i __B) |
| 24 | 24 | { |
| 25 | return (__m512i)__builtin_ia32_vpdpbusd512((__v16si)__S, (__v16si)__A, | |
| 26 | (__v16si)__B); | |
| 25 | return (__m512i)__builtin_ia32_vpdpbusd512((__v16si)__S, (__v64qu)__A, | |
| 26 | (__v64qi)__B); | |
| 27 | 27 | } |
| 28 | 28 | |
| 29 | 29 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -45,8 +45,8 @@ _mm512_maskz_dpbusd_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B) |
| 45 | 45 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 46 | 46 | _mm512_dpbusds_epi32(__m512i __S, __m512i __A, __m512i __B) |
| 47 | 47 | { |
| 48 | return (__m512i)__builtin_ia32_vpdpbusds512((__v16si)__S, (__v16si)__A, | |
| 49 | (__v16si)__B); | |
| 48 | return (__m512i)__builtin_ia32_vpdpbusds512((__v16si)__S, (__v64qu)__A, | |
| 49 | (__v64qi)__B); | |
| 50 | 50 | } |
| 51 | 51 | |
| 52 | 52 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -68,8 +68,8 @@ _mm512_maskz_dpbusds_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B) |
| 68 | 68 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 69 | 69 | _mm512_dpwssd_epi32(__m512i __S, __m512i __A, __m512i __B) |
| 70 | 70 | { |
| 71 | return (__m512i)__builtin_ia32_vpdpwssd512((__v16si)__S, (__v16si)__A, | |
| 72 | (__v16si)__B); | |
| 71 | return (__m512i)__builtin_ia32_vpdpwssd512((__v16si)__S, (__v32hi)__A, | |
| 72 | (__v32hi)__B); | |
| 73 | 73 | } |
| 74 | 74 | |
| 75 | 75 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| ... | ... | @@ -91,8 +91,8 @@ _mm512_maskz_dpwssd_epi32(__mmask16 __U, __m512i __S, __m512i __A, __m512i __B) |
| 91 | 91 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
| 92 | 92 | _mm512_dpwssds_epi32(__m512i __S, __m512i __A, __m512i __B) |
| 93 | 93 | { |
| 94 | return (__m512i)__builtin_ia32_vpdpwssds512((__v16si)__S, (__v16si)__A, | |
| 95 | (__v16si)__B); | |
| 94 | return (__m512i)__builtin_ia32_vpdpwssds512((__v16si)__S, (__v32hi)__A, | |
| 95 | (__v32hi)__B); | |
| 96 | 96 | } |
| 97 | 97 | |
| 98 | 98 | static __inline__ __m512i __DEFAULT_FN_ATTRS |
lib/include/avx512vp2intersectintrin.h+1-2| ... | ... | @@ -30,8 +30,7 @@ |
| 30 | 30 | |
| 31 | 31 | #define __DEFAULT_FN_ATTRS \ |
| 32 | 32 | __attribute__((__always_inline__, __nodebug__, \ |
| 33 | __target__("avx512vp2intersect,evex512"), \ | |
| 34 | __min_vector_width__(512))) | |
| 33 | __target__("avx512vp2intersect"), __min_vector_width__(512))) | |
| 35 | 34 | |
| 36 | 35 | /// Store, in an even/odd pair of mask registers, the indicators of the |
| 37 | 36 | /// locations of value matches between dwords in operands __a and __b. |
lib/include/avx512vpopcntdqintrin.h+8-10| ... | ... | @@ -16,19 +16,18 @@ |
| 16 | 16 | #define __AVX512VPOPCNTDQINTRIN_H |
| 17 | 17 | |
| 18 | 18 | /* Define the default attributes for the functions in this file. */ |
| 19 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 19 | 20 | #define __DEFAULT_FN_ATTRS \ |
| 20 | 21 | __attribute__((__always_inline__, __nodebug__, \ |
| 21 | __target__("avx512vpopcntdq,evex512"), \ | |
| 22 | __min_vector_width__(512))) | |
| 23 | ||
| 24 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 25 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 22 | __target__("avx512vpopcntdq"), \ | |
| 23 | __min_vector_width__(512))) constexpr | |
| 26 | 24 | #else |
| 27 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 25 | #define __DEFAULT_FN_ATTRS \ | |
| 26 | __attribute__((__always_inline__, __nodebug__, \ | |
| 27 | __target__("avx512vpopcntdq"), __min_vector_width__(512))) | |
| 28 | 28 | #endif |
| 29 | 29 | |
| 30 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 31 | _mm512_popcnt_epi64(__m512i __A) { | |
| 30 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi64(__m512i __A) { | |
| 32 | 31 | return (__m512i)__builtin_elementwise_popcount((__v8du)__A); |
| 33 | 32 | } |
| 34 | 33 | |
| ... | ... | @@ -43,8 +42,7 @@ _mm512_maskz_popcnt_epi64(__mmask8 __U, __m512i __A) { |
| 43 | 42 | return _mm512_mask_popcnt_epi64((__m512i)_mm512_setzero_si512(), __U, __A); |
| 44 | 43 | } |
| 45 | 44 | |
| 46 | static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 47 | _mm512_popcnt_epi32(__m512i __A) { | |
| 45 | static __inline__ __m512i __DEFAULT_FN_ATTRS _mm512_popcnt_epi32(__m512i __A) { | |
| 48 | 46 | return (__m512i)__builtin_elementwise_popcount((__v16su)__A); |
| 49 | 47 | } |
| 50 | 48 |
lib/include/avx512vpopcntdqvlintrin.h+17-15| ... | ... | @@ -16,25 +16,28 @@ |
| 16 | 16 | #define __AVX512VPOPCNTDQVLINTRIN_H |
| 17 | 17 | |
| 18 | 18 | /* Define the default attributes for the functions in this file. */ |
| 19 | ||
| 20 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 21 | #define __DEFAULT_FN_ATTRS128 \ | |
| 22 | __attribute__((__always_inline__, __nodebug__, \ | |
| 23 | __target__("avx512vpopcntdq,avx512vl"), \ | |
| 24 | __min_vector_width__(128))) constexpr | |
| 25 | #define __DEFAULT_FN_ATTRS256 \ | |
| 26 | __attribute__((__always_inline__, __nodebug__, \ | |
| 27 | __target__("avx512vpopcntdq,avx512vl"), \ | |
| 28 | __min_vector_width__(256))) constexpr | |
| 29 | #else | |
| 19 | 30 | #define __DEFAULT_FN_ATTRS128 \ |
| 20 | 31 | __attribute__((__always_inline__, __nodebug__, \ |
| 21 | __target__("avx512vpopcntdq,avx512vl,no-evex512"), \ | |
| 32 | __target__("avx512vpopcntdq,avx512vl"), \ | |
| 22 | 33 | __min_vector_width__(128))) |
| 23 | 34 | #define __DEFAULT_FN_ATTRS256 \ |
| 24 | 35 | __attribute__((__always_inline__, __nodebug__, \ |
| 25 | __target__("avx512vpopcntdq,avx512vl,no-evex512"), \ | |
| 36 | __target__("avx512vpopcntdq,avx512vl"), \ | |
| 26 | 37 | __min_vector_width__(256))) |
| 27 | ||
| 28 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 29 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 30 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 31 | #else | |
| 32 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 33 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 34 | 38 | #endif |
| 35 | 39 | |
| 36 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 37 | _mm_popcnt_epi64(__m128i __A) { | |
| 40 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_popcnt_epi64(__m128i __A) { | |
| 38 | 41 | return (__m128i)__builtin_elementwise_popcount((__v2du)__A); |
| 39 | 42 | } |
| 40 | 43 | |
| ... | ... | @@ -49,8 +52,7 @@ _mm_maskz_popcnt_epi64(__mmask8 __U, __m128i __A) { |
| 49 | 52 | return _mm_mask_popcnt_epi64((__m128i)_mm_setzero_si128(), __U, __A); |
| 50 | 53 | } |
| 51 | 54 | |
| 52 | static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 53 | _mm_popcnt_epi32(__m128i __A) { | |
| 55 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_popcnt_epi32(__m128i __A) { | |
| 54 | 56 | return (__m128i)__builtin_elementwise_popcount((__v4su)__A); |
| 55 | 57 | } |
| 56 | 58 | |
| ... | ... | @@ -65,7 +67,7 @@ _mm_maskz_popcnt_epi32(__mmask8 __U, __m128i __A) { |
| 65 | 67 | return _mm_mask_popcnt_epi32((__m128i)_mm_setzero_si128(), __U, __A); |
| 66 | 68 | } |
| 67 | 69 | |
| 68 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 70 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 69 | 71 | _mm256_popcnt_epi64(__m256i __A) { |
| 70 | 72 | return (__m256i)__builtin_elementwise_popcount((__v4du)__A); |
| 71 | 73 | } |
| ... | ... | @@ -81,7 +83,7 @@ _mm256_maskz_popcnt_epi64(__mmask8 __U, __m256i __A) { |
| 81 | 83 | return _mm256_mask_popcnt_epi64((__m256i)_mm256_setzero_si256(), __U, __A); |
| 82 | 84 | } |
| 83 | 85 | |
| 84 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 86 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 85 | 87 | _mm256_popcnt_epi32(__m256i __A) { |
| 86 | 88 | return (__m256i)__builtin_elementwise_popcount((__v8su)__A); |
| 87 | 89 | } |
lib/include/avxifmaintrin.h+16| ... | ... | @@ -15,12 +15,28 @@ |
| 15 | 15 | #define __AVXIFMAINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 19 | #define __DEFAULT_FN_ATTRS128 \ | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \ | |
| 21 | __min_vector_width__(128))) constexpr | |
| 22 | #define __DEFAULT_FN_ATTRS256 \ | |
| 23 | __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \ | |
| 24 | __min_vector_width__(256))) constexpr | |
| 25 | #else | |
| 18 | 26 | #define __DEFAULT_FN_ATTRS128 \ |
| 19 | 27 | __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \ |
| 20 | 28 | __min_vector_width__(128))) |
| 21 | 29 | #define __DEFAULT_FN_ATTRS256 \ |
| 22 | 30 | __attribute__((__always_inline__, __nodebug__, __target__("avxifma"), \ |
| 23 | 31 | __min_vector_width__(256))) |
| 32 | #endif | |
| 33 | ||
| 34 | #if !defined(__AVX512IFMA__) && defined(__AVXIFMA__) | |
| 35 | #define _mm_madd52hi_epu64(X, Y, Z) _mm_madd52hi_avx_epu64(X, Y, Z) | |
| 36 | #define _mm_madd52lo_epu64(X, Y, Z) _mm_madd52lo_avx_epu64(X, Y, Z) | |
| 37 | #define _mm256_madd52hi_epu64(X, Y, Z) _mm256_madd52hi_avx_epu64(X, Y, Z) | |
| 38 | #define _mm256_madd52lo_epu64(X, Y, Z) _mm256_madd52lo_avx_epu64(X, Y, Z) | |
| 39 | #endif | |
| 24 | 40 | |
| 25 | 41 | // must vex-encoding |
| 26 | 42 |
lib/include/avxintrin.h+165-241| ... | ... | @@ -50,28 +50,19 @@ typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32))); |
| 50 | 50 | #endif |
| 51 | 51 | |
| 52 | 52 | /* Define the default attributes for the functions in this file. */ |
| 53 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 54 | #define __DEFAULT_FN_ATTRS \ | |
| 55 | __attribute__((__always_inline__, __nodebug__, __target__("avx,no-evex512"), \ | |
| 56 | __min_vector_width__(256))) | |
| 57 | #define __DEFAULT_FN_ATTRS128 \ | |
| 58 | __attribute__((__always_inline__, __nodebug__, __target__("avx,no-evex512"), \ | |
| 59 | __min_vector_width__(128))) | |
| 60 | #else | |
| 61 | 53 | #define __DEFAULT_FN_ATTRS \ |
| 62 | 54 | __attribute__((__always_inline__, __nodebug__, __target__("avx"), \ |
| 63 | 55 | __min_vector_width__(256))) |
| 64 | 56 | #define __DEFAULT_FN_ATTRS128 \ |
| 65 | 57 | __attribute__((__always_inline__, __nodebug__, __target__("avx"), \ |
| 66 | 58 | __min_vector_width__(128))) |
| 67 | #endif | |
| 68 | 59 | |
| 69 | 60 | #if defined(__cplusplus) && (__cplusplus >= 201103L) |
| 70 | 61 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr |
| 71 | 62 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr |
| 72 | 63 | #else |
| 73 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 74 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 64 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 65 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 75 | 66 | #endif |
| 76 | 67 | |
| 77 | 68 | /* Arithmetic */ |
| ... | ... | @@ -87,9 +78,8 @@ typedef __bf16 __m256bh __attribute__((__vector_size__(32), __aligned__(32))); |
| 87 | 78 | /// A 256-bit vector of [4 x double] containing one of the source operands. |
| 88 | 79 | /// \returns A 256-bit vector of [4 x double] containing the sums of both |
| 89 | 80 | /// operands. |
| 90 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 91 | _mm256_add_pd(__m256d __a, __m256d __b) | |
| 92 | { | |
| 81 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 82 | _mm256_add_pd(__m256d __a, __m256d __b) { | |
| 93 | 83 | return (__m256d)((__v4df)__a+(__v4df)__b); |
| 94 | 84 | } |
| 95 | 85 | |
| ... | ... | @@ -105,9 +95,8 @@ _mm256_add_pd(__m256d __a, __m256d __b) |
| 105 | 95 | /// A 256-bit vector of [8 x float] containing one of the source operands. |
| 106 | 96 | /// \returns A 256-bit vector of [8 x float] containing the sums of both |
| 107 | 97 | /// operands. |
| 108 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 109 | _mm256_add_ps(__m256 __a, __m256 __b) | |
| 110 | { | |
| 98 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_add_ps(__m256 __a, | |
| 99 | __m256 __b) { | |
| 111 | 100 | return (__m256)((__v8sf)__a+(__v8sf)__b); |
| 112 | 101 | } |
| 113 | 102 | |
| ... | ... | @@ -123,9 +112,8 @@ _mm256_add_ps(__m256 __a, __m256 __b) |
| 123 | 112 | /// A 256-bit vector of [4 x double] containing the subtrahend. |
| 124 | 113 | /// \returns A 256-bit vector of [4 x double] containing the differences between |
| 125 | 114 | /// both operands. |
| 126 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 127 | _mm256_sub_pd(__m256d __a, __m256d __b) | |
| 128 | { | |
| 115 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 116 | _mm256_sub_pd(__m256d __a, __m256d __b) { | |
| 129 | 117 | return (__m256d)((__v4df)__a-(__v4df)__b); |
| 130 | 118 | } |
| 131 | 119 | |
| ... | ... | @@ -141,9 +129,8 @@ _mm256_sub_pd(__m256d __a, __m256d __b) |
| 141 | 129 | /// A 256-bit vector of [8 x float] containing the subtrahend. |
| 142 | 130 | /// \returns A 256-bit vector of [8 x float] containing the differences between |
| 143 | 131 | /// both operands. |
| 144 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 145 | _mm256_sub_ps(__m256 __a, __m256 __b) | |
| 146 | { | |
| 132 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_sub_ps(__m256 __a, | |
| 133 | __m256 __b) { | |
| 147 | 134 | return (__m256)((__v8sf)__a-(__v8sf)__b); |
| 148 | 135 | } |
| 149 | 136 | |
| ... | ... | @@ -160,9 +147,8 @@ _mm256_sub_ps(__m256 __a, __m256 __b) |
| 160 | 147 | /// A 256-bit vector of [4 x double] containing the right source operand. |
| 161 | 148 | /// \returns A 256-bit vector of [4 x double] containing the alternating sums |
| 162 | 149 | /// and differences between both operands. |
| 163 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 164 | _mm256_addsub_pd(__m256d __a, __m256d __b) | |
| 165 | { | |
| 150 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 151 | _mm256_addsub_pd(__m256d __a, __m256d __b) { | |
| 166 | 152 | return (__m256d)__builtin_ia32_addsubpd256((__v4df)__a, (__v4df)__b); |
| 167 | 153 | } |
| 168 | 154 | |
| ... | ... | @@ -179,9 +165,8 @@ _mm256_addsub_pd(__m256d __a, __m256d __b) |
| 179 | 165 | /// A 256-bit vector of [8 x float] containing the right source operand. |
| 180 | 166 | /// \returns A 256-bit vector of [8 x float] containing the alternating sums and |
| 181 | 167 | /// differences between both operands. |
| 182 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 183 | _mm256_addsub_ps(__m256 __a, __m256 __b) | |
| 184 | { | |
| 168 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 169 | _mm256_addsub_ps(__m256 __a, __m256 __b) { | |
| 185 | 170 | return (__m256)__builtin_ia32_addsubps256((__v8sf)__a, (__v8sf)__b); |
| 186 | 171 | } |
| 187 | 172 | |
| ... | ... | @@ -197,9 +182,8 @@ _mm256_addsub_ps(__m256 __a, __m256 __b) |
| 197 | 182 | /// A 256-bit vector of [4 x double] containing the divisor. |
| 198 | 183 | /// \returns A 256-bit vector of [4 x double] containing the quotients of both |
| 199 | 184 | /// operands. |
| 200 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 201 | _mm256_div_pd(__m256d __a, __m256d __b) | |
| 202 | { | |
| 185 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 186 | _mm256_div_pd(__m256d __a, __m256d __b) { | |
| 203 | 187 | return (__m256d)((__v4df)__a/(__v4df)__b); |
| 204 | 188 | } |
| 205 | 189 | |
| ... | ... | @@ -215,9 +199,8 @@ _mm256_div_pd(__m256d __a, __m256d __b) |
| 215 | 199 | /// A 256-bit vector of [8 x float] containing the divisor. |
| 216 | 200 | /// \returns A 256-bit vector of [8 x float] containing the quotients of both |
| 217 | 201 | /// operands. |
| 218 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 219 | _mm256_div_ps(__m256 __a, __m256 __b) | |
| 220 | { | |
| 202 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_div_ps(__m256 __a, | |
| 203 | __m256 __b) { | |
| 221 | 204 | return (__m256)((__v8sf)__a/(__v8sf)__b); |
| 222 | 205 | } |
| 223 | 206 | |
| ... | ... | @@ -236,9 +219,8 @@ _mm256_div_ps(__m256 __a, __m256 __b) |
| 236 | 219 | /// A 256-bit vector of [4 x double] containing one of the operands. |
| 237 | 220 | /// \returns A 256-bit vector of [4 x double] containing the maximum values |
| 238 | 221 | /// between both operands. |
| 239 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 240 | _mm256_max_pd(__m256d __a, __m256d __b) | |
| 241 | { | |
| 222 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 223 | _mm256_max_pd(__m256d __a, __m256d __b) { | |
| 242 | 224 | return (__m256d)__builtin_ia32_maxpd256((__v4df)__a, (__v4df)__b); |
| 243 | 225 | } |
| 244 | 226 | |
| ... | ... | @@ -257,9 +239,8 @@ _mm256_max_pd(__m256d __a, __m256d __b) |
| 257 | 239 | /// A 256-bit vector of [8 x float] containing one of the operands. |
| 258 | 240 | /// \returns A 256-bit vector of [8 x float] containing the maximum values |
| 259 | 241 | /// between both operands. |
| 260 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 261 | _mm256_max_ps(__m256 __a, __m256 __b) | |
| 262 | { | |
| 242 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_max_ps(__m256 __a, | |
| 243 | __m256 __b) { | |
| 263 | 244 | return (__m256)__builtin_ia32_maxps256((__v8sf)__a, (__v8sf)__b); |
| 264 | 245 | } |
| 265 | 246 | |
| ... | ... | @@ -278,9 +259,8 @@ _mm256_max_ps(__m256 __a, __m256 __b) |
| 278 | 259 | /// A 256-bit vector of [4 x double] containing one of the operands. |
| 279 | 260 | /// \returns A 256-bit vector of [4 x double] containing the minimum values |
| 280 | 261 | /// between both operands. |
| 281 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 282 | _mm256_min_pd(__m256d __a, __m256d __b) | |
| 283 | { | |
| 262 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 263 | _mm256_min_pd(__m256d __a, __m256d __b) { | |
| 284 | 264 | return (__m256d)__builtin_ia32_minpd256((__v4df)__a, (__v4df)__b); |
| 285 | 265 | } |
| 286 | 266 | |
| ... | ... | @@ -299,9 +279,8 @@ _mm256_min_pd(__m256d __a, __m256d __b) |
| 299 | 279 | /// A 256-bit vector of [8 x float] containing one of the operands. |
| 300 | 280 | /// \returns A 256-bit vector of [8 x float] containing the minimum values |
| 301 | 281 | /// between both operands. |
| 302 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 303 | _mm256_min_ps(__m256 __a, __m256 __b) | |
| 304 | { | |
| 282 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_min_ps(__m256 __a, | |
| 283 | __m256 __b) { | |
| 305 | 284 | return (__m256)__builtin_ia32_minps256((__v8sf)__a, (__v8sf)__b); |
| 306 | 285 | } |
| 307 | 286 | |
| ... | ... | @@ -317,9 +296,8 @@ _mm256_min_ps(__m256 __a, __m256 __b) |
| 317 | 296 | /// A 256-bit vector of [4 x double] containing one of the operands. |
| 318 | 297 | /// \returns A 256-bit vector of [4 x double] containing the products of both |
| 319 | 298 | /// operands. |
| 320 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 321 | _mm256_mul_pd(__m256d __a, __m256d __b) | |
| 322 | { | |
| 299 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 300 | _mm256_mul_pd(__m256d __a, __m256d __b) { | |
| 323 | 301 | return (__m256d)((__v4df)__a * (__v4df)__b); |
| 324 | 302 | } |
| 325 | 303 | |
| ... | ... | @@ -335,9 +313,8 @@ _mm256_mul_pd(__m256d __a, __m256d __b) |
| 335 | 313 | /// A 256-bit vector of [8 x float] containing one of the operands. |
| 336 | 314 | /// \returns A 256-bit vector of [8 x float] containing the products of both |
| 337 | 315 | /// operands. |
| 338 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 339 | _mm256_mul_ps(__m256 __a, __m256 __b) | |
| 340 | { | |
| 316 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_mul_ps(__m256 __a, | |
| 317 | __m256 __b) { | |
| 341 | 318 | return (__m256)((__v8sf)__a * (__v8sf)__b); |
| 342 | 319 | } |
| 343 | 320 | |
| ... | ... | @@ -352,10 +329,8 @@ _mm256_mul_ps(__m256 __a, __m256 __b) |
| 352 | 329 | /// A 256-bit vector of [4 x double]. |
| 353 | 330 | /// \returns A 256-bit vector of [4 x double] containing the square roots of the |
| 354 | 331 | /// values in the operand. |
| 355 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 356 | _mm256_sqrt_pd(__m256d __a) | |
| 357 | { | |
| 358 | return (__m256d)__builtin_ia32_sqrtpd256((__v4df)__a); | |
| 332 | static __inline __m256d __DEFAULT_FN_ATTRS _mm256_sqrt_pd(__m256d __a) { | |
| 333 | return __builtin_elementwise_sqrt(__a); | |
| 359 | 334 | } |
| 360 | 335 | |
| 361 | 336 | /// Calculates the square roots of the values in a 256-bit vector of |
| ... | ... | @@ -369,10 +344,8 @@ _mm256_sqrt_pd(__m256d __a) |
| 369 | 344 | /// A 256-bit vector of [8 x float]. |
| 370 | 345 | /// \returns A 256-bit vector of [8 x float] containing the square roots of the |
| 371 | 346 | /// values in the operand. |
| 372 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 373 | _mm256_sqrt_ps(__m256 __a) | |
| 374 | { | |
| 375 | return (__m256)__builtin_ia32_sqrtps256((__v8sf)__a); | |
| 347 | static __inline __m256 __DEFAULT_FN_ATTRS _mm256_sqrt_ps(__m256 __a) { | |
| 348 | return __builtin_elementwise_sqrt(__a); | |
| 376 | 349 | } |
| 377 | 350 | |
| 378 | 351 | /// Calculates the reciprocal square roots of the values in a 256-bit |
| ... | ... | @@ -555,7 +528,7 @@ _mm256_rcp_ps(__m256 __a) |
| 555 | 528 | /// A 256-bit vector of [4 x double] containing one of the source operands. |
| 556 | 529 | /// \returns A 256-bit vector of [4 x double] containing the bitwise AND of the |
| 557 | 530 | /// values between both operands. |
| 558 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 531 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 559 | 532 | _mm256_and_pd(__m256d __a, __m256d __b) |
| 560 | 533 | { |
| 561 | 534 | return (__m256d)((__v4du)__a & (__v4du)__b); |
| ... | ... | @@ -573,7 +546,7 @@ _mm256_and_pd(__m256d __a, __m256d __b) |
| 573 | 546 | /// A 256-bit vector of [8 x float] containing one of the source operands. |
| 574 | 547 | /// \returns A 256-bit vector of [8 x float] containing the bitwise AND of the |
| 575 | 548 | /// values between both operands. |
| 576 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 549 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 577 | 550 | _mm256_and_ps(__m256 __a, __m256 __b) |
| 578 | 551 | { |
| 579 | 552 | return (__m256)((__v8su)__a & (__v8su)__b); |
| ... | ... | @@ -594,7 +567,7 @@ _mm256_and_ps(__m256 __a, __m256 __b) |
| 594 | 567 | /// \returns A 256-bit vector of [4 x double] containing the bitwise AND of the |
| 595 | 568 | /// values of the second operand and the one's complement of the first |
| 596 | 569 | /// operand. |
| 597 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 570 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 598 | 571 | _mm256_andnot_pd(__m256d __a, __m256d __b) |
| 599 | 572 | { |
| 600 | 573 | return (__m256d)(~(__v4du)__a & (__v4du)__b); |
| ... | ... | @@ -615,7 +588,7 @@ _mm256_andnot_pd(__m256d __a, __m256d __b) |
| 615 | 588 | /// \returns A 256-bit vector of [8 x float] containing the bitwise AND of the |
| 616 | 589 | /// values of the second operand and the one's complement of the first |
| 617 | 590 | /// operand. |
| 618 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 591 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 619 | 592 | _mm256_andnot_ps(__m256 __a, __m256 __b) |
| 620 | 593 | { |
| 621 | 594 | return (__m256)(~(__v8su)__a & (__v8su)__b); |
| ... | ... | @@ -633,7 +606,7 @@ _mm256_andnot_ps(__m256 __a, __m256 __b) |
| 633 | 606 | /// A 256-bit vector of [4 x double] containing one of the source operands. |
| 634 | 607 | /// \returns A 256-bit vector of [4 x double] containing the bitwise OR of the |
| 635 | 608 | /// values between both operands. |
| 636 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 609 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 637 | 610 | _mm256_or_pd(__m256d __a, __m256d __b) |
| 638 | 611 | { |
| 639 | 612 | return (__m256d)((__v4du)__a | (__v4du)__b); |
| ... | ... | @@ -651,7 +624,7 @@ _mm256_or_pd(__m256d __a, __m256d __b) |
| 651 | 624 | /// A 256-bit vector of [8 x float] containing one of the source operands. |
| 652 | 625 | /// \returns A 256-bit vector of [8 x float] containing the bitwise OR of the |
| 653 | 626 | /// values between both operands. |
| 654 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 627 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 655 | 628 | _mm256_or_ps(__m256 __a, __m256 __b) |
| 656 | 629 | { |
| 657 | 630 | return (__m256)((__v8su)__a | (__v8su)__b); |
| ... | ... | @@ -669,7 +642,7 @@ _mm256_or_ps(__m256 __a, __m256 __b) |
| 669 | 642 | /// A 256-bit vector of [4 x double] containing one of the source operands. |
| 670 | 643 | /// \returns A 256-bit vector of [4 x double] containing the bitwise XOR of the |
| 671 | 644 | /// values between both operands. |
| 672 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 645 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 673 | 646 | _mm256_xor_pd(__m256d __a, __m256d __b) |
| 674 | 647 | { |
| 675 | 648 | return (__m256d)((__v4du)__a ^ (__v4du)__b); |
| ... | ... | @@ -687,7 +660,7 @@ _mm256_xor_pd(__m256d __a, __m256d __b) |
| 687 | 660 | /// A 256-bit vector of [8 x float] containing one of the source operands. |
| 688 | 661 | /// \returns A 256-bit vector of [8 x float] containing the bitwise XOR of the |
| 689 | 662 | /// values between both operands. |
| 690 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 663 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 691 | 664 | _mm256_xor_ps(__m256 __a, __m256 __b) |
| 692 | 665 | { |
| 693 | 666 | return (__m256)((__v8su)__a ^ (__v8su)__b); |
| ... | ... | @@ -711,9 +684,8 @@ _mm256_xor_ps(__m256 __a, __m256 __b) |
| 711 | 684 | /// elements of a vector of [4 x double]. |
| 712 | 685 | /// \returns A 256-bit vector of [4 x double] containing the horizontal sums of |
| 713 | 686 | /// both operands. |
| 714 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 715 | _mm256_hadd_pd(__m256d __a, __m256d __b) | |
| 716 | { | |
| 687 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 688 | _mm256_hadd_pd(__m256d __a, __m256d __b) { | |
| 717 | 689 | return (__m256d)__builtin_ia32_haddpd256((__v4df)__a, (__v4df)__b); |
| 718 | 690 | } |
| 719 | 691 | |
| ... | ... | @@ -734,9 +706,8 @@ _mm256_hadd_pd(__m256d __a, __m256d __b) |
| 734 | 706 | /// index 2, 3, 6, 7 of a vector of [8 x float]. |
| 735 | 707 | /// \returns A 256-bit vector of [8 x float] containing the horizontal sums of |
| 736 | 708 | /// both operands. |
| 737 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 738 | _mm256_hadd_ps(__m256 __a, __m256 __b) | |
| 739 | { | |
| 709 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_hadd_ps(__m256 __a, | |
| 710 | __m256 __b) { | |
| 740 | 711 | return (__m256)__builtin_ia32_haddps256((__v8sf)__a, (__v8sf)__b); |
| 741 | 712 | } |
| 742 | 713 | |
| ... | ... | @@ -757,9 +728,8 @@ _mm256_hadd_ps(__m256 __a, __m256 __b) |
| 757 | 728 | /// odd-indexed elements of a vector of [4 x double]. |
| 758 | 729 | /// \returns A 256-bit vector of [4 x double] containing the horizontal |
| 759 | 730 | /// differences of both operands. |
| 760 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 761 | _mm256_hsub_pd(__m256d __a, __m256d __b) | |
| 762 | { | |
| 731 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 732 | _mm256_hsub_pd(__m256d __a, __m256d __b) { | |
| 763 | 733 | return (__m256d)__builtin_ia32_hsubpd256((__v4df)__a, (__v4df)__b); |
| 764 | 734 | } |
| 765 | 735 | |
| ... | ... | @@ -780,9 +750,8 @@ _mm256_hsub_pd(__m256d __a, __m256d __b) |
| 780 | 750 | /// elements with index 2, 3, 6, 7 of a vector of [8 x float]. |
| 781 | 751 | /// \returns A 256-bit vector of [8 x float] containing the horizontal |
| 782 | 752 | /// differences of both operands. |
| 783 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 784 | _mm256_hsub_ps(__m256 __a, __m256 __b) | |
| 785 | { | |
| 753 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_hsub_ps(__m256 __a, | |
| 754 | __m256 __b) { | |
| 786 | 755 | return (__m256)__builtin_ia32_hsubps256((__v8sf)__a, (__v8sf)__b); |
| 787 | 756 | } |
| 788 | 757 | |
| ... | ... | @@ -810,9 +779,8 @@ _mm256_hsub_ps(__m256 __a, __m256 __b) |
| 810 | 779 | /// 1: Bits [127:64] of the source are copied to bits [127:64] of the |
| 811 | 780 | /// returned vector. |
| 812 | 781 | /// \returns A 128-bit vector of [2 x double] containing the copied values. |
| 813 | static __inline __m128d __DEFAULT_FN_ATTRS128 | |
| 814 | _mm_permutevar_pd(__m128d __a, __m128i __c) | |
| 815 | { | |
| 782 | static __inline __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 783 | _mm_permutevar_pd(__m128d __a, __m128i __c) { | |
| 816 | 784 | return (__m128d)__builtin_ia32_vpermilvarpd((__v2df)__a, (__v2di)__c); |
| 817 | 785 | } |
| 818 | 786 | |
| ... | ... | @@ -849,9 +817,8 @@ _mm_permutevar_pd(__m128d __a, __m128i __c) |
| 849 | 817 | /// 1: Bits [255:192] of the source are copied to bits [255:192] of the |
| 850 | 818 | /// returned vector. |
| 851 | 819 | /// \returns A 256-bit vector of [4 x double] containing the copied values. |
| 852 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 853 | _mm256_permutevar_pd(__m256d __a, __m256i __c) | |
| 854 | { | |
| 820 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 821 | _mm256_permutevar_pd(__m256d __a, __m256i __c) { | |
| 855 | 822 | return (__m256d)__builtin_ia32_vpermilvarpd256((__v4df)__a, (__v4di)__c); |
| 856 | 823 | } |
| 857 | 824 | |
| ... | ... | @@ -904,9 +871,8 @@ _mm256_permutevar_pd(__m256d __a, __m256i __c) |
| 904 | 871 | /// 11: Bits [127:96] of the source are copied to bits [127:96] of the |
| 905 | 872 | /// returned vector. |
| 906 | 873 | /// \returns A 128-bit vector of [4 x float] containing the copied values. |
| 907 | static __inline __m128 __DEFAULT_FN_ATTRS128 | |
| 908 | _mm_permutevar_ps(__m128 __a, __m128i __c) | |
| 909 | { | |
| 874 | static __inline __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 875 | _mm_permutevar_ps(__m128 __a, __m128i __c) { | |
| 910 | 876 | return (__m128)__builtin_ia32_vpermilvarps((__v4sf)__a, (__v4si)__c); |
| 911 | 877 | } |
| 912 | 878 | |
| ... | ... | @@ -995,9 +961,8 @@ _mm_permutevar_ps(__m128 __a, __m128i __c) |
| 995 | 961 | /// 11: Bits [255:224] of the source are copied to bits [255:224] of the |
| 996 | 962 | /// returned vector. |
| 997 | 963 | /// \returns A 256-bit vector of [8 x float] containing the copied values. |
| 998 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 999 | _mm256_permutevar_ps(__m256 __a, __m256i __c) | |
| 1000 | { | |
| 964 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 965 | _mm256_permutevar_ps(__m256 __a, __m256i __c) { | |
| 1001 | 966 | return (__m256)__builtin_ia32_vpermilvarps256((__v8sf)__a, (__v8si)__c); |
| 1002 | 967 | } |
| 1003 | 968 | |
| ... | ... | @@ -1419,9 +1384,8 @@ _mm256_permutevar_ps(__m256 __a, __m256i __c) |
| 1419 | 1384 | /// 64-bit element in operand \a __b is copied to the same position in the |
| 1420 | 1385 | /// destination. |
| 1421 | 1386 | /// \returns A 256-bit vector of [4 x double] containing the copied values. |
| 1422 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 1423 | _mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c) | |
| 1424 | { | |
| 1387 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1388 | _mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c) { | |
| 1425 | 1389 | return (__m256d)__builtin_ia32_blendvpd256( |
| 1426 | 1390 | (__v4df)__a, (__v4df)__b, (__v4df)__c); |
| 1427 | 1391 | } |
| ... | ... | @@ -1447,9 +1411,8 @@ _mm256_blendv_pd(__m256d __a, __m256d __b, __m256d __c) |
| 1447 | 1411 | /// corresponding 32-bit element in operand \a __b is copied to the same |
| 1448 | 1412 | /// position in the destination. |
| 1449 | 1413 | /// \returns A 256-bit vector of [8 x float] containing the copied values. |
| 1450 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 1451 | _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c) | |
| 1452 | { | |
| 1414 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1415 | _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c) { | |
| 1453 | 1416 | return (__m256)__builtin_ia32_blendvps256( |
| 1454 | 1417 | (__v8sf)__a, (__v8sf)__b, (__v8sf)__c); |
| 1455 | 1418 | } |
| ... | ... | @@ -2190,9 +2153,8 @@ _mm256_blendv_ps(__m256 __a, __m256 __b, __m256 __c) |
| 2190 | 2153 | /// \param __a |
| 2191 | 2154 | /// A 128-bit integer vector of [4 x i32]. |
| 2192 | 2155 | /// \returns A 256-bit vector of [4 x double] containing the converted values. |
| 2193 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 2194 | _mm256_cvtepi32_pd(__m128i __a) | |
| 2195 | { | |
| 2156 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2157 | _mm256_cvtepi32_pd(__m128i __a) { | |
| 2196 | 2158 | return (__m256d)__builtin_convertvector((__v4si)__a, __v4df); |
| 2197 | 2159 | } |
| 2198 | 2160 | |
| ... | ... | @@ -2205,9 +2167,8 @@ _mm256_cvtepi32_pd(__m128i __a) |
| 2205 | 2167 | /// \param __a |
| 2206 | 2168 | /// A 256-bit integer vector. |
| 2207 | 2169 | /// \returns A 256-bit vector of [8 x float] containing the converted values. |
| 2208 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 2209 | _mm256_cvtepi32_ps(__m256i __a) | |
| 2210 | { | |
| 2170 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2171 | _mm256_cvtepi32_ps(__m256i __a) { | |
| 2211 | 2172 | return (__m256)__builtin_convertvector((__v8si)__a, __v8sf); |
| 2212 | 2173 | } |
| 2213 | 2174 | |
| ... | ... | @@ -2221,9 +2182,8 @@ _mm256_cvtepi32_ps(__m256i __a) |
| 2221 | 2182 | /// \param __a |
| 2222 | 2183 | /// A 256-bit vector of [4 x double]. |
| 2223 | 2184 | /// \returns A 128-bit vector of [4 x float] containing the converted values. |
| 2224 | static __inline __m128 __DEFAULT_FN_ATTRS | |
| 2225 | _mm256_cvtpd_ps(__m256d __a) | |
| 2226 | { | |
| 2185 | static __inline __m128 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2186 | _mm256_cvtpd_ps(__m256d __a) { | |
| 2227 | 2187 | return (__m128)__builtin_ia32_cvtpd2ps256((__v4df) __a); |
| 2228 | 2188 | } |
| 2229 | 2189 | |
| ... | ... | @@ -2256,9 +2216,8 @@ _mm256_cvtps_epi32(__m256 __a) |
| 2256 | 2216 | /// \param __a |
| 2257 | 2217 | /// A 128-bit vector of [4 x float]. |
| 2258 | 2218 | /// \returns A 256-bit vector of [4 x double] containing the converted values. |
| 2259 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 2260 | _mm256_cvtps_pd(__m128 __a) | |
| 2261 | { | |
| 2219 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2220 | _mm256_cvtps_pd(__m128 __a) { | |
| 2262 | 2221 | return (__m256d)__builtin_convertvector((__v4sf)__a, __v4df); |
| 2263 | 2222 | } |
| 2264 | 2223 | |
| ... | ... | @@ -2333,10 +2292,9 @@ _mm256_cvttps_epi32(__m256 __a) |
| 2333 | 2292 | /// \param __a |
| 2334 | 2293 | /// A 256-bit vector of [4 x double]. |
| 2335 | 2294 | /// \returns A 64 bit double containing the first element of the input vector. |
| 2336 | static __inline double __DEFAULT_FN_ATTRS | |
| 2337 | _mm256_cvtsd_f64(__m256d __a) | |
| 2338 | { | |
| 2339 | return __a[0]; | |
| 2295 | static __inline double __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2296 | _mm256_cvtsd_f64(__m256d __a) { | |
| 2297 | return __a[0]; | |
| 2340 | 2298 | } |
| 2341 | 2299 | |
| 2342 | 2300 | /// Returns the first element of the input vector of [8 x i32]. |
| ... | ... | @@ -2349,11 +2307,10 @@ _mm256_cvtsd_f64(__m256d __a) |
| 2349 | 2307 | /// \param __a |
| 2350 | 2308 | /// A 256-bit vector of [8 x i32]. |
| 2351 | 2309 | /// \returns A 32 bit integer containing the first element of the input vector. |
| 2352 | static __inline int __DEFAULT_FN_ATTRS | |
| 2353 | _mm256_cvtsi256_si32(__m256i __a) | |
| 2354 | { | |
| 2355 | __v8si __b = (__v8si)__a; | |
| 2356 | return __b[0]; | |
| 2310 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2311 | _mm256_cvtsi256_si32(__m256i __a) { | |
| 2312 | __v8si __b = (__v8si)__a; | |
| 2313 | return __b[0]; | |
| 2357 | 2314 | } |
| 2358 | 2315 | |
| 2359 | 2316 | /// Returns the first element of the input vector of [8 x float]. |
| ... | ... | @@ -2366,10 +2323,9 @@ _mm256_cvtsi256_si32(__m256i __a) |
| 2366 | 2323 | /// \param __a |
| 2367 | 2324 | /// A 256-bit vector of [8 x float]. |
| 2368 | 2325 | /// \returns A 32 bit float containing the first element of the input vector. |
| 2369 | static __inline float __DEFAULT_FN_ATTRS | |
| 2370 | _mm256_cvtss_f32(__m256 __a) | |
| 2371 | { | |
| 2372 | return __a[0]; | |
| 2326 | static __inline float __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2327 | _mm256_cvtss_f32(__m256 __a) { | |
| 2328 | return __a[0]; | |
| 2373 | 2329 | } |
| 2374 | 2330 | |
| 2375 | 2331 | /* Vector replicate */ |
| ... | ... | @@ -2392,7 +2348,7 @@ _mm256_cvtss_f32(__m256 __a) |
| 2392 | 2348 | /// return value. |
| 2393 | 2349 | /// \returns A 256-bit vector of [8 x float] containing the moved and duplicated |
| 2394 | 2350 | /// values. |
| 2395 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 2351 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2396 | 2352 | _mm256_movehdup_ps(__m256 __a) |
| 2397 | 2353 | { |
| 2398 | 2354 | return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 1, 1, 3, 3, 5, 5, 7, 7); |
| ... | ... | @@ -2417,7 +2373,7 @@ _mm256_movehdup_ps(__m256 __a) |
| 2417 | 2373 | /// return value. |
| 2418 | 2374 | /// \returns A 256-bit vector of [8 x float] containing the moved and duplicated |
| 2419 | 2375 | /// values. |
| 2420 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 2376 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2421 | 2377 | _mm256_moveldup_ps(__m256 __a) |
| 2422 | 2378 | { |
| 2423 | 2379 | return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 0, 2, 2, 4, 4, 6, 6); |
| ... | ... | @@ -2439,7 +2395,7 @@ _mm256_moveldup_ps(__m256 __a) |
| 2439 | 2395 | /// the return value. |
| 2440 | 2396 | /// \returns A 256-bit vector of [4 x double] containing the moved and |
| 2441 | 2397 | /// duplicated values. |
| 2442 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 2398 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2443 | 2399 | _mm256_movedup_pd(__m256d __a) |
| 2444 | 2400 | { |
| 2445 | 2401 | return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 0, 2, 2); |
| ... | ... | @@ -2462,9 +2418,8 @@ _mm256_movedup_pd(__m256d __a) |
| 2462 | 2418 | /// Bits [127:64] are written to bits [127:64] of the return value. \n |
| 2463 | 2419 | /// Bits [255:192] are written to bits [255:192] of the return value. \n |
| 2464 | 2420 | /// \returns A 256-bit vector of [4 x double] containing the interleaved values. |
| 2465 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 2466 | _mm256_unpackhi_pd(__m256d __a, __m256d __b) | |
| 2467 | { | |
| 2421 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2422 | _mm256_unpackhi_pd(__m256d __a, __m256d __b) { | |
| 2468 | 2423 | return __builtin_shufflevector((__v4df)__a, (__v4df)__b, 1, 5, 1+2, 5+2); |
| 2469 | 2424 | } |
| 2470 | 2425 | |
| ... | ... | @@ -2484,9 +2439,8 @@ _mm256_unpackhi_pd(__m256d __a, __m256d __b) |
| 2484 | 2439 | /// Bits [63:0] are written to bits [127:64] of the return value. \n |
| 2485 | 2440 | /// Bits [191:128] are written to bits [255:192] of the return value. \n |
| 2486 | 2441 | /// \returns A 256-bit vector of [4 x double] containing the interleaved values. |
| 2487 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 2488 | _mm256_unpacklo_pd(__m256d __a, __m256d __b) | |
| 2489 | { | |
| 2442 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2443 | _mm256_unpacklo_pd(__m256d __a, __m256d __b) { | |
| 2490 | 2444 | return __builtin_shufflevector((__v4df)__a, (__v4df)__b, 0, 4, 0+2, 4+2); |
| 2491 | 2445 | } |
| 2492 | 2446 | |
| ... | ... | @@ -2511,9 +2465,8 @@ _mm256_unpacklo_pd(__m256d __a, __m256d __b) |
| 2511 | 2465 | /// Bits [223:192] are written to bits [191:160] of the return value. \n |
| 2512 | 2466 | /// Bits [255:224] are written to bits [255:224] of the return value. |
| 2513 | 2467 | /// \returns A 256-bit vector of [8 x float] containing the interleaved values. |
| 2514 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 2515 | _mm256_unpackhi_ps(__m256 __a, __m256 __b) | |
| 2516 | { | |
| 2468 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2469 | _mm256_unpackhi_ps(__m256 __a, __m256 __b) { | |
| 2517 | 2470 | return __builtin_shufflevector((__v8sf)__a, (__v8sf)__b, 2, 10, 2+1, 10+1, 6, 14, 6+1, 14+1); |
| 2518 | 2471 | } |
| 2519 | 2472 | |
| ... | ... | @@ -2538,9 +2491,8 @@ _mm256_unpackhi_ps(__m256 __a, __m256 __b) |
| 2538 | 2491 | /// Bits [159:128] are written to bits [191:160] of the return value. \n |
| 2539 | 2492 | /// Bits [191:160] are written to bits [255:224] of the return value. |
| 2540 | 2493 | /// \returns A 256-bit vector of [8 x float] containing the interleaved values. |
| 2541 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 2542 | _mm256_unpacklo_ps(__m256 __a, __m256 __b) | |
| 2543 | { | |
| 2494 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2495 | _mm256_unpacklo_ps(__m256 __a, __m256 __b) { | |
| 2544 | 2496 | return __builtin_shufflevector((__v8sf)__a, (__v8sf)__b, 0, 8, 0+1, 8+1, 4, 12, 4+1, 12+1); |
| 2545 | 2497 | } |
| 2546 | 2498 | |
| ... | ... | @@ -2568,9 +2520,8 @@ _mm256_unpacklo_ps(__m256 __a, __m256 __b) |
| 2568 | 2520 | /// \param __b |
| 2569 | 2521 | /// A 128-bit vector of [2 x double]. |
| 2570 | 2522 | /// \returns the ZF flag in the EFLAGS register. |
| 2571 | static __inline int __DEFAULT_FN_ATTRS128 | |
| 2572 | _mm_testz_pd(__m128d __a, __m128d __b) | |
| 2573 | { | |
| 2523 | static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testz_pd(__m128d __a, | |
| 2524 | __m128d __b) { | |
| 2574 | 2525 | return __builtin_ia32_vtestzpd((__v2df)__a, (__v2df)__b); |
| 2575 | 2526 | } |
| 2576 | 2527 | |
| ... | ... | @@ -2597,9 +2548,8 @@ _mm_testz_pd(__m128d __a, __m128d __b) |
| 2597 | 2548 | /// \param __b |
| 2598 | 2549 | /// A 128-bit vector of [2 x double]. |
| 2599 | 2550 | /// \returns the CF flag in the EFLAGS register. |
| 2600 | static __inline int __DEFAULT_FN_ATTRS128 | |
| 2601 | _mm_testc_pd(__m128d __a, __m128d __b) | |
| 2602 | { | |
| 2551 | static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testc_pd(__m128d __a, | |
| 2552 | __m128d __b) { | |
| 2603 | 2553 | return __builtin_ia32_vtestcpd((__v2df)__a, (__v2df)__b); |
| 2604 | 2554 | } |
| 2605 | 2555 | |
| ... | ... | @@ -2627,9 +2577,8 @@ _mm_testc_pd(__m128d __a, __m128d __b) |
| 2627 | 2577 | /// \param __b |
| 2628 | 2578 | /// A 128-bit vector of [2 x double]. |
| 2629 | 2579 | /// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. |
| 2630 | static __inline int __DEFAULT_FN_ATTRS128 | |
| 2631 | _mm_testnzc_pd(__m128d __a, __m128d __b) | |
| 2632 | { | |
| 2580 | static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 2581 | _mm_testnzc_pd(__m128d __a, __m128d __b) { | |
| 2633 | 2582 | return __builtin_ia32_vtestnzcpd((__v2df)__a, (__v2df)__b); |
| 2634 | 2583 | } |
| 2635 | 2584 | |
| ... | ... | @@ -2656,9 +2605,8 @@ _mm_testnzc_pd(__m128d __a, __m128d __b) |
| 2656 | 2605 | /// \param __b |
| 2657 | 2606 | /// A 128-bit vector of [4 x float]. |
| 2658 | 2607 | /// \returns the ZF flag. |
| 2659 | static __inline int __DEFAULT_FN_ATTRS128 | |
| 2660 | _mm_testz_ps(__m128 __a, __m128 __b) | |
| 2661 | { | |
| 2608 | static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testz_ps(__m128 __a, | |
| 2609 | __m128 __b) { | |
| 2662 | 2610 | return __builtin_ia32_vtestzps((__v4sf)__a, (__v4sf)__b); |
| 2663 | 2611 | } |
| 2664 | 2612 | |
| ... | ... | @@ -2685,9 +2633,8 @@ _mm_testz_ps(__m128 __a, __m128 __b) |
| 2685 | 2633 | /// \param __b |
| 2686 | 2634 | /// A 128-bit vector of [4 x float]. |
| 2687 | 2635 | /// \returns the CF flag. |
| 2688 | static __inline int __DEFAULT_FN_ATTRS128 | |
| 2689 | _mm_testc_ps(__m128 __a, __m128 __b) | |
| 2690 | { | |
| 2636 | static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testc_ps(__m128 __a, | |
| 2637 | __m128 __b) { | |
| 2691 | 2638 | return __builtin_ia32_vtestcps((__v4sf)__a, (__v4sf)__b); |
| 2692 | 2639 | } |
| 2693 | 2640 | |
| ... | ... | @@ -2715,9 +2662,8 @@ _mm_testc_ps(__m128 __a, __m128 __b) |
| 2715 | 2662 | /// \param __b |
| 2716 | 2663 | /// A 128-bit vector of [4 x float]. |
| 2717 | 2664 | /// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. |
| 2718 | static __inline int __DEFAULT_FN_ATTRS128 | |
| 2719 | _mm_testnzc_ps(__m128 __a, __m128 __b) | |
| 2720 | { | |
| 2665 | static __inline int __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_testnzc_ps(__m128 __a, | |
| 2666 | __m128 __b) { | |
| 2721 | 2667 | return __builtin_ia32_vtestnzcps((__v4sf)__a, (__v4sf)__b); |
| 2722 | 2668 | } |
| 2723 | 2669 | |
| ... | ... | @@ -2744,9 +2690,8 @@ _mm_testnzc_ps(__m128 __a, __m128 __b) |
| 2744 | 2690 | /// \param __b |
| 2745 | 2691 | /// A 256-bit vector of [4 x double]. |
| 2746 | 2692 | /// \returns the ZF flag. |
| 2747 | static __inline int __DEFAULT_FN_ATTRS | |
| 2748 | _mm256_testz_pd(__m256d __a, __m256d __b) | |
| 2749 | { | |
| 2693 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testz_pd(__m256d __a, | |
| 2694 | __m256d __b) { | |
| 2750 | 2695 | return __builtin_ia32_vtestzpd256((__v4df)__a, (__v4df)__b); |
| 2751 | 2696 | } |
| 2752 | 2697 | |
| ... | ... | @@ -2773,9 +2718,8 @@ _mm256_testz_pd(__m256d __a, __m256d __b) |
| 2773 | 2718 | /// \param __b |
| 2774 | 2719 | /// A 256-bit vector of [4 x double]. |
| 2775 | 2720 | /// \returns the CF flag. |
| 2776 | static __inline int __DEFAULT_FN_ATTRS | |
| 2777 | _mm256_testc_pd(__m256d __a, __m256d __b) | |
| 2778 | { | |
| 2721 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testc_pd(__m256d __a, | |
| 2722 | __m256d __b) { | |
| 2779 | 2723 | return __builtin_ia32_vtestcpd256((__v4df)__a, (__v4df)__b); |
| 2780 | 2724 | } |
| 2781 | 2725 | |
| ... | ... | @@ -2803,9 +2747,8 @@ _mm256_testc_pd(__m256d __a, __m256d __b) |
| 2803 | 2747 | /// \param __b |
| 2804 | 2748 | /// A 256-bit vector of [4 x double]. |
| 2805 | 2749 | /// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. |
| 2806 | static __inline int __DEFAULT_FN_ATTRS | |
| 2807 | _mm256_testnzc_pd(__m256d __a, __m256d __b) | |
| 2808 | { | |
| 2750 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2751 | _mm256_testnzc_pd(__m256d __a, __m256d __b) { | |
| 2809 | 2752 | return __builtin_ia32_vtestnzcpd256((__v4df)__a, (__v4df)__b); |
| 2810 | 2753 | } |
| 2811 | 2754 | |
| ... | ... | @@ -2832,9 +2775,8 @@ _mm256_testnzc_pd(__m256d __a, __m256d __b) |
| 2832 | 2775 | /// \param __b |
| 2833 | 2776 | /// A 256-bit vector of [8 x float]. |
| 2834 | 2777 | /// \returns the ZF flag. |
| 2835 | static __inline int __DEFAULT_FN_ATTRS | |
| 2836 | _mm256_testz_ps(__m256 __a, __m256 __b) | |
| 2837 | { | |
| 2778 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testz_ps(__m256 __a, | |
| 2779 | __m256 __b) { | |
| 2838 | 2780 | return __builtin_ia32_vtestzps256((__v8sf)__a, (__v8sf)__b); |
| 2839 | 2781 | } |
| 2840 | 2782 | |
| ... | ... | @@ -2861,9 +2803,8 @@ _mm256_testz_ps(__m256 __a, __m256 __b) |
| 2861 | 2803 | /// \param __b |
| 2862 | 2804 | /// A 256-bit vector of [8 x float]. |
| 2863 | 2805 | /// \returns the CF flag. |
| 2864 | static __inline int __DEFAULT_FN_ATTRS | |
| 2865 | _mm256_testc_ps(__m256 __a, __m256 __b) | |
| 2866 | { | |
| 2806 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testc_ps(__m256 __a, | |
| 2807 | __m256 __b) { | |
| 2867 | 2808 | return __builtin_ia32_vtestcps256((__v8sf)__a, (__v8sf)__b); |
| 2868 | 2809 | } |
| 2869 | 2810 | |
| ... | ... | @@ -2891,9 +2832,8 @@ _mm256_testc_ps(__m256 __a, __m256 __b) |
| 2891 | 2832 | /// \param __b |
| 2892 | 2833 | /// A 256-bit vector of [8 x float]. |
| 2893 | 2834 | /// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. |
| 2894 | static __inline int __DEFAULT_FN_ATTRS | |
| 2895 | _mm256_testnzc_ps(__m256 __a, __m256 __b) | |
| 2896 | { | |
| 2835 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_testnzc_ps(__m256 __a, | |
| 2836 | __m256 __b) { | |
| 2897 | 2837 | return __builtin_ia32_vtestnzcps256((__v8sf)__a, (__v8sf)__b); |
| 2898 | 2838 | } |
| 2899 | 2839 | |
| ... | ... | @@ -2917,9 +2857,8 @@ _mm256_testnzc_ps(__m256 __a, __m256 __b) |
| 2917 | 2857 | /// \param __b |
| 2918 | 2858 | /// A 256-bit integer vector. |
| 2919 | 2859 | /// \returns the ZF flag. |
| 2920 | static __inline int __DEFAULT_FN_ATTRS | |
| 2921 | _mm256_testz_si256(__m256i __a, __m256i __b) | |
| 2922 | { | |
| 2860 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2861 | _mm256_testz_si256(__m256i __a, __m256i __b) { | |
| 2923 | 2862 | return __builtin_ia32_ptestz256((__v4di)__a, (__v4di)__b); |
| 2924 | 2863 | } |
| 2925 | 2864 | |
| ... | ... | @@ -2943,9 +2882,8 @@ _mm256_testz_si256(__m256i __a, __m256i __b) |
| 2943 | 2882 | /// \param __b |
| 2944 | 2883 | /// A 256-bit integer vector. |
| 2945 | 2884 | /// \returns the CF flag. |
| 2946 | static __inline int __DEFAULT_FN_ATTRS | |
| 2947 | _mm256_testc_si256(__m256i __a, __m256i __b) | |
| 2948 | { | |
| 2885 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2886 | _mm256_testc_si256(__m256i __a, __m256i __b) { | |
| 2949 | 2887 | return __builtin_ia32_ptestc256((__v4di)__a, (__v4di)__b); |
| 2950 | 2888 | } |
| 2951 | 2889 | |
| ... | ... | @@ -2970,9 +2908,8 @@ _mm256_testc_si256(__m256i __a, __m256i __b) |
| 2970 | 2908 | /// \param __b |
| 2971 | 2909 | /// A 256-bit integer vector. |
| 2972 | 2910 | /// \returns 1 if both the ZF and CF flags are set to 0, otherwise returns 0. |
| 2973 | static __inline int __DEFAULT_FN_ATTRS | |
| 2974 | _mm256_testnzc_si256(__m256i __a, __m256i __b) | |
| 2975 | { | |
| 2911 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2912 | _mm256_testnzc_si256(__m256i __a, __m256i __b) { | |
| 2976 | 2913 | return __builtin_ia32_ptestnzc256((__v4di)__a, (__v4di)__b); |
| 2977 | 2914 | } |
| 2978 | 2915 | |
| ... | ... | @@ -2989,9 +2926,8 @@ _mm256_testnzc_si256(__m256i __a, __m256i __b) |
| 2989 | 2926 | /// A 256-bit vector of [4 x double] containing the double-precision |
| 2990 | 2927 | /// floating point values with sign bits to be extracted. |
| 2991 | 2928 | /// \returns The sign bits from the operand, written to bits [3:0]. |
| 2992 | static __inline int __DEFAULT_FN_ATTRS | |
| 2993 | _mm256_movemask_pd(__m256d __a) | |
| 2994 | { | |
| 2929 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2930 | _mm256_movemask_pd(__m256d __a) { | |
| 2995 | 2931 | return __builtin_ia32_movmskpd256((__v4df)__a); |
| 2996 | 2932 | } |
| 2997 | 2933 | |
| ... | ... | @@ -3007,9 +2943,8 @@ _mm256_movemask_pd(__m256d __a) |
| 3007 | 2943 | /// A 256-bit vector of [8 x float] containing the single-precision floating |
| 3008 | 2944 | /// point values with sign bits to be extracted. |
| 3009 | 2945 | /// \returns The sign bits from the operand, written to bits [7:0]. |
| 3010 | static __inline int __DEFAULT_FN_ATTRS | |
| 3011 | _mm256_movemask_ps(__m256 __a) | |
| 3012 | { | |
| 2946 | static __inline int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2947 | _mm256_movemask_ps(__m256 __a) { | |
| 3013 | 2948 | return __builtin_ia32_movmskps256((__v8sf)__a); |
| 3014 | 2949 | } |
| 3015 | 2950 | |
| ... | ... | @@ -3666,9 +3601,7 @@ _mm256_undefined_pd(void) |
| 3666 | 3601 | /// This intrinsic has no corresponding instruction. |
| 3667 | 3602 | /// |
| 3668 | 3603 | /// \returns A 256-bit vector of [8 x float] containing undefined values. |
| 3669 | static __inline__ __m256 __DEFAULT_FN_ATTRS | |
| 3670 | _mm256_undefined_ps(void) | |
| 3671 | { | |
| 3604 | static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_undefined_ps(void) { | |
| 3672 | 3605 | return (__m256)__builtin_ia32_undef256(); |
| 3673 | 3606 | } |
| 3674 | 3607 | |
| ... | ... | @@ -3777,7 +3710,7 @@ _mm256_set_ps(float __a, float __b, float __c, float __d, |
| 3777 | 3710 | /// \param __i7 |
| 3778 | 3711 | /// A 32-bit integral value used to initialize bits [31:0] of the result. |
| 3779 | 3712 | /// \returns An initialized 256-bit integer vector. |
| 3780 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 3713 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3781 | 3714 | _mm256_set_epi32(int __i0, int __i1, int __i2, int __i3, |
| 3782 | 3715 | int __i4, int __i5, int __i6, int __i7) |
| 3783 | 3716 | { |
| ... | ... | @@ -3825,7 +3758,7 @@ _mm256_set_epi32(int __i0, int __i1, int __i2, int __i3, |
| 3825 | 3758 | /// \param __w00 |
| 3826 | 3759 | /// A 16-bit integral value used to initialize bits [15:0] of the result. |
| 3827 | 3760 | /// \returns An initialized 256-bit integer vector. |
| 3828 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 3761 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3829 | 3762 | _mm256_set_epi16(short __w15, short __w14, short __w13, short __w12, |
| 3830 | 3763 | short __w11, short __w10, short __w09, short __w08, |
| 3831 | 3764 | short __w07, short __w06, short __w05, short __w04, |
| ... | ... | @@ -3908,7 +3841,7 @@ _mm256_set_epi16(short __w15, short __w14, short __w13, short __w12, |
| 3908 | 3841 | /// \param __b00 |
| 3909 | 3842 | /// An 8-bit integral value used to initialize bits [7:0] of the result. |
| 3910 | 3843 | /// \returns An initialized 256-bit integer vector. |
| 3911 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 3844 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3912 | 3845 | _mm256_set_epi8(char __b31, char __b30, char __b29, char __b28, |
| 3913 | 3846 | char __b27, char __b26, char __b25, char __b24, |
| 3914 | 3847 | char __b23, char __b22, char __b21, char __b20, |
| ... | ... | @@ -3943,7 +3876,7 @@ _mm256_set_epi8(char __b31, char __b30, char __b29, char __b28, |
| 3943 | 3876 | /// \param __d |
| 3944 | 3877 | /// A 64-bit integral value used to initialize bits [63:0] of the result. |
| 3945 | 3878 | /// \returns An initialized 256-bit integer vector. |
| 3946 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 3879 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3947 | 3880 | _mm256_set_epi64x(long long __a, long long __b, long long __c, long long __d) |
| 3948 | 3881 | { |
| 3949 | 3882 | return __extension__ (__m256i)(__v4di){ __d, __c, __b, __a }; |
| ... | ... | @@ -4044,7 +3977,7 @@ _mm256_setr_ps(float __a, float __b, float __c, float __d, |
| 4044 | 3977 | /// \param __i7 |
| 4045 | 3978 | /// A 32-bit integral value used to initialize bits [255:224] of the result. |
| 4046 | 3979 | /// \returns An initialized 256-bit integer vector. |
| 4047 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 3980 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4048 | 3981 | _mm256_setr_epi32(int __i0, int __i1, int __i2, int __i3, |
| 4049 | 3982 | int __i4, int __i5, int __i6, int __i7) |
| 4050 | 3983 | { |
| ... | ... | @@ -4092,7 +4025,7 @@ _mm256_setr_epi32(int __i0, int __i1, int __i2, int __i3, |
| 4092 | 4025 | /// \param __w00 |
| 4093 | 4026 | /// A 16-bit integral value used to initialize bits [255:240] of the result. |
| 4094 | 4027 | /// \returns An initialized 256-bit integer vector. |
| 4095 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4028 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4096 | 4029 | _mm256_setr_epi16(short __w15, short __w14, short __w13, short __w12, |
| 4097 | 4030 | short __w11, short __w10, short __w09, short __w08, |
| 4098 | 4031 | short __w07, short __w06, short __w05, short __w04, |
| ... | ... | @@ -4177,7 +4110,7 @@ _mm256_setr_epi16(short __w15, short __w14, short __w13, short __w12, |
| 4177 | 4110 | /// \param __b00 |
| 4178 | 4111 | /// An 8-bit integral value used to initialize bits [255:248] of the result. |
| 4179 | 4112 | /// \returns An initialized 256-bit integer vector. |
| 4180 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4113 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4181 | 4114 | _mm256_setr_epi8(char __b31, char __b30, char __b29, char __b28, |
| 4182 | 4115 | char __b27, char __b26, char __b25, char __b24, |
| 4183 | 4116 | char __b23, char __b22, char __b21, char __b20, |
| ... | ... | @@ -4210,7 +4143,7 @@ _mm256_setr_epi8(char __b31, char __b30, char __b29, char __b28, |
| 4210 | 4143 | /// \param __d |
| 4211 | 4144 | /// A 64-bit integral value used to initialize bits [255:192] of the result. |
| 4212 | 4145 | /// \returns An initialized 256-bit integer vector. |
| 4213 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4146 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4214 | 4147 | _mm256_setr_epi64x(long long __a, long long __b, long long __c, long long __d) |
| 4215 | 4148 | { |
| 4216 | 4149 | return _mm256_set_epi64x(__d, __c, __b, __a); |
| ... | ... | @@ -4267,7 +4200,7 @@ _mm256_set1_ps(float __w) |
| 4267 | 4200 | /// A 32-bit integral value used to initialize each vector element of the |
| 4268 | 4201 | /// result. |
| 4269 | 4202 | /// \returns An initialized 256-bit integer vector of [8 x i32]. |
| 4270 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4203 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4271 | 4204 | _mm256_set1_epi32(int __i) |
| 4272 | 4205 | { |
| 4273 | 4206 | return _mm256_set_epi32(__i, __i, __i, __i, __i, __i, __i, __i); |
| ... | ... | @@ -4285,7 +4218,7 @@ _mm256_set1_epi32(int __i) |
| 4285 | 4218 | /// A 16-bit integral value used to initialize each vector element of the |
| 4286 | 4219 | /// result. |
| 4287 | 4220 | /// \returns An initialized 256-bit integer vector of [16 x i16]. |
| 4288 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4221 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4289 | 4222 | _mm256_set1_epi16(short __w) |
| 4290 | 4223 | { |
| 4291 | 4224 | return _mm256_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w, |
| ... | ... | @@ -4303,7 +4236,7 @@ _mm256_set1_epi16(short __w) |
| 4303 | 4236 | /// An 8-bit integral value used to initialize each vector element of the |
| 4304 | 4237 | /// result. |
| 4305 | 4238 | /// \returns An initialized 256-bit integer vector of [32 x i8]. |
| 4306 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4239 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4307 | 4240 | _mm256_set1_epi8(char __b) |
| 4308 | 4241 | { |
| 4309 | 4242 | return _mm256_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, |
| ... | ... | @@ -4324,7 +4257,7 @@ _mm256_set1_epi8(char __b) |
| 4324 | 4257 | /// A 64-bit integral value used to initialize each vector element of the |
| 4325 | 4258 | /// result. |
| 4326 | 4259 | /// \returns An initialized 256-bit integer vector of [4 x i64]. |
| 4327 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4260 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4328 | 4261 | _mm256_set1_epi64x(long long __q) |
| 4329 | 4262 | { |
| 4330 | 4263 | return _mm256_set_epi64x(__q, __q, __q, __q); |
| ... | ... | @@ -4379,7 +4312,7 @@ _mm256_setzero_si256(void) { |
| 4379 | 4312 | /// A 256-bit floating-point vector of [4 x double]. |
| 4380 | 4313 | /// \returns A 256-bit floating-point vector of [8 x float] containing the same |
| 4381 | 4314 | /// bitwise pattern as the parameter. |
| 4382 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 4315 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4383 | 4316 | _mm256_castpd_ps(__m256d __a) |
| 4384 | 4317 | { |
| 4385 | 4318 | return (__m256)__a; |
| ... | ... | @@ -4396,7 +4329,7 @@ _mm256_castpd_ps(__m256d __a) |
| 4396 | 4329 | /// A 256-bit floating-point vector of [4 x double]. |
| 4397 | 4330 | /// \returns A 256-bit integer vector containing the same bitwise pattern as the |
| 4398 | 4331 | /// parameter. |
| 4399 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4332 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4400 | 4333 | _mm256_castpd_si256(__m256d __a) |
| 4401 | 4334 | { |
| 4402 | 4335 | return (__m256i)__a; |
| ... | ... | @@ -4413,7 +4346,7 @@ _mm256_castpd_si256(__m256d __a) |
| 4413 | 4346 | /// A 256-bit floating-point vector of [8 x float]. |
| 4414 | 4347 | /// \returns A 256-bit floating-point vector of [4 x double] containing the same |
| 4415 | 4348 | /// bitwise pattern as the parameter. |
| 4416 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 4349 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4417 | 4350 | _mm256_castps_pd(__m256 __a) |
| 4418 | 4351 | { |
| 4419 | 4352 | return (__m256d)__a; |
| ... | ... | @@ -4430,7 +4363,7 @@ _mm256_castps_pd(__m256 __a) |
| 4430 | 4363 | /// A 256-bit floating-point vector of [8 x float]. |
| 4431 | 4364 | /// \returns A 256-bit integer vector containing the same bitwise pattern as the |
| 4432 | 4365 | /// parameter. |
| 4433 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4366 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4434 | 4367 | _mm256_castps_si256(__m256 __a) |
| 4435 | 4368 | { |
| 4436 | 4369 | return (__m256i)__a; |
| ... | ... | @@ -4447,7 +4380,7 @@ _mm256_castps_si256(__m256 __a) |
| 4447 | 4380 | /// A 256-bit integer vector. |
| 4448 | 4381 | /// \returns A 256-bit floating-point vector of [8 x float] containing the same |
| 4449 | 4382 | /// bitwise pattern as the parameter. |
| 4450 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 4383 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4451 | 4384 | _mm256_castsi256_ps(__m256i __a) |
| 4452 | 4385 | { |
| 4453 | 4386 | return (__m256)__a; |
| ... | ... | @@ -4464,7 +4397,7 @@ _mm256_castsi256_ps(__m256i __a) |
| 4464 | 4397 | /// A 256-bit integer vector. |
| 4465 | 4398 | /// \returns A 256-bit floating-point vector of [4 x double] containing the same |
| 4466 | 4399 | /// bitwise pattern as the parameter. |
| 4467 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 4400 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4468 | 4401 | _mm256_castsi256_pd(__m256i __a) |
| 4469 | 4402 | { |
| 4470 | 4403 | return (__m256d)__a; |
| ... | ... | @@ -4481,7 +4414,7 @@ _mm256_castsi256_pd(__m256i __a) |
| 4481 | 4414 | /// A 256-bit floating-point vector of [4 x double]. |
| 4482 | 4415 | /// \returns A 128-bit floating-point vector of [2 x double] containing the |
| 4483 | 4416 | /// lower 128 bits of the parameter. |
| 4484 | static __inline __m128d __DEFAULT_FN_ATTRS | |
| 4417 | static __inline __m128d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4485 | 4418 | _mm256_castpd256_pd128(__m256d __a) |
| 4486 | 4419 | { |
| 4487 | 4420 | return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 1); |
| ... | ... | @@ -4498,7 +4431,7 @@ _mm256_castpd256_pd128(__m256d __a) |
| 4498 | 4431 | /// A 256-bit floating-point vector of [8 x float]. |
| 4499 | 4432 | /// \returns A 128-bit floating-point vector of [4 x float] containing the |
| 4500 | 4433 | /// lower 128 bits of the parameter. |
| 4501 | static __inline __m128 __DEFAULT_FN_ATTRS | |
| 4434 | static __inline __m128 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4502 | 4435 | _mm256_castps256_ps128(__m256 __a) |
| 4503 | 4436 | { |
| 4504 | 4437 | return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 1, 2, 3); |
| ... | ... | @@ -4514,7 +4447,7 @@ _mm256_castps256_ps128(__m256 __a) |
| 4514 | 4447 | /// A 256-bit integer vector. |
| 4515 | 4448 | /// \returns A 128-bit integer vector containing the lower 128 bits of the |
| 4516 | 4449 | /// parameter. |
| 4517 | static __inline __m128i __DEFAULT_FN_ATTRS | |
| 4450 | static __inline __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4518 | 4451 | _mm256_castsi256_si128(__m256i __a) |
| 4519 | 4452 | { |
| 4520 | 4453 | return __builtin_shufflevector((__v4di)__a, (__v4di)__a, 0, 1); |
| ... | ... | @@ -4598,9 +4531,8 @@ _mm256_castsi128_si256(__m128i __a) |
| 4598 | 4531 | /// A 128-bit vector of [2 x double]. |
| 4599 | 4532 | /// \returns A 256-bit floating-point vector of [4 x double]. The lower 128 bits |
| 4600 | 4533 | /// contain the value of the parameter. The upper 128 bits are set to zero. |
| 4601 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 4602 | _mm256_zextpd128_pd256(__m128d __a) | |
| 4603 | { | |
| 4534 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4535 | _mm256_zextpd128_pd256(__m128d __a) { | |
| 4604 | 4536 | return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3); |
| 4605 | 4537 | } |
| 4606 | 4538 | |
| ... | ... | @@ -4616,9 +4548,8 @@ _mm256_zextpd128_pd256(__m128d __a) |
| 4616 | 4548 | /// A 128-bit vector of [4 x float]. |
| 4617 | 4549 | /// \returns A 256-bit floating-point vector of [8 x float]. The lower 128 bits |
| 4618 | 4550 | /// contain the value of the parameter. The upper 128 bits are set to zero. |
| 4619 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 4620 | _mm256_zextps128_ps256(__m128 __a) | |
| 4621 | { | |
| 4551 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4552 | _mm256_zextps128_ps256(__m128 __a) { | |
| 4622 | 4553 | return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7); |
| 4623 | 4554 | } |
| 4624 | 4555 | |
| ... | ... | @@ -4634,9 +4565,8 @@ _mm256_zextps128_ps256(__m128 __a) |
| 4634 | 4565 | /// A 128-bit integer vector. |
| 4635 | 4566 | /// \returns A 256-bit integer vector. The lower 128 bits contain the value of |
| 4636 | 4567 | /// the parameter. The upper 128 bits are set to zero. |
| 4637 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4638 | _mm256_zextsi128_si256(__m128i __a) | |
| 4639 | { | |
| 4568 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4569 | _mm256_zextsi128_si256(__m128i __a) { | |
| 4640 | 4570 | return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3); |
| 4641 | 4571 | } |
| 4642 | 4572 | |
| ... | ... | @@ -4851,9 +4781,8 @@ _mm256_zextsi128_si256(__m128i __a) |
| 4851 | 4781 | /// 128 bits of the result. |
| 4852 | 4782 | /// \returns A 256-bit floating-point vector of [8 x float] containing the |
| 4853 | 4783 | /// concatenated result. |
| 4854 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 4855 | _mm256_set_m128 (__m128 __hi, __m128 __lo) | |
| 4856 | { | |
| 4784 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4785 | _mm256_set_m128(__m128 __hi, __m128 __lo) { | |
| 4857 | 4786 | return (__m256) __builtin_shufflevector((__v4sf)__lo, (__v4sf)__hi, 0, 1, 2, 3, 4, 5, 6, 7); |
| 4858 | 4787 | } |
| 4859 | 4788 | |
| ... | ... | @@ -4872,9 +4801,8 @@ _mm256_set_m128 (__m128 __hi, __m128 __lo) |
| 4872 | 4801 | /// 128 bits of the result. |
| 4873 | 4802 | /// \returns A 256-bit floating-point vector of [4 x double] containing the |
| 4874 | 4803 | /// concatenated result. |
| 4875 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 4876 | _mm256_set_m128d (__m128d __hi, __m128d __lo) | |
| 4877 | { | |
| 4804 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4805 | _mm256_set_m128d(__m128d __hi, __m128d __lo) { | |
| 4878 | 4806 | return (__m256d) __builtin_shufflevector((__v2df)__lo, (__v2df)__hi, 0, 1, 2, 3); |
| 4879 | 4807 | } |
| 4880 | 4808 | |
| ... | ... | @@ -4892,9 +4820,8 @@ _mm256_set_m128d (__m128d __hi, __m128d __lo) |
| 4892 | 4820 | /// A 128-bit integer vector to be copied to the lower 128 bits of the |
| 4893 | 4821 | /// result. |
| 4894 | 4822 | /// \returns A 256-bit integer vector containing the concatenated result. |
| 4895 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4896 | _mm256_set_m128i (__m128i __hi, __m128i __lo) | |
| 4897 | { | |
| 4823 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4824 | _mm256_set_m128i(__m128i __hi, __m128i __lo) { | |
| 4898 | 4825 | return (__m256i) __builtin_shufflevector((__v2di)__lo, (__v2di)__hi, 0, 1, 2, 3); |
| 4899 | 4826 | } |
| 4900 | 4827 | |
| ... | ... | @@ -4915,9 +4842,8 @@ _mm256_set_m128i (__m128i __hi, __m128i __lo) |
| 4915 | 4842 | /// 128 bits of the result. |
| 4916 | 4843 | /// \returns A 256-bit floating-point vector of [8 x float] containing the |
| 4917 | 4844 | /// concatenated result. |
| 4918 | static __inline __m256 __DEFAULT_FN_ATTRS | |
| 4919 | _mm256_setr_m128 (__m128 __lo, __m128 __hi) | |
| 4920 | { | |
| 4845 | static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4846 | _mm256_setr_m128(__m128 __lo, __m128 __hi) { | |
| 4921 | 4847 | return _mm256_set_m128(__hi, __lo); |
| 4922 | 4848 | } |
| 4923 | 4849 | |
| ... | ... | @@ -4938,9 +4864,8 @@ _mm256_setr_m128 (__m128 __lo, __m128 __hi) |
| 4938 | 4864 | /// 128 bits of the result. |
| 4939 | 4865 | /// \returns A 256-bit floating-point vector of [4 x double] containing the |
| 4940 | 4866 | /// concatenated result. |
| 4941 | static __inline __m256d __DEFAULT_FN_ATTRS | |
| 4942 | _mm256_setr_m128d (__m128d __lo, __m128d __hi) | |
| 4943 | { | |
| 4867 | static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4868 | _mm256_setr_m128d(__m128d __lo, __m128d __hi) { | |
| 4944 | 4869 | return (__m256d)_mm256_set_m128d(__hi, __lo); |
| 4945 | 4870 | } |
| 4946 | 4871 | |
| ... | ... | @@ -4959,9 +4884,8 @@ _mm256_setr_m128d (__m128d __lo, __m128d __hi) |
| 4959 | 4884 | /// A 128-bit integer vector to be copied to the upper 128 bits of the |
| 4960 | 4885 | /// result. |
| 4961 | 4886 | /// \returns A 256-bit integer vector containing the concatenated result. |
| 4962 | static __inline __m256i __DEFAULT_FN_ATTRS | |
| 4963 | _mm256_setr_m128i (__m128i __lo, __m128i __hi) | |
| 4964 | { | |
| 4887 | static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4888 | _mm256_setr_m128i(__m128i __lo, __m128i __hi) { | |
| 4965 | 4889 | return (__m256i)_mm256_set_m128i(__hi, __lo); |
| 4966 | 4890 | } |
| 4967 | 4891 |
lib/include/avxvnniint16intrin.h+118-99| ... | ... | @@ -16,9 +16,10 @@ |
| 16 | 16 | #define __AVXVNNIINT16INTRIN_H |
| 17 | 17 | |
| 18 | 18 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with |
| 19 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate | |
| 20 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 21 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. | |
| 19 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 | |
| 20 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 21 | /// corresponding 32-bit integer in \a __W, and store the packed 32-bit | |
| 22 | /// results in \a dst. | |
| 22 | 23 | /// |
| 23 | 24 | /// \headerfile <immintrin.h> |
| 24 | 25 | /// |
| ... | ... | @@ -40,19 +41,21 @@ |
| 40 | 41 | /// \code{.operation} |
| 41 | 42 | /// FOR j := 0 to 3 |
| 42 | 43 | /// 	tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) |
| 43 | /// 	tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 44 | /// 	tmp2.dword := | |
| 45 | ///		 SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 44 | 46 | /// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 |
| 45 | 47 | /// ENDFOR |
| 46 | 48 | /// dst[MAX:128] := 0 |
| 47 | 49 | /// \endcode |
| 48 | 50 | #define _mm_dpwsud_epi32(__W, __A, __B) \ |
| 49 | ((__m128i)__builtin_ia32_vpdpwsud128((__v4si)(__W), (__v4si)(__A), \ | |
| 50 | (__v4si)(__B))) | |
| 51 | ((__m128i)__builtin_ia32_vpdpwsud128((__v4si)(__W), (__v8hi)(__A), \ | |
| 52 | (__v8hu)(__B))) | |
| 51 | 53 | |
| 52 | 54 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with |
| 53 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate | |
| 54 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 55 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. | |
| 55 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 | |
| 56 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 57 | /// corresponding 32-bit integer in \a __W, and store the packed 32-bit | |
| 58 | /// results in \a dst. | |
| 56 | 59 | /// |
| 57 | 60 | /// \headerfile <immintrin.h> |
| 58 | 61 | /// |
| ... | ... | @@ -74,20 +77,21 @@ |
| 74 | 77 | /// \code{.operation} |
| 75 | 78 | /// FOR j := 0 to 7 |
| 76 | 79 | /// 	tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) |
| 77 | /// 	tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 78 | /// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 | |
| 80 | /// 	tmp2.dword := | |
| 81 | ///		 SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 82 | ///		dst.dword[j] := __W.dword[j] + tmp1 + tmp2 | |
| 79 | 83 | /// ENDFOR |
| 80 | 84 | /// dst[MAX:256] := 0 |
| 81 | 85 | /// \endcode |
| 82 | 86 | #define _mm256_dpwsud_epi32(__W, __A, __B) \ |
| 83 | ((__m256i)__builtin_ia32_vpdpwsud256((__v8si)(__W), (__v8si)(__A), \ | |
| 84 | (__v8si)(__B))) | |
| 87 | ((__m256i)__builtin_ia32_vpdpwsud256((__v8si)(__W), (__v16hi)(__A), \ | |
| 88 | (__v16hu)(__B))) | |
| 85 | 89 | |
| 86 | 90 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with |
| 87 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate | |
| 88 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 89 | /// 32-bit integer in \a __W with signed saturation, and store the packed | |
| 90 | /// 32-bit results in \a dst. | |
| 91 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 | |
| 92 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 93 | /// corresponding 32-bit integer in \a __W with signed saturation, and store | |
| 94 | /// the packed 32-bit results in \a dst. | |
| 91 | 95 | /// |
| 92 | 96 | /// \headerfile <immintrin.h> |
| 93 | 97 | /// |
| ... | ... | @@ -109,20 +113,22 @@ |
| 109 | 113 | /// \code{.operation} |
| 110 | 114 | /// FOR j := 0 to 3 |
| 111 | 115 | /// 	tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) |
| 112 | /// 	tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 116 | /// 	tmp2.dword := | |
| 117 | ///		 SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 113 | 118 | /// 	dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) |
| 114 | 119 | /// ENDFOR |
| 115 | 120 | /// dst[MAX:128] := 0 |
| 116 | 121 | /// \endcode |
| 122 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with | |
| 117 | 123 | #define _mm_dpwsuds_epi32(__W, __A, __B) \ |
| 118 | ((__m128i)__builtin_ia32_vpdpwsuds128((__v4si)(__W), (__v4si)(__A), \ | |
| 119 | (__v4si)(__B))) | |
| 124 | ((__m128i)__builtin_ia32_vpdpwsuds128((__v4si)(__W), (__v8hi)(__A), \ | |
| 125 | (__v8hu)(__B))) | |
| 120 | 126 | |
| 121 | 127 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with |
| 122 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate | |
| 123 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 124 | /// 32-bit integer in \a __W with signed saturation, and store the packed | |
| 125 | /// 32-bit results in \a dst. | |
| 128 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 | |
| 129 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 130 | /// corresponding 32-bit integer in \a __W with signed saturation, and store | |
| 131 | /// the packed 32-bit results in \a dst. | |
| 126 | 132 | /// |
| 127 | 133 | /// \headerfile <immintrin.h> |
| 128 | 134 | /// |
| ... | ... | @@ -144,19 +150,21 @@ |
| 144 | 150 | /// \code{.operation} |
| 145 | 151 | /// FOR j := 0 to 7 |
| 146 | 152 | /// 	tmp1.dword := SignExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) |
| 147 | /// 	tmp2.dword := SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 153 | /// 	tmp2.dword := | |
| 154 | ///		 SignExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 148 | 155 | /// 	dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) |
| 149 | 156 | /// ENDFOR |
| 150 | 157 | /// dst[MAX:256] := 0 |
| 151 | 158 | /// \endcode |
| 152 | 159 | #define _mm256_dpwsuds_epi32(__W, __A, __B) \ |
| 153 | ((__m256i)__builtin_ia32_vpdpwsuds256((__v8si)(__W), (__v8si)(__A), \ | |
| 154 | (__v8si)(__B))) | |
| 160 | ((__m256i)__builtin_ia32_vpdpwsuds256((__v8si)(__W), (__v16hi)(__A), \ | |
| 161 | (__v16hu)(__B))) | |
| 155 | 162 | |
| 156 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with | |
| 157 | /// corresponding signed 16-bit integers in \a __B, producing 2 intermediate | |
| 158 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 159 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. | |
| 163 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A | |
| 164 | /// with corresponding signed 16-bit integers in \a __B, producing 2 | |
| 165 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 166 | /// corresponding 32-bit integer in \a __W, and store the packed 32-bit | |
| 167 | /// results in \a dst. | |
| 160 | 168 | /// |
| 161 | 169 | /// \headerfile <immintrin.h> |
| 162 | 170 | /// |
| ... | ... | @@ -178,19 +186,21 @@ |
| 178 | 186 | /// \code{.operation} |
| 179 | 187 | /// FOR j := 0 to 3 |
| 180 | 188 | /// 	tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) |
| 181 | /// 	tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) | |
| 189 | /// 	tmp2.dword := | |
| 190 | /// 	 ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) | |
| 182 | 191 | /// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 |
| 183 | 192 | /// ENDFOR |
| 184 | 193 | /// dst[MAX:128] := 0 |
| 185 | 194 | /// \endcode |
| 186 | 195 | #define _mm_dpwusd_epi32(__W, __A, __B) \ |
| 187 | ((__m128i)__builtin_ia32_vpdpwusd128((__v4si)(__W), (__v4si)(__A), \ | |
| 188 | (__v4si)(__B))) | |
| 196 | ((__m128i)__builtin_ia32_vpdpwusd128((__v4si)(__W), (__v8hu)(__A), \ | |
| 197 | (__v8hi)(__B))) | |
| 189 | 198 | |
| 190 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with | |
| 191 | /// corresponding signed 16-bit integers in \a __B, producing 2 intermediate | |
| 192 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 193 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. | |
| 199 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A | |
| 200 | /// with corresponding signed 16-bit integers in \a __B, producing 2 | |
| 201 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 202 | /// corresponding 32-bit integer in \a __W, and store the packed 32-bit | |
| 203 | /// results in \a dst. | |
| 194 | 204 | /// |
| 195 | 205 | /// \headerfile <immintrin.h> |
| 196 | 206 | /// |
| ... | ... | @@ -212,20 +222,21 @@ |
| 212 | 222 | /// \code{.operation} |
| 213 | 223 | /// FOR j := 0 to 7 |
| 214 | 224 | /// 	tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) |
| 215 | /// 	tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) | |
| 225 | /// 	tmp2.dword := | |
| 226 | /// 	 ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) | |
| 216 | 227 | /// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 |
| 217 | 228 | /// ENDFOR |
| 218 | 229 | /// dst[MAX:256] := 0 |
| 219 | 230 | /// \endcode |
| 220 | 231 | #define _mm256_dpwusd_epi32(__W, __A, __B) \ |
| 221 | ((__m256i)__builtin_ia32_vpdpwusd256((__v8si)(__W), (__v8si)(__A), \ | |
| 222 | (__v8si)(__B))) | |
| 232 | ((__m256i)__builtin_ia32_vpdpwusd256((__v8si)(__W), (__v16hu)(__A), \ | |
| 233 | (__v16hi)(__B))) | |
| 223 | 234 | |
| 224 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with | |
| 225 | /// corresponding signed 16-bit integers in \a __B, producing 2 intermediate | |
| 226 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 227 | /// 32-bit integer in \a __W with signed saturation, and store the packed | |
| 228 | /// 32-bit results in \a dst. | |
| 235 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A | |
| 236 | /// with corresponding signed 16-bit integers in \a __B, producing 2 | |
| 237 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 238 | /// corresponding 32-bit integer in \a __W with signed saturation, and | |
| 239 | /// store the packed 32-bit results in \a dst. | |
| 229 | 240 | /// |
| 230 | 241 | /// \headerfile <immintrin.h> |
| 231 | 242 | /// |
| ... | ... | @@ -233,7 +244,7 @@ |
| 233 | 244 | /// __m128i _mm_dpwusds_epi32(__m128i __W, __m128i __A, __m128i __B) |
| 234 | 245 | /// \endcode |
| 235 | 246 | /// |
| 236 | /// This intrinsic corresponds to the \c VPDPWSUDS instruction. | |
| 247 | /// This intrinsic corresponds to the \c VPDPWUSDS instruction. | |
| 237 | 248 | /// |
| 238 | 249 | /// \param __W |
| 239 | 250 | /// A 128-bit vector of [4 x int]. |
| ... | ... | @@ -247,20 +258,21 @@ |
| 247 | 258 | /// \code{.operation} |
| 248 | 259 | /// FOR j := 0 to 3 |
| 249 | 260 | /// 	tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) |
| 250 | /// 	tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) | |
| 261 | /// 	tmp2.dword := | |
| 262 | /// 	 ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) | |
| 251 | 263 | /// 	dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) |
| 252 | 264 | /// ENDFOR |
| 253 | 265 | /// dst[MAX:128] := 0 |
| 254 | 266 | /// \endcode |
| 255 | 267 | #define _mm_dpwusds_epi32(__W, __A, __B) \ |
| 256 | ((__m128i)__builtin_ia32_vpdpwusds128((__v4si)(__W), (__v4si)(__A), \ | |
| 257 | (__v4si)(__B))) | |
| 268 | ((__m128i)__builtin_ia32_vpdpwusds128((__v4si)(__W), (__v8hu)(__A), \ | |
| 269 | (__v8hi)(__B))) | |
| 258 | 270 | |
| 259 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with | |
| 260 | /// corresponding signed 16-bit integers in \a __B, producing 2 intermediate | |
| 261 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 262 | /// 32-bit integer in \a __W with signed saturation, and store the packed | |
| 263 | /// 32-bit results in \a dst. | |
| 271 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A | |
| 272 | /// with corresponding signed 16-bit integers in \a __B, producing 2 | |
| 273 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 274 | /// corresponding 32-bit integer in \a __W with signed saturation, and | |
| 275 | /// store the packed 32-bit results in \a dst. | |
| 264 | 276 | /// |
| 265 | 277 | /// \headerfile <immintrin.h> |
| 266 | 278 | /// |
| ... | ... | @@ -268,7 +280,7 @@ |
| 268 | 280 | /// __m256i _mm256_dpwsuds_epi32(__m256i __W, __m256i __A, __m256i __B) |
| 269 | 281 | /// \endcode |
| 270 | 282 | /// |
| 271 | /// This intrinsic corresponds to the \c VPDPWSUDS instruction. | |
| 283 | /// This intrinsic corresponds to the \c VPDPWUSDS instruction. | |
| 272 | 284 | /// |
| 273 | 285 | /// \param __W |
| 274 | 286 | /// A 256-bit vector of [8 x int]. |
| ... | ... | @@ -282,19 +294,21 @@ |
| 282 | 294 | /// \code{.operation} |
| 283 | 295 | /// FOR j := 0 to 7 |
| 284 | 296 | /// 	tmp1.dword := ZeroExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) |
| 285 | /// 	tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) | |
| 297 | /// 	tmp2.dword := | |
| 298 | /// 	 ZeroExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) | |
| 286 | 299 | /// 	dst.dword[j] := SIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) |
| 287 | 300 | /// ENDFOR |
| 288 | 301 | /// dst[MAX:256] := 0 |
| 289 | 302 | /// \endcode |
| 290 | 303 | #define _mm256_dpwusds_epi32(__W, __A, __B) \ |
| 291 | ((__m256i)__builtin_ia32_vpdpwusds256((__v8si)(__W), (__v8si)(__A), \ | |
| 292 | (__v8si)(__B))) | |
| 304 | ((__m256i)__builtin_ia32_vpdpwusds256((__v8si)(__W), (__v16hu)(__A), \ | |
| 305 | (__v16hi)(__B))) | |
| 293 | 306 | |
| 294 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with | |
| 295 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate | |
| 296 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 297 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. | |
| 307 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A | |
| 308 | /// with corresponding unsigned 16-bit integers in \a __B, producing 2 | |
| 309 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 310 | /// corresponding 32-bit integer in \a __W, and store the packed 32-bit | |
| 311 | /// results in \a dst. | |
| 298 | 312 | /// |
| 299 | 313 | /// \headerfile <immintrin.h> |
| 300 | 314 | /// |
| ... | ... | @@ -305,30 +319,32 @@ |
| 305 | 319 | /// This intrinsic corresponds to the \c VPDPWUUD instruction. |
| 306 | 320 | /// |
| 307 | 321 | /// \param __W |
| 308 | /// A 128-bit vector of [4 x unsigned int]. | |
| 322 | /// A 128-bit vector of [4 x int]. | |
| 309 | 323 | /// \param __A |
| 310 | 324 | /// A 128-bit vector of [8 x unsigned short]. |
| 311 | 325 | /// \param __B |
| 312 | 326 | /// A 128-bit vector of [8 x unsigned short]. |
| 313 | 327 | /// \returns |
| 314 | /// A 128-bit vector of [4 x unsigned int]. | |
| 328 | /// A 128-bit vector of [4 x int]. | |
| 315 | 329 | /// |
| 316 | 330 | /// \code{.operation} |
| 317 | 331 | /// FOR j := 0 to 3 |
| 318 | 332 | /// 	tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) |
| 319 | /// 	tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 333 | /// 	tmp2.dword := | |
| 334 | /// 	 ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 320 | 335 | /// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 |
| 321 | 336 | /// ENDFOR |
| 322 | 337 | /// dst[MAX:128] := 0 |
| 323 | 338 | /// \endcode |
| 324 | 339 | #define _mm_dpwuud_epi32(__W, __A, __B) \ |
| 325 | ((__m128i)__builtin_ia32_vpdpwuud128((__v4si)(__W), (__v4si)(__A), \ | |
| 326 | (__v4si)(__B))) | |
| 340 | ((__m128i)__builtin_ia32_vpdpwuud128((__v4si)(__W), (__v8hu)(__A), \ | |
| 341 | (__v8hu)(__B))) | |
| 327 | 342 | |
| 328 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with | |
| 329 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate | |
| 330 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 331 | /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst. | |
| 343 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A | |
| 344 | /// with corresponding unsigned 16-bit integers in \a __B, producing 2 | |
| 345 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 346 | /// corresponding 32-bit integer in \a __W, and store the packed 32-bit | |
| 347 | /// results in \a dst. | |
| 332 | 348 | /// |
| 333 | 349 | /// \headerfile <immintrin.h> |
| 334 | 350 | /// |
| ... | ... | @@ -339,31 +355,32 @@ |
| 339 | 355 | /// This intrinsic corresponds to the \c VPDPWUUD instruction. |
| 340 | 356 | /// |
| 341 | 357 | /// \param __W |
| 342 | /// A 256-bit vector of [8 x unsigned int]. | |
| 358 | /// A 256-bit vector of [8 x int]. | |
| 343 | 359 | /// \param __A |
| 344 | 360 | /// A 256-bit vector of [16 x unsigned short]. |
| 345 | 361 | /// \param __B |
| 346 | 362 | /// A 256-bit vector of [16 x unsigned short]. |
| 347 | 363 | /// \returns |
| 348 | /// A 256-bit vector of [8 x unsigned int]. | |
| 364 | /// A 256-bit vector of [8 x int]. | |
| 349 | 365 | /// |
| 350 | 366 | /// \code{.operation} |
| 351 | 367 | /// FOR j := 0 to 7 |
| 352 | 368 | /// 	tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) |
| 353 | /// 	tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 369 | /// 	tmp2.dword := | |
| 370 | /// 	 ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 354 | 371 | /// 	dst.dword[j] := __W.dword[j] + tmp1 + tmp2 |
| 355 | 372 | /// ENDFOR |
| 356 | 373 | /// dst[MAX:256] := 0 |
| 357 | 374 | /// \endcode |
| 358 | 375 | #define _mm256_dpwuud_epi32(__W, __A, __B) \ |
| 359 | ((__m256i)__builtin_ia32_vpdpwuud256((__v8si)(__W), (__v8si)(__A), \ | |
| 360 | (__v8si)(__B))) | |
| 376 | ((__m256i)__builtin_ia32_vpdpwuud256((__v8si)(__W), (__v16hu)(__A), \ | |
| 377 | (__v16hu)(__B))) | |
| 361 | 378 | |
| 362 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with | |
| 363 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate | |
| 364 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 365 | /// 32-bit integer in \a __W with signed saturation, and store the packed | |
| 366 | /// 32-bit results in \a dst. | |
| 379 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A | |
| 380 | /// with corresponding unsigned 16-bit integers in \a __B, producing 2 | |
| 381 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 382 | /// corresponding 32-bit integer in \a __W with signed saturation, and store | |
| 383 | /// the packed 32-bit results in \a dst. | |
| 367 | 384 | /// |
| 368 | 385 | /// \headerfile <immintrin.h> |
| 369 | 386 | /// |
| ... | ... | @@ -371,34 +388,35 @@ |
| 371 | 388 | /// __m128i _mm_dpwsuds_epi32(__m128i __W, __m128i __A, __m128i __B) |
| 372 | 389 | /// \endcode |
| 373 | 390 | /// |
| 374 | /// This intrinsic corresponds to the \c VPDPWSUDS instruction. | |
| 391 | /// This intrinsic corresponds to the \c VPDPWUUDS instruction. | |
| 375 | 392 | /// |
| 376 | 393 | /// \param __W |
| 377 | /// A 128-bit vector of [4 x unsigned int]. | |
| 394 | /// A 128-bit vector of [4 x int]. | |
| 378 | 395 | /// \param __A |
| 379 | 396 | /// A 128-bit vector of [8 x unsigned short]. |
| 380 | 397 | /// \param __B |
| 381 | 398 | /// A 128-bit vector of [8 x unsigned short]. |
| 382 | 399 | /// \returns |
| 383 | /// A 128-bit vector of [4 x unsigned int]. | |
| 400 | /// A 128-bit vector of [4 x int]. | |
| 384 | 401 | /// |
| 385 | 402 | /// \code{.operation} |
| 386 | 403 | /// FOR j := 0 to 3 |
| 387 | 404 | /// 	tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) |
| 388 | /// 	tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 405 | /// 	tmp2.dword := | |
| 406 | /// 	 ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 389 | 407 | /// 	dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) |
| 390 | 408 | /// ENDFOR |
| 391 | 409 | /// dst[MAX:128] := 0 |
| 392 | 410 | /// \endcode |
| 393 | 411 | #define _mm_dpwuuds_epi32(__W, __A, __B) \ |
| 394 | ((__m128i)__builtin_ia32_vpdpwuuds128((__v4si)(__W), (__v4si)(__A), \ | |
| 395 | (__v4si)(__B))) | |
| 412 | ((__m128i)__builtin_ia32_vpdpwuuds128((__v4si)(__W), (__v8hu)(__A), \ | |
| 413 | (__v8hu)(__B))) | |
| 396 | 414 | |
| 397 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A with | |
| 398 | /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate | |
| 399 | /// signed 16-bit results. Sum these 2 results with the corresponding | |
| 400 | /// 32-bit integer in \a __W with signed saturation, and store the packed | |
| 401 | /// 32-bit results in \a dst. | |
| 415 | /// Multiply groups of 2 adjacent pairs of unsigned 16-bit integers in \a __A | |
| 416 | /// with corresponding unsigned 16-bit integers in \a __B, producing 2 | |
| 417 | /// intermediate signed 16-bit results. Sum these 2 results with the | |
| 418 | /// corresponding 32-bit integer in \a __W with signed saturation, and store | |
| 419 | /// the packed 32-bit results in \a dst. | |
| 402 | 420 | /// |
| 403 | 421 | /// \headerfile <immintrin.h> |
| 404 | 422 | /// |
| ... | ... | @@ -406,27 +424,28 @@ |
| 406 | 424 | /// __m256i _mm256_dpwuuds_epi32(__m256i __W, __m256i __A, __m256i __B) |
| 407 | 425 | /// \endcode |
| 408 | 426 | /// |
| 409 | /// This intrinsic corresponds to the \c VPDPWSUDS instruction. | |
| 427 | /// This intrinsic corresponds to the \c VPDPWUUDS instruction. | |
| 410 | 428 | /// |
| 411 | 429 | /// \param __W |
| 412 | /// A 256-bit vector of [8 x unsigned int]. | |
| 430 | /// A 256-bit vector of [8 x int]. | |
| 413 | 431 | /// \param __A |
| 414 | 432 | /// A 256-bit vector of [16 x unsigned short]. |
| 415 | 433 | /// \param __B |
| 416 | 434 | /// A 256-bit vector of [16 x unsigned short]. |
| 417 | 435 | /// \returns |
| 418 | /// A 256-bit vector of [8 x unsigned int]. | |
| 436 | /// A 256-bit vector of [8 x int]. | |
| 419 | 437 | /// |
| 420 | 438 | /// \code{.operation} |
| 421 | 439 | /// FOR j := 0 to 7 |
| 422 | 440 | /// 	tmp1.dword := ZeroExtend32(__A.word[2*j]) * ZeroExtend32(__B.word[2*j]) |
| 423 | /// 	tmp2.dword := ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 441 | /// 	tmp2.dword := | |
| 442 | /// 	 ZeroExtend32(__A.word[2*j+1]) * ZeroExtend32(__B.word[2*j+1]) | |
| 424 | 443 | /// 	dst.dword[j] := UNSIGNED_DWORD_SATURATE(__W.dword[j] + tmp1 + tmp2) |
| 425 | 444 | /// ENDFOR |
| 426 | 445 | /// dst[MAX:256] := 0 |
| 427 | 446 | /// \endcode |
| 428 | 447 | #define _mm256_dpwuuds_epi32(__W, __A, __B) \ |
| 429 | ((__m256i)__builtin_ia32_vpdpwuuds256((__v8si)(__W), (__v8si)(__A), \ | |
| 430 | (__v8si)(__B))) | |
| 448 | ((__m256i)__builtin_ia32_vpdpwuuds256((__v8si)(__W), (__v16hu)(__A), \ | |
| 449 | (__v16hu)(__B))) | |
| 431 | 450 | |
| 432 | 451 | #endif // __AVXVNNIINT16INTRIN_H |
lib/include/avxvnniint8intrin.h+56-32| ... | ... | @@ -14,6 +14,7 @@ |
| 14 | 14 | #ifndef __AVXVNNIINT8INTRIN_H |
| 15 | 15 | #define __AVXVNNIINT8INTRIN_H |
| 16 | 16 | |
| 17 | // clang-format off | |
| 17 | 18 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
| 18 | 19 | /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate |
| 19 | 20 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -44,10 +45,12 @@ |
| 44 | 45 | /// ENDFOR |
| 45 | 46 | /// dst[MAX:128] := 0 |
| 46 | 47 | /// \endcode |
| 48 | // clang-format on | |
| 47 | 49 | #define _mm_dpbssd_epi32(__W, __A, __B) \ |
| 48 | ((__m128i)__builtin_ia32_vpdpbssd128((__v4si)(__W), (__v4si)(__A), \ | |
| 49 | (__v4si)(__B))) | |
| 50 | ((__m128i)__builtin_ia32_vpdpbssd128((__v4si)(__W), (__v16qi)(__A), \ | |
| 51 | (__v16qi)(__B))) | |
| 50 | 52 | |
| 53 | // clang-format off | |
| 51 | 54 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
| 52 | 55 | /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate |
| 53 | 56 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -78,10 +81,12 @@ |
| 78 | 81 | /// ENDFOR |
| 79 | 82 | /// dst[MAX:256] := 0 |
| 80 | 83 | /// \endcode |
| 84 | // clang-format on | |
| 81 | 85 | #define _mm256_dpbssd_epi32(__W, __A, __B) \ |
| 82 | ((__m256i)__builtin_ia32_vpdpbssd256((__v8si)(__W), (__v8si)(__A), \ | |
| 83 | (__v8si)(__B))) | |
| 86 | ((__m256i)__builtin_ia32_vpdpbssd256((__v8si)(__W), (__v32qi)(__A), \ | |
| 87 | (__v32qi)(__B))) | |
| 84 | 88 | |
| 89 | // clang-format off | |
| 85 | 90 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
| 86 | 91 | /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate |
| 87 | 92 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -94,7 +99,7 @@ |
| 94 | 99 | /// _mm_dpbssds_epi32( __m128i __W, __m128i __A, __m128i __B); |
| 95 | 100 | /// \endcode |
| 96 | 101 | /// |
| 97 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. | |
| 102 | /// This intrinsic corresponds to the \c VPDPBSSDS instruction. | |
| 98 | 103 | /// |
| 99 | 104 | /// \param __A |
| 100 | 105 | /// A 128-bit vector of [16 x char]. |
| ... | ... | @@ -113,10 +118,12 @@ |
| 113 | 118 | /// ENDFOR |
| 114 | 119 | /// dst[MAX:128] := 0 |
| 115 | 120 | /// \endcode |
| 121 | // clang-format on | |
| 116 | 122 | #define _mm_dpbssds_epi32(__W, __A, __B) \ |
| 117 | ((__m128i)__builtin_ia32_vpdpbssds128((__v4si)(__W), (__v4si)(__A), \ | |
| 118 | (__v4si)(__B))) | |
| 123 | ((__m128i)__builtin_ia32_vpdpbssds128((__v4si)(__W), (__v16qi)(__A), \ | |
| 124 | (__v16qi)(__B))) | |
| 119 | 125 | |
| 126 | // clang-format off | |
| 120 | 127 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
| 121 | 128 | /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate |
| 122 | 129 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -129,7 +136,7 @@ |
| 129 | 136 | /// _mm256_dpbssds_epi32(__m256i __W, __m256i __A, __m256i __B); |
| 130 | 137 | /// \endcode |
| 131 | 138 | /// |
| 132 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. | |
| 139 | /// This intrinsic corresponds to the \c VPDPBSSDS instruction. | |
| 133 | 140 | /// |
| 134 | 141 | /// \param __A |
| 135 | 142 | /// A 256-bit vector of [32 x char]. |
| ... | ... | @@ -148,10 +155,12 @@ |
| 148 | 155 | /// ENDFOR |
| 149 | 156 | /// dst[MAX:256] := 0 |
| 150 | 157 | /// \endcode |
| 158 | // clang-format on | |
| 151 | 159 | #define _mm256_dpbssds_epi32(__W, __A, __B) \ |
| 152 | ((__m256i)__builtin_ia32_vpdpbssds256((__v8si)(__W), (__v8si)(__A), \ | |
| 153 | (__v8si)(__B))) | |
| 160 | ((__m256i)__builtin_ia32_vpdpbssds256((__v8si)(__W), (__v32qi)(__A), \ | |
| 161 | (__v32qi)(__B))) | |
| 154 | 162 | |
| 163 | // clang-format off | |
| 155 | 164 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
| 156 | 165 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
| 157 | 166 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -163,7 +172,7 @@ |
| 163 | 172 | /// _mm_dpbsud_epi32(__m128i __W, __m128i __A, __m128i __B); |
| 164 | 173 | /// \endcode |
| 165 | 174 | /// |
| 166 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. | |
| 175 | /// This intrinsic corresponds to the \c VPDPBSUD instruction. | |
| 167 | 176 | /// |
| 168 | 177 | /// \param __A |
| 169 | 178 | /// A 128-bit vector of [16 x char]. |
| ... | ... | @@ -182,10 +191,12 @@ |
| 182 | 191 | /// ENDFOR |
| 183 | 192 | /// dst[MAX:128] := 0 |
| 184 | 193 | /// \endcode |
| 194 | // clang-format on | |
| 185 | 195 | #define _mm_dpbsud_epi32(__W, __A, __B) \ |
| 186 | ((__m128i)__builtin_ia32_vpdpbsud128((__v4si)(__W), (__v4si)(__A), \ | |
| 187 | (__v4si)(__B))) | |
| 196 | ((__m128i)__builtin_ia32_vpdpbsud128((__v4si)(__W), (__v16qi)(__A), \ | |
| 197 | (__v16qu)(__B))) | |
| 188 | 198 | |
| 199 | // clang-format off | |
| 189 | 200 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
| 190 | 201 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
| 191 | 202 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -197,7 +208,7 @@ |
| 197 | 208 | /// _mm256_dpbsud_epi32(__m256i __W, __m256i __A, __m256i __B); |
| 198 | 209 | /// \endcode |
| 199 | 210 | /// |
| 200 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. | |
| 211 | /// This intrinsic corresponds to the \c VPDPBSUD instruction. | |
| 201 | 212 | /// |
| 202 | 213 | /// \param __A |
| 203 | 214 | /// A 256-bit vector of [32 x char]. |
| ... | ... | @@ -216,10 +227,12 @@ |
| 216 | 227 | /// ENDFOR |
| 217 | 228 | /// dst[MAX:256] := 0 |
| 218 | 229 | /// \endcode |
| 230 | // clang-format on | |
| 219 | 231 | #define _mm256_dpbsud_epi32(__W, __A, __B) \ |
| 220 | ((__m256i)__builtin_ia32_vpdpbsud256((__v8si)(__W), (__v8si)(__A), \ | |
| 221 | (__v8si)(__B))) | |
| 232 | ((__m256i)__builtin_ia32_vpdpbsud256((__v8si)(__W), (__v32qi)(__A), \ | |
| 233 | (__v32qu)(__B))) | |
| 222 | 234 | |
| 235 | // clang-format off | |
| 223 | 236 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
| 224 | 237 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
| 225 | 238 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -232,7 +245,7 @@ |
| 232 | 245 | /// _mm_dpbsuds_epi32( __m128i __W, __m128i __A, __m128i __B); |
| 233 | 246 | /// \endcode |
| 234 | 247 | /// |
| 235 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. | |
| 248 | /// This intrinsic corresponds to the \c VPDPBSUDS instruction. | |
| 236 | 249 | /// |
| 237 | 250 | /// \param __A |
| 238 | 251 | /// A 128-bit vector of [16 x char]. |
| ... | ... | @@ -251,10 +264,12 @@ |
| 251 | 264 | /// ENDFOR |
| 252 | 265 | /// dst[MAX:128] := 0 |
| 253 | 266 | /// \endcode |
| 267 | // clang-format on | |
| 254 | 268 | #define _mm_dpbsuds_epi32(__W, __A, __B) \ |
| 255 | ((__m128i)__builtin_ia32_vpdpbsuds128((__v4si)(__W), (__v4si)(__A), \ | |
| 256 | (__v4si)(__B))) | |
| 269 | ((__m128i)__builtin_ia32_vpdpbsuds128((__v4si)(__W), (__v16qi)(__A), \ | |
| 270 | (__v16qu)(__B))) | |
| 257 | 271 | |
| 272 | // clang-format off | |
| 258 | 273 | /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with |
| 259 | 274 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
| 260 | 275 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -267,7 +282,7 @@ |
| 267 | 282 | /// _mm256_dpbsuds_epi32(__m256i __W, __m256i __A, __m256i __B); |
| 268 | 283 | /// \endcode |
| 269 | 284 | /// |
| 270 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. | |
| 285 | /// This intrinsic corresponds to the \c VPDPBSUDS instruction. | |
| 271 | 286 | /// |
| 272 | 287 | /// \param __A |
| 273 | 288 | /// A 256-bit vector of [32 x char]. |
| ... | ... | @@ -286,10 +301,12 @@ |
| 286 | 301 | /// ENDFOR |
| 287 | 302 | /// dst[MAX:256] := 0 |
| 288 | 303 | /// \endcode |
| 304 | // clang-format on | |
| 289 | 305 | #define _mm256_dpbsuds_epi32(__W, __A, __B) \ |
| 290 | ((__m256i)__builtin_ia32_vpdpbsuds256((__v8si)(__W), (__v8si)(__A), \ | |
| 291 | (__v8si)(__B))) | |
| 306 | ((__m256i)__builtin_ia32_vpdpbsuds256((__v8si)(__W), (__v32qi)(__A), \ | |
| 307 | (__v32qu)(__B))) | |
| 292 | 308 | |
| 309 | // clang-format off | |
| 293 | 310 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
| 294 | 311 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
| 295 | 312 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -301,7 +318,7 @@ |
| 301 | 318 | /// _mm_dpbuud_epi32(__m128i __W, __m128i __A, __m128i __B); |
| 302 | 319 | /// \endcode |
| 303 | 320 | /// |
| 304 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. | |
| 321 | /// This intrinsic corresponds to the \c VPDPBUUD instruction. | |
| 305 | 322 | /// |
| 306 | 323 | /// \param __A |
| 307 | 324 | /// A 128-bit vector of [16 x unsigned char]. |
| ... | ... | @@ -320,10 +337,12 @@ |
| 320 | 337 | /// ENDFOR |
| 321 | 338 | /// dst[MAX:128] := 0 |
| 322 | 339 | /// \endcode |
| 340 | // clang-format on | |
| 323 | 341 | #define _mm_dpbuud_epi32(__W, __A, __B) \ |
| 324 | ((__m128i)__builtin_ia32_vpdpbuud128((__v4si)(__W), (__v4si)(__A), \ | |
| 325 | (__v4si)(__B))) | |
| 342 | ((__m128i)__builtin_ia32_vpdpbuud128((__v4si)(__W), (__v16qu)(__A), \ | |
| 343 | (__v16qu)(__B))) | |
| 326 | 344 | |
| 345 | // clang-format off | |
| 327 | 346 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
| 328 | 347 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
| 329 | 348 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -335,7 +354,7 @@ |
| 335 | 354 | /// _mm256_dpbuud_epi32(__m256i __W, __m256i __A, __m256i __B); |
| 336 | 355 | /// \endcode |
| 337 | 356 | /// |
| 338 | /// This intrinsic corresponds to the \c VPDPBSSD instruction. | |
| 357 | /// This intrinsic corresponds to the \c VPDPBUUD instruction. | |
| 339 | 358 | /// |
| 340 | 359 | /// \param __A |
| 341 | 360 | /// A 256-bit vector of [32 x unsigned char]. |
| ... | ... | @@ -354,10 +373,12 @@ |
| 354 | 373 | /// ENDFOR |
| 355 | 374 | /// dst[MAX:256] := 0 |
| 356 | 375 | /// \endcode |
| 376 | // clang-format on | |
| 357 | 377 | #define _mm256_dpbuud_epi32(__W, __A, __B) \ |
| 358 | ((__m256i)__builtin_ia32_vpdpbuud256((__v8si)(__W), (__v8si)(__A), \ | |
| 359 | (__v8si)(__B))) | |
| 378 | ((__m256i)__builtin_ia32_vpdpbuud256((__v8si)(__W), (__v32qu)(__A), \ | |
| 379 | (__v32qu)(__B))) | |
| 360 | 380 | |
| 381 | // clang-format off | |
| 361 | 382 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
| 362 | 383 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
| 363 | 384 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| ... | ... | @@ -389,10 +410,12 @@ |
| 389 | 410 | /// ENDFOR |
| 390 | 411 | /// dst[MAX:128] := 0 |
| 391 | 412 | /// \endcode |
| 413 | // clang-format on | |
| 392 | 414 | #define _mm_dpbuuds_epi32(__W, __A, __B) \ |
| 393 | ((__m128i)__builtin_ia32_vpdpbuuds128((__v4si)(__W), (__v4si)(__A), \ | |
| 394 | (__v4si)(__B))) | |
| 415 | ((__m128i)__builtin_ia32_vpdpbuuds128((__v4si)(__W), (__v16qu)(__A), \ | |
| 416 | (__v16qu)(__B))) | |
| 395 | 417 | |
| 418 | // clang-format off | |
| 396 | 419 | /// corresponding unsigned 8-bit integers in \a __B, producing 4 intermediate |
| 397 | 420 | /// signed 16-bit results. Sum these 4 results with the corresponding |
| 398 | 421 | /// 32-bit integer in \a __W with signed saturation, and store the packed |
| ... | ... | @@ -423,8 +446,9 @@ |
| 423 | 446 | /// ENDFOR |
| 424 | 447 | /// dst[MAX:256] := 0 |
| 425 | 448 | /// \endcode |
| 449 | // clang-format on | |
| 426 | 450 | #define _mm256_dpbuuds_epi32(__W, __A, __B) \ |
| 427 | ((__m256i)__builtin_ia32_vpdpbuuds256((__v8si)(__W), (__v8si)(__A), \ | |
| 428 | (__v8si)(__B))) | |
| 451 | ((__m256i)__builtin_ia32_vpdpbuuds256((__v8si)(__W), (__v32qu)(__A), \ | |
| 452 | (__v32qu)(__B))) | |
| 429 | 453 | |
| 430 | 454 | #endif // __AVXVNNIINT8INTRIN_H |
lib/include/avxvnniintrin.h+16-8| ... | ... | @@ -63,7 +63,8 @@ |
| 63 | 63 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 64 | 64 | _mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) |
| 65 | 65 | { |
| 66 | return (__m256i)__builtin_ia32_vpdpbusd256((__v8si)__S, (__v8si)__A, (__v8si)__B); | |
| 66 | return (__m256i)__builtin_ia32_vpdpbusd256((__v8si)__S, (__v32qu)__A, | |
| 67 | (__v32qi)__B); | |
| 67 | 68 | } |
| 68 | 69 | |
| 69 | 70 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
| ... | ... | @@ -86,7 +87,8 @@ _mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) |
| 86 | 87 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 87 | 88 | _mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) |
| 88 | 89 | { |
| 89 | return (__m256i)__builtin_ia32_vpdpbusds256((__v8si)__S, (__v8si)__A, (__v8si)__B); | |
| 90 | return (__m256i)__builtin_ia32_vpdpbusds256((__v8si)__S, (__v32qu)__A, | |
| 91 | (__v32qi)__B); | |
| 90 | 92 | } |
| 91 | 93 | |
| 92 | 94 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with |
| ... | ... | @@ -107,7 +109,8 @@ _mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) |
| 107 | 109 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 108 | 110 | _mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) |
| 109 | 111 | { |
| 110 | return (__m256i)__builtin_ia32_vpdpwssd256((__v8si)__S, (__v8si)__A, (__v8si)__B); | |
| 112 | return (__m256i)__builtin_ia32_vpdpwssd256((__v8si)__S, (__v16hi)__A, | |
| 113 | (__v16hi)__B); | |
| 111 | 114 | } |
| 112 | 115 | |
| 113 | 116 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with |
| ... | ... | @@ -128,7 +131,8 @@ _mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) |
| 128 | 131 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 |
| 129 | 132 | _mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) |
| 130 | 133 | { |
| 131 | return (__m256i)__builtin_ia32_vpdpwssds256((__v8si)__S, (__v8si)__A, (__v8si)__B); | |
| 134 | return (__m256i)__builtin_ia32_vpdpwssds256((__v8si)__S, (__v16hi)__A, | |
| 135 | (__v16hi)__B); | |
| 132 | 136 | } |
| 133 | 137 | |
| 134 | 138 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
| ... | ... | @@ -151,7 +155,8 @@ _mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) |
| 151 | 155 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 152 | 156 | _mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) |
| 153 | 157 | { |
| 154 | return (__m128i)__builtin_ia32_vpdpbusd128((__v4si)__S, (__v4si)__A, (__v4si)__B); | |
| 158 | return (__m128i)__builtin_ia32_vpdpbusd128((__v4si)__S, (__v16qu)__A, | |
| 159 | (__v16qi)__B); | |
| 155 | 160 | } |
| 156 | 161 | |
| 157 | 162 | /// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with |
| ... | ... | @@ -174,7 +179,8 @@ _mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) |
| 174 | 179 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 175 | 180 | _mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) |
| 176 | 181 | { |
| 177 | return (__m128i)__builtin_ia32_vpdpbusds128((__v4si)__S, (__v4si)__A, (__v4si)__B); | |
| 182 | return (__m128i)__builtin_ia32_vpdpbusds128((__v4si)__S, (__v16qu)__A, | |
| 183 | (__v16qi)__B); | |
| 178 | 184 | } |
| 179 | 185 | |
| 180 | 186 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with |
| ... | ... | @@ -195,7 +201,8 @@ _mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) |
| 195 | 201 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 196 | 202 | _mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) |
| 197 | 203 | { |
| 198 | return (__m128i)__builtin_ia32_vpdpwssd128((__v4si)__S, (__v4si)__A, (__v4si)__B); | |
| 204 | return (__m128i)__builtin_ia32_vpdpwssd128((__v4si)__S, (__v8hi)__A, | |
| 205 | (__v8hi)__B); | |
| 199 | 206 | } |
| 200 | 207 | |
| 201 | 208 | /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with |
| ... | ... | @@ -216,7 +223,8 @@ _mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) |
| 216 | 223 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 217 | 224 | _mm_dpwssds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) |
| 218 | 225 | { |
| 219 | return (__m128i)__builtin_ia32_vpdpwssds128((__v4si)__S, (__v4si)__A, (__v4si)__B); | |
| 226 | return (__m128i)__builtin_ia32_vpdpwssds128((__v4si)__S, (__v8hi)__A, | |
| 227 | (__v8hi)__B); | |
| 220 | 228 | } |
| 221 | 229 | |
| 222 | 230 | #undef __DEFAULT_FN_ATTRS128 |
lib/include/cpuid.h+101-4| ... | ... | @@ -253,10 +253,6 @@ |
| 253 | 253 | #define bit_RDPRU 0x00000010 |
| 254 | 254 | #define bit_WBNOINVD 0x00000200 |
| 255 | 255 | |
| 256 | /* Features in %ebx for leaf 0x24 */ | |
| 257 | #define bit_AVX10_256 0x00020000 | |
| 258 | #define bit_AVX10_512 0x00040000 | |
| 259 | ||
| 260 | 256 | #ifdef __i386__ |
| 261 | 257 | #define __cpuid(__leaf, __eax, __ebx, __ecx, __edx) \ |
| 262 | 258 | __asm("cpuid" : "=a"(__eax), "=b" (__ebx), "=c"(__ecx), "=d"(__edx) \ |
| ... | ... | @@ -282,6 +278,24 @@ |
| 282 | 278 | : "0"(__leaf), "2"(__count)) |
| 283 | 279 | #endif |
| 284 | 280 | |
| 281 | /// Queries the processor to determine the highest supported \c CPUID leaf. | |
| 282 | /// This intrinsic is only available on x86 and x64. | |
| 283 | /// | |
| 284 | /// \headerfile <cpuid.h> | |
| 285 | /// | |
| 286 | /// This intrinsic corresponds to the <c> CPUID </c> instruction. | |
| 287 | /// | |
| 288 | /// \param __leaf | |
| 289 | /// \a __leaf can be either 0x0 or 0x8000000. If \a __leaf == 0x0, the | |
| 290 | /// highest supported value for basic \c CPUID information is returned. | |
| 291 | /// If \a __leaf == 0x8000000, the highest supported value for extended | |
| 292 | /// \c CPUID information is returned. | |
| 293 | /// \param __sig | |
| 294 | /// If the \a __sig pointer is non-null, the first four bytes of the | |
| 295 | /// signature (as found in the \c EBX register) are returned in the | |
| 296 | /// location pointed to by \a __sig. | |
| 297 | /// \returns Returns 0 if \c CPUID is supported; otherwise returns the value | |
| 298 | /// that \c CPUID returns in the \c EAX register. | |
| 285 | 299 | static __inline unsigned int __get_cpuid_max (unsigned int __leaf, |
| 286 | 300 | unsigned int *__sig) |
| 287 | 301 | { |
| ... | ... | @@ -315,6 +329,32 @@ static __inline unsigned int __get_cpuid_max (unsigned int __leaf, |
| 315 | 329 | return __eax; |
| 316 | 330 | } |
| 317 | 331 | |
| 332 | /// For the requested \c CPUID leaf, queries the processor for information | |
| 333 | /// about the CPU type and CPU features (such as processor vendor, supported | |
| 334 | /// instruction sets, CPU capabilities, cache sizes, CPU model and family, and | |
| 335 | /// other hardware details). This intrinsic is only available on x86 and x64. | |
| 336 | /// | |
| 337 | /// \headerfile <cpuid.h> | |
| 338 | /// | |
| 339 | /// This intrinsic corresponds to the <c> CPUID </c> instruction. | |
| 340 | /// | |
| 341 | /// \param __leaf | |
| 342 | /// An unsigned integer that identifies the level (also called "leaf") at | |
| 343 | /// which the \c CPUID instruction will be executed. | |
| 344 | /// \param __eax | |
| 345 | /// A pointer to an integer that corresponds to the \c EAX register where | |
| 346 | /// \c CPUID stores output results. | |
| 347 | /// \param __ebx | |
| 348 | /// A pointer to an integer that corresponds to the \c EBX register where | |
| 349 | /// \c CPUID stores output results. | |
| 350 | /// \param __ecx | |
| 351 | /// A pointer to an integer that corresponds to the \c ECX register where | |
| 352 | /// \c CPUID stores output results. | |
| 353 | /// \param __edx | |
| 354 | /// A pointer to an integer that corresponds to the \c EDX register where | |
| 355 | /// \c CPUID stores output results. | |
| 356 | /// \returns Returns 1 if the requested \c CPUID leaf is supported; otherwise | |
| 357 | /// returns 0. | |
| 318 | 358 | static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax, |
| 319 | 359 | unsigned int *__ebx, unsigned int *__ecx, |
| 320 | 360 | unsigned int *__edx) |
| ... | ... | @@ -328,6 +368,36 @@ static __inline int __get_cpuid (unsigned int __leaf, unsigned int *__eax, |
| 328 | 368 | return 1; |
| 329 | 369 | } |
| 330 | 370 | |
| 371 | /// For the requested \c CPUID leaf and subleaf, queries the processor for | |
| 372 | /// information about the CPU type and CPU features (such as processor vendor, | |
| 373 | /// supported instruction sets, CPU capabilities, cache sizes, CPU model and | |
| 374 | /// family, and other hardware details). This intrinsic is only available on | |
| 375 | /// x86 and x64. | |
| 376 | /// | |
| 377 | /// \headerfile <cpuid.h> | |
| 378 | /// | |
| 379 | /// This intrinsic corresponds to the <c> CPUID </c> instruction. | |
| 380 | /// | |
| 381 | /// \param __leaf | |
| 382 | /// An unsigned integer that identifies the level (also called "leaf") at | |
| 383 | /// which the \c CPUID instruction will be executed. | |
| 384 | /// \param __subleaf | |
| 385 | /// An unsigned integer that identifies the sublevel (also called | |
| 386 | /// "subleaf") at which the \c CPUID instruction will be executed. | |
| 387 | /// \param __eax | |
| 388 | /// A pointer to an integer that corresponds to the \c EAX register where | |
| 389 | /// \c CPUID stores output results. | |
| 390 | /// \param __ebx | |
| 391 | /// A pointer to an integer that corresponds to the \c EBX register where | |
| 392 | /// \c CPUID stores output results. | |
| 393 | /// \param __ecx | |
| 394 | /// A pointer to an integer that corresponds to the \c ECX register where | |
| 395 | /// \c CPUID stores output results. | |
| 396 | /// \param __edx | |
| 397 | /// A pointer to an integer that corresponds to the \c EDX register where | |
| 398 | /// \c CPUID stores output results. | |
| 399 | /// \returns Returns 1 if the requested \c CPUID leaf is supported; otherwise | |
| 400 | /// returns 0. | |
| 331 | 401 | static __inline int __get_cpuid_count (unsigned int __leaf, |
| 332 | 402 | unsigned int __subleaf, |
| 333 | 403 | unsigned int *__eax, unsigned int *__ebx, |
| ... | ... | @@ -345,10 +415,37 @@ static __inline int __get_cpuid_count (unsigned int __leaf, |
| 345 | 415 | // In some configurations, __cpuidex is defined as a builtin (primarily |
| 346 | 416 | // -fms-extensions) which will conflict with the __cpuidex definition below. |
| 347 | 417 | #if !(__has_builtin(__cpuidex)) |
| 418 | // In some cases, offloading will set the host as the aux triple and define the | |
| 419 | // builtin. Given __has_builtin does not detect builtins on aux triples, we need | |
| 420 | // to explicitly check for some offloading cases. | |
| 421 | #if !defined(__NVPTX__) && !defined(__AMDGPU__) && !defined(__SPIRV__) | |
| 422 | /// Executes the \c CPUID instruction with the specified leaf and subleaf | |
| 423 | /// values, and returns the results from the CPU's registers. This intrinsic | |
| 424 | /// is only available on x86 and x64. | |
| 425 | /// | |
| 426 | /// \headerfile <cpuid.h> | |
| 427 | /// | |
| 428 | /// This intrinsic corresponds to the <c> CPUID </c> instruction. | |
| 429 | /// | |
| 430 | /// \param __cpu_info | |
| 431 | /// An output array of four integers: | |
| 432 | /// <ul> | |
| 433 | /// <li>\a __cpuInfo[0] receives the value of the \c EAX register.</li> | |
| 434 | /// <li>\a __cpuInfo[1] receives the value of the \c EBX register.</li> | |
| 435 | /// <li>\a __cpuInfo[2] receives the value of the \c ECX register.</li> | |
| 436 | /// <li>\a __cpuInfo[3] receives the value of the \c EDX register.</li> | |
| 437 | /// </ul> | |
| 438 | /// \param __leaf | |
| 439 | /// An unsigned integer that identifies the level (also called the "leaf") | |
| 440 | /// at which the \c CPUID instruction will be executed. | |
| 441 | /// \param __subleaf | |
| 442 | /// An unsigned integer that identifies the sublevel (also called the | |
| 443 | /// "subleaf") at which the \c CPUID instruction will be executed. | |
| 348 | 444 | static __inline void __cpuidex(int __cpu_info[4], int __leaf, int __subleaf) { |
| 349 | 445 | __cpuid_count(__leaf, __subleaf, __cpu_info[0], __cpu_info[1], __cpu_info[2], |
| 350 | 446 | __cpu_info[3]); |
| 351 | 447 | } |
| 352 | 448 | #endif |
| 449 | #endif | |
| 353 | 450 | |
| 354 | 451 | #endif /* __CPUID_H */ |
lib/include/emmintrin.h+168-168| ... | ... | @@ -17,7 +17,6 @@ |
| 17 | 17 | #include <xmmintrin.h> |
| 18 | 18 | |
| 19 | 19 | typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16))); |
| 20 | typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16))); | |
| 21 | 20 | |
| 22 | 21 | typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1))); |
| 23 | 22 | typedef long long __m128i_u |
| ... | ... | @@ -25,14 +24,9 @@ typedef long long __m128i_u |
| 25 | 24 | |
| 26 | 25 | /* Type defines. */ |
| 27 | 26 | typedef double __v2df __attribute__((__vector_size__(16))); |
| 28 | typedef long long __v2di __attribute__((__vector_size__(16))); | |
| 29 | typedef short __v8hi __attribute__((__vector_size__(16))); | |
| 30 | typedef char __v16qi __attribute__((__vector_size__(16))); | |
| 31 | 27 | |
| 32 | 28 | /* Unsigned types */ |
| 33 | 29 | typedef unsigned long long __v2du __attribute__((__vector_size__(16))); |
| 34 | typedef unsigned short __v8hu __attribute__((__vector_size__(16))); | |
| 35 | typedef unsigned char __v16qu __attribute__((__vector_size__(16))); | |
| 36 | 30 | |
| 37 | 31 | /* We need an explicitly signed variant for char. Note that this shouldn't |
| 38 | 32 | * appear in the interface though. */ |
| ... | ... | @@ -49,15 +43,9 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16))); |
| 49 | 43 | #endif |
| 50 | 44 | |
| 51 | 45 | /* Define the default attributes for the functions in this file. */ |
| 52 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 53 | #define __DEFAULT_FN_ATTRS \ | |
| 54 | __attribute__((__always_inline__, __nodebug__, \ | |
| 55 | __target__("sse2,no-evex512"), __min_vector_width__(128))) | |
| 56 | #else | |
| 57 | 46 | #define __DEFAULT_FN_ATTRS \ |
| 58 | 47 | __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \ |
| 59 | 48 | __min_vector_width__(128))) |
| 60 | #endif | |
| 61 | 49 | |
| 62 | 50 | #if defined(__cplusplus) && (__cplusplus >= 201103L) |
| 63 | 51 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr |
| ... | ... | @@ -67,6 +55,9 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16))); |
| 67 | 55 | |
| 68 | 56 | #define __trunc64(x) \ |
| 69 | 57 | (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0) |
| 58 | #define __zext128(x) \ | |
| 59 | (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \ | |
| 60 | 1, 2, 3) | |
| 70 | 61 | #define __anyext128(x) \ |
| 71 | 62 | (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \ |
| 72 | 63 | 1, -1, -1) |
| ... | ... | @@ -250,8 +241,7 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_div_pd(__m128d __a, |
| 250 | 241 | /// bits are copied from the upper 64 bits of operand \a __a. |
| 251 | 242 | static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a, |
| 252 | 243 | __m128d __b) { |
| 253 | __m128d __c = __builtin_ia32_sqrtsd((__v2df)__b); | |
| 254 | return __extension__(__m128d){__c[0], __a[1]}; | |
| 244 | return __extension__(__m128d){__builtin_elementwise_sqrt(__b[0]), __a[1]}; | |
| 255 | 245 | } |
| 256 | 246 | |
| 257 | 247 | /// Calculates the square root of the each of two values stored in a |
| ... | ... | @@ -266,7 +256,7 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a, |
| 266 | 256 | /// \returns A 128-bit vector of [2 x double] containing the square roots of the |
| 267 | 257 | /// values in the operand. |
| 268 | 258 | static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) { |
| 269 | return __builtin_ia32_sqrtpd((__v2df)__a); | |
| 259 | return __builtin_elementwise_sqrt(__a); | |
| 270 | 260 | } |
| 271 | 261 | |
| 272 | 262 | /// Compares lower 64-bit double-precision values of both operands, and |
| ... | ... | @@ -310,8 +300,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a, |
| 310 | 300 | /// A 128-bit vector of [2 x double] containing one of the operands. |
| 311 | 301 | /// \returns A 128-bit vector of [2 x double] containing the minimum values |
| 312 | 302 | /// between both operands. |
| 313 | static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a, | |
| 314 | __m128d __b) { | |
| 303 | static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_pd(__m128d __a, | |
| 304 | __m128d __b) { | |
| 315 | 305 | return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b); |
| 316 | 306 | } |
| 317 | 307 | |
| ... | ... | @@ -356,8 +346,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a, |
| 356 | 346 | /// A 128-bit vector of [2 x double] containing one of the operands. |
| 357 | 347 | /// \returns A 128-bit vector of [2 x double] containing the maximum values |
| 358 | 348 | /// between both operands. |
| 359 | static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a, | |
| 360 | __m128d __b) { | |
| 349 | static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_pd(__m128d __a, | |
| 350 | __m128d __b) { | |
| 361 | 351 | return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b); |
| 362 | 352 | } |
| 363 | 353 | |
| ... | ... | @@ -1288,7 +1278,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a, |
| 1288 | 1278 | /// A 128-bit vector of [2 x double]. |
| 1289 | 1279 | /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the |
| 1290 | 1280 | /// converted values. The upper 64 bits are set to zero. |
| 1291 | static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtpd_ps(__m128d __a) { | |
| 1281 | static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1282 | _mm_cvtpd_ps(__m128d __a) { | |
| 1292 | 1283 | return __builtin_ia32_cvtpd2ps((__v2df)__a); |
| 1293 | 1284 | } |
| 1294 | 1285 | |
| ... | ... | @@ -1393,8 +1384,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) { |
| 1393 | 1384 | /// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the |
| 1394 | 1385 | /// converted value from the second parameter. The upper 96 bits are copied |
| 1395 | 1386 | /// from the upper 96 bits of the first parameter. |
| 1396 | static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtsd_ss(__m128 __a, | |
| 1397 | __m128d __b) { | |
| 1387 | static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1388 | _mm_cvtsd_ss(__m128 __a, __m128d __b) { | |
| 1398 | 1389 | return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b); |
| 1399 | 1390 | } |
| 1400 | 1391 | |
| ... | ... | @@ -2068,8 +2059,8 @@ static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp, |
| 2068 | 2059 | /// A 128-bit vector of [16 x i8]. |
| 2069 | 2060 | /// \returns A 128-bit vector of [16 x i8] containing the sums of both |
| 2070 | 2061 | /// parameters. |
| 2071 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a, | |
| 2072 | __m128i __b) { | |
| 2062 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2063 | _mm_add_epi8(__m128i __a, __m128i __b) { | |
| 2073 | 2064 | return (__m128i)((__v16qu)__a + (__v16qu)__b); |
| 2074 | 2065 | } |
| 2075 | 2066 | |
| ... | ... | @@ -2089,8 +2080,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a, |
| 2089 | 2080 | /// A 128-bit vector of [8 x i16]. |
| 2090 | 2081 | /// \returns A 128-bit vector of [8 x i16] containing the sums of both |
| 2091 | 2082 | /// parameters. |
| 2092 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi16(__m128i __a, | |
| 2093 | __m128i __b) { | |
| 2083 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2084 | _mm_add_epi16(__m128i __a, __m128i __b) { | |
| 2094 | 2085 | return (__m128i)((__v8hu)__a + (__v8hu)__b); |
| 2095 | 2086 | } |
| 2096 | 2087 | |
| ... | ... | @@ -2127,8 +2118,9 @@ _mm_add_epi32(__m128i __a, __m128i __b) { |
| 2127 | 2118 | /// \param __b |
| 2128 | 2119 | /// A 64-bit integer. |
| 2129 | 2120 | /// \returns A 64-bit integer containing the sum of both parameters. |
| 2130 | static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_add_si64(__m64 __a, __m64 __b) { | |
| 2131 | return (__m64)(((unsigned long long)__a) + ((unsigned long long)__b)); | |
| 2121 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_add_si64(__m64 __a, | |
| 2122 | __m64 __b) { | |
| 2123 | return (__m64)(((__v1du)__a)[0] + ((__v1du)__b)[0]); | |
| 2132 | 2124 | } |
| 2133 | 2125 | |
| 2134 | 2126 | /// Adds the corresponding elements of two 128-bit vectors of [2 x i64], |
| ... | ... | @@ -2169,8 +2161,8 @@ _mm_add_epi64(__m128i __a, __m128i __b) { |
| 2169 | 2161 | /// A 128-bit signed [16 x i8] vector. |
| 2170 | 2162 | /// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of |
| 2171 | 2163 | /// both parameters. |
| 2172 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a, | |
| 2173 | __m128i __b) { | |
| 2164 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2165 | _mm_adds_epi8(__m128i __a, __m128i __b) { | |
| 2174 | 2166 | return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b); |
| 2175 | 2167 | } |
| 2176 | 2168 | |
| ... | ... | @@ -2191,8 +2183,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a, |
| 2191 | 2183 | /// A 128-bit signed [8 x i16] vector. |
| 2192 | 2184 | /// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of |
| 2193 | 2185 | /// both parameters. |
| 2194 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a, | |
| 2195 | __m128i __b) { | |
| 2186 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2187 | _mm_adds_epi16(__m128i __a, __m128i __b) { | |
| 2196 | 2188 | return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b); |
| 2197 | 2189 | } |
| 2198 | 2190 | |
| ... | ... | @@ -2213,8 +2205,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a, |
| 2213 | 2205 | /// A 128-bit unsigned [16 x i8] vector. |
| 2214 | 2206 | /// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums |
| 2215 | 2207 | /// of both parameters. |
| 2216 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a, | |
| 2217 | __m128i __b) { | |
| 2208 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2209 | _mm_adds_epu8(__m128i __a, __m128i __b) { | |
| 2218 | 2210 | return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b); |
| 2219 | 2211 | } |
| 2220 | 2212 | |
| ... | ... | @@ -2235,8 +2227,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a, |
| 2235 | 2227 | /// A 128-bit unsigned [8 x i16] vector. |
| 2236 | 2228 | /// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums |
| 2237 | 2229 | /// of both parameters. |
| 2238 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a, | |
| 2239 | __m128i __b) { | |
| 2230 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2231 | _mm_adds_epu16(__m128i __a, __m128i __b) { | |
| 2240 | 2232 | return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b); |
| 2241 | 2233 | } |
| 2242 | 2234 | |
| ... | ... | @@ -2254,9 +2246,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a, |
| 2254 | 2246 | /// A 128-bit unsigned [16 x i8] vector. |
| 2255 | 2247 | /// \returns A 128-bit unsigned [16 x i8] vector containing the rounded |
| 2256 | 2248 | /// averages of both parameters. |
| 2257 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a, | |
| 2258 | __m128i __b) { | |
| 2259 | return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b); | |
| 2249 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2250 | _mm_avg_epu8(__m128i __a, __m128i __b) { | |
| 2251 | return (__m128i)__builtin_ia32_pavgb128((__v16qu)__a, (__v16qu)__b); | |
| 2260 | 2252 | } |
| 2261 | 2253 | |
| 2262 | 2254 | /// Computes the rounded averages of corresponding elements of two |
| ... | ... | @@ -2273,9 +2265,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a, |
| 2273 | 2265 | /// A 128-bit unsigned [8 x i16] vector. |
| 2274 | 2266 | /// \returns A 128-bit unsigned [8 x i16] vector containing the rounded |
| 2275 | 2267 | /// averages of both parameters. |
| 2276 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a, | |
| 2277 | __m128i __b) { | |
| 2278 | return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b); | |
| 2268 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2269 | _mm_avg_epu16(__m128i __a, __m128i __b) { | |
| 2270 | return (__m128i)__builtin_ia32_pavgw128((__v8hu)__a, (__v8hu)__b); | |
| 2279 | 2271 | } |
| 2280 | 2272 | |
| 2281 | 2273 | /// Multiplies the corresponding elements of two 128-bit signed [8 x i16] |
| ... | ... | @@ -2298,8 +2290,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a, |
| 2298 | 2290 | /// A 128-bit signed [8 x i16] vector. |
| 2299 | 2291 | /// \returns A 128-bit signed [4 x i32] vector containing the sums of products |
| 2300 | 2292 | /// of both parameters. |
| 2301 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a, | |
| 2302 | __m128i __b) { | |
| 2293 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2294 | _mm_madd_epi16(__m128i __a, __m128i __b) { | |
| 2303 | 2295 | return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b); |
| 2304 | 2296 | } |
| 2305 | 2297 | |
| ... | ... | @@ -2317,8 +2309,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a, |
| 2317 | 2309 | /// A 128-bit signed [8 x i16] vector. |
| 2318 | 2310 | /// \returns A 128-bit signed [8 x i16] vector containing the greater value of |
| 2319 | 2311 | /// each comparison. |
| 2320 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a, | |
| 2321 | __m128i __b) { | |
| 2312 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2313 | _mm_max_epi16(__m128i __a, __m128i __b) { | |
| 2322 | 2314 | return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b); |
| 2323 | 2315 | } |
| 2324 | 2316 | |
| ... | ... | @@ -2336,8 +2328,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a, |
| 2336 | 2328 | /// A 128-bit unsigned [16 x i8] vector. |
| 2337 | 2329 | /// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of |
| 2338 | 2330 | /// each comparison. |
| 2339 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a, | |
| 2340 | __m128i __b) { | |
| 2331 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2332 | _mm_max_epu8(__m128i __a, __m128i __b) { | |
| 2341 | 2333 | return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b); |
| 2342 | 2334 | } |
| 2343 | 2335 | |
| ... | ... | @@ -2355,8 +2347,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a, |
| 2355 | 2347 | /// A 128-bit signed [8 x i16] vector. |
| 2356 | 2348 | /// \returns A 128-bit signed [8 x i16] vector containing the smaller value of |
| 2357 | 2349 | /// each comparison. |
| 2358 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a, | |
| 2359 | __m128i __b) { | |
| 2350 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2351 | _mm_min_epi16(__m128i __a, __m128i __b) { | |
| 2360 | 2352 | return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b); |
| 2361 | 2353 | } |
| 2362 | 2354 | |
| ... | ... | @@ -2374,8 +2366,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a, |
| 2374 | 2366 | /// A 128-bit unsigned [16 x i8] vector. |
| 2375 | 2367 | /// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of |
| 2376 | 2368 | /// each comparison. |
| 2377 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a, | |
| 2378 | __m128i __b) { | |
| 2369 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2370 | _mm_min_epu8(__m128i __a, __m128i __b) { | |
| 2379 | 2371 | return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b); |
| 2380 | 2372 | } |
| 2381 | 2373 | |
| ... | ... | @@ -2393,8 +2385,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a, |
| 2393 | 2385 | /// A 128-bit signed [8 x i16] vector. |
| 2394 | 2386 | /// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of |
| 2395 | 2387 | /// each of the eight 32-bit products. |
| 2396 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a, | |
| 2397 | __m128i __b) { | |
| 2388 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2389 | _mm_mulhi_epi16(__m128i __a, __m128i __b) { | |
| 2398 | 2390 | return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b); |
| 2399 | 2391 | } |
| 2400 | 2392 | |
| ... | ... | @@ -2412,9 +2404,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a, |
| 2412 | 2404 | /// A 128-bit unsigned [8 x i16] vector. |
| 2413 | 2405 | /// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits |
| 2414 | 2406 | /// of each of the eight 32-bit products. |
| 2415 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a, | |
| 2416 | __m128i __b) { | |
| 2417 | return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b); | |
| 2407 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2408 | _mm_mulhi_epu16(__m128i __a, __m128i __b) { | |
| 2409 | return (__m128i)__builtin_ia32_pmulhuw128((__v8hu)__a, (__v8hu)__b); | |
| 2418 | 2410 | } |
| 2419 | 2411 | |
| 2420 | 2412 | /// Multiplies the corresponding elements of two signed [8 x i16] |
| ... | ... | @@ -2431,8 +2423,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a, |
| 2431 | 2423 | /// A 128-bit signed [8 x i16] vector. |
| 2432 | 2424 | /// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of |
| 2433 | 2425 | /// each of the eight 32-bit products. |
| 2434 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a, | |
| 2435 | __m128i __b) { | |
| 2426 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2427 | _mm_mullo_epi16(__m128i __a, __m128i __b) { | |
| 2436 | 2428 | return (__m128i)((__v8hu)__a * (__v8hu)__b); |
| 2437 | 2429 | } |
| 2438 | 2430 | |
| ... | ... | @@ -2449,9 +2441,10 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a, |
| 2449 | 2441 | /// \param __b |
| 2450 | 2442 | /// A 64-bit integer containing one of the source operands. |
| 2451 | 2443 | /// \returns A 64-bit integer vector containing the product of both operands. |
| 2452 | static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_mul_su32(__m64 __a, __m64 __b) { | |
| 2453 | return __trunc64(__builtin_ia32_pmuludq128((__v4si)__anyext128(__a), | |
| 2454 | (__v4si)__anyext128(__b))); | |
| 2444 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_mul_su32(__m64 __a, | |
| 2445 | __m64 __b) { | |
| 2446 | return __trunc64(__builtin_ia32_pmuludq128((__v4si)__zext128(__a), | |
| 2447 | (__v4si)__zext128(__b))); | |
| 2455 | 2448 | } |
| 2456 | 2449 | |
| 2457 | 2450 | /// Multiplies 32-bit unsigned integer values contained in the lower |
| ... | ... | @@ -2467,8 +2460,8 @@ static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_mul_su32(__m64 __a, __m64 __b) { |
| 2467 | 2460 | /// \param __b |
| 2468 | 2461 | /// A [2 x i64] vector containing one of the source operands. |
| 2469 | 2462 | /// \returns A [2 x i64] vector containing the product of both operands. |
| 2470 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epu32(__m128i __a, | |
| 2471 | __m128i __b) { | |
| 2463 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2464 | _mm_mul_epu32(__m128i __a, __m128i __b) { | |
| 2472 | 2465 | return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b); |
| 2473 | 2466 | } |
| 2474 | 2467 | |
| ... | ... | @@ -2505,8 +2498,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a, |
| 2505 | 2498 | /// A 128-bit integer vector containing the subtrahends. |
| 2506 | 2499 | /// \returns A 128-bit integer vector containing the differences of the values |
| 2507 | 2500 | /// in the operands. |
| 2508 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a, | |
| 2509 | __m128i __b) { | |
| 2501 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2502 | _mm_sub_epi8(__m128i __a, __m128i __b) { | |
| 2510 | 2503 | return (__m128i)((__v16qu)__a - (__v16qu)__b); |
| 2511 | 2504 | } |
| 2512 | 2505 | |
| ... | ... | @@ -2522,8 +2515,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a, |
| 2522 | 2515 | /// A 128-bit integer vector containing the subtrahends. |
| 2523 | 2516 | /// \returns A 128-bit integer vector containing the differences of the values |
| 2524 | 2517 | /// in the operands. |
| 2525 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi16(__m128i __a, | |
| 2526 | __m128i __b) { | |
| 2518 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2519 | _mm_sub_epi16(__m128i __a, __m128i __b) { | |
| 2527 | 2520 | return (__m128i)((__v8hu)__a - (__v8hu)__b); |
| 2528 | 2521 | } |
| 2529 | 2522 | |
| ... | ... | @@ -2557,8 +2550,9 @@ _mm_sub_epi32(__m128i __a, __m128i __b) { |
| 2557 | 2550 | /// A 64-bit integer vector containing the subtrahend. |
| 2558 | 2551 | /// \returns A 64-bit integer vector containing the difference of the values in |
| 2559 | 2552 | /// the operands. |
| 2560 | static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_sub_si64(__m64 __a, __m64 __b) { | |
| 2561 | return (__m64)((unsigned long long)__a - (unsigned long long)__b); | |
| 2553 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sub_si64(__m64 __a, | |
| 2554 | __m64 __b) { | |
| 2555 | return (__m64)(((__v1du)__a)[0] - ((__v1du)__b)[0]); | |
| 2562 | 2556 | } |
| 2563 | 2557 | |
| 2564 | 2558 | /// Subtracts the corresponding elements of two [2 x i64] vectors. |
| ... | ... | @@ -2595,8 +2589,8 @@ _mm_sub_epi64(__m128i __a, __m128i __b) { |
| 2595 | 2589 | /// A 128-bit integer vector containing the subtrahends. |
| 2596 | 2590 | /// \returns A 128-bit integer vector containing the differences of the values |
| 2597 | 2591 | /// in the operands. |
| 2598 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a, | |
| 2599 | __m128i __b) { | |
| 2592 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2593 | _mm_subs_epi8(__m128i __a, __m128i __b) { | |
| 2600 | 2594 | return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b); |
| 2601 | 2595 | } |
| 2602 | 2596 | |
| ... | ... | @@ -2617,8 +2611,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a, |
| 2617 | 2611 | /// A 128-bit integer vector containing the subtrahends. |
| 2618 | 2612 | /// \returns A 128-bit integer vector containing the differences of the values |
| 2619 | 2613 | /// in the operands. |
| 2620 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a, | |
| 2621 | __m128i __b) { | |
| 2614 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2615 | _mm_subs_epi16(__m128i __a, __m128i __b) { | |
| 2622 | 2616 | return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b); |
| 2623 | 2617 | } |
| 2624 | 2618 | |
| ... | ... | @@ -2638,8 +2632,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a, |
| 2638 | 2632 | /// A 128-bit integer vector containing the subtrahends. |
| 2639 | 2633 | /// \returns A 128-bit integer vector containing the unsigned integer |
| 2640 | 2634 | /// differences of the values in the operands. |
| 2641 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a, | |
| 2642 | __m128i __b) { | |
| 2635 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2636 | _mm_subs_epu8(__m128i __a, __m128i __b) { | |
| 2643 | 2637 | return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b); |
| 2644 | 2638 | } |
| 2645 | 2639 | |
| ... | ... | @@ -2659,8 +2653,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a, |
| 2659 | 2653 | /// A 128-bit integer vector containing the subtrahends. |
| 2660 | 2654 | /// \returns A 128-bit integer vector containing the unsigned integer |
| 2661 | 2655 | /// differences of the values in the operands. |
| 2662 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a, | |
| 2663 | __m128i __b) { | |
| 2656 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2657 | _mm_subs_epu16(__m128i __a, __m128i __b) { | |
| 2664 | 2658 | return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b); |
| 2665 | 2659 | } |
| 2666 | 2660 | |
| ... | ... | @@ -2676,8 +2670,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a, |
| 2676 | 2670 | /// A 128-bit integer vector containing one of the source operands. |
| 2677 | 2671 | /// \returns A 128-bit integer vector containing the bitwise AND of the values |
| 2678 | 2672 | /// in both operands. |
| 2679 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a, | |
| 2680 | __m128i __b) { | |
| 2673 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2674 | _mm_and_si128(__m128i __a, __m128i __b) { | |
| 2681 | 2675 | return (__m128i)((__v2du)__a & (__v2du)__b); |
| 2682 | 2676 | } |
| 2683 | 2677 | |
| ... | ... | @@ -2695,8 +2689,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a, |
| 2695 | 2689 | /// A 128-bit vector containing the right source operand. |
| 2696 | 2690 | /// \returns A 128-bit integer vector containing the bitwise AND of the one's |
| 2697 | 2691 | /// complement of the first operand and the values in the second operand. |
| 2698 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a, | |
| 2699 | __m128i __b) { | |
| 2692 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2693 | _mm_andnot_si128(__m128i __a, __m128i __b) { | |
| 2700 | 2694 | return (__m128i)(~(__v2du)__a & (__v2du)__b); |
| 2701 | 2695 | } |
| 2702 | 2696 | /// Performs a bitwise OR of two 128-bit integer vectors. |
| ... | ... | @@ -2711,8 +2705,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a, |
| 2711 | 2705 | /// A 128-bit integer vector containing one of the source operands. |
| 2712 | 2706 | /// \returns A 128-bit integer vector containing the bitwise OR of the values |
| 2713 | 2707 | /// in both operands. |
| 2714 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a, | |
| 2715 | __m128i __b) { | |
| 2708 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2709 | _mm_or_si128(__m128i __a, __m128i __b) { | |
| 2716 | 2710 | return (__m128i)((__v2du)__a | (__v2du)__b); |
| 2717 | 2711 | } |
| 2718 | 2712 | |
| ... | ... | @@ -2728,8 +2722,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a, |
| 2728 | 2722 | /// A 128-bit integer vector containing one of the source operands. |
| 2729 | 2723 | /// \returns A 128-bit integer vector containing the bitwise exclusive OR of the |
| 2730 | 2724 | /// values in both operands. |
| 2731 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a, | |
| 2732 | __m128i __b) { | |
| 2725 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2726 | _mm_xor_si128(__m128i __a, __m128i __b) { | |
| 2733 | 2727 | return (__m128i)((__v2du)__a ^ (__v2du)__b); |
| 2734 | 2728 | } |
| 2735 | 2729 | |
| ... | ... | @@ -2751,11 +2745,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a, |
| 2751 | 2745 | /// \a a. |
| 2752 | 2746 | /// \returns A 128-bit integer vector containing the left-shifted value. |
| 2753 | 2747 | #define _mm_slli_si128(a, imm) \ |
| 2754 | ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \ | |
| 2748 | ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)(__m128i)(a), \ | |
| 2755 | 2749 | (int)(imm))) |
| 2756 | 2750 | |
| 2757 | 2751 | #define _mm_bslli_si128(a, imm) \ |
| 2758 | ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \ | |
| 2752 | ((__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)(__m128i)(a), \ | |
| 2759 | 2753 | (int)(imm))) |
| 2760 | 2754 | |
| 2761 | 2755 | /// Left-shifts each 16-bit value in the 128-bit integer vector operand |
| ... | ... | @@ -2771,8 +2765,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a, |
| 2771 | 2765 | /// An integer value specifying the number of bits to left-shift each value |
| 2772 | 2766 | /// in operand \a __a. |
| 2773 | 2767 | /// \returns A 128-bit integer vector containing the left-shifted values. |
| 2774 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a, | |
| 2775 | int __count) { | |
| 2768 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2769 | _mm_slli_epi16(__m128i __a, int __count) { | |
| 2776 | 2770 | return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count); |
| 2777 | 2771 | } |
| 2778 | 2772 | |
| ... | ... | @@ -2789,8 +2783,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a, |
| 2789 | 2783 | /// A 128-bit integer vector in which bits [63:0] specify the number of bits |
| 2790 | 2784 | /// to left-shift each value in operand \a __a. |
| 2791 | 2785 | /// \returns A 128-bit integer vector containing the left-shifted values. |
| 2792 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a, | |
| 2793 | __m128i __count) { | |
| 2786 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2787 | _mm_sll_epi16(__m128i __a, __m128i __count) { | |
| 2794 | 2788 | return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count); |
| 2795 | 2789 | } |
| 2796 | 2790 | |
| ... | ... | @@ -2807,8 +2801,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a, |
| 2807 | 2801 | /// An integer value specifying the number of bits to left-shift each value |
| 2808 | 2802 | /// in operand \a __a. |
| 2809 | 2803 | /// \returns A 128-bit integer vector containing the left-shifted values. |
| 2810 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a, | |
| 2811 | int __count) { | |
| 2804 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2805 | _mm_slli_epi32(__m128i __a, int __count) { | |
| 2812 | 2806 | return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count); |
| 2813 | 2807 | } |
| 2814 | 2808 | |
| ... | ... | @@ -2825,8 +2819,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a, |
| 2825 | 2819 | /// A 128-bit integer vector in which bits [63:0] specify the number of bits |
| 2826 | 2820 | /// to left-shift each value in operand \a __a. |
| 2827 | 2821 | /// \returns A 128-bit integer vector containing the left-shifted values. |
| 2828 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a, | |
| 2829 | __m128i __count) { | |
| 2822 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2823 | _mm_sll_epi32(__m128i __a, __m128i __count) { | |
| 2830 | 2824 | return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count); |
| 2831 | 2825 | } |
| 2832 | 2826 | |
| ... | ... | @@ -2843,8 +2837,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a, |
| 2843 | 2837 | /// An integer value specifying the number of bits to left-shift each value |
| 2844 | 2838 | /// in operand \a __a. |
| 2845 | 2839 | /// \returns A 128-bit integer vector containing the left-shifted values. |
| 2846 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a, | |
| 2847 | int __count) { | |
| 2840 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2841 | _mm_slli_epi64(__m128i __a, int __count) { | |
| 2848 | 2842 | return __builtin_ia32_psllqi128((__v2di)__a, __count); |
| 2849 | 2843 | } |
| 2850 | 2844 | |
| ... | ... | @@ -2861,8 +2855,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a, |
| 2861 | 2855 | /// A 128-bit integer vector in which bits [63:0] specify the number of bits |
| 2862 | 2856 | /// to left-shift each value in operand \a __a. |
| 2863 | 2857 | /// \returns A 128-bit integer vector containing the left-shifted values. |
| 2864 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a, | |
| 2865 | __m128i __count) { | |
| 2858 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2859 | _mm_sll_epi64(__m128i __a, __m128i __count) { | |
| 2866 | 2860 | return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count); |
| 2867 | 2861 | } |
| 2868 | 2862 | |
| ... | ... | @@ -2880,8 +2874,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a, |
| 2880 | 2874 | /// An integer value specifying the number of bits to right-shift each value |
| 2881 | 2875 | /// in operand \a __a. |
| 2882 | 2876 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 2883 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a, | |
| 2884 | int __count) { | |
| 2877 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2878 | _mm_srai_epi16(__m128i __a, int __count) { | |
| 2885 | 2879 | return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count); |
| 2886 | 2880 | } |
| 2887 | 2881 | |
| ... | ... | @@ -2899,8 +2893,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a, |
| 2899 | 2893 | /// A 128-bit integer vector in which bits [63:0] specify the number of bits |
| 2900 | 2894 | /// to right-shift each value in operand \a __a. |
| 2901 | 2895 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 2902 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a, | |
| 2903 | __m128i __count) { | |
| 2896 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2897 | _mm_sra_epi16(__m128i __a, __m128i __count) { | |
| 2904 | 2898 | return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count); |
| 2905 | 2899 | } |
| 2906 | 2900 | |
| ... | ... | @@ -2918,8 +2912,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a, |
| 2918 | 2912 | /// An integer value specifying the number of bits to right-shift each value |
| 2919 | 2913 | /// in operand \a __a. |
| 2920 | 2914 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 2921 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a, | |
| 2922 | int __count) { | |
| 2915 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2916 | _mm_srai_epi32(__m128i __a, int __count) { | |
| 2923 | 2917 | return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count); |
| 2924 | 2918 | } |
| 2925 | 2919 | |
| ... | ... | @@ -2937,8 +2931,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a, |
| 2937 | 2931 | /// A 128-bit integer vector in which bits [63:0] specify the number of bits |
| 2938 | 2932 | /// to right-shift each value in operand \a __a. |
| 2939 | 2933 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 2940 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a, | |
| 2941 | __m128i __count) { | |
| 2934 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2935 | _mm_sra_epi32(__m128i __a, __m128i __count) { | |
| 2942 | 2936 | return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count); |
| 2943 | 2937 | } |
| 2944 | 2938 | |
| ... | ... | @@ -2960,11 +2954,11 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a, |
| 2960 | 2954 | /// \a a. |
| 2961 | 2955 | /// \returns A 128-bit integer vector containing the right-shifted value. |
| 2962 | 2956 | #define _mm_srli_si128(a, imm) \ |
| 2963 | ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \ | |
| 2957 | ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v16qi)(__m128i)(a), \ | |
| 2964 | 2958 | (int)(imm))) |
| 2965 | 2959 | |
| 2966 | 2960 | #define _mm_bsrli_si128(a, imm) \ |
| 2967 | ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \ | |
| 2961 | ((__m128i)__builtin_ia32_psrldqi128_byteshift((__v16qi)(__m128i)(a), \ | |
| 2968 | 2962 | (int)(imm))) |
| 2969 | 2963 | |
| 2970 | 2964 | /// Right-shifts each of 16-bit values in the 128-bit integer vector |
| ... | ... | @@ -2980,8 +2974,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a, |
| 2980 | 2974 | /// An integer value specifying the number of bits to right-shift each value |
| 2981 | 2975 | /// in operand \a __a. |
| 2982 | 2976 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 2983 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a, | |
| 2984 | int __count) { | |
| 2977 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2978 | _mm_srli_epi16(__m128i __a, int __count) { | |
| 2985 | 2979 | return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count); |
| 2986 | 2980 | } |
| 2987 | 2981 | |
| ... | ... | @@ -2998,8 +2992,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a, |
| 2998 | 2992 | /// A 128-bit integer vector in which bits [63:0] specify the number of bits |
| 2999 | 2993 | /// to right-shift each value in operand \a __a. |
| 3000 | 2994 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 3001 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a, | |
| 3002 | __m128i __count) { | |
| 2995 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2996 | _mm_srl_epi16(__m128i __a, __m128i __count) { | |
| 3003 | 2997 | return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count); |
| 3004 | 2998 | } |
| 3005 | 2999 | |
| ... | ... | @@ -3016,8 +3010,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a, |
| 3016 | 3010 | /// An integer value specifying the number of bits to right-shift each value |
| 3017 | 3011 | /// in operand \a __a. |
| 3018 | 3012 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 3019 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a, | |
| 3020 | int __count) { | |
| 3013 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3014 | _mm_srli_epi32(__m128i __a, int __count) { | |
| 3021 | 3015 | return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count); |
| 3022 | 3016 | } |
| 3023 | 3017 | |
| ... | ... | @@ -3034,8 +3028,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a, |
| 3034 | 3028 | /// A 128-bit integer vector in which bits [63:0] specify the number of bits |
| 3035 | 3029 | /// to right-shift each value in operand \a __a. |
| 3036 | 3030 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 3037 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a, | |
| 3038 | __m128i __count) { | |
| 3031 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3032 | _mm_srl_epi32(__m128i __a, __m128i __count) { | |
| 3039 | 3033 | return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count); |
| 3040 | 3034 | } |
| 3041 | 3035 | |
| ... | ... | @@ -3052,8 +3046,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a, |
| 3052 | 3046 | /// An integer value specifying the number of bits to right-shift each value |
| 3053 | 3047 | /// in operand \a __a. |
| 3054 | 3048 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 3055 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a, | |
| 3056 | int __count) { | |
| 3049 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3050 | _mm_srli_epi64(__m128i __a, int __count) { | |
| 3057 | 3051 | return __builtin_ia32_psrlqi128((__v2di)__a, __count); |
| 3058 | 3052 | } |
| 3059 | 3053 | |
| ... | ... | @@ -3070,8 +3064,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a, |
| 3070 | 3064 | /// A 128-bit integer vector in which bits [63:0] specify the number of bits |
| 3071 | 3065 | /// to right-shift each value in operand \a __a. |
| 3072 | 3066 | /// \returns A 128-bit integer vector containing the right-shifted values. |
| 3073 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a, | |
| 3074 | __m128i __count) { | |
| 3067 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3068 | _mm_srl_epi64(__m128i __a, __m128i __count) { | |
| 3075 | 3069 | return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count); |
| 3076 | 3070 | } |
| 3077 | 3071 | |
| ... | ... | @@ -3089,8 +3083,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a, |
| 3089 | 3083 | /// \param __b |
| 3090 | 3084 | /// A 128-bit integer vector. |
| 3091 | 3085 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3092 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a, | |
| 3093 | __m128i __b) { | |
| 3086 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3087 | _mm_cmpeq_epi8(__m128i __a, __m128i __b) { | |
| 3094 | 3088 | return (__m128i)((__v16qi)__a == (__v16qi)__b); |
| 3095 | 3089 | } |
| 3096 | 3090 | |
| ... | ... | @@ -3108,8 +3102,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a, |
| 3108 | 3102 | /// \param __b |
| 3109 | 3103 | /// A 128-bit integer vector. |
| 3110 | 3104 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3111 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a, | |
| 3112 | __m128i __b) { | |
| 3105 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3106 | _mm_cmpeq_epi16(__m128i __a, __m128i __b) { | |
| 3113 | 3107 | return (__m128i)((__v8hi)__a == (__v8hi)__b); |
| 3114 | 3108 | } |
| 3115 | 3109 | |
| ... | ... | @@ -3127,8 +3121,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a, |
| 3127 | 3121 | /// \param __b |
| 3128 | 3122 | /// A 128-bit integer vector. |
| 3129 | 3123 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3130 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a, | |
| 3131 | __m128i __b) { | |
| 3124 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3125 | _mm_cmpeq_epi32(__m128i __a, __m128i __b) { | |
| 3132 | 3126 | return (__m128i)((__v4si)__a == (__v4si)__b); |
| 3133 | 3127 | } |
| 3134 | 3128 | |
| ... | ... | @@ -3147,8 +3141,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a, |
| 3147 | 3141 | /// \param __b |
| 3148 | 3142 | /// A 128-bit integer vector. |
| 3149 | 3143 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3150 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a, | |
| 3151 | __m128i __b) { | |
| 3144 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3145 | _mm_cmpgt_epi8(__m128i __a, __m128i __b) { | |
| 3152 | 3146 | /* This function always performs a signed comparison, but __v16qi is a char |
| 3153 | 3147 | which may be signed or unsigned, so use __v16qs. */ |
| 3154 | 3148 | return (__m128i)((__v16qs)__a > (__v16qs)__b); |
| ... | ... | @@ -3169,8 +3163,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a, |
| 3169 | 3163 | /// \param __b |
| 3170 | 3164 | /// A 128-bit integer vector. |
| 3171 | 3165 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3172 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a, | |
| 3173 | __m128i __b) { | |
| 3166 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3167 | _mm_cmpgt_epi16(__m128i __a, __m128i __b) { | |
| 3174 | 3168 | return (__m128i)((__v8hi)__a > (__v8hi)__b); |
| 3175 | 3169 | } |
| 3176 | 3170 | |
| ... | ... | @@ -3189,8 +3183,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a, |
| 3189 | 3183 | /// \param __b |
| 3190 | 3184 | /// A 128-bit integer vector. |
| 3191 | 3185 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3192 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a, | |
| 3193 | __m128i __b) { | |
| 3186 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3187 | _mm_cmpgt_epi32(__m128i __a, __m128i __b) { | |
| 3194 | 3188 | return (__m128i)((__v4si)__a > (__v4si)__b); |
| 3195 | 3189 | } |
| 3196 | 3190 | |
| ... | ... | @@ -3209,8 +3203,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a, |
| 3209 | 3203 | /// \param __b |
| 3210 | 3204 | /// A 128-bit integer vector. |
| 3211 | 3205 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3212 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a, | |
| 3213 | __m128i __b) { | |
| 3206 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3207 | _mm_cmplt_epi8(__m128i __a, __m128i __b) { | |
| 3214 | 3208 | return _mm_cmpgt_epi8(__b, __a); |
| 3215 | 3209 | } |
| 3216 | 3210 | |
| ... | ... | @@ -3229,8 +3223,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a, |
| 3229 | 3223 | /// \param __b |
| 3230 | 3224 | /// A 128-bit integer vector. |
| 3231 | 3225 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3232 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a, | |
| 3233 | __m128i __b) { | |
| 3226 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3227 | _mm_cmplt_epi16(__m128i __a, __m128i __b) { | |
| 3234 | 3228 | return _mm_cmpgt_epi16(__b, __a); |
| 3235 | 3229 | } |
| 3236 | 3230 | |
| ... | ... | @@ -3249,8 +3243,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a, |
| 3249 | 3243 | /// \param __b |
| 3250 | 3244 | /// A 128-bit integer vector. |
| 3251 | 3245 | /// \returns A 128-bit integer vector containing the comparison results. |
| 3252 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi32(__m128i __a, | |
| 3253 | __m128i __b) { | |
| 3246 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3247 | _mm_cmplt_epi32(__m128i __a, __m128i __b) { | |
| 3254 | 3248 | return _mm_cmpgt_epi32(__b, __a); |
| 3255 | 3249 | } |
| 3256 | 3250 | |
| ... | ... | @@ -3379,7 +3373,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) { |
| 3379 | 3373 | /// \param __a |
| 3380 | 3374 | /// A 32-bit signed integer operand. |
| 3381 | 3375 | /// \returns A 128-bit vector of [4 x i32]. |
| 3382 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) { | |
| 3376 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3377 | _mm_cvtsi32_si128(int __a) { | |
| 3383 | 3378 | return __extension__(__m128i)(__v4si){__a, 0, 0, 0}; |
| 3384 | 3379 | } |
| 3385 | 3380 | |
| ... | ... | @@ -3394,7 +3389,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) { |
| 3394 | 3389 | /// \param __a |
| 3395 | 3390 | /// A 64-bit signed integer operand containing the value to be converted. |
| 3396 | 3391 | /// \returns A 128-bit vector of [2 x i64] containing the converted value. |
| 3397 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) { | |
| 3392 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3393 | _mm_cvtsi64_si128(long long __a) { | |
| 3398 | 3394 | return __extension__(__m128i)(__v2di){__a, 0}; |
| 3399 | 3395 | } |
| 3400 | 3396 | |
| ... | ... | @@ -3409,7 +3405,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) { |
| 3409 | 3405 | /// A vector of [4 x i32]. The least significant 32 bits are moved to the |
| 3410 | 3406 | /// destination. |
| 3411 | 3407 | /// \returns A 32-bit signed integer containing the moved value. |
| 3412 | static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) { | |
| 3408 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3409 | _mm_cvtsi128_si32(__m128i __a) { | |
| 3413 | 3410 | __v4si __b = (__v4si)__a; |
| 3414 | 3411 | return __b[0]; |
| 3415 | 3412 | } |
| ... | ... | @@ -3425,7 +3422,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) { |
| 3425 | 3422 | /// A vector of [2 x i64]. The least significant 64 bits are moved to the |
| 3426 | 3423 | /// destination. |
| 3427 | 3424 | /// \returns A 64-bit signed integer containing the moved value. |
| 3428 | static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) { | |
| 3425 | static __inline__ long long __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 3426 | _mm_cvtsi128_si64(__m128i __a) { | |
| 3429 | 3427 | return __a[0]; |
| 3430 | 3428 | } |
| 3431 | 3429 | |
| ... | ... | @@ -4161,8 +4159,8 @@ void _mm_mfence(void); |
| 4161 | 4159 | /// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are |
| 4162 | 4160 | /// written to the higher 64 bits of the result. |
| 4163 | 4161 | /// \returns A 128-bit vector of [16 x i8] containing the converted values. |
| 4164 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a, | |
| 4165 | __m128i __b) { | |
| 4162 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4163 | _mm_packs_epi16(__m128i __a, __m128i __b) { | |
| 4166 | 4164 | return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b); |
| 4167 | 4165 | } |
| 4168 | 4166 | |
| ... | ... | @@ -4184,8 +4182,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a, |
| 4184 | 4182 | /// A 128-bit integer vector of [4 x i32]. The converted [4 x i16] values |
| 4185 | 4183 | /// are written to the higher 64 bits of the result. |
| 4186 | 4184 | /// \returns A 128-bit vector of [8 x i16] containing the converted values. |
| 4187 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a, | |
| 4188 | __m128i __b) { | |
| 4185 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4186 | _mm_packs_epi32(__m128i __a, __m128i __b) { | |
| 4189 | 4187 | return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b); |
| 4190 | 4188 | } |
| 4191 | 4189 | |
| ... | ... | @@ -4207,8 +4205,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a, |
| 4207 | 4205 | /// A 128-bit integer vector of [8 x i16]. The converted [8 x i8] values are |
| 4208 | 4206 | /// written to the higher 64 bits of the result. |
| 4209 | 4207 | /// \returns A 128-bit vector of [16 x i8] containing the converted values. |
| 4210 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a, | |
| 4211 | __m128i __b) { | |
| 4208 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4209 | _mm_packus_epi16(__m128i __a, __m128i __b) { | |
| 4212 | 4210 | return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b); |
| 4213 | 4211 | } |
| 4214 | 4212 | |
| ... | ... | @@ -4282,7 +4280,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a, |
| 4282 | 4280 | /// A 128-bit integer vector containing the values with bits to be extracted. |
| 4283 | 4281 | /// \returns The most significant bits from each 8-bit element in \a __a, |
| 4284 | 4282 | /// written to bits [15:0]. The other bits are assigned zeros. |
| 4285 | static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) { | |
| 4283 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4284 | _mm_movemask_epi8(__m128i __a) { | |
| 4286 | 4285 | return __builtin_ia32_pmovmskb128((__v16qi)__a); |
| 4287 | 4286 | } |
| 4288 | 4287 | |
| ... | ... | @@ -4415,8 +4414,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) { |
| 4415 | 4414 | /// Bits [119:112] are written to bits [111:104] of the result. \n |
| 4416 | 4415 | /// Bits [127:120] are written to bits [127:120] of the result. |
| 4417 | 4416 | /// \returns A 128-bit vector of [16 x i8] containing the interleaved values. |
| 4418 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a, | |
| 4419 | __m128i __b) { | |
| 4417 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4418 | _mm_unpackhi_epi8(__m128i __a, __m128i __b) { | |
| 4420 | 4419 | return (__m128i)__builtin_shufflevector( |
| 4421 | 4420 | (__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11, |
| 4422 | 4421 | 16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15); |
| ... | ... | @@ -4443,8 +4442,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a, |
| 4443 | 4442 | /// Bits [111:96] are written to bits [95:80] of the result. \n |
| 4444 | 4443 | /// Bits [127:112] are written to bits [127:112] of the result. |
| 4445 | 4444 | /// \returns A 128-bit vector of [8 x i16] containing the interleaved values. |
| 4446 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a, | |
| 4447 | __m128i __b) { | |
| 4445 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4446 | _mm_unpackhi_epi16(__m128i __a, __m128i __b) { | |
| 4448 | 4447 | return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5, |
| 4449 | 4448 | 8 + 5, 6, 8 + 6, 7, 8 + 7); |
| 4450 | 4449 | } |
| ... | ... | @@ -4466,8 +4465,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a, |
| 4466 | 4465 | /// Bits [95:64] are written to bits [64:32] of the destination. \n |
| 4467 | 4466 | /// Bits [127:96] are written to bits [127:96] of the destination. |
| 4468 | 4467 | /// \returns A 128-bit vector of [4 x i32] containing the interleaved values. |
| 4469 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a, | |
| 4470 | __m128i __b) { | |
| 4468 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4469 | _mm_unpackhi_epi32(__m128i __a, __m128i __b) { | |
| 4471 | 4470 | return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3, |
| 4472 | 4471 | 4 + 3); |
| 4473 | 4472 | } |
| ... | ... | @@ -4487,8 +4486,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a, |
| 4487 | 4486 | /// A 128-bit vector of [2 x i64]. \n |
| 4488 | 4487 | /// Bits [127:64] are written to bits [127:64] of the destination. |
| 4489 | 4488 | /// \returns A 128-bit vector of [2 x i64] containing the interleaved values. |
| 4490 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a, | |
| 4491 | __m128i __b) { | |
| 4489 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4490 | _mm_unpackhi_epi64(__m128i __a, __m128i __b) { | |
| 4492 | 4491 | return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1); |
| 4493 | 4492 | } |
| 4494 | 4493 | |
| ... | ... | @@ -4521,8 +4520,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a, |
| 4521 | 4520 | /// Bits [55:48] are written to bits [111:104] of the result. \n |
| 4522 | 4521 | /// Bits [63:56] are written to bits [127:120] of the result. |
| 4523 | 4522 | /// \returns A 128-bit vector of [16 x i8] containing the interleaved values. |
| 4524 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a, | |
| 4525 | __m128i __b) { | |
| 4523 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4524 | _mm_unpacklo_epi8(__m128i __a, __m128i __b) { | |
| 4526 | 4525 | return (__m128i)__builtin_shufflevector( |
| 4527 | 4526 | (__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4, |
| 4528 | 4527 | 16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7); |
| ... | ... | @@ -4550,8 +4549,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a, |
| 4550 | 4549 | /// Bits [47:32] are written to bits [95:80] of the result. \n |
| 4551 | 4550 | /// Bits [63:48] are written to bits [127:112] of the result. |
| 4552 | 4551 | /// \returns A 128-bit vector of [8 x i16] containing the interleaved values. |
| 4553 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a, | |
| 4554 | __m128i __b) { | |
| 4552 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4553 | _mm_unpacklo_epi16(__m128i __a, __m128i __b) { | |
| 4555 | 4554 | return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1, |
| 4556 | 4555 | 8 + 1, 2, 8 + 2, 3, 8 + 3); |
| 4557 | 4556 | } |
| ... | ... | @@ -4573,8 +4572,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a, |
| 4573 | 4572 | /// Bits [31:0] are written to bits [64:32] of the destination. \n |
| 4574 | 4573 | /// Bits [63:32] are written to bits [127:96] of the destination. |
| 4575 | 4574 | /// \returns A 128-bit vector of [4 x i32] containing the interleaved values. |
| 4576 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a, | |
| 4577 | __m128i __b) { | |
| 4575 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4576 | _mm_unpacklo_epi32(__m128i __a, __m128i __b) { | |
| 4578 | 4577 | return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1, |
| 4579 | 4578 | 4 + 1); |
| 4580 | 4579 | } |
| ... | ... | @@ -4594,8 +4593,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a, |
| 4594 | 4593 | /// A 128-bit vector of [2 x i64]. \n |
| 4595 | 4594 | /// Bits [63:0] are written to bits [127:64] of the destination. \n |
| 4596 | 4595 | /// \returns A 128-bit vector of [2 x i64] containing the interleaved values. |
| 4597 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi64(__m128i __a, | |
| 4598 | __m128i __b) { | |
| 4596 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4597 | _mm_unpacklo_epi64(__m128i __a, __m128i __b) { | |
| 4599 | 4598 | return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0); |
| 4600 | 4599 | } |
| 4601 | 4600 | |
| ... | ... | @@ -4701,7 +4700,8 @@ _mm_unpacklo_pd(__m128d __a, __m128d __b) { |
| 4701 | 4700 | /// be extracted. |
| 4702 | 4701 | /// \returns The sign bits from each of the double-precision elements in \a __a, |
| 4703 | 4702 | /// written to bits [1:0]. The remaining bits are assigned values of zero. |
| 4704 | static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_pd(__m128d __a) { | |
| 4703 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 4704 | _mm_movemask_pd(__m128d __a) { | |
| 4705 | 4705 | return __builtin_ia32_movmskpd((__v2df)__a); |
| 4706 | 4706 | } |
| 4707 | 4707 |
lib/include/f16cintrin.h+23-9| ... | ... | @@ -15,10 +15,21 @@ |
| 15 | 15 | #define __F16CINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #define __DEFAULT_FN_ATTRS128 \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(128))) | |
| 20 | #define __DEFAULT_FN_ATTRS256 \ | |
| 21 | __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(256))) | |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 19 | #define __DEFAULT_FN_ATTRS128 \ | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("f16c"), \ | |
| 21 | __min_vector_width__(128))) constexpr | |
| 22 | #define __DEFAULT_FN_ATTRS256 \ | |
| 23 | __attribute__((__always_inline__, __nodebug__, __target__("f16c"), \ | |
| 24 | __min_vector_width__(256))) constexpr | |
| 25 | #else | |
| 26 | #define __DEFAULT_FN_ATTRS128 \ | |
| 27 | __attribute__((__always_inline__, __nodebug__, __target__("f16c"), \ | |
| 28 | __min_vector_width__(128))) | |
| 29 | #define __DEFAULT_FN_ATTRS256 \ | |
| 30 | __attribute__((__always_inline__, __nodebug__, __target__("f16c"), \ | |
| 31 | __min_vector_width__(256))) | |
| 32 | #endif | |
| 22 | 33 | |
| 23 | 34 | /* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h, |
| 24 | 35 | * but that's because icc can emulate these without f16c using a library call. |
| ... | ... | @@ -38,9 +49,7 @@ |
| 38 | 49 | static __inline float __DEFAULT_FN_ATTRS128 |
| 39 | 50 | _cvtsh_ss(unsigned short __a) |
| 40 | 51 | { |
| 41 | __v8hi __v = {(short)__a, 0, 0, 0, 0, 0, 0, 0}; | |
| 42 | __v4sf __r = __builtin_ia32_vcvtph2ps(__v); | |
| 43 | return __r[0]; | |
| 52 | return (float)__builtin_bit_cast(__fp16, __a); | |
| 44 | 53 | } |
| 45 | 54 | |
| 46 | 55 | /// Converts a 32-bit single-precision float value to a 16-bit |
| ... | ... | @@ -109,7 +118,10 @@ _cvtsh_ss(unsigned short __a) |
| 109 | 118 | static __inline __m128 __DEFAULT_FN_ATTRS128 |
| 110 | 119 | _mm_cvtph_ps(__m128i __a) |
| 111 | 120 | { |
| 112 | return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a); | |
| 121 | typedef __fp16 __v4fp16 __attribute__((__vector_size__(8))); | |
| 122 | ||
| 123 | __v4hi __v = __builtin_shufflevector((__v8hi)__a, (__v8hi)__a, 0, 1, 2, 3); | |
| 124 | return (__m128) __builtin_convertvector((__v4fp16)__v, __v4sf); | |
| 113 | 125 | } |
| 114 | 126 | |
| 115 | 127 | /// Converts a 256-bit vector of [8 x float] into a 128-bit vector |
| ... | ... | @@ -153,7 +165,9 @@ _mm_cvtph_ps(__m128i __a) |
| 153 | 165 | static __inline __m256 __DEFAULT_FN_ATTRS256 |
| 154 | 166 | _mm256_cvtph_ps(__m128i __a) |
| 155 | 167 | { |
| 156 | return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a); | |
| 168 | typedef __fp16 __v8fp16 __attribute__((__vector_size__(16), __aligned__(16))); | |
| 169 | ||
| 170 | return (__m256) __builtin_convertvector((__v8fp16)__a, __v8sf); | |
| 157 | 171 | } |
| 158 | 172 | |
| 159 | 173 | #undef __DEFAULT_FN_ATTRS128 |
lib/include/float.h+16-155| ... | ... | @@ -7,13 +7,21 @@ |
| 7 | 7 | *===-----------------------------------------------------------------------=== |
| 8 | 8 | */ |
| 9 | 9 | |
| 10 | #ifndef __CLANG_FLOAT_H | |
| 11 | #define __CLANG_FLOAT_H | |
| 12 | ||
| 13 | 10 | #if defined(__MVS__) && __has_include_next(<float.h>) |
| 11 | #include <__float_header_macro.h> | |
| 14 | 12 | #include_next <float.h> |
| 15 | 13 | #else |
| 16 | 14 | |
| 15 | #if !defined(__need_infinity_nan) | |
| 16 | #define __need_float_float | |
| 17 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ | |
| 18 | !defined(__STRICT_ANSI__) | |
| 19 | #define __need_infinity_nan | |
| 20 | #endif | |
| 21 | #include <__float_header_macro.h> | |
| 22 | #endif | |
| 23 | ||
| 24 | #ifdef __need_float_float | |
| 17 | 25 | /* If we're on MinGW, fall back to the system's float.h, which might have |
| 18 | 26 | * additional definitions provided for Windows. |
| 19 | 27 | * For more details see http://msdn.microsoft.com/en-us/library/y0ybw9fy.aspx |
| ... | ... | @@ -26,162 +34,15 @@ |
| 26 | 34 | |
| 27 | 35 | # include_next <float.h> |
| 28 | 36 | |
| 29 | /* Undefine anything that we'll be redefining below. */ | |
| 30 | # undef FLT_EVAL_METHOD | |
| 31 | # undef FLT_ROUNDS | |
| 32 | # undef FLT_RADIX | |
| 33 | # undef FLT_MANT_DIG | |
| 34 | # undef DBL_MANT_DIG | |
| 35 | # undef LDBL_MANT_DIG | |
| 36 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ | |
| 37 | !defined(__STRICT_ANSI__) || \ | |
| 38 | (defined(__cplusplus) && __cplusplus >= 201103L) || \ | |
| 39 | (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) | |
| 40 | # undef DECIMAL_DIG | |
| 41 | # endif | |
| 42 | # undef FLT_DIG | |
| 43 | # undef DBL_DIG | |
| 44 | # undef LDBL_DIG | |
| 45 | # undef FLT_MIN_EXP | |
| 46 | # undef DBL_MIN_EXP | |
| 47 | # undef LDBL_MIN_EXP | |
| 48 | # undef FLT_MIN_10_EXP | |
| 49 | # undef DBL_MIN_10_EXP | |
| 50 | # undef LDBL_MIN_10_EXP | |
| 51 | # undef FLT_MAX_EXP | |
| 52 | # undef DBL_MAX_EXP | |
| 53 | # undef LDBL_MAX_EXP | |
| 54 | # undef FLT_MAX_10_EXP | |
| 55 | # undef DBL_MAX_10_EXP | |
| 56 | # undef LDBL_MAX_10_EXP | |
| 57 | # undef FLT_MAX | |
| 58 | # undef DBL_MAX | |
| 59 | # undef LDBL_MAX | |
| 60 | # undef FLT_EPSILON | |
| 61 | # undef DBL_EPSILON | |
| 62 | # undef LDBL_EPSILON | |
| 63 | # undef FLT_MIN | |
| 64 | # undef DBL_MIN | |
| 65 | # undef LDBL_MIN | |
| 66 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \ | |
| 67 | !defined(__STRICT_ANSI__) || \ | |
| 68 | (defined(__cplusplus) && __cplusplus >= 201703L) || \ | |
| 69 | (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) | |
| 70 | # undef FLT_TRUE_MIN | |
| 71 | # undef DBL_TRUE_MIN | |
| 72 | # undef LDBL_TRUE_MIN | |
| 73 | # undef FLT_DECIMAL_DIG | |
| 74 | # undef DBL_DECIMAL_DIG | |
| 75 | # undef LDBL_DECIMAL_DIG | |
| 76 | # undef FLT_HAS_SUBNORM | |
| 77 | # undef DBL_HAS_SUBNORM | |
| 78 | # undef LDBL_HAS_SUBNORM | |
| 79 | # endif | |
| 80 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ | |
| 81 | !defined(__STRICT_ANSI__) | |
| 82 | # undef FLT_NORM_MAX | |
| 83 | # undef DBL_NORM_MAX | |
| 84 | # undef LDBL_NORM_MAX | |
| 85 | #endif | |
| 86 | #endif | |
| 87 | ||
| 88 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ | |
| 89 | !defined(__STRICT_ANSI__) | |
| 90 | # undef INFINITY | |
| 91 | # undef NAN | |
| 92 | #endif | |
| 93 | ||
| 94 | /* Characteristics of floating point types, C99 5.2.4.2.2 */ | |
| 95 | ||
| 96 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ | |
| 97 | (defined(__cplusplus) && __cplusplus >= 201103L) | |
| 98 | #define FLT_EVAL_METHOD __FLT_EVAL_METHOD__ | |
| 99 | 37 | #endif |
| 100 | #define FLT_ROUNDS (__builtin_flt_rounds()) | |
| 101 | #define FLT_RADIX __FLT_RADIX__ | |
| 102 | ||
| 103 | #define FLT_MANT_DIG __FLT_MANT_DIG__ | |
| 104 | #define DBL_MANT_DIG __DBL_MANT_DIG__ | |
| 105 | #define LDBL_MANT_DIG __LDBL_MANT_DIG__ | |
| 106 | 38 | |
| 107 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || \ | |
| 108 | !defined(__STRICT_ANSI__) || \ | |
| 109 | (defined(__cplusplus) && __cplusplus >= 201103L) || \ | |
| 110 | (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) | |
| 111 | # define DECIMAL_DIG __DECIMAL_DIG__ | |
| 39 | #include <__float_float.h> | |
| 40 | #undef __need_float_float | |
| 112 | 41 | #endif |
| 113 | 42 | |
| 114 | #define FLT_DIG __FLT_DIG__ | |
| 115 | #define DBL_DIG __DBL_DIG__ | |
| 116 | #define LDBL_DIG __LDBL_DIG__ | |
| 117 | ||
| 118 | #define FLT_MIN_EXP __FLT_MIN_EXP__ | |
| 119 | #define DBL_MIN_EXP __DBL_MIN_EXP__ | |
| 120 | #define LDBL_MIN_EXP __LDBL_MIN_EXP__ | |
| 121 | ||
| 122 | #define FLT_MIN_10_EXP __FLT_MIN_10_EXP__ | |
| 123 | #define DBL_MIN_10_EXP __DBL_MIN_10_EXP__ | |
| 124 | #define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__ | |
| 125 | ||
| 126 | #define FLT_MAX_EXP __FLT_MAX_EXP__ | |
| 127 | #define DBL_MAX_EXP __DBL_MAX_EXP__ | |
| 128 | #define LDBL_MAX_EXP __LDBL_MAX_EXP__ | |
| 129 | ||
| 130 | #define FLT_MAX_10_EXP __FLT_MAX_10_EXP__ | |
| 131 | #define DBL_MAX_10_EXP __DBL_MAX_10_EXP__ | |
| 132 | #define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__ | |
| 133 | ||
| 134 | #define FLT_MAX __FLT_MAX__ | |
| 135 | #define DBL_MAX __DBL_MAX__ | |
| 136 | #define LDBL_MAX __LDBL_MAX__ | |
| 137 | ||
| 138 | #define FLT_EPSILON __FLT_EPSILON__ | |
| 139 | #define DBL_EPSILON __DBL_EPSILON__ | |
| 140 | #define LDBL_EPSILON __LDBL_EPSILON__ | |
| 141 | ||
| 142 | #define FLT_MIN __FLT_MIN__ | |
| 143 | #define DBL_MIN __DBL_MIN__ | |
| 144 | #define LDBL_MIN __LDBL_MIN__ | |
| 145 | ||
| 146 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \ | |
| 147 | !defined(__STRICT_ANSI__) || \ | |
| 148 | (defined(__cplusplus) && __cplusplus >= 201703L) || \ | |
| 149 | (__STDC_HOSTED__ && defined(_AIX) && defined(_ALL_SOURCE)) | |
| 150 | # define FLT_TRUE_MIN __FLT_DENORM_MIN__ | |
| 151 | # define DBL_TRUE_MIN __DBL_DENORM_MIN__ | |
| 152 | # define LDBL_TRUE_MIN __LDBL_DENORM_MIN__ | |
| 153 | # define FLT_DECIMAL_DIG __FLT_DECIMAL_DIG__ | |
| 154 | # define DBL_DECIMAL_DIG __DBL_DECIMAL_DIG__ | |
| 155 | # define LDBL_DECIMAL_DIG __LDBL_DECIMAL_DIG__ | |
| 156 | # define FLT_HAS_SUBNORM __FLT_HAS_DENORM__ | |
| 157 | # define DBL_HAS_SUBNORM __DBL_HAS_DENORM__ | |
| 158 | # define LDBL_HAS_SUBNORM __LDBL_HAS_DENORM__ | |
| 43 | #ifdef __need_infinity_nan | |
| 44 | #include <__float_infinity_nan.h> | |
| 45 | #undef __need_infinity_nan | |
| 159 | 46 | #endif |
| 160 | 47 | |
| 161 | #if (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 202311L) || \ | |
| 162 | !defined(__STRICT_ANSI__) | |
| 163 | /* C23 5.2.5.3.3p29-30 */ | |
| 164 | # define INFINITY (__builtin_inff()) | |
| 165 | # define NAN (__builtin_nanf("")) | |
| 166 | /* C23 5.2.5.3.3p32 */ | |
| 167 | # define FLT_NORM_MAX __FLT_NORM_MAX__ | |
| 168 | # define DBL_NORM_MAX __DBL_NORM_MAX__ | |
| 169 | # define LDBL_NORM_MAX __LDBL_NORM_MAX__ | |
| 170 | #endif | |
| 171 | ||
| 172 | #ifdef __STDC_WANT_IEC_60559_TYPES_EXT__ | |
| 173 | # define FLT16_MANT_DIG __FLT16_MANT_DIG__ | |
| 174 | # define FLT16_DECIMAL_DIG __FLT16_DECIMAL_DIG__ | |
| 175 | # define FLT16_DIG __FLT16_DIG__ | |
| 176 | # define FLT16_MIN_EXP __FLT16_MIN_EXP__ | |
| 177 | # define FLT16_MIN_10_EXP __FLT16_MIN_10_EXP__ | |
| 178 | # define FLT16_MAX_EXP __FLT16_MAX_EXP__ | |
| 179 | # define FLT16_MAX_10_EXP __FLT16_MAX_10_EXP__ | |
| 180 | # define FLT16_MAX __FLT16_MAX__ | |
| 181 | # define FLT16_EPSILON __FLT16_EPSILON__ | |
| 182 | # define FLT16_MIN __FLT16_MIN__ | |
| 183 | # define FLT16_TRUE_MIN __FLT16_TRUE_MIN__ | |
| 184 | #endif /* __STDC_WANT_IEC_60559_TYPES_EXT__ */ | |
| 185 | ||
| 186 | 48 | #endif /* __MVS__ */ |
| 187 | #endif /* __CLANG_FLOAT_H */ |
lib/include/fma4intrin.h+98-96| ... | ... | @@ -20,100 +20,100 @@ |
| 20 | 20 | #define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(128))) |
| 21 | 21 | #define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma4"), __min_vector_width__(256))) |
| 22 | 22 | |
| 23 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 24 | _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C) | |
| 25 | { | |
| 26 | return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); | |
| 23 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 24 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 25 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 26 | #else | |
| 27 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 28 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 29 | #endif | |
| 30 | ||
| 31 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 32 | _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C) { | |
| 33 | return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, | |
| 34 | (__v4sf)__C); | |
| 27 | 35 | } |
| 28 | 36 | |
| 29 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 30 | _mm_macc_pd(__m128d __A, __m128d __B, __m128d __C) | |
| 31 | { | |
| 32 | return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C); | |
| 37 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 38 | _mm_macc_pd(__m128d __A, __m128d __B, __m128d __C) { | |
| 39 | return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B, | |
| 40 | (__v2df)__C); | |
| 33 | 41 | } |
| 34 | 42 | |
| 35 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 36 | _mm_macc_ss(__m128 __A, __m128 __B, __m128 __C) | |
| 37 | { | |
| 38 | return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); | |
| 43 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 44 | _mm_macc_ss(__m128 __A, __m128 __B, __m128 __C) { | |
| 45 | return _mm_set_ss(__builtin_elementwise_fma(__A[0], __B[0], __C[0])); | |
| 39 | 46 | } |
| 40 | 47 | |
| 41 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 42 | _mm_macc_sd(__m128d __A, __m128d __B, __m128d __C) | |
| 43 | { | |
| 44 | return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, (__v2df)__C); | |
| 48 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 49 | _mm_macc_sd(__m128d __A, __m128d __B, __m128d __C) { | |
| 50 | return _mm_set_sd(__builtin_elementwise_fma(__A[0], __B[0], __C[0])); | |
| 45 | 51 | } |
| 46 | 52 | |
| 47 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 48 | _mm_msub_ps(__m128 __A, __m128 __B, __m128 __C) | |
| 49 | { | |
| 50 | return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); | |
| 53 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 54 | _mm_msub_ps(__m128 __A, __m128 __B, __m128 __C) { | |
| 55 | return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, | |
| 56 | -(__v4sf)__C); | |
| 51 | 57 | } |
| 52 | 58 | |
| 53 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 54 | _mm_msub_pd(__m128d __A, __m128d __B, __m128d __C) | |
| 55 | { | |
| 56 | return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); | |
| 59 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 60 | _mm_msub_pd(__m128d __A, __m128d __B, __m128d __C) { | |
| 61 | return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B, | |
| 62 | -(__v2df)__C); | |
| 57 | 63 | } |
| 58 | 64 | |
| 59 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 60 | _mm_msub_ss(__m128 __A, __m128 __B, __m128 __C) | |
| 61 | { | |
| 62 | return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); | |
| 65 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 66 | _mm_msub_ss(__m128 __A, __m128 __B, __m128 __C) { | |
| 67 | return _mm_set_ss(__builtin_elementwise_fma(__A[0], __B[0], -__C[0])); | |
| 63 | 68 | } |
| 64 | 69 | |
| 65 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 66 | _mm_msub_sd(__m128d __A, __m128d __B, __m128d __C) | |
| 67 | { | |
| 68 | return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, -(__v2df)__C); | |
| 70 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 71 | _mm_msub_sd(__m128d __A, __m128d __B, __m128d __C) { | |
| 72 | return _mm_set_sd(__builtin_elementwise_fma(__A[0], __B[0], -__C[0])); | |
| 69 | 73 | } |
| 70 | 74 | |
| 71 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 72 | _mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C) | |
| 73 | { | |
| 74 | return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C); | |
| 75 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 76 | _mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C) { | |
| 77 | return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, | |
| 78 | (__v4sf)__C); | |
| 75 | 79 | } |
| 76 | 80 | |
| 77 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 78 | _mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C) | |
| 79 | { | |
| 80 | return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C); | |
| 81 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 82 | _mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C) { | |
| 83 | return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, | |
| 84 | (__v2df)__C); | |
| 81 | 85 | } |
| 82 | 86 | |
| 83 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 84 | _mm_nmacc_ss(__m128 __A, __m128 __B, __m128 __C) | |
| 85 | { | |
| 86 | return (__m128)__builtin_ia32_vfmaddss(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C); | |
| 87 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 88 | _mm_nmacc_ss(__m128 __A, __m128 __B, __m128 __C) { | |
| 89 | return _mm_set_ss(__builtin_elementwise_fma(-__A[0], __B[0], __C[0])); | |
| 87 | 90 | } |
| 88 | 91 | |
| 89 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 90 | _mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C) | |
| 91 | { | |
| 92 | return (__m128d)__builtin_ia32_vfmaddsd(-(__v2df)__A, (__v2df)__B, (__v2df)__C); | |
| 92 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 93 | _mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C) { | |
| 94 | return _mm_set_sd(__builtin_elementwise_fma(-__A[0], __B[0], __C[0])); | |
| 93 | 95 | } |
| 94 | 96 | |
| 95 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 96 | _mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C) | |
| 97 | { | |
| 98 | return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); | |
| 97 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 98 | _mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C) { | |
| 99 | return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, | |
| 100 | -(__v4sf)__C); | |
| 99 | 101 | } |
| 100 | 102 | |
| 101 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 102 | _mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C) | |
| 103 | { | |
| 104 | return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C); | |
| 103 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 104 | _mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C) { | |
| 105 | return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, | |
| 106 | -(__v2df)__C); | |
| 105 | 107 | } |
| 106 | 108 | |
| 107 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 108 | _mm_nmsub_ss(__m128 __A, __m128 __B, __m128 __C) | |
| 109 | { | |
| 110 | return (__m128)__builtin_ia32_vfmaddss(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); | |
| 109 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 110 | _mm_nmsub_ss(__m128 __A, __m128 __B, __m128 __C) { | |
| 111 | return _mm_set_ss(__builtin_elementwise_fma(-__A[0], __B[0], -__C[0])); | |
| 111 | 112 | } |
| 112 | 113 | |
| 113 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 114 | _mm_nmsub_sd(__m128d __A, __m128d __B, __m128d __C) | |
| 115 | { | |
| 116 | return (__m128d)__builtin_ia32_vfmaddsd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C); | |
| 114 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 115 | _mm_nmsub_sd(__m128d __A, __m128d __B, __m128d __C) { | |
| 116 | return _mm_set_sd(__builtin_elementwise_fma(-__A[0], __B[0], -__C[0])); | |
| 117 | 117 | } |
| 118 | 118 | |
| 119 | 119 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 |
| ... | ... | @@ -140,52 +140,52 @@ _mm_msubadd_pd(__m128d __A, __m128d __B, __m128d __C) |
| 140 | 140 | return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); |
| 141 | 141 | } |
| 142 | 142 | |
| 143 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 144 | _mm256_macc_ps(__m256 __A, __m256 __B, __m256 __C) | |
| 145 | { | |
| 146 | return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C); | |
| 143 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 144 | _mm256_macc_ps(__m256 __A, __m256 __B, __m256 __C) { | |
| 145 | return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, | |
| 146 | (__v8sf)__C); | |
| 147 | 147 | } |
| 148 | 148 | |
| 149 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 150 | _mm256_macc_pd(__m256d __A, __m256d __B, __m256d __C) | |
| 151 | { | |
| 152 | return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C); | |
| 149 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 150 | _mm256_macc_pd(__m256d __A, __m256d __B, __m256d __C) { | |
| 151 | return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B, | |
| 152 | (__v4df)__C); | |
| 153 | 153 | } |
| 154 | 154 | |
| 155 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 156 | _mm256_msub_ps(__m256 __A, __m256 __B, __m256 __C) | |
| 157 | { | |
| 158 | return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); | |
| 155 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 156 | _mm256_msub_ps(__m256 __A, __m256 __B, __m256 __C) { | |
| 157 | return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, | |
| 158 | -(__v8sf)__C); | |
| 159 | 159 | } |
| 160 | 160 | |
| 161 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 162 | _mm256_msub_pd(__m256d __A, __m256d __B, __m256d __C) | |
| 163 | { | |
| 164 | return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C); | |
| 161 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 162 | _mm256_msub_pd(__m256d __A, __m256d __B, __m256d __C) { | |
| 163 | return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B, | |
| 164 | -(__v4df)__C); | |
| 165 | 165 | } |
| 166 | 166 | |
| 167 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 168 | _mm256_nmacc_ps(__m256 __A, __m256 __B, __m256 __C) | |
| 169 | { | |
| 170 | return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C); | |
| 167 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 168 | _mm256_nmacc_ps(__m256 __A, __m256 __B, __m256 __C) { | |
| 169 | return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, | |
| 170 | (__v8sf)__C); | |
| 171 | 171 | } |
| 172 | 172 | |
| 173 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 174 | _mm256_nmacc_pd(__m256d __A, __m256d __B, __m256d __C) | |
| 175 | { | |
| 176 | return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C); | |
| 173 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 174 | _mm256_nmacc_pd(__m256d __A, __m256d __B, __m256d __C) { | |
| 175 | return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, | |
| 176 | (__v4df)__C); | |
| 177 | 177 | } |
| 178 | 178 | |
| 179 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 180 | _mm256_nmsub_ps(__m256 __A, __m256 __B, __m256 __C) | |
| 181 | { | |
| 182 | return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); | |
| 179 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 180 | _mm256_nmsub_ps(__m256 __A, __m256 __B, __m256 __C) { | |
| 181 | return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, | |
| 182 | -(__v8sf)__C); | |
| 183 | 183 | } |
| 184 | 184 | |
| 185 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 186 | _mm256_nmsub_pd(__m256d __A, __m256d __B, __m256d __C) | |
| 187 | { | |
| 188 | return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C); | |
| 185 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 186 | _mm256_nmsub_pd(__m256d __A, __m256d __B, __m256d __C) { | |
| 187 | return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, | |
| 188 | -(__v4df)__C); | |
| 189 | 189 | } |
| 190 | 190 | |
| 191 | 191 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 |
| ... | ... | @@ -214,5 +214,7 @@ _mm256_msubadd_pd(__m256d __A, __m256d __B, __m256d __C) |
| 214 | 214 | |
| 215 | 215 | #undef __DEFAULT_FN_ATTRS128 |
| 216 | 216 | #undef __DEFAULT_FN_ATTRS256 |
| 217 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 218 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 217 | 219 | |
| 218 | 220 | #endif /* __FMA4INTRIN_H */ |
lib/include/fmaintrin.h+96-66| ... | ... | @@ -15,8 +15,20 @@ |
| 15 | 15 | #define __FMAINTRIN_H |
| 16 | 16 | |
| 17 | 17 | /* Define the default attributes for the functions in this file. */ |
| 18 | #define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("fma"), __min_vector_width__(128))) | |
| 19 | #define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("fma"), __min_vector_width__(256))) | |
| 18 | #define __DEFAULT_FN_ATTRS128 \ | |
| 19 | __attribute__((__always_inline__, __nodebug__, __target__("fma"), \ | |
| 20 | __min_vector_width__(128))) | |
| 21 | #define __DEFAULT_FN_ATTRS256 \ | |
| 22 | __attribute__((__always_inline__, __nodebug__, __target__("fma"), \ | |
| 23 | __min_vector_width__(256))) | |
| 24 | ||
| 25 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 26 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr | |
| 27 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 28 | #else | |
| 29 | #define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 | |
| 30 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 31 | #endif | |
| 20 | 32 | |
| 21 | 33 | /// Computes a multiply-add of 128-bit vectors of [4 x float]. |
| 22 | 34 | /// For each element, computes <c> (__A * __B) + __C </c>. |
| ... | ... | @@ -32,10 +44,11 @@ |
| 32 | 44 | /// \param __C |
| 33 | 45 | /// A 128-bit vector of [4 x float] containing the addend. |
| 34 | 46 | /// \returns A 128-bit vector of [4 x float] containing the result. |
| 35 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 47 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 36 | 48 | _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C) |
| 37 | 49 | { |
| 38 | return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); | |
| 50 | return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, | |
| 51 | (__v4sf)__C); | |
| 39 | 52 | } |
| 40 | 53 | |
| 41 | 54 | /// Computes a multiply-add of 128-bit vectors of [2 x double]. |
| ... | ... | @@ -52,10 +65,11 @@ _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C) |
| 52 | 65 | /// \param __C |
| 53 | 66 | /// A 128-bit vector of [2 x double] containing the addend. |
| 54 | 67 | /// \returns A 128-bit [2 x double] vector containing the result. |
| 55 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 68 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 56 | 69 | _mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C) |
| 57 | 70 | { |
| 58 | return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C); | |
| 71 | return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B, | |
| 72 | (__v2df)__C); | |
| 59 | 73 | } |
| 60 | 74 | |
| 61 | 75 | /// Computes a scalar multiply-add of the single-precision values in the |
| ... | ... | @@ -81,10 +95,10 @@ _mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C) |
| 81 | 95 | /// 32 bits. |
| 82 | 96 | /// \returns A 128-bit vector of [4 x float] containing the result in the low |
| 83 | 97 | /// 32 bits and a copy of \a __A[127:32] in the upper 96 bits. |
| 84 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 85 | _mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C) | |
| 86 | { | |
| 87 | return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); | |
| 98 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 99 | _mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C) { | |
| 100 | __A[0] = __builtin_elementwise_fma(__A[0], __B[0], __C[0]); | |
| 101 | return __A; | |
| 88 | 102 | } |
| 89 | 103 | |
| 90 | 104 | /// Computes a scalar multiply-add of the double-precision values in the |
| ... | ... | @@ -110,10 +124,10 @@ _mm_fmadd_ss(__m128 __A, __m128 __B, __m128 __C) |
| 110 | 124 | /// 64 bits. |
| 111 | 125 | /// \returns A 128-bit vector of [2 x double] containing the result in the low |
| 112 | 126 | /// 64 bits and a copy of \a __A[127:64] in the upper 64 bits. |
| 113 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 114 | _mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C) | |
| 115 | { | |
| 116 | return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, (__v2df)__B, (__v2df)__C); | |
| 127 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 128 | _mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C) { | |
| 129 | __A[0] = __builtin_elementwise_fma(__A[0], __B[0], __C[0]); | |
| 130 | return __A; | |
| 117 | 131 | } |
| 118 | 132 | |
| 119 | 133 | /// Computes a multiply-subtract of 128-bit vectors of [4 x float]. |
| ... | ... | @@ -130,10 +144,11 @@ _mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C) |
| 130 | 144 | /// \param __C |
| 131 | 145 | /// A 128-bit vector of [4 x float] containing the subtrahend. |
| 132 | 146 | /// \returns A 128-bit vector of [4 x float] containing the result. |
| 133 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 147 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 134 | 148 | _mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C) |
| 135 | 149 | { |
| 136 | return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); | |
| 150 | return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, | |
| 151 | -(__v4sf)__C); | |
| 137 | 152 | } |
| 138 | 153 | |
| 139 | 154 | /// Computes a multiply-subtract of 128-bit vectors of [2 x double]. |
| ... | ... | @@ -150,10 +165,11 @@ _mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C) |
| 150 | 165 | /// \param __C |
| 151 | 166 | /// A 128-bit vector of [2 x double] containing the addend. |
| 152 | 167 | /// \returns A 128-bit vector of [2 x double] containing the result. |
| 153 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 168 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 154 | 169 | _mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C) |
| 155 | 170 | { |
| 156 | return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); | |
| 171 | return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B, | |
| 172 | -(__v2df)__C); | |
| 157 | 173 | } |
| 158 | 174 | |
| 159 | 175 | /// Computes a scalar multiply-subtract of the single-precision values in |
| ... | ... | @@ -179,10 +195,10 @@ _mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C) |
| 179 | 195 | /// 32 bits. |
| 180 | 196 | /// \returns A 128-bit vector of [4 x float] containing the result in the low |
| 181 | 197 | /// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits. |
| 182 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 183 | _mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C) | |
| 184 | { | |
| 185 | return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); | |
| 198 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 199 | _mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C) { | |
| 200 | __A[0] = __builtin_elementwise_fma(__A[0], __B[0], -__C[0]); | |
| 201 | return __A; | |
| 186 | 202 | } |
| 187 | 203 | |
| 188 | 204 | /// Computes a scalar multiply-subtract of the double-precision values in |
| ... | ... | @@ -208,10 +224,10 @@ _mm_fmsub_ss(__m128 __A, __m128 __B, __m128 __C) |
| 208 | 224 | /// 64 bits. |
| 209 | 225 | /// \returns A 128-bit vector of [2 x double] containing the result in the low |
| 210 | 226 | /// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits. |
| 211 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 212 | _mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C) | |
| 213 | { | |
| 214 | return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, (__v2df)__B, -(__v2df)__C); | |
| 227 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 228 | _mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C) { | |
| 229 | __A[0] = __builtin_elementwise_fma(__A[0], __B[0], -__C[0]); | |
| 230 | return __A; | |
| 215 | 231 | } |
| 216 | 232 | |
| 217 | 233 | /// Computes a negated multiply-add of 128-bit vectors of [4 x float]. |
| ... | ... | @@ -228,10 +244,11 @@ _mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C) |
| 228 | 244 | /// \param __C |
| 229 | 245 | /// A 128-bit vector of [4 x float] containing the addend. |
| 230 | 246 | /// \returns A 128-bit [4 x float] vector containing the result. |
| 231 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 247 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 232 | 248 | _mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C) |
| 233 | 249 | { |
| 234 | return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C); | |
| 250 | return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, | |
| 251 | (__v4sf)__C); | |
| 235 | 252 | } |
| 236 | 253 | |
| 237 | 254 | /// Computes a negated multiply-add of 128-bit vectors of [2 x double]. |
| ... | ... | @@ -248,10 +265,11 @@ _mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C) |
| 248 | 265 | /// \param __C |
| 249 | 266 | /// A 128-bit vector of [2 x double] containing the addend. |
| 250 | 267 | /// \returns A 128-bit vector of [2 x double] containing the result. |
| 251 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 268 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 252 | 269 | _mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C) |
| 253 | 270 | { |
| 254 | return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C); | |
| 271 | return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, | |
| 272 | (__v2df)__C); | |
| 255 | 273 | } |
| 256 | 274 | |
| 257 | 275 | /// Computes a scalar negated multiply-add of the single-precision values in |
| ... | ... | @@ -277,10 +295,10 @@ _mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C) |
| 277 | 295 | /// 32 bits. |
| 278 | 296 | /// \returns A 128-bit vector of [4 x float] containing the result in the low |
| 279 | 297 | /// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits. |
| 280 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 281 | _mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C) | |
| 282 | { | |
| 283 | return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, -(__v4sf)__B, (__v4sf)__C); | |
| 298 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 299 | _mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C) { | |
| 300 | __A[0] = __builtin_elementwise_fma(__A[0], -__B[0], __C[0]); | |
| 301 | return __A; | |
| 284 | 302 | } |
| 285 | 303 | |
| 286 | 304 | /// Computes a scalar negated multiply-add of the double-precision values |
| ... | ... | @@ -306,10 +324,10 @@ _mm_fnmadd_ss(__m128 __A, __m128 __B, __m128 __C) |
| 306 | 324 | /// 64 bits. |
| 307 | 325 | /// \returns A 128-bit vector of [2 x double] containing the result in the low |
| 308 | 326 | /// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits. |
| 309 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 310 | _mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C) | |
| 311 | { | |
| 312 | return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, -(__v2df)__B, (__v2df)__C); | |
| 327 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 328 | _mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C) { | |
| 329 | __A[0] = __builtin_elementwise_fma(__A[0], -__B[0], __C[0]); | |
| 330 | return __A; | |
| 313 | 331 | } |
| 314 | 332 | |
| 315 | 333 | /// Computes a negated multiply-subtract of 128-bit vectors of [4 x float]. |
| ... | ... | @@ -326,10 +344,11 @@ _mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C) |
| 326 | 344 | /// \param __C |
| 327 | 345 | /// A 128-bit vector of [4 x float] containing the subtrahend. |
| 328 | 346 | /// \returns A 128-bit vector of [4 x float] containing the result. |
| 329 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 347 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 330 | 348 | _mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C) |
| 331 | 349 | { |
| 332 | return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); | |
| 350 | return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, | |
| 351 | -(__v4sf)__C); | |
| 333 | 352 | } |
| 334 | 353 | |
| 335 | 354 | /// Computes a negated multiply-subtract of 128-bit vectors of [2 x double]. |
| ... | ... | @@ -346,10 +365,11 @@ _mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C) |
| 346 | 365 | /// \param __C |
| 347 | 366 | /// A 128-bit vector of [2 x double] containing the subtrahend. |
| 348 | 367 | /// \returns A 128-bit vector of [2 x double] containing the result. |
| 349 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 368 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 350 | 369 | _mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C) |
| 351 | 370 | { |
| 352 | return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C); | |
| 371 | return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, | |
| 372 | -(__v2df)__C); | |
| 353 | 373 | } |
| 354 | 374 | |
| 355 | 375 | /// Computes a scalar negated multiply-subtract of the single-precision |
| ... | ... | @@ -375,10 +395,10 @@ _mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C) |
| 375 | 395 | /// 32 bits. |
| 376 | 396 | /// \returns A 128-bit vector of [4 x float] containing the result in the low |
| 377 | 397 | /// 32 bits, and a copy of \a __A[127:32] in the upper 96 bits. |
| 378 | static __inline__ __m128 __DEFAULT_FN_ATTRS128 | |
| 379 | _mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C) | |
| 380 | { | |
| 381 | return (__m128)__builtin_ia32_vfmaddss3((__v4sf)__A, -(__v4sf)__B, -(__v4sf)__C); | |
| 398 | static __inline__ __m128 __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 399 | _mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C) { | |
| 400 | __A[0] = __builtin_elementwise_fma(__A[0], -__B[0], -__C[0]); | |
| 401 | return __A; | |
| 382 | 402 | } |
| 383 | 403 | |
| 384 | 404 | /// Computes a scalar negated multiply-subtract of the double-precision |
| ... | ... | @@ -404,10 +424,10 @@ _mm_fnmsub_ss(__m128 __A, __m128 __B, __m128 __C) |
| 404 | 424 | /// 64 bits. |
| 405 | 425 | /// \returns A 128-bit vector of [2 x double] containing the result in the low |
| 406 | 426 | /// 64 bits, and a copy of \a __A[127:64] in the upper 64 bits. |
| 407 | static __inline__ __m128d __DEFAULT_FN_ATTRS128 | |
| 408 | _mm_fnmsub_sd(__m128d __A, __m128d __B, __m128d __C) | |
| 409 | { | |
| 410 | return (__m128d)__builtin_ia32_vfmaddsd3((__v2df)__A, -(__v2df)__B, -(__v2df)__C); | |
| 427 | static __inline__ __m128d __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 428 | _mm_fnmsub_sd(__m128d __A, __m128d __B, __m128d __C) { | |
| 429 | __A[0] = __builtin_elementwise_fma(__A[0], -__B[0], -__C[0]); | |
| 430 | return __A; | |
| 411 | 431 | } |
| 412 | 432 | |
| 413 | 433 | /// Computes a multiply with alternating add/subtract of 128-bit vectors of |
| ... | ... | @@ -528,10 +548,11 @@ _mm_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C) |
| 528 | 548 | /// \param __C |
| 529 | 549 | /// A 256-bit vector of [8 x float] containing the addend. |
| 530 | 550 | /// \returns A 256-bit vector of [8 x float] containing the result. |
| 531 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 551 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 532 | 552 | _mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C) |
| 533 | 553 | { |
| 534 | return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C); | |
| 554 | return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, | |
| 555 | (__v8sf)__C); | |
| 535 | 556 | } |
| 536 | 557 | |
| 537 | 558 | /// Computes a multiply-add of 256-bit vectors of [4 x double]. |
| ... | ... | @@ -548,10 +569,11 @@ _mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C) |
| 548 | 569 | /// \param __C |
| 549 | 570 | /// A 256-bit vector of [4 x double] containing the addend. |
| 550 | 571 | /// \returns A 256-bit vector of [4 x double] containing the result. |
| 551 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 572 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 552 | 573 | _mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C) |
| 553 | 574 | { |
| 554 | return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C); | |
| 575 | return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B, | |
| 576 | (__v4df)__C); | |
| 555 | 577 | } |
| 556 | 578 | |
| 557 | 579 | /// Computes a multiply-subtract of 256-bit vectors of [8 x float]. |
| ... | ... | @@ -568,10 +590,11 @@ _mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C) |
| 568 | 590 | /// \param __C |
| 569 | 591 | /// A 256-bit vector of [8 x float] containing the subtrahend. |
| 570 | 592 | /// \returns A 256-bit vector of [8 x float] containing the result. |
| 571 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 593 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 572 | 594 | _mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C) |
| 573 | 595 | { |
| 574 | return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); | |
| 596 | return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, | |
| 597 | -(__v8sf)__C); | |
| 575 | 598 | } |
| 576 | 599 | |
| 577 | 600 | /// Computes a multiply-subtract of 256-bit vectors of [4 x double]. |
| ... | ... | @@ -588,10 +611,11 @@ _mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C) |
| 588 | 611 | /// \param __C |
| 589 | 612 | /// A 256-bit vector of [4 x double] containing the subtrahend. |
| 590 | 613 | /// \returns A 256-bit vector of [4 x double] containing the result. |
| 591 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 614 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 592 | 615 | _mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C) |
| 593 | 616 | { |
| 594 | return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C); | |
| 617 | return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B, | |
| 618 | -(__v4df)__C); | |
| 595 | 619 | } |
| 596 | 620 | |
| 597 | 621 | /// Computes a negated multiply-add of 256-bit vectors of [8 x float]. |
| ... | ... | @@ -608,10 +632,11 @@ _mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C) |
| 608 | 632 | /// \param __C |
| 609 | 633 | /// A 256-bit vector of [8 x float] containing the addend. |
| 610 | 634 | /// \returns A 256-bit vector of [8 x float] containing the result. |
| 611 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 635 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 612 | 636 | _mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C) |
| 613 | 637 | { |
| 614 | return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C); | |
| 638 | return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, | |
| 639 | (__v8sf)__C); | |
| 615 | 640 | } |
| 616 | 641 | |
| 617 | 642 | /// Computes a negated multiply-add of 256-bit vectors of [4 x double]. |
| ... | ... | @@ -628,10 +653,11 @@ _mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C) |
| 628 | 653 | /// \param __C |
| 629 | 654 | /// A 256-bit vector of [4 x double] containing the addend. |
| 630 | 655 | /// \returns A 256-bit vector of [4 x double] containing the result. |
| 631 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 656 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 632 | 657 | _mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C) |
| 633 | 658 | { |
| 634 | return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C); | |
| 659 | return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, | |
| 660 | (__v4df)__C); | |
| 635 | 661 | } |
| 636 | 662 | |
| 637 | 663 | /// Computes a negated multiply-subtract of 256-bit vectors of [8 x float]. |
| ... | ... | @@ -648,10 +674,11 @@ _mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C) |
| 648 | 674 | /// \param __C |
| 649 | 675 | /// A 256-bit vector of [8 x float] containing the subtrahend. |
| 650 | 676 | /// \returns A 256-bit vector of [8 x float] containing the result. |
| 651 | static __inline__ __m256 __DEFAULT_FN_ATTRS256 | |
| 677 | static __inline__ __m256 __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 652 | 678 | _mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C) |
| 653 | 679 | { |
| 654 | return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); | |
| 680 | return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, | |
| 681 | -(__v8sf)__C); | |
| 655 | 682 | } |
| 656 | 683 | |
| 657 | 684 | /// Computes a negated multiply-subtract of 256-bit vectors of [4 x double]. |
| ... | ... | @@ -668,10 +695,11 @@ _mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C) |
| 668 | 695 | /// \param __C |
| 669 | 696 | /// A 256-bit vector of [4 x double] containing the subtrahend. |
| 670 | 697 | /// \returns A 256-bit vector of [4 x double] containing the result. |
| 671 | static __inline__ __m256d __DEFAULT_FN_ATTRS256 | |
| 698 | static __inline__ __m256d __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 672 | 699 | _mm256_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C) |
| 673 | 700 | { |
| 674 | return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C); | |
| 701 | return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, | |
| 702 | -(__v4df)__C); | |
| 675 | 703 | } |
| 676 | 704 | |
| 677 | 705 | /// Computes a multiply with alternating add/subtract of 256-bit vectors of |
| ... | ... | @@ -792,5 +820,7 @@ _mm256_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C) |
| 792 | 820 | |
| 793 | 821 | #undef __DEFAULT_FN_ATTRS128 |
| 794 | 822 | #undef __DEFAULT_FN_ATTRS256 |
| 823 | #undef __DEFAULT_FN_ATTRS128_CONSTEXPR | |
| 824 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 795 | 825 | |
| 796 | 826 | #endif /* __FMAINTRIN_H */ |
lib/include/gfniintrin.h+21-16| ... | ... | @@ -14,29 +14,36 @@ |
| 14 | 14 | #ifndef __GFNIINTRIN_H |
| 15 | 15 | #define __GFNIINTRIN_H |
| 16 | 16 | |
| 17 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 18 | 17 | /* Default attributes for simple form (no masking). */ |
| 18 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 19 | 19 | #define __DEFAULT_FN_ATTRS \ |
| 20 | __attribute__((__always_inline__, __nodebug__, \ | |
| 21 | __target__("gfni,no-evex512"), __min_vector_width__(128))) | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("gfni"), \ | |
| 21 | __min_vector_width__(128))) constexpr | |
| 22 | 22 | |
| 23 | 23 | /* Default attributes for YMM unmasked form. */ |
| 24 | 24 | #define __DEFAULT_FN_ATTRS_Y \ |
| 25 | __attribute__((__always_inline__, __nodebug__, \ | |
| 26 | __target__("avx,gfni,no-evex512"), \ | |
| 27 | __min_vector_width__(256))) | |
| 25 | __attribute__((__always_inline__, __nodebug__, __target__("avx,gfni"), \ | |
| 26 | __min_vector_width__(256))) constexpr | |
| 28 | 27 | |
| 29 | 28 | /* Default attributes for VLX masked forms. */ |
| 30 | 29 | #define __DEFAULT_FN_ATTRS_VL128 \ |
| 31 | 30 | __attribute__((__always_inline__, __nodebug__, \ |
| 32 | __target__("avx512bw,avx512vl,gfni,no-evex512"), \ | |
| 33 | __min_vector_width__(128))) | |
| 31 | __target__("avx512bw,avx512vl,gfni"), \ | |
| 32 | __min_vector_width__(128))) constexpr | |
| 34 | 33 | #define __DEFAULT_FN_ATTRS_VL256 \ |
| 35 | 34 | __attribute__((__always_inline__, __nodebug__, \ |
| 36 | __target__("avx512bw,avx512vl,gfni,no-evex512"), \ | |
| 37 | __min_vector_width__(256))) | |
| 35 | __target__("avx512bw,avx512vl,gfni"), \ | |
| 36 | __min_vector_width__(256))) constexpr | |
| 37 | ||
| 38 | /* Default attributes for ZMM unmasked forms. */ | |
| 39 | #define __DEFAULT_FN_ATTRS_Z \ | |
| 40 | __attribute__((__always_inline__, __nodebug__, __target__("avx512f,gfni"), \ | |
| 41 | __min_vector_width__(512))) constexpr | |
| 42 | /* Default attributes for ZMM masked forms. */ | |
| 43 | #define __DEFAULT_FN_ATTRS_Z_MASK \ | |
| 44 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,gfni"), \ | |
| 45 | __min_vector_width__(512))) constexpr | |
| 38 | 46 | #else |
| 39 | /* Default attributes for simple form (no masking). */ | |
| 40 | 47 | #define __DEFAULT_FN_ATTRS \ |
| 41 | 48 | __attribute__((__always_inline__, __nodebug__, __target__("gfni"), \ |
| 42 | 49 | __min_vector_width__(128))) |
| ... | ... | @@ -55,18 +62,16 @@ |
| 55 | 62 | __attribute__((__always_inline__, __nodebug__, \ |
| 56 | 63 | __target__("avx512bw,avx512vl,gfni"), \ |
| 57 | 64 | __min_vector_width__(256))) |
| 58 | #endif | |
| 59 | 65 | |
| 60 | 66 | /* Default attributes for ZMM unmasked forms. */ |
| 61 | 67 | #define __DEFAULT_FN_ATTRS_Z \ |
| 62 | __attribute__((__always_inline__, __nodebug__, \ | |
| 63 | __target__("avx512f,evex512,gfni"), \ | |
| 68 | __attribute__((__always_inline__, __nodebug__, __target__("avx512f,gfni"), \ | |
| 64 | 69 | __min_vector_width__(512))) |
| 65 | 70 | /* Default attributes for ZMM masked forms. */ |
| 66 | 71 | #define __DEFAULT_FN_ATTRS_Z_MASK \ |
| 67 | __attribute__((__always_inline__, __nodebug__, \ | |
| 68 | __target__("avx512bw,evex512,gfni"), \ | |
| 72 | __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,gfni"), \ | |
| 69 | 73 | __min_vector_width__(512))) |
| 74 | #endif | |
| 70 | 75 | |
| 71 | 76 | #define _mm_gf2p8affineinv_epi64_epi8(A, B, I) \ |
| 72 | 77 | ((__m128i)__builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \ |
lib/include/hexagon_types.h+23-20| ... | ... | @@ -11,6 +11,11 @@ |
| 11 | 11 | |
| 12 | 12 | #include <hexagon_protos.h> |
| 13 | 13 | |
| 14 | // Save and undefine B0 to avoid conflicts with POSIX termios.h which | |
| 15 | // defines B0 as a macro for baud rate 0. | |
| 16 | #pragma push_macro("B0") | |
| 17 | #undef B0 | |
| 18 | ||
| 14 | 19 | /* Hexagon names */ |
| 15 | 20 | #define HEXAGON_Vect HEXAGON_Vect64 |
| 16 | 21 | #define HEXAGON_V_GET_D HEXAGON_V64_GET_D |
| ... | ... | @@ -697,9 +702,8 @@ public: |
| 697 | 702 | }; |
| 698 | 703 | |
| 699 | 704 | // Extract byte methods |
| 700 | signed char B0(void) { | |
| 701 | return HEXAGON_V64_GET_B0(data); | |
| 702 | }; | |
| 705 | signed char b0(void) { return HEXAGON_V64_GET_B0(data); }; | |
| 706 | signed char B0(void) { return b0(); }; | |
| 703 | 707 | signed char B1(void) { |
| 704 | 708 | return HEXAGON_V64_GET_B1(data); |
| 705 | 709 | }; |
| ... | ... | @@ -776,9 +780,10 @@ public: |
| 776 | 780 | }; |
| 777 | 781 | |
| 778 | 782 | // Set byte methods |
| 779 | HEXAGON_Vect64C B0(signed char b) { | |
| 783 | HEXAGON_Vect64C b0(signed char b) { | |
| 780 | 784 | return HEXAGON_Vect64C(HEXAGON_V64_PUT_B0(data, b)); |
| 781 | 785 | }; |
| 786 | HEXAGON_Vect64C B0(signed char b) { return b0(b); }; | |
| 782 | 787 | HEXAGON_Vect64C B1(signed char b) { |
| 783 | 788 | return HEXAGON_Vect64C(HEXAGON_V64_PUT_B1(data, b)); |
| 784 | 789 | }; |
| ... | ... | @@ -1121,9 +1126,8 @@ public: |
| 1121 | 1126 | }; |
| 1122 | 1127 | |
| 1123 | 1128 | // Extract byte methods |
| 1124 | signed char B0(void) { | |
| 1125 | return HEXAGON_V32_GET_B0(data); | |
| 1126 | }; | |
| 1129 | signed char b0(void) { return HEXAGON_V32_GET_B0(data); }; | |
| 1130 | signed char B0(void) { return b0(); }; | |
| 1127 | 1131 | signed char B1(void) { |
| 1128 | 1132 | return HEXAGON_V32_GET_B1(data); |
| 1129 | 1133 | }; |
| ... | ... | @@ -1162,9 +1166,10 @@ public: |
| 1162 | 1166 | }; |
| 1163 | 1167 | |
| 1164 | 1168 | // Set byte methods |
| 1165 | HEXAGON_Vect32C B0(signed char b) { | |
| 1169 | HEXAGON_Vect32C b0(signed char b) { | |
| 1166 | 1170 | return HEXAGON_Vect32C(HEXAGON_V32_PUT_B0(data, b)); |
| 1167 | 1171 | }; |
| 1172 | HEXAGON_Vect32C B0(signed char b) { return b0(b); }; | |
| 1168 | 1173 | HEXAGON_Vect32C B1(signed char b) { |
| 1169 | 1174 | return HEXAGON_Vect32C(HEXAGON_V32_PUT_B1(data, b)); |
| 1170 | 1175 | }; |
| ... | ... | @@ -1924,9 +1929,8 @@ public: |
| 1924 | 1929 | }; |
| 1925 | 1930 | |
| 1926 | 1931 | // Extract byte methods |
| 1927 | signed char B0(void) { | |
| 1928 | return Q6V64_GET_B0(data); | |
| 1929 | }; | |
| 1932 | signed char b0(void) { return Q6V64_GET_B0(data); }; | |
| 1933 | signed char B0(void) { return b0(); }; | |
| 1930 | 1934 | signed char B1(void) { |
| 1931 | 1935 | return Q6V64_GET_B1(data); |
| 1932 | 1936 | }; |
| ... | ... | @@ -2003,9 +2007,8 @@ public: |
| 2003 | 2007 | }; |
| 2004 | 2008 | |
| 2005 | 2009 | // Set byte methods |
| 2006 | Q6Vect64C B0(signed char b) { | |
| 2007 | return Q6Vect64C(Q6V64_PUT_B0(data, b)); | |
| 2008 | }; | |
| 2010 | Q6Vect64C b0(signed char b) { return Q6Vect64C(Q6V64_PUT_B0(data, b)); }; | |
| 2011 | Q6Vect64C B0(signed char b) { return b0(b); }; | |
| 2009 | 2012 | Q6Vect64C B1(signed char b) { |
| 2010 | 2013 | return Q6Vect64C(Q6V64_PUT_B1(data, b)); |
| 2011 | 2014 | }; |
| ... | ... | @@ -2348,9 +2351,8 @@ public: |
| 2348 | 2351 | }; |
| 2349 | 2352 | |
| 2350 | 2353 | // Extract byte methods |
| 2351 | signed char B0(void) { | |
| 2352 | return Q6V32_GET_B0(data); | |
| 2353 | }; | |
| 2354 | signed char b0(void) { return Q6V32_GET_B0(data); }; | |
| 2355 | signed char B0(void) { return b0(); }; | |
| 2354 | 2356 | signed char B1(void) { |
| 2355 | 2357 | return Q6V32_GET_B1(data); |
| 2356 | 2358 | }; |
| ... | ... | @@ -2389,9 +2391,8 @@ public: |
| 2389 | 2391 | }; |
| 2390 | 2392 | |
| 2391 | 2393 | // Set byte methods |
| 2392 | Q6Vect32C B0(signed char b) { | |
| 2393 | return Q6Vect32C(Q6V32_PUT_B0(data, b)); | |
| 2394 | }; | |
| 2394 | Q6Vect32C b0(signed char b) { return Q6Vect32C(Q6V32_PUT_B0(data, b)); }; | |
| 2395 | Q6Vect32C B0(signed char b) { return b0(b); }; | |
| 2395 | 2396 | Q6Vect32C B1(signed char b) { |
| 2396 | 2397 | return Q6Vect32C(Q6V32_PUT_B1(data, b)); |
| 2397 | 2398 | }; |
| ... | ... | @@ -2622,4 +2623,6 @@ typedef struct hexagon_udma_descriptor_type1_s |
| 2622 | 2623 | unsigned int dstwidthoffset:16; |
| 2623 | 2624 | } hexagon_udma_descriptor_type1_t; |
| 2624 | 2625 | |
| 2626 | #pragma pop_macro("B0") | |
| 2627 | ||
| 2625 | 2628 | #endif /* !HEXAGON_TYPES_H */ |
lib/include/hvx_hexagon_protos.h+649-860| ... | ... | @@ -19,7 +19,6 @@ |
| 19 | 19 | #define __BUILTIN_VECTOR_WRAP(a) a |
| 20 | 20 | #endif |
| 21 | 21 | |
| 22 | #if __HVX_ARCH__ >= 60 | |
| 23 | 22 | /* ========================================================================== |
| 24 | 23 | Assembly Syntax: Rd32=vextract(Vu32,Rs32) |
| 25 | 24 | C Intrinsic Prototype: Word32 Q6_R_vextract_VR(HVX_Vector Vu, Word32 Rs) |
| ... | ... | @@ -28,9 +27,7 @@ |
| 28 | 27 | ========================================================================== */ |
| 29 | 28 | |
| 30 | 29 | #define Q6_R_vextract_VR(Vu,Rs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_extractw)(Vu,Rs) |
| 31 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 32 | 30 | |
| 33 | #if __HVX_ARCH__ >= 60 | |
| 34 | 31 | /* ========================================================================== |
| 35 | 32 | Assembly Syntax: Vd32=hi(Vss32) |
| 36 | 33 | C Intrinsic Prototype: HVX_Vector Q6_V_hi_W(HVX_VectorPair Vss) |
| ... | ... | @@ -39,9 +36,7 @@ |
| 39 | 36 | ========================================================================== */ |
| 40 | 37 | |
| 41 | 38 | #define Q6_V_hi_W(Vss) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_hi)(Vss) |
| 42 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 43 | 39 | |
| 44 | #if __HVX_ARCH__ >= 60 | |
| 45 | 40 | /* ========================================================================== |
| 46 | 41 | Assembly Syntax: Vd32=lo(Vss32) |
| 47 | 42 | C Intrinsic Prototype: HVX_Vector Q6_V_lo_W(HVX_VectorPair Vss) |
| ... | ... | @@ -50,9 +45,7 @@ |
| 50 | 45 | ========================================================================== */ |
| 51 | 46 | |
| 52 | 47 | #define Q6_V_lo_W(Vss) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lo)(Vss) |
| 53 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 54 | 48 | |
| 55 | #if __HVX_ARCH__ >= 60 | |
| 56 | 49 | /* ========================================================================== |
| 57 | 50 | Assembly Syntax: Vd32=vsplat(Rt32) |
| 58 | 51 | C Intrinsic Prototype: HVX_Vector Q6_V_vsplat_R(Word32 Rt) |
| ... | ... | @@ -61,9 +54,7 @@ |
| 61 | 54 | ========================================================================== */ |
| 62 | 55 | |
| 63 | 56 | #define Q6_V_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatw)(Rt) |
| 64 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 65 | 57 | |
| 66 | #if __HVX_ARCH__ >= 60 | |
| 67 | 58 | /* ========================================================================== |
| 68 | 59 | Assembly Syntax: Qd4=and(Qs4,Qt4) |
| 69 | 60 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) |
| ... | ... | @@ -72,9 +63,7 @@ |
| 72 | 63 | ========================================================================== */ |
| 73 | 64 | |
| 74 | 65 | #define Q6_Q_and_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) |
| 75 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 76 | 66 | |
| 77 | #if __HVX_ARCH__ >= 60 | |
| 78 | 67 | /* ========================================================================== |
| 79 | 68 | Assembly Syntax: Qd4=and(Qs4,!Qt4) |
| 80 | 69 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt) |
| ... | ... | @@ -83,9 +72,7 @@ |
| 83 | 72 | ========================================================================== */ |
| 84 | 73 | |
| 85 | 74 | #define Q6_Q_and_QQn(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and_n)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) |
| 86 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 87 | 75 | |
| 88 | #if __HVX_ARCH__ >= 60 | |
| 89 | 76 | /* ========================================================================== |
| 90 | 77 | Assembly Syntax: Qd4=not(Qs4) |
| 91 | 78 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_not_Q(HVX_VectorPred Qs) |
| ... | ... | @@ -94,9 +81,7 @@ |
| 94 | 81 | ========================================================================== */ |
| 95 | 82 | |
| 96 | 83 | #define Q6_Q_not_Q(Qs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_not)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1))),-1) |
| 97 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 98 | 84 | |
| 99 | #if __HVX_ARCH__ >= 60 | |
| 100 | 85 | /* ========================================================================== |
| 101 | 86 | Assembly Syntax: Qd4=or(Qs4,Qt4) |
| 102 | 87 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) |
| ... | ... | @@ -105,9 +90,7 @@ |
| 105 | 90 | ========================================================================== */ |
| 106 | 91 | |
| 107 | 92 | #define Q6_Q_or_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) |
| 108 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 109 | 93 | |
| 110 | #if __HVX_ARCH__ >= 60 | |
| 111 | 94 | /* ========================================================================== |
| 112 | 95 | Assembly Syntax: Qd4=or(Qs4,!Qt4) |
| 113 | 96 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt) |
| ... | ... | @@ -116,9 +99,7 @@ |
| 116 | 99 | ========================================================================== */ |
| 117 | 100 | |
| 118 | 101 | #define Q6_Q_or_QQn(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or_n)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) |
| 119 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 120 | 102 | |
| 121 | #if __HVX_ARCH__ >= 60 | |
| 122 | 103 | /* ========================================================================== |
| 123 | 104 | Assembly Syntax: Qd4=vsetq(Rt32) |
| 124 | 105 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vsetq_R(Word32 Rt) |
| ... | ... | @@ -127,9 +108,7 @@ |
| 127 | 108 | ========================================================================== */ |
| 128 | 109 | |
| 129 | 110 | #define Q6_Q_vsetq_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2)(Rt)),-1) |
| 130 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 131 | 111 | |
| 132 | #if __HVX_ARCH__ >= 60 | |
| 133 | 112 | /* ========================================================================== |
| 134 | 113 | Assembly Syntax: Qd4=xor(Qs4,Qt4) |
| 135 | 114 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_xor_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) |
| ... | ... | @@ -138,9 +117,7 @@ |
| 138 | 117 | ========================================================================== */ |
| 139 | 118 | |
| 140 | 119 | #define Q6_Q_xor_QQ(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) |
| 141 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 142 | 120 | |
| 143 | #if __HVX_ARCH__ >= 60 | |
| 144 | 121 | /* ========================================================================== |
| 145 | 122 | Assembly Syntax: if (!Qv4) vmem(Rt32+#s4)=Vs32 |
| 146 | 123 | C Intrinsic Prototype: void Q6_vmem_QnRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) |
| ... | ... | @@ -149,9 +126,7 @@ |
| 149 | 126 | ========================================================================== */ |
| 150 | 127 | |
| 151 | 128 | #define Q6_vmem_QnRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) |
| 152 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 153 | 129 | |
| 154 | #if __HVX_ARCH__ >= 60 | |
| 155 | 130 | /* ========================================================================== |
| 156 | 131 | Assembly Syntax: if (!Qv4) vmem(Rt32+#s4):nt=Vs32 |
| 157 | 132 | C Intrinsic Prototype: void Q6_vmem_QnRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) |
| ... | ... | @@ -160,9 +135,7 @@ |
| 160 | 135 | ========================================================================== */ |
| 161 | 136 | |
| 162 | 137 | #define Q6_vmem_QnRIV_nt(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) |
| 163 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 164 | 138 | |
| 165 | #if __HVX_ARCH__ >= 60 | |
| 166 | 139 | /* ========================================================================== |
| 167 | 140 | Assembly Syntax: if (Qv4) vmem(Rt32+#s4):nt=Vs32 |
| 168 | 141 | C Intrinsic Prototype: void Q6_vmem_QRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) |
| ... | ... | @@ -171,9 +144,7 @@ |
| 171 | 144 | ========================================================================== */ |
| 172 | 145 | |
| 173 | 146 | #define Q6_vmem_QRIV_nt(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_qpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) |
| 174 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 175 | 147 | |
| 176 | #if __HVX_ARCH__ >= 60 | |
| 177 | 148 | /* ========================================================================== |
| 178 | 149 | Assembly Syntax: if (Qv4) vmem(Rt32+#s4)=Vs32 |
| 179 | 150 | C Intrinsic Prototype: void Q6_vmem_QRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) |
| ... | ... | @@ -182,9 +153,7 @@ |
| 182 | 153 | ========================================================================== */ |
| 183 | 154 | |
| 184 | 155 | #define Q6_vmem_QRIV(Qv,Rt,Vs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_qpred_ai)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Rt,Vs) |
| 185 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 186 | 156 | |
| 187 | #if __HVX_ARCH__ >= 60 | |
| 188 | 157 | /* ========================================================================== |
| 189 | 158 | Assembly Syntax: Vd32.uh=vabsdiff(Vu32.h,Vv32.h) |
| 190 | 159 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -193,9 +162,7 @@ |
| 193 | 162 | ========================================================================== */ |
| 194 | 163 | |
| 195 | 164 | #define Q6_Vuh_vabsdiff_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffh)(Vu,Vv) |
| 196 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 197 | 165 | |
| 198 | #if __HVX_ARCH__ >= 60 | |
| 199 | 166 | /* ========================================================================== |
| 200 | 167 | Assembly Syntax: Vd32.ub=vabsdiff(Vu32.ub,Vv32.ub) |
| 201 | 168 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vabsdiff_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -204,9 +171,7 @@ |
| 204 | 171 | ========================================================================== */ |
| 205 | 172 | |
| 206 | 173 | #define Q6_Vub_vabsdiff_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffub)(Vu,Vv) |
| 207 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 208 | 174 | |
| 209 | #if __HVX_ARCH__ >= 60 | |
| 210 | 175 | /* ========================================================================== |
| 211 | 176 | Assembly Syntax: Vd32.uh=vabsdiff(Vu32.uh,Vv32.uh) |
| 212 | 177 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -215,9 +180,7 @@ |
| 215 | 180 | ========================================================================== */ |
| 216 | 181 | |
| 217 | 182 | #define Q6_Vuh_vabsdiff_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffuh)(Vu,Vv) |
| 218 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 219 | 183 | |
| 220 | #if __HVX_ARCH__ >= 60 | |
| 221 | 184 | /* ========================================================================== |
| 222 | 185 | Assembly Syntax: Vd32.uw=vabsdiff(Vu32.w,Vv32.w) |
| 223 | 186 | C Intrinsic Prototype: HVX_Vector Q6_Vuw_vabsdiff_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -226,9 +189,7 @@ |
| 226 | 189 | ========================================================================== */ |
| 227 | 190 | |
| 228 | 191 | #define Q6_Vuw_vabsdiff_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffw)(Vu,Vv) |
| 229 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 230 | 192 | |
| 231 | #if __HVX_ARCH__ >= 60 | |
| 232 | 193 | /* ========================================================================== |
| 233 | 194 | Assembly Syntax: Vd32.h=vabs(Vu32.h) |
| 234 | 195 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh(HVX_Vector Vu) |
| ... | ... | @@ -237,9 +198,7 @@ |
| 237 | 198 | ========================================================================== */ |
| 238 | 199 | |
| 239 | 200 | #define Q6_Vh_vabs_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh)(Vu) |
| 240 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 241 | 201 | |
| 242 | #if __HVX_ARCH__ >= 60 | |
| 243 | 202 | /* ========================================================================== |
| 244 | 203 | Assembly Syntax: Vd32.h=vabs(Vu32.h):sat |
| 245 | 204 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh_sat(HVX_Vector Vu) |
| ... | ... | @@ -248,9 +207,7 @@ |
| 248 | 207 | ========================================================================== */ |
| 249 | 208 | |
| 250 | 209 | #define Q6_Vh_vabs_Vh_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh_sat)(Vu) |
| 251 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 252 | 210 | |
| 253 | #if __HVX_ARCH__ >= 60 | |
| 254 | 211 | /* ========================================================================== |
| 255 | 212 | Assembly Syntax: Vd32.w=vabs(Vu32.w) |
| 256 | 213 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw(HVX_Vector Vu) |
| ... | ... | @@ -259,9 +216,7 @@ |
| 259 | 216 | ========================================================================== */ |
| 260 | 217 | |
| 261 | 218 | #define Q6_Vw_vabs_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw)(Vu) |
| 262 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 263 | 219 | |
| 264 | #if __HVX_ARCH__ >= 60 | |
| 265 | 220 | /* ========================================================================== |
| 266 | 221 | Assembly Syntax: Vd32.w=vabs(Vu32.w):sat |
| 267 | 222 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw_sat(HVX_Vector Vu) |
| ... | ... | @@ -270,9 +225,7 @@ |
| 270 | 225 | ========================================================================== */ |
| 271 | 226 | |
| 272 | 227 | #define Q6_Vw_vabs_Vw_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw_sat)(Vu) |
| 273 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 274 | 228 | |
| 275 | #if __HVX_ARCH__ >= 60 | |
| 276 | 229 | /* ========================================================================== |
| 277 | 230 | Assembly Syntax: Vd32.b=vadd(Vu32.b,Vv32.b) |
| 278 | 231 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vadd_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -281,9 +234,7 @@ |
| 281 | 234 | ========================================================================== */ |
| 282 | 235 | |
| 283 | 236 | #define Q6_Vb_vadd_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb)(Vu,Vv) |
| 284 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 285 | 237 | |
| 286 | #if __HVX_ARCH__ >= 60 | |
| 287 | 238 | /* ========================================================================== |
| 288 | 239 | Assembly Syntax: Vdd32.b=vadd(Vuu32.b,Vvv32.b) |
| 289 | 240 | C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vadd_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -292,9 +243,7 @@ |
| 292 | 243 | ========================================================================== */ |
| 293 | 244 | |
| 294 | 245 | #define Q6_Wb_vadd_WbWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb_dv)(Vuu,Vvv) |
| 295 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 296 | 246 | |
| 297 | #if __HVX_ARCH__ >= 60 | |
| 298 | 247 | /* ========================================================================== |
| 299 | 248 | Assembly Syntax: if (!Qv4) Vx32.b+=Vu32.b |
| 300 | 249 | C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -303,9 +252,7 @@ |
| 303 | 252 | ========================================================================== */ |
| 304 | 253 | |
| 305 | 254 | #define Q6_Vb_condacc_QnVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 306 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 307 | 255 | |
| 308 | #if __HVX_ARCH__ >= 60 | |
| 309 | 256 | /* ========================================================================== |
| 310 | 257 | Assembly Syntax: if (Qv4) Vx32.b+=Vu32.b |
| 311 | 258 | C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -314,9 +261,7 @@ |
| 314 | 261 | ========================================================================== */ |
| 315 | 262 | |
| 316 | 263 | #define Q6_Vb_condacc_QVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 317 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 318 | 264 | |
| 319 | #if __HVX_ARCH__ >= 60 | |
| 320 | 265 | /* ========================================================================== |
| 321 | 266 | Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h) |
| 322 | 267 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -325,9 +270,7 @@ |
| 325 | 270 | ========================================================================== */ |
| 326 | 271 | |
| 327 | 272 | #define Q6_Vh_vadd_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh)(Vu,Vv) |
| 328 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 329 | 273 | |
| 330 | #if __HVX_ARCH__ >= 60 | |
| 331 | 274 | /* ========================================================================== |
| 332 | 275 | Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h) |
| 333 | 276 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -336,9 +279,7 @@ |
| 336 | 279 | ========================================================================== */ |
| 337 | 280 | |
| 338 | 281 | #define Q6_Wh_vadd_WhWh(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh_dv)(Vuu,Vvv) |
| 339 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 340 | 282 | |
| 341 | #if __HVX_ARCH__ >= 60 | |
| 342 | 283 | /* ========================================================================== |
| 343 | 284 | Assembly Syntax: if (!Qv4) Vx32.h+=Vu32.h |
| 344 | 285 | C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -347,9 +288,7 @@ |
| 347 | 288 | ========================================================================== */ |
| 348 | 289 | |
| 349 | 290 | #define Q6_Vh_condacc_QnVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 350 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 351 | 291 | |
| 352 | #if __HVX_ARCH__ >= 60 | |
| 353 | 292 | /* ========================================================================== |
| 354 | 293 | Assembly Syntax: if (Qv4) Vx32.h+=Vu32.h |
| 355 | 294 | C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -358,9 +297,7 @@ |
| 358 | 297 | ========================================================================== */ |
| 359 | 298 | |
| 360 | 299 | #define Q6_Vh_condacc_QVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 361 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 362 | 300 | |
| 363 | #if __HVX_ARCH__ >= 60 | |
| 364 | 301 | /* ========================================================================== |
| 365 | 302 | Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h):sat |
| 366 | 303 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -369,9 +306,7 @@ |
| 369 | 306 | ========================================================================== */ |
| 370 | 307 | |
| 371 | 308 | #define Q6_Vh_vadd_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat)(Vu,Vv) |
| 372 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 373 | 309 | |
| 374 | #if __HVX_ARCH__ >= 60 | |
| 375 | 310 | /* ========================================================================== |
| 376 | 311 | Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h):sat |
| 377 | 312 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -380,9 +315,7 @@ |
| 380 | 315 | ========================================================================== */ |
| 381 | 316 | |
| 382 | 317 | #define Q6_Wh_vadd_WhWh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat_dv)(Vuu,Vvv) |
| 383 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 384 | 318 | |
| 385 | #if __HVX_ARCH__ >= 60 | |
| 386 | 319 | /* ========================================================================== |
| 387 | 320 | Assembly Syntax: Vdd32.w=vadd(Vu32.h,Vv32.h) |
| 388 | 321 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -391,9 +324,7 @@ |
| 391 | 324 | ========================================================================== */ |
| 392 | 325 | |
| 393 | 326 | #define Q6_Ww_vadd_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw)(Vu,Vv) |
| 394 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 395 | 327 | |
| 396 | #if __HVX_ARCH__ >= 60 | |
| 397 | 328 | /* ========================================================================== |
| 398 | 329 | Assembly Syntax: Vdd32.h=vadd(Vu32.ub,Vv32.ub) |
| 399 | 330 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -402,9 +333,7 @@ |
| 402 | 333 | ========================================================================== */ |
| 403 | 334 | |
| 404 | 335 | #define Q6_Wh_vadd_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh)(Vu,Vv) |
| 405 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 406 | 336 | |
| 407 | #if __HVX_ARCH__ >= 60 | |
| 408 | 337 | /* ========================================================================== |
| 409 | 338 | Assembly Syntax: Vd32.ub=vadd(Vu32.ub,Vv32.ub):sat |
| 410 | 339 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vadd_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -413,9 +342,7 @@ |
| 413 | 342 | ========================================================================== */ |
| 414 | 343 | |
| 415 | 344 | #define Q6_Vub_vadd_VubVub_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat)(Vu,Vv) |
| 416 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 417 | 345 | |
| 418 | #if __HVX_ARCH__ >= 60 | |
| 419 | 346 | /* ========================================================================== |
| 420 | 347 | Assembly Syntax: Vdd32.ub=vadd(Vuu32.ub,Vvv32.ub):sat |
| 421 | 348 | C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vadd_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -424,9 +351,7 @@ |
| 424 | 351 | ========================================================================== */ |
| 425 | 352 | |
| 426 | 353 | #define Q6_Wub_vadd_WubWub_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat_dv)(Vuu,Vvv) |
| 427 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 428 | 354 | |
| 429 | #if __HVX_ARCH__ >= 60 | |
| 430 | 355 | /* ========================================================================== |
| 431 | 356 | Assembly Syntax: Vd32.uh=vadd(Vu32.uh,Vv32.uh):sat |
| 432 | 357 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vadd_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -435,9 +360,7 @@ |
| 435 | 360 | ========================================================================== */ |
| 436 | 361 | |
| 437 | 362 | #define Q6_Vuh_vadd_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat)(Vu,Vv) |
| 438 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 439 | 363 | |
| 440 | #if __HVX_ARCH__ >= 60 | |
| 441 | 364 | /* ========================================================================== |
| 442 | 365 | Assembly Syntax: Vdd32.uh=vadd(Vuu32.uh,Vvv32.uh):sat |
| 443 | 366 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vadd_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -446,9 +369,7 @@ |
| 446 | 369 | ========================================================================== */ |
| 447 | 370 | |
| 448 | 371 | #define Q6_Wuh_vadd_WuhWuh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat_dv)(Vuu,Vvv) |
| 449 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 450 | 372 | |
| 451 | #if __HVX_ARCH__ >= 60 | |
| 452 | 373 | /* ========================================================================== |
| 453 | 374 | Assembly Syntax: Vdd32.w=vadd(Vu32.uh,Vv32.uh) |
| 454 | 375 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -457,9 +378,7 @@ |
| 457 | 378 | ========================================================================== */ |
| 458 | 379 | |
| 459 | 380 | #define Q6_Ww_vadd_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw)(Vu,Vv) |
| 460 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 461 | 381 | |
| 462 | #if __HVX_ARCH__ >= 60 | |
| 463 | 382 | /* ========================================================================== |
| 464 | 383 | Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w) |
| 465 | 384 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -468,9 +387,7 @@ |
| 468 | 387 | ========================================================================== */ |
| 469 | 388 | |
| 470 | 389 | #define Q6_Vw_vadd_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw)(Vu,Vv) |
| 471 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 472 | 390 | |
| 473 | #if __HVX_ARCH__ >= 60 | |
| 474 | 391 | /* ========================================================================== |
| 475 | 392 | Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w) |
| 476 | 393 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -479,9 +396,7 @@ |
| 479 | 396 | ========================================================================== */ |
| 480 | 397 | |
| 481 | 398 | #define Q6_Ww_vadd_WwWw(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw_dv)(Vuu,Vvv) |
| 482 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 483 | 399 | |
| 484 | #if __HVX_ARCH__ >= 60 | |
| 485 | 400 | /* ========================================================================== |
| 486 | 401 | Assembly Syntax: if (!Qv4) Vx32.w+=Vu32.w |
| 487 | 402 | C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -490,9 +405,7 @@ |
| 490 | 405 | ========================================================================== */ |
| 491 | 406 | |
| 492 | 407 | #define Q6_Vw_condacc_QnVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 493 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 494 | 408 | |
| 495 | #if __HVX_ARCH__ >= 60 | |
| 496 | 409 | /* ========================================================================== |
| 497 | 410 | Assembly Syntax: if (Qv4) Vx32.w+=Vu32.w |
| 498 | 411 | C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -501,9 +414,7 @@ |
| 501 | 414 | ========================================================================== */ |
| 502 | 415 | |
| 503 | 416 | #define Q6_Vw_condacc_QVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 504 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 505 | 417 | |
| 506 | #if __HVX_ARCH__ >= 60 | |
| 507 | 418 | /* ========================================================================== |
| 508 | 419 | Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w):sat |
| 509 | 420 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -512,9 +423,7 @@ |
| 512 | 423 | ========================================================================== */ |
| 513 | 424 | |
| 514 | 425 | #define Q6_Vw_vadd_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat)(Vu,Vv) |
| 515 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 516 | 426 | |
| 517 | #if __HVX_ARCH__ >= 60 | |
| 518 | 427 | /* ========================================================================== |
| 519 | 428 | Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w):sat |
| 520 | 429 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -523,9 +432,7 @@ |
| 523 | 432 | ========================================================================== */ |
| 524 | 433 | |
| 525 | 434 | #define Q6_Ww_vadd_WwWw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat_dv)(Vuu,Vvv) |
| 526 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 527 | 435 | |
| 528 | #if __HVX_ARCH__ >= 60 | |
| 529 | 436 | /* ========================================================================== |
| 530 | 437 | Assembly Syntax: Vd32=valign(Vu32,Vv32,Rt8) |
| 531 | 438 | C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -534,9 +441,7 @@ |
| 534 | 441 | ========================================================================== */ |
| 535 | 442 | |
| 536 | 443 | #define Q6_V_valign_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignb)(Vu,Vv,Rt) |
| 537 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 538 | 444 | |
| 539 | #if __HVX_ARCH__ >= 60 | |
| 540 | 445 | /* ========================================================================== |
| 541 | 446 | Assembly Syntax: Vd32=valign(Vu32,Vv32,#u3) |
| 542 | 447 | C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) |
| ... | ... | @@ -545,9 +450,7 @@ |
| 545 | 450 | ========================================================================== */ |
| 546 | 451 | |
| 547 | 452 | #define Q6_V_valign_VVI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignbi)(Vu,Vv,Iu3) |
| 548 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 549 | 453 | |
| 550 | #if __HVX_ARCH__ >= 60 | |
| 551 | 454 | /* ========================================================================== |
| 552 | 455 | Assembly Syntax: Vd32=vand(Vu32,Vv32) |
| 553 | 456 | C Intrinsic Prototype: HVX_Vector Q6_V_vand_VV(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -556,9 +459,7 @@ |
| 556 | 459 | ========================================================================== */ |
| 557 | 460 | |
| 558 | 461 | #define Q6_V_vand_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vand)(Vu,Vv) |
| 559 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 560 | 462 | |
| 561 | #if __HVX_ARCH__ >= 60 | |
| 562 | 463 | /* ========================================================================== |
| 563 | 464 | Assembly Syntax: Vd32=vand(Qu4,Rt32) |
| 564 | 465 | C Intrinsic Prototype: HVX_Vector Q6_V_vand_QR(HVX_VectorPred Qu, Word32 Rt) |
| ... | ... | @@ -567,9 +468,7 @@ |
| 567 | 468 | ========================================================================== */ |
| 568 | 469 | |
| 569 | 470 | #define Q6_V_vand_QR(Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt) |
| 570 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 571 | 471 | |
| 572 | #if __HVX_ARCH__ >= 60 | |
| 573 | 472 | /* ========================================================================== |
| 574 | 473 | Assembly Syntax: Vx32|=vand(Qu4,Rt32) |
| 575 | 474 | C Intrinsic Prototype: HVX_Vector Q6_V_vandor_VQR(HVX_Vector Vx, HVX_VectorPred Qu, Word32 Rt) |
| ... | ... | @@ -578,9 +477,7 @@ |
| 578 | 477 | ========================================================================== */ |
| 579 | 478 | |
| 580 | 479 | #define Q6_V_vandor_VQR(Vx,Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt_acc)(Vx,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt) |
| 581 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 582 | 480 | |
| 583 | #if __HVX_ARCH__ >= 60 | |
| 584 | 481 | /* ========================================================================== |
| 585 | 482 | Assembly Syntax: Qd4=vand(Vu32,Rt32) |
| 586 | 483 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vand_VR(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -589,9 +486,7 @@ |
| 589 | 486 | ========================================================================== */ |
| 590 | 487 | |
| 591 | 488 | #define Q6_Q_vand_VR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)(Vu,Rt)),-1) |
| 592 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 593 | 489 | |
| 594 | #if __HVX_ARCH__ >= 60 | |
| 595 | 490 | /* ========================================================================== |
| 596 | 491 | Assembly Syntax: Qx4|=vand(Vu32,Rt32) |
| 597 | 492 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vandor_QVR(HVX_VectorPred Qx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -600,9 +495,7 @@ |
| 600 | 495 | ========================================================================== */ |
| 601 | 496 | |
| 602 | 497 | #define Q6_Q_vandor_QVR(Qx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt_acc)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Rt)),-1) |
| 603 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 604 | 498 | |
| 605 | #if __HVX_ARCH__ >= 60 | |
| 606 | 499 | /* ========================================================================== |
| 607 | 500 | Assembly Syntax: Vd32.h=vasl(Vu32.h,Rt32) |
| 608 | 501 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhR(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -611,9 +504,7 @@ |
| 611 | 504 | ========================================================================== */ |
| 612 | 505 | |
| 613 | 506 | #define Q6_Vh_vasl_VhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh)(Vu,Rt) |
| 614 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 615 | 507 | |
| 616 | #if __HVX_ARCH__ >= 60 | |
| 617 | 508 | /* ========================================================================== |
| 618 | 509 | Assembly Syntax: Vd32.h=vasl(Vu32.h,Vv32.h) |
| 619 | 510 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -622,9 +513,7 @@ |
| 622 | 513 | ========================================================================== */ |
| 623 | 514 | |
| 624 | 515 | #define Q6_Vh_vasl_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslhv)(Vu,Vv) |
| 625 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 626 | 516 | |
| 627 | #if __HVX_ARCH__ >= 60 | |
| 628 | 517 | /* ========================================================================== |
| 629 | 518 | Assembly Syntax: Vd32.w=vasl(Vu32.w,Rt32) |
| 630 | 519 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwR(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -633,9 +522,7 @@ |
| 633 | 522 | ========================================================================== */ |
| 634 | 523 | |
| 635 | 524 | #define Q6_Vw_vasl_VwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw)(Vu,Rt) |
| 636 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 637 | 525 | |
| 638 | #if __HVX_ARCH__ >= 60 | |
| 639 | 526 | /* ========================================================================== |
| 640 | 527 | Assembly Syntax: Vx32.w+=vasl(Vu32.w,Rt32) |
| 641 | 528 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vaslacc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -644,9 +531,7 @@ |
| 644 | 531 | ========================================================================== */ |
| 645 | 532 | |
| 646 | 533 | #define Q6_Vw_vaslacc_VwVwR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw_acc)(Vx,Vu,Rt) |
| 647 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 648 | 534 | |
| 649 | #if __HVX_ARCH__ >= 60 | |
| 650 | 535 | /* ========================================================================== |
| 651 | 536 | Assembly Syntax: Vd32.w=vasl(Vu32.w,Vv32.w) |
| 652 | 537 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -655,9 +540,7 @@ |
| 655 | 540 | ========================================================================== */ |
| 656 | 541 | |
| 657 | 542 | #define Q6_Vw_vasl_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslwv)(Vu,Vv) |
| 658 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 659 | 543 | |
| 660 | #if __HVX_ARCH__ >= 60 | |
| 661 | 544 | /* ========================================================================== |
| 662 | 545 | Assembly Syntax: Vd32.h=vasr(Vu32.h,Rt32) |
| 663 | 546 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhR(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -666,9 +549,7 @@ |
| 666 | 549 | ========================================================================== */ |
| 667 | 550 | |
| 668 | 551 | #define Q6_Vh_vasr_VhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh)(Vu,Rt) |
| 669 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 670 | 552 | |
| 671 | #if __HVX_ARCH__ >= 60 | |
| 672 | 553 | /* ========================================================================== |
| 673 | 554 | Assembly Syntax: Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat |
| 674 | 555 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -677,9 +558,7 @@ |
| 677 | 558 | ========================================================================== */ |
| 678 | 559 | |
| 679 | 560 | #define Q6_Vb_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbrndsat)(Vu,Vv,Rt) |
| 680 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 681 | 561 | |
| 682 | #if __HVX_ARCH__ >= 60 | |
| 683 | 562 | /* ========================================================================== |
| 684 | 563 | Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat |
| 685 | 564 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -688,9 +567,7 @@ |
| 688 | 567 | ========================================================================== */ |
| 689 | 568 | |
| 690 | 569 | #define Q6_Vub_vasr_VhVhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubrndsat)(Vu,Vv,Rt) |
| 691 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 692 | 570 | |
| 693 | #if __HVX_ARCH__ >= 60 | |
| 694 | 571 | /* ========================================================================== |
| 695 | 572 | Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):sat |
| 696 | 573 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -699,9 +576,7 @@ |
| 699 | 576 | ========================================================================== */ |
| 700 | 577 | |
| 701 | 578 | #define Q6_Vub_vasr_VhVhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubsat)(Vu,Vv,Rt) |
| 702 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 703 | 579 | |
| 704 | #if __HVX_ARCH__ >= 60 | |
| 705 | 580 | /* ========================================================================== |
| 706 | 581 | Assembly Syntax: Vd32.h=vasr(Vu32.h,Vv32.h) |
| 707 | 582 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -710,9 +585,7 @@ |
| 710 | 585 | ========================================================================== */ |
| 711 | 586 | |
| 712 | 587 | #define Q6_Vh_vasr_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhv)(Vu,Vv) |
| 713 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 714 | 588 | |
| 715 | #if __HVX_ARCH__ >= 60 | |
| 716 | 589 | /* ========================================================================== |
| 717 | 590 | Assembly Syntax: Vd32.w=vasr(Vu32.w,Rt32) |
| 718 | 591 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwR(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -721,9 +594,7 @@ |
| 721 | 594 | ========================================================================== */ |
| 722 | 595 | |
| 723 | 596 | #define Q6_Vw_vasr_VwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw)(Vu,Rt) |
| 724 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 725 | 597 | |
| 726 | #if __HVX_ARCH__ >= 60 | |
| 727 | 598 | /* ========================================================================== |
| 728 | 599 | Assembly Syntax: Vx32.w+=vasr(Vu32.w,Rt32) |
| 729 | 600 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vasracc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -732,9 +603,7 @@ |
| 732 | 603 | ========================================================================== */ |
| 733 | 604 | |
| 734 | 605 | #define Q6_Vw_vasracc_VwVwR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw_acc)(Vx,Vu,Rt) |
| 735 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 736 | 606 | |
| 737 | #if __HVX_ARCH__ >= 60 | |
| 738 | 607 | /* ========================================================================== |
| 739 | 608 | Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8) |
| 740 | 609 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -743,9 +612,7 @@ |
| 743 | 612 | ========================================================================== */ |
| 744 | 613 | |
| 745 | 614 | #define Q6_Vh_vasr_VwVwR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwh)(Vu,Vv,Rt) |
| 746 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 747 | 615 | |
| 748 | #if __HVX_ARCH__ >= 60 | |
| 749 | 616 | /* ========================================================================== |
| 750 | 617 | Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat |
| 751 | 618 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -754,9 +621,7 @@ |
| 754 | 621 | ========================================================================== */ |
| 755 | 622 | |
| 756 | 623 | #define Q6_Vh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhrndsat)(Vu,Vv,Rt) |
| 757 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 758 | 624 | |
| 759 | #if __HVX_ARCH__ >= 60 | |
| 760 | 625 | /* ========================================================================== |
| 761 | 626 | Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):sat |
| 762 | 627 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -765,9 +630,7 @@ |
| 765 | 630 | ========================================================================== */ |
| 766 | 631 | |
| 767 | 632 | #define Q6_Vh_vasr_VwVwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhsat)(Vu,Vv,Rt) |
| 768 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 769 | 633 | |
| 770 | #if __HVX_ARCH__ >= 60 | |
| 771 | 634 | /* ========================================================================== |
| 772 | 635 | Assembly Syntax: Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):sat |
| 773 | 636 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -776,9 +639,7 @@ |
| 776 | 639 | ========================================================================== */ |
| 777 | 640 | |
| 778 | 641 | #define Q6_Vuh_vasr_VwVwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhsat)(Vu,Vv,Rt) |
| 779 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 780 | 642 | |
| 781 | #if __HVX_ARCH__ >= 60 | |
| 782 | 643 | /* ========================================================================== |
| 783 | 644 | Assembly Syntax: Vd32.w=vasr(Vu32.w,Vv32.w) |
| 784 | 645 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -787,9 +648,7 @@ |
| 787 | 648 | ========================================================================== */ |
| 788 | 649 | |
| 789 | 650 | #define Q6_Vw_vasr_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwv)(Vu,Vv) |
| 790 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 791 | 651 | |
| 792 | #if __HVX_ARCH__ >= 60 | |
| 793 | 652 | /* ========================================================================== |
| 794 | 653 | Assembly Syntax: Vd32=Vu32 |
| 795 | 654 | C Intrinsic Prototype: HVX_Vector Q6_V_equals_V(HVX_Vector Vu) |
| ... | ... | @@ -798,9 +657,7 @@ |
| 798 | 657 | ========================================================================== */ |
| 799 | 658 | |
| 800 | 659 | #define Q6_V_equals_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign)(Vu) |
| 801 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 802 | 660 | |
| 803 | #if __HVX_ARCH__ >= 60 | |
| 804 | 661 | /* ========================================================================== |
| 805 | 662 | Assembly Syntax: Vdd32=Vuu32 |
| 806 | 663 | C Intrinsic Prototype: HVX_VectorPair Q6_W_equals_W(HVX_VectorPair Vuu) |
| ... | ... | @@ -809,9 +666,7 @@ |
| 809 | 666 | ========================================================================== */ |
| 810 | 667 | |
| 811 | 668 | #define Q6_W_equals_W(Vuu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassignp)(Vuu) |
| 812 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 813 | 669 | |
| 814 | #if __HVX_ARCH__ >= 60 | |
| 815 | 670 | /* ========================================================================== |
| 816 | 671 | Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h) |
| 817 | 672 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -820,9 +675,7 @@ |
| 820 | 675 | ========================================================================== */ |
| 821 | 676 | |
| 822 | 677 | #define Q6_Vh_vavg_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgh)(Vu,Vv) |
| 823 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 824 | 678 | |
| 825 | #if __HVX_ARCH__ >= 60 | |
| 826 | 679 | /* ========================================================================== |
| 827 | 680 | Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h):rnd |
| 828 | 681 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh_rnd(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -831,9 +684,7 @@ |
| 831 | 684 | ========================================================================== */ |
| 832 | 685 | |
| 833 | 686 | #define Q6_Vh_vavg_VhVh_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavghrnd)(Vu,Vv) |
| 834 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 835 | 687 | |
| 836 | #if __HVX_ARCH__ >= 60 | |
| 837 | 688 | /* ========================================================================== |
| 838 | 689 | Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub) |
| 839 | 690 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -842,9 +693,7 @@ |
| 842 | 693 | ========================================================================== */ |
| 843 | 694 | |
| 844 | 695 | #define Q6_Vub_vavg_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgub)(Vu,Vv) |
| 845 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 846 | 696 | |
| 847 | #if __HVX_ARCH__ >= 60 | |
| 848 | 697 | /* ========================================================================== |
| 849 | 698 | Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub):rnd |
| 850 | 699 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub_rnd(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -853,9 +702,7 @@ |
| 853 | 702 | ========================================================================== */ |
| 854 | 703 | |
| 855 | 704 | #define Q6_Vub_vavg_VubVub_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgubrnd)(Vu,Vv) |
| 856 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 857 | 705 | |
| 858 | #if __HVX_ARCH__ >= 60 | |
| 859 | 706 | /* ========================================================================== |
| 860 | 707 | Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh) |
| 861 | 708 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -864,9 +711,7 @@ |
| 864 | 711 | ========================================================================== */ |
| 865 | 712 | |
| 866 | 713 | #define Q6_Vuh_vavg_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguh)(Vu,Vv) |
| 867 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 868 | 714 | |
| 869 | #if __HVX_ARCH__ >= 60 | |
| 870 | 715 | /* ========================================================================== |
| 871 | 716 | Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh):rnd |
| 872 | 717 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh_rnd(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -875,9 +720,7 @@ |
| 875 | 720 | ========================================================================== */ |
| 876 | 721 | |
| 877 | 722 | #define Q6_Vuh_vavg_VuhVuh_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguhrnd)(Vu,Vv) |
| 878 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 879 | 723 | |
| 880 | #if __HVX_ARCH__ >= 60 | |
| 881 | 724 | /* ========================================================================== |
| 882 | 725 | Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w) |
| 883 | 726 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -886,9 +729,7 @@ |
| 886 | 729 | ========================================================================== */ |
| 887 | 730 | |
| 888 | 731 | #define Q6_Vw_vavg_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgw)(Vu,Vv) |
| 889 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 890 | 732 | |
| 891 | #if __HVX_ARCH__ >= 60 | |
| 892 | 733 | /* ========================================================================== |
| 893 | 734 | Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w):rnd |
| 894 | 735 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw_rnd(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -897,9 +738,7 @@ |
| 897 | 738 | ========================================================================== */ |
| 898 | 739 | |
| 899 | 740 | #define Q6_Vw_vavg_VwVw_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgwrnd)(Vu,Vv) |
| 900 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 901 | 741 | |
| 902 | #if __HVX_ARCH__ >= 60 | |
| 903 | 742 | /* ========================================================================== |
| 904 | 743 | Assembly Syntax: Vd32.uh=vcl0(Vu32.uh) |
| 905 | 744 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcl0_Vuh(HVX_Vector Vu) |
| ... | ... | @@ -908,9 +747,7 @@ |
| 908 | 747 | ========================================================================== */ |
| 909 | 748 | |
| 910 | 749 | #define Q6_Vuh_vcl0_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0h)(Vu) |
| 911 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 912 | 750 | |
| 913 | #if __HVX_ARCH__ >= 60 | |
| 914 | 751 | /* ========================================================================== |
| 915 | 752 | Assembly Syntax: Vd32.uw=vcl0(Vu32.uw) |
| 916 | 753 | C Intrinsic Prototype: HVX_Vector Q6_Vuw_vcl0_Vuw(HVX_Vector Vu) |
| ... | ... | @@ -919,9 +756,7 @@ |
| 919 | 756 | ========================================================================== */ |
| 920 | 757 | |
| 921 | 758 | #define Q6_Vuw_vcl0_Vuw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0w)(Vu) |
| 922 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 923 | 759 | |
| 924 | #if __HVX_ARCH__ >= 60 | |
| 925 | 760 | /* ========================================================================== |
| 926 | 761 | Assembly Syntax: Vdd32=vcombine(Vu32,Vv32) |
| 927 | 762 | C Intrinsic Prototype: HVX_VectorPair Q6_W_vcombine_VV(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -930,9 +765,7 @@ |
| 930 | 765 | ========================================================================== */ |
| 931 | 766 | |
| 932 | 767 | #define Q6_W_vcombine_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcombine)(Vu,Vv) |
| 933 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 934 | 768 | |
| 935 | #if __HVX_ARCH__ >= 60 | |
| 936 | 769 | /* ========================================================================== |
| 937 | 770 | Assembly Syntax: Vd32=#0 |
| 938 | 771 | C Intrinsic Prototype: HVX_Vector Q6_V_vzero() |
| ... | ... | @@ -941,9 +774,7 @@ |
| 941 | 774 | ========================================================================== */ |
| 942 | 775 | |
| 943 | 776 | #define Q6_V_vzero() __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vd0)() |
| 944 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 945 | 777 | |
| 946 | #if __HVX_ARCH__ >= 60 | |
| 947 | 778 | /* ========================================================================== |
| 948 | 779 | Assembly Syntax: Vd32.b=vdeal(Vu32.b) |
| 949 | 780 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeal_Vb(HVX_Vector Vu) |
| ... | ... | @@ -952,9 +783,7 @@ |
| 952 | 783 | ========================================================================== */ |
| 953 | 784 | |
| 954 | 785 | #define Q6_Vb_vdeal_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb)(Vu) |
| 955 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 956 | 786 | |
| 957 | #if __HVX_ARCH__ >= 60 | |
| 958 | 787 | /* ========================================================================== |
| 959 | 788 | Assembly Syntax: Vd32.b=vdeale(Vu32.b,Vv32.b) |
| 960 | 789 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeale_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -963,9 +792,7 @@ |
| 963 | 792 | ========================================================================== */ |
| 964 | 793 | |
| 965 | 794 | #define Q6_Vb_vdeale_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb4w)(Vu,Vv) |
| 966 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 967 | 795 | |
| 968 | #if __HVX_ARCH__ >= 60 | |
| 969 | 796 | /* ========================================================================== |
| 970 | 797 | Assembly Syntax: Vd32.h=vdeal(Vu32.h) |
| 971 | 798 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vdeal_Vh(HVX_Vector Vu) |
| ... | ... | @@ -974,9 +801,7 @@ |
| 974 | 801 | ========================================================================== */ |
| 975 | 802 | |
| 976 | 803 | #define Q6_Vh_vdeal_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealh)(Vu) |
| 977 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 978 | 804 | |
| 979 | #if __HVX_ARCH__ >= 60 | |
| 980 | 805 | /* ========================================================================== |
| 981 | 806 | Assembly Syntax: Vdd32=vdeal(Vu32,Vv32,Rt8) |
| 982 | 807 | C Intrinsic Prototype: HVX_VectorPair Q6_W_vdeal_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -985,9 +810,7 @@ |
| 985 | 810 | ========================================================================== */ |
| 986 | 811 | |
| 987 | 812 | #define Q6_W_vdeal_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealvdd)(Vu,Vv,Rt) |
| 988 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 989 | 813 | |
| 990 | #if __HVX_ARCH__ >= 60 | |
| 991 | 814 | /* ========================================================================== |
| 992 | 815 | Assembly Syntax: Vd32=vdelta(Vu32,Vv32) |
| 993 | 816 | C Intrinsic Prototype: HVX_Vector Q6_V_vdelta_VV(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -996,9 +819,7 @@ |
| 996 | 819 | ========================================================================== */ |
| 997 | 820 | |
| 998 | 821 | #define Q6_V_vdelta_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdelta)(Vu,Vv) |
| 999 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1000 | 822 | |
| 1001 | #if __HVX_ARCH__ >= 60 | |
| 1002 | 823 | /* ========================================================================== |
| 1003 | 824 | Assembly Syntax: Vd32.h=vdmpy(Vu32.ub,Rt32.b) |
| 1004 | 825 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpy_VubRb(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1007,9 +828,7 @@ |
| 1007 | 828 | ========================================================================== */ |
| 1008 | 829 | |
| 1009 | 830 | #define Q6_Vh_vdmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus)(Vu,Rt) |
| 1010 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1011 | 831 | |
| 1012 | #if __HVX_ARCH__ >= 60 | |
| 1013 | 832 | /* ========================================================================== |
| 1014 | 833 | Assembly Syntax: Vx32.h+=vdmpy(Vu32.ub,Rt32.b) |
| 1015 | 834 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpyacc_VhVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1018,9 +837,7 @@ |
| 1018 | 837 | ========================================================================== */ |
| 1019 | 838 | |
| 1020 | 839 | #define Q6_Vh_vdmpyacc_VhVubRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_acc)(Vx,Vu,Rt) |
| 1021 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1022 | 840 | |
| 1023 | #if __HVX_ARCH__ >= 60 | |
| 1024 | 841 | /* ========================================================================== |
| 1025 | 842 | Assembly Syntax: Vdd32.h=vdmpy(Vuu32.ub,Rt32.b) |
| 1026 | 843 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1029,9 +846,7 @@ |
| 1029 | 846 | ========================================================================== */ |
| 1030 | 847 | |
| 1031 | 848 | #define Q6_Wh_vdmpy_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv)(Vuu,Rt) |
| 1032 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1033 | 849 | |
| 1034 | #if __HVX_ARCH__ >= 60 | |
| 1035 | 850 | /* ========================================================================== |
| 1036 | 851 | Assembly Syntax: Vxx32.h+=vdmpy(Vuu32.ub,Rt32.b) |
| 1037 | 852 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1040,9 +855,7 @@ |
| 1040 | 855 | ========================================================================== */ |
| 1041 | 856 | |
| 1042 | 857 | #define Q6_Wh_vdmpyacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv_acc)(Vxx,Vuu,Rt) |
| 1043 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1044 | 858 | |
| 1045 | #if __HVX_ARCH__ >= 60 | |
| 1046 | 859 | /* ========================================================================== |
| 1047 | 860 | Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.b) |
| 1048 | 861 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRb(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1051,9 +864,7 @@ |
| 1051 | 864 | ========================================================================== */ |
| 1052 | 865 | |
| 1053 | 866 | #define Q6_Vw_vdmpy_VhRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb)(Vu,Rt) |
| 1054 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1055 | 867 | |
| 1056 | #if __HVX_ARCH__ >= 60 | |
| 1057 | 868 | /* ========================================================================== |
| 1058 | 869 | Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.b) |
| 1059 | 870 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1062,9 +873,7 @@ |
| 1062 | 873 | ========================================================================== */ |
| 1063 | 874 | |
| 1064 | 875 | #define Q6_Vw_vdmpyacc_VwVhRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_acc)(Vx,Vu,Rt) |
| 1065 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1066 | 876 | |
| 1067 | #if __HVX_ARCH__ >= 60 | |
| 1068 | 877 | /* ========================================================================== |
| 1069 | 878 | Assembly Syntax: Vdd32.w=vdmpy(Vuu32.h,Rt32.b) |
| 1070 | 879 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1073,9 +882,7 @@ |
| 1073 | 882 | ========================================================================== */ |
| 1074 | 883 | |
| 1075 | 884 | #define Q6_Ww_vdmpy_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv)(Vuu,Rt) |
| 1076 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1077 | 885 | |
| 1078 | #if __HVX_ARCH__ >= 60 | |
| 1079 | 886 | /* ========================================================================== |
| 1080 | 887 | Assembly Syntax: Vxx32.w+=vdmpy(Vuu32.h,Rt32.b) |
| 1081 | 888 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1084,9 +891,7 @@ |
| 1084 | 891 | ========================================================================== */ |
| 1085 | 892 | |
| 1086 | 893 | #define Q6_Ww_vdmpyacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv_acc)(Vxx,Vuu,Rt) |
| 1087 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1088 | 894 | |
| 1089 | #if __HVX_ARCH__ >= 60 | |
| 1090 | 895 | /* ========================================================================== |
| 1091 | 896 | Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.h):sat |
| 1092 | 897 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRh_sat(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1095,9 +900,7 @@ |
| 1095 | 900 | ========================================================================== */ |
| 1096 | 901 | |
| 1097 | 902 | #define Q6_Vw_vdmpy_WhRh_sat(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat)(Vuu,Rt) |
| 1098 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1099 | 903 | |
| 1100 | #if __HVX_ARCH__ >= 60 | |
| 1101 | 904 | /* ========================================================================== |
| 1102 | 905 | Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.h):sat |
| 1103 | 906 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1106,9 +909,7 @@ |
| 1106 | 909 | ========================================================================== */ |
| 1107 | 910 | |
| 1108 | 911 | #define Q6_Vw_vdmpyacc_VwWhRh_sat(Vx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat_acc)(Vx,Vuu,Rt) |
| 1109 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1110 | 912 | |
| 1111 | #if __HVX_ARCH__ >= 60 | |
| 1112 | 913 | /* ========================================================================== |
| 1113 | 914 | Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.h):sat |
| 1114 | 915 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRh_sat(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1117,9 +918,7 @@ |
| 1117 | 918 | ========================================================================== */ |
| 1118 | 919 | |
| 1119 | 920 | #define Q6_Vw_vdmpy_VhRh_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat)(Vu,Rt) |
| 1120 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1121 | 921 | |
| 1122 | #if __HVX_ARCH__ >= 60 | |
| 1123 | 922 | /* ========================================================================== |
| 1124 | 923 | Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.h):sat |
| 1125 | 924 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1128,9 +927,7 @@ |
| 1128 | 927 | ========================================================================== */ |
| 1129 | 928 | |
| 1130 | 929 | #define Q6_Vw_vdmpyacc_VwVhRh_sat(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat_acc)(Vx,Vu,Rt) |
| 1131 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1132 | 930 | |
| 1133 | #if __HVX_ARCH__ >= 60 | |
| 1134 | 931 | /* ========================================================================== |
| 1135 | 932 | Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.uh,#1):sat |
| 1136 | 933 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRuh_sat(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1139,9 +936,7 @@ |
| 1139 | 936 | ========================================================================== */ |
| 1140 | 937 | |
| 1141 | 938 | #define Q6_Vw_vdmpy_WhRuh_sat(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat)(Vuu,Rt) |
| 1142 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1143 | 939 | |
| 1144 | #if __HVX_ARCH__ >= 60 | |
| 1145 | 940 | /* ========================================================================== |
| 1146 | 941 | Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.uh,#1):sat |
| 1147 | 942 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRuh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1150,9 +945,7 @@ |
| 1150 | 945 | ========================================================================== */ |
| 1151 | 946 | |
| 1152 | 947 | #define Q6_Vw_vdmpyacc_VwWhRuh_sat(Vx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat_acc)(Vx,Vuu,Rt) |
| 1153 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1154 | 948 | |
| 1155 | #if __HVX_ARCH__ >= 60 | |
| 1156 | 949 | /* ========================================================================== |
| 1157 | 950 | Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.uh):sat |
| 1158 | 951 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRuh_sat(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1161,9 +954,7 @@ |
| 1161 | 954 | ========================================================================== */ |
| 1162 | 955 | |
| 1163 | 956 | #define Q6_Vw_vdmpy_VhRuh_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat)(Vu,Rt) |
| 1164 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1165 | 957 | |
| 1166 | #if __HVX_ARCH__ >= 60 | |
| 1167 | 958 | /* ========================================================================== |
| 1168 | 959 | Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.uh):sat |
| 1169 | 960 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1172,9 +963,7 @@ |
| 1172 | 963 | ========================================================================== */ |
| 1173 | 964 | |
| 1174 | 965 | #define Q6_Vw_vdmpyacc_VwVhRuh_sat(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat_acc)(Vx,Vu,Rt) |
| 1175 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1176 | 966 | |
| 1177 | #if __HVX_ARCH__ >= 60 | |
| 1178 | 967 | /* ========================================================================== |
| 1179 | 968 | Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Vv32.h):sat |
| 1180 | 969 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1183,9 +972,7 @@ |
| 1183 | 972 | ========================================================================== */ |
| 1184 | 973 | |
| 1185 | 974 | #define Q6_Vw_vdmpy_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat)(Vu,Vv) |
| 1186 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1187 | 975 | |
| 1188 | #if __HVX_ARCH__ >= 60 | |
| 1189 | 976 | /* ========================================================================== |
| 1190 | 977 | Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Vv32.h):sat |
| 1191 | 978 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhVh_sat(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1194,9 +981,7 @@ |
| 1194 | 981 | ========================================================================== */ |
| 1195 | 982 | |
| 1196 | 983 | #define Q6_Vw_vdmpyacc_VwVhVh_sat(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat_acc)(Vx,Vu,Vv) |
| 1197 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1198 | 984 | |
| 1199 | #if __HVX_ARCH__ >= 60 | |
| 1200 | 985 | /* ========================================================================== |
| 1201 | 986 | Assembly Syntax: Vdd32.uw=vdsad(Vuu32.uh,Rt32.uh) |
| 1202 | 987 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsad_WuhRuh(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1205,9 +990,7 @@ |
| 1205 | 990 | ========================================================================== */ |
| 1206 | 991 | |
| 1207 | 992 | #define Q6_Wuw_vdsad_WuhRuh(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh)(Vuu,Rt) |
| 1208 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1209 | 993 | |
| 1210 | #if __HVX_ARCH__ >= 60 | |
| 1211 | 994 | /* ========================================================================== |
| 1212 | 995 | Assembly Syntax: Vxx32.uw+=vdsad(Vuu32.uh,Rt32.uh) |
| 1213 | 996 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsadacc_WuwWuhRuh(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1216,9 +999,7 @@ |
| 1216 | 999 | ========================================================================== */ |
| 1217 | 1000 | |
| 1218 | 1001 | #define Q6_Wuw_vdsadacc_WuwWuhRuh(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh_acc)(Vxx,Vuu,Rt) |
| 1219 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1220 | 1002 | |
| 1221 | #if __HVX_ARCH__ >= 60 | |
| 1222 | 1003 | /* ========================================================================== |
| 1223 | 1004 | Assembly Syntax: Qd4=vcmp.eq(Vu32.b,Vv32.b) |
| 1224 | 1005 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1227,9 +1008,7 @@ |
| 1227 | 1008 | ========================================================================== */ |
| 1228 | 1009 | |
| 1229 | 1010 | #define Q6_Q_vcmp_eq_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb)(Vu,Vv)),-1) |
| 1230 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1231 | 1011 | |
| 1232 | #if __HVX_ARCH__ >= 60 | |
| 1233 | 1012 | /* ========================================================================== |
| 1234 | 1013 | Assembly Syntax: Qx4&=vcmp.eq(Vu32.b,Vv32.b) |
| 1235 | 1014 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1238,9 +1017,7 @@ |
| 1238 | 1017 | ========================================================================== */ |
| 1239 | 1018 | |
| 1240 | 1019 | #define Q6_Q_vcmp_eqand_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1241 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1242 | 1020 | |
| 1243 | #if __HVX_ARCH__ >= 60 | |
| 1244 | 1021 | /* ========================================================================== |
| 1245 | 1022 | Assembly Syntax: Qx4|=vcmp.eq(Vu32.b,Vv32.b) |
| 1246 | 1023 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1249,9 +1026,7 @@ |
| 1249 | 1026 | ========================================================================== */ |
| 1250 | 1027 | |
| 1251 | 1028 | #define Q6_Q_vcmp_eqor_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1252 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1253 | 1029 | |
| 1254 | #if __HVX_ARCH__ >= 60 | |
| 1255 | 1030 | /* ========================================================================== |
| 1256 | 1031 | Assembly Syntax: Qx4^=vcmp.eq(Vu32.b,Vv32.b) |
| 1257 | 1032 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1260,9 +1035,7 @@ |
| 1260 | 1035 | ========================================================================== */ |
| 1261 | 1036 | |
| 1262 | 1037 | #define Q6_Q_vcmp_eqxacc_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1263 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1264 | 1038 | |
| 1265 | #if __HVX_ARCH__ >= 60 | |
| 1266 | 1039 | /* ========================================================================== |
| 1267 | 1040 | Assembly Syntax: Qd4=vcmp.eq(Vu32.h,Vv32.h) |
| 1268 | 1041 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1271,9 +1044,7 @@ |
| 1271 | 1044 | ========================================================================== */ |
| 1272 | 1045 | |
| 1273 | 1046 | #define Q6_Q_vcmp_eq_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh)(Vu,Vv)),-1) |
| 1274 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1275 | 1047 | |
| 1276 | #if __HVX_ARCH__ >= 60 | |
| 1277 | 1048 | /* ========================================================================== |
| 1278 | 1049 | Assembly Syntax: Qx4&=vcmp.eq(Vu32.h,Vv32.h) |
| 1279 | 1050 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1282,9 +1053,7 @@ |
| 1282 | 1053 | ========================================================================== */ |
| 1283 | 1054 | |
| 1284 | 1055 | #define Q6_Q_vcmp_eqand_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1285 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1286 | 1056 | |
| 1287 | #if __HVX_ARCH__ >= 60 | |
| 1288 | 1057 | /* ========================================================================== |
| 1289 | 1058 | Assembly Syntax: Qx4|=vcmp.eq(Vu32.h,Vv32.h) |
| 1290 | 1059 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1293,9 +1062,7 @@ |
| 1293 | 1062 | ========================================================================== */ |
| 1294 | 1063 | |
| 1295 | 1064 | #define Q6_Q_vcmp_eqor_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1296 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1297 | 1065 | |
| 1298 | #if __HVX_ARCH__ >= 60 | |
| 1299 | 1066 | /* ========================================================================== |
| 1300 | 1067 | Assembly Syntax: Qx4^=vcmp.eq(Vu32.h,Vv32.h) |
| 1301 | 1068 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1304,9 +1071,7 @@ |
| 1304 | 1071 | ========================================================================== */ |
| 1305 | 1072 | |
| 1306 | 1073 | #define Q6_Q_vcmp_eqxacc_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1307 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1308 | 1074 | |
| 1309 | #if __HVX_ARCH__ >= 60 | |
| 1310 | 1075 | /* ========================================================================== |
| 1311 | 1076 | Assembly Syntax: Qd4=vcmp.eq(Vu32.w,Vv32.w) |
| 1312 | 1077 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1315,9 +1080,7 @@ |
| 1315 | 1080 | ========================================================================== */ |
| 1316 | 1081 | |
| 1317 | 1082 | #define Q6_Q_vcmp_eq_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw)(Vu,Vv)),-1) |
| 1318 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1319 | 1083 | |
| 1320 | #if __HVX_ARCH__ >= 60 | |
| 1321 | 1084 | /* ========================================================================== |
| 1322 | 1085 | Assembly Syntax: Qx4&=vcmp.eq(Vu32.w,Vv32.w) |
| 1323 | 1086 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1326,9 +1089,7 @@ |
| 1326 | 1089 | ========================================================================== */ |
| 1327 | 1090 | |
| 1328 | 1091 | #define Q6_Q_vcmp_eqand_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1329 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1330 | 1092 | |
| 1331 | #if __HVX_ARCH__ >= 60 | |
| 1332 | 1093 | /* ========================================================================== |
| 1333 | 1094 | Assembly Syntax: Qx4|=vcmp.eq(Vu32.w,Vv32.w) |
| 1334 | 1095 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1337,9 +1098,7 @@ |
| 1337 | 1098 | ========================================================================== */ |
| 1338 | 1099 | |
| 1339 | 1100 | #define Q6_Q_vcmp_eqor_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1340 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1341 | 1101 | |
| 1342 | #if __HVX_ARCH__ >= 60 | |
| 1343 | 1102 | /* ========================================================================== |
| 1344 | 1103 | Assembly Syntax: Qx4^=vcmp.eq(Vu32.w,Vv32.w) |
| 1345 | 1104 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1348,9 +1107,7 @@ |
| 1348 | 1107 | ========================================================================== */ |
| 1349 | 1108 | |
| 1350 | 1109 | #define Q6_Q_vcmp_eqxacc_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1351 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1352 | 1110 | |
| 1353 | #if __HVX_ARCH__ >= 60 | |
| 1354 | 1111 | /* ========================================================================== |
| 1355 | 1112 | Assembly Syntax: Qd4=vcmp.gt(Vu32.b,Vv32.b) |
| 1356 | 1113 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1359,9 +1116,7 @@ |
| 1359 | 1116 | ========================================================================== */ |
| 1360 | 1117 | |
| 1361 | 1118 | #define Q6_Q_vcmp_gt_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb)(Vu,Vv)),-1) |
| 1362 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1363 | 1119 | |
| 1364 | #if __HVX_ARCH__ >= 60 | |
| 1365 | 1120 | /* ========================================================================== |
| 1366 | 1121 | Assembly Syntax: Qx4&=vcmp.gt(Vu32.b,Vv32.b) |
| 1367 | 1122 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1370,9 +1125,7 @@ |
| 1370 | 1125 | ========================================================================== */ |
| 1371 | 1126 | |
| 1372 | 1127 | #define Q6_Q_vcmp_gtand_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1373 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1374 | 1128 | |
| 1375 | #if __HVX_ARCH__ >= 60 | |
| 1376 | 1129 | /* ========================================================================== |
| 1377 | 1130 | Assembly Syntax: Qx4|=vcmp.gt(Vu32.b,Vv32.b) |
| 1378 | 1131 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1381,9 +1134,7 @@ |
| 1381 | 1134 | ========================================================================== */ |
| 1382 | 1135 | |
| 1383 | 1136 | #define Q6_Q_vcmp_gtor_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1384 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1385 | 1137 | |
| 1386 | #if __HVX_ARCH__ >= 60 | |
| 1387 | 1138 | /* ========================================================================== |
| 1388 | 1139 | Assembly Syntax: Qx4^=vcmp.gt(Vu32.b,Vv32.b) |
| 1389 | 1140 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1392,9 +1143,7 @@ |
| 1392 | 1143 | ========================================================================== */ |
| 1393 | 1144 | |
| 1394 | 1145 | #define Q6_Q_vcmp_gtxacc_QVbVb(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1395 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1396 | 1146 | |
| 1397 | #if __HVX_ARCH__ >= 60 | |
| 1398 | 1147 | /* ========================================================================== |
| 1399 | 1148 | Assembly Syntax: Qd4=vcmp.gt(Vu32.h,Vv32.h) |
| 1400 | 1149 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1403,9 +1152,7 @@ |
| 1403 | 1152 | ========================================================================== */ |
| 1404 | 1153 | |
| 1405 | 1154 | #define Q6_Q_vcmp_gt_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth)(Vu,Vv)),-1) |
| 1406 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1407 | 1155 | |
| 1408 | #if __HVX_ARCH__ >= 60 | |
| 1409 | 1156 | /* ========================================================================== |
| 1410 | 1157 | Assembly Syntax: Qx4&=vcmp.gt(Vu32.h,Vv32.h) |
| 1411 | 1158 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1414,9 +1161,7 @@ |
| 1414 | 1161 | ========================================================================== */ |
| 1415 | 1162 | |
| 1416 | 1163 | #define Q6_Q_vcmp_gtand_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1417 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1418 | 1164 | |
| 1419 | #if __HVX_ARCH__ >= 60 | |
| 1420 | 1165 | /* ========================================================================== |
| 1421 | 1166 | Assembly Syntax: Qx4|=vcmp.gt(Vu32.h,Vv32.h) |
| 1422 | 1167 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1425,9 +1170,7 @@ |
| 1425 | 1170 | ========================================================================== */ |
| 1426 | 1171 | |
| 1427 | 1172 | #define Q6_Q_vcmp_gtor_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1428 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1429 | 1173 | |
| 1430 | #if __HVX_ARCH__ >= 60 | |
| 1431 | 1174 | /* ========================================================================== |
| 1432 | 1175 | Assembly Syntax: Qx4^=vcmp.gt(Vu32.h,Vv32.h) |
| 1433 | 1176 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1436,9 +1179,7 @@ |
| 1436 | 1179 | ========================================================================== */ |
| 1437 | 1180 | |
| 1438 | 1181 | #define Q6_Q_vcmp_gtxacc_QVhVh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1439 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1440 | 1182 | |
| 1441 | #if __HVX_ARCH__ >= 60 | |
| 1442 | 1183 | /* ========================================================================== |
| 1443 | 1184 | Assembly Syntax: Qd4=vcmp.gt(Vu32.ub,Vv32.ub) |
| 1444 | 1185 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1447,9 +1188,7 @@ |
| 1447 | 1188 | ========================================================================== */ |
| 1448 | 1189 | |
| 1449 | 1190 | #define Q6_Q_vcmp_gt_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub)(Vu,Vv)),-1) |
| 1450 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1451 | 1191 | |
| 1452 | #if __HVX_ARCH__ >= 60 | |
| 1453 | 1192 | /* ========================================================================== |
| 1454 | 1193 | Assembly Syntax: Qx4&=vcmp.gt(Vu32.ub,Vv32.ub) |
| 1455 | 1194 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1458,9 +1197,7 @@ |
| 1458 | 1197 | ========================================================================== */ |
| 1459 | 1198 | |
| 1460 | 1199 | #define Q6_Q_vcmp_gtand_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1461 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1462 | 1200 | |
| 1463 | #if __HVX_ARCH__ >= 60 | |
| 1464 | 1201 | /* ========================================================================== |
| 1465 | 1202 | Assembly Syntax: Qx4|=vcmp.gt(Vu32.ub,Vv32.ub) |
| 1466 | 1203 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1469,9 +1206,7 @@ |
| 1469 | 1206 | ========================================================================== */ |
| 1470 | 1207 | |
| 1471 | 1208 | #define Q6_Q_vcmp_gtor_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1472 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1473 | 1209 | |
| 1474 | #if __HVX_ARCH__ >= 60 | |
| 1475 | 1210 | /* ========================================================================== |
| 1476 | 1211 | Assembly Syntax: Qx4^=vcmp.gt(Vu32.ub,Vv32.ub) |
| 1477 | 1212 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1480,9 +1215,7 @@ |
| 1480 | 1215 | ========================================================================== */ |
| 1481 | 1216 | |
| 1482 | 1217 | #define Q6_Q_vcmp_gtxacc_QVubVub(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1483 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1484 | 1218 | |
| 1485 | #if __HVX_ARCH__ >= 60 | |
| 1486 | 1219 | /* ========================================================================== |
| 1487 | 1220 | Assembly Syntax: Qd4=vcmp.gt(Vu32.uh,Vv32.uh) |
| 1488 | 1221 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1491,9 +1224,7 @@ |
| 1491 | 1224 | ========================================================================== */ |
| 1492 | 1225 | |
| 1493 | 1226 | #define Q6_Q_vcmp_gt_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh)(Vu,Vv)),-1) |
| 1494 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1495 | 1227 | |
| 1496 | #if __HVX_ARCH__ >= 60 | |
| 1497 | 1228 | /* ========================================================================== |
| 1498 | 1229 | Assembly Syntax: Qx4&=vcmp.gt(Vu32.uh,Vv32.uh) |
| 1499 | 1230 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1502,9 +1233,7 @@ |
| 1502 | 1233 | ========================================================================== */ |
| 1503 | 1234 | |
| 1504 | 1235 | #define Q6_Q_vcmp_gtand_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1505 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1506 | 1236 | |
| 1507 | #if __HVX_ARCH__ >= 60 | |
| 1508 | 1237 | /* ========================================================================== |
| 1509 | 1238 | Assembly Syntax: Qx4|=vcmp.gt(Vu32.uh,Vv32.uh) |
| 1510 | 1239 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1513,9 +1242,7 @@ |
| 1513 | 1242 | ========================================================================== */ |
| 1514 | 1243 | |
| 1515 | 1244 | #define Q6_Q_vcmp_gtor_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1516 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1517 | 1245 | |
| 1518 | #if __HVX_ARCH__ >= 60 | |
| 1519 | 1246 | /* ========================================================================== |
| 1520 | 1247 | Assembly Syntax: Qx4^=vcmp.gt(Vu32.uh,Vv32.uh) |
| 1521 | 1248 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1524,9 +1251,7 @@ |
| 1524 | 1251 | ========================================================================== */ |
| 1525 | 1252 | |
| 1526 | 1253 | #define Q6_Q_vcmp_gtxacc_QVuhVuh(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1527 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1528 | 1254 | |
| 1529 | #if __HVX_ARCH__ >= 60 | |
| 1530 | 1255 | /* ========================================================================== |
| 1531 | 1256 | Assembly Syntax: Qd4=vcmp.gt(Vu32.uw,Vv32.uw) |
| 1532 | 1257 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1535,9 +1260,7 @@ |
| 1535 | 1260 | ========================================================================== */ |
| 1536 | 1261 | |
| 1537 | 1262 | #define Q6_Q_vcmp_gt_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw)(Vu,Vv)),-1) |
| 1538 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1539 | 1263 | |
| 1540 | #if __HVX_ARCH__ >= 60 | |
| 1541 | 1264 | /* ========================================================================== |
| 1542 | 1265 | Assembly Syntax: Qx4&=vcmp.gt(Vu32.uw,Vv32.uw) |
| 1543 | 1266 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1546,9 +1269,7 @@ |
| 1546 | 1269 | ========================================================================== */ |
| 1547 | 1270 | |
| 1548 | 1271 | #define Q6_Q_vcmp_gtand_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1549 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1550 | 1272 | |
| 1551 | #if __HVX_ARCH__ >= 60 | |
| 1552 | 1273 | /* ========================================================================== |
| 1553 | 1274 | Assembly Syntax: Qx4|=vcmp.gt(Vu32.uw,Vv32.uw) |
| 1554 | 1275 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1557,9 +1278,7 @@ |
| 1557 | 1278 | ========================================================================== */ |
| 1558 | 1279 | |
| 1559 | 1280 | #define Q6_Q_vcmp_gtor_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1560 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1561 | 1281 | |
| 1562 | #if __HVX_ARCH__ >= 60 | |
| 1563 | 1282 | /* ========================================================================== |
| 1564 | 1283 | Assembly Syntax: Qx4^=vcmp.gt(Vu32.uw,Vv32.uw) |
| 1565 | 1284 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1568,9 +1287,7 @@ |
| 1568 | 1287 | ========================================================================== */ |
| 1569 | 1288 | |
| 1570 | 1289 | #define Q6_Q_vcmp_gtxacc_QVuwVuw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1571 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1572 | 1290 | |
| 1573 | #if __HVX_ARCH__ >= 60 | |
| 1574 | 1291 | /* ========================================================================== |
| 1575 | 1292 | Assembly Syntax: Qd4=vcmp.gt(Vu32.w,Vv32.w) |
| 1576 | 1293 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1579,9 +1296,7 @@ |
| 1579 | 1296 | ========================================================================== */ |
| 1580 | 1297 | |
| 1581 | 1298 | #define Q6_Q_vcmp_gt_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw)(Vu,Vv)),-1) |
| 1582 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1583 | 1299 | |
| 1584 | #if __HVX_ARCH__ >= 60 | |
| 1585 | 1300 | /* ========================================================================== |
| 1586 | 1301 | Assembly Syntax: Qx4&=vcmp.gt(Vu32.w,Vv32.w) |
| 1587 | 1302 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1590,9 +1305,7 @@ |
| 1590 | 1305 | ========================================================================== */ |
| 1591 | 1306 | |
| 1592 | 1307 | #define Q6_Q_vcmp_gtand_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1593 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1594 | 1308 | |
| 1595 | #if __HVX_ARCH__ >= 60 | |
| 1596 | 1309 | /* ========================================================================== |
| 1597 | 1310 | Assembly Syntax: Qx4|=vcmp.gt(Vu32.w,Vv32.w) |
| 1598 | 1311 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1601,9 +1314,7 @@ |
| 1601 | 1314 | ========================================================================== */ |
| 1602 | 1315 | |
| 1603 | 1316 | #define Q6_Q_vcmp_gtor_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1604 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1605 | 1317 | |
| 1606 | #if __HVX_ARCH__ >= 60 | |
| 1607 | 1318 | /* ========================================================================== |
| 1608 | 1319 | Assembly Syntax: Qx4^=vcmp.gt(Vu32.w,Vv32.w) |
| 1609 | 1320 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1612,9 +1323,7 @@ |
| 1612 | 1323 | ========================================================================== */ |
| 1613 | 1324 | |
| 1614 | 1325 | #define Q6_Q_vcmp_gtxacc_QVwVw(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 1615 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1616 | 1326 | |
| 1617 | #if __HVX_ARCH__ >= 60 | |
| 1618 | 1327 | /* ========================================================================== |
| 1619 | 1328 | Assembly Syntax: Vx32.w=vinsert(Rt32) |
| 1620 | 1329 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vinsert_VwR(HVX_Vector Vx, Word32 Rt) |
| ... | ... | @@ -1623,9 +1332,7 @@ |
| 1623 | 1332 | ========================================================================== */ |
| 1624 | 1333 | |
| 1625 | 1334 | #define Q6_Vw_vinsert_VwR(Vx,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vinsertwr)(Vx,Rt) |
| 1626 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1627 | 1335 | |
| 1628 | #if __HVX_ARCH__ >= 60 | |
| 1629 | 1336 | /* ========================================================================== |
| 1630 | 1337 | Assembly Syntax: Vd32=vlalign(Vu32,Vv32,Rt8) |
| 1631 | 1338 | C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -1634,9 +1341,7 @@ |
| 1634 | 1341 | ========================================================================== */ |
| 1635 | 1342 | |
| 1636 | 1343 | #define Q6_V_vlalign_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignb)(Vu,Vv,Rt) |
| 1637 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1638 | 1344 | |
| 1639 | #if __HVX_ARCH__ >= 60 | |
| 1640 | 1345 | /* ========================================================================== |
| 1641 | 1346 | Assembly Syntax: Vd32=vlalign(Vu32,Vv32,#u3) |
| 1642 | 1347 | C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) |
| ... | ... | @@ -1645,9 +1350,7 @@ |
| 1645 | 1350 | ========================================================================== */ |
| 1646 | 1351 | |
| 1647 | 1352 | #define Q6_V_vlalign_VVI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignbi)(Vu,Vv,Iu3) |
| 1648 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1649 | 1353 | |
| 1650 | #if __HVX_ARCH__ >= 60 | |
| 1651 | 1354 | /* ========================================================================== |
| 1652 | 1355 | Assembly Syntax: Vd32.uh=vlsr(Vu32.uh,Rt32) |
| 1653 | 1356 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vlsr_VuhR(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1656,9 +1359,7 @@ |
| 1656 | 1359 | ========================================================================== */ |
| 1657 | 1360 | |
| 1658 | 1361 | #define Q6_Vuh_vlsr_VuhR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrh)(Vu,Rt) |
| 1659 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1660 | 1362 | |
| 1661 | #if __HVX_ARCH__ >= 60 | |
| 1662 | 1363 | /* ========================================================================== |
| 1663 | 1364 | Assembly Syntax: Vd32.h=vlsr(Vu32.h,Vv32.h) |
| 1664 | 1365 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vlsr_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1667,9 +1368,7 @@ |
| 1667 | 1368 | ========================================================================== */ |
| 1668 | 1369 | |
| 1669 | 1370 | #define Q6_Vh_vlsr_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrhv)(Vu,Vv) |
| 1670 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1671 | 1371 | |
| 1672 | #if __HVX_ARCH__ >= 60 | |
| 1673 | 1372 | /* ========================================================================== |
| 1674 | 1373 | Assembly Syntax: Vd32.uw=vlsr(Vu32.uw,Rt32) |
| 1675 | 1374 | C Intrinsic Prototype: HVX_Vector Q6_Vuw_vlsr_VuwR(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1678,9 +1377,7 @@ |
| 1678 | 1377 | ========================================================================== */ |
| 1679 | 1378 | |
| 1680 | 1379 | #define Q6_Vuw_vlsr_VuwR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrw)(Vu,Rt) |
| 1681 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1682 | 1380 | |
| 1683 | #if __HVX_ARCH__ >= 60 | |
| 1684 | 1381 | /* ========================================================================== |
| 1685 | 1382 | Assembly Syntax: Vd32.w=vlsr(Vu32.w,Vv32.w) |
| 1686 | 1383 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vlsr_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1689,9 +1386,7 @@ |
| 1689 | 1386 | ========================================================================== */ |
| 1690 | 1387 | |
| 1691 | 1388 | #define Q6_Vw_vlsr_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrwv)(Vu,Vv) |
| 1692 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1693 | 1389 | |
| 1694 | #if __HVX_ARCH__ >= 60 | |
| 1695 | 1390 | /* ========================================================================== |
| 1696 | 1391 | Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8) |
| 1697 | 1392 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -1700,9 +1395,7 @@ |
| 1700 | 1395 | ========================================================================== */ |
| 1701 | 1396 | |
| 1702 | 1397 | #define Q6_Vb_vlut32_VbVbR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb)(Vu,Vv,Rt) |
| 1703 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1704 | 1398 | |
| 1705 | #if __HVX_ARCH__ >= 60 | |
| 1706 | 1399 | /* ========================================================================== |
| 1707 | 1400 | Assembly Syntax: Vx32.b|=vlut32(Vu32.b,Vv32.b,Rt8) |
| 1708 | 1401 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32or_VbVbVbR(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -1711,9 +1404,7 @@ |
| 1711 | 1404 | ========================================================================== */ |
| 1712 | 1405 | |
| 1713 | 1406 | #define Q6_Vb_vlut32or_VbVbVbR(Vx,Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracc)(Vx,Vu,Vv,Rt) |
| 1714 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1715 | 1407 | |
| 1716 | #if __HVX_ARCH__ >= 60 | |
| 1717 | 1408 | /* ========================================================================== |
| 1718 | 1409 | Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8) |
| 1719 | 1410 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -1722,9 +1413,7 @@ |
| 1722 | 1413 | ========================================================================== */ |
| 1723 | 1414 | |
| 1724 | 1415 | #define Q6_Wh_vlut16_VbVhR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh)(Vu,Vv,Rt) |
| 1725 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1726 | 1416 | |
| 1727 | #if __HVX_ARCH__ >= 60 | |
| 1728 | 1417 | /* ========================================================================== |
| 1729 | 1418 | Assembly Syntax: Vxx32.h|=vlut16(Vu32.b,Vv32.h,Rt8) |
| 1730 | 1419 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16or_WhVbVhR(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -1733,9 +1422,7 @@ |
| 1733 | 1422 | ========================================================================== */ |
| 1734 | 1423 | |
| 1735 | 1424 | #define Q6_Wh_vlut16or_WhVbVhR(Vxx,Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracc)(Vxx,Vu,Vv,Rt) |
| 1736 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1737 | 1425 | |
| 1738 | #if __HVX_ARCH__ >= 60 | |
| 1739 | 1426 | /* ========================================================================== |
| 1740 | 1427 | Assembly Syntax: Vd32.h=vmax(Vu32.h,Vv32.h) |
| 1741 | 1428 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmax_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1744,9 +1431,7 @@ |
| 1744 | 1431 | ========================================================================== */ |
| 1745 | 1432 | |
| 1746 | 1433 | #define Q6_Vh_vmax_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxh)(Vu,Vv) |
| 1747 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1748 | 1434 | |
| 1749 | #if __HVX_ARCH__ >= 60 | |
| 1750 | 1435 | /* ========================================================================== |
| 1751 | 1436 | Assembly Syntax: Vd32.ub=vmax(Vu32.ub,Vv32.ub) |
| 1752 | 1437 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vmax_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1755,9 +1440,7 @@ |
| 1755 | 1440 | ========================================================================== */ |
| 1756 | 1441 | |
| 1757 | 1442 | #define Q6_Vub_vmax_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxub)(Vu,Vv) |
| 1758 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1759 | 1443 | |
| 1760 | #if __HVX_ARCH__ >= 60 | |
| 1761 | 1444 | /* ========================================================================== |
| 1762 | 1445 | Assembly Syntax: Vd32.uh=vmax(Vu32.uh,Vv32.uh) |
| 1763 | 1446 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmax_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1766,9 +1449,7 @@ |
| 1766 | 1449 | ========================================================================== */ |
| 1767 | 1450 | |
| 1768 | 1451 | #define Q6_Vuh_vmax_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxuh)(Vu,Vv) |
| 1769 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1770 | 1452 | |
| 1771 | #if __HVX_ARCH__ >= 60 | |
| 1772 | 1453 | /* ========================================================================== |
| 1773 | 1454 | Assembly Syntax: Vd32.w=vmax(Vu32.w,Vv32.w) |
| 1774 | 1455 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmax_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1777,9 +1458,7 @@ |
| 1777 | 1458 | ========================================================================== */ |
| 1778 | 1459 | |
| 1779 | 1460 | #define Q6_Vw_vmax_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxw)(Vu,Vv) |
| 1780 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1781 | 1461 | |
| 1782 | #if __HVX_ARCH__ >= 60 | |
| 1783 | 1462 | /* ========================================================================== |
| 1784 | 1463 | Assembly Syntax: Vd32.h=vmin(Vu32.h,Vv32.h) |
| 1785 | 1464 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmin_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1788,9 +1467,7 @@ |
| 1788 | 1467 | ========================================================================== */ |
| 1789 | 1468 | |
| 1790 | 1469 | #define Q6_Vh_vmin_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminh)(Vu,Vv) |
| 1791 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1792 | 1470 | |
| 1793 | #if __HVX_ARCH__ >= 60 | |
| 1794 | 1471 | /* ========================================================================== |
| 1795 | 1472 | Assembly Syntax: Vd32.ub=vmin(Vu32.ub,Vv32.ub) |
| 1796 | 1473 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vmin_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1799,9 +1476,7 @@ |
| 1799 | 1476 | ========================================================================== */ |
| 1800 | 1477 | |
| 1801 | 1478 | #define Q6_Vub_vmin_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminub)(Vu,Vv) |
| 1802 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1803 | 1479 | |
| 1804 | #if __HVX_ARCH__ >= 60 | |
| 1805 | 1480 | /* ========================================================================== |
| 1806 | 1481 | Assembly Syntax: Vd32.uh=vmin(Vu32.uh,Vv32.uh) |
| 1807 | 1482 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmin_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1810,9 +1485,7 @@ |
| 1810 | 1485 | ========================================================================== */ |
| 1811 | 1486 | |
| 1812 | 1487 | #define Q6_Vuh_vmin_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminuh)(Vu,Vv) |
| 1813 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1814 | 1488 | |
| 1815 | #if __HVX_ARCH__ >= 60 | |
| 1816 | 1489 | /* ========================================================================== |
| 1817 | 1490 | Assembly Syntax: Vd32.w=vmin(Vu32.w,Vv32.w) |
| 1818 | 1491 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmin_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1821,9 +1494,7 @@ |
| 1821 | 1494 | ========================================================================== */ |
| 1822 | 1495 | |
| 1823 | 1496 | #define Q6_Vw_vmin_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminw)(Vu,Vv) |
| 1824 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1825 | 1497 | |
| 1826 | #if __HVX_ARCH__ >= 60 | |
| 1827 | 1498 | /* ========================================================================== |
| 1828 | 1499 | Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Rt32.b) |
| 1829 | 1500 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubRb(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1832,9 +1503,7 @@ |
| 1832 | 1503 | ========================================================================== */ |
| 1833 | 1504 | |
| 1834 | 1505 | #define Q6_Wh_vmpa_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus)(Vuu,Rt) |
| 1835 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1836 | 1506 | |
| 1837 | #if __HVX_ARCH__ >= 60 | |
| 1838 | 1507 | /* ========================================================================== |
| 1839 | 1508 | Assembly Syntax: Vxx32.h+=vmpa(Vuu32.ub,Rt32.b) |
| 1840 | 1509 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpaacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1843,9 +1512,7 @@ |
| 1843 | 1512 | ========================================================================== */ |
| 1844 | 1513 | |
| 1845 | 1514 | #define Q6_Wh_vmpaacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus_acc)(Vxx,Vuu,Rt) |
| 1846 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1847 | 1515 | |
| 1848 | #if __HVX_ARCH__ >= 60 | |
| 1849 | 1516 | /* ========================================================================== |
| 1850 | 1517 | Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.b) |
| 1851 | 1518 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -1854,9 +1521,7 @@ |
| 1854 | 1521 | ========================================================================== */ |
| 1855 | 1522 | |
| 1856 | 1523 | #define Q6_Wh_vmpa_WubWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabusv)(Vuu,Vvv) |
| 1857 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1858 | 1524 | |
| 1859 | #if __HVX_ARCH__ >= 60 | |
| 1860 | 1525 | /* ========================================================================== |
| 1861 | 1526 | Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.ub) |
| 1862 | 1527 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWub(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -1865,9 +1530,7 @@ |
| 1865 | 1530 | ========================================================================== */ |
| 1866 | 1531 | |
| 1867 | 1532 | #define Q6_Wh_vmpa_WubWub(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuuv)(Vuu,Vvv) |
| 1868 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1869 | 1533 | |
| 1870 | #if __HVX_ARCH__ >= 60 | |
| 1871 | 1534 | /* ========================================================================== |
| 1872 | 1535 | Assembly Syntax: Vdd32.w=vmpa(Vuu32.h,Rt32.b) |
| 1873 | 1536 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpa_WhRb(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1876,9 +1539,7 @@ |
| 1876 | 1539 | ========================================================================== */ |
| 1877 | 1540 | |
| 1878 | 1541 | #define Q6_Ww_vmpa_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb)(Vuu,Rt) |
| 1879 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1880 | 1542 | |
| 1881 | #if __HVX_ARCH__ >= 60 | |
| 1882 | 1543 | /* ========================================================================== |
| 1883 | 1544 | Assembly Syntax: Vxx32.w+=vmpa(Vuu32.h,Rt32.b) |
| 1884 | 1545 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpaacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -1887,9 +1548,7 @@ |
| 1887 | 1548 | ========================================================================== */ |
| 1888 | 1549 | |
| 1889 | 1550 | #define Q6_Ww_vmpaacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb_acc)(Vxx,Vuu,Rt) |
| 1890 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1891 | 1551 | |
| 1892 | #if __HVX_ARCH__ >= 60 | |
| 1893 | 1552 | /* ========================================================================== |
| 1894 | 1553 | Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Rt32.b) |
| 1895 | 1554 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubRb(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1898,9 +1557,7 @@ |
| 1898 | 1557 | ========================================================================== */ |
| 1899 | 1558 | |
| 1900 | 1559 | #define Q6_Wh_vmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus)(Vu,Rt) |
| 1901 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1902 | 1560 | |
| 1903 | #if __HVX_ARCH__ >= 60 | |
| 1904 | 1561 | /* ========================================================================== |
| 1905 | 1562 | Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Rt32.b) |
| 1906 | 1563 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubRb(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1909,9 +1566,7 @@ |
| 1909 | 1566 | ========================================================================== */ |
| 1910 | 1567 | |
| 1911 | 1568 | #define Q6_Wh_vmpyacc_WhVubRb(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus_acc)(Vxx,Vu,Rt) |
| 1912 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1913 | 1569 | |
| 1914 | #if __HVX_ARCH__ >= 60 | |
| 1915 | 1570 | /* ========================================================================== |
| 1916 | 1571 | Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Vv32.b) |
| 1917 | 1572 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1920,9 +1575,7 @@ |
| 1920 | 1575 | ========================================================================== */ |
| 1921 | 1576 | |
| 1922 | 1577 | #define Q6_Wh_vmpy_VubVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv)(Vu,Vv) |
| 1923 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1924 | 1578 | |
| 1925 | #if __HVX_ARCH__ >= 60 | |
| 1926 | 1579 | /* ========================================================================== |
| 1927 | 1580 | Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Vv32.b) |
| 1928 | 1581 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1931,9 +1584,7 @@ |
| 1931 | 1584 | ========================================================================== */ |
| 1932 | 1585 | |
| 1933 | 1586 | #define Q6_Wh_vmpyacc_WhVubVb(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv_acc)(Vxx,Vu,Vv) |
| 1934 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1935 | 1587 | |
| 1936 | #if __HVX_ARCH__ >= 60 | |
| 1937 | 1588 | /* ========================================================================== |
| 1938 | 1589 | Assembly Syntax: Vdd32.h=vmpy(Vu32.b,Vv32.b) |
| 1939 | 1590 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1942,9 +1593,7 @@ |
| 1942 | 1593 | ========================================================================== */ |
| 1943 | 1594 | |
| 1944 | 1595 | #define Q6_Wh_vmpy_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv)(Vu,Vv) |
| 1945 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1946 | 1596 | |
| 1947 | #if __HVX_ARCH__ >= 60 | |
| 1948 | 1597 | /* ========================================================================== |
| 1949 | 1598 | Assembly Syntax: Vxx32.h+=vmpy(Vu32.b,Vv32.b) |
| 1950 | 1599 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVbVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1953,9 +1602,7 @@ |
| 1953 | 1602 | ========================================================================== */ |
| 1954 | 1603 | |
| 1955 | 1604 | #define Q6_Wh_vmpyacc_WhVbVb(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv_acc)(Vxx,Vu,Vv) |
| 1956 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1957 | 1605 | |
| 1958 | #if __HVX_ARCH__ >= 60 | |
| 1959 | 1606 | /* ========================================================================== |
| 1960 | 1607 | Assembly Syntax: Vd32.w=vmpye(Vu32.w,Vv32.uh) |
| 1961 | 1608 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpye_VwVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -1964,9 +1611,7 @@ |
| 1964 | 1611 | ========================================================================== */ |
| 1965 | 1612 | |
| 1966 | 1613 | #define Q6_Vw_vmpye_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh)(Vu,Vv) |
| 1967 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1968 | 1614 | |
| 1969 | #if __HVX_ARCH__ >= 60 | |
| 1970 | 1615 | /* ========================================================================== |
| 1971 | 1616 | Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Rt32.h) |
| 1972 | 1617 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhRh(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1975,9 +1620,7 @@ |
| 1975 | 1620 | ========================================================================== */ |
| 1976 | 1621 | |
| 1977 | 1622 | #define Q6_Ww_vmpy_VhRh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh)(Vu,Rt) |
| 1978 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1979 | 1623 | |
| 1980 | #if __HVX_ARCH__ >= 60 | |
| 1981 | 1624 | /* ========================================================================== |
| 1982 | 1625 | Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Rt32.h):sat |
| 1983 | 1626 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhRh_sat(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1986,9 +1629,7 @@ |
| 1986 | 1629 | ========================================================================== */ |
| 1987 | 1630 | |
| 1988 | 1631 | #define Q6_Ww_vmpyacc_WwVhRh_sat(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsat_acc)(Vxx,Vu,Rt) |
| 1989 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 1990 | 1632 | |
| 1991 | #if __HVX_ARCH__ >= 60 | |
| 1992 | 1633 | /* ========================================================================== |
| 1993 | 1634 | Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:rnd:sat |
| 1994 | 1635 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_rnd_sat(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -1997,9 +1638,7 @@ |
| 1997 | 1638 | ========================================================================== */ |
| 1998 | 1639 | |
| 1999 | 1640 | #define Q6_Vh_vmpy_VhRh_s1_rnd_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsrs)(Vu,Rt) |
| 2000 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2001 | 1641 | |
| 2002 | #if __HVX_ARCH__ >= 60 | |
| 2003 | 1642 | /* ========================================================================== |
| 2004 | 1643 | Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:sat |
| 2005 | 1644 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_sat(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2008,9 +1647,7 @@ |
| 2008 | 1647 | ========================================================================== */ |
| 2009 | 1648 | |
| 2010 | 1649 | #define Q6_Vh_vmpy_VhRh_s1_sat(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhss)(Vu,Rt) |
| 2011 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2012 | 1650 | |
| 2013 | #if __HVX_ARCH__ >= 60 | |
| 2014 | 1651 | /* ========================================================================== |
| 2015 | 1652 | Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.uh) |
| 2016 | 1653 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2019,9 +1656,7 @@ |
| 2019 | 1656 | ========================================================================== */ |
| 2020 | 1657 | |
| 2021 | 1658 | #define Q6_Ww_vmpy_VhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus)(Vu,Vv) |
| 2022 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2023 | 1659 | |
| 2024 | #if __HVX_ARCH__ >= 60 | |
| 2025 | 1660 | /* ========================================================================== |
| 2026 | 1661 | Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.uh) |
| 2027 | 1662 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2030,9 +1665,7 @@ |
| 2030 | 1665 | ========================================================================== */ |
| 2031 | 1666 | |
| 2032 | 1667 | #define Q6_Ww_vmpyacc_WwVhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus_acc)(Vxx,Vu,Vv) |
| 2033 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2034 | 1668 | |
| 2035 | #if __HVX_ARCH__ >= 60 | |
| 2036 | 1669 | /* ========================================================================== |
| 2037 | 1670 | Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.h) |
| 2038 | 1671 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2041,9 +1674,7 @@ |
| 2041 | 1674 | ========================================================================== */ |
| 2042 | 1675 | |
| 2043 | 1676 | #define Q6_Ww_vmpy_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv)(Vu,Vv) |
| 2044 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2045 | 1677 | |
| 2046 | #if __HVX_ARCH__ >= 60 | |
| 2047 | 1678 | /* ========================================================================== |
| 2048 | 1679 | Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.h) |
| 2049 | 1680 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2052,9 +1683,7 @@ |
| 2052 | 1683 | ========================================================================== */ |
| 2053 | 1684 | |
| 2054 | 1685 | #define Q6_Ww_vmpyacc_WwVhVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv_acc)(Vxx,Vu,Vv) |
| 2055 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2056 | 1686 | |
| 2057 | #if __HVX_ARCH__ >= 60 | |
| 2058 | 1687 | /* ========================================================================== |
| 2059 | 1688 | Assembly Syntax: Vd32.h=vmpy(Vu32.h,Vv32.h):<<1:rnd:sat |
| 2060 | 1689 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2063,9 +1692,7 @@ |
| 2063 | 1692 | ========================================================================== */ |
| 2064 | 1693 | |
| 2065 | 1694 | #define Q6_Vh_vmpy_VhVh_s1_rnd_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhvsrs)(Vu,Vv) |
| 2066 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2067 | 1695 | |
| 2068 | #if __HVX_ARCH__ >= 60 | |
| 2069 | 1696 | /* ========================================================================== |
| 2070 | 1697 | Assembly Syntax: Vd32.w=vmpyieo(Vu32.h,Vv32.h) |
| 2071 | 1698 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieo_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2074,9 +1701,7 @@ |
| 2074 | 1701 | ========================================================================== */ |
| 2075 | 1702 | |
| 2076 | 1703 | #define Q6_Vw_vmpyieo_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyieoh)(Vu,Vv) |
| 2077 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2078 | 1704 | |
| 2079 | #if __HVX_ARCH__ >= 60 | |
| 2080 | 1705 | /* ========================================================================== |
| 2081 | 1706 | Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.h) |
| 2082 | 1707 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2085,9 +1710,7 @@ |
| 2085 | 1710 | ========================================================================== */ |
| 2086 | 1711 | |
| 2087 | 1712 | #define Q6_Vw_vmpyieacc_VwVwVh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewh_acc)(Vx,Vu,Vv) |
| 2088 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2089 | 1713 | |
| 2090 | #if __HVX_ARCH__ >= 60 | |
| 2091 | 1714 | /* ========================================================================== |
| 2092 | 1715 | Assembly Syntax: Vd32.w=vmpyie(Vu32.w,Vv32.uh) |
| 2093 | 1716 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyie_VwVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2096,9 +1719,7 @@ |
| 2096 | 1719 | ========================================================================== */ |
| 2097 | 1720 | |
| 2098 | 1721 | #define Q6_Vw_vmpyie_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh)(Vu,Vv) |
| 2099 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2100 | 1722 | |
| 2101 | #if __HVX_ARCH__ >= 60 | |
| 2102 | 1723 | /* ========================================================================== |
| 2103 | 1724 | Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.uh) |
| 2104 | 1725 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVuh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2107,9 +1728,7 @@ |
| 2107 | 1728 | ========================================================================== */ |
| 2108 | 1729 | |
| 2109 | 1730 | #define Q6_Vw_vmpyieacc_VwVwVuh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh_acc)(Vx,Vu,Vv) |
| 2110 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2111 | 1731 | |
| 2112 | #if __HVX_ARCH__ >= 60 | |
| 2113 | 1732 | /* ========================================================================== |
| 2114 | 1733 | Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Vv32.h) |
| 2115 | 1734 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2118,9 +1737,7 @@ |
| 2118 | 1737 | ========================================================================== */ |
| 2119 | 1738 | |
| 2120 | 1739 | #define Q6_Vh_vmpyi_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih)(Vu,Vv) |
| 2121 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2122 | 1740 | |
| 2123 | #if __HVX_ARCH__ >= 60 | |
| 2124 | 1741 | /* ========================================================================== |
| 2125 | 1742 | Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Vv32.h) |
| 2126 | 1743 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2129,9 +1746,7 @@ |
| 2129 | 1746 | ========================================================================== */ |
| 2130 | 1747 | |
| 2131 | 1748 | #define Q6_Vh_vmpyiacc_VhVhVh(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih_acc)(Vx,Vu,Vv) |
| 2132 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2133 | 1749 | |
| 2134 | #if __HVX_ARCH__ >= 60 | |
| 2135 | 1750 | /* ========================================================================== |
| 2136 | 1751 | Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Rt32.b) |
| 2137 | 1752 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhRb(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2140,9 +1755,7 @@ |
| 2140 | 1755 | ========================================================================== */ |
| 2141 | 1756 | |
| 2142 | 1757 | #define Q6_Vh_vmpyi_VhRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb)(Vu,Rt) |
| 2143 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2144 | 1758 | |
| 2145 | #if __HVX_ARCH__ >= 60 | |
| 2146 | 1759 | /* ========================================================================== |
| 2147 | 1760 | Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Rt32.b) |
| 2148 | 1761 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2151,9 +1764,7 @@ |
| 2151 | 1764 | ========================================================================== */ |
| 2152 | 1765 | |
| 2153 | 1766 | #define Q6_Vh_vmpyiacc_VhVhRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb_acc)(Vx,Vu,Rt) |
| 2154 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2155 | 1767 | |
| 2156 | #if __HVX_ARCH__ >= 60 | |
| 2157 | 1768 | /* ========================================================================== |
| 2158 | 1769 | Assembly Syntax: Vd32.w=vmpyio(Vu32.w,Vv32.h) |
| 2159 | 1770 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyio_VwVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2162,9 +1773,7 @@ |
| 2162 | 1773 | ========================================================================== */ |
| 2163 | 1774 | |
| 2164 | 1775 | #define Q6_Vw_vmpyio_VwVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiowh)(Vu,Vv) |
| 2165 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2166 | 1776 | |
| 2167 | #if __HVX_ARCH__ >= 60 | |
| 2168 | 1777 | /* ========================================================================== |
| 2169 | 1778 | Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.b) |
| 2170 | 1779 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRb(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2173,9 +1782,7 @@ |
| 2173 | 1782 | ========================================================================== */ |
| 2174 | 1783 | |
| 2175 | 1784 | #define Q6_Vw_vmpyi_VwRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb)(Vu,Rt) |
| 2176 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2177 | 1785 | |
| 2178 | #if __HVX_ARCH__ >= 60 | |
| 2179 | 1786 | /* ========================================================================== |
| 2180 | 1787 | Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.b) |
| 2181 | 1788 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2184,9 +1791,7 @@ |
| 2184 | 1791 | ========================================================================== */ |
| 2185 | 1792 | |
| 2186 | 1793 | #define Q6_Vw_vmpyiacc_VwVwRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb_acc)(Vx,Vu,Rt) |
| 2187 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2188 | 1794 | |
| 2189 | #if __HVX_ARCH__ >= 60 | |
| 2190 | 1795 | /* ========================================================================== |
| 2191 | 1796 | Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.h) |
| 2192 | 1797 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRh(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2195,9 +1800,7 @@ |
| 2195 | 1800 | ========================================================================== */ |
| 2196 | 1801 | |
| 2197 | 1802 | #define Q6_Vw_vmpyi_VwRh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh)(Vu,Rt) |
| 2198 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2199 | 1803 | |
| 2200 | #if __HVX_ARCH__ >= 60 | |
| 2201 | 1804 | /* ========================================================================== |
| 2202 | 1805 | Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.h) |
| 2203 | 1806 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRh(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2206,9 +1809,7 @@ |
| 2206 | 1809 | ========================================================================== */ |
| 2207 | 1810 | |
| 2208 | 1811 | #define Q6_Vw_vmpyiacc_VwVwRh(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh_acc)(Vx,Vu,Rt) |
| 2209 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2210 | 1812 | |
| 2211 | #if __HVX_ARCH__ >= 60 | |
| 2212 | 1813 | /* ========================================================================== |
| 2213 | 1814 | Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:sat |
| 2214 | 1815 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2217,9 +1818,7 @@ |
| 2217 | 1818 | ========================================================================== */ |
| 2218 | 1819 | |
| 2219 | 1820 | #define Q6_Vw_vmpyo_VwVh_s1_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh)(Vu,Vv) |
| 2220 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2221 | 1821 | |
| 2222 | #if __HVX_ARCH__ >= 60 | |
| 2223 | 1822 | /* ========================================================================== |
| 2224 | 1823 | Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat |
| 2225 | 1824 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2228,9 +1827,7 @@ |
| 2228 | 1827 | ========================================================================== */ |
| 2229 | 1828 | |
| 2230 | 1829 | #define Q6_Vw_vmpyo_VwVh_s1_rnd_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd)(Vu,Vv) |
| 2231 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2232 | 1830 | |
| 2233 | #if __HVX_ARCH__ >= 60 | |
| 2234 | 1831 | /* ========================================================================== |
| 2235 | 1832 | Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat:shift |
| 2236 | 1833 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2239,9 +1836,7 @@ |
| 2239 | 1836 | ========================================================================== */ |
| 2240 | 1837 | |
| 2241 | 1838 | #define Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd_sacc)(Vx,Vu,Vv) |
| 2242 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2243 | 1839 | |
| 2244 | #if __HVX_ARCH__ >= 60 | |
| 2245 | 1840 | /* ========================================================================== |
| 2246 | 1841 | Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:sat:shift |
| 2247 | 1842 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2250,9 +1845,7 @@ |
| 2250 | 1845 | ========================================================================== */ |
| 2251 | 1846 | |
| 2252 | 1847 | #define Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_sacc)(Vx,Vu,Vv) |
| 2253 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2254 | 1848 | |
| 2255 | #if __HVX_ARCH__ >= 60 | |
| 2256 | 1849 | /* ========================================================================== |
| 2257 | 1850 | Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Rt32.ub) |
| 2258 | 1851 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubRub(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2261,9 +1854,7 @@ |
| 2261 | 1854 | ========================================================================== */ |
| 2262 | 1855 | |
| 2263 | 1856 | #define Q6_Wuh_vmpy_VubRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub)(Vu,Rt) |
| 2264 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2265 | 1857 | |
| 2266 | #if __HVX_ARCH__ >= 60 | |
| 2267 | 1858 | /* ========================================================================== |
| 2268 | 1859 | Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Rt32.ub) |
| 2269 | 1860 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubRub(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2272,9 +1863,7 @@ |
| 2272 | 1863 | ========================================================================== */ |
| 2273 | 1864 | |
| 2274 | 1865 | #define Q6_Wuh_vmpyacc_WuhVubRub(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub_acc)(Vxx,Vu,Rt) |
| 2275 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2276 | 1866 | |
| 2277 | #if __HVX_ARCH__ >= 60 | |
| 2278 | 1867 | /* ========================================================================== |
| 2279 | 1868 | Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Vv32.ub) |
| 2280 | 1869 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2283,9 +1872,7 @@ |
| 2283 | 1872 | ========================================================================== */ |
| 2284 | 1873 | |
| 2285 | 1874 | #define Q6_Wuh_vmpy_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv)(Vu,Vv) |
| 2286 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2287 | 1875 | |
| 2288 | #if __HVX_ARCH__ >= 60 | |
| 2289 | 1876 | /* ========================================================================== |
| 2290 | 1877 | Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Vv32.ub) |
| 2291 | 1878 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubVub(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2294,9 +1881,7 @@ |
| 2294 | 1881 | ========================================================================== */ |
| 2295 | 1882 | |
| 2296 | 1883 | #define Q6_Wuh_vmpyacc_WuhVubVub(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv_acc)(Vxx,Vu,Vv) |
| 2297 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2298 | 1884 | |
| 2299 | #if __HVX_ARCH__ >= 60 | |
| 2300 | 1885 | /* ========================================================================== |
| 2301 | 1886 | Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Rt32.uh) |
| 2302 | 1887 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhRuh(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2305,9 +1890,7 @@ |
| 2305 | 1890 | ========================================================================== */ |
| 2306 | 1891 | |
| 2307 | 1892 | #define Q6_Wuw_vmpy_VuhRuh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh)(Vu,Rt) |
| 2308 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2309 | 1893 | |
| 2310 | #if __HVX_ARCH__ >= 60 | |
| 2311 | 1894 | /* ========================================================================== |
| 2312 | 1895 | Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Rt32.uh) |
| 2313 | 1896 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhRuh(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2316,9 +1899,7 @@ |
| 2316 | 1899 | ========================================================================== */ |
| 2317 | 1900 | |
| 2318 | 1901 | #define Q6_Wuw_vmpyacc_WuwVuhRuh(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh_acc)(Vxx,Vu,Rt) |
| 2319 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2320 | 1902 | |
| 2321 | #if __HVX_ARCH__ >= 60 | |
| 2322 | 1903 | /* ========================================================================== |
| 2323 | 1904 | Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Vv32.uh) |
| 2324 | 1905 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2327,9 +1908,7 @@ |
| 2327 | 1908 | ========================================================================== */ |
| 2328 | 1909 | |
| 2329 | 1910 | #define Q6_Wuw_vmpy_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv)(Vu,Vv) |
| 2330 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2331 | 1911 | |
| 2332 | #if __HVX_ARCH__ >= 60 | |
| 2333 | 1912 | /* ========================================================================== |
| 2334 | 1913 | Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Vv32.uh) |
| 2335 | 1914 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2338,9 +1917,7 @@ |
| 2338 | 1917 | ========================================================================== */ |
| 2339 | 1918 | |
| 2340 | 1919 | #define Q6_Wuw_vmpyacc_WuwVuhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv_acc)(Vxx,Vu,Vv) |
| 2341 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2342 | 1920 | |
| 2343 | #if __HVX_ARCH__ >= 60 | |
| 2344 | 1921 | /* ========================================================================== |
| 2345 | 1922 | Assembly Syntax: Vd32=vmux(Qt4,Vu32,Vv32) |
| 2346 | 1923 | C Intrinsic Prototype: HVX_Vector Q6_V_vmux_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2349,9 +1926,7 @@ |
| 2349 | 1926 | ========================================================================== */ |
| 2350 | 1927 | |
| 2351 | 1928 | #define Q6_V_vmux_QVV(Qt,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmux)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1),Vu,Vv) |
| 2352 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2353 | 1929 | |
| 2354 | #if __HVX_ARCH__ >= 60 | |
| 2355 | 1930 | /* ========================================================================== |
| 2356 | 1931 | Assembly Syntax: Vd32.h=vnavg(Vu32.h,Vv32.h) |
| 2357 | 1932 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vnavg_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2360,9 +1935,7 @@ |
| 2360 | 1935 | ========================================================================== */ |
| 2361 | 1936 | |
| 2362 | 1937 | #define Q6_Vh_vnavg_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgh)(Vu,Vv) |
| 2363 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2364 | 1938 | |
| 2365 | #if __HVX_ARCH__ >= 60 | |
| 2366 | 1939 | /* ========================================================================== |
| 2367 | 1940 | Assembly Syntax: Vd32.b=vnavg(Vu32.ub,Vv32.ub) |
| 2368 | 1941 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vnavg_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2371,9 +1944,7 @@ |
| 2371 | 1944 | ========================================================================== */ |
| 2372 | 1945 | |
| 2373 | 1946 | #define Q6_Vb_vnavg_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgub)(Vu,Vv) |
| 2374 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2375 | 1947 | |
| 2376 | #if __HVX_ARCH__ >= 60 | |
| 2377 | 1948 | /* ========================================================================== |
| 2378 | 1949 | Assembly Syntax: Vd32.w=vnavg(Vu32.w,Vv32.w) |
| 2379 | 1950 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vnavg_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2382,9 +1953,7 @@ |
| 2382 | 1953 | ========================================================================== */ |
| 2383 | 1954 | |
| 2384 | 1955 | #define Q6_Vw_vnavg_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgw)(Vu,Vv) |
| 2385 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2386 | 1956 | |
| 2387 | #if __HVX_ARCH__ >= 60 | |
| 2388 | 1957 | /* ========================================================================== |
| 2389 | 1958 | Assembly Syntax: Vd32.h=vnormamt(Vu32.h) |
| 2390 | 1959 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vnormamt_Vh(HVX_Vector Vu) |
| ... | ... | @@ -2393,9 +1962,7 @@ |
| 2393 | 1962 | ========================================================================== */ |
| 2394 | 1963 | |
| 2395 | 1964 | #define Q6_Vh_vnormamt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamth)(Vu) |
| 2396 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2397 | 1965 | |
| 2398 | #if __HVX_ARCH__ >= 60 | |
| 2399 | 1966 | /* ========================================================================== |
| 2400 | 1967 | Assembly Syntax: Vd32.w=vnormamt(Vu32.w) |
| 2401 | 1968 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vnormamt_Vw(HVX_Vector Vu) |
| ... | ... | @@ -2404,9 +1971,7 @@ |
| 2404 | 1971 | ========================================================================== */ |
| 2405 | 1972 | |
| 2406 | 1973 | #define Q6_Vw_vnormamt_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamtw)(Vu) |
| 2407 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2408 | 1974 | |
| 2409 | #if __HVX_ARCH__ >= 60 | |
| 2410 | 1975 | /* ========================================================================== |
| 2411 | 1976 | Assembly Syntax: Vd32=vnot(Vu32) |
| 2412 | 1977 | C Intrinsic Prototype: HVX_Vector Q6_V_vnot_V(HVX_Vector Vu) |
| ... | ... | @@ -2415,9 +1980,7 @@ |
| 2415 | 1980 | ========================================================================== */ |
| 2416 | 1981 | |
| 2417 | 1982 | #define Q6_V_vnot_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnot)(Vu) |
| 2418 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2419 | 1983 | |
| 2420 | #if __HVX_ARCH__ >= 60 | |
| 2421 | 1984 | /* ========================================================================== |
| 2422 | 1985 | Assembly Syntax: Vd32=vor(Vu32,Vv32) |
| 2423 | 1986 | C Intrinsic Prototype: HVX_Vector Q6_V_vor_VV(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2426,9 +1989,7 @@ |
| 2426 | 1989 | ========================================================================== */ |
| 2427 | 1990 | |
| 2428 | 1991 | #define Q6_V_vor_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vor)(Vu,Vv) |
| 2429 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2430 | 1992 | |
| 2431 | #if __HVX_ARCH__ >= 60 | |
| 2432 | 1993 | /* ========================================================================== |
| 2433 | 1994 | Assembly Syntax: Vd32.b=vpacke(Vu32.h,Vv32.h) |
| 2434 | 1995 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacke_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2437,9 +1998,7 @@ |
| 2437 | 1998 | ========================================================================== */ |
| 2438 | 1999 | |
| 2439 | 2000 | #define Q6_Vb_vpacke_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeb)(Vu,Vv) |
| 2440 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2441 | 2001 | |
| 2442 | #if __HVX_ARCH__ >= 60 | |
| 2443 | 2002 | /* ========================================================================== |
| 2444 | 2003 | Assembly Syntax: Vd32.h=vpacke(Vu32.w,Vv32.w) |
| 2445 | 2004 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacke_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2448,9 +2007,7 @@ |
| 2448 | 2007 | ========================================================================== */ |
| 2449 | 2008 | |
| 2450 | 2009 | #define Q6_Vh_vpacke_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeh)(Vu,Vv) |
| 2451 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2452 | 2010 | |
| 2453 | #if __HVX_ARCH__ >= 60 | |
| 2454 | 2011 | /* ========================================================================== |
| 2455 | 2012 | Assembly Syntax: Vd32.b=vpack(Vu32.h,Vv32.h):sat |
| 2456 | 2013 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2459,9 +2016,7 @@ |
| 2459 | 2016 | ========================================================================== */ |
| 2460 | 2017 | |
| 2461 | 2018 | #define Q6_Vb_vpack_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhb_sat)(Vu,Vv) |
| 2462 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2463 | 2019 | |
| 2464 | #if __HVX_ARCH__ >= 60 | |
| 2465 | 2020 | /* ========================================================================== |
| 2466 | 2021 | Assembly Syntax: Vd32.ub=vpack(Vu32.h,Vv32.h):sat |
| 2467 | 2022 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2470,9 +2025,7 @@ |
| 2470 | 2025 | ========================================================================== */ |
| 2471 | 2026 | |
| 2472 | 2027 | #define Q6_Vub_vpack_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhub_sat)(Vu,Vv) |
| 2473 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2474 | 2028 | |
| 2475 | #if __HVX_ARCH__ >= 60 | |
| 2476 | 2029 | /* ========================================================================== |
| 2477 | 2030 | Assembly Syntax: Vd32.b=vpacko(Vu32.h,Vv32.h) |
| 2478 | 2031 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacko_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2481,9 +2034,7 @@ |
| 2481 | 2034 | ========================================================================== */ |
| 2482 | 2035 | |
| 2483 | 2036 | #define Q6_Vb_vpacko_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackob)(Vu,Vv) |
| 2484 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2485 | 2037 | |
| 2486 | #if __HVX_ARCH__ >= 60 | |
| 2487 | 2038 | /* ========================================================================== |
| 2488 | 2039 | Assembly Syntax: Vd32.h=vpacko(Vu32.w,Vv32.w) |
| 2489 | 2040 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacko_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2492,9 +2043,7 @@ |
| 2492 | 2043 | ========================================================================== */ |
| 2493 | 2044 | |
| 2494 | 2045 | #define Q6_Vh_vpacko_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackoh)(Vu,Vv) |
| 2495 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2496 | 2046 | |
| 2497 | #if __HVX_ARCH__ >= 60 | |
| 2498 | 2047 | /* ========================================================================== |
| 2499 | 2048 | Assembly Syntax: Vd32.h=vpack(Vu32.w,Vv32.w):sat |
| 2500 | 2049 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2503,9 +2052,7 @@ |
| 2503 | 2052 | ========================================================================== */ |
| 2504 | 2053 | |
| 2505 | 2054 | #define Q6_Vh_vpack_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwh_sat)(Vu,Vv) |
| 2506 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2507 | 2055 | |
| 2508 | #if __HVX_ARCH__ >= 60 | |
| 2509 | 2056 | /* ========================================================================== |
| 2510 | 2057 | Assembly Syntax: Vd32.uh=vpack(Vu32.w,Vv32.w):sat |
| 2511 | 2058 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2514,9 +2061,7 @@ |
| 2514 | 2061 | ========================================================================== */ |
| 2515 | 2062 | |
| 2516 | 2063 | #define Q6_Vuh_vpack_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwuh_sat)(Vu,Vv) |
| 2517 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2518 | 2064 | |
| 2519 | #if __HVX_ARCH__ >= 60 | |
| 2520 | 2065 | /* ========================================================================== |
| 2521 | 2066 | Assembly Syntax: Vd32.h=vpopcount(Vu32.h) |
| 2522 | 2067 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vpopcount_Vh(HVX_Vector Vu) |
| ... | ... | @@ -2525,9 +2070,7 @@ |
| 2525 | 2070 | ========================================================================== */ |
| 2526 | 2071 | |
| 2527 | 2072 | #define Q6_Vh_vpopcount_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpopcounth)(Vu) |
| 2528 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2529 | 2073 | |
| 2530 | #if __HVX_ARCH__ >= 60 | |
| 2531 | 2074 | /* ========================================================================== |
| 2532 | 2075 | Assembly Syntax: Vd32=vrdelta(Vu32,Vv32) |
| 2533 | 2076 | C Intrinsic Prototype: HVX_Vector Q6_V_vrdelta_VV(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2536,9 +2079,7 @@ |
| 2536 | 2079 | ========================================================================== */ |
| 2537 | 2080 | |
| 2538 | 2081 | #define Q6_V_vrdelta_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrdelta)(Vu,Vv) |
| 2539 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2540 | 2082 | |
| 2541 | #if __HVX_ARCH__ >= 60 | |
| 2542 | 2083 | /* ========================================================================== |
| 2543 | 2084 | Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Rt32.b) |
| 2544 | 2085 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubRb(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2547,9 +2088,7 @@ |
| 2547 | 2088 | ========================================================================== */ |
| 2548 | 2089 | |
| 2549 | 2090 | #define Q6_Vw_vrmpy_VubRb(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus)(Vu,Rt) |
| 2550 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2551 | 2091 | |
| 2552 | #if __HVX_ARCH__ >= 60 | |
| 2553 | 2092 | /* ========================================================================== |
| 2554 | 2093 | Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Rt32.b) |
| 2555 | 2094 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2558,9 +2097,7 @@ |
| 2558 | 2097 | ========================================================================== */ |
| 2559 | 2098 | |
| 2560 | 2099 | #define Q6_Vw_vrmpyacc_VwVubRb(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus_acc)(Vx,Vu,Rt) |
| 2561 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2562 | 2100 | |
| 2563 | #if __HVX_ARCH__ >= 60 | |
| 2564 | 2101 | /* ========================================================================== |
| 2565 | 2102 | Assembly Syntax: Vdd32.w=vrmpy(Vuu32.ub,Rt32.b,#u1) |
| 2566 | 2103 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpy_WubRbI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) |
| ... | ... | @@ -2569,9 +2106,7 @@ |
| 2569 | 2106 | ========================================================================== */ |
| 2570 | 2107 | |
| 2571 | 2108 | #define Q6_Ww_vrmpy_WubRbI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi)(Vuu,Rt,Iu1) |
| 2572 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2573 | 2109 | |
| 2574 | #if __HVX_ARCH__ >= 60 | |
| 2575 | 2110 | /* ========================================================================== |
| 2576 | 2111 | Assembly Syntax: Vxx32.w+=vrmpy(Vuu32.ub,Rt32.b,#u1) |
| 2577 | 2112 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpyacc_WwWubRbI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) |
| ... | ... | @@ -2580,9 +2115,7 @@ |
| 2580 | 2115 | ========================================================================== */ |
| 2581 | 2116 | |
| 2582 | 2117 | #define Q6_Ww_vrmpyacc_WwWubRbI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi_acc)(Vxx,Vuu,Rt,Iu1) |
| 2583 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2584 | 2118 | |
| 2585 | #if __HVX_ARCH__ >= 60 | |
| 2586 | 2119 | /* ========================================================================== |
| 2587 | 2120 | Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Vv32.b) |
| 2588 | 2121 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2591,9 +2124,7 @@ |
| 2591 | 2124 | ========================================================================== */ |
| 2592 | 2125 | |
| 2593 | 2126 | #define Q6_Vw_vrmpy_VubVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv)(Vu,Vv) |
| 2594 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2595 | 2127 | |
| 2596 | #if __HVX_ARCH__ >= 60 | |
| 2597 | 2128 | /* ========================================================================== |
| 2598 | 2129 | Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Vv32.b) |
| 2599 | 2130 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2602,9 +2133,7 @@ |
| 2602 | 2133 | ========================================================================== */ |
| 2603 | 2134 | |
| 2604 | 2135 | #define Q6_Vw_vrmpyacc_VwVubVb(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv_acc)(Vx,Vu,Vv) |
| 2605 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2606 | 2136 | |
| 2607 | #if __HVX_ARCH__ >= 60 | |
| 2608 | 2137 | /* ========================================================================== |
| 2609 | 2138 | Assembly Syntax: Vd32.w=vrmpy(Vu32.b,Vv32.b) |
| 2610 | 2139 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2613,9 +2142,7 @@ |
| 2613 | 2142 | ========================================================================== */ |
| 2614 | 2143 | |
| 2615 | 2144 | #define Q6_Vw_vrmpy_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv)(Vu,Vv) |
| 2616 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2617 | 2145 | |
| 2618 | #if __HVX_ARCH__ >= 60 | |
| 2619 | 2146 | /* ========================================================================== |
| 2620 | 2147 | Assembly Syntax: Vx32.w+=vrmpy(Vu32.b,Vv32.b) |
| 2621 | 2148 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVbVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2624,9 +2151,7 @@ |
| 2624 | 2151 | ========================================================================== */ |
| 2625 | 2152 | |
| 2626 | 2153 | #define Q6_Vw_vrmpyacc_VwVbVb(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv_acc)(Vx,Vu,Vv) |
| 2627 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2628 | 2154 | |
| 2629 | #if __HVX_ARCH__ >= 60 | |
| 2630 | 2155 | /* ========================================================================== |
| 2631 | 2156 | Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Rt32.ub) |
| 2632 | 2157 | C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubRub(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2635,9 +2160,7 @@ |
| 2635 | 2160 | ========================================================================== */ |
| 2636 | 2161 | |
| 2637 | 2162 | #define Q6_Vuw_vrmpy_VubRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub)(Vu,Rt) |
| 2638 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2639 | 2163 | |
| 2640 | #if __HVX_ARCH__ >= 60 | |
| 2641 | 2164 | /* ========================================================================== |
| 2642 | 2165 | Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Rt32.ub) |
| 2643 | 2166 | C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubRub(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2646,9 +2169,7 @@ |
| 2646 | 2169 | ========================================================================== */ |
| 2647 | 2170 | |
| 2648 | 2171 | #define Q6_Vuw_vrmpyacc_VuwVubRub(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub_acc)(Vx,Vu,Rt) |
| 2649 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2650 | 2172 | |
| 2651 | #if __HVX_ARCH__ >= 60 | |
| 2652 | 2173 | /* ========================================================================== |
| 2653 | 2174 | Assembly Syntax: Vdd32.uw=vrmpy(Vuu32.ub,Rt32.ub,#u1) |
| 2654 | 2175 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpy_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) |
| ... | ... | @@ -2657,9 +2178,7 @@ |
| 2657 | 2178 | ========================================================================== */ |
| 2658 | 2179 | |
| 2659 | 2180 | #define Q6_Wuw_vrmpy_WubRubI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi)(Vuu,Rt,Iu1) |
| 2660 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2661 | 2181 | |
| 2662 | #if __HVX_ARCH__ >= 60 | |
| 2663 | 2182 | /* ========================================================================== |
| 2664 | 2183 | Assembly Syntax: Vxx32.uw+=vrmpy(Vuu32.ub,Rt32.ub,#u1) |
| 2665 | 2184 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpyacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) |
| ... | ... | @@ -2668,9 +2187,7 @@ |
| 2668 | 2187 | ========================================================================== */ |
| 2669 | 2188 | |
| 2670 | 2189 | #define Q6_Wuw_vrmpyacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi_acc)(Vxx,Vuu,Rt,Iu1) |
| 2671 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2672 | 2190 | |
| 2673 | #if __HVX_ARCH__ >= 60 | |
| 2674 | 2191 | /* ========================================================================== |
| 2675 | 2192 | Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Vv32.ub) |
| 2676 | 2193 | C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2679,9 +2196,7 @@ |
| 2679 | 2196 | ========================================================================== */ |
| 2680 | 2197 | |
| 2681 | 2198 | #define Q6_Vuw_vrmpy_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv)(Vu,Vv) |
| 2682 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2683 | 2199 | |
| 2684 | #if __HVX_ARCH__ >= 60 | |
| 2685 | 2200 | /* ========================================================================== |
| 2686 | 2201 | Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Vv32.ub) |
| 2687 | 2202 | C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubVub(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2690,9 +2205,7 @@ |
| 2690 | 2205 | ========================================================================== */ |
| 2691 | 2206 | |
| 2692 | 2207 | #define Q6_Vuw_vrmpyacc_VuwVubVub(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv_acc)(Vx,Vu,Vv) |
| 2693 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2694 | 2208 | |
| 2695 | #if __HVX_ARCH__ >= 60 | |
| 2696 | 2209 | /* ========================================================================== |
| 2697 | 2210 | Assembly Syntax: Vd32=vror(Vu32,Rt32) |
| 2698 | 2211 | C Intrinsic Prototype: HVX_Vector Q6_V_vror_VR(HVX_Vector Vu, Word32 Rt) |
| ... | ... | @@ -2701,9 +2214,7 @@ |
| 2701 | 2214 | ========================================================================== */ |
| 2702 | 2215 | |
| 2703 | 2216 | #define Q6_V_vror_VR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vror)(Vu,Rt) |
| 2704 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2705 | 2217 | |
| 2706 | #if __HVX_ARCH__ >= 60 | |
| 2707 | 2218 | /* ========================================================================== |
| 2708 | 2219 | Assembly Syntax: Vd32.b=vround(Vu32.h,Vv32.h):sat |
| 2709 | 2220 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2712,9 +2223,7 @@ |
| 2712 | 2223 | ========================================================================== */ |
| 2713 | 2224 | |
| 2714 | 2225 | #define Q6_Vb_vround_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhb)(Vu,Vv) |
| 2715 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2716 | 2226 | |
| 2717 | #if __HVX_ARCH__ >= 60 | |
| 2718 | 2227 | /* ========================================================================== |
| 2719 | 2228 | Assembly Syntax: Vd32.ub=vround(Vu32.h,Vv32.h):sat |
| 2720 | 2229 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2723,9 +2232,7 @@ |
| 2723 | 2232 | ========================================================================== */ |
| 2724 | 2233 | |
| 2725 | 2234 | #define Q6_Vub_vround_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhub)(Vu,Vv) |
| 2726 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2727 | 2235 | |
| 2728 | #if __HVX_ARCH__ >= 60 | |
| 2729 | 2236 | /* ========================================================================== |
| 2730 | 2237 | Assembly Syntax: Vd32.h=vround(Vu32.w,Vv32.w):sat |
| 2731 | 2238 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2734,9 +2241,7 @@ |
| 2734 | 2241 | ========================================================================== */ |
| 2735 | 2242 | |
| 2736 | 2243 | #define Q6_Vh_vround_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwh)(Vu,Vv) |
| 2737 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2738 | 2244 | |
| 2739 | #if __HVX_ARCH__ >= 60 | |
| 2740 | 2245 | /* ========================================================================== |
| 2741 | 2246 | Assembly Syntax: Vd32.uh=vround(Vu32.w,Vv32.w):sat |
| 2742 | 2247 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2745,9 +2250,7 @@ |
| 2745 | 2250 | ========================================================================== */ |
| 2746 | 2251 | |
| 2747 | 2252 | #define Q6_Vuh_vround_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwuh)(Vu,Vv) |
| 2748 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2749 | 2253 | |
| 2750 | #if __HVX_ARCH__ >= 60 | |
| 2751 | 2254 | /* ========================================================================== |
| 2752 | 2255 | Assembly Syntax: Vdd32.uw=vrsad(Vuu32.ub,Rt32.ub,#u1) |
| 2753 | 2256 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsad_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) |
| ... | ... | @@ -2756,9 +2259,7 @@ |
| 2756 | 2259 | ========================================================================== */ |
| 2757 | 2260 | |
| 2758 | 2261 | #define Q6_Wuw_vrsad_WubRubI(Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi)(Vuu,Rt,Iu1) |
| 2759 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2760 | 2262 | |
| 2761 | #if __HVX_ARCH__ >= 60 | |
| 2762 | 2263 | /* ========================================================================== |
| 2763 | 2264 | Assembly Syntax: Vxx32.uw+=vrsad(Vuu32.ub,Rt32.ub,#u1) |
| 2764 | 2265 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsadacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) |
| ... | ... | @@ -2767,9 +2268,7 @@ |
| 2767 | 2268 | ========================================================================== */ |
| 2768 | 2269 | |
| 2769 | 2270 | #define Q6_Wuw_vrsadacc_WuwWubRubI(Vxx,Vuu,Rt,Iu1) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi_acc)(Vxx,Vuu,Rt,Iu1) |
| 2770 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2771 | 2271 | |
| 2772 | #if __HVX_ARCH__ >= 60 | |
| 2773 | 2272 | /* ========================================================================== |
| 2774 | 2273 | Assembly Syntax: Vd32.ub=vsat(Vu32.h,Vv32.h) |
| 2775 | 2274 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vsat_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2778,9 +2277,7 @@ |
| 2778 | 2277 | ========================================================================== */ |
| 2779 | 2278 | |
| 2780 | 2279 | #define Q6_Vub_vsat_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsathub)(Vu,Vv) |
| 2781 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2782 | 2280 | |
| 2783 | #if __HVX_ARCH__ >= 60 | |
| 2784 | 2281 | /* ========================================================================== |
| 2785 | 2282 | Assembly Syntax: Vd32.h=vsat(Vu32.w,Vv32.w) |
| 2786 | 2283 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vsat_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2789,9 +2286,7 @@ |
| 2789 | 2286 | ========================================================================== */ |
| 2790 | 2287 | |
| 2791 | 2288 | #define Q6_Vh_vsat_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatwh)(Vu,Vv) |
| 2792 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2793 | 2289 | |
| 2794 | #if __HVX_ARCH__ >= 60 | |
| 2795 | 2290 | /* ========================================================================== |
| 2796 | 2291 | Assembly Syntax: Vdd32.h=vsxt(Vu32.b) |
| 2797 | 2292 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsxt_Vb(HVX_Vector Vu) |
| ... | ... | @@ -2800,9 +2295,7 @@ |
| 2800 | 2295 | ========================================================================== */ |
| 2801 | 2296 | |
| 2802 | 2297 | #define Q6_Wh_vsxt_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsb)(Vu) |
| 2803 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2804 | 2298 | |
| 2805 | #if __HVX_ARCH__ >= 60 | |
| 2806 | 2299 | /* ========================================================================== |
| 2807 | 2300 | Assembly Syntax: Vdd32.w=vsxt(Vu32.h) |
| 2808 | 2301 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsxt_Vh(HVX_Vector Vu) |
| ... | ... | @@ -2811,9 +2304,7 @@ |
| 2811 | 2304 | ========================================================================== */ |
| 2812 | 2305 | |
| 2813 | 2306 | #define Q6_Ww_vsxt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsh)(Vu) |
| 2814 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2815 | 2307 | |
| 2816 | #if __HVX_ARCH__ >= 60 | |
| 2817 | 2308 | /* ========================================================================== |
| 2818 | 2309 | Assembly Syntax: Vd32.h=vshuffe(Vu32.h,Vv32.h) |
| 2819 | 2310 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffe_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2822,9 +2313,7 @@ |
| 2822 | 2313 | ========================================================================== */ |
| 2823 | 2314 | |
| 2824 | 2315 | #define Q6_Vh_vshuffe_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufeh)(Vu,Vv) |
| 2825 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2826 | 2316 | |
| 2827 | #if __HVX_ARCH__ >= 60 | |
| 2828 | 2317 | /* ========================================================================== |
| 2829 | 2318 | Assembly Syntax: Vd32.b=vshuff(Vu32.b) |
| 2830 | 2319 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuff_Vb(HVX_Vector Vu) |
| ... | ... | @@ -2833,9 +2322,7 @@ |
| 2833 | 2322 | ========================================================================== */ |
| 2834 | 2323 | |
| 2835 | 2324 | #define Q6_Vb_vshuff_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffb)(Vu) |
| 2836 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2837 | 2325 | |
| 2838 | #if __HVX_ARCH__ >= 60 | |
| 2839 | 2326 | /* ========================================================================== |
| 2840 | 2327 | Assembly Syntax: Vd32.b=vshuffe(Vu32.b,Vv32.b) |
| 2841 | 2328 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffe_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2844,9 +2331,7 @@ |
| 2844 | 2331 | ========================================================================== */ |
| 2845 | 2332 | |
| 2846 | 2333 | #define Q6_Vb_vshuffe_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffeb)(Vu,Vv) |
| 2847 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2848 | 2334 | |
| 2849 | #if __HVX_ARCH__ >= 60 | |
| 2850 | 2335 | /* ========================================================================== |
| 2851 | 2336 | Assembly Syntax: Vd32.h=vshuff(Vu32.h) |
| 2852 | 2337 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuff_Vh(HVX_Vector Vu) |
| ... | ... | @@ -2855,9 +2340,7 @@ |
| 2855 | 2340 | ========================================================================== */ |
| 2856 | 2341 | |
| 2857 | 2342 | #define Q6_Vh_vshuff_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffh)(Vu) |
| 2858 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2859 | 2343 | |
| 2860 | #if __HVX_ARCH__ >= 60 | |
| 2861 | 2344 | /* ========================================================================== |
| 2862 | 2345 | Assembly Syntax: Vd32.b=vshuffo(Vu32.b,Vv32.b) |
| 2863 | 2346 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffo_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2866,9 +2349,7 @@ |
| 2866 | 2349 | ========================================================================== */ |
| 2867 | 2350 | |
| 2868 | 2351 | #define Q6_Vb_vshuffo_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffob)(Vu,Vv) |
| 2869 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2870 | 2352 | |
| 2871 | #if __HVX_ARCH__ >= 60 | |
| 2872 | 2353 | /* ========================================================================== |
| 2873 | 2354 | Assembly Syntax: Vdd32=vshuff(Vu32,Vv32,Rt8) |
| 2874 | 2355 | C Intrinsic Prototype: HVX_VectorPair Q6_W_vshuff_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) |
| ... | ... | @@ -2877,9 +2358,7 @@ |
| 2877 | 2358 | ========================================================================== */ |
| 2878 | 2359 | |
| 2879 | 2360 | #define Q6_W_vshuff_VVR(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffvdd)(Vu,Vv,Rt) |
| 2880 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2881 | 2361 | |
| 2882 | #if __HVX_ARCH__ >= 60 | |
| 2883 | 2362 | /* ========================================================================== |
| 2884 | 2363 | Assembly Syntax: Vdd32.b=vshuffoe(Vu32.b,Vv32.b) |
| 2885 | 2364 | C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vshuffoe_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2888,9 +2367,7 @@ |
| 2888 | 2367 | ========================================================================== */ |
| 2889 | 2368 | |
| 2890 | 2369 | #define Q6_Wb_vshuffoe_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeb)(Vu,Vv) |
| 2891 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2892 | 2370 | |
| 2893 | #if __HVX_ARCH__ >= 60 | |
| 2894 | 2371 | /* ========================================================================== |
| 2895 | 2372 | Assembly Syntax: Vdd32.h=vshuffoe(Vu32.h,Vv32.h) |
| 2896 | 2373 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vshuffoe_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2899,9 +2376,7 @@ |
| 2899 | 2376 | ========================================================================== */ |
| 2900 | 2377 | |
| 2901 | 2378 | #define Q6_Wh_vshuffoe_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeh)(Vu,Vv) |
| 2902 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2903 | 2379 | |
| 2904 | #if __HVX_ARCH__ >= 60 | |
| 2905 | 2380 | /* ========================================================================== |
| 2906 | 2381 | Assembly Syntax: Vd32.h=vshuffo(Vu32.h,Vv32.h) |
| 2907 | 2382 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffo_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2910,9 +2385,7 @@ |
| 2910 | 2385 | ========================================================================== */ |
| 2911 | 2386 | |
| 2912 | 2387 | #define Q6_Vh_vshuffo_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoh)(Vu,Vv) |
| 2913 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2914 | 2388 | |
| 2915 | #if __HVX_ARCH__ >= 60 | |
| 2916 | 2389 | /* ========================================================================== |
| 2917 | 2390 | Assembly Syntax: Vd32.b=vsub(Vu32.b,Vv32.b) |
| 2918 | 2391 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vsub_VbVb(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2921,9 +2394,7 @@ |
| 2921 | 2394 | ========================================================================== */ |
| 2922 | 2395 | |
| 2923 | 2396 | #define Q6_Vb_vsub_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb)(Vu,Vv) |
| 2924 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2925 | 2397 | |
| 2926 | #if __HVX_ARCH__ >= 60 | |
| 2927 | 2398 | /* ========================================================================== |
| 2928 | 2399 | Assembly Syntax: Vdd32.b=vsub(Vuu32.b,Vvv32.b) |
| 2929 | 2400 | C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vsub_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -2932,9 +2403,7 @@ |
| 2932 | 2403 | ========================================================================== */ |
| 2933 | 2404 | |
| 2934 | 2405 | #define Q6_Wb_vsub_WbWb(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb_dv)(Vuu,Vvv) |
| 2935 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2936 | 2406 | |
| 2937 | #if __HVX_ARCH__ >= 60 | |
| 2938 | 2407 | /* ========================================================================== |
| 2939 | 2408 | Assembly Syntax: if (!Qv4) Vx32.b-=Vu32.b |
| 2940 | 2409 | C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -2943,9 +2412,7 @@ |
| 2943 | 2412 | ========================================================================== */ |
| 2944 | 2413 | |
| 2945 | 2414 | #define Q6_Vb_condnac_QnVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 2946 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2947 | 2415 | |
| 2948 | #if __HVX_ARCH__ >= 60 | |
| 2949 | 2416 | /* ========================================================================== |
| 2950 | 2417 | Assembly Syntax: if (Qv4) Vx32.b-=Vu32.b |
| 2951 | 2418 | C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -2954,9 +2421,7 @@ |
| 2954 | 2421 | ========================================================================== */ |
| 2955 | 2422 | |
| 2956 | 2423 | #define Q6_Vb_condnac_QVbVb(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 2957 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2958 | 2424 | |
| 2959 | #if __HVX_ARCH__ >= 60 | |
| 2960 | 2425 | /* ========================================================================== |
| 2961 | 2426 | Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h) |
| 2962 | 2427 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -2965,9 +2430,7 @@ |
| 2965 | 2430 | ========================================================================== */ |
| 2966 | 2431 | |
| 2967 | 2432 | #define Q6_Vh_vsub_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh)(Vu,Vv) |
| 2968 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2969 | 2433 | |
| 2970 | #if __HVX_ARCH__ >= 60 | |
| 2971 | 2434 | /* ========================================================================== |
| 2972 | 2435 | Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h) |
| 2973 | 2436 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -2976,9 +2439,7 @@ |
| 2976 | 2439 | ========================================================================== */ |
| 2977 | 2440 | |
| 2978 | 2441 | #define Q6_Wh_vsub_WhWh(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh_dv)(Vuu,Vvv) |
| 2979 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2980 | 2442 | |
| 2981 | #if __HVX_ARCH__ >= 60 | |
| 2982 | 2443 | /* ========================================================================== |
| 2983 | 2444 | Assembly Syntax: if (!Qv4) Vx32.h-=Vu32.h |
| 2984 | 2445 | C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -2987,9 +2448,7 @@ |
| 2987 | 2448 | ========================================================================== */ |
| 2988 | 2449 | |
| 2989 | 2450 | #define Q6_Vh_condnac_QnVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 2990 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 2991 | 2451 | |
| 2992 | #if __HVX_ARCH__ >= 60 | |
| 2993 | 2452 | /* ========================================================================== |
| 2994 | 2453 | Assembly Syntax: if (Qv4) Vx32.h-=Vu32.h |
| 2995 | 2454 | C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -2998,9 +2457,7 @@ |
| 2998 | 2457 | ========================================================================== */ |
| 2999 | 2458 | |
| 3000 | 2459 | #define Q6_Vh_condnac_QVhVh(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 3001 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3002 | 2460 | |
| 3003 | #if __HVX_ARCH__ >= 60 | |
| 3004 | 2461 | /* ========================================================================== |
| 3005 | 2462 | Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h):sat |
| 3006 | 2463 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3009,9 +2466,7 @@ |
| 3009 | 2466 | ========================================================================== */ |
| 3010 | 2467 | |
| 3011 | 2468 | #define Q6_Vh_vsub_VhVh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat)(Vu,Vv) |
| 3012 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3013 | 2469 | |
| 3014 | #if __HVX_ARCH__ >= 60 | |
| 3015 | 2470 | /* ========================================================================== |
| 3016 | 2471 | Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h):sat |
| 3017 | 2472 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -3020,9 +2475,7 @@ |
| 3020 | 2475 | ========================================================================== */ |
| 3021 | 2476 | |
| 3022 | 2477 | #define Q6_Wh_vsub_WhWh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat_dv)(Vuu,Vvv) |
| 3023 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3024 | 2478 | |
| 3025 | #if __HVX_ARCH__ >= 60 | |
| 3026 | 2479 | /* ========================================================================== |
| 3027 | 2480 | Assembly Syntax: Vdd32.w=vsub(Vu32.h,Vv32.h) |
| 3028 | 2481 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3031,9 +2484,7 @@ |
| 3031 | 2484 | ========================================================================== */ |
| 3032 | 2485 | |
| 3033 | 2486 | #define Q6_Ww_vsub_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhw)(Vu,Vv) |
| 3034 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3035 | 2487 | |
| 3036 | #if __HVX_ARCH__ >= 60 | |
| 3037 | 2488 | /* ========================================================================== |
| 3038 | 2489 | Assembly Syntax: Vdd32.h=vsub(Vu32.ub,Vv32.ub) |
| 3039 | 2490 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_VubVub(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3042,9 +2493,7 @@ |
| 3042 | 2493 | ========================================================================== */ |
| 3043 | 2494 | |
| 3044 | 2495 | #define Q6_Wh_vsub_VubVub(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububh)(Vu,Vv) |
| 3045 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3046 | 2496 | |
| 3047 | #if __HVX_ARCH__ >= 60 | |
| 3048 | 2497 | /* ========================================================================== |
| 3049 | 2498 | Assembly Syntax: Vd32.ub=vsub(Vu32.ub,Vv32.ub):sat |
| 3050 | 2499 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vsub_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3053,9 +2502,7 @@ |
| 3053 | 2502 | ========================================================================== */ |
| 3054 | 2503 | |
| 3055 | 2504 | #define Q6_Vub_vsub_VubVub_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat)(Vu,Vv) |
| 3056 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3057 | 2505 | |
| 3058 | #if __HVX_ARCH__ >= 60 | |
| 3059 | 2506 | /* ========================================================================== |
| 3060 | 2507 | Assembly Syntax: Vdd32.ub=vsub(Vuu32.ub,Vvv32.ub):sat |
| 3061 | 2508 | C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vsub_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -3064,9 +2511,7 @@ |
| 3064 | 2511 | ========================================================================== */ |
| 3065 | 2512 | |
| 3066 | 2513 | #define Q6_Wub_vsub_WubWub_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat_dv)(Vuu,Vvv) |
| 3067 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3068 | 2514 | |
| 3069 | #if __HVX_ARCH__ >= 60 | |
| 3070 | 2515 | /* ========================================================================== |
| 3071 | 2516 | Assembly Syntax: Vd32.uh=vsub(Vu32.uh,Vv32.uh):sat |
| 3072 | 2517 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vsub_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3075,9 +2520,7 @@ |
| 3075 | 2520 | ========================================================================== */ |
| 3076 | 2521 | |
| 3077 | 2522 | #define Q6_Vuh_vsub_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat)(Vu,Vv) |
| 3078 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3079 | 2523 | |
| 3080 | #if __HVX_ARCH__ >= 60 | |
| 3081 | 2524 | /* ========================================================================== |
| 3082 | 2525 | Assembly Syntax: Vdd32.uh=vsub(Vuu32.uh,Vvv32.uh):sat |
| 3083 | 2526 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vsub_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -3086,9 +2529,7 @@ |
| 3086 | 2529 | ========================================================================== */ |
| 3087 | 2530 | |
| 3088 | 2531 | #define Q6_Wuh_vsub_WuhWuh_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat_dv)(Vuu,Vvv) |
| 3089 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3090 | 2532 | |
| 3091 | #if __HVX_ARCH__ >= 60 | |
| 3092 | 2533 | /* ========================================================================== |
| 3093 | 2534 | Assembly Syntax: Vdd32.w=vsub(Vu32.uh,Vv32.uh) |
| 3094 | 2535 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3097,9 +2538,7 @@ |
| 3097 | 2538 | ========================================================================== */ |
| 3098 | 2539 | |
| 3099 | 2540 | #define Q6_Ww_vsub_VuhVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhw)(Vu,Vv) |
| 3100 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3101 | 2541 | |
| 3102 | #if __HVX_ARCH__ >= 60 | |
| 3103 | 2542 | /* ========================================================================== |
| 3104 | 2543 | Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w) |
| 3105 | 2544 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3108,9 +2547,7 @@ |
| 3108 | 2547 | ========================================================================== */ |
| 3109 | 2548 | |
| 3110 | 2549 | #define Q6_Vw_vsub_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw)(Vu,Vv) |
| 3111 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3112 | 2550 | |
| 3113 | #if __HVX_ARCH__ >= 60 | |
| 3114 | 2551 | /* ========================================================================== |
| 3115 | 2552 | Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w) |
| 3116 | 2553 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -3119,9 +2556,7 @@ |
| 3119 | 2556 | ========================================================================== */ |
| 3120 | 2557 | |
| 3121 | 2558 | #define Q6_Ww_vsub_WwWw(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw_dv)(Vuu,Vvv) |
| 3122 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3123 | 2559 | |
| 3124 | #if __HVX_ARCH__ >= 60 | |
| 3125 | 2560 | /* ========================================================================== |
| 3126 | 2561 | Assembly Syntax: if (!Qv4) Vx32.w-=Vu32.w |
| 3127 | 2562 | C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -3130,9 +2565,7 @@ |
| 3130 | 2565 | ========================================================================== */ |
| 3131 | 2566 | |
| 3132 | 2567 | #define Q6_Vw_condnac_QnVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwnq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 3133 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3134 | 2568 | |
| 3135 | #if __HVX_ARCH__ >= 60 | |
| 3136 | 2569 | /* ========================================================================== |
| 3137 | 2570 | Assembly Syntax: if (Qv4) Vx32.w-=Vu32.w |
| 3138 | 2571 | C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) |
| ... | ... | @@ -3141,9 +2574,7 @@ |
| 3141 | 2574 | ========================================================================== */ |
| 3142 | 2575 | |
| 3143 | 2576 | #define Q6_Vw_condnac_QVwVw(Qv,Vx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vx,Vu) |
| 3144 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3145 | 2577 | |
| 3146 | #if __HVX_ARCH__ >= 60 | |
| 3147 | 2578 | /* ========================================================================== |
| 3148 | 2579 | Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w):sat |
| 3149 | 2580 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3152,9 +2583,7 @@ |
| 3152 | 2583 | ========================================================================== */ |
| 3153 | 2584 | |
| 3154 | 2585 | #define Q6_Vw_vsub_VwVw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat)(Vu,Vv) |
| 3155 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3156 | 2586 | |
| 3157 | #if __HVX_ARCH__ >= 60 | |
| 3158 | 2587 | /* ========================================================================== |
| 3159 | 2588 | Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w):sat |
| 3160 | 2589 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) |
| ... | ... | @@ -3163,9 +2592,7 @@ |
| 3163 | 2592 | ========================================================================== */ |
| 3164 | 2593 | |
| 3165 | 2594 | #define Q6_Ww_vsub_WwWw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat_dv)(Vuu,Vvv) |
| 3166 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3167 | 2595 | |
| 3168 | #if __HVX_ARCH__ >= 60 | |
| 3169 | 2596 | /* ========================================================================== |
| 3170 | 2597 | Assembly Syntax: Vdd32=vswap(Qt4,Vu32,Vv32) |
| 3171 | 2598 | C Intrinsic Prototype: HVX_VectorPair Q6_W_vswap_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3174,9 +2601,7 @@ |
| 3174 | 2601 | ========================================================================== */ |
| 3175 | 2602 | |
| 3176 | 2603 | #define Q6_W_vswap_QVV(Qt,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vswap)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1),Vu,Vv) |
| 3177 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3178 | 2604 | |
| 3179 | #if __HVX_ARCH__ >= 60 | |
| 3180 | 2605 | /* ========================================================================== |
| 3181 | 2606 | Assembly Syntax: Vdd32.h=vtmpy(Vuu32.b,Rt32.b) |
| 3182 | 2607 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WbRb(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -3185,9 +2610,7 @@ |
| 3185 | 2610 | ========================================================================== */ |
| 3186 | 2611 | |
| 3187 | 2612 | #define Q6_Wh_vtmpy_WbRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb)(Vuu,Rt) |
| 3188 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3189 | 2613 | |
| 3190 | #if __HVX_ARCH__ >= 60 | |
| 3191 | 2614 | /* ========================================================================== |
| 3192 | 2615 | Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.b,Rt32.b) |
| 3193 | 2616 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWbRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -3196,9 +2619,7 @@ |
| 3196 | 2619 | ========================================================================== */ |
| 3197 | 2620 | |
| 3198 | 2621 | #define Q6_Wh_vtmpyacc_WhWbRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb_acc)(Vxx,Vuu,Rt) |
| 3199 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3200 | 2622 | |
| 3201 | #if __HVX_ARCH__ >= 60 | |
| 3202 | 2623 | /* ========================================================================== |
| 3203 | 2624 | Assembly Syntax: Vdd32.h=vtmpy(Vuu32.ub,Rt32.b) |
| 3204 | 2625 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -3207,9 +2628,7 @@ |
| 3207 | 2628 | ========================================================================== */ |
| 3208 | 2629 | |
| 3209 | 2630 | #define Q6_Wh_vtmpy_WubRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus)(Vuu,Rt) |
| 3210 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3211 | 2631 | |
| 3212 | #if __HVX_ARCH__ >= 60 | |
| 3213 | 2632 | /* ========================================================================== |
| 3214 | 2633 | Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.ub,Rt32.b) |
| 3215 | 2634 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -3218,9 +2637,7 @@ |
| 3218 | 2637 | ========================================================================== */ |
| 3219 | 2638 | |
| 3220 | 2639 | #define Q6_Wh_vtmpyacc_WhWubRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus_acc)(Vxx,Vuu,Rt) |
| 3221 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3222 | 2640 | |
| 3223 | #if __HVX_ARCH__ >= 60 | |
| 3224 | 2641 | /* ========================================================================== |
| 3225 | 2642 | Assembly Syntax: Vdd32.w=vtmpy(Vuu32.h,Rt32.b) |
| 3226 | 2643 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -3229,9 +2646,7 @@ |
| 3229 | 2646 | ========================================================================== */ |
| 3230 | 2647 | |
| 3231 | 2648 | #define Q6_Ww_vtmpy_WhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb)(Vuu,Rt) |
| 3232 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3233 | 2649 | |
| 3234 | #if __HVX_ARCH__ >= 60 | |
| 3235 | 2650 | /* ========================================================================== |
| 3236 | 2651 | Assembly Syntax: Vxx32.w+=vtmpy(Vuu32.h,Rt32.b) |
| 3237 | 2652 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) |
| ... | ... | @@ -3240,9 +2655,7 @@ |
| 3240 | 2655 | ========================================================================== */ |
| 3241 | 2656 | |
| 3242 | 2657 | #define Q6_Ww_vtmpyacc_WwWhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb_acc)(Vxx,Vuu,Rt) |
| 3243 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3244 | 2658 | |
| 3245 | #if __HVX_ARCH__ >= 60 | |
| 3246 | 2659 | /* ========================================================================== |
| 3247 | 2660 | Assembly Syntax: Vdd32.h=vunpack(Vu32.b) |
| 3248 | 2661 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpack_Vb(HVX_Vector Vu) |
| ... | ... | @@ -3251,9 +2664,7 @@ |
| 3251 | 2664 | ========================================================================== */ |
| 3252 | 2665 | |
| 3253 | 2666 | #define Q6_Wh_vunpack_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackb)(Vu) |
| 3254 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3255 | 2667 | |
| 3256 | #if __HVX_ARCH__ >= 60 | |
| 3257 | 2668 | /* ========================================================================== |
| 3258 | 2669 | Assembly Syntax: Vdd32.w=vunpack(Vu32.h) |
| 3259 | 2670 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpack_Vh(HVX_Vector Vu) |
| ... | ... | @@ -3262,9 +2673,7 @@ |
| 3262 | 2673 | ========================================================================== */ |
| 3263 | 2674 | |
| 3264 | 2675 | #define Q6_Ww_vunpack_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackh)(Vu) |
| 3265 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3266 | 2676 | |
| 3267 | #if __HVX_ARCH__ >= 60 | |
| 3268 | 2677 | /* ========================================================================== |
| 3269 | 2678 | Assembly Syntax: Vxx32.h|=vunpacko(Vu32.b) |
| 3270 | 2679 | C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpackoor_WhVb(HVX_VectorPair Vxx, HVX_Vector Vu) |
| ... | ... | @@ -3273,9 +2682,7 @@ |
| 3273 | 2682 | ========================================================================== */ |
| 3274 | 2683 | |
| 3275 | 2684 | #define Q6_Wh_vunpackoor_WhVb(Vxx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackob)(Vxx,Vu) |
| 3276 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3277 | 2685 | |
| 3278 | #if __HVX_ARCH__ >= 60 | |
| 3279 | 2686 | /* ========================================================================== |
| 3280 | 2687 | Assembly Syntax: Vxx32.w|=vunpacko(Vu32.h) |
| 3281 | 2688 | C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpackoor_WwVh(HVX_VectorPair Vxx, HVX_Vector Vu) |
| ... | ... | @@ -3284,9 +2691,7 @@ |
| 3284 | 2691 | ========================================================================== */ |
| 3285 | 2692 | |
| 3286 | 2693 | #define Q6_Ww_vunpackoor_WwVh(Vxx,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackoh)(Vxx,Vu) |
| 3287 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3288 | 2694 | |
| 3289 | #if __HVX_ARCH__ >= 60 | |
| 3290 | 2695 | /* ========================================================================== |
| 3291 | 2696 | Assembly Syntax: Vdd32.uh=vunpack(Vu32.ub) |
| 3292 | 2697 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vunpack_Vub(HVX_Vector Vu) |
| ... | ... | @@ -3295,9 +2700,7 @@ |
| 3295 | 2700 | ========================================================================== */ |
| 3296 | 2701 | |
| 3297 | 2702 | #define Q6_Wuh_vunpack_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackub)(Vu) |
| 3298 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3299 | 2703 | |
| 3300 | #if __HVX_ARCH__ >= 60 | |
| 3301 | 2704 | /* ========================================================================== |
| 3302 | 2705 | Assembly Syntax: Vdd32.uw=vunpack(Vu32.uh) |
| 3303 | 2706 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vunpack_Vuh(HVX_Vector Vu) |
| ... | ... | @@ -3306,9 +2709,7 @@ |
| 3306 | 2709 | ========================================================================== */ |
| 3307 | 2710 | |
| 3308 | 2711 | #define Q6_Wuw_vunpack_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackuh)(Vu) |
| 3309 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3310 | 2712 | |
| 3311 | #if __HVX_ARCH__ >= 60 | |
| 3312 | 2713 | /* ========================================================================== |
| 3313 | 2714 | Assembly Syntax: Vd32=vxor(Vu32,Vv32) |
| 3314 | 2715 | C Intrinsic Prototype: HVX_Vector Q6_V_vxor_VV(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -3317,9 +2718,7 @@ |
| 3317 | 2718 | ========================================================================== */ |
| 3318 | 2719 | |
| 3319 | 2720 | #define Q6_V_vxor_VV(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vxor)(Vu,Vv) |
| 3320 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3321 | 2721 | |
| 3322 | #if __HVX_ARCH__ >= 60 | |
| 3323 | 2722 | /* ========================================================================== |
| 3324 | 2723 | Assembly Syntax: Vdd32.uh=vzxt(Vu32.ub) |
| 3325 | 2724 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vzxt_Vub(HVX_Vector Vu) |
| ... | ... | @@ -3328,9 +2727,7 @@ |
| 3328 | 2727 | ========================================================================== */ |
| 3329 | 2728 | |
| 3330 | 2729 | #define Q6_Wuh_vzxt_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzb)(Vu) |
| 3331 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3332 | 2730 | |
| 3333 | #if __HVX_ARCH__ >= 60 | |
| 3334 | 2731 | /* ========================================================================== |
| 3335 | 2732 | Assembly Syntax: Vdd32.uw=vzxt(Vu32.uh) |
| 3336 | 2733 | C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vzxt_Vuh(HVX_Vector Vu) |
| ... | ... | @@ -3339,7 +2736,6 @@ |
| 3339 | 2736 | ========================================================================== */ |
| 3340 | 2737 | |
| 3341 | 2738 | #define Q6_Wuw_vzxt_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzh)(Vu) |
| 3342 | #endif /* __HEXAGON_ARCH___ >= 60 */ | |
| 3343 | 2739 | |
| 3344 | 2740 | #if __HVX_ARCH__ >= 62 |
| 3345 | 2741 | /* ========================================================================== |
| ... | ... | @@ -3350,7 +2746,7 @@ |
| 3350 | 2746 | ========================================================================== */ |
| 3351 | 2747 | |
| 3352 | 2748 | #define Q6_Vb_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatb)(Rt) |
| 3353 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2749 | #endif | |
| 3354 | 2750 | |
| 3355 | 2751 | #if __HVX_ARCH__ >= 62 |
| 3356 | 2752 | /* ========================================================================== |
| ... | ... | @@ -3361,7 +2757,7 @@ |
| 3361 | 2757 | ========================================================================== */ |
| 3362 | 2758 | |
| 3363 | 2759 | #define Q6_Vh_vsplat_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplath)(Rt) |
| 3364 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2760 | #endif | |
| 3365 | 2761 | |
| 3366 | 2762 | #if __HVX_ARCH__ >= 62 |
| 3367 | 2763 | /* ========================================================================== |
| ... | ... | @@ -3372,7 +2768,7 @@ |
| 3372 | 2768 | ========================================================================== */ |
| 3373 | 2769 | |
| 3374 | 2770 | #define Q6_Q_vsetq2_R(Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2v2)(Rt)),-1) |
| 3375 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2771 | #endif | |
| 3376 | 2772 | |
| 3377 | 2773 | #if __HVX_ARCH__ >= 62 |
| 3378 | 2774 | /* ========================================================================== |
| ... | ... | @@ -3383,7 +2779,7 @@ |
| 3383 | 2779 | ========================================================================== */ |
| 3384 | 2780 | |
| 3385 | 2781 | #define Q6_Qb_vshuffe_QhQh(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqh)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) |
| 3386 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2782 | #endif | |
| 3387 | 2783 | |
| 3388 | 2784 | #if __HVX_ARCH__ >= 62 |
| 3389 | 2785 | /* ========================================================================== |
| ... | ... | @@ -3394,7 +2790,7 @@ |
| 3394 | 2790 | ========================================================================== */ |
| 3395 | 2791 | |
| 3396 | 2792 | #define Q6_Qh_vshuffe_QwQw(Qs,Qt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqw)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qt),-1))),-1) |
| 3397 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2793 | #endif | |
| 3398 | 2794 | |
| 3399 | 2795 | #if __HVX_ARCH__ >= 62 |
| 3400 | 2796 | /* ========================================================================== |
| ... | ... | @@ -3405,7 +2801,7 @@ |
| 3405 | 2801 | ========================================================================== */ |
| 3406 | 2802 | |
| 3407 | 2803 | #define Q6_Vb_vadd_VbVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat)(Vu,Vv) |
| 3408 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2804 | #endif | |
| 3409 | 2805 | |
| 3410 | 2806 | #if __HVX_ARCH__ >= 62 |
| 3411 | 2807 | /* ========================================================================== |
| ... | ... | @@ -3416,7 +2812,7 @@ |
| 3416 | 2812 | ========================================================================== */ |
| 3417 | 2813 | |
| 3418 | 2814 | #define Q6_Wb_vadd_WbWb_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat_dv)(Vuu,Vvv) |
| 3419 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2815 | #endif | |
| 3420 | 2816 | |
| 3421 | 2817 | #if __HVX_ARCH__ >= 62 |
| 3422 | 2818 | /* ========================================================================== |
| ... | ... | @@ -3427,7 +2823,7 @@ |
| 3427 | 2823 | ========================================================================== */ |
| 3428 | 2824 | |
| 3429 | 2825 | #define Q6_Vw_vadd_VwVwQ_carry(Vu,Vv,Qx) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarry)(Vu,Vv,Qx) |
| 3430 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2826 | #endif | |
| 3431 | 2827 | |
| 3432 | 2828 | #if __HVX_ARCH__ >= 62 |
| 3433 | 2829 | /* ========================================================================== |
| ... | ... | @@ -3438,7 +2834,7 @@ |
| 3438 | 2834 | ========================================================================== */ |
| 3439 | 2835 | |
| 3440 | 2836 | #define Q6_Vh_vadd_vclb_VhVh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbh)(Vu,Vv) |
| 3441 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2837 | #endif | |
| 3442 | 2838 | |
| 3443 | 2839 | #if __HVX_ARCH__ >= 62 |
| 3444 | 2840 | /* ========================================================================== |
| ... | ... | @@ -3449,7 +2845,7 @@ |
| 3449 | 2845 | ========================================================================== */ |
| 3450 | 2846 | |
| 3451 | 2847 | #define Q6_Vw_vadd_vclb_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbw)(Vu,Vv) |
| 3452 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2848 | #endif | |
| 3453 | 2849 | |
| 3454 | 2850 | #if __HVX_ARCH__ >= 62 |
| 3455 | 2851 | /* ========================================================================== |
| ... | ... | @@ -3460,7 +2856,7 @@ |
| 3460 | 2856 | ========================================================================== */ |
| 3461 | 2857 | |
| 3462 | 2858 | #define Q6_Ww_vaddacc_WwVhVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw_acc)(Vxx,Vu,Vv) |
| 3463 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2859 | #endif | |
| 3464 | 2860 | |
| 3465 | 2861 | #if __HVX_ARCH__ >= 62 |
| 3466 | 2862 | /* ========================================================================== |
| ... | ... | @@ -3471,7 +2867,7 @@ |
| 3471 | 2867 | ========================================================================== */ |
| 3472 | 2868 | |
| 3473 | 2869 | #define Q6_Wh_vaddacc_WhVubVub(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh_acc)(Vxx,Vu,Vv) |
| 3474 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2870 | #endif | |
| 3475 | 2871 | |
| 3476 | 2872 | #if __HVX_ARCH__ >= 62 |
| 3477 | 2873 | /* ========================================================================== |
| ... | ... | @@ -3482,7 +2878,7 @@ |
| 3482 | 2878 | ========================================================================== */ |
| 3483 | 2879 | |
| 3484 | 2880 | #define Q6_Vub_vadd_VubVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddububb_sat)(Vu,Vv) |
| 3485 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2881 | #endif | |
| 3486 | 2882 | |
| 3487 | 2883 | #if __HVX_ARCH__ >= 62 |
| 3488 | 2884 | /* ========================================================================== |
| ... | ... | @@ -3493,7 +2889,7 @@ |
| 3493 | 2889 | ========================================================================== */ |
| 3494 | 2890 | |
| 3495 | 2891 | #define Q6_Ww_vaddacc_WwVuhVuh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw_acc)(Vxx,Vu,Vv) |
| 3496 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2892 | #endif | |
| 3497 | 2893 | |
| 3498 | 2894 | #if __HVX_ARCH__ >= 62 |
| 3499 | 2895 | /* ========================================================================== |
| ... | ... | @@ -3504,7 +2900,7 @@ |
| 3504 | 2900 | ========================================================================== */ |
| 3505 | 2901 | |
| 3506 | 2902 | #define Q6_Vuw_vadd_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat)(Vu,Vv) |
| 3507 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2903 | #endif | |
| 3508 | 2904 | |
| 3509 | 2905 | #if __HVX_ARCH__ >= 62 |
| 3510 | 2906 | /* ========================================================================== |
| ... | ... | @@ -3515,7 +2911,7 @@ |
| 3515 | 2911 | ========================================================================== */ |
| 3516 | 2912 | |
| 3517 | 2913 | #define Q6_Wuw_vadd_WuwWuw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat_dv)(Vuu,Vvv) |
| 3518 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2914 | #endif | |
| 3519 | 2915 | |
| 3520 | 2916 | #if __HVX_ARCH__ >= 62 |
| 3521 | 2917 | /* ========================================================================== |
| ... | ... | @@ -3526,7 +2922,7 @@ |
| 3526 | 2922 | ========================================================================== */ |
| 3527 | 2923 | |
| 3528 | 2924 | #define Q6_V_vand_QnR(Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt) |
| 3529 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2925 | #endif | |
| 3530 | 2926 | |
| 3531 | 2927 | #if __HVX_ARCH__ >= 62 |
| 3532 | 2928 | /* ========================================================================== |
| ... | ... | @@ -3537,7 +2933,7 @@ |
| 3537 | 2933 | ========================================================================== */ |
| 3538 | 2934 | |
| 3539 | 2935 | #define Q6_V_vandor_VQnR(Vx,Qu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt_acc)(Vx,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qu),-1),Rt) |
| 3540 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2936 | #endif | |
| 3541 | 2937 | |
| 3542 | 2938 | #if __HVX_ARCH__ >= 62 |
| 3543 | 2939 | /* ========================================================================== |
| ... | ... | @@ -3548,7 +2944,7 @@ |
| 3548 | 2944 | ========================================================================== */ |
| 3549 | 2945 | |
| 3550 | 2946 | #define Q6_V_vand_QnV(Qv,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvnqv)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vu) |
| 3551 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2947 | #endif | |
| 3552 | 2948 | |
| 3553 | 2949 | #if __HVX_ARCH__ >= 62 |
| 3554 | 2950 | /* ========================================================================== |
| ... | ... | @@ -3559,7 +2955,7 @@ |
| 3559 | 2955 | ========================================================================== */ |
| 3560 | 2956 | |
| 3561 | 2957 | #define Q6_V_vand_QV(Qv,Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvqv)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1),Vu) |
| 3562 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2958 | #endif | |
| 3563 | 2959 | |
| 3564 | 2960 | #if __HVX_ARCH__ >= 62 |
| 3565 | 2961 | /* ========================================================================== |
| ... | ... | @@ -3570,7 +2966,7 @@ |
| 3570 | 2966 | ========================================================================== */ |
| 3571 | 2967 | |
| 3572 | 2968 | #define Q6_Vb_vasr_VhVhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbsat)(Vu,Vv,Rt) |
| 3573 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2969 | #endif | |
| 3574 | 2970 | |
| 3575 | 2971 | #if __HVX_ARCH__ >= 62 |
| 3576 | 2972 | /* ========================================================================== |
| ... | ... | @@ -3581,7 +2977,7 @@ |
| 3581 | 2977 | ========================================================================== */ |
| 3582 | 2978 | |
| 3583 | 2979 | #define Q6_Vuh_vasr_VuwVuwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhrndsat)(Vu,Vv,Rt) |
| 3584 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2980 | #endif | |
| 3585 | 2981 | |
| 3586 | 2982 | #if __HVX_ARCH__ >= 62 |
| 3587 | 2983 | /* ========================================================================== |
| ... | ... | @@ -3592,7 +2988,7 @@ |
| 3592 | 2988 | ========================================================================== */ |
| 3593 | 2989 | |
| 3594 | 2990 | #define Q6_Vuh_vasr_VwVwR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhrndsat)(Vu,Vv,Rt) |
| 3595 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 2991 | #endif | |
| 3596 | 2992 | |
| 3597 | 2993 | #if __HVX_ARCH__ >= 62 |
| 3598 | 2994 | /* ========================================================================== |
| ... | ... | @@ -3603,7 +2999,7 @@ |
| 3603 | 2999 | ========================================================================== */ |
| 3604 | 3000 | |
| 3605 | 3001 | #define Q6_Vub_vlsr_VubR(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrb)(Vu,Rt) |
| 3606 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3002 | #endif | |
| 3607 | 3003 | |
| 3608 | 3004 | #if __HVX_ARCH__ >= 62 |
| 3609 | 3005 | /* ========================================================================== |
| ... | ... | @@ -3614,7 +3010,7 @@ |
| 3614 | 3010 | ========================================================================== */ |
| 3615 | 3011 | |
| 3616 | 3012 | #define Q6_Vb_vlut32_VbVbR_nomatch(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_nm)(Vu,Vv,Rt) |
| 3617 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3013 | #endif | |
| 3618 | 3014 | |
| 3619 | 3015 | #if __HVX_ARCH__ >= 62 |
| 3620 | 3016 | /* ========================================================================== |
| ... | ... | @@ -3625,7 +3021,7 @@ |
| 3625 | 3021 | ========================================================================== */ |
| 3626 | 3022 | |
| 3627 | 3023 | #define Q6_Vb_vlut32or_VbVbVbI(Vx,Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracci)(Vx,Vu,Vv,Iu3) |
| 3628 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3024 | #endif | |
| 3629 | 3025 | |
| 3630 | 3026 | #if __HVX_ARCH__ >= 62 |
| 3631 | 3027 | /* ========================================================================== |
| ... | ... | @@ -3636,7 +3032,7 @@ |
| 3636 | 3032 | ========================================================================== */ |
| 3637 | 3033 | |
| 3638 | 3034 | #define Q6_Vb_vlut32_VbVbI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvbi)(Vu,Vv,Iu3) |
| 3639 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3035 | #endif | |
| 3640 | 3036 | |
| 3641 | 3037 | #if __HVX_ARCH__ >= 62 |
| 3642 | 3038 | /* ========================================================================== |
| ... | ... | @@ -3647,7 +3043,7 @@ |
| 3647 | 3043 | ========================================================================== */ |
| 3648 | 3044 | |
| 3649 | 3045 | #define Q6_Wh_vlut16_VbVhR_nomatch(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_nm)(Vu,Vv,Rt) |
| 3650 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3046 | #endif | |
| 3651 | 3047 | |
| 3652 | 3048 | #if __HVX_ARCH__ >= 62 |
| 3653 | 3049 | /* ========================================================================== |
| ... | ... | @@ -3658,7 +3054,7 @@ |
| 3658 | 3054 | ========================================================================== */ |
| 3659 | 3055 | |
| 3660 | 3056 | #define Q6_Wh_vlut16or_WhVbVhI(Vxx,Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracci)(Vxx,Vu,Vv,Iu3) |
| 3661 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3057 | #endif | |
| 3662 | 3058 | |
| 3663 | 3059 | #if __HVX_ARCH__ >= 62 |
| 3664 | 3060 | /* ========================================================================== |
| ... | ... | @@ -3669,7 +3065,7 @@ |
| 3669 | 3065 | ========================================================================== */ |
| 3670 | 3066 | |
| 3671 | 3067 | #define Q6_Wh_vlut16_VbVhI(Vu,Vv,Iu3) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwhi)(Vu,Vv,Iu3) |
| 3672 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3068 | #endif | |
| 3673 | 3069 | |
| 3674 | 3070 | #if __HVX_ARCH__ >= 62 |
| 3675 | 3071 | /* ========================================================================== |
| ... | ... | @@ -3680,7 +3076,7 @@ |
| 3680 | 3076 | ========================================================================== */ |
| 3681 | 3077 | |
| 3682 | 3078 | #define Q6_Vb_vmax_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxb)(Vu,Vv) |
| 3683 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3079 | #endif | |
| 3684 | 3080 | |
| 3685 | 3081 | #if __HVX_ARCH__ >= 62 |
| 3686 | 3082 | /* ========================================================================== |
| ... | ... | @@ -3691,7 +3087,7 @@ |
| 3691 | 3087 | ========================================================================== */ |
| 3692 | 3088 | |
| 3693 | 3089 | #define Q6_Vb_vmin_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminb)(Vu,Vv) |
| 3694 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3090 | #endif | |
| 3695 | 3091 | |
| 3696 | 3092 | #if __HVX_ARCH__ >= 62 |
| 3697 | 3093 | /* ========================================================================== |
| ... | ... | @@ -3702,7 +3098,7 @@ |
| 3702 | 3098 | ========================================================================== */ |
| 3703 | 3099 | |
| 3704 | 3100 | #define Q6_Ww_vmpa_WuhRb(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb)(Vuu,Rt) |
| 3705 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3101 | #endif | |
| 3706 | 3102 | |
| 3707 | 3103 | #if __HVX_ARCH__ >= 62 |
| 3708 | 3104 | /* ========================================================================== |
| ... | ... | @@ -3713,7 +3109,7 @@ |
| 3713 | 3109 | ========================================================================== */ |
| 3714 | 3110 | |
| 3715 | 3111 | #define Q6_Ww_vmpaacc_WwWuhRb(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb_acc)(Vxx,Vuu,Rt) |
| 3716 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3112 | #endif | |
| 3717 | 3113 | |
| 3718 | 3114 | #if __HVX_ARCH__ >= 62 |
| 3719 | 3115 | /* ========================================================================== |
| ... | ... | @@ -3724,7 +3120,7 @@ |
| 3724 | 3120 | ========================================================================== */ |
| 3725 | 3121 | |
| 3726 | 3122 | #define Q6_W_vmpye_VwVuh(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh_64)(Vu,Vv) |
| 3727 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3123 | #endif | |
| 3728 | 3124 | |
| 3729 | 3125 | #if __HVX_ARCH__ >= 62 |
| 3730 | 3126 | /* ========================================================================== |
| ... | ... | @@ -3735,7 +3131,7 @@ |
| 3735 | 3131 | ========================================================================== */ |
| 3736 | 3132 | |
| 3737 | 3133 | #define Q6_Vw_vmpyi_VwRub(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub)(Vu,Rt) |
| 3738 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3134 | #endif | |
| 3739 | 3135 | |
| 3740 | 3136 | #if __HVX_ARCH__ >= 62 |
| 3741 | 3137 | /* ========================================================================== |
| ... | ... | @@ -3746,7 +3142,7 @@ |
| 3746 | 3142 | ========================================================================== */ |
| 3747 | 3143 | |
| 3748 | 3144 | #define Q6_Vw_vmpyiacc_VwVwRub(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub_acc)(Vx,Vu,Rt) |
| 3749 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3145 | #endif | |
| 3750 | 3146 | |
| 3751 | 3147 | #if __HVX_ARCH__ >= 62 |
| 3752 | 3148 | /* ========================================================================== |
| ... | ... | @@ -3757,7 +3153,7 @@ |
| 3757 | 3153 | ========================================================================== */ |
| 3758 | 3154 | |
| 3759 | 3155 | #define Q6_W_vmpyoacc_WVwVh(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_64_acc)(Vxx,Vu,Vv) |
| 3760 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3156 | #endif | |
| 3761 | 3157 | |
| 3762 | 3158 | #if __HVX_ARCH__ >= 62 |
| 3763 | 3159 | /* ========================================================================== |
| ... | ... | @@ -3768,7 +3164,7 @@ |
| 3768 | 3164 | ========================================================================== */ |
| 3769 | 3165 | |
| 3770 | 3166 | #define Q6_Vub_vround_VuhVuh_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduhub)(Vu,Vv) |
| 3771 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3167 | #endif | |
| 3772 | 3168 | |
| 3773 | 3169 | #if __HVX_ARCH__ >= 62 |
| 3774 | 3170 | /* ========================================================================== |
| ... | ... | @@ -3779,7 +3175,7 @@ |
| 3779 | 3175 | ========================================================================== */ |
| 3780 | 3176 | |
| 3781 | 3177 | #define Q6_Vuh_vround_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduwuh)(Vu,Vv) |
| 3782 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3178 | #endif | |
| 3783 | 3179 | |
| 3784 | 3180 | #if __HVX_ARCH__ >= 62 |
| 3785 | 3181 | /* ========================================================================== |
| ... | ... | @@ -3790,7 +3186,7 @@ |
| 3790 | 3186 | ========================================================================== */ |
| 3791 | 3187 | |
| 3792 | 3188 | #define Q6_Vuh_vsat_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatuwuh)(Vu,Vv) |
| 3793 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3189 | #endif | |
| 3794 | 3190 | |
| 3795 | 3191 | #if __HVX_ARCH__ >= 62 |
| 3796 | 3192 | /* ========================================================================== |
| ... | ... | @@ -3801,7 +3197,7 @@ |
| 3801 | 3197 | ========================================================================== */ |
| 3802 | 3198 | |
| 3803 | 3199 | #define Q6_Vb_vsub_VbVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat)(Vu,Vv) |
| 3804 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3200 | #endif | |
| 3805 | 3201 | |
| 3806 | 3202 | #if __HVX_ARCH__ >= 62 |
| 3807 | 3203 | /* ========================================================================== |
| ... | ... | @@ -3812,7 +3208,7 @@ |
| 3812 | 3208 | ========================================================================== */ |
| 3813 | 3209 | |
| 3814 | 3210 | #define Q6_Wb_vsub_WbWb_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat_dv)(Vuu,Vvv) |
| 3815 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3211 | #endif | |
| 3816 | 3212 | |
| 3817 | 3213 | #if __HVX_ARCH__ >= 62 |
| 3818 | 3214 | /* ========================================================================== |
| ... | ... | @@ -3823,7 +3219,7 @@ |
| 3823 | 3219 | ========================================================================== */ |
| 3824 | 3220 | |
| 3825 | 3221 | #define Q6_Vw_vsub_VwVwQ_carry(Vu,Vv,Qx) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubcarry)(Vu,Vv,Qx) |
| 3826 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3222 | #endif | |
| 3827 | 3223 | |
| 3828 | 3224 | #if __HVX_ARCH__ >= 62 |
| 3829 | 3225 | /* ========================================================================== |
| ... | ... | @@ -3834,7 +3230,7 @@ |
| 3834 | 3230 | ========================================================================== */ |
| 3835 | 3231 | |
| 3836 | 3232 | #define Q6_Vub_vsub_VubVb_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubububb_sat)(Vu,Vv) |
| 3837 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3233 | #endif | |
| 3838 | 3234 | |
| 3839 | 3235 | #if __HVX_ARCH__ >= 62 |
| 3840 | 3236 | /* ========================================================================== |
| ... | ... | @@ -3845,7 +3241,7 @@ |
| 3845 | 3241 | ========================================================================== */ |
| 3846 | 3242 | |
| 3847 | 3243 | #define Q6_Vuw_vsub_VuwVuw_sat(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat)(Vu,Vv) |
| 3848 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3244 | #endif | |
| 3849 | 3245 | |
| 3850 | 3246 | #if __HVX_ARCH__ >= 62 |
| 3851 | 3247 | /* ========================================================================== |
| ... | ... | @@ -3856,7 +3252,7 @@ |
| 3856 | 3252 | ========================================================================== */ |
| 3857 | 3253 | |
| 3858 | 3254 | #define Q6_Wuw_vsub_WuwWuw_sat(Vuu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat_dv)(Vuu,Vvv) |
| 3859 | #endif /* __HEXAGON_ARCH___ >= 62 */ | |
| 3255 | #endif | |
| 3860 | 3256 | |
| 3861 | 3257 | #if __HVX_ARCH__ >= 65 |
| 3862 | 3258 | /* ========================================================================== |
| ... | ... | @@ -3867,7 +3263,7 @@ |
| 3867 | 3263 | ========================================================================== */ |
| 3868 | 3264 | |
| 3869 | 3265 | #define Q6_Vb_vabs_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb)(Vu) |
| 3870 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3266 | #endif | |
| 3871 | 3267 | |
| 3872 | 3268 | #if __HVX_ARCH__ >= 65 |
| 3873 | 3269 | /* ========================================================================== |
| ... | ... | @@ -3878,7 +3274,7 @@ |
| 3878 | 3274 | ========================================================================== */ |
| 3879 | 3275 | |
| 3880 | 3276 | #define Q6_Vb_vabs_Vb_sat(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb_sat)(Vu) |
| 3881 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3277 | #endif | |
| 3882 | 3278 | |
| 3883 | 3279 | #if __HVX_ARCH__ >= 65 |
| 3884 | 3280 | /* ========================================================================== |
| ... | ... | @@ -3889,7 +3285,7 @@ |
| 3889 | 3285 | ========================================================================== */ |
| 3890 | 3286 | |
| 3891 | 3287 | #define Q6_Vh_vaslacc_VhVhR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh_acc)(Vx,Vu,Rt) |
| 3892 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3288 | #endif | |
| 3893 | 3289 | |
| 3894 | 3290 | #if __HVX_ARCH__ >= 65 |
| 3895 | 3291 | /* ========================================================================== |
| ... | ... | @@ -3900,7 +3296,7 @@ |
| 3900 | 3296 | ========================================================================== */ |
| 3901 | 3297 | |
| 3902 | 3298 | #define Q6_Vh_vasracc_VhVhR(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh_acc)(Vx,Vu,Rt) |
| 3903 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3299 | #endif | |
| 3904 | 3300 | |
| 3905 | 3301 | #if __HVX_ARCH__ >= 65 |
| 3906 | 3302 | /* ========================================================================== |
| ... | ... | @@ -3911,7 +3307,7 @@ |
| 3911 | 3307 | ========================================================================== */ |
| 3912 | 3308 | |
| 3913 | 3309 | #define Q6_Vub_vasr_VuhVuhR_rnd_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubrndsat)(Vu,Vv,Rt) |
| 3914 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3310 | #endif | |
| 3915 | 3311 | |
| 3916 | 3312 | #if __HVX_ARCH__ >= 65 |
| 3917 | 3313 | /* ========================================================================== |
| ... | ... | @@ -3922,7 +3318,7 @@ |
| 3922 | 3318 | ========================================================================== */ |
| 3923 | 3319 | |
| 3924 | 3320 | #define Q6_Vub_vasr_VuhVuhR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubsat)(Vu,Vv,Rt) |
| 3925 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3321 | #endif | |
| 3926 | 3322 | |
| 3927 | 3323 | #if __HVX_ARCH__ >= 65 |
| 3928 | 3324 | /* ========================================================================== |
| ... | ... | @@ -3933,7 +3329,7 @@ |
| 3933 | 3329 | ========================================================================== */ |
| 3934 | 3330 | |
| 3935 | 3331 | #define Q6_Vuh_vasr_VuwVuwR_sat(Vu,Vv,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhsat)(Vu,Vv,Rt) |
| 3936 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3332 | #endif | |
| 3937 | 3333 | |
| 3938 | 3334 | #if __HVX_ARCH__ >= 65 |
| 3939 | 3335 | /* ========================================================================== |
| ... | ... | @@ -3944,7 +3340,7 @@ |
| 3944 | 3340 | ========================================================================== */ |
| 3945 | 3341 | |
| 3946 | 3342 | #define Q6_Vb_vavg_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgb)(Vu,Vv) |
| 3947 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3343 | #endif | |
| 3948 | 3344 | |
| 3949 | 3345 | #if __HVX_ARCH__ >= 65 |
| 3950 | 3346 | /* ========================================================================== |
| ... | ... | @@ -3955,7 +3351,7 @@ |
| 3955 | 3351 | ========================================================================== */ |
| 3956 | 3352 | |
| 3957 | 3353 | #define Q6_Vb_vavg_VbVb_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgbrnd)(Vu,Vv) |
| 3958 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3354 | #endif | |
| 3959 | 3355 | |
| 3960 | 3356 | #if __HVX_ARCH__ >= 65 |
| 3961 | 3357 | /* ========================================================================== |
| ... | ... | @@ -3966,7 +3362,7 @@ |
| 3966 | 3362 | ========================================================================== */ |
| 3967 | 3363 | |
| 3968 | 3364 | #define Q6_Vuw_vavg_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguw)(Vu,Vv) |
| 3969 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3365 | #endif | |
| 3970 | 3366 | |
| 3971 | 3367 | #if __HVX_ARCH__ >= 65 |
| 3972 | 3368 | /* ========================================================================== |
| ... | ... | @@ -3977,7 +3373,7 @@ |
| 3977 | 3373 | ========================================================================== */ |
| 3978 | 3374 | |
| 3979 | 3375 | #define Q6_Vuw_vavg_VuwVuw_rnd(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguwrnd)(Vu,Vv) |
| 3980 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3376 | #endif | |
| 3981 | 3377 | |
| 3982 | 3378 | #if __HVX_ARCH__ >= 65 |
| 3983 | 3379 | /* ========================================================================== |
| ... | ... | @@ -3988,7 +3384,7 @@ |
| 3988 | 3384 | ========================================================================== */ |
| 3989 | 3385 | |
| 3990 | 3386 | #define Q6_W_vzero() __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdd0)() |
| 3991 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3387 | #endif | |
| 3992 | 3388 | |
| 3993 | 3389 | #if __HVX_ARCH__ >= 65 |
| 3994 | 3390 | /* ========================================================================== |
| ... | ... | @@ -3999,7 +3395,7 @@ |
| 3999 | 3395 | ========================================================================== */ |
| 4000 | 3396 | |
| 4001 | 3397 | #define Q6_vgather_ARMVh(Rs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermh)(Rs,Rt,Mu,Vv) |
| 4002 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3398 | #endif | |
| 4003 | 3399 | |
| 4004 | 3400 | #if __HVX_ARCH__ >= 65 |
| 4005 | 3401 | /* ========================================================================== |
| ... | ... | @@ -4010,7 +3406,7 @@ |
| 4010 | 3406 | ========================================================================== */ |
| 4011 | 3407 | |
| 4012 | 3408 | #define Q6_vgather_AQRMVh(Rs,Qs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv) |
| 4013 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3409 | #endif | |
| 4014 | 3410 | |
| 4015 | 3411 | #if __HVX_ARCH__ >= 65 |
| 4016 | 3412 | /* ========================================================================== |
| ... | ... | @@ -4021,7 +3417,7 @@ |
| 4021 | 3417 | ========================================================================== */ |
| 4022 | 3418 | |
| 4023 | 3419 | #define Q6_vgather_ARMWw(Rs,Rt,Mu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhw)(Rs,Rt,Mu,Vvv) |
| 4024 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3420 | #endif | |
| 4025 | 3421 | |
| 4026 | 3422 | #if __HVX_ARCH__ >= 65 |
| 4027 | 3423 | /* ========================================================================== |
| ... | ... | @@ -4032,7 +3428,7 @@ |
| 4032 | 3428 | ========================================================================== */ |
| 4033 | 3429 | |
| 4034 | 3430 | #define Q6_vgather_AQRMWw(Rs,Qs,Rt,Mu,Vvv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhwq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vvv) |
| 4035 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3431 | #endif | |
| 4036 | 3432 | |
| 4037 | 3433 | #if __HVX_ARCH__ >= 65 |
| 4038 | 3434 | /* ========================================================================== |
| ... | ... | @@ -4043,7 +3439,7 @@ |
| 4043 | 3439 | ========================================================================== */ |
| 4044 | 3440 | |
| 4045 | 3441 | #define Q6_vgather_ARMVw(Rs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermw)(Rs,Rt,Mu,Vv) |
| 4046 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3442 | #endif | |
| 4047 | 3443 | |
| 4048 | 3444 | #if __HVX_ARCH__ >= 65 |
| 4049 | 3445 | /* ========================================================================== |
| ... | ... | @@ -4054,7 +3450,7 @@ |
| 4054 | 3450 | ========================================================================== */ |
| 4055 | 3451 | |
| 4056 | 3452 | #define Q6_vgather_AQRMVw(Rs,Qs,Rt,Mu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermwq)(Rs,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv) |
| 4057 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3453 | #endif | |
| 4058 | 3454 | |
| 4059 | 3455 | #if __HVX_ARCH__ >= 65 |
| 4060 | 3456 | /* ========================================================================== |
| ... | ... | @@ -4065,7 +3461,7 @@ |
| 4065 | 3461 | ========================================================================== */ |
| 4066 | 3462 | |
| 4067 | 3463 | #define Q6_Vh_vlut4_VuhPh(Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlut4)(Vu,Rtt) |
| 4068 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3464 | #endif | |
| 4069 | 3465 | |
| 4070 | 3466 | #if __HVX_ARCH__ >= 65 |
| 4071 | 3467 | /* ========================================================================== |
| ... | ... | @@ -4076,7 +3472,7 @@ |
| 4076 | 3472 | ========================================================================== */ |
| 4077 | 3473 | |
| 4078 | 3474 | #define Q6_Wh_vmpa_WubRub(Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu)(Vuu,Rt) |
| 4079 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3475 | #endif | |
| 4080 | 3476 | |
| 4081 | 3477 | #if __HVX_ARCH__ >= 65 |
| 4082 | 3478 | /* ========================================================================== |
| ... | ... | @@ -4087,7 +3483,7 @@ |
| 4087 | 3483 | ========================================================================== */ |
| 4088 | 3484 | |
| 4089 | 3485 | #define Q6_Wh_vmpaacc_WhWubRub(Vxx,Vuu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu_acc)(Vxx,Vuu,Rt) |
| 4090 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3486 | #endif | |
| 4091 | 3487 | |
| 4092 | 3488 | #if __HVX_ARCH__ >= 65 |
| 4093 | 3489 | /* ========================================================================== |
| ... | ... | @@ -4098,7 +3494,7 @@ |
| 4098 | 3494 | ========================================================================== */ |
| 4099 | 3495 | |
| 4100 | 3496 | #define Q6_Vh_vmpa_VhVhVhPh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahhsat)(Vx,Vu,Rtt) |
| 4101 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3497 | #endif | |
| 4102 | 3498 | |
| 4103 | 3499 | #if __HVX_ARCH__ >= 65 |
| 4104 | 3500 | /* ========================================================================== |
| ... | ... | @@ -4109,7 +3505,7 @@ |
| 4109 | 3505 | ========================================================================== */ |
| 4110 | 3506 | |
| 4111 | 3507 | #define Q6_Vh_vmpa_VhVhVuhPuh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhuhsat)(Vx,Vu,Rtt) |
| 4112 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3508 | #endif | |
| 4113 | 3509 | |
| 4114 | 3510 | #if __HVX_ARCH__ >= 65 |
| 4115 | 3511 | /* ========================================================================== |
| ... | ... | @@ -4120,7 +3516,7 @@ |
| 4120 | 3516 | ========================================================================== */ |
| 4121 | 3517 | |
| 4122 | 3518 | #define Q6_Vh_vmps_VhVhVuhPuh_sat(Vx,Vu,Rtt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpsuhuhsat)(Vx,Vu,Rtt) |
| 4123 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3519 | #endif | |
| 4124 | 3520 | |
| 4125 | 3521 | #if __HVX_ARCH__ >= 65 |
| 4126 | 3522 | /* ========================================================================== |
| ... | ... | @@ -4131,7 +3527,7 @@ |
| 4131 | 3527 | ========================================================================== */ |
| 4132 | 3528 | |
| 4133 | 3529 | #define Q6_Ww_vmpyacc_WwVhRh(Vxx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh_acc)(Vxx,Vu,Rt) |
| 4134 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3530 | #endif | |
| 4135 | 3531 | |
| 4136 | 3532 | #if __HVX_ARCH__ >= 65 |
| 4137 | 3533 | /* ========================================================================== |
| ... | ... | @@ -4142,7 +3538,7 @@ |
| 4142 | 3538 | ========================================================================== */ |
| 4143 | 3539 | |
| 4144 | 3540 | #define Q6_Vuw_vmpye_VuhRuh(Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe)(Vu,Rt) |
| 4145 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3541 | #endif | |
| 4146 | 3542 | |
| 4147 | 3543 | #if __HVX_ARCH__ >= 65 |
| 4148 | 3544 | /* ========================================================================== |
| ... | ... | @@ -4153,7 +3549,7 @@ |
| 4153 | 3549 | ========================================================================== */ |
| 4154 | 3550 | |
| 4155 | 3551 | #define Q6_Vuw_vmpyeacc_VuwVuhRuh(Vx,Vu,Rt) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe_acc)(Vx,Vu,Rt) |
| 4156 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3552 | #endif | |
| 4157 | 3553 | |
| 4158 | 3554 | #if __HVX_ARCH__ >= 65 |
| 4159 | 3555 | /* ========================================================================== |
| ... | ... | @@ -4164,7 +3560,7 @@ |
| 4164 | 3560 | ========================================================================== */ |
| 4165 | 3561 | |
| 4166 | 3562 | #define Q6_Vb_vnavg_VbVb(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgb)(Vu,Vv) |
| 4167 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3563 | #endif | |
| 4168 | 3564 | |
| 4169 | 3565 | #if __HVX_ARCH__ >= 65 |
| 4170 | 3566 | /* ========================================================================== |
| ... | ... | @@ -4175,7 +3571,7 @@ |
| 4175 | 3571 | ========================================================================== */ |
| 4176 | 3572 | |
| 4177 | 3573 | #define Q6_Vb_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqb)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1)) |
| 4178 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3574 | #endif | |
| 4179 | 3575 | |
| 4180 | 3576 | #if __HVX_ARCH__ >= 65 |
| 4181 | 3577 | /* ========================================================================== |
| ... | ... | @@ -4186,7 +3582,7 @@ |
| 4186 | 3582 | ========================================================================== */ |
| 4187 | 3583 | |
| 4188 | 3584 | #define Q6_Vh_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqh)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1)) |
| 4189 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3585 | #endif | |
| 4190 | 3586 | |
| 4191 | 3587 | #if __HVX_ARCH__ >= 65 |
| 4192 | 3588 | /* ========================================================================== |
| ... | ... | @@ -4197,7 +3593,7 @@ |
| 4197 | 3593 | ========================================================================== */ |
| 4198 | 3594 | |
| 4199 | 3595 | #define Q6_Vw_prefixsum_Q(Qv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqw)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qv),-1)) |
| 4200 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3596 | #endif | |
| 4201 | 3597 | |
| 4202 | 3598 | #if __HVX_ARCH__ >= 65 |
| 4203 | 3599 | /* ========================================================================== |
| ... | ... | @@ -4208,7 +3604,7 @@ |
| 4208 | 3604 | ========================================================================== */ |
| 4209 | 3605 | |
| 4210 | 3606 | #define Q6_vscatter_RMVhV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh)(Rt,Mu,Vv,Vw) |
| 4211 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3607 | #endif | |
| 4212 | 3608 | |
| 4213 | 3609 | #if __HVX_ARCH__ >= 65 |
| 4214 | 3610 | /* ========================================================================== |
| ... | ... | @@ -4219,7 +3615,7 @@ |
| 4219 | 3615 | ========================================================================== */ |
| 4220 | 3616 | |
| 4221 | 3617 | #define Q6_vscatteracc_RMVhV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh_add)(Rt,Mu,Vv,Vw) |
| 4222 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3618 | #endif | |
| 4223 | 3619 | |
| 4224 | 3620 | #if __HVX_ARCH__ >= 65 |
| 4225 | 3621 | /* ========================================================================== |
| ... | ... | @@ -4230,7 +3626,7 @@ |
| 4230 | 3626 | ========================================================================== */ |
| 4231 | 3627 | |
| 4232 | 3628 | #define Q6_vscatter_QRMVhV(Qs,Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv,Vw) |
| 4233 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3629 | #endif | |
| 4234 | 3630 | |
| 4235 | 3631 | #if __HVX_ARCH__ >= 65 |
| 4236 | 3632 | /* ========================================================================== |
| ... | ... | @@ -4241,7 +3637,7 @@ |
| 4241 | 3637 | ========================================================================== */ |
| 4242 | 3638 | |
| 4243 | 3639 | #define Q6_vscatter_RMWwV(Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw)(Rt,Mu,Vvv,Vw) |
| 4244 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3640 | #endif | |
| 4245 | 3641 | |
| 4246 | 3642 | #if __HVX_ARCH__ >= 65 |
| 4247 | 3643 | /* ========================================================================== |
| ... | ... | @@ -4252,7 +3648,7 @@ |
| 4252 | 3648 | ========================================================================== */ |
| 4253 | 3649 | |
| 4254 | 3650 | #define Q6_vscatteracc_RMWwV(Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw_add)(Rt,Mu,Vvv,Vw) |
| 4255 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3651 | #endif | |
| 4256 | 3652 | |
| 4257 | 3653 | #if __HVX_ARCH__ >= 65 |
| 4258 | 3654 | /* ========================================================================== |
| ... | ... | @@ -4263,7 +3659,7 @@ |
| 4263 | 3659 | ========================================================================== */ |
| 4264 | 3660 | |
| 4265 | 3661 | #define Q6_vscatter_QRMWwV(Qs,Rt,Mu,Vvv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vvv,Vw) |
| 4266 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3662 | #endif | |
| 4267 | 3663 | |
| 4268 | 3664 | #if __HVX_ARCH__ >= 65 |
| 4269 | 3665 | /* ========================================================================== |
| ... | ... | @@ -4274,7 +3670,7 @@ |
| 4274 | 3670 | ========================================================================== */ |
| 4275 | 3671 | |
| 4276 | 3672 | #define Q6_vscatter_RMVwV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw)(Rt,Mu,Vv,Vw) |
| 4277 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3673 | #endif | |
| 4278 | 3674 | |
| 4279 | 3675 | #if __HVX_ARCH__ >= 65 |
| 4280 | 3676 | /* ========================================================================== |
| ... | ... | @@ -4285,7 +3681,7 @@ |
| 4285 | 3681 | ========================================================================== */ |
| 4286 | 3682 | |
| 4287 | 3683 | #define Q6_vscatteracc_RMVwV(Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw_add)(Rt,Mu,Vv,Vw) |
| 4288 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3684 | #endif | |
| 4289 | 3685 | |
| 4290 | 3686 | #if __HVX_ARCH__ >= 65 |
| 4291 | 3687 | /* ========================================================================== |
| ... | ... | @@ -4296,7 +3692,7 @@ |
| 4296 | 3692 | ========================================================================== */ |
| 4297 | 3693 | |
| 4298 | 3694 | #define Q6_vscatter_QRMVwV(Qs,Rt,Mu,Vv,Vw) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermwq)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1),Rt,Mu,Vv,Vw) |
| 4299 | #endif /* __HEXAGON_ARCH___ >= 65 */ | |
| 3695 | #endif | |
| 4300 | 3696 | |
| 4301 | 3697 | #if __HVX_ARCH__ >= 66 |
| 4302 | 3698 | /* ========================================================================== |
| ... | ... | @@ -4307,7 +3703,7 @@ |
| 4307 | 3703 | ========================================================================== */ |
| 4308 | 3704 | |
| 4309 | 3705 | #define Q6_Vw_vadd_VwVwQ_carry_sat(Vu,Vv,Qs) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarrysat)(Vu,Vv,__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qs),-1)) |
| 4310 | #endif /* __HEXAGON_ARCH___ >= 66 */ | |
| 3706 | #endif | |
| 4311 | 3707 | |
| 4312 | 3708 | #if __HVX_ARCH__ >= 66 |
| 4313 | 3709 | /* ========================================================================== |
| ... | ... | @@ -4318,7 +3714,7 @@ |
| 4318 | 3714 | ========================================================================== */ |
| 4319 | 3715 | |
| 4320 | 3716 | #define Q6_Ww_vasrinto_WwVwVw(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasr_into)(Vxx,Vu,Vv) |
| 4321 | #endif /* __HEXAGON_ARCH___ >= 66 */ | |
| 3717 | #endif | |
| 4322 | 3718 | |
| 4323 | 3719 | #if __HVX_ARCH__ >= 66 |
| 4324 | 3720 | /* ========================================================================== |
| ... | ... | @@ -4329,7 +3725,7 @@ |
| 4329 | 3725 | ========================================================================== */ |
| 4330 | 3726 | |
| 4331 | 3727 | #define Q6_Vuw_vrotr_VuwVuw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrotr)(Vu,Vv) |
| 4332 | #endif /* __HEXAGON_ARCH___ >= 66 */ | |
| 3728 | #endif | |
| 4333 | 3729 | |
| 4334 | 3730 | #if __HVX_ARCH__ >= 66 |
| 4335 | 3731 | /* ========================================================================== |
| ... | ... | @@ -4340,7 +3736,7 @@ |
| 4340 | 3736 | ========================================================================== */ |
| 4341 | 3737 | |
| 4342 | 3738 | #define Q6_Vw_vsatdw_VwVw(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatdw)(Vu,Vv) |
| 4343 | #endif /* __HEXAGON_ARCH___ >= 66 */ | |
| 3739 | #endif | |
| 4344 | 3740 | |
| 4345 | 3741 | #if __HVX_ARCH__ >= 68 |
| 4346 | 3742 | /* ========================================================================== |
| ... | ... | @@ -4351,7 +3747,7 @@ |
| 4351 | 3747 | ========================================================================== */ |
| 4352 | 3748 | |
| 4353 | 3749 | #define Q6_Ww_v6mpy_WubWbI_h(Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10)(Vuu,Vvv,Iu2) |
| 4354 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3750 | #endif | |
| 4355 | 3751 | |
| 4356 | 3752 | #if __HVX_ARCH__ >= 68 |
| 4357 | 3753 | /* ========================================================================== |
| ... | ... | @@ -4362,7 +3758,7 @@ |
| 4362 | 3758 | ========================================================================== */ |
| 4363 | 3759 | |
| 4364 | 3760 | #define Q6_Ww_v6mpyacc_WwWubWbI_h(Vxx,Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10_vxx)(Vxx,Vuu,Vvv,Iu2) |
| 4365 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3761 | #endif | |
| 4366 | 3762 | |
| 4367 | 3763 | #if __HVX_ARCH__ >= 68 |
| 4368 | 3764 | /* ========================================================================== |
| ... | ... | @@ -4373,7 +3769,7 @@ |
| 4373 | 3769 | ========================================================================== */ |
| 4374 | 3770 | |
| 4375 | 3771 | #define Q6_Ww_v6mpy_WubWbI_v(Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10)(Vuu,Vvv,Iu2) |
| 4376 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3772 | #endif | |
| 4377 | 3773 | |
| 4378 | 3774 | #if __HVX_ARCH__ >= 68 |
| 4379 | 3775 | /* ========================================================================== |
| ... | ... | @@ -4384,9 +3780,9 @@ |
| 4384 | 3780 | ========================================================================== */ |
| 4385 | 3781 | |
| 4386 | 3782 | #define Q6_Ww_v6mpyacc_WwWubWbI_v(Vxx,Vuu,Vvv,Iu2) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10_vxx)(Vxx,Vuu,Vvv,Iu2) |
| 4387 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3783 | #endif | |
| 4388 | 3784 | |
| 4389 | #if __HVX_ARCH__ >= 68 | |
| 3785 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4390 | 3786 | /* ========================================================================== |
| 4391 | 3787 | Assembly Syntax: Vd32.hf=vabs(Vu32.hf) |
| 4392 | 3788 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vabs_Vhf(HVX_Vector Vu) |
| ... | ... | @@ -4395,9 +3791,9 @@ |
| 4395 | 3791 | ========================================================================== */ |
| 4396 | 3792 | |
| 4397 | 3793 | #define Q6_Vhf_vabs_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_hf)(Vu) |
| 4398 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3794 | #endif | |
| 4399 | 3795 | |
| 4400 | #if __HVX_ARCH__ >= 68 | |
| 3796 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4401 | 3797 | /* ========================================================================== |
| 4402 | 3798 | Assembly Syntax: Vd32.sf=vabs(Vu32.sf) |
| 4403 | 3799 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vabs_Vsf(HVX_Vector Vu) |
| ... | ... | @@ -4406,7 +3802,7 @@ |
| 4406 | 3802 | ========================================================================== */ |
| 4407 | 3803 | |
| 4408 | 3804 | #define Q6_Vsf_vabs_Vsf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_sf)(Vu) |
| 4409 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3805 | #endif | |
| 4410 | 3806 | |
| 4411 | 3807 | #if __HVX_ARCH__ >= 68 |
| 4412 | 3808 | /* ========================================================================== |
| ... | ... | @@ -4417,9 +3813,9 @@ |
| 4417 | 3813 | ========================================================================== */ |
| 4418 | 3814 | |
| 4419 | 3815 | #define Q6_Vqf16_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf)(Vu,Vv) |
| 4420 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3816 | #endif | |
| 4421 | 3817 | |
| 4422 | #if __HVX_ARCH__ >= 68 | |
| 3818 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4423 | 3819 | /* ========================================================================== |
| 4424 | 3820 | Assembly Syntax: Vd32.hf=vadd(Vu32.hf,Vv32.hf) |
| 4425 | 3821 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4428,7 +3824,7 @@ |
| 4428 | 3824 | ========================================================================== */ |
| 4429 | 3825 | |
| 4430 | 3826 | #define Q6_Vhf_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf_hf)(Vu,Vv) |
| 4431 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3827 | #endif | |
| 4432 | 3828 | |
| 4433 | 3829 | #if __HVX_ARCH__ >= 68 |
| 4434 | 3830 | /* ========================================================================== |
| ... | ... | @@ -4439,7 +3835,7 @@ |
| 4439 | 3835 | ========================================================================== */ |
| 4440 | 3836 | |
| 4441 | 3837 | #define Q6_Vqf16_vadd_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf16)(Vu,Vv) |
| 4442 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3838 | #endif | |
| 4443 | 3839 | |
| 4444 | 3840 | #if __HVX_ARCH__ >= 68 |
| 4445 | 3841 | /* ========================================================================== |
| ... | ... | @@ -4450,7 +3846,7 @@ |
| 4450 | 3846 | ========================================================================== */ |
| 4451 | 3847 | |
| 4452 | 3848 | #define Q6_Vqf16_vadd_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf16_mix)(Vu,Vv) |
| 4453 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3849 | #endif | |
| 4454 | 3850 | |
| 4455 | 3851 | #if __HVX_ARCH__ >= 68 |
| 4456 | 3852 | /* ========================================================================== |
| ... | ... | @@ -4461,7 +3857,7 @@ |
| 4461 | 3857 | ========================================================================== */ |
| 4462 | 3858 | |
| 4463 | 3859 | #define Q6_Vqf32_vadd_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf32)(Vu,Vv) |
| 4464 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3860 | #endif | |
| 4465 | 3861 | |
| 4466 | 3862 | #if __HVX_ARCH__ >= 68 |
| 4467 | 3863 | /* ========================================================================== |
| ... | ... | @@ -4472,7 +3868,7 @@ |
| 4472 | 3868 | ========================================================================== */ |
| 4473 | 3869 | |
| 4474 | 3870 | #define Q6_Vqf32_vadd_Vqf32Vsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_qf32_mix)(Vu,Vv) |
| 4475 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3871 | #endif | |
| 4476 | 3872 | |
| 4477 | 3873 | #if __HVX_ARCH__ >= 68 |
| 4478 | 3874 | /* ========================================================================== |
| ... | ... | @@ -4483,9 +3879,9 @@ |
| 4483 | 3879 | ========================================================================== */ |
| 4484 | 3880 | |
| 4485 | 3881 | #define Q6_Vqf32_vadd_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf)(Vu,Vv) |
| 4486 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3882 | #endif | |
| 4487 | 3883 | |
| 4488 | #if __HVX_ARCH__ >= 68 | |
| 3884 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4489 | 3885 | /* ========================================================================== |
| 4490 | 3886 | Assembly Syntax: Vdd32.sf=vadd(Vu32.hf,Vv32.hf) |
| 4491 | 3887 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vadd_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4494,9 +3890,9 @@ |
| 4494 | 3890 | ========================================================================== */ |
| 4495 | 3891 | |
| 4496 | 3892 | #define Q6_Wsf_vadd_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_hf)(Vu,Vv) |
| 4497 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3893 | #endif | |
| 4498 | 3894 | |
| 4499 | #if __HVX_ARCH__ >= 68 | |
| 3895 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4500 | 3896 | /* ========================================================================== |
| 4501 | 3897 | Assembly Syntax: Vd32.sf=vadd(Vu32.sf,Vv32.sf) |
| 4502 | 3898 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vadd_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4505,9 +3901,9 @@ |
| 4505 | 3901 | ========================================================================== */ |
| 4506 | 3902 | |
| 4507 | 3903 | #define Q6_Vsf_vadd_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_sf)(Vu,Vv) |
| 4508 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3904 | #endif | |
| 4509 | 3905 | |
| 4510 | #if __HVX_ARCH__ >= 68 | |
| 3906 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4511 | 3907 | /* ========================================================================== |
| 4512 | 3908 | Assembly Syntax: Vd32.w=vfmv(Vu32.w) |
| 4513 | 3909 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vfmv_Vw(HVX_Vector Vu) |
| ... | ... | @@ -4516,7 +3912,7 @@ |
| 4516 | 3912 | ========================================================================== */ |
| 4517 | 3913 | |
| 4518 | 3914 | #define Q6_Vw_vfmv_Vw(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign_fp)(Vu) |
| 4519 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3915 | #endif | |
| 4520 | 3916 | |
| 4521 | 3917 | #if __HVX_ARCH__ >= 68 |
| 4522 | 3918 | /* ========================================================================== |
| ... | ... | @@ -4527,7 +3923,7 @@ |
| 4527 | 3923 | ========================================================================== */ |
| 4528 | 3924 | |
| 4529 | 3925 | #define Q6_Vhf_equals_Vqf16(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_qf16)(Vu) |
| 4530 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3926 | #endif | |
| 4531 | 3927 | |
| 4532 | 3928 | #if __HVX_ARCH__ >= 68 |
| 4533 | 3929 | /* ========================================================================== |
| ... | ... | @@ -4538,7 +3934,7 @@ |
| 4538 | 3934 | ========================================================================== */ |
| 4539 | 3935 | |
| 4540 | 3936 | #define Q6_Vhf_equals_Wqf32(Vuu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_qf32)(Vuu) |
| 4541 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3937 | #endif | |
| 4542 | 3938 | |
| 4543 | 3939 | #if __HVX_ARCH__ >= 68 |
| 4544 | 3940 | /* ========================================================================== |
| ... | ... | @@ -4549,9 +3945,9 @@ |
| 4549 | 3945 | ========================================================================== */ |
| 4550 | 3946 | |
| 4551 | 3947 | #define Q6_Vsf_equals_Vqf32(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_sf_qf32)(Vu) |
| 4552 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3948 | #endif | |
| 4553 | 3949 | |
| 4554 | #if __HVX_ARCH__ >= 68 | |
| 3950 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4555 | 3951 | /* ========================================================================== |
| 4556 | 3952 | Assembly Syntax: Vd32.b=vcvt(Vu32.hf,Vv32.hf) |
| 4557 | 3953 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4560,9 +3956,9 @@ |
| 4560 | 3956 | ========================================================================== */ |
| 4561 | 3957 | |
| 4562 | 3958 | #define Q6_Vb_vcvt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_b_hf)(Vu,Vv) |
| 4563 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3959 | #endif | |
| 4564 | 3960 | |
| 4565 | #if __HVX_ARCH__ >= 68 | |
| 3961 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4566 | 3962 | /* ========================================================================== |
| 4567 | 3963 | Assembly Syntax: Vd32.h=vcvt(Vu32.hf) |
| 4568 | 3964 | C Intrinsic Prototype: HVX_Vector Q6_Vh_vcvt_Vhf(HVX_Vector Vu) |
| ... | ... | @@ -4571,9 +3967,9 @@ |
| 4571 | 3967 | ========================================================================== */ |
| 4572 | 3968 | |
| 4573 | 3969 | #define Q6_Vh_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_h_hf)(Vu) |
| 4574 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3970 | #endif | |
| 4575 | 3971 | |
| 4576 | #if __HVX_ARCH__ >= 68 | |
| 3972 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4577 | 3973 | /* ========================================================================== |
| 4578 | 3974 | Assembly Syntax: Vdd32.hf=vcvt(Vu32.b) |
| 4579 | 3975 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_Vb(HVX_Vector Vu) |
| ... | ... | @@ -4582,9 +3978,9 @@ |
| 4582 | 3978 | ========================================================================== */ |
| 4583 | 3979 | |
| 4584 | 3980 | #define Q6_Whf_vcvt_Vb(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_b)(Vu) |
| 4585 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3981 | #endif | |
| 4586 | 3982 | |
| 4587 | #if __HVX_ARCH__ >= 68 | |
| 3983 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4588 | 3984 | /* ========================================================================== |
| 4589 | 3985 | Assembly Syntax: Vd32.hf=vcvt(Vu32.h) |
| 4590 | 3986 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_Vh(HVX_Vector Vu) |
| ... | ... | @@ -4593,9 +3989,9 @@ |
| 4593 | 3989 | ========================================================================== */ |
| 4594 | 3990 | |
| 4595 | 3991 | #define Q6_Vhf_vcvt_Vh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_h)(Vu) |
| 4596 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 3992 | #endif | |
| 4597 | 3993 | |
| 4598 | #if __HVX_ARCH__ >= 68 | |
| 3994 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4599 | 3995 | /* ========================================================================== |
| 4600 | 3996 | Assembly Syntax: Vd32.hf=vcvt(Vu32.sf,Vv32.sf) |
| 4601 | 3997 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4604,9 +4000,9 @@ |
| 4604 | 4000 | ========================================================================== */ |
| 4605 | 4001 | |
| 4606 | 4002 | #define Q6_Vhf_vcvt_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_sf)(Vu,Vv) |
| 4607 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4003 | #endif | |
| 4608 | 4004 | |
| 4609 | #if __HVX_ARCH__ >= 68 | |
| 4005 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4610 | 4006 | /* ========================================================================== |
| 4611 | 4007 | Assembly Syntax: Vdd32.hf=vcvt(Vu32.ub) |
| 4612 | 4008 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_Vub(HVX_Vector Vu) |
| ... | ... | @@ -4615,9 +4011,9 @@ |
| 4615 | 4011 | ========================================================================== */ |
| 4616 | 4012 | |
| 4617 | 4013 | #define Q6_Whf_vcvt_Vub(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_ub)(Vu) |
| 4618 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4014 | #endif | |
| 4619 | 4015 | |
| 4620 | #if __HVX_ARCH__ >= 68 | |
| 4016 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4621 | 4017 | /* ========================================================================== |
| 4622 | 4018 | Assembly Syntax: Vd32.hf=vcvt(Vu32.uh) |
| 4623 | 4019 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vcvt_Vuh(HVX_Vector Vu) |
| ... | ... | @@ -4626,9 +4022,9 @@ |
| 4626 | 4022 | ========================================================================== */ |
| 4627 | 4023 | |
| 4628 | 4024 | #define Q6_Vhf_vcvt_Vuh(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_uh)(Vu) |
| 4629 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4025 | #endif | |
| 4630 | 4026 | |
| 4631 | #if __HVX_ARCH__ >= 68 | |
| 4027 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4632 | 4028 | /* ========================================================================== |
| 4633 | 4029 | Assembly Syntax: Vdd32.sf=vcvt(Vu32.hf) |
| 4634 | 4030 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vcvt_Vhf(HVX_Vector Vu) |
| ... | ... | @@ -4637,9 +4033,9 @@ |
| 4637 | 4033 | ========================================================================== */ |
| 4638 | 4034 | |
| 4639 | 4035 | #define Q6_Wsf_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_sf_hf)(Vu) |
| 4640 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4036 | #endif | |
| 4641 | 4037 | |
| 4642 | #if __HVX_ARCH__ >= 68 | |
| 4038 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4643 | 4039 | /* ========================================================================== |
| 4644 | 4040 | Assembly Syntax: Vd32.ub=vcvt(Vu32.hf,Vv32.hf) |
| 4645 | 4041 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4648,9 +4044,9 @@ |
| 4648 | 4044 | ========================================================================== */ |
| 4649 | 4045 | |
| 4650 | 4046 | #define Q6_Vub_vcvt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_ub_hf)(Vu,Vv) |
| 4651 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4047 | #endif | |
| 4652 | 4048 | |
| 4653 | #if __HVX_ARCH__ >= 68 | |
| 4049 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4654 | 4050 | /* ========================================================================== |
| 4655 | 4051 | Assembly Syntax: Vd32.uh=vcvt(Vu32.hf) |
| 4656 | 4052 | C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcvt_Vhf(HVX_Vector Vu) |
| ... | ... | @@ -4659,9 +4055,9 @@ |
| 4659 | 4055 | ========================================================================== */ |
| 4660 | 4056 | |
| 4661 | 4057 | #define Q6_Vuh_vcvt_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_uh_hf)(Vu) |
| 4662 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4058 | #endif | |
| 4663 | 4059 | |
| 4664 | #if __HVX_ARCH__ >= 68 | |
| 4060 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4665 | 4061 | /* ========================================================================== |
| 4666 | 4062 | Assembly Syntax: Vd32.sf=vdmpy(Vu32.hf,Vv32.hf) |
| 4667 | 4063 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vdmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4670,9 +4066,9 @@ |
| 4670 | 4066 | ========================================================================== */ |
| 4671 | 4067 | |
| 4672 | 4068 | #define Q6_Vsf_vdmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpy_sf_hf)(Vu,Vv) |
| 4673 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4069 | #endif | |
| 4674 | 4070 | |
| 4675 | #if __HVX_ARCH__ >= 68 | |
| 4071 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4676 | 4072 | /* ========================================================================== |
| 4677 | 4073 | Assembly Syntax: Vx32.sf+=vdmpy(Vu32.hf,Vv32.hf) |
| 4678 | 4074 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vdmpyacc_VsfVhfVhf(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4681,9 +4077,9 @@ |
| 4681 | 4077 | ========================================================================== */ |
| 4682 | 4078 | |
| 4683 | 4079 | #define Q6_Vsf_vdmpyacc_VsfVhfVhf(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpy_sf_hf_acc)(Vx,Vu,Vv) |
| 4684 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4080 | #endif | |
| 4685 | 4081 | |
| 4686 | #if __HVX_ARCH__ >= 68 | |
| 4082 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4687 | 4083 | /* ========================================================================== |
| 4688 | 4084 | Assembly Syntax: Vd32.hf=vfmax(Vu32.hf,Vv32.hf) |
| 4689 | 4085 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfmax_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4692,9 +4088,9 @@ |
| 4692 | 4088 | ========================================================================== */ |
| 4693 | 4089 | |
| 4694 | 4090 | #define Q6_Vhf_vfmax_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_hf)(Vu,Vv) |
| 4695 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4091 | #endif | |
| 4696 | 4092 | |
| 4697 | #if __HVX_ARCH__ >= 68 | |
| 4093 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4698 | 4094 | /* ========================================================================== |
| 4699 | 4095 | Assembly Syntax: Vd32.sf=vfmax(Vu32.sf,Vv32.sf) |
| 4700 | 4096 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfmax_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4703,9 +4099,9 @@ |
| 4703 | 4099 | ========================================================================== */ |
| 4704 | 4100 | |
| 4705 | 4101 | #define Q6_Vsf_vfmax_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_sf)(Vu,Vv) |
| 4706 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4102 | #endif | |
| 4707 | 4103 | |
| 4708 | #if __HVX_ARCH__ >= 68 | |
| 4104 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4709 | 4105 | /* ========================================================================== |
| 4710 | 4106 | Assembly Syntax: Vd32.hf=vfmin(Vu32.hf,Vv32.hf) |
| 4711 | 4107 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfmin_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4714,9 +4110,9 @@ |
| 4714 | 4110 | ========================================================================== */ |
| 4715 | 4111 | |
| 4716 | 4112 | #define Q6_Vhf_vfmin_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_hf)(Vu,Vv) |
| 4717 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4113 | #endif | |
| 4718 | 4114 | |
| 4719 | #if __HVX_ARCH__ >= 68 | |
| 4115 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4720 | 4116 | /* ========================================================================== |
| 4721 | 4117 | Assembly Syntax: Vd32.sf=vfmin(Vu32.sf,Vv32.sf) |
| 4722 | 4118 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfmin_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4725,9 +4121,9 @@ |
| 4725 | 4121 | ========================================================================== */ |
| 4726 | 4122 | |
| 4727 | 4123 | #define Q6_Vsf_vfmin_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_sf)(Vu,Vv) |
| 4728 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4124 | #endif | |
| 4729 | 4125 | |
| 4730 | #if __HVX_ARCH__ >= 68 | |
| 4126 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4731 | 4127 | /* ========================================================================== |
| 4732 | 4128 | Assembly Syntax: Vd32.hf=vfneg(Vu32.hf) |
| 4733 | 4129 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vfneg_Vhf(HVX_Vector Vu) |
| ... | ... | @@ -4736,9 +4132,9 @@ |
| 4736 | 4132 | ========================================================================== */ |
| 4737 | 4133 | |
| 4738 | 4134 | #define Q6_Vhf_vfneg_Vhf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_hf)(Vu) |
| 4739 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4135 | #endif | |
| 4740 | 4136 | |
| 4741 | #if __HVX_ARCH__ >= 68 | |
| 4137 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4742 | 4138 | /* ========================================================================== |
| 4743 | 4139 | Assembly Syntax: Vd32.sf=vfneg(Vu32.sf) |
| 4744 | 4140 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vfneg_Vsf(HVX_Vector Vu) |
| ... | ... | @@ -4747,7 +4143,7 @@ |
| 4747 | 4143 | ========================================================================== */ |
| 4748 | 4144 | |
| 4749 | 4145 | #define Q6_Vsf_vfneg_Vsf(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_sf)(Vu) |
| 4750 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4146 | #endif | |
| 4751 | 4147 | |
| 4752 | 4148 | #if __HVX_ARCH__ >= 68 |
| 4753 | 4149 | /* ========================================================================== |
| ... | ... | @@ -4758,7 +4154,7 @@ |
| 4758 | 4154 | ========================================================================== */ |
| 4759 | 4155 | |
| 4760 | 4156 | #define Q6_Q_vcmp_gt_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf)(Vu,Vv)),-1) |
| 4761 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4157 | #endif | |
| 4762 | 4158 | |
| 4763 | 4159 | #if __HVX_ARCH__ >= 68 |
| 4764 | 4160 | /* ========================================================================== |
| ... | ... | @@ -4769,7 +4165,7 @@ |
| 4769 | 4165 | ========================================================================== */ |
| 4770 | 4166 | |
| 4771 | 4167 | #define Q6_Q_vcmp_gtand_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 4772 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4168 | #endif | |
| 4773 | 4169 | |
| 4774 | 4170 | #if __HVX_ARCH__ >= 68 |
| 4775 | 4171 | /* ========================================================================== |
| ... | ... | @@ -4780,7 +4176,7 @@ |
| 4780 | 4176 | ========================================================================== */ |
| 4781 | 4177 | |
| 4782 | 4178 | #define Q6_Q_vcmp_gtor_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 4783 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4179 | #endif | |
| 4784 | 4180 | |
| 4785 | 4181 | #if __HVX_ARCH__ >= 68 |
| 4786 | 4182 | /* ========================================================================== |
| ... | ... | @@ -4791,7 +4187,7 @@ |
| 4791 | 4187 | ========================================================================== */ |
| 4792 | 4188 | |
| 4793 | 4189 | #define Q6_Q_vcmp_gtxacc_QVhfVhf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgthf_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 4794 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4190 | #endif | |
| 4795 | 4191 | |
| 4796 | 4192 | #if __HVX_ARCH__ >= 68 |
| 4797 | 4193 | /* ========================================================================== |
| ... | ... | @@ -4802,7 +4198,7 @@ |
| 4802 | 4198 | ========================================================================== */ |
| 4803 | 4199 | |
| 4804 | 4200 | #define Q6_Q_vcmp_gt_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf)(Vu,Vv)),-1) |
| 4805 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4201 | #endif | |
| 4806 | 4202 | |
| 4807 | 4203 | #if __HVX_ARCH__ >= 68 |
| 4808 | 4204 | /* ========================================================================== |
| ... | ... | @@ -4813,7 +4209,7 @@ |
| 4813 | 4209 | ========================================================================== */ |
| 4814 | 4210 | |
| 4815 | 4211 | #define Q6_Q_vcmp_gtand_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_and)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 4816 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4212 | #endif | |
| 4817 | 4213 | |
| 4818 | 4214 | #if __HVX_ARCH__ >= 68 |
| 4819 | 4215 | /* ========================================================================== |
| ... | ... | @@ -4824,7 +4220,7 @@ |
| 4824 | 4220 | ========================================================================== */ |
| 4825 | 4221 | |
| 4826 | 4222 | #define Q6_Q_vcmp_gtor_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_or)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 4827 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4223 | #endif | |
| 4828 | 4224 | |
| 4829 | 4225 | #if __HVX_ARCH__ >= 68 |
| 4830 | 4226 | /* ========================================================================== |
| ... | ... | @@ -4835,7 +4231,7 @@ |
| 4835 | 4231 | ========================================================================== */ |
| 4836 | 4232 | |
| 4837 | 4233 | #define Q6_Q_vcmp_gtxacc_QVsfVsf(Qx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtsf_xor)(__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx),-1),Vu,Vv)),-1) |
| 4838 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4234 | #endif | |
| 4839 | 4235 | |
| 4840 | 4236 | #if __HVX_ARCH__ >= 68 |
| 4841 | 4237 | /* ========================================================================== |
| ... | ... | @@ -4846,7 +4242,7 @@ |
| 4846 | 4242 | ========================================================================== */ |
| 4847 | 4243 | |
| 4848 | 4244 | #define Q6_Vhf_vmax_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_hf)(Vu,Vv) |
| 4849 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4245 | #endif | |
| 4850 | 4246 | |
| 4851 | 4247 | #if __HVX_ARCH__ >= 68 |
| 4852 | 4248 | /* ========================================================================== |
| ... | ... | @@ -4857,7 +4253,7 @@ |
| 4857 | 4253 | ========================================================================== */ |
| 4858 | 4254 | |
| 4859 | 4255 | #define Q6_Vsf_vmax_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_sf)(Vu,Vv) |
| 4860 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4256 | #endif | |
| 4861 | 4257 | |
| 4862 | 4258 | #if __HVX_ARCH__ >= 68 |
| 4863 | 4259 | /* ========================================================================== |
| ... | ... | @@ -4868,7 +4264,7 @@ |
| 4868 | 4264 | ========================================================================== */ |
| 4869 | 4265 | |
| 4870 | 4266 | #define Q6_Vhf_vmin_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_hf)(Vu,Vv) |
| 4871 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4267 | #endif | |
| 4872 | 4268 | |
| 4873 | 4269 | #if __HVX_ARCH__ >= 68 |
| 4874 | 4270 | /* ========================================================================== |
| ... | ... | @@ -4879,9 +4275,9 @@ |
| 4879 | 4275 | ========================================================================== */ |
| 4880 | 4276 | |
| 4881 | 4277 | #define Q6_Vsf_vmin_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_sf)(Vu,Vv) |
| 4882 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4278 | #endif | |
| 4883 | 4279 | |
| 4884 | #if __HVX_ARCH__ >= 68 | |
| 4280 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4885 | 4281 | /* ========================================================================== |
| 4886 | 4282 | Assembly Syntax: Vd32.hf=vmpy(Vu32.hf,Vv32.hf) |
| 4887 | 4283 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4890,9 +4286,9 @@ |
| 4890 | 4286 | ========================================================================== */ |
| 4891 | 4287 | |
| 4892 | 4288 | #define Q6_Vhf_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_hf)(Vu,Vv) |
| 4893 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4289 | #endif | |
| 4894 | 4290 | |
| 4895 | #if __HVX_ARCH__ >= 68 | |
| 4291 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4896 | 4292 | /* ========================================================================== |
| 4897 | 4293 | Assembly Syntax: Vx32.hf+=vmpy(Vu32.hf,Vv32.hf) |
| 4898 | 4294 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vmpyacc_VhfVhfVhf(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -4901,7 +4297,7 @@ |
| 4901 | 4297 | ========================================================================== */ |
| 4902 | 4298 | |
| 4903 | 4299 | #define Q6_Vhf_vmpyacc_VhfVhfVhf(Vx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_hf_acc)(Vx,Vu,Vv) |
| 4904 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4300 | #endif | |
| 4905 | 4301 | |
| 4906 | 4302 | #if __HVX_ARCH__ >= 68 |
| 4907 | 4303 | /* ========================================================================== |
| ... | ... | @@ -4912,7 +4308,7 @@ |
| 4912 | 4308 | ========================================================================== */ |
| 4913 | 4309 | |
| 4914 | 4310 | #define Q6_Vqf16_vmpy_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16)(Vu,Vv) |
| 4915 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4311 | #endif | |
| 4916 | 4312 | |
| 4917 | 4313 | #if __HVX_ARCH__ >= 68 |
| 4918 | 4314 | /* ========================================================================== |
| ... | ... | @@ -4923,7 +4319,7 @@ |
| 4923 | 4319 | ========================================================================== */ |
| 4924 | 4320 | |
| 4925 | 4321 | #define Q6_Vqf16_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16_hf)(Vu,Vv) |
| 4926 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4322 | #endif | |
| 4927 | 4323 | |
| 4928 | 4324 | #if __HVX_ARCH__ >= 68 |
| 4929 | 4325 | /* ========================================================================== |
| ... | ... | @@ -4934,7 +4330,7 @@ |
| 4934 | 4330 | ========================================================================== */ |
| 4935 | 4331 | |
| 4936 | 4332 | #define Q6_Vqf16_vmpy_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf16_mix_hf)(Vu,Vv) |
| 4937 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4333 | #endif | |
| 4938 | 4334 | |
| 4939 | 4335 | #if __HVX_ARCH__ >= 68 |
| 4940 | 4336 | /* ========================================================================== |
| ... | ... | @@ -4945,7 +4341,7 @@ |
| 4945 | 4341 | ========================================================================== */ |
| 4946 | 4342 | |
| 4947 | 4343 | #define Q6_Vqf32_vmpy_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32)(Vu,Vv) |
| 4948 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4344 | #endif | |
| 4949 | 4345 | |
| 4950 | 4346 | #if __HVX_ARCH__ >= 68 |
| 4951 | 4347 | /* ========================================================================== |
| ... | ... | @@ -4956,7 +4352,7 @@ |
| 4956 | 4352 | ========================================================================== */ |
| 4957 | 4353 | |
| 4958 | 4354 | #define Q6_Wqf32_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_hf)(Vu,Vv) |
| 4959 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4355 | #endif | |
| 4960 | 4356 | |
| 4961 | 4357 | #if __HVX_ARCH__ >= 68 |
| 4962 | 4358 | /* ========================================================================== |
| ... | ... | @@ -4967,7 +4363,7 @@ |
| 4967 | 4363 | ========================================================================== */ |
| 4968 | 4364 | |
| 4969 | 4365 | #define Q6_Wqf32_vmpy_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_mix_hf)(Vu,Vv) |
| 4970 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4366 | #endif | |
| 4971 | 4367 | |
| 4972 | 4368 | #if __HVX_ARCH__ >= 68 |
| 4973 | 4369 | /* ========================================================================== |
| ... | ... | @@ -4978,7 +4374,7 @@ |
| 4978 | 4374 | ========================================================================== */ |
| 4979 | 4375 | |
| 4980 | 4376 | #define Q6_Wqf32_vmpy_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_qf16)(Vu,Vv) |
| 4981 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4377 | #endif | |
| 4982 | 4378 | |
| 4983 | 4379 | #if __HVX_ARCH__ >= 68 |
| 4984 | 4380 | /* ========================================================================== |
| ... | ... | @@ -4989,9 +4385,9 @@ |
| 4989 | 4385 | ========================================================================== */ |
| 4990 | 4386 | |
| 4991 | 4387 | #define Q6_Vqf32_vmpy_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_qf32_sf)(Vu,Vv) |
| 4992 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4388 | #endif | |
| 4993 | 4389 | |
| 4994 | #if __HVX_ARCH__ >= 68 | |
| 4390 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 4995 | 4391 | /* ========================================================================== |
| 4996 | 4392 | Assembly Syntax: Vdd32.sf=vmpy(Vu32.hf,Vv32.hf) |
| 4997 | 4393 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpy_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -5000,9 +4396,9 @@ |
| 5000 | 4396 | ========================================================================== */ |
| 5001 | 4397 | |
| 5002 | 4398 | #define Q6_Wsf_vmpy_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_hf)(Vu,Vv) |
| 5003 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4399 | #endif | |
| 5004 | 4400 | |
| 5005 | #if __HVX_ARCH__ >= 68 | |
| 4401 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 5006 | 4402 | /* ========================================================================== |
| 5007 | 4403 | Assembly Syntax: Vxx32.sf+=vmpy(Vu32.hf,Vv32.hf) |
| 5008 | 4404 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpyacc_WsfVhfVhf(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -5011,9 +4407,9 @@ |
| 5011 | 4407 | ========================================================================== */ |
| 5012 | 4408 | |
| 5013 | 4409 | #define Q6_Wsf_vmpyacc_WsfVhfVhf(Vxx,Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_hf_acc)(Vxx,Vu,Vv) |
| 5014 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4410 | #endif | |
| 5015 | 4411 | |
| 5016 | #if __HVX_ARCH__ >= 68 | |
| 4412 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 5017 | 4413 | /* ========================================================================== |
| 5018 | 4414 | Assembly Syntax: Vd32.sf=vmpy(Vu32.sf,Vv32.sf) |
| 5019 | 4415 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vmpy_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -5022,7 +4418,7 @@ |
| 5022 | 4418 | ========================================================================== */ |
| 5023 | 4419 | |
| 5024 | 4420 | #define Q6_Vsf_vmpy_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_sf)(Vu,Vv) |
| 5025 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4421 | #endif | |
| 5026 | 4422 | |
| 5027 | 4423 | #if __HVX_ARCH__ >= 68 |
| 5028 | 4424 | /* ========================================================================== |
| ... | ... | @@ -5033,9 +4429,9 @@ |
| 5033 | 4429 | ========================================================================== */ |
| 5034 | 4430 | |
| 5035 | 4431 | #define Q6_Vqf16_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf)(Vu,Vv) |
| 5036 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4432 | #endif | |
| 5037 | 4433 | |
| 5038 | #if __HVX_ARCH__ >= 68 | |
| 4434 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 5039 | 4435 | /* ========================================================================== |
| 5040 | 4436 | Assembly Syntax: Vd32.hf=vsub(Vu32.hf,Vv32.hf) |
| 5041 | 4437 | C Intrinsic Prototype: HVX_Vector Q6_Vhf_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -5044,7 +4440,7 @@ |
| 5044 | 4440 | ========================================================================== */ |
| 5045 | 4441 | |
| 5046 | 4442 | #define Q6_Vhf_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_hf)(Vu,Vv) |
| 5047 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4443 | #endif | |
| 5048 | 4444 | |
| 5049 | 4445 | #if __HVX_ARCH__ >= 68 |
| 5050 | 4446 | /* ========================================================================== |
| ... | ... | @@ -5055,7 +4451,7 @@ |
| 5055 | 4451 | ========================================================================== */ |
| 5056 | 4452 | |
| 5057 | 4453 | #define Q6_Vqf16_vsub_Vqf16Vqf16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf16)(Vu,Vv) |
| 5058 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4454 | #endif | |
| 5059 | 4455 | |
| 5060 | 4456 | #if __HVX_ARCH__ >= 68 |
| 5061 | 4457 | /* ========================================================================== |
| ... | ... | @@ -5066,7 +4462,7 @@ |
| 5066 | 4462 | ========================================================================== */ |
| 5067 | 4463 | |
| 5068 | 4464 | #define Q6_Vqf16_vsub_Vqf16Vhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf16_mix)(Vu,Vv) |
| 5069 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4465 | #endif | |
| 5070 | 4466 | |
| 5071 | 4467 | #if __HVX_ARCH__ >= 68 |
| 5072 | 4468 | /* ========================================================================== |
| ... | ... | @@ -5077,7 +4473,7 @@ |
| 5077 | 4473 | ========================================================================== */ |
| 5078 | 4474 | |
| 5079 | 4475 | #define Q6_Vqf32_vsub_Vqf32Vqf32(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf32)(Vu,Vv) |
| 5080 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4476 | #endif | |
| 5081 | 4477 | |
| 5082 | 4478 | #if __HVX_ARCH__ >= 68 |
| 5083 | 4479 | /* ========================================================================== |
| ... | ... | @@ -5088,7 +4484,7 @@ |
| 5088 | 4484 | ========================================================================== */ |
| 5089 | 4485 | |
| 5090 | 4486 | #define Q6_Vqf32_vsub_Vqf32Vsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_qf32_mix)(Vu,Vv) |
| 5091 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4487 | #endif | |
| 5092 | 4488 | |
| 5093 | 4489 | #if __HVX_ARCH__ >= 68 |
| 5094 | 4490 | /* ========================================================================== |
| ... | ... | @@ -5099,9 +4495,9 @@ |
| 5099 | 4495 | ========================================================================== */ |
| 5100 | 4496 | |
| 5101 | 4497 | #define Q6_Vqf32_vsub_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf)(Vu,Vv) |
| 5102 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4498 | #endif | |
| 5103 | 4499 | |
| 5104 | #if __HVX_ARCH__ >= 68 | |
| 4500 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 5105 | 4501 | /* ========================================================================== |
| 5106 | 4502 | Assembly Syntax: Vdd32.sf=vsub(Vu32.hf,Vv32.hf) |
| 5107 | 4503 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vsub_VhfVhf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -5110,9 +4506,9 @@ |
| 5110 | 4506 | ========================================================================== */ |
| 5111 | 4507 | |
| 5112 | 4508 | #define Q6_Wsf_vsub_VhfVhf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_hf)(Vu,Vv) |
| 5113 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4509 | #endif | |
| 5114 | 4510 | |
| 5115 | #if __HVX_ARCH__ >= 68 | |
| 4511 | #if __HVX_ARCH__ >= 68 && defined __HVX_IEEE_FP__ | |
| 5116 | 4512 | /* ========================================================================== |
| 5117 | 4513 | Assembly Syntax: Vd32.sf=vsub(Vu32.sf,Vv32.sf) |
| 5118 | 4514 | C Intrinsic Prototype: HVX_Vector Q6_Vsf_vsub_VsfVsf(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -5121,7 +4517,7 @@ |
| 5121 | 4517 | ========================================================================== */ |
| 5122 | 4518 | |
| 5123 | 4519 | #define Q6_Vsf_vsub_VsfVsf(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_sf)(Vu,Vv) |
| 5124 | #endif /* __HEXAGON_ARCH___ >= 68 */ | |
| 4520 | #endif | |
| 5125 | 4521 | |
| 5126 | 4522 | #if __HVX_ARCH__ >= 69 |
| 5127 | 4523 | /* ========================================================================== |
| ... | ... | @@ -5132,7 +4528,7 @@ |
| 5132 | 4528 | ========================================================================== */ |
| 5133 | 4529 | |
| 5134 | 4530 | #define Q6_Vub_vasr_WuhVub_rnd_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvuhubrndsat)(Vuu,Vv) |
| 5135 | #endif /* __HEXAGON_ARCH___ >= 69 */ | |
| 4531 | #endif | |
| 5136 | 4532 | |
| 5137 | 4533 | #if __HVX_ARCH__ >= 69 |
| 5138 | 4534 | /* ========================================================================== |
| ... | ... | @@ -5143,7 +4539,7 @@ |
| 5143 | 4539 | ========================================================================== */ |
| 5144 | 4540 | |
| 5145 | 4541 | #define Q6_Vub_vasr_WuhVub_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvuhubsat)(Vuu,Vv) |
| 5146 | #endif /* __HEXAGON_ARCH___ >= 69 */ | |
| 4542 | #endif | |
| 5147 | 4543 | |
| 5148 | 4544 | #if __HVX_ARCH__ >= 69 |
| 5149 | 4545 | /* ========================================================================== |
| ... | ... | @@ -5154,7 +4550,7 @@ |
| 5154 | 4550 | ========================================================================== */ |
| 5155 | 4551 | |
| 5156 | 4552 | #define Q6_Vuh_vasr_WwVuh_rnd_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvwuhrndsat)(Vuu,Vv) |
| 5157 | #endif /* __HEXAGON_ARCH___ >= 69 */ | |
| 4553 | #endif | |
| 5158 | 4554 | |
| 5159 | 4555 | #if __HVX_ARCH__ >= 69 |
| 5160 | 4556 | /* ========================================================================== |
| ... | ... | @@ -5165,7 +4561,7 @@ |
| 5165 | 4561 | ========================================================================== */ |
| 5166 | 4562 | |
| 5167 | 4563 | #define Q6_Vuh_vasr_WwVuh_sat(Vuu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrvwuhsat)(Vuu,Vv) |
| 5168 | #endif /* __HEXAGON_ARCH___ >= 69 */ | |
| 4564 | #endif | |
| 5169 | 4565 | |
| 5170 | 4566 | #if __HVX_ARCH__ >= 69 |
| 5171 | 4567 | /* ========================================================================== |
| ... | ... | @@ -5176,9 +4572,9 @@ |
| 5176 | 4572 | ========================================================================== */ |
| 5177 | 4573 | |
| 5178 | 4574 | #define Q6_Vuh_vmpy_VuhVuh_rs16(Vu,Vv) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhvs)(Vu,Vv) |
| 5179 | #endif /* __HEXAGON_ARCH___ >= 69 */ | |
| 4575 | #endif | |
| 5180 | 4576 | |
| 5181 | #if __HVX_ARCH__ >= 73 | |
| 4577 | #if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__ | |
| 5182 | 4578 | /* ========================================================================== |
| 5183 | 4579 | Assembly Syntax: Vdd32.sf=vadd(Vu32.bf,Vv32.bf) |
| 5184 | 4580 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vadd_VbfVbf(HVX_Vector Vu, |
| ... | ... | @@ -5187,7 +4583,7 @@ |
| 5187 | 4583 | |
| 5188 | 4584 | #define Q6_Wsf_vadd_VbfVbf(Vu, Vv) \ |
| 5189 | 4585 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_sf_bf)(Vu, Vv) |
| 5190 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4586 | #endif | |
| 5191 | 4587 | |
| 5192 | 4588 | #if __HVX_ARCH__ >= 73 |
| 5193 | 4589 | /* ========================================================================== |
| ... | ... | @@ -5199,7 +4595,7 @@ |
| 5199 | 4595 | |
| 5200 | 4596 | #define Q6_Vh_equals_Vhf(Vu) \ |
| 5201 | 4597 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_h_hf)(Vu) |
| 5202 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4598 | #endif | |
| 5203 | 4599 | |
| 5204 | 4600 | #if __HVX_ARCH__ >= 73 |
| 5205 | 4601 | /* ========================================================================== |
| ... | ... | @@ -5211,7 +4607,7 @@ |
| 5211 | 4607 | |
| 5212 | 4608 | #define Q6_Vhf_equals_Vh(Vu) \ |
| 5213 | 4609 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_hf_h)(Vu) |
| 5214 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4610 | #endif | |
| 5215 | 4611 | |
| 5216 | 4612 | #if __HVX_ARCH__ >= 73 |
| 5217 | 4613 | /* ========================================================================== |
| ... | ... | @@ -5223,7 +4619,7 @@ |
| 5223 | 4619 | |
| 5224 | 4620 | #define Q6_Vsf_equals_Vw(Vu) \ |
| 5225 | 4621 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_sf_w)(Vu) |
| 5226 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4622 | #endif | |
| 5227 | 4623 | |
| 5228 | 4624 | #if __HVX_ARCH__ >= 73 |
| 5229 | 4625 | /* ========================================================================== |
| ... | ... | @@ -5235,9 +4631,9 @@ |
| 5235 | 4631 | |
| 5236 | 4632 | #define Q6_Vw_equals_Vsf(Vu) \ |
| 5237 | 4633 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_w_sf)(Vu) |
| 5238 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4634 | #endif | |
| 5239 | 4635 | |
| 5240 | #if __HVX_ARCH__ >= 73 | |
| 4636 | #if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__ | |
| 5241 | 4637 | /* ========================================================================== |
| 5242 | 4638 | Assembly Syntax: Vd32.bf=vcvt(Vu32.sf,Vv32.sf) |
| 5243 | 4639 | C Intrinsic Prototype: HVX_Vector Q6_Vbf_vcvt_VsfVsf(HVX_Vector Vu, |
| ... | ... | @@ -5246,7 +4642,7 @@ |
| 5246 | 4642 | |
| 5247 | 4643 | #define Q6_Vbf_vcvt_VsfVsf(Vu, Vv) \ |
| 5248 | 4644 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_bf_sf)(Vu, Vv) |
| 5249 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4645 | #endif | |
| 5250 | 4646 | |
| 5251 | 4647 | #if __HVX_ARCH__ >= 73 |
| 5252 | 4648 | /* ========================================================================== |
| ... | ... | @@ -5258,7 +4654,7 @@ |
| 5258 | 4654 | #define Q6_Q_vcmp_gt_VbfVbf(Vu, Vv) \ |
| 5259 | 4655 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt) \ |
| 5260 | 4656 | ((__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtbf)(Vu, Vv)), -1) |
| 5261 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4657 | #endif | |
| 5262 | 4658 | |
| 5263 | 4659 | #if __HVX_ARCH__ >= 73 |
| 5264 | 4660 | /* ========================================================================== |
| ... | ... | @@ -5274,7 +4670,7 @@ |
| 5274 | 4670 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ |
| 5275 | 4671 | Vv)), \ |
| 5276 | 4672 | -1) |
| 5277 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4673 | #endif | |
| 5278 | 4674 | |
| 5279 | 4675 | #if __HVX_ARCH__ >= 73 |
| 5280 | 4676 | /* ========================================================================== |
| ... | ... | @@ -5290,7 +4686,7 @@ |
| 5290 | 4686 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ |
| 5291 | 4687 | Vv)), \ |
| 5292 | 4688 | -1) |
| 5293 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4689 | #endif | |
| 5294 | 4690 | |
| 5295 | 4691 | #if __HVX_ARCH__ >= 73 |
| 5296 | 4692 | /* ========================================================================== |
| ... | ... | @@ -5306,9 +4702,9 @@ |
| 5306 | 4702 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ |
| 5307 | 4703 | Vv)), \ |
| 5308 | 4704 | -1) |
| 5309 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4705 | #endif | |
| 5310 | 4706 | |
| 5311 | #if __HVX_ARCH__ >= 73 | |
| 4707 | #if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__ | |
| 5312 | 4708 | /* ========================================================================== |
| 5313 | 4709 | Assembly Syntax: Vd32.bf=vmax(Vu32.bf,Vv32.bf) |
| 5314 | 4710 | C Intrinsic Prototype: HVX_Vector Q6_Vbf_vmax_VbfVbf(HVX_Vector Vu, |
| ... | ... | @@ -5317,9 +4713,9 @@ |
| 5317 | 4713 | |
| 5318 | 4714 | #define Q6_Vbf_vmax_VbfVbf(Vu, Vv) \ |
| 5319 | 4715 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmax_bf)(Vu, Vv) |
| 5320 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4716 | #endif | |
| 5321 | 4717 | |
| 5322 | #if __HVX_ARCH__ >= 73 | |
| 4718 | #if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__ | |
| 5323 | 4719 | /* ========================================================================== |
| 5324 | 4720 | Assembly Syntax: Vd32.bf=vmin(Vu32.bf,Vv32.bf) |
| 5325 | 4721 | C Intrinsic Prototype: HVX_Vector Q6_Vbf_vmin_VbfVbf(HVX_Vector Vu, |
| ... | ... | @@ -5328,9 +4724,9 @@ |
| 5328 | 4724 | |
| 5329 | 4725 | #define Q6_Vbf_vmin_VbfVbf(Vu, Vv) \ |
| 5330 | 4726 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmin_bf)(Vu, Vv) |
| 5331 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4727 | #endif | |
| 5332 | 4728 | |
| 5333 | #if __HVX_ARCH__ >= 73 | |
| 4729 | #if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__ | |
| 5334 | 4730 | /* ========================================================================== |
| 5335 | 4731 | Assembly Syntax: Vdd32.sf=vmpy(Vu32.bf,Vv32.bf) |
| 5336 | 4732 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpy_VbfVbf(HVX_Vector Vu, |
| ... | ... | @@ -5339,9 +4735,9 @@ |
| 5339 | 4735 | |
| 5340 | 4736 | #define Q6_Wsf_vmpy_VbfVbf(Vu, Vv) \ |
| 5341 | 4737 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_bf)(Vu, Vv) |
| 5342 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4738 | #endif | |
| 5343 | 4739 | |
| 5344 | #if __HVX_ARCH__ >= 73 | |
| 4740 | #if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__ | |
| 5345 | 4741 | /* ========================================================================== |
| 5346 | 4742 | Assembly Syntax: Vxx32.sf+=vmpy(Vu32.bf,Vv32.bf) |
| 5347 | 4743 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vmpyacc_WsfVbfVbf(HVX_VectorPair |
| ... | ... | @@ -5351,9 +4747,9 @@ |
| 5351 | 4747 | |
| 5352 | 4748 | #define Q6_Wsf_vmpyacc_WsfVbfVbf(Vxx, Vu, Vv) \ |
| 5353 | 4749 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_sf_bf_acc)(Vxx, Vu, Vv) |
| 5354 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4750 | #endif | |
| 5355 | 4751 | |
| 5356 | #if __HVX_ARCH__ >= 73 | |
| 4752 | #if __HVX_ARCH__ >= 73 && defined __HVX_IEEE_FP__ | |
| 5357 | 4753 | /* ========================================================================== |
| 5358 | 4754 | Assembly Syntax: Vdd32.sf=vsub(Vu32.bf,Vv32.bf) |
| 5359 | 4755 | C Intrinsic Prototype: HVX_VectorPair Q6_Wsf_vsub_VbfVbf(HVX_Vector Vu, |
| ... | ... | @@ -5362,7 +4758,7 @@ |
| 5362 | 4758 | |
| 5363 | 4759 | #define Q6_Wsf_vsub_VbfVbf(Vu, Vv) \ |
| 5364 | 4760 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_bf)(Vu, Vv) |
| 5365 | #endif /* __HEXAGON_ARCH___ >= 73 */ | |
| 4761 | #endif | |
| 5366 | 4762 | |
| 5367 | 4763 | #if __HVX_ARCH__ >= 79 |
| 5368 | 4764 | /* ========================================================================== |
| ... | ... | @@ -5374,7 +4770,7 @@ |
| 5374 | 4770 | |
| 5375 | 4771 | #define Q6_V_vgetqfext_VR(Vu, Rt) \ |
| 5376 | 4772 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_get_qfext)(Vu, Rt) |
| 5377 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4773 | #endif | |
| 5378 | 4774 | |
| 5379 | 4775 | #if __HVX_ARCH__ >= 79 |
| 5380 | 4776 | /* ========================================================================== |
| ... | ... | @@ -5386,7 +4782,7 @@ |
| 5386 | 4782 | |
| 5387 | 4783 | #define Q6_V_vgetqfextor_VVR(Vx, Vu, Rt) \ |
| 5388 | 4784 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_get_qfext_oracc)(Vx, Vu, Rt) |
| 5389 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4785 | #endif | |
| 5390 | 4786 | |
| 5391 | 4787 | #if __HVX_ARCH__ >= 79 |
| 5392 | 4788 | /* ========================================================================== |
| ... | ... | @@ -5398,9 +4794,9 @@ |
| 5398 | 4794 | |
| 5399 | 4795 | #define Q6_V_vsetqfext_VR(Vu, Rt) \ |
| 5400 | 4796 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_set_qfext)(Vu, Rt) |
| 5401 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4797 | #endif | |
| 5402 | 4798 | |
| 5403 | #if __HVX_ARCH__ >= 79 | |
| 4799 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5404 | 4800 | /* ========================================================================== |
| 5405 | 4801 | Assembly Syntax: Vd32.f8=vabs(Vu32.f8) |
| 5406 | 4802 | C Intrinsic Prototype: HVX_Vector Q6_V_vabs_V(HVX_Vector Vu) |
| ... | ... | @@ -5409,9 +4805,9 @@ |
| 5409 | 4805 | ========================================================================== */ |
| 5410 | 4806 | |
| 5411 | 4807 | #define Q6_V_vabs_V(Vu) __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_f8)(Vu) |
| 5412 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4808 | #endif | |
| 5413 | 4809 | |
| 5414 | #if __HVX_ARCH__ >= 79 | |
| 4810 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5415 | 4811 | /* ========================================================================== |
| 5416 | 4812 | Assembly Syntax: Vdd32.hf=vadd(Vu32.f8,Vv32.f8) |
| 5417 | 4813 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vadd_VV(HVX_Vector Vu, |
| ... | ... | @@ -5420,9 +4816,9 @@ |
| 5420 | 4816 | |
| 5421 | 4817 | #define Q6_Whf_vadd_VV(Vu, Vv) \ |
| 5422 | 4818 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadd_hf_f8)(Vu, Vv) |
| 5423 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4819 | #endif | |
| 5424 | 4820 | |
| 5425 | #if __HVX_ARCH__ >= 79 | |
| 4821 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5426 | 4822 | /* ========================================================================== |
| 5427 | 4823 | Assembly Syntax: Vd32.b=vcvt2(Vu32.hf,Vv32.hf) |
| 5428 | 4824 | C Intrinsic Prototype: HVX_Vector Q6_Vb_vcvt2_VhfVhf(HVX_Vector Vu, |
| ... | ... | @@ -5431,9 +4827,9 @@ |
| 5431 | 4827 | |
| 5432 | 4828 | #define Q6_Vb_vcvt2_VhfVhf(Vu, Vv) \ |
| 5433 | 4829 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_b_hf)(Vu, Vv) |
| 5434 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4830 | #endif | |
| 5435 | 4831 | |
| 5436 | #if __HVX_ARCH__ >= 79 | |
| 4832 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5437 | 4833 | /* ========================================================================== |
| 5438 | 4834 | Assembly Syntax: Vdd32.hf=vcvt2(Vu32.b) |
| 5439 | 4835 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt2_Vb(HVX_Vector Vu) |
| ... | ... | @@ -5443,9 +4839,9 @@ |
| 5443 | 4839 | |
| 5444 | 4840 | #define Q6_Whf_vcvt2_Vb(Vu) \ |
| 5445 | 4841 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_hf_b)(Vu) |
| 5446 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4842 | #endif | |
| 5447 | 4843 | |
| 5448 | #if __HVX_ARCH__ >= 79 | |
| 4844 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5449 | 4845 | /* ========================================================================== |
| 5450 | 4846 | Assembly Syntax: Vdd32.hf=vcvt2(Vu32.ub) |
| 5451 | 4847 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt2_Vub(HVX_Vector Vu) |
| ... | ... | @@ -5455,9 +4851,9 @@ |
| 5455 | 4851 | |
| 5456 | 4852 | #define Q6_Whf_vcvt2_Vub(Vu) \ |
| 5457 | 4853 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_hf_ub)(Vu) |
| 5458 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4854 | #endif | |
| 5459 | 4855 | |
| 5460 | #if __HVX_ARCH__ >= 79 | |
| 4856 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5461 | 4857 | /* ========================================================================== |
| 5462 | 4858 | Assembly Syntax: Vd32.ub=vcvt2(Vu32.hf,Vv32.hf) |
| 5463 | 4859 | C Intrinsic Prototype: HVX_Vector Q6_Vub_vcvt2_VhfVhf(HVX_Vector Vu, |
| ... | ... | @@ -5466,9 +4862,9 @@ |
| 5466 | 4862 | |
| 5467 | 4863 | #define Q6_Vub_vcvt2_VhfVhf(Vu, Vv) \ |
| 5468 | 4864 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt2_ub_hf)(Vu, Vv) |
| 5469 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4865 | #endif | |
| 5470 | 4866 | |
| 5471 | #if __HVX_ARCH__ >= 79 | |
| 4867 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5472 | 4868 | /* ========================================================================== |
| 5473 | 4869 | Assembly Syntax: Vd32.f8=vcvt(Vu32.hf,Vv32.hf) |
| 5474 | 4870 | C Intrinsic Prototype: HVX_Vector Q6_V_vcvt_VhfVhf(HVX_Vector Vu, HVX_Vector |
| ... | ... | @@ -5477,9 +4873,9 @@ |
| 5477 | 4873 | |
| 5478 | 4874 | #define Q6_V_vcvt_VhfVhf(Vu, Vv) \ |
| 5479 | 4875 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_f8_hf)(Vu, Vv) |
| 5480 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4876 | #endif | |
| 5481 | 4877 | |
| 5482 | #if __HVX_ARCH__ >= 79 | |
| 4878 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5483 | 4879 | /* ========================================================================== |
| 5484 | 4880 | Assembly Syntax: Vdd32.hf=vcvt(Vu32.f8) |
| 5485 | 4881 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vcvt_V(HVX_Vector Vu) |
| ... | ... | @@ -5489,9 +4885,9 @@ |
| 5489 | 4885 | |
| 5490 | 4886 | #define Q6_Whf_vcvt_V(Vu) \ |
| 5491 | 4887 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcvt_hf_f8)(Vu) |
| 5492 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4888 | #endif | |
| 5493 | 4889 | |
| 5494 | #if __HVX_ARCH__ >= 79 | |
| 4890 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5495 | 4891 | /* ========================================================================== |
| 5496 | 4892 | Assembly Syntax: Vd32.f8=vfmax(Vu32.f8,Vv32.f8) |
| 5497 | 4893 | C Intrinsic Prototype: HVX_Vector Q6_V_vfmax_VV(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -5501,9 +4897,9 @@ |
| 5501 | 4897 | |
| 5502 | 4898 | #define Q6_V_vfmax_VV(Vu, Vv) \ |
| 5503 | 4899 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmax_f8)(Vu, Vv) |
| 5504 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4900 | #endif | |
| 5505 | 4901 | |
| 5506 | #if __HVX_ARCH__ >= 79 | |
| 4902 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5507 | 4903 | /* ========================================================================== |
| 5508 | 4904 | Assembly Syntax: Vd32.f8=vfmin(Vu32.f8,Vv32.f8) |
| 5509 | 4905 | C Intrinsic Prototype: HVX_Vector Q6_V_vfmin_VV(HVX_Vector Vu, HVX_Vector Vv) |
| ... | ... | @@ -5513,9 +4909,9 @@ |
| 5513 | 4909 | |
| 5514 | 4910 | #define Q6_V_vfmin_VV(Vu, Vv) \ |
| 5515 | 4911 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfmin_f8)(Vu, Vv) |
| 5516 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4912 | #endif | |
| 5517 | 4913 | |
| 5518 | #if __HVX_ARCH__ >= 79 | |
| 4914 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5519 | 4915 | /* ========================================================================== |
| 5520 | 4916 | Assembly Syntax: Vd32.f8=vfneg(Vu32.f8) |
| 5521 | 4917 | C Intrinsic Prototype: HVX_Vector Q6_V_vfneg_V(HVX_Vector Vu) |
| ... | ... | @@ -5525,7 +4921,7 @@ |
| 5525 | 4921 | |
| 5526 | 4922 | #define Q6_V_vfneg_V(Vu) \ |
| 5527 | 4923 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vfneg_f8)(Vu) |
| 5528 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4924 | #endif | |
| 5529 | 4925 | |
| 5530 | 4926 | #if __HVX_ARCH__ >= 79 |
| 5531 | 4927 | /* ========================================================================== |
| ... | ... | @@ -5536,9 +4932,9 @@ |
| 5536 | 4932 | |
| 5537 | 4933 | #define Q6_V_vmerge_VVw(Vu, Vv) \ |
| 5538 | 4934 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmerge_qf)(Vu, Vv) |
| 5539 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4935 | #endif | |
| 5540 | 4936 | |
| 5541 | #if __HVX_ARCH__ >= 79 | |
| 4937 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5542 | 4938 | /* ========================================================================== |
| 5543 | 4939 | Assembly Syntax: Vdd32.hf=vmpy(Vu32.f8,Vv32.f8) |
| 5544 | 4940 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vmpy_VV(HVX_Vector Vu, |
| ... | ... | @@ -5547,9 +4943,9 @@ |
| 5547 | 4943 | |
| 5548 | 4944 | #define Q6_Whf_vmpy_VV(Vu, Vv) \ |
| 5549 | 4945 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_f8)(Vu, Vv) |
| 5550 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4946 | #endif | |
| 5551 | 4947 | |
| 5552 | #if __HVX_ARCH__ >= 79 | |
| 4948 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5553 | 4949 | /* ========================================================================== |
| 5554 | 4950 | Assembly Syntax: Vxx32.hf+=vmpy(Vu32.f8,Vv32.f8) |
| 5555 | 4951 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vmpyacc_WhfVV(HVX_VectorPair |
| ... | ... | @@ -5559,7 +4955,7 @@ |
| 5559 | 4955 | |
| 5560 | 4956 | #define Q6_Whf_vmpyacc_WhfVV(Vxx, Vu, Vv) \ |
| 5561 | 4957 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_hf_f8_acc)(Vxx, Vu, Vv) |
| 5562 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4958 | #endif | |
| 5563 | 4959 | |
| 5564 | 4960 | #if __HVX_ARCH__ >= 79 |
| 5565 | 4961 | /* ========================================================================== |
| ... | ... | @@ -5570,7 +4966,7 @@ |
| 5570 | 4966 | |
| 5571 | 4967 | #define Q6_Vqf16_vmpy_VhfRhf(Vu, Rt) \ |
| 5572 | 4968 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_hf)(Vu, Rt) |
| 5573 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4969 | #endif | |
| 5574 | 4970 | |
| 5575 | 4971 | #if __HVX_ARCH__ >= 79 |
| 5576 | 4972 | /* ========================================================================== |
| ... | ... | @@ -5581,7 +4977,7 @@ |
| 5581 | 4977 | |
| 5582 | 4978 | #define Q6_Vqf16_vmpy_Vqf16Rhf(Vu, Rt) \ |
| 5583 | 4979 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_qf16)(Vu, Rt) |
| 5584 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4980 | #endif | |
| 5585 | 4981 | |
| 5586 | 4982 | #if __HVX_ARCH__ >= 79 |
| 5587 | 4983 | /* ========================================================================== |
| ... | ... | @@ -5592,9 +4988,9 @@ |
| 5592 | 4988 | |
| 5593 | 4989 | #define Q6_Vqf32_vmpy_VsfRsf(Vu, Rt) \ |
| 5594 | 4990 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpy_rt_sf)(Vu, Rt) |
| 5595 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 4991 | #endif | |
| 5596 | 4992 | |
| 5597 | #if __HVX_ARCH__ >= 79 | |
| 4993 | #if __HVX_ARCH__ >= 79 && defined __HVX_IEEE_FP__ | |
| 5598 | 4994 | /* ========================================================================== |
| 5599 | 4995 | Assembly Syntax: Vdd32.hf=vsub(Vu32.f8,Vv32.f8) |
| 5600 | 4996 | C Intrinsic Prototype: HVX_VectorPair Q6_Whf_vsub_VV(HVX_Vector Vu, |
| ... | ... | @@ -5603,7 +4999,400 @@ |
| 5603 | 4999 | |
| 5604 | 5000 | #define Q6_Whf_vsub_VV(Vu, Vv) \ |
| 5605 | 5001 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_f8)(Vu, Vv) |
| 5606 | #endif /* __HEXAGON_ARCH___ >= 79 */ | |
| 5002 | #endif | |
| 5003 | ||
| 5004 | #if __HVX_ARCH__ >= 81 | |
| 5005 | /* ========================================================================== | |
| 5006 | Assembly Syntax: Vd32.qf16=vabs(Vu32.hf) | |
| 5007 | C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vabs_Vhf(HVX_Vector Vu) | |
| 5008 | Instruction Type: CVI_VS | |
| 5009 | Execution Slots: SLOT0123 | |
| 5010 | ========================================================================== */ | |
| 5011 | ||
| 5012 | #define Q6_Vqf16_vabs_Vhf(Vu) \ | |
| 5013 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf16_hf)(Vu) | |
| 5014 | #endif | |
| 5015 | ||
| 5016 | #if __HVX_ARCH__ >= 81 | |
| 5017 | /* ========================================================================== | |
| 5018 | Assembly Syntax: Vd32.qf16=vabs(Vu32.qf16) | |
| 5019 | C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vabs_Vqf16(HVX_Vector Vu) | |
| 5020 | Instruction Type: CVI_VS | |
| 5021 | Execution Slots: SLOT0123 | |
| 5022 | ========================================================================== */ | |
| 5023 | ||
| 5024 | #define Q6_Vqf16_vabs_Vqf16(Vu) \ | |
| 5025 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf16_qf16)(Vu) | |
| 5026 | #endif | |
| 5027 | ||
| 5028 | #if __HVX_ARCH__ >= 81 | |
| 5029 | /* ========================================================================== | |
| 5030 | Assembly Syntax: Vd32.qf32=vabs(Vu32.qf32) | |
| 5031 | C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vabs_Vqf32(HVX_Vector Vu) | |
| 5032 | Instruction Type: CVI_VS | |
| 5033 | Execution Slots: SLOT0123 | |
| 5034 | ========================================================================== */ | |
| 5035 | ||
| 5036 | #define Q6_Vqf32_vabs_Vqf32(Vu) \ | |
| 5037 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf32_qf32)(Vu) | |
| 5038 | #endif | |
| 5039 | ||
| 5040 | #if __HVX_ARCH__ >= 81 | |
| 5041 | /* ========================================================================== | |
| 5042 | Assembly Syntax: Vd32.qf32=vabs(Vu32.sf) | |
| 5043 | C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vabs_Vsf(HVX_Vector Vu) | |
| 5044 | Instruction Type: CVI_VS | |
| 5045 | Execution Slots: SLOT0123 | |
| 5046 | ========================================================================== */ | |
| 5047 | ||
| 5048 | #define Q6_Vqf32_vabs_Vsf(Vu) \ | |
| 5049 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabs_qf32_sf)(Vu) | |
| 5050 | #endif | |
| 5051 | ||
| 5052 | #if __HVX_ARCH__ >= 81 | |
| 5053 | /* ========================================================================== | |
| 5054 | Assembly Syntax: Vd32=valign4(Vu32,Vv32,Rt8) | |
| 5055 | C Intrinsic Prototype: HVX_Vector Q6_V_valign4_VVR(HVX_Vector Vu, HVX_Vector | |
| 5056 | Vv, Word32 Rt) Instruction Type: CVI_VA Execution Slots: SLOT0123 | |
| 5057 | ========================================================================== */ | |
| 5058 | ||
| 5059 | #define Q6_V_valign4_VVR(Vu, Vv, Rt) \ | |
| 5060 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valign4)(Vu, Vv, Rt) | |
| 5061 | #endif | |
| 5062 | ||
| 5063 | #if __HVX_ARCH__ >= 81 | |
| 5064 | /* ========================================================================== | |
| 5065 | Assembly Syntax: Vd32.bf=Vuu32.qf32 | |
| 5066 | C Intrinsic Prototype: HVX_Vector Q6_Vbf_equals_Wqf32(HVX_VectorPair Vuu) | |
| 5067 | Instruction Type: CVI_VS | |
| 5068 | Execution Slots: SLOT0123 | |
| 5069 | ========================================================================== */ | |
| 5070 | ||
| 5071 | #define Q6_Vbf_equals_Wqf32(Vuu) \ | |
| 5072 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_bf_qf32)(Vuu) | |
| 5073 | #endif | |
| 5074 | ||
| 5075 | #if __HVX_ARCH__ >= 81 | |
| 5076 | /* ========================================================================== | |
| 5077 | Assembly Syntax: Vd32.f8=Vu32.qf16 | |
| 5078 | C Intrinsic Prototype: HVX_Vector Q6_V_equals_Vqf16(HVX_Vector Vu) | |
| 5079 | Instruction Type: CVI_VS | |
| 5080 | Execution Slots: SLOT0123 | |
| 5081 | ========================================================================== */ | |
| 5082 | ||
| 5083 | #define Q6_V_equals_Vqf16(Vu) \ | |
| 5084 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_f8_qf16)(Vu) | |
| 5085 | #endif | |
| 5086 | ||
| 5087 | #if __HVX_ARCH__ >= 81 | |
| 5088 | /* ========================================================================== | |
| 5089 | Assembly Syntax: Vd32.h=Vu32.hf:rnd | |
| 5090 | C Intrinsic Prototype: HVX_Vector Q6_Vh_equals_Vhf_rnd(HVX_Vector Vu) | |
| 5091 | Instruction Type: CVI_VS | |
| 5092 | Execution Slots: SLOT0123 | |
| 5093 | ========================================================================== */ | |
| 5094 | ||
| 5095 | #define Q6_Vh_equals_Vhf_rnd(Vu) \ | |
| 5096 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_h_hf_rnd)(Vu) | |
| 5097 | #endif | |
| 5098 | ||
| 5099 | #if __HVX_ARCH__ >= 81 | |
| 5100 | /* ========================================================================== | |
| 5101 | Assembly Syntax: Vdd32.qf16=Vu32.f8 | |
| 5102 | C Intrinsic Prototype: HVX_VectorPair Q6_Wqf16_equals_V(HVX_Vector Vu) | |
| 5103 | Instruction Type: CVI_VP_VS | |
| 5104 | Execution Slots: SLOT0123 | |
| 5105 | ========================================================================== */ | |
| 5106 | ||
| 5107 | #define Q6_Wqf16_equals_V(Vu) \ | |
| 5108 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_f8)(Vu) | |
| 5109 | #endif | |
| 5110 | ||
| 5111 | #if __HVX_ARCH__ >= 81 | |
| 5112 | /* ========================================================================== | |
| 5113 | Assembly Syntax: Vd32.qf16=Vu32.hf | |
| 5114 | C Intrinsic Prototype: HVX_Vector Q6_Vqf16_equals_Vhf(HVX_Vector Vu) | |
| 5115 | Instruction Type: CVI_VS | |
| 5116 | Execution Slots: SLOT0123 | |
| 5117 | ========================================================================== */ | |
| 5118 | ||
| 5119 | #define Q6_Vqf16_equals_Vhf(Vu) \ | |
| 5120 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_hf)(Vu) | |
| 5121 | #endif | |
| 5122 | ||
| 5123 | #if __HVX_ARCH__ >= 81 | |
| 5124 | /* ========================================================================== | |
| 5125 | Assembly Syntax: Vd32.qf16=Vu32.qf16 | |
| 5126 | C Intrinsic Prototype: HVX_Vector Q6_Vqf16_equals_Vqf16(HVX_Vector Vu) | |
| 5127 | Instruction Type: CVI_VS | |
| 5128 | Execution Slots: SLOT0123 | |
| 5129 | ========================================================================== */ | |
| 5130 | ||
| 5131 | #define Q6_Vqf16_equals_Vqf16(Vu) \ | |
| 5132 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf16_qf16)(Vu) | |
| 5133 | #endif | |
| 5134 | ||
| 5135 | #if __HVX_ARCH__ >= 81 | |
| 5136 | /* ========================================================================== | |
| 5137 | Assembly Syntax: Vd32.qf32=Vu32.qf32 | |
| 5138 | C Intrinsic Prototype: HVX_Vector Q6_Vqf32_equals_Vqf32(HVX_Vector Vu) | |
| 5139 | Instruction Type: CVI_VS | |
| 5140 | Execution Slots: SLOT0123 | |
| 5141 | ========================================================================== */ | |
| 5142 | ||
| 5143 | #define Q6_Vqf32_equals_Vqf32(Vu) \ | |
| 5144 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf32_qf32)(Vu) | |
| 5145 | #endif | |
| 5146 | ||
| 5147 | #if __HVX_ARCH__ >= 81 | |
| 5148 | /* ========================================================================== | |
| 5149 | Assembly Syntax: Vd32.qf32=Vu32.sf | |
| 5150 | C Intrinsic Prototype: HVX_Vector Q6_Vqf32_equals_Vsf(HVX_Vector Vu) | |
| 5151 | Instruction Type: CVI_VS | |
| 5152 | Execution Slots: SLOT0123 | |
| 5153 | ========================================================================== */ | |
| 5154 | ||
| 5155 | #define Q6_Vqf32_equals_Vsf(Vu) \ | |
| 5156 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vconv_qf32_sf)(Vu) | |
| 5157 | #endif | |
| 5158 | ||
| 5159 | #if __HVX_ARCH__ >= 81 | |
| 5160 | /* ========================================================================== | |
| 5161 | Assembly Syntax: Qd4=vcmp.eq(Vu32.hf,Vv32.hf) | |
| 5162 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VhfVhf(HVX_Vector Vu, | |
| 5163 | HVX_Vector Vv) Instruction Type: CVI_VA Execution Slots: SLOT0123 | |
| 5164 | ========================================================================== */ | |
| 5165 | ||
| 5166 | #define Q6_Q_vcmp_eq_VhfVhf(Vu, Vv) \ | |
| 5167 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ | |
| 5168 | (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf)(Vu, Vv)), -1) | |
| 5169 | #endif | |
| 5170 | ||
| 5171 | #if __HVX_ARCH__ >= 81 | |
| 5172 | /* ========================================================================== | |
| 5173 | Assembly Syntax: Qx4&=vcmp.eq(Vu32.hf,Vv32.hf) | |
| 5174 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVhfVhf(HVX_VectorPred | |
| 5175 | Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution | |
| 5176 | Slots: SLOT0123 | |
| 5177 | ========================================================================== */ | |
| 5178 | ||
| 5179 | #define Q6_Q_vcmp_eqand_QVhfVhf(Qx, Vu, Vv) \ | |
| 5180 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ | |
| 5181 | (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_and)( \ | |
| 5182 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ | |
| 5183 | Vv)), \ | |
| 5184 | -1) | |
| 5185 | #endif | |
| 5186 | ||
| 5187 | #if __HVX_ARCH__ >= 81 | |
| 5188 | /* ========================================================================== | |
| 5189 | Assembly Syntax: Qx4|=vcmp.eq(Vu32.hf,Vv32.hf) | |
| 5190 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVhfVhf(HVX_VectorPred | |
| 5191 | Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution | |
| 5192 | Slots: SLOT0123 | |
| 5193 | ========================================================================== */ | |
| 5194 | ||
| 5195 | #define Q6_Q_vcmp_eqor_QVhfVhf(Qx, Vu, Vv) \ | |
| 5196 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ | |
| 5197 | (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_or)( \ | |
| 5198 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ | |
| 5199 | Vv)), \ | |
| 5200 | -1) | |
| 5201 | #endif | |
| 5202 | ||
| 5203 | #if __HVX_ARCH__ >= 81 | |
| 5204 | /* ========================================================================== | |
| 5205 | Assembly Syntax: Qx4^=vcmp.eq(Vu32.hf,Vv32.hf) | |
| 5206 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVhfVhf(HVX_VectorPred | |
| 5207 | Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution | |
| 5208 | Slots: SLOT0123 | |
| 5209 | ========================================================================== */ | |
| 5210 | ||
| 5211 | #define Q6_Q_vcmp_eqxacc_QVhfVhf(Qx, Vu, Vv) \ | |
| 5212 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ | |
| 5213 | (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqhf_xor)( \ | |
| 5214 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ | |
| 5215 | Vv)), \ | |
| 5216 | -1) | |
| 5217 | #endif | |
| 5218 | ||
| 5219 | #if __HVX_ARCH__ >= 81 | |
| 5220 | /* ========================================================================== | |
| 5221 | Assembly Syntax: Qd4=vcmp.eq(Vu32.sf,Vv32.sf) | |
| 5222 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VsfVsf(HVX_Vector Vu, | |
| 5223 | HVX_Vector Vv) Instruction Type: CVI_VA Execution Slots: SLOT0123 | |
| 5224 | ========================================================================== */ | |
| 5225 | ||
| 5226 | #define Q6_Q_vcmp_eq_VsfVsf(Vu, Vv) \ | |
| 5227 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ | |
| 5228 | (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf)(Vu, Vv)), -1) | |
| 5229 | #endif | |
| 5230 | ||
| 5231 | #if __HVX_ARCH__ >= 81 | |
| 5232 | /* ========================================================================== | |
| 5233 | Assembly Syntax: Qx4&=vcmp.eq(Vu32.sf,Vv32.sf) | |
| 5234 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVsfVsf(HVX_VectorPred | |
| 5235 | Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution | |
| 5236 | Slots: SLOT0123 | |
| 5237 | ========================================================================== */ | |
| 5238 | ||
| 5239 | #define Q6_Q_vcmp_eqand_QVsfVsf(Qx, Vu, Vv) \ | |
| 5240 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ | |
| 5241 | (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_and)( \ | |
| 5242 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ | |
| 5243 | Vv)), \ | |
| 5244 | -1) | |
| 5245 | #endif | |
| 5246 | ||
| 5247 | #if __HVX_ARCH__ >= 81 | |
| 5248 | /* ========================================================================== | |
| 5249 | Assembly Syntax: Qx4|=vcmp.eq(Vu32.sf,Vv32.sf) | |
| 5250 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVsfVsf(HVX_VectorPred | |
| 5251 | Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution | |
| 5252 | Slots: SLOT0123 | |
| 5253 | ========================================================================== */ | |
| 5254 | ||
| 5255 | #define Q6_Q_vcmp_eqor_QVsfVsf(Qx, Vu, Vv) \ | |
| 5256 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ | |
| 5257 | (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_or)( \ | |
| 5258 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ | |
| 5259 | Vv)), \ | |
| 5260 | -1) | |
| 5261 | #endif | |
| 5262 | ||
| 5263 | #if __HVX_ARCH__ >= 81 | |
| 5264 | /* ========================================================================== | |
| 5265 | Assembly Syntax: Qx4^=vcmp.eq(Vu32.sf,Vv32.sf) | |
| 5266 | C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVsfVsf(HVX_VectorPred | |
| 5267 | Qx, HVX_Vector Vu, HVX_Vector Vv) Instruction Type: CVI_VA Execution | |
| 5268 | Slots: SLOT0123 | |
| 5269 | ========================================================================== */ | |
| 5270 | ||
| 5271 | #define Q6_Q_vcmp_eqxacc_QVsfVsf(Qx, Vu, Vv) \ | |
| 5272 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt)( \ | |
| 5273 | (__BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqsf_xor)( \ | |
| 5274 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt)((Qx), -1), Vu, \ | |
| 5275 | Vv)), \ | |
| 5276 | -1) | |
| 5277 | #endif | |
| 5278 | ||
| 5279 | #if __HVX_ARCH__ >= 81 | |
| 5280 | /* ========================================================================== | |
| 5281 | Assembly Syntax: Vd32.w=vilog2(Vu32.hf) | |
| 5282 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vhf(HVX_Vector Vu) | |
| 5283 | Instruction Type: CVI_VS | |
| 5284 | Execution Slots: SLOT0123 | |
| 5285 | ========================================================================== */ | |
| 5286 | ||
| 5287 | #define Q6_Vw_vilog2_Vhf(Vu) \ | |
| 5288 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_hf)(Vu) | |
| 5289 | #endif | |
| 5290 | ||
| 5291 | #if __HVX_ARCH__ >= 81 | |
| 5292 | /* ========================================================================== | |
| 5293 | Assembly Syntax: Vd32.w=vilog2(Vu32.qf16) | |
| 5294 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vqf16(HVX_Vector Vu) | |
| 5295 | Instruction Type: CVI_VS | |
| 5296 | Execution Slots: SLOT0123 | |
| 5297 | ========================================================================== */ | |
| 5298 | ||
| 5299 | #define Q6_Vw_vilog2_Vqf16(Vu) \ | |
| 5300 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_qf16)(Vu) | |
| 5301 | #endif | |
| 5302 | ||
| 5303 | #if __HVX_ARCH__ >= 81 | |
| 5304 | /* ========================================================================== | |
| 5305 | Assembly Syntax: Vd32.w=vilog2(Vu32.qf32) | |
| 5306 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vqf32(HVX_Vector Vu) | |
| 5307 | Instruction Type: CVI_VS | |
| 5308 | Execution Slots: SLOT0123 | |
| 5309 | ========================================================================== */ | |
| 5310 | ||
| 5311 | #define Q6_Vw_vilog2_Vqf32(Vu) \ | |
| 5312 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_qf32)(Vu) | |
| 5313 | #endif | |
| 5314 | ||
| 5315 | #if __HVX_ARCH__ >= 81 | |
| 5316 | /* ========================================================================== | |
| 5317 | Assembly Syntax: Vd32.w=vilog2(Vu32.sf) | |
| 5318 | C Intrinsic Prototype: HVX_Vector Q6_Vw_vilog2_Vsf(HVX_Vector Vu) | |
| 5319 | Instruction Type: CVI_VS | |
| 5320 | Execution Slots: SLOT0123 | |
| 5321 | ========================================================================== */ | |
| 5322 | ||
| 5323 | #define Q6_Vw_vilog2_Vsf(Vu) \ | |
| 5324 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vilog2_sf)(Vu) | |
| 5325 | #endif | |
| 5326 | ||
| 5327 | #if __HVX_ARCH__ >= 81 | |
| 5328 | /* ========================================================================== | |
| 5329 | Assembly Syntax: Vd32.qf16=vneg(Vu32.hf) | |
| 5330 | C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vneg_Vhf(HVX_Vector Vu) | |
| 5331 | Instruction Type: CVI_VS | |
| 5332 | Execution Slots: SLOT0123 | |
| 5333 | ========================================================================== */ | |
| 5334 | ||
| 5335 | #define Q6_Vqf16_vneg_Vhf(Vu) \ | |
| 5336 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf16_hf)(Vu) | |
| 5337 | #endif | |
| 5338 | ||
| 5339 | #if __HVX_ARCH__ >= 81 | |
| 5340 | /* ========================================================================== | |
| 5341 | Assembly Syntax: Vd32.qf16=vneg(Vu32.qf16) | |
| 5342 | C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vneg_Vqf16(HVX_Vector Vu) | |
| 5343 | Instruction Type: CVI_VS | |
| 5344 | Execution Slots: SLOT0123 | |
| 5345 | ========================================================================== */ | |
| 5346 | ||
| 5347 | #define Q6_Vqf16_vneg_Vqf16(Vu) \ | |
| 5348 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf16_qf16)(Vu) | |
| 5349 | #endif | |
| 5350 | ||
| 5351 | #if __HVX_ARCH__ >= 81 | |
| 5352 | /* ========================================================================== | |
| 5353 | Assembly Syntax: Vd32.qf32=vneg(Vu32.qf32) | |
| 5354 | C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vneg_Vqf32(HVX_Vector Vu) | |
| 5355 | Instruction Type: CVI_VS | |
| 5356 | Execution Slots: SLOT0123 | |
| 5357 | ========================================================================== */ | |
| 5358 | ||
| 5359 | #define Q6_Vqf32_vneg_Vqf32(Vu) \ | |
| 5360 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf32_qf32)(Vu) | |
| 5361 | #endif | |
| 5362 | ||
| 5363 | #if __HVX_ARCH__ >= 81 | |
| 5364 | /* ========================================================================== | |
| 5365 | Assembly Syntax: Vd32.qf32=vneg(Vu32.sf) | |
| 5366 | C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vneg_Vsf(HVX_Vector Vu) | |
| 5367 | Instruction Type: CVI_VS | |
| 5368 | Execution Slots: SLOT0123 | |
| 5369 | ========================================================================== */ | |
| 5370 | ||
| 5371 | #define Q6_Vqf32_vneg_Vsf(Vu) \ | |
| 5372 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vneg_qf32_sf)(Vu) | |
| 5373 | #endif | |
| 5374 | ||
| 5375 | #if __HVX_ARCH__ >= 81 | |
| 5376 | /* ========================================================================== | |
| 5377 | Assembly Syntax: Vd32.qf16=vsub(Vu32.hf,Vv32.qf16) | |
| 5378 | C Intrinsic Prototype: HVX_Vector Q6_Vqf16_vsub_VhfVqf16(HVX_Vector Vu, | |
| 5379 | HVX_Vector Vv) Instruction Type: CVI_VS Execution Slots: SLOT0123 | |
| 5380 | ========================================================================== */ | |
| 5381 | ||
| 5382 | #define Q6_Vqf16_vsub_VhfVqf16(Vu, Vv) \ | |
| 5383 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_hf_mix)(Vu, Vv) | |
| 5384 | #endif | |
| 5385 | ||
| 5386 | #if __HVX_ARCH__ >= 81 | |
| 5387 | /* ========================================================================== | |
| 5388 | Assembly Syntax: Vd32.qf32=vsub(Vu32.sf,Vv32.qf32) | |
| 5389 | C Intrinsic Prototype: HVX_Vector Q6_Vqf32_vsub_VsfVqf32(HVX_Vector Vu, | |
| 5390 | HVX_Vector Vv) Instruction Type: CVI_VS Execution Slots: SLOT0123 | |
| 5391 | ========================================================================== */ | |
| 5392 | ||
| 5393 | #define Q6_Vqf32_vsub_VsfVqf32(Vu, Vv) \ | |
| 5394 | __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsub_sf_mix)(Vu, Vv) | |
| 5395 | #endif | |
| 5607 | 5396 | |
| 5608 | 5397 | #endif /* __HVX__ */ |
| 5609 | 5398 |
lib/include/immintrin.h-12| ... | ... | @@ -475,24 +475,12 @@ _storebe_i64(void * __P, long long __D) { |
| 475 | 475 | |
| 476 | 476 | #include <amxfp8intrin.h> |
| 477 | 477 | |
| 478 | #include <amxtransposeintrin.h> | |
| 479 | ||
| 480 | 478 | #include <amxmovrsintrin.h> |
| 481 | 479 | |
| 482 | #include <amxmovrstransposeintrin.h> | |
| 483 | ||
| 484 | 480 | #include <amxavx512intrin.h> |
| 485 | 481 | |
| 486 | 482 | #include <amxtf32intrin.h> |
| 487 | 483 | |
| 488 | #include <amxtf32transposeintrin.h> | |
| 489 | ||
| 490 | #include <amxbf16transposeintrin.h> | |
| 491 | ||
| 492 | #include <amxfp16transposeintrin.h> | |
| 493 | ||
| 494 | #include <amxcomplextransposeintrin.h> | |
| 495 | ||
| 496 | 484 | #include <avx512vp2intersectintrin.h> |
| 497 | 485 | |
| 498 | 486 | #include <avx512vlvp2intersectintrin.h> |
lib/include/intrin.h+4| ... | ... | @@ -30,6 +30,10 @@ |
| 30 | 30 | #include <arm64intr.h> |
| 31 | 31 | #endif |
| 32 | 32 | |
| 33 | #if defined(__ARM_ACLE) | |
| 34 | #include <arm_acle.h> | |
| 35 | #endif | |
| 36 | ||
| 33 | 37 | /* For the definition of jmp_buf. */ |
| 34 | 38 | #if __STDC_HOSTED__ |
| 35 | 39 | #include <setjmp.h> |
lib/include/lasxintrin.h+113| ... | ... | @@ -10,6 +10,8 @@ |
| 10 | 10 | #ifndef _LOONGSON_ASXINTRIN_H |
| 11 | 11 | #define _LOONGSON_ASXINTRIN_H 1 |
| 12 | 12 | |
| 13 | #include <lsxintrin.h> | |
| 14 | ||
| 13 | 15 | #if defined(__loongarch_asx) |
| 14 | 16 | |
| 15 | 17 | typedef signed char v32i8 __attribute__((vector_size(32), aligned(32))); |
| ... | ... | @@ -3882,5 +3884,116 @@ extern __inline |
| 3882 | 3884 | |
| 3883 | 3885 | #define __lasx_xvrepli_w(/*si10*/ _1) ((__m256i)__builtin_lasx_xvrepli_w((_1))) |
| 3884 | 3886 | |
| 3887 | #if defined(__loongarch_asx_sx_conv) | |
| 3888 | ||
| 3889 | extern __inline | |
| 3890 | __attribute__((__gnu_inline__, __always_inline__, | |
| 3891 | __artificial__)) __m256 __lasx_cast_128_s(__m128 _1) { | |
| 3892 | return (__m256)__builtin_lasx_cast_128_s((v4f32)_1); | |
| 3893 | } | |
| 3894 | ||
| 3895 | extern __inline | |
| 3896 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d | |
| 3897 | __lasx_cast_128_d(__m128d _1) { | |
| 3898 | return (__m256d)__builtin_lasx_cast_128_d((v2f64)_1); | |
| 3899 | } | |
| 3900 | ||
| 3901 | extern __inline | |
| 3902 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i | |
| 3903 | __lasx_cast_128(__m128i _1) { | |
| 3904 | return (__m256i)__builtin_lasx_cast_128((v2i64)_1); | |
| 3905 | } | |
| 3906 | ||
| 3907 | extern __inline | |
| 3908 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 | |
| 3909 | __lasx_concat_128_s(__m128 _1, __m128 _2) { | |
| 3910 | return (__m256)__builtin_lasx_concat_128_s((v4f32)_1, (v4f32)_2); | |
| 3911 | } | |
| 3912 | ||
| 3913 | extern __inline | |
| 3914 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d | |
| 3915 | __lasx_concat_128_d(__m128d _1, __m128d _2) { | |
| 3916 | return (__m256d)__builtin_lasx_concat_128_d((v2f64)_1, (v2f64)_2); | |
| 3917 | } | |
| 3918 | ||
| 3919 | extern __inline | |
| 3920 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i | |
| 3921 | __lasx_concat_128(__m128i _1, __m128i _2) { | |
| 3922 | return (__m256i)__builtin_lasx_concat_128((v2i64)_1, (v2i64)_2); | |
| 3923 | } | |
| 3924 | ||
| 3925 | extern __inline | |
| 3926 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 | |
| 3927 | __lasx_extract_128_lo_s(__m256 _1) { | |
| 3928 | return (__m128)__builtin_lasx_extract_128_lo_s((v8f32)_1); | |
| 3929 | } | |
| 3930 | ||
| 3931 | extern __inline | |
| 3932 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d | |
| 3933 | __lasx_extract_128_lo_d(__m256d _1) { | |
| 3934 | return (__m128d)__builtin_lasx_extract_128_lo_d((v4f64)_1); | |
| 3935 | } | |
| 3936 | ||
| 3937 | extern __inline | |
| 3938 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i | |
| 3939 | __lasx_extract_128_lo(__m256i _1) { | |
| 3940 | return (__m128i)__builtin_lasx_extract_128_lo((v4i64)_1); | |
| 3941 | } | |
| 3942 | ||
| 3943 | extern __inline | |
| 3944 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128 | |
| 3945 | __lasx_extract_128_hi_s(__m256 _1) { | |
| 3946 | return (__m128)__builtin_lasx_extract_128_hi_s((v8f32)_1); | |
| 3947 | } | |
| 3948 | ||
| 3949 | extern __inline | |
| 3950 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128d | |
| 3951 | __lasx_extract_128_hi_d(__m256d _1) { | |
| 3952 | return (__m128d)__builtin_lasx_extract_128_hi_d((v4f64)_1); | |
| 3953 | } | |
| 3954 | ||
| 3955 | extern __inline | |
| 3956 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m128i | |
| 3957 | __lasx_extract_128_hi(__m256i _1) { | |
| 3958 | return (__m128i)__builtin_lasx_extract_128_hi((v4i64)_1); | |
| 3959 | } | |
| 3960 | ||
| 3961 | extern __inline | |
| 3962 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 | |
| 3963 | __lasx_insert_128_lo_s(__m256 _1, __m128 _2) { | |
| 3964 | return (__m256)__builtin_lasx_insert_128_lo_s((v8f32)_1, (v4f32)_2); | |
| 3965 | } | |
| 3966 | ||
| 3967 | extern __inline | |
| 3968 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d | |
| 3969 | __lasx_insert_128_lo_d(__m256d _1, __m128d _2) { | |
| 3970 | return (__m256d)__builtin_lasx_insert_128_lo_d((v4f64)_1, (v2f64)_2); | |
| 3971 | } | |
| 3972 | ||
| 3973 | extern __inline | |
| 3974 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i | |
| 3975 | __lasx_insert_128_lo(__m256i _1, __m128i _2) { | |
| 3976 | return (__m256i)__builtin_lasx_insert_128_lo((v4i64)_1, (v2i64)_2); | |
| 3977 | } | |
| 3978 | ||
| 3979 | extern __inline | |
| 3980 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256 | |
| 3981 | __lasx_insert_128_hi_s(__m256 _1, __m128 _2) { | |
| 3982 | return (__m256)__builtin_lasx_insert_128_hi_s((v8f32)_1, (v4f32)_2); | |
| 3983 | } | |
| 3984 | ||
| 3985 | extern __inline | |
| 3986 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256d | |
| 3987 | __lasx_insert_128_hi_d(__m256d _1, __m128d _2) { | |
| 3988 | return (__m256d)__builtin_lasx_insert_128_hi_d((v4f64)_1, (v2f64)_2); | |
| 3989 | } | |
| 3990 | ||
| 3991 | extern __inline | |
| 3992 | __attribute__((__gnu_inline__, __always_inline__, __artificial__)) __m256i | |
| 3993 | __lasx_insert_128_hi(__m256i _1, __m128i _2) { | |
| 3994 | return (__m256i)__builtin_lasx_insert_128_hi((v4i64)_1, (v2i64)_2); | |
| 3995 | } | |
| 3996 | ||
| 3997 | #endif /* defined(__loongarch_asx_sx_conv). */ | |
| 3885 | 3998 | #endif /* defined(__loongarch_asx). */ |
| 3886 | 3999 | #endif /* _LOONGSON_ASXINTRIN_H. */ |
lib/include/llvm_libc_wrappers/assert.h+3-5| ... | ... | @@ -19,13 +19,11 @@ |
| 19 | 19 | |
| 20 | 20 | #if defined(__HIP__) || defined(__CUDA__) |
| 21 | 21 | #define __LIBC_ATTRS __attribute__((device)) |
| 22 | #else | |
| 23 | #define __LIBC_ATTRS | |
| 22 | 24 | #endif |
| 23 | 25 | |
| 24 | #pragma omp begin declare target | |
| 25 | ||
| 26 | #include <llvm-libc-decls/assert.h> | |
| 27 | ||
| 28 | #pragma omp end declare target | |
| 26 | // TODO: Define these for CUDA / HIP. | |
| 29 | 27 | |
| 30 | 28 | #undef __LIBC_ATTRS |
| 31 | 29 |
lib/include/llvm_libc_wrappers/ctype.h+3-115| ... | ... | @@ -13,128 +13,16 @@ |
| 13 | 13 | #error "This file is for GPU offloading compilation only" |
| 14 | 14 | #endif |
| 15 | 15 | |
| 16 | // The GNU headers like to define 'toupper' and 'tolower' redundantly. This is | |
| 17 | // necessary to prevent it from doing that and remapping our implementation. | |
| 18 | #if (defined(__NVPTX__) || defined(__AMDGPU__)) && defined(__GLIBC__) | |
| 19 | #pragma push_macro("__USE_EXTERN_INLINES") | |
| 20 | #undef __USE_EXTERN_INLINES | |
| 21 | #endif | |
| 22 | ||
| 23 | 16 | #include_next <ctype.h> |
| 24 | 17 | |
| 25 | #if (defined(__NVPTX__) || defined(__AMDGPU__)) && defined(__GLIBC__) | |
| 26 | #pragma pop_macro("__USE_EXTERN_INLINES") | |
| 27 | #endif | |
| 28 | ||
| 29 | #if __has_include(<llvm-libc-decls/ctype.h>) | |
| 30 | ||
| 31 | 18 | #if defined(__HIP__) || defined(__CUDA__) |
| 32 | 19 | #define __LIBC_ATTRS __attribute__((device)) |
| 20 | #else | |
| 21 | #define __LIBC_ATTRS | |
| 33 | 22 | #endif |
| 34 | 23 | |
| 35 | // The GNU headers like to provide these as macros, we need to undefine them so | |
| 36 | // they do not conflict with the following definitions for the GPU. | |
| 37 | ||
| 38 | #pragma push_macro("isalnum") | |
| 39 | #pragma push_macro("isalpha") | |
| 40 | #pragma push_macro("isascii") | |
| 41 | #pragma push_macro("isblank") | |
| 42 | #pragma push_macro("iscntrl") | |
| 43 | #pragma push_macro("isdigit") | |
| 44 | #pragma push_macro("isgraph") | |
| 45 | #pragma push_macro("islower") | |
| 46 | #pragma push_macro("isprint") | |
| 47 | #pragma push_macro("ispunct") | |
| 48 | #pragma push_macro("isspace") | |
| 49 | #pragma push_macro("isupper") | |
| 50 | #pragma push_macro("isxdigit") | |
| 51 | #pragma push_macro("toascii") | |
| 52 | #pragma push_macro("tolower") | |
| 53 | #pragma push_macro("toupper") | |
| 54 | #pragma push_macro("isalnum_l") | |
| 55 | #pragma push_macro("isalpha_l") | |
| 56 | #pragma push_macro("isascii_l") | |
| 57 | #pragma push_macro("isblank_l") | |
| 58 | #pragma push_macro("iscntrl_l") | |
| 59 | #pragma push_macro("isdigit_l") | |
| 60 | #pragma push_macro("isgraph_l") | |
| 61 | #pragma push_macro("islower_l") | |
| 62 | #pragma push_macro("isprint_l") | |
| 63 | #pragma push_macro("ispunct_l") | |
| 64 | #pragma push_macro("isspace_l") | |
| 65 | #pragma push_macro("isupper_l") | |
| 66 | #pragma push_macro("isxdigit_l") | |
| 67 | ||
| 68 | #undef isalnum | |
| 69 | #undef isalpha | |
| 70 | #undef isascii | |
| 71 | #undef iscntrl | |
| 72 | #undef isdigit | |
| 73 | #undef islower | |
| 74 | #undef isgraph | |
| 75 | #undef isprint | |
| 76 | #undef ispunct | |
| 77 | #undef isspace | |
| 78 | #undef isupper | |
| 79 | #undef isblank | |
| 80 | #undef isxdigit | |
| 81 | #undef toascii | |
| 82 | #undef tolower | |
| 83 | #undef toupper | |
| 84 | #undef isalnum_l | |
| 85 | #undef isalpha_l | |
| 86 | #undef iscntrl_l | |
| 87 | #undef isdigit_l | |
| 88 | #undef islower_l | |
| 89 | #undef isgraph_l | |
| 90 | #undef isprint_l | |
| 91 | #undef ispunct_l | |
| 92 | #undef isspace_l | |
| 93 | #undef isupper_l | |
| 94 | #undef isblank_l | |
| 95 | #undef isxdigit_l | |
| 96 | ||
| 97 | #pragma omp begin declare target | |
| 98 | ||
| 99 | #include <llvm-libc-decls/ctype.h> | |
| 100 | ||
| 101 | #pragma omp end declare target | |
| 102 | ||
| 103 | // Restore the original macros when compiling on the host. | |
| 104 | #if !defined(__NVPTX__) && !defined(__AMDGPU__) | |
| 105 | #pragma pop_macro("isalnum") | |
| 106 | #pragma pop_macro("isalpha") | |
| 107 | #pragma pop_macro("isascii") | |
| 108 | #pragma pop_macro("isblank") | |
| 109 | #pragma pop_macro("iscntrl") | |
| 110 | #pragma pop_macro("isdigit") | |
| 111 | #pragma pop_macro("isgraph") | |
| 112 | #pragma pop_macro("islower") | |
| 113 | #pragma pop_macro("isprint") | |
| 114 | #pragma pop_macro("ispunct") | |
| 115 | #pragma pop_macro("isspace") | |
| 116 | #pragma pop_macro("isupper") | |
| 117 | #pragma pop_macro("isxdigit") | |
| 118 | #pragma pop_macro("toascii") | |
| 119 | #pragma pop_macro("tolower") | |
| 120 | #pragma pop_macro("toupper") | |
| 121 | #pragma pop_macro("isalnum_l") | |
| 122 | #pragma pop_macro("isalpha_l") | |
| 123 | #pragma pop_macro("isascii_l") | |
| 124 | #pragma pop_macro("isblank_l") | |
| 125 | #pragma pop_macro("iscntrl_l") | |
| 126 | #pragma pop_macro("isdigit_l") | |
| 127 | #pragma pop_macro("isgraph_l") | |
| 128 | #pragma pop_macro("islower_l") | |
| 129 | #pragma pop_macro("isprint_l") | |
| 130 | #pragma pop_macro("ispunct_l") | |
| 131 | #pragma pop_macro("isspace_l") | |
| 132 | #pragma pop_macro("isupper_l") | |
| 133 | #pragma pop_macro("isxdigit_l") | |
| 134 | #endif | |
| 24 | // TODO: Define these for CUDA / HIP. | |
| 135 | 25 | |
| 136 | 26 | #undef __LIBC_ATTRS |
| 137 | 27 | |
| 138 | #endif | |
| 139 | ||
| 140 | 28 | #endif // __CLANG_LLVM_LIBC_WRAPPERS_CTYPE_H__ |
lib/include/llvm_libc_wrappers/inttypes.h+3-5| ... | ... | @@ -19,13 +19,11 @@ |
| 19 | 19 | |
| 20 | 20 | #if defined(__HIP__) || defined(__CUDA__) |
| 21 | 21 | #define __LIBC_ATTRS __attribute__((device)) |
| 22 | #else | |
| 23 | #define __LIBC_ATTRS | |
| 22 | 24 | #endif |
| 23 | 25 | |
| 24 | #pragma omp begin declare target | |
| 25 | ||
| 26 | #include <llvm-libc-decls/inttypes.h> | |
| 27 | ||
| 28 | #pragma omp end declare target | |
| 26 | // TODO: Define these for CUDA / HIP. | |
| 29 | 27 | |
| 30 | 28 | #undef __LIBC_ATTRS |
| 31 | 29 |
lib/include/llvm_libc_wrappers/stdio.h+10-38| ... | ... | @@ -6,45 +6,19 @@ |
| 6 | 6 | // |
| 7 | 7 | //===----------------------------------------------------------------------===// |
| 8 | 8 | |
| 9 | #ifndef __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__ | |
| 10 | #define __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__ | |
| 11 | ||
| 9 | 12 | #if !defined(_OPENMP) && !defined(__HIP__) && !defined(__CUDA__) |
| 10 | 13 | #error "This file is for GPU offloading compilation only" |
| 11 | 14 | #endif |
| 12 | 15 | |
| 13 | 16 | #include_next <stdio.h> |
| 14 | 17 | |
| 15 | // In some old versions of glibc, other standard headers sometimes define | |
| 16 | // special macros (e.g., __need_FILE) before including stdio.h to cause stdio.h | |
| 17 | // to produce special definitions. Future includes of stdio.h when those | |
| 18 | // special macros are undefined are expected to produce the normal definitions | |
| 19 | // from stdio.h. | |
| 20 | // | |
| 21 | // We do not apply our include guard (__CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__) | |
| 22 | // unconditionally to the above include_next. Otherwise, after an occurrence of | |
| 23 | // the first glibc stdio.h use case described above, the include_next would be | |
| 24 | // skipped for remaining includes of stdio.h, leaving required symbols | |
| 25 | // undefined. | |
| 26 | // | |
| 27 | // We make the following assumptions to handle all use cases: | |
| 28 | // | |
| 29 | // 1. If the above include_next produces special glibc definitions, then (a) it | |
| 30 | // does not produce the normal definitions that we must intercept below, (b) | |
| 31 | // the current file was included from a glibc header that already defined | |
| 32 | // __GLIBC__ (usually by including glibc's <features.h>), and (c) the above | |
| 33 | // include_next does not define _STDIO_H. In that case, we skip the rest of | |
| 34 | // the current file and don't guard against future includes. | |
| 35 | // 2. If the above include_next produces the normal stdio.h definitions, then | |
| 36 | // either (a) __GLIBC__ is not defined because C headers are from some other | |
| 37 | // libc implementation or (b) the above include_next defines _STDIO_H to | |
| 38 | // prevent the above include_next from having any effect in the future. | |
| 39 | #if !defined(__GLIBC__) || defined(_STDIO_H) | |
| 40 | ||
| 41 | #ifndef __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__ | |
| 42 | #define __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__ | |
| 43 | ||
| 44 | #if __has_include(<llvm-libc-decls/stdio.h>) | |
| 45 | ||
| 46 | 18 | #if defined(__HIP__) || defined(__CUDA__) |
| 47 | 19 | #define __LIBC_ATTRS __attribute__((device)) |
| 20 | #else | |
| 21 | #define __LIBC_ATTRS | |
| 48 | 22 | #endif |
| 49 | 23 | |
| 50 | 24 | // Some headers provide these as macros. Temporarily undefine them so they do |
| ... | ... | @@ -60,21 +34,19 @@ |
| 60 | 34 | |
| 61 | 35 | #pragma omp begin declare target |
| 62 | 36 | |
| 63 | #include <llvm-libc-decls/stdio.h> | |
| 37 | __LIBC_ATTRS extern FILE *stderr; | |
| 38 | __LIBC_ATTRS extern FILE *stdin; | |
| 39 | __LIBC_ATTRS extern FILE *stdout; | |
| 64 | 40 | |
| 65 | 41 | #pragma omp end declare target |
| 66 | 42 | |
| 67 | #undef __LIBC_ATTRS | |
| 68 | ||
| 69 | 43 | // Restore the original macros when compiling on the host. |
| 70 | 44 | #if !defined(__NVPTX__) && !defined(__AMDGPU__) |
| 71 | #pragma pop_macro("stdout") | |
| 72 | 45 | #pragma pop_macro("stderr") |
| 73 | 46 | #pragma pop_macro("stdin") |
| 47 | #pragma pop_macro("stdout") | |
| 74 | 48 | #endif |
| 75 | 49 | |
| 76 | #endif | |
| 50 | #undef __LIBC_ATTRS | |
| 77 | 51 | |
| 78 | 52 | #endif // __CLANG_LLVM_LIBC_WRAPPERS_STDIO_H__ |
| 79 | ||
| 80 | #endif |
lib/include/llvm_libc_wrappers/stdlib.h+3-24| ... | ... | @@ -15,39 +15,18 @@ |
| 15 | 15 | |
| 16 | 16 | #include_next <stdlib.h> |
| 17 | 17 | |
| 18 | #if __has_include(<llvm-libc-decls/stdlib.h>) | |
| 19 | ||
| 20 | 18 | #if defined(__HIP__) || defined(__CUDA__) |
| 21 | 19 | #define __LIBC_ATTRS __attribute__((device)) |
| 20 | #else | |
| 21 | #define __LIBC_ATTRS | |
| 22 | 22 | #endif |
| 23 | 23 | |
| 24 | 24 | #pragma omp begin declare target |
| 25 | 25 | |
| 26 | // The LLVM C library uses these named types so we forward declare them. | |
| 27 | typedef void (*__atexithandler_t)(void); | |
| 28 | typedef int (*__search_compare_t)(const void *, const void *); | |
| 29 | typedef int (*__qsortcompare_t)(const void *, const void *); | |
| 30 | typedef int (*__qsortrcompare_t)(const void *, const void *, void *); | |
| 31 | ||
| 32 | // Enforce ABI compatibility with the structs used by the LLVM C library. | |
| 33 | _Static_assert(__builtin_offsetof(div_t, quot) == 0, "ABI mismatch!"); | |
| 34 | _Static_assert(__builtin_offsetof(ldiv_t, quot) == 0, "ABI mismatch!"); | |
| 35 | _Static_assert(__builtin_offsetof(lldiv_t, quot) == 0, "ABI mismatch!"); | |
| 36 | ||
| 37 | #if defined(__GLIBC__) && __cplusplus >= 201703L | |
| 38 | #define at_quick_exit atexit | |
| 39 | #endif | |
| 40 | ||
| 41 | #include <llvm-libc-decls/stdlib.h> | |
| 42 | ||
| 43 | #if defined(__GLIBC__) && __cplusplus >= 201703L | |
| 44 | #undef at_quick_exit | |
| 45 | #endif | |
| 26 | // TODO: Define these for CUDA / HIP. | |
| 46 | 27 | |
| 47 | 28 | #pragma omp end declare target |
| 48 | 29 | |
| 49 | 30 | #undef __LIBC_ATTRS |
| 50 | 31 | |
| 51 | #endif | |
| 52 | ||
| 53 | 32 | #endif // __CLANG_LLVM_LIBC_WRAPPERS_STDLIB_H__ |
lib/include/llvm_libc_wrappers/string.h+2-70| ... | ... | @@ -15,82 +15,14 @@ |
| 15 | 15 | |
| 16 | 16 | #include_next <string.h> |
| 17 | 17 | |
| 18 | #if __has_include(<llvm-libc-decls/string.h>) | |
| 19 | ||
| 20 | 18 | #if defined(__HIP__) || defined(__CUDA__) |
| 21 | 19 | #define __LIBC_ATTRS __attribute__((device)) |
| 22 | #endif | |
| 23 | ||
| 24 | #pragma omp begin declare target | |
| 25 | ||
| 26 | // The GNU headers provide C++ standard compliant headers when in C++ mode and | |
| 27 | // the LLVM libc does not. We need to manually provide the definitions using the | |
| 28 | // same prototypes. | |
| 29 | #if defined(__cplusplus) && defined(__GLIBC__) && \ | |
| 30 | defined(__CORRECT_ISO_CPP_STRING_H_PROTO) | |
| 31 | ||
| 32 | #ifndef __LIBC_ATTRS | |
| 33 | #define __LIBC_ATTRS | |
| 34 | #endif | |
| 35 | ||
| 36 | extern "C" { | |
| 37 | void *memccpy(void *__restrict, const void *__restrict, int, | |
| 38 | size_t) __LIBC_ATTRS; | |
| 39 | int memcmp(const void *, const void *, size_t) __LIBC_ATTRS; | |
| 40 | void *memcpy(void *__restrict, const void *__restrict, size_t) __LIBC_ATTRS; | |
| 41 | void *memmem(const void *, size_t, const void *, size_t) __LIBC_ATTRS; | |
| 42 | void *memmove(void *, const void *, size_t) __LIBC_ATTRS; | |
| 43 | void *mempcpy(void *__restrict, const void *__restrict, size_t) __LIBC_ATTRS; | |
| 44 | void *memset(void *, int, size_t) __LIBC_ATTRS; | |
| 45 | char *stpcpy(char *__restrict, const char *__restrict) __LIBC_ATTRS; | |
| 46 | char *stpncpy(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS; | |
| 47 | char *strcat(char *__restrict, const char *__restrict) __LIBC_ATTRS; | |
| 48 | int strcmp(const char *, const char *) __LIBC_ATTRS; | |
| 49 | int strcoll(const char *, const char *) __LIBC_ATTRS; | |
| 50 | char *strcpy(char *__restrict, const char *__restrict) __LIBC_ATTRS; | |
| 51 | size_t strcspn(const char *, const char *) __LIBC_ATTRS; | |
| 52 | char *strdup(const char *) __LIBC_ATTRS; | |
| 53 | size_t strlen(const char *) __LIBC_ATTRS; | |
| 54 | char *strncat(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS; | |
| 55 | int strncmp(const char *, const char *, size_t) __LIBC_ATTRS; | |
| 56 | char *strncpy(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS; | |
| 57 | char *strndup(const char *, size_t) __LIBC_ATTRS; | |
| 58 | size_t strnlen(const char *, size_t) __LIBC_ATTRS; | |
| 59 | size_t strspn(const char *, const char *) __LIBC_ATTRS; | |
| 60 | char *strtok(char *__restrict, const char *__restrict) __LIBC_ATTRS; | |
| 61 | char *strtok_r(char *__restrict, const char *__restrict, | |
| 62 | char **__restrict) __LIBC_ATTRS; | |
| 63 | size_t strxfrm(char *__restrict, const char *__restrict, size_t) __LIBC_ATTRS; | |
| 64 | } | |
| 65 | ||
| 66 | extern "C++" { | |
| 67 | char *strstr(char *, const char *) noexcept __LIBC_ATTRS; | |
| 68 | const char *strstr(const char *, const char *) noexcept __LIBC_ATTRS; | |
| 69 | char *strpbrk(char *, const char *) noexcept __LIBC_ATTRS; | |
| 70 | const char *strpbrk(const char *, const char *) noexcept __LIBC_ATTRS; | |
| 71 | char *strrchr(char *, int) noexcept __LIBC_ATTRS; | |
| 72 | const char *strrchr(const char *, int) noexcept __LIBC_ATTRS; | |
| 73 | char *strchr(char *, int) noexcept __LIBC_ATTRS; | |
| 74 | const char *strchr(const char *, int) noexcept __LIBC_ATTRS; | |
| 75 | char *strchrnul(char *, int) noexcept __LIBC_ATTRS; | |
| 76 | const char *strchrnul(const char *, int) noexcept __LIBC_ATTRS; | |
| 77 | char *strcasestr(char *, const char *) noexcept __LIBC_ATTRS; | |
| 78 | const char *strcasestr(const char *, const char *) noexcept __LIBC_ATTRS; | |
| 79 | void *memrchr(void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS; | |
| 80 | const void *memrchr(const void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS; | |
| 81 | void *memchr(void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS; | |
| 82 | const void *memchr(const void *__s, int __c, size_t __n) noexcept __LIBC_ATTRS; | |
| 83 | } | |
| 84 | ||
| 85 | 20 | #else |
| 86 | #include <llvm-libc-decls/string.h> | |
| 87 | ||
| 21 | #define __LIBC_ATTRS | |
| 88 | 22 | #endif |
| 89 | 23 | |
| 90 | #pragma omp end declare target | |
| 24 | // TODO: Define these for CUDA / HIP. | |
| 91 | 25 | |
| 92 | 26 | #undef __LIBC_ATTRS |
| 93 | 27 | |
| 94 | #endif | |
| 95 | ||
| 96 | 28 | #endif // __CLANG_LLVM_LIBC_WRAPPERS_STRING_H__ |
lib/include/llvm_libc_wrappers/time.h+4-10| ... | ... | @@ -15,20 +15,14 @@ |
| 15 | 15 | |
| 16 | 16 | #include_next <time.h> |
| 17 | 17 | |
| 18 | #if __has_include(<llvm-libc-decls/time.h>) | |
| 19 | ||
| 20 | 18 | #if defined(__HIP__) || defined(__CUDA__) |
| 21 | 19 | #define __LIBC_ATTRS __attribute__((device)) |
| 20 | #else | |
| 21 | #define __LIBC_ATTRS | |
| 22 | 22 | #endif |
| 23 | 23 | |
| 24 | #pragma omp begin declare target | |
| 25 | ||
| 26 | _Static_assert(sizeof(clock_t) == sizeof(long), "ABI mismatch!"); | |
| 27 | ||
| 28 | #include <llvm-libc-decls/time.h> | |
| 24 | // TODO: Define these for CUDA / HIP. | |
| 29 | 25 | |
| 30 | #pragma omp end declare target | |
| 31 | ||
| 32 | #endif | |
| 26 | #undef __LIBC_ATTRS | |
| 33 | 27 | |
| 34 | 28 | #endif // __CLANG_LLVM_LIBC_WRAPPERS_TIME_H__ |
lib/include/mmintrin.h+188-257| ... | ... | @@ -39,27 +39,21 @@ typedef short __v8hi __attribute__((__vector_size__(16))); |
| 39 | 39 | typedef char __v16qi __attribute__((__vector_size__(16))); |
| 40 | 40 | |
| 41 | 41 | /* Define the default attributes for the functions in this file. */ |
| 42 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 42 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 43 | 43 | #define __DEFAULT_FN_ATTRS_SSE2 \ |
| 44 | __attribute__((__always_inline__, __nodebug__, \ | |
| 45 | __target__("sse2,no-evex512"), __min_vector_width__(128))) | |
| 44 | __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \ | |
| 45 | __min_vector_width__(128))) constexpr | |
| 46 | 46 | #else |
| 47 | 47 | #define __DEFAULT_FN_ATTRS_SSE2 \ |
| 48 | 48 | __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \ |
| 49 | 49 | __min_vector_width__(128))) |
| 50 | 50 | #endif |
| 51 | 51 | |
| 52 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 53 | #define __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR __DEFAULT_FN_ATTRS_SSE2 constexpr | |
| 54 | #else | |
| 55 | #define __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR __DEFAULT_FN_ATTRS_SSE2 | |
| 56 | #endif | |
| 57 | ||
| 58 | 52 | #define __trunc64(x) \ |
| 59 | 53 | (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0) |
| 60 | #define __anyext128(x) \ | |
| 54 | #define __zext128(x) \ | |
| 61 | 55 | (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \ |
| 62 | 1, -1, -1) | |
| 56 | 1, 2, 3) | |
| 63 | 57 | |
| 64 | 58 | /// Clears the MMX state by setting the state of the x87 stack registers |
| 65 | 59 | /// to empty. |
| ... | ... | @@ -68,9 +62,9 @@ typedef char __v16qi __attribute__((__vector_size__(16))); |
| 68 | 62 | /// |
| 69 | 63 | /// This intrinsic corresponds to the <c> EMMS </c> instruction. |
| 70 | 64 | /// |
| 71 | static __inline__ void __attribute__((__always_inline__, __nodebug__, | |
| 72 | __target__("mmx,no-evex512"))) | |
| 73 | _mm_empty(void) { | |
| 65 | static __inline__ void | |
| 66 | __attribute__((__always_inline__, __nodebug__, __target__("mmx"))) | |
| 67 | _mm_empty(void) { | |
| 74 | 68 | __builtin_ia32_emms(); |
| 75 | 69 | } |
| 76 | 70 | |
| ... | ... | @@ -85,10 +79,8 @@ _mm_empty(void) { |
| 85 | 79 | /// A 32-bit integer value. |
| 86 | 80 | /// \returns A 64-bit integer vector. The lower 32 bits contain the value of the |
| 87 | 81 | /// parameter. The upper 32 bits are set to 0. |
| 88 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 89 | _mm_cvtsi32_si64(int __i) | |
| 90 | { | |
| 91 | return __extension__ (__m64)(__v2si){__i, 0}; | |
| 82 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cvtsi32_si64(int __i) { | |
| 83 | return __extension__(__m64)(__v2si){__i, 0}; | |
| 92 | 84 | } |
| 93 | 85 | |
| 94 | 86 | /// Returns the lower 32 bits of a 64-bit integer vector as a 32-bit |
| ... | ... | @@ -102,10 +94,8 @@ _mm_cvtsi32_si64(int __i) |
| 102 | 94 | /// A 64-bit integer vector. |
| 103 | 95 | /// \returns A 32-bit signed integer value containing the lower 32 bits of the |
| 104 | 96 | /// parameter. |
| 105 | static __inline__ int __DEFAULT_FN_ATTRS_SSE2 | |
| 106 | _mm_cvtsi64_si32(__m64 __m) | |
| 107 | { | |
| 108 | return ((__v2si)__m)[0]; | |
| 97 | static __inline__ int __DEFAULT_FN_ATTRS_SSE2 _mm_cvtsi64_si32(__m64 __m) { | |
| 98 | return ((__v2si)__m)[0]; | |
| 109 | 99 | } |
| 110 | 100 | |
| 111 | 101 | /// Casts a 64-bit signed integer value into a 64-bit integer vector. |
| ... | ... | @@ -118,10 +108,8 @@ _mm_cvtsi64_si32(__m64 __m) |
| 118 | 108 | /// A 64-bit signed integer. |
| 119 | 109 | /// \returns A 64-bit integer vector containing the same bitwise pattern as the |
| 120 | 110 | /// parameter. |
| 121 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 122 | _mm_cvtsi64_m64(long long __i) | |
| 123 | { | |
| 124 | return (__m64)__i; | |
| 111 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cvtsi64_m64(long long __i) { | |
| 112 | return __extension__(__m64)(__v1di){__i}; | |
| 125 | 113 | } |
| 126 | 114 | |
| 127 | 115 | /// Casts a 64-bit integer vector into a 64-bit signed integer value. |
| ... | ... | @@ -134,10 +122,8 @@ _mm_cvtsi64_m64(long long __i) |
| 134 | 122 | /// A 64-bit integer vector. |
| 135 | 123 | /// \returns A 64-bit signed integer containing the same bitwise pattern as the |
| 136 | 124 | /// parameter. |
| 137 | static __inline__ long long __DEFAULT_FN_ATTRS_SSE2 | |
| 138 | _mm_cvtm64_si64(__m64 __m) | |
| 139 | { | |
| 140 | return (long long)__m; | |
| 125 | static __inline__ long long __DEFAULT_FN_ATTRS_SSE2 _mm_cvtm64_si64(__m64 __m) { | |
| 126 | return ((__v1di)__m)[0]; | |
| 141 | 127 | } |
| 142 | 128 | |
| 143 | 129 | /// Converts, with saturation, 16-bit signed integers from both 64-bit integer |
| ... | ... | @@ -159,11 +145,10 @@ _mm_cvtm64_si64(__m64 __m) |
| 159 | 145 | /// written to the upper 32 bits of the result. |
| 160 | 146 | /// \returns A 64-bit integer vector of [8 x i8] containing the converted |
| 161 | 147 | /// values. |
| 162 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 163 | _mm_packs_pi16(__m64 __m1, __m64 __m2) | |
| 164 | { | |
| 165 | return __trunc64(__builtin_ia32_packsswb128( | |
| 166 | (__v8hi)__builtin_shufflevector(__m1, __m2, 0, 1), (__v8hi){})); | |
| 148 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_packs_pi16(__m64 __m1, | |
| 149 | __m64 __m2) { | |
| 150 | return __trunc64(__builtin_ia32_packsswb128( | |
| 151 | (__v8hi)__builtin_shufflevector(__m1, __m2, 0, 1), (__v8hi){})); | |
| 167 | 152 | } |
| 168 | 153 | |
| 169 | 154 | /// Converts, with saturation, 32-bit signed integers from both 64-bit integer |
| ... | ... | @@ -185,11 +170,10 @@ _mm_packs_pi16(__m64 __m1, __m64 __m2) |
| 185 | 170 | /// written to the upper 32 bits of the result. |
| 186 | 171 | /// \returns A 64-bit integer vector of [4 x i16] containing the converted |
| 187 | 172 | /// values. |
| 188 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 189 | _mm_packs_pi32(__m64 __m1, __m64 __m2) | |
| 190 | { | |
| 191 | return __trunc64(__builtin_ia32_packssdw128( | |
| 192 | (__v4si)__builtin_shufflevector(__m1, __m2, 0, 1), (__v4si){})); | |
| 173 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_packs_pi32(__m64 __m1, | |
| 174 | __m64 __m2) { | |
| 175 | return __trunc64(__builtin_ia32_packssdw128( | |
| 176 | (__v4si)__builtin_shufflevector(__m1, __m2, 0, 1), (__v4si){})); | |
| 193 | 177 | } |
| 194 | 178 | |
| 195 | 179 | /// Converts, with saturation, 16-bit signed integers from both 64-bit integer |
| ... | ... | @@ -211,11 +195,10 @@ _mm_packs_pi32(__m64 __m1, __m64 __m2) |
| 211 | 195 | /// written to the upper 32 bits of the result. |
| 212 | 196 | /// \returns A 64-bit integer vector of [8 x i8] containing the converted |
| 213 | 197 | /// values. |
| 214 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 215 | _mm_packs_pu16(__m64 __m1, __m64 __m2) | |
| 216 | { | |
| 217 | return __trunc64(__builtin_ia32_packuswb128( | |
| 218 | (__v8hi)__builtin_shufflevector(__m1, __m2, 0, 1), (__v8hi){})); | |
| 198 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_packs_pu16(__m64 __m1, | |
| 199 | __m64 __m2) { | |
| 200 | return __trunc64(__builtin_ia32_packuswb128( | |
| 201 | (__v8hi)__builtin_shufflevector(__m1, __m2, 0, 1), (__v8hi){})); | |
| 219 | 202 | } |
| 220 | 203 | |
| 221 | 204 | /// Unpacks the upper 32 bits from two 64-bit integer vectors of [8 x i8] |
| ... | ... | @@ -239,11 +222,10 @@ _mm_packs_pu16(__m64 __m1, __m64 __m2) |
| 239 | 222 | /// Bits [63:56] are written to bits [63:56] of the result. |
| 240 | 223 | /// \returns A 64-bit integer vector of [8 x i8] containing the interleaved |
| 241 | 224 | /// values. |
| 242 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 243 | _mm_unpackhi_pi8(__m64 __m1, __m64 __m2) | |
| 244 | { | |
| 245 | return (__m64)__builtin_shufflevector((__v8qi)__m1, (__v8qi)__m2, | |
| 246 | 4, 12, 5, 13, 6, 14, 7, 15); | |
| 225 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpackhi_pi8(__m64 __m1, | |
| 226 | __m64 __m2) { | |
| 227 | return (__m64)__builtin_shufflevector((__v8qi)__m1, (__v8qi)__m2, 4, 12, 5, | |
| 228 | 13, 6, 14, 7, 15); | |
| 247 | 229 | } |
| 248 | 230 | |
| 249 | 231 | /// Unpacks the upper 32 bits from two 64-bit integer vectors of |
| ... | ... | @@ -263,11 +245,9 @@ _mm_unpackhi_pi8(__m64 __m1, __m64 __m2) |
| 263 | 245 | /// Bits [63:48] are written to bits [63:48] of the result. |
| 264 | 246 | /// \returns A 64-bit integer vector of [4 x i16] containing the interleaved |
| 265 | 247 | /// values. |
| 266 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 267 | _mm_unpackhi_pi16(__m64 __m1, __m64 __m2) | |
| 268 | { | |
| 269 | return (__m64)__builtin_shufflevector((__v4hi)__m1, (__v4hi)__m2, | |
| 270 | 2, 6, 3, 7); | |
| 248 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpackhi_pi16(__m64 __m1, | |
| 249 | __m64 __m2) { | |
| 250 | return (__m64)__builtin_shufflevector((__v4hi)__m1, (__v4hi)__m2, 2, 6, 3, 7); | |
| 271 | 251 | } |
| 272 | 252 | |
| 273 | 253 | /// Unpacks the upper 32 bits from two 64-bit integer vectors of |
| ... | ... | @@ -285,10 +265,9 @@ _mm_unpackhi_pi16(__m64 __m1, __m64 __m2) |
| 285 | 265 | /// the upper 32 bits of the result. |
| 286 | 266 | /// \returns A 64-bit integer vector of [2 x i32] containing the interleaved |
| 287 | 267 | /// values. |
| 288 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 289 | _mm_unpackhi_pi32(__m64 __m1, __m64 __m2) | |
| 290 | { | |
| 291 | return (__m64)__builtin_shufflevector((__v2si)__m1, (__v2si)__m2, 1, 3); | |
| 268 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpackhi_pi32(__m64 __m1, | |
| 269 | __m64 __m2) { | |
| 270 | return (__m64)__builtin_shufflevector((__v2si)__m1, (__v2si)__m2, 1, 3); | |
| 292 | 271 | } |
| 293 | 272 | |
| 294 | 273 | /// Unpacks the lower 32 bits from two 64-bit integer vectors of [8 x i8] |
| ... | ... | @@ -312,11 +291,10 @@ _mm_unpackhi_pi32(__m64 __m1, __m64 __m2) |
| 312 | 291 | /// Bits [31:24] are written to bits [63:56] of the result. |
| 313 | 292 | /// \returns A 64-bit integer vector of [8 x i8] containing the interleaved |
| 314 | 293 | /// values. |
| 315 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 316 | _mm_unpacklo_pi8(__m64 __m1, __m64 __m2) | |
| 317 | { | |
| 318 | return (__m64)__builtin_shufflevector((__v8qi)__m1, (__v8qi)__m2, | |
| 319 | 0, 8, 1, 9, 2, 10, 3, 11); | |
| 294 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpacklo_pi8(__m64 __m1, | |
| 295 | __m64 __m2) { | |
| 296 | return (__m64)__builtin_shufflevector((__v8qi)__m1, (__v8qi)__m2, 0, 8, 1, 9, | |
| 297 | 2, 10, 3, 11); | |
| 320 | 298 | } |
| 321 | 299 | |
| 322 | 300 | /// Unpacks the lower 32 bits from two 64-bit integer vectors of |
| ... | ... | @@ -336,11 +314,9 @@ _mm_unpacklo_pi8(__m64 __m1, __m64 __m2) |
| 336 | 314 | /// Bits [31:16] are written to bits [63:48] of the result. |
| 337 | 315 | /// \returns A 64-bit integer vector of [4 x i16] containing the interleaved |
| 338 | 316 | /// values. |
| 339 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 340 | _mm_unpacklo_pi16(__m64 __m1, __m64 __m2) | |
| 341 | { | |
| 342 | return (__m64)__builtin_shufflevector((__v4hi)__m1, (__v4hi)__m2, | |
| 343 | 0, 4, 1, 5); | |
| 317 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpacklo_pi16(__m64 __m1, | |
| 318 | __m64 __m2) { | |
| 319 | return (__m64)__builtin_shufflevector((__v4hi)__m1, (__v4hi)__m2, 0, 4, 1, 5); | |
| 344 | 320 | } |
| 345 | 321 | |
| 346 | 322 | /// Unpacks the lower 32 bits from two 64-bit integer vectors of |
| ... | ... | @@ -358,10 +334,9 @@ _mm_unpacklo_pi16(__m64 __m1, __m64 __m2) |
| 358 | 334 | /// the upper 32 bits of the result. |
| 359 | 335 | /// \returns A 64-bit integer vector of [2 x i32] containing the interleaved |
| 360 | 336 | /// values. |
| 361 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 362 | _mm_unpacklo_pi32(__m64 __m1, __m64 __m2) | |
| 363 | { | |
| 364 | return (__m64)__builtin_shufflevector((__v2si)__m1, (__v2si)__m2, 0, 2); | |
| 337 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_unpacklo_pi32(__m64 __m1, | |
| 338 | __m64 __m2) { | |
| 339 | return (__m64)__builtin_shufflevector((__v2si)__m1, (__v2si)__m2, 0, 2); | |
| 365 | 340 | } |
| 366 | 341 | |
| 367 | 342 | /// Adds each 8-bit integer element of the first 64-bit integer vector |
| ... | ... | @@ -379,10 +354,9 @@ _mm_unpacklo_pi32(__m64 __m1, __m64 __m2) |
| 379 | 354 | /// A 64-bit integer vector of [8 x i8]. |
| 380 | 355 | /// \returns A 64-bit integer vector of [8 x i8] containing the sums of both |
| 381 | 356 | /// parameters. |
| 382 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 383 | _mm_add_pi8(__m64 __m1, __m64 __m2) | |
| 384 | { | |
| 385 | return (__m64)(((__v8qu)__m1) + ((__v8qu)__m2)); | |
| 357 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_add_pi8(__m64 __m1, | |
| 358 | __m64 __m2) { | |
| 359 | return (__m64)(((__v8qu)__m1) + ((__v8qu)__m2)); | |
| 386 | 360 | } |
| 387 | 361 | |
| 388 | 362 | /// Adds each 16-bit integer element of the first 64-bit integer vector |
| ... | ... | @@ -400,10 +374,9 @@ _mm_add_pi8(__m64 __m1, __m64 __m2) |
| 400 | 374 | /// A 64-bit integer vector of [4 x i16]. |
| 401 | 375 | /// \returns A 64-bit integer vector of [4 x i16] containing the sums of both |
| 402 | 376 | /// parameters. |
| 403 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 404 | _mm_add_pi16(__m64 __m1, __m64 __m2) | |
| 405 | { | |
| 406 | return (__m64)(((__v4hu)__m1) + ((__v4hu)__m2)); | |
| 377 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_add_pi16(__m64 __m1, | |
| 378 | __m64 __m2) { | |
| 379 | return (__m64)(((__v4hu)__m1) + ((__v4hu)__m2)); | |
| 407 | 380 | } |
| 408 | 381 | |
| 409 | 382 | /// Adds each 32-bit integer element of the first 64-bit integer vector |
| ... | ... | @@ -421,10 +394,9 @@ _mm_add_pi16(__m64 __m1, __m64 __m2) |
| 421 | 394 | /// A 64-bit integer vector of [2 x i32]. |
| 422 | 395 | /// \returns A 64-bit integer vector of [2 x i32] containing the sums of both |
| 423 | 396 | /// parameters. |
| 424 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 425 | _mm_add_pi32(__m64 __m1, __m64 __m2) | |
| 426 | { | |
| 427 | return (__m64)(((__v2su)__m1) + ((__v2su)__m2)); | |
| 397 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_add_pi32(__m64 __m1, | |
| 398 | __m64 __m2) { | |
| 399 | return (__m64)(((__v2su)__m1) + ((__v2su)__m2)); | |
| 428 | 400 | } |
| 429 | 401 | |
| 430 | 402 | /// Adds, with saturation, each 8-bit signed integer element of the first |
| ... | ... | @@ -445,10 +417,9 @@ _mm_add_pi32(__m64 __m1, __m64 __m2) |
| 445 | 417 | /// A 64-bit integer vector of [8 x i8]. |
| 446 | 418 | /// \returns A 64-bit integer vector of [8 x i8] containing the saturated sums |
| 447 | 419 | /// of both parameters. |
| 448 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 449 | _mm_adds_pi8(__m64 __m1, __m64 __m2) | |
| 450 | { | |
| 451 | return (__m64)__builtin_elementwise_add_sat((__v8qs)__m1, (__v8qs)__m2); | |
| 420 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_adds_pi8(__m64 __m1, | |
| 421 | __m64 __m2) { | |
| 422 | return (__m64)__builtin_elementwise_add_sat((__v8qs)__m1, (__v8qs)__m2); | |
| 452 | 423 | } |
| 453 | 424 | |
| 454 | 425 | /// Adds, with saturation, each 16-bit signed integer element of the first |
| ... | ... | @@ -469,10 +440,9 @@ _mm_adds_pi8(__m64 __m1, __m64 __m2) |
| 469 | 440 | /// A 64-bit integer vector of [4 x i16]. |
| 470 | 441 | /// \returns A 64-bit integer vector of [4 x i16] containing the saturated sums |
| 471 | 442 | /// of both parameters. |
| 472 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 473 | _mm_adds_pi16(__m64 __m1, __m64 __m2) | |
| 474 | { | |
| 475 | return (__m64)__builtin_elementwise_add_sat((__v4hi)__m1, (__v4hi)__m2); | |
| 443 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_adds_pi16(__m64 __m1, | |
| 444 | __m64 __m2) { | |
| 445 | return (__m64)__builtin_elementwise_add_sat((__v4hi)__m1, (__v4hi)__m2); | |
| 476 | 446 | } |
| 477 | 447 | |
| 478 | 448 | /// Adds, with saturation, each 8-bit unsigned integer element of the first |
| ... | ... | @@ -492,10 +462,9 @@ _mm_adds_pi16(__m64 __m1, __m64 __m2) |
| 492 | 462 | /// A 64-bit integer vector of [8 x i8]. |
| 493 | 463 | /// \returns A 64-bit integer vector of [8 x i8] containing the saturated |
| 494 | 464 | /// unsigned sums of both parameters. |
| 495 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 496 | _mm_adds_pu8(__m64 __m1, __m64 __m2) | |
| 497 | { | |
| 498 | return (__m64)__builtin_elementwise_add_sat((__v8qu)__m1, (__v8qu)__m2); | |
| 465 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_adds_pu8(__m64 __m1, | |
| 466 | __m64 __m2) { | |
| 467 | return (__m64)__builtin_elementwise_add_sat((__v8qu)__m1, (__v8qu)__m2); | |
| 499 | 468 | } |
| 500 | 469 | |
| 501 | 470 | /// Adds, with saturation, each 16-bit unsigned integer element of the first |
| ... | ... | @@ -515,10 +484,9 @@ _mm_adds_pu8(__m64 __m1, __m64 __m2) |
| 515 | 484 | /// A 64-bit integer vector of [4 x i16]. |
| 516 | 485 | /// \returns A 64-bit integer vector of [4 x i16] containing the saturated |
| 517 | 486 | /// unsigned sums of both parameters. |
| 518 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 519 | _mm_adds_pu16(__m64 __m1, __m64 __m2) | |
| 520 | { | |
| 521 | return (__m64)__builtin_elementwise_add_sat((__v4hu)__m1, (__v4hu)__m2); | |
| 487 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_adds_pu16(__m64 __m1, | |
| 488 | __m64 __m2) { | |
| 489 | return (__m64)__builtin_elementwise_add_sat((__v4hu)__m1, (__v4hu)__m2); | |
| 522 | 490 | } |
| 523 | 491 | |
| 524 | 492 | /// Subtracts each 8-bit integer element of the second 64-bit integer |
| ... | ... | @@ -536,10 +504,9 @@ _mm_adds_pu16(__m64 __m1, __m64 __m2) |
| 536 | 504 | /// A 64-bit integer vector of [8 x i8] containing the subtrahends. |
| 537 | 505 | /// \returns A 64-bit integer vector of [8 x i8] containing the differences of |
| 538 | 506 | /// both parameters. |
| 539 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 540 | _mm_sub_pi8(__m64 __m1, __m64 __m2) | |
| 541 | { | |
| 542 | return (__m64)(((__v8qu)__m1) - ((__v8qu)__m2)); | |
| 507 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_sub_pi8(__m64 __m1, | |
| 508 | __m64 __m2) { | |
| 509 | return (__m64)(((__v8qu)__m1) - ((__v8qu)__m2)); | |
| 543 | 510 | } |
| 544 | 511 | |
| 545 | 512 | /// Subtracts each 16-bit integer element of the second 64-bit integer |
| ... | ... | @@ -557,10 +524,9 @@ _mm_sub_pi8(__m64 __m1, __m64 __m2) |
| 557 | 524 | /// A 64-bit integer vector of [4 x i16] containing the subtrahends. |
| 558 | 525 | /// \returns A 64-bit integer vector of [4 x i16] containing the differences of |
| 559 | 526 | /// both parameters. |
| 560 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 561 | _mm_sub_pi16(__m64 __m1, __m64 __m2) | |
| 562 | { | |
| 563 | return (__m64)(((__v4hu)__m1) - ((__v4hu)__m2)); | |
| 527 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_sub_pi16(__m64 __m1, | |
| 528 | __m64 __m2) { | |
| 529 | return (__m64)(((__v4hu)__m1) - ((__v4hu)__m2)); | |
| 564 | 530 | } |
| 565 | 531 | |
| 566 | 532 | /// Subtracts each 32-bit integer element of the second 64-bit integer |
| ... | ... | @@ -578,10 +544,9 @@ _mm_sub_pi16(__m64 __m1, __m64 __m2) |
| 578 | 544 | /// A 64-bit integer vector of [2 x i32] containing the subtrahends. |
| 579 | 545 | /// \returns A 64-bit integer vector of [2 x i32] containing the differences of |
| 580 | 546 | /// both parameters. |
| 581 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 582 | _mm_sub_pi32(__m64 __m1, __m64 __m2) | |
| 583 | { | |
| 584 | return (__m64)(((__v2su)__m1) - ((__v2su)__m2)); | |
| 547 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_sub_pi32(__m64 __m1, | |
| 548 | __m64 __m2) { | |
| 549 | return (__m64)(((__v2su)__m1) - ((__v2su)__m2)); | |
| 585 | 550 | } |
| 586 | 551 | |
| 587 | 552 | /// Subtracts, with saturation, each 8-bit signed integer element of the second |
| ... | ... | @@ -602,10 +567,9 @@ _mm_sub_pi32(__m64 __m1, __m64 __m2) |
| 602 | 567 | /// A 64-bit integer vector of [8 x i8] containing the subtrahends. |
| 603 | 568 | /// \returns A 64-bit integer vector of [8 x i8] containing the saturated |
| 604 | 569 | /// differences of both parameters. |
| 605 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 606 | _mm_subs_pi8(__m64 __m1, __m64 __m2) | |
| 607 | { | |
| 608 | return (__m64)__builtin_elementwise_sub_sat((__v8qs)__m1, (__v8qs)__m2); | |
| 570 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_subs_pi8(__m64 __m1, | |
| 571 | __m64 __m2) { | |
| 572 | return (__m64)__builtin_elementwise_sub_sat((__v8qs)__m1, (__v8qs)__m2); | |
| 609 | 573 | } |
| 610 | 574 | |
| 611 | 575 | /// Subtracts, with saturation, each 16-bit signed integer element of the |
| ... | ... | @@ -626,10 +590,9 @@ _mm_subs_pi8(__m64 __m1, __m64 __m2) |
| 626 | 590 | /// A 64-bit integer vector of [4 x i16] containing the subtrahends. |
| 627 | 591 | /// \returns A 64-bit integer vector of [4 x i16] containing the saturated |
| 628 | 592 | /// differences of both parameters. |
| 629 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 630 | _mm_subs_pi16(__m64 __m1, __m64 __m2) | |
| 631 | { | |
| 632 | return (__m64)__builtin_elementwise_sub_sat((__v4hi)__m1, (__v4hi)__m2); | |
| 593 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_subs_pi16(__m64 __m1, | |
| 594 | __m64 __m2) { | |
| 595 | return (__m64)__builtin_elementwise_sub_sat((__v4hi)__m1, (__v4hi)__m2); | |
| 633 | 596 | } |
| 634 | 597 | |
| 635 | 598 | /// Subtracts each 8-bit unsigned integer element of the second 64-bit |
| ... | ... | @@ -650,10 +613,9 @@ _mm_subs_pi16(__m64 __m1, __m64 __m2) |
| 650 | 613 | /// A 64-bit integer vector of [8 x i8] containing the subtrahends. |
| 651 | 614 | /// \returns A 64-bit integer vector of [8 x i8] containing the saturated |
| 652 | 615 | /// differences of both parameters. |
| 653 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 654 | _mm_subs_pu8(__m64 __m1, __m64 __m2) | |
| 655 | { | |
| 656 | return (__m64)__builtin_elementwise_sub_sat((__v8qu)__m1, (__v8qu)__m2); | |
| 616 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_subs_pu8(__m64 __m1, | |
| 617 | __m64 __m2) { | |
| 618 | return (__m64)__builtin_elementwise_sub_sat((__v8qu)__m1, (__v8qu)__m2); | |
| 657 | 619 | } |
| 658 | 620 | |
| 659 | 621 | /// Subtracts each 16-bit unsigned integer element of the second 64-bit |
| ... | ... | @@ -674,10 +636,9 @@ _mm_subs_pu8(__m64 __m1, __m64 __m2) |
| 674 | 636 | /// A 64-bit integer vector of [4 x i16] containing the subtrahends. |
| 675 | 637 | /// \returns A 64-bit integer vector of [4 x i16] containing the saturated |
| 676 | 638 | /// differences of both parameters. |
| 677 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 678 | _mm_subs_pu16(__m64 __m1, __m64 __m2) | |
| 679 | { | |
| 680 | return (__m64)__builtin_elementwise_sub_sat((__v4hu)__m1, (__v4hu)__m2); | |
| 639 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_subs_pu16(__m64 __m1, | |
| 640 | __m64 __m2) { | |
| 641 | return (__m64)__builtin_elementwise_sub_sat((__v4hu)__m1, (__v4hu)__m2); | |
| 681 | 642 | } |
| 682 | 643 | |
| 683 | 644 | /// Multiplies each 16-bit signed integer element of the first 64-bit |
| ... | ... | @@ -701,11 +662,10 @@ _mm_subs_pu16(__m64 __m1, __m64 __m2) |
| 701 | 662 | /// A 64-bit integer vector of [4 x i16]. |
| 702 | 663 | /// \returns A 64-bit integer vector of [2 x i32] containing the sums of |
| 703 | 664 | /// products of both parameters. |
| 704 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 705 | _mm_madd_pi16(__m64 __m1, __m64 __m2) | |
| 706 | { | |
| 707 | return __trunc64(__builtin_ia32_pmaddwd128((__v8hi)__anyext128(__m1), | |
| 708 | (__v8hi)__anyext128(__m2))); | |
| 665 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_madd_pi16(__m64 __m1, | |
| 666 | __m64 __m2) { | |
| 667 | return __trunc64(__builtin_ia32_pmaddwd128((__v8hi)__zext128(__m1), | |
| 668 | (__v8hi)__zext128(__m2))); | |
| 709 | 669 | } |
| 710 | 670 | |
| 711 | 671 | /// Multiplies each 16-bit signed integer element of the first 64-bit |
| ... | ... | @@ -723,11 +683,10 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2) |
| 723 | 683 | /// A 64-bit integer vector of [4 x i16]. |
| 724 | 684 | /// \returns A 64-bit integer vector of [4 x i16] containing the upper 16 bits |
| 725 | 685 | /// of the products of both parameters. |
| 726 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 727 | _mm_mulhi_pi16(__m64 __m1, __m64 __m2) | |
| 728 | { | |
| 729 | return __trunc64(__builtin_ia32_pmulhw128((__v8hi)__anyext128(__m1), | |
| 730 | (__v8hi)__anyext128(__m2))); | |
| 686 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_mulhi_pi16(__m64 __m1, | |
| 687 | __m64 __m2) { | |
| 688 | return __trunc64(__builtin_ia32_pmulhw128((__v8hi)__zext128(__m1), | |
| 689 | (__v8hi)__zext128(__m2))); | |
| 731 | 690 | } |
| 732 | 691 | |
| 733 | 692 | /// Multiplies each 16-bit signed integer element of the first 64-bit |
| ... | ... | @@ -745,10 +704,9 @@ _mm_mulhi_pi16(__m64 __m1, __m64 __m2) |
| 745 | 704 | /// A 64-bit integer vector of [4 x i16]. |
| 746 | 705 | /// \returns A 64-bit integer vector of [4 x i16] containing the lower 16 bits |
| 747 | 706 | /// of the products of both parameters. |
| 748 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 749 | _mm_mullo_pi16(__m64 __m1, __m64 __m2) | |
| 750 | { | |
| 751 | return (__m64)(((__v4hu)__m1) * ((__v4hu)__m2)); | |
| 707 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_mullo_pi16(__m64 __m1, | |
| 708 | __m64 __m2) { | |
| 709 | return (__m64)(((__v4hu)__m1) * ((__v4hu)__m2)); | |
| 752 | 710 | } |
| 753 | 711 | |
| 754 | 712 | /// Left-shifts each 16-bit signed integer element of the first |
| ... | ... | @@ -771,8 +729,8 @@ _mm_mullo_pi16(__m64 __m1, __m64 __m2) |
| 771 | 729 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 |
| 772 | 730 | _mm_sll_pi16(__m64 __m, __m64 __count) |
| 773 | 731 | { |
| 774 | return __trunc64(__builtin_ia32_psllw128((__v8hi)__anyext128(__m), | |
| 775 | (__v8hi)__anyext128(__count))); | |
| 732 | return __trunc64(__builtin_ia32_psllw128((__v8hi)__zext128(__m), | |
| 733 | (__v8hi)__zext128(__count))); | |
| 776 | 734 | } |
| 777 | 735 | |
| 778 | 736 | /// Left-shifts each 16-bit signed integer element of a 64-bit integer |
| ... | ... | @@ -791,11 +749,9 @@ _mm_sll_pi16(__m64 __m, __m64 __count) |
| 791 | 749 | /// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted |
| 792 | 750 | /// values. If \a __count is greater or equal to 16, the result is set to all |
| 793 | 751 | /// 0. |
| 794 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 795 | _mm_slli_pi16(__m64 __m, int __count) | |
| 796 | { | |
| 797 | return __trunc64(__builtin_ia32_psllwi128((__v8hi)__anyext128(__m), | |
| 798 | __count)); | |
| 752 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_slli_pi16(__m64 __m, | |
| 753 | int __count) { | |
| 754 | return __trunc64(__builtin_ia32_psllwi128((__v8hi)__zext128(__m), __count)); | |
| 799 | 755 | } |
| 800 | 756 | |
| 801 | 757 | /// Left-shifts each 32-bit signed integer element of the first |
| ... | ... | @@ -818,8 +774,8 @@ _mm_slli_pi16(__m64 __m, int __count) |
| 818 | 774 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 |
| 819 | 775 | _mm_sll_pi32(__m64 __m, __m64 __count) |
| 820 | 776 | { |
| 821 | return __trunc64(__builtin_ia32_pslld128((__v4si)__anyext128(__m), | |
| 822 | (__v4si)__anyext128(__count))); | |
| 777 | return __trunc64(__builtin_ia32_pslld128((__v4si)__zext128(__m), | |
| 778 | (__v4si)__zext128(__count))); | |
| 823 | 779 | } |
| 824 | 780 | |
| 825 | 781 | /// Left-shifts each 32-bit signed integer element of a 64-bit integer |
| ... | ... | @@ -838,11 +794,9 @@ _mm_sll_pi32(__m64 __m, __m64 __count) |
| 838 | 794 | /// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted |
| 839 | 795 | /// values. If \a __count is greater or equal to 32, the result is set to all |
| 840 | 796 | /// 0. |
| 841 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 842 | _mm_slli_pi32(__m64 __m, int __count) | |
| 843 | { | |
| 844 | return __trunc64(__builtin_ia32_pslldi128((__v4si)__anyext128(__m), | |
| 845 | __count)); | |
| 797 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_slli_pi32(__m64 __m, | |
| 798 | int __count) { | |
| 799 | return __trunc64(__builtin_ia32_pslldi128((__v4si)__zext128(__m), __count)); | |
| 846 | 800 | } |
| 847 | 801 | |
| 848 | 802 | /// Left-shifts the first 64-bit integer parameter by the number of bits |
| ... | ... | @@ -862,8 +816,8 @@ _mm_slli_pi32(__m64 __m, int __count) |
| 862 | 816 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 |
| 863 | 817 | _mm_sll_si64(__m64 __m, __m64 __count) |
| 864 | 818 | { |
| 865 | return __trunc64(__builtin_ia32_psllq128((__v2di)__anyext128(__m), | |
| 866 | (__v2di)__anyext128(__count))); | |
| 819 | return __trunc64(__builtin_ia32_psllq128((__v2di)__zext128(__m), | |
| 820 | (__v2di)__zext128(__count))); | |
| 867 | 821 | } |
| 868 | 822 | |
| 869 | 823 | /// Left-shifts the first parameter, which is a 64-bit integer, by the |
| ... | ... | @@ -880,11 +834,9 @@ _mm_sll_si64(__m64 __m, __m64 __count) |
| 880 | 834 | /// A 32-bit integer value. |
| 881 | 835 | /// \returns A 64-bit integer vector containing the left-shifted value. If |
| 882 | 836 | /// \a __count is greater or equal to 64, the result is set to 0. |
| 883 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 884 | _mm_slli_si64(__m64 __m, int __count) | |
| 885 | { | |
| 886 | return __trunc64(__builtin_ia32_psllqi128((__v2di)__anyext128(__m), | |
| 887 | __count)); | |
| 837 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_slli_si64(__m64 __m, | |
| 838 | int __count) { | |
| 839 | return __trunc64(__builtin_ia32_psllqi128((__v2di)__zext128(__m), __count)); | |
| 888 | 840 | } |
| 889 | 841 | |
| 890 | 842 | /// Right-shifts each 16-bit integer element of the first parameter, |
| ... | ... | @@ -908,8 +860,8 @@ _mm_slli_si64(__m64 __m, int __count) |
| 908 | 860 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 |
| 909 | 861 | _mm_sra_pi16(__m64 __m, __m64 __count) |
| 910 | 862 | { |
| 911 | return __trunc64(__builtin_ia32_psraw128((__v8hi)__anyext128(__m), | |
| 912 | (__v8hi)__anyext128(__count))); | |
| 863 | return __trunc64(__builtin_ia32_psraw128((__v8hi)__zext128(__m), | |
| 864 | (__v8hi)__zext128(__count))); | |
| 913 | 865 | } |
| 914 | 866 | |
| 915 | 867 | /// Right-shifts each 16-bit integer element of a 64-bit integer vector |
| ... | ... | @@ -929,11 +881,9 @@ _mm_sra_pi16(__m64 __m, __m64 __count) |
| 929 | 881 | /// A 32-bit integer value. |
| 930 | 882 | /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted |
| 931 | 883 | /// values. |
| 932 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 933 | _mm_srai_pi16(__m64 __m, int __count) | |
| 934 | { | |
| 935 | return __trunc64(__builtin_ia32_psrawi128((__v8hi)__anyext128(__m), | |
| 936 | __count)); | |
| 884 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srai_pi16(__m64 __m, | |
| 885 | int __count) { | |
| 886 | return __trunc64(__builtin_ia32_psrawi128((__v8hi)__zext128(__m), __count)); | |
| 937 | 887 | } |
| 938 | 888 | |
| 939 | 889 | /// Right-shifts each 32-bit integer element of the first parameter, |
| ... | ... | @@ -957,8 +907,8 @@ _mm_srai_pi16(__m64 __m, int __count) |
| 957 | 907 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 |
| 958 | 908 | _mm_sra_pi32(__m64 __m, __m64 __count) |
| 959 | 909 | { |
| 960 | return __trunc64(__builtin_ia32_psrad128((__v4si)__anyext128(__m), | |
| 961 | (__v4si)__anyext128(__count))); | |
| 910 | return __trunc64(__builtin_ia32_psrad128((__v4si)__zext128(__m), | |
| 911 | (__v4si)__zext128(__count))); | |
| 962 | 912 | } |
| 963 | 913 | |
| 964 | 914 | /// Right-shifts each 32-bit integer element of a 64-bit integer vector |
| ... | ... | @@ -978,11 +928,9 @@ _mm_sra_pi32(__m64 __m, __m64 __count) |
| 978 | 928 | /// A 32-bit integer value. |
| 979 | 929 | /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted |
| 980 | 930 | /// values. |
| 981 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 982 | _mm_srai_pi32(__m64 __m, int __count) | |
| 983 | { | |
| 984 | return __trunc64(__builtin_ia32_psradi128((__v4si)__anyext128(__m), | |
| 985 | __count)); | |
| 931 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srai_pi32(__m64 __m, | |
| 932 | int __count) { | |
| 933 | return __trunc64(__builtin_ia32_psradi128((__v4si)__zext128(__m), __count)); | |
| 986 | 934 | } |
| 987 | 935 | |
| 988 | 936 | /// Right-shifts each 16-bit integer element of the first parameter, |
| ... | ... | @@ -1005,8 +953,8 @@ _mm_srai_pi32(__m64 __m, int __count) |
| 1005 | 953 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 |
| 1006 | 954 | _mm_srl_pi16(__m64 __m, __m64 __count) |
| 1007 | 955 | { |
| 1008 | return __trunc64(__builtin_ia32_psrlw128((__v8hi)__anyext128(__m), | |
| 1009 | (__v8hi)__anyext128(__count))); | |
| 956 | return __trunc64(__builtin_ia32_psrlw128((__v8hi)__zext128(__m), | |
| 957 | (__v8hi)__zext128(__count))); | |
| 1010 | 958 | } |
| 1011 | 959 | |
| 1012 | 960 | /// Right-shifts each 16-bit integer element of a 64-bit integer vector |
| ... | ... | @@ -1025,11 +973,9 @@ _mm_srl_pi16(__m64 __m, __m64 __count) |
| 1025 | 973 | /// A 32-bit integer value. |
| 1026 | 974 | /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted |
| 1027 | 975 | /// values. |
| 1028 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1029 | _mm_srli_pi16(__m64 __m, int __count) | |
| 1030 | { | |
| 1031 | return __trunc64(__builtin_ia32_psrlwi128((__v8hi)__anyext128(__m), | |
| 1032 | __count)); | |
| 976 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srli_pi16(__m64 __m, | |
| 977 | int __count) { | |
| 978 | return __trunc64(__builtin_ia32_psrlwi128((__v8hi)__zext128(__m), __count)); | |
| 1033 | 979 | } |
| 1034 | 980 | |
| 1035 | 981 | /// Right-shifts each 32-bit integer element of the first parameter, |
| ... | ... | @@ -1052,8 +998,8 @@ _mm_srli_pi16(__m64 __m, int __count) |
| 1052 | 998 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 |
| 1053 | 999 | _mm_srl_pi32(__m64 __m, __m64 __count) |
| 1054 | 1000 | { |
| 1055 | return __trunc64(__builtin_ia32_psrld128((__v4si)__anyext128(__m), | |
| 1056 | (__v4si)__anyext128(__count))); | |
| 1001 | return __trunc64(__builtin_ia32_psrld128((__v4si)__zext128(__m), | |
| 1002 | (__v4si)__zext128(__count))); | |
| 1057 | 1003 | } |
| 1058 | 1004 | |
| 1059 | 1005 | /// Right-shifts each 32-bit integer element of a 64-bit integer vector |
| ... | ... | @@ -1072,11 +1018,9 @@ _mm_srl_pi32(__m64 __m, __m64 __count) |
| 1072 | 1018 | /// A 32-bit integer value. |
| 1073 | 1019 | /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted |
| 1074 | 1020 | /// values. |
| 1075 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1076 | _mm_srli_pi32(__m64 __m, int __count) | |
| 1077 | { | |
| 1078 | return __trunc64(__builtin_ia32_psrldi128((__v4si)__anyext128(__m), | |
| 1079 | __count)); | |
| 1021 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srli_pi32(__m64 __m, | |
| 1022 | int __count) { | |
| 1023 | return __trunc64(__builtin_ia32_psrldi128((__v4si)__zext128(__m), __count)); | |
| 1080 | 1024 | } |
| 1081 | 1025 | |
| 1082 | 1026 | /// Right-shifts the first 64-bit integer parameter by the number of bits |
| ... | ... | @@ -1096,8 +1040,8 @@ _mm_srli_pi32(__m64 __m, int __count) |
| 1096 | 1040 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 |
| 1097 | 1041 | _mm_srl_si64(__m64 __m, __m64 __count) |
| 1098 | 1042 | { |
| 1099 | return __trunc64(__builtin_ia32_psrlq128((__v2di)__anyext128(__m), | |
| 1100 | (__v2di)__anyext128(__count))); | |
| 1043 | return __trunc64(__builtin_ia32_psrlq128((__v2di)__zext128(__m), | |
| 1044 | (__v2di)__zext128(__count))); | |
| 1101 | 1045 | } |
| 1102 | 1046 | |
| 1103 | 1047 | /// Right-shifts the first parameter, which is a 64-bit integer, by the |
| ... | ... | @@ -1115,11 +1059,9 @@ _mm_srl_si64(__m64 __m, __m64 __count) |
| 1115 | 1059 | /// \param __count |
| 1116 | 1060 | /// A 32-bit integer value. |
| 1117 | 1061 | /// \returns A 64-bit integer vector containing the right-shifted value. |
| 1118 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1119 | _mm_srli_si64(__m64 __m, int __count) | |
| 1120 | { | |
| 1121 | return __trunc64(__builtin_ia32_psrlqi128((__v2di)__anyext128(__m), | |
| 1122 | __count)); | |
| 1062 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_srli_si64(__m64 __m, | |
| 1063 | int __count) { | |
| 1064 | return __trunc64(__builtin_ia32_psrlqi128((__v2di)__zext128(__m), __count)); | |
| 1123 | 1065 | } |
| 1124 | 1066 | |
| 1125 | 1067 | /// Performs a bitwise AND of two 64-bit integer vectors. |
| ... | ... | @@ -1134,10 +1076,9 @@ _mm_srli_si64(__m64 __m, int __count) |
| 1134 | 1076 | /// A 64-bit integer vector. |
| 1135 | 1077 | /// \returns A 64-bit integer vector containing the bitwise AND of both |
| 1136 | 1078 | /// parameters. |
| 1137 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1138 | _mm_and_si64(__m64 __m1, __m64 __m2) | |
| 1139 | { | |
| 1140 | return (__m64)(((__v1du)__m1) & ((__v1du)__m2)); | |
| 1079 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_and_si64(__m64 __m1, | |
| 1080 | __m64 __m2) { | |
| 1081 | return (__m64)(((__v1du)__m1) & ((__v1du)__m2)); | |
| 1141 | 1082 | } |
| 1142 | 1083 | |
| 1143 | 1084 | /// Performs a bitwise NOT of the first 64-bit integer vector, and then |
| ... | ... | @@ -1155,10 +1096,9 @@ _mm_and_si64(__m64 __m1, __m64 __m2) |
| 1155 | 1096 | /// A 64-bit integer vector. |
| 1156 | 1097 | /// \returns A 64-bit integer vector containing the bitwise AND of the second |
| 1157 | 1098 | /// parameter and the one's complement of the first parameter. |
| 1158 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1159 | _mm_andnot_si64(__m64 __m1, __m64 __m2) | |
| 1160 | { | |
| 1161 | return (__m64)(~((__v1du)__m1) & ((__v1du)__m2)); | |
| 1099 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_andnot_si64(__m64 __m1, | |
| 1100 | __m64 __m2) { | |
| 1101 | return (__m64)(~((__v1du)__m1) & ((__v1du)__m2)); | |
| 1162 | 1102 | } |
| 1163 | 1103 | |
| 1164 | 1104 | /// Performs a bitwise OR of two 64-bit integer vectors. |
| ... | ... | @@ -1173,10 +1113,9 @@ _mm_andnot_si64(__m64 __m1, __m64 __m2) |
| 1173 | 1113 | /// A 64-bit integer vector. |
| 1174 | 1114 | /// \returns A 64-bit integer vector containing the bitwise OR of both |
| 1175 | 1115 | /// parameters. |
| 1176 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1177 | _mm_or_si64(__m64 __m1, __m64 __m2) | |
| 1178 | { | |
| 1179 | return (__m64)(((__v1du)__m1) | ((__v1du)__m2)); | |
| 1116 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_or_si64(__m64 __m1, | |
| 1117 | __m64 __m2) { | |
| 1118 | return (__m64)(((__v1du)__m1) | ((__v1du)__m2)); | |
| 1180 | 1119 | } |
| 1181 | 1120 | |
| 1182 | 1121 | /// Performs a bitwise exclusive OR of two 64-bit integer vectors. |
| ... | ... | @@ -1191,10 +1130,9 @@ _mm_or_si64(__m64 __m1, __m64 __m2) |
| 1191 | 1130 | /// A 64-bit integer vector. |
| 1192 | 1131 | /// \returns A 64-bit integer vector containing the bitwise exclusive OR of both |
| 1193 | 1132 | /// parameters. |
| 1194 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1195 | _mm_xor_si64(__m64 __m1, __m64 __m2) | |
| 1196 | { | |
| 1197 | return (__m64)(((__v1du)__m1) ^ ((__v1du)__m2)); | |
| 1133 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_xor_si64(__m64 __m1, | |
| 1134 | __m64 __m2) { | |
| 1135 | return (__m64)(((__v1du)__m1) ^ ((__v1du)__m2)); | |
| 1198 | 1136 | } |
| 1199 | 1137 | |
| 1200 | 1138 | /// Compares the 8-bit integer elements of two 64-bit integer vectors of |
| ... | ... | @@ -1213,10 +1151,9 @@ _mm_xor_si64(__m64 __m1, __m64 __m2) |
| 1213 | 1151 | /// A 64-bit integer vector of [8 x i8]. |
| 1214 | 1152 | /// \returns A 64-bit integer vector of [8 x i8] containing the comparison |
| 1215 | 1153 | /// results. |
| 1216 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1217 | _mm_cmpeq_pi8(__m64 __m1, __m64 __m2) | |
| 1218 | { | |
| 1219 | return (__m64)(((__v8qi)__m1) == ((__v8qi)__m2)); | |
| 1154 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpeq_pi8(__m64 __m1, | |
| 1155 | __m64 __m2) { | |
| 1156 | return (__m64)(((__v8qi)__m1) == ((__v8qi)__m2)); | |
| 1220 | 1157 | } |
| 1221 | 1158 | |
| 1222 | 1159 | /// Compares the 16-bit integer elements of two 64-bit integer vectors of |
| ... | ... | @@ -1235,10 +1172,9 @@ _mm_cmpeq_pi8(__m64 __m1, __m64 __m2) |
| 1235 | 1172 | /// A 64-bit integer vector of [4 x i16]. |
| 1236 | 1173 | /// \returns A 64-bit integer vector of [4 x i16] containing the comparison |
| 1237 | 1174 | /// results. |
| 1238 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1239 | _mm_cmpeq_pi16(__m64 __m1, __m64 __m2) | |
| 1240 | { | |
| 1241 | return (__m64)(((__v4hi)__m1) == ((__v4hi)__m2)); | |
| 1175 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpeq_pi16(__m64 __m1, | |
| 1176 | __m64 __m2) { | |
| 1177 | return (__m64)(((__v4hi)__m1) == ((__v4hi)__m2)); | |
| 1242 | 1178 | } |
| 1243 | 1179 | |
| 1244 | 1180 | /// Compares the 32-bit integer elements of two 64-bit integer vectors of |
| ... | ... | @@ -1257,10 +1193,9 @@ _mm_cmpeq_pi16(__m64 __m1, __m64 __m2) |
| 1257 | 1193 | /// A 64-bit integer vector of [2 x i32]. |
| 1258 | 1194 | /// \returns A 64-bit integer vector of [2 x i32] containing the comparison |
| 1259 | 1195 | /// results. |
| 1260 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1261 | _mm_cmpeq_pi32(__m64 __m1, __m64 __m2) | |
| 1262 | { | |
| 1263 | return (__m64)(((__v2si)__m1) == ((__v2si)__m2)); | |
| 1196 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpeq_pi32(__m64 __m1, | |
| 1197 | __m64 __m2) { | |
| 1198 | return (__m64)(((__v2si)__m1) == ((__v2si)__m2)); | |
| 1264 | 1199 | } |
| 1265 | 1200 | |
| 1266 | 1201 | /// Compares the 8-bit integer elements of two 64-bit integer vectors of |
| ... | ... | @@ -1279,9 +1214,8 @@ _mm_cmpeq_pi32(__m64 __m1, __m64 __m2) |
| 1279 | 1214 | /// A 64-bit integer vector of [8 x i8]. |
| 1280 | 1215 | /// \returns A 64-bit integer vector of [8 x i8] containing the comparison |
| 1281 | 1216 | /// results. |
| 1282 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1283 | _mm_cmpgt_pi8(__m64 __m1, __m64 __m2) | |
| 1284 | { | |
| 1217 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpgt_pi8(__m64 __m1, | |
| 1218 | __m64 __m2) { | |
| 1285 | 1219 | /* This function always performs a signed comparison, but __v8qi is a char |
| 1286 | 1220 | which may be signed or unsigned, so use __v8qs. */ |
| 1287 | 1221 | return (__m64)((__v8qs)__m1 > (__v8qs)__m2); |
| ... | ... | @@ -1303,10 +1237,9 @@ _mm_cmpgt_pi8(__m64 __m1, __m64 __m2) |
| 1303 | 1237 | /// A 64-bit integer vector of [4 x i16]. |
| 1304 | 1238 | /// \returns A 64-bit integer vector of [4 x i16] containing the comparison |
| 1305 | 1239 | /// results. |
| 1306 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1307 | _mm_cmpgt_pi16(__m64 __m1, __m64 __m2) | |
| 1308 | { | |
| 1309 | return (__m64)((__v4hi)__m1 > (__v4hi)__m2); | |
| 1240 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpgt_pi16(__m64 __m1, | |
| 1241 | __m64 __m2) { | |
| 1242 | return (__m64)((__v4hi)__m1 > (__v4hi)__m2); | |
| 1310 | 1243 | } |
| 1311 | 1244 | |
| 1312 | 1245 | /// Compares the 32-bit integer elements of two 64-bit integer vectors of |
| ... | ... | @@ -1325,10 +1258,9 @@ _mm_cmpgt_pi16(__m64 __m1, __m64 __m2) |
| 1325 | 1258 | /// A 64-bit integer vector of [2 x i32]. |
| 1326 | 1259 | /// \returns A 64-bit integer vector of [2 x i32] containing the comparison |
| 1327 | 1260 | /// results. |
| 1328 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1329 | _mm_cmpgt_pi32(__m64 __m1, __m64 __m2) | |
| 1330 | { | |
| 1331 | return (__m64)((__v2si)__m1 > (__v2si)__m2); | |
| 1261 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_cmpgt_pi32(__m64 __m1, | |
| 1262 | __m64 __m2) { | |
| 1263 | return (__m64)((__v2si)__m1 > (__v2si)__m2); | |
| 1332 | 1264 | } |
| 1333 | 1265 | |
| 1334 | 1266 | /// Constructs a 64-bit integer vector initialized to zero. |
| ... | ... | @@ -1338,8 +1270,7 @@ _mm_cmpgt_pi32(__m64 __m1, __m64 __m2) |
| 1338 | 1270 | /// This intrinsic corresponds to the <c> PXOR </c> instruction. |
| 1339 | 1271 | /// |
| 1340 | 1272 | /// \returns An initialized 64-bit integer vector with all elements set to zero. |
| 1341 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1342 | _mm_setzero_si64(void) { | |
| 1273 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_setzero_si64(void) { | |
| 1343 | 1274 | return __extension__(__m64){0LL}; |
| 1344 | 1275 | } |
| 1345 | 1276 | |
| ... | ... | @@ -1358,8 +1289,8 @@ _mm_setzero_si64(void) { |
| 1358 | 1289 | /// A 32-bit integer value used to initialize the lower 32 bits of the |
| 1359 | 1290 | /// result. |
| 1360 | 1291 | /// \returns An initialized 64-bit integer vector. |
| 1361 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1362 | _mm_set_pi32(int __i1, int __i0) { | |
| 1292 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set_pi32(int __i1, | |
| 1293 | int __i0) { | |
| 1363 | 1294 | return __extension__(__m64)(__v2si){__i0, __i1}; |
| 1364 | 1295 | } |
| 1365 | 1296 | |
| ... | ... | @@ -1380,8 +1311,10 @@ _mm_set_pi32(int __i1, int __i0) { |
| 1380 | 1311 | /// \param __s0 |
| 1381 | 1312 | /// A 16-bit integer value used to initialize bits [15:0] of the result. |
| 1382 | 1313 | /// \returns An initialized 64-bit integer vector. |
| 1383 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1384 | _mm_set_pi16(short __s3, short __s2, short __s1, short __s0) { | |
| 1314 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set_pi16(short __s3, | |
| 1315 | short __s2, | |
| 1316 | short __s1, | |
| 1317 | short __s0) { | |
| 1385 | 1318 | return __extension__(__m64)(__v4hi){__s0, __s1, __s2, __s3}; |
| 1386 | 1319 | } |
| 1387 | 1320 | |
| ... | ... | @@ -1410,7 +1343,7 @@ _mm_set_pi16(short __s3, short __s2, short __s1, short __s0) { |
| 1410 | 1343 | /// \param __b0 |
| 1411 | 1344 | /// An 8-bit integer value used to initialize bits [7:0] of the result. |
| 1412 | 1345 | /// \returns An initialized 64-bit integer vector. |
| 1413 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1346 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1414 | 1347 | _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, |
| 1415 | 1348 | char __b1, char __b0) { |
| 1416 | 1349 | return __extension__(__m64)(__v8qi){__b0, __b1, __b2, __b3, |
| ... | ... | @@ -1430,8 +1363,7 @@ _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, |
| 1430 | 1363 | /// A 32-bit integer value used to initialize each vector element of the |
| 1431 | 1364 | /// result. |
| 1432 | 1365 | /// \returns An initialized 64-bit integer vector of [2 x i32]. |
| 1433 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1434 | _mm_set1_pi32(int __i) { | |
| 1366 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set1_pi32(int __i) { | |
| 1435 | 1367 | return _mm_set_pi32(__i, __i); |
| 1436 | 1368 | } |
| 1437 | 1369 | |
| ... | ... | @@ -1448,8 +1380,7 @@ _mm_set1_pi32(int __i) { |
| 1448 | 1380 | /// A 16-bit integer value used to initialize each vector element of the |
| 1449 | 1381 | /// result. |
| 1450 | 1382 | /// \returns An initialized 64-bit integer vector of [4 x i16]. |
| 1451 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1452 | _mm_set1_pi16(short __w) { | |
| 1383 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set1_pi16(short __w) { | |
| 1453 | 1384 | return _mm_set_pi16(__w, __w, __w, __w); |
| 1454 | 1385 | } |
| 1455 | 1386 | |
| ... | ... | @@ -1465,8 +1396,7 @@ _mm_set1_pi16(short __w) { |
| 1465 | 1396 | /// An 8-bit integer value used to initialize each vector element of the |
| 1466 | 1397 | /// result. |
| 1467 | 1398 | /// \returns An initialized 64-bit integer vector of [8 x i8]. |
| 1468 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1469 | _mm_set1_pi8(char __b) { | |
| 1399 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_set1_pi8(char __b) { | |
| 1470 | 1400 | return _mm_set_pi8(__b, __b, __b, __b, __b, __b, __b, __b); |
| 1471 | 1401 | } |
| 1472 | 1402 | |
| ... | ... | @@ -1485,8 +1415,8 @@ _mm_set1_pi8(char __b) { |
| 1485 | 1415 | /// A 32-bit integer value used to initialize the upper 32 bits of the |
| 1486 | 1416 | /// result. |
| 1487 | 1417 | /// \returns An initialized 64-bit integer vector. |
| 1488 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1489 | _mm_setr_pi32(int __i0, int __i1) { | |
| 1418 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_setr_pi32(int __i0, | |
| 1419 | int __i1) { | |
| 1490 | 1420 | return _mm_set_pi32(__i1, __i0); |
| 1491 | 1421 | } |
| 1492 | 1422 | |
| ... | ... | @@ -1507,8 +1437,10 @@ _mm_setr_pi32(int __i0, int __i1) { |
| 1507 | 1437 | /// \param __w3 |
| 1508 | 1438 | /// A 16-bit integer value used to initialize bits [63:48] of the result. |
| 1509 | 1439 | /// \returns An initialized 64-bit integer vector. |
| 1510 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1511 | _mm_setr_pi16(short __w0, short __w1, short __w2, short __w3) { | |
| 1440 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 _mm_setr_pi16(short __w0, | |
| 1441 | short __w1, | |
| 1442 | short __w2, | |
| 1443 | short __w3) { | |
| 1512 | 1444 | return _mm_set_pi16(__w3, __w2, __w1, __w0); |
| 1513 | 1445 | } |
| 1514 | 1446 | |
| ... | ... | @@ -1537,13 +1469,12 @@ _mm_setr_pi16(short __w0, short __w1, short __w2, short __w3) { |
| 1537 | 1469 | /// \param __b7 |
| 1538 | 1470 | /// An 8-bit integer value used to initialize bits [63:56] of the result. |
| 1539 | 1471 | /// \returns An initialized 64-bit integer vector. |
| 1540 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1472 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 1541 | 1473 | _mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5, |
| 1542 | 1474 | char __b6, char __b7) { |
| 1543 | 1475 | return _mm_set_pi8(__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0); |
| 1544 | 1476 | } |
| 1545 | 1477 | |
| 1546 | #undef __anyext128 | |
| 1547 | 1478 | #undef __trunc64 |
| 1548 | 1479 | #undef __DEFAULT_FN_ATTRS_SSE2 |
| 1549 | 1480 |
lib/include/module.modulemap+23-4| ... | ... | @@ -171,8 +171,22 @@ module _Builtin_intrinsics [system] [extern_c] { |
| 171 | 171 | // that module. The system float.h (if present) will be treated |
| 172 | 172 | // as a textual header in the sytem module. |
| 173 | 173 | module _Builtin_float [system] { |
| 174 | header "float.h" | |
| 175 | export * | |
| 174 | textual header "float.h" | |
| 175 | ||
| 176 | explicit module float { | |
| 177 | header "__float_float.h" | |
| 178 | export * | |
| 179 | } | |
| 180 | ||
| 181 | explicit module header_macro { | |
| 182 | header "__float_header_macro.h" | |
| 183 | export * | |
| 184 | } | |
| 185 | ||
| 186 | explicit module infinity_nan { | |
| 187 | header "__float_infinity_nan.h" | |
| 188 | export * | |
| 189 | } | |
| 176 | 190 | } |
| 177 | 191 | |
| 178 | 192 | module _Builtin_inttypes [system] { |
| ... | ... | @@ -239,6 +253,11 @@ module _Builtin_stdbool [system] { |
| 239 | 253 | export * |
| 240 | 254 | } |
| 241 | 255 | |
| 256 | module _Builtin_stdckdint [system] { | |
| 257 | header "stdckdint.h" | |
| 258 | export * | |
| 259 | } | |
| 260 | ||
| 242 | 261 | module _Builtin_stdcountof [system] { |
| 243 | 262 | header "stdcountof.h" |
| 244 | 263 | export * |
| ... | ... | @@ -329,13 +348,13 @@ module _Builtin_unwind [system] { |
| 329 | 348 | } |
| 330 | 349 | // End -fbuiltin-headers-in-system-modules affected modules |
| 331 | 350 | |
| 332 | module opencl_c { | |
| 351 | module opencl_c [system] { | |
| 333 | 352 | requires opencl |
| 334 | 353 | header "opencl-c.h" |
| 335 | 354 | header "opencl-c-base.h" |
| 336 | 355 | } |
| 337 | 356 | |
| 338 | module ptrauth { | |
| 357 | module ptrauth [system] { | |
| 339 | 358 | header "ptrauth.h" |
| 340 | 359 | export * |
| 341 | 360 | } |
lib/include/movrs_avx10_2_512intrin.h+2-2| ... | ... | @@ -17,8 +17,8 @@ |
| 17 | 17 | |
| 18 | 18 | /* Define the default attributes for the functions in this file. */ |
| 19 | 19 | #define __DEFAULT_FN_ATTRS512 \ |
| 20 | __attribute__((__always_inline__, __nodebug__, \ | |
| 21 | __target__("movrs, avx10.2-512"), __min_vector_width__(512))) | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("movrs, avx10.2"), \ | |
| 21 | __min_vector_width__(512))) | |
| 22 | 22 | |
| 23 | 23 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 |
| 24 | 24 | _mm512_loadrs_epi8(void const *__A) { |
lib/include/movrs_avx10_2intrin.h+4-4| ... | ... | @@ -17,11 +17,11 @@ |
| 17 | 17 | |
| 18 | 18 | /* Define the default attributes for the functions in this file. */ |
| 19 | 19 | #define __DEFAULT_FN_ATTRS128 \ |
| 20 | __attribute__((__always_inline__, __nodebug__, \ | |
| 21 | __target__("movrs,avx10.2-256"), __min_vector_width__(128))) | |
| 20 | __attribute__((__always_inline__, __nodebug__, __target__("movrs,avx10.2"), \ | |
| 21 | __min_vector_width__(128))) | |
| 22 | 22 | #define __DEFAULT_FN_ATTRS256 \ |
| 23 | __attribute__((__always_inline__, __nodebug__, \ | |
| 24 | __target__("movrs,avx10.2-256"), __min_vector_width__(256))) | |
| 23 | __attribute__((__always_inline__, __nodebug__, __target__("movrs,avx10.2"), \ | |
| 24 | __min_vector_width__(256))) | |
| 25 | 25 | |
| 26 | 26 | static __inline__ __m128i __DEFAULT_FN_ATTRS128 |
| 27 | 27 | _mm_loadrs_epi8(void const *__A) { |
lib/include/pmmintrin.h+12-24| ... | ... | @@ -17,15 +17,9 @@ |
| 17 | 17 | #include <emmintrin.h> |
| 18 | 18 | |
| 19 | 19 | /* Define the default attributes for the functions in this file. */ |
| 20 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 21 | #define __DEFAULT_FN_ATTRS \ | |
| 22 | __attribute__((__always_inline__, __nodebug__, \ | |
| 23 | __target__("sse3,no-evex512"), __min_vector_width__(128))) | |
| 24 | #else | |
| 25 | 20 | #define __DEFAULT_FN_ATTRS \ |
| 26 | 21 | __attribute__((__always_inline__, __nodebug__, __target__("sse3"), \ |
| 27 | 22 | __min_vector_width__(128))) |
| 28 | #endif | |
| 29 | 23 | |
| 30 | 24 | #if defined(__cplusplus) && (__cplusplus >= 201103L) |
| 31 | 25 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr |
| ... | ... | @@ -66,9 +60,8 @@ _mm_lddqu_si128(__m128i_u const *__p) |
| 66 | 60 | /// A 128-bit vector of [4 x float] containing the right source operand. |
| 67 | 61 | /// \returns A 128-bit vector of [4 x float] containing the alternating sums and |
| 68 | 62 | /// differences of both operands. |
| 69 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 70 | _mm_addsub_ps(__m128 __a, __m128 __b) | |
| 71 | { | |
| 63 | static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 64 | _mm_addsub_ps(__m128 __a, __m128 __b) { | |
| 72 | 65 | return __builtin_ia32_addsubps((__v4sf)__a, (__v4sf)__b); |
| 73 | 66 | } |
| 74 | 67 | |
| ... | ... | @@ -89,9 +82,8 @@ _mm_addsub_ps(__m128 __a, __m128 __b) |
| 89 | 82 | /// destination. |
| 90 | 83 | /// \returns A 128-bit vector of [4 x float] containing the horizontal sums of |
| 91 | 84 | /// both operands. |
| 92 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 93 | _mm_hadd_ps(__m128 __a, __m128 __b) | |
| 94 | { | |
| 85 | static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadd_ps(__m128 __a, | |
| 86 | __m128 __b) { | |
| 95 | 87 | return __builtin_ia32_haddps((__v4sf)__a, (__v4sf)__b); |
| 96 | 88 | } |
| 97 | 89 | |
| ... | ... | @@ -112,9 +104,8 @@ _mm_hadd_ps(__m128 __a, __m128 __b) |
| 112 | 104 | /// bits of the destination. |
| 113 | 105 | /// \returns A 128-bit vector of [4 x float] containing the horizontal |
| 114 | 106 | /// differences of both operands. |
| 115 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 116 | _mm_hsub_ps(__m128 __a, __m128 __b) | |
| 117 | { | |
| 107 | static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsub_ps(__m128 __a, | |
| 108 | __m128 __b) { | |
| 118 | 109 | return __builtin_ia32_hsubps((__v4sf)__a, (__v4sf)__b); |
| 119 | 110 | } |
| 120 | 111 | |
| ... | ... | @@ -174,9 +165,8 @@ _mm_moveldup_ps(__m128 __a) |
| 174 | 165 | /// A 128-bit vector of [2 x double] containing the right source operand. |
| 175 | 166 | /// \returns A 128-bit vector of [2 x double] containing the alternating sums |
| 176 | 167 | /// and differences of both operands. |
| 177 | static __inline__ __m128d __DEFAULT_FN_ATTRS | |
| 178 | _mm_addsub_pd(__m128d __a, __m128d __b) | |
| 179 | { | |
| 168 | static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 169 | _mm_addsub_pd(__m128d __a, __m128d __b) { | |
| 180 | 170 | return __builtin_ia32_addsubpd((__v2df)__a, (__v2df)__b); |
| 181 | 171 | } |
| 182 | 172 | |
| ... | ... | @@ -197,9 +187,8 @@ _mm_addsub_pd(__m128d __a, __m128d __b) |
| 197 | 187 | /// destination. |
| 198 | 188 | /// \returns A 128-bit vector of [2 x double] containing the horizontal sums of |
| 199 | 189 | /// both operands. |
| 200 | static __inline__ __m128d __DEFAULT_FN_ATTRS | |
| 201 | _mm_hadd_pd(__m128d __a, __m128d __b) | |
| 202 | { | |
| 190 | static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 191 | _mm_hadd_pd(__m128d __a, __m128d __b) { | |
| 203 | 192 | return __builtin_ia32_haddpd((__v2df)__a, (__v2df)__b); |
| 204 | 193 | } |
| 205 | 194 | |
| ... | ... | @@ -220,9 +209,8 @@ _mm_hadd_pd(__m128d __a, __m128d __b) |
| 220 | 209 | /// the destination. |
| 221 | 210 | /// \returns A 128-bit vector of [2 x double] containing the horizontal |
| 222 | 211 | /// differences of both operands. |
| 223 | static __inline__ __m128d __DEFAULT_FN_ATTRS | |
| 224 | _mm_hsub_pd(__m128d __a, __m128d __b) | |
| 225 | { | |
| 212 | static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 213 | _mm_hsub_pd(__m128d __a, __m128d __b) { | |
| 226 | 214 | return __builtin_ia32_hsubpd((__v2df)__a, (__v2df)__b); |
| 227 | 215 | } |
| 228 | 216 |
lib/include/ptrauth.h+16-2| ... | ... | @@ -95,7 +95,7 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t; |
| 95 | 95 | __ptrauth qualifier; the compiler will perform this check |
| 96 | 96 | automatically. */ |
| 97 | 97 | |
| 98 | #if __has_feature(ptrauth_intrinsics) | |
| 98 | #if __has_feature(ptrauth_intrinsics) || defined(__PTRAUTH__) | |
| 99 | 99 | |
| 100 | 100 | /* Strip the signature from a value without authenticating it. |
| 101 | 101 | |
| ... | ... | @@ -241,6 +241,18 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t; |
| 241 | 241 | #define ptrauth_type_discriminator(__type) \ |
| 242 | 242 | __builtin_ptrauth_type_discriminator(__type) |
| 243 | 243 | |
| 244 | /* Compute the constant discriminator used by Clang to sign pointers with the | |
| 245 | given C function pointer type. | |
| 246 | ||
| 247 | A call to this function is an integer constant expression. */ | |
| 248 | #if __has_feature(ptrauth_function_pointer_type_discrimination) | |
| 249 | #define ptrauth_function_pointer_type_discriminator(__type) \ | |
| 250 | __builtin_ptrauth_type_discriminator(__type) | |
| 251 | #else | |
| 252 | #define ptrauth_function_pointer_type_discriminator(__type) \ | |
| 253 | ((ptrauth_extra_data_t)0) | |
| 254 | #endif | |
| 255 | ||
| 244 | 256 | /* Compute a signature for the given pair of pointer-sized values. |
| 245 | 257 | The order of the arguments is significant. |
| 246 | 258 | |
| ... | ... | @@ -372,6 +384,8 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t; |
| 372 | 384 | }) |
| 373 | 385 | |
| 374 | 386 | #define ptrauth_type_discriminator(__type) ((ptrauth_extra_data_t)0) |
| 387 | #define ptrauth_function_pointer_type_discriminator(__type) \ | |
| 388 | ((ptrauth_extra_data_t)0) | |
| 375 | 389 | |
| 376 | 390 | #define ptrauth_sign_generic_data(__value, __data) \ |
| 377 | 391 | ({ \ |
| ... | ... | @@ -388,6 +402,6 @@ typedef __UINTPTR_TYPE__ ptrauth_generic_signature_t; |
| 388 | 402 | #define __ptrauth_objc_isa_uintptr |
| 389 | 403 | #define __ptrauth_objc_super_pointer |
| 390 | 404 | |
| 391 | #endif /* __has_feature(ptrauth_intrinsics) */ | |
| 405 | #endif /* __has_feature(ptrauth_intrinsics) || defined(__PTRAUTH__) */ | |
| 392 | 406 | |
| 393 | 407 | #endif /* __PTRAUTH_H */ |
lib/include/riscv_mips.h created+34| ... | ... | @@ -0,0 +1,34 @@ |
| 1 | //===----- riscv_mips.h - RISC-V MIPS Intrinsic definitions | |
| 2 | //----------------------===// | |
| 3 | // | |
| 4 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 5 | // See https://llvm.org/LICENSE.txt for license information. | |
| 6 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 7 | // | |
| 8 | //===----------------------------------------------------------------------===// | |
| 9 | ||
| 10 | #ifndef __RISCV_MIPS_H | |
| 11 | #define __RISCV_MIPS_H | |
| 12 | ||
| 13 | #if !defined(__riscv) | |
| 14 | #error "This header is only meant to be used on riscv architecture" | |
| 15 | #endif | |
| 16 | ||
| 17 | #define __DEFAULT_FN_ATTRS \ | |
| 18 | __attribute__((__always_inline__, __nodebug__, __target__("xmipsexectl"))) | |
| 19 | ||
| 20 | static __inline__ void __DEFAULT_FN_ATTRS __mips_pause() { | |
| 21 | __builtin_riscv_mips_pause(); | |
| 22 | } | |
| 23 | ||
| 24 | static __inline__ void __DEFAULT_FN_ATTRS __mips_ehb() { | |
| 25 | __builtin_riscv_mips_ehb(); | |
| 26 | } | |
| 27 | ||
| 28 | static __inline__ void __DEFAULT_FN_ATTRS __mips_ihb() { | |
| 29 | __builtin_riscv_mips_ihb(); | |
| 30 | } | |
| 31 | ||
| 32 | #undef __DEFAULT_FN_ATTRS | |
| 33 | ||
| 34 | #endif |
lib/include/riscv_nds.h created+89| ... | ... | @@ -0,0 +1,89 @@ |
| 1 | /*===---- riscv_nds.h - Andes intrinsics -----------------------------------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===-----------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __RISCV_NDS_H | |
| 11 | #define __RISCV_NDS_H | |
| 12 | ||
| 13 | #include <stdint.h> | |
| 14 | ||
| 15 | #if defined(__cplusplus) | |
| 16 | extern "C" { | |
| 17 | #endif | |
| 18 | ||
| 19 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) | |
| 20 | ||
| 21 | #if defined(__riscv_xandesperf) | |
| 22 | ||
| 23 | #if __riscv_xlen == 32 | |
| 24 | ||
| 25 | static __inline__ int32_t __DEFAULT_FN_ATTRS __riscv_nds_ffb_32(uint32_t __a, | |
| 26 | uint32_t __b) { | |
| 27 | return __builtin_riscv_nds_ffb_32(__a, __b); | |
| 28 | } | |
| 29 | ||
| 30 | static __inline__ int32_t __DEFAULT_FN_ATTRS | |
| 31 | __riscv_nds_ffzmism_32(uint32_t __a, uint32_t __b) { | |
| 32 | return __builtin_riscv_nds_ffzmism_32(__a, __b); | |
| 33 | } | |
| 34 | ||
| 35 | static __inline__ int32_t __DEFAULT_FN_ATTRS | |
| 36 | __riscv_nds_ffmism_32(uint32_t __a, uint32_t __b) { | |
| 37 | return __builtin_riscv_nds_ffmism_32(__a, __b); | |
| 38 | } | |
| 39 | ||
| 40 | static __inline__ int32_t __DEFAULT_FN_ATTRS | |
| 41 | __riscv_nds_flmism_32(uint32_t __a, uint32_t __b) { | |
| 42 | return __builtin_riscv_nds_flmism_32(__a, __b); | |
| 43 | } | |
| 44 | ||
| 45 | #endif | |
| 46 | ||
| 47 | #if __riscv_xlen == 64 | |
| 48 | ||
| 49 | static __inline__ int64_t __DEFAULT_FN_ATTRS __riscv_nds_ffb_64(uint64_t __a, | |
| 50 | uint64_t __b) { | |
| 51 | return __builtin_riscv_nds_ffb_64(__a, __b); | |
| 52 | } | |
| 53 | ||
| 54 | static __inline__ int64_t __DEFAULT_FN_ATTRS | |
| 55 | __riscv_nds_ffzmism_64(uint64_t __a, uint64_t __b) { | |
| 56 | return __builtin_riscv_nds_ffzmism_64(__a, __b); | |
| 57 | } | |
| 58 | ||
| 59 | static __inline__ int64_t __DEFAULT_FN_ATTRS | |
| 60 | __riscv_nds_ffmism_64(uint64_t __a, uint64_t __b) { | |
| 61 | return __builtin_riscv_nds_ffmism_64(__a, __b); | |
| 62 | } | |
| 63 | ||
| 64 | static __inline__ int64_t __DEFAULT_FN_ATTRS | |
| 65 | __riscv_nds_flmism_64(uint64_t __a, uint64_t __b) { | |
| 66 | return __builtin_riscv_nds_flmism_64(__a, __b); | |
| 67 | } | |
| 68 | ||
| 69 | #endif | |
| 70 | ||
| 71 | #endif // defined(__riscv_xandesperf) | |
| 72 | ||
| 73 | #if defined(__riscv_xandesbfhcvt) | |
| 74 | ||
| 75 | static __inline__ float __DEFAULT_FN_ATTRS __riscv_nds_fcvt_s_bf16(__bf16 bf) { | |
| 76 | return __builtin_riscv_nds_fcvt_s_bf16(bf); | |
| 77 | } | |
| 78 | ||
| 79 | static __inline__ __bf16 __DEFAULT_FN_ATTRS __riscv_nds_fcvt_bf16_s(float sf) { | |
| 80 | return __builtin_riscv_nds_fcvt_bf16_s(sf); | |
| 81 | } | |
| 82 | ||
| 83 | #endif // defined(__riscv_xandesbfhcvt) | |
| 84 | ||
| 85 | #if defined(__cplusplus) | |
| 86 | } | |
| 87 | #endif | |
| 88 | ||
| 89 | #endif // define __RISCV_NDS_H |
lib/include/sifive_vector.h+58-2| ... | ... | @@ -47,9 +47,9 @@ |
| 47 | 47 | __riscv_sf_vc_x_se(p27_26, p24_20, p11_7, (uint32_t)rs1, 32, 3, vl) |
| 48 | 48 | |
| 49 | 49 | #define __riscv_sf_vc_i_se_u8mf4(p27_26, p24_20, p11_7, simm5, vl) \ |
| 50 | __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 7, vl) | |
| 51 | #define __riscv_sf_vc_i_se_u8mf2(p27_26, p24_20, p11_7, simm5, vl) \ | |
| 52 | 50 | __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 6, vl) |
| 51 | #define __riscv_sf_vc_i_se_u8mf2(p27_26, p24_20, p11_7, simm5, vl) \ | |
| 52 | __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 7, vl) | |
| 53 | 53 | #define __riscv_sf_vc_i_se_u8m1(p27_26, p24_20, p11_7, simm5, vl) \ |
| 54 | 54 | __riscv_sf_vc_i_se(p27_26, p24_20, p11_7, simm5, 8, 0, vl) |
| 55 | 55 | #define __riscv_sf_vc_i_se_u8m2(p27_26, p24_20, p11_7, simm5, vl) \ |
| ... | ... | @@ -115,4 +115,60 @@ |
| 115 | 115 | #endif |
| 116 | 116 | #endif |
| 117 | 117 | |
| 118 | #define __riscv_sf_vsettnt_e8w1(atn) __riscv_sf_vsettnt(atn, 0, 1); | |
| 119 | #define __riscv_sf_vsettnt_e8w2(atn) __riscv_sf_vsettnt(atn, 0, 2); | |
| 120 | #define __riscv_sf_vsettnt_e8w4(atn) __riscv_sf_vsettnt(atn, 0, 3); | |
| 121 | #define __riscv_sf_vsettnt_e16w1(atn) __riscv_sf_vsettnt(atn, 1, 1); | |
| 122 | #define __riscv_sf_vsettnt_e16w2(atn) __riscv_sf_vsettnt(atn, 1, 2); | |
| 123 | #define __riscv_sf_vsettnt_e16w4(atn) __riscv_sf_vsettnt(atn, 1, 3); | |
| 124 | #define __riscv_sf_vsettnt_e32w1(atn) __riscv_sf_vsettnt(atn, 2, 1); | |
| 125 | #define __riscv_sf_vsettnt_e32w2(atn) __riscv_sf_vsettnt(atn, 2, 2); | |
| 126 | #define __riscv_sf_vsettm_e8w1(atm) __riscv_sf_vsettm(atm, 0, 1); | |
| 127 | #define __riscv_sf_vsettm_e8w2(atm) __riscv_sf_vsettm(atm, 0, 2); | |
| 128 | #define __riscv_sf_vsettm_e8w4(atm) __riscv_sf_vsettm(atm, 0, 3); | |
| 129 | #define __riscv_sf_vsettm_e16w1(atm) __riscv_sf_vsettm(atm, 1, 1); | |
| 130 | #define __riscv_sf_vsettm_e16w2(atm) __riscv_sf_vsettm(atm, 1, 2); | |
| 131 | #define __riscv_sf_vsettm_e16w4(atm) __riscv_sf_vsettm(atm, 1, 3); | |
| 132 | #define __riscv_sf_vsettm_e32w1(atm) __riscv_sf_vsettm(atm, 2, 1); | |
| 133 | #define __riscv_sf_vsettm_e32w2(atm) __riscv_sf_vsettm(atm, 2, 2); | |
| 134 | #define __riscv_sf_vsettn_e8w1(atn) __riscv_sf_vsettn(atn, 0, 1); | |
| 135 | #define __riscv_sf_vsettn_e8w2(atn) __riscv_sf_vsettn(atn, 0, 2); | |
| 136 | #define __riscv_sf_vsettn_e8w4(atn) __riscv_sf_vsettn(atn, 0, 3); | |
| 137 | #define __riscv_sf_vsettn_e16w1(atn) __riscv_sf_vsettn(atn, 1, 1); | |
| 138 | #define __riscv_sf_vsettn_e16w2(atn) __riscv_sf_vsettn(atn, 1, 2); | |
| 139 | #define __riscv_sf_vsettn_e16w4(atn) __riscv_sf_vsettn(atn, 1, 3); | |
| 140 | #define __riscv_sf_vsettn_e32w1(atn) __riscv_sf_vsettn(atn, 2, 1); | |
| 141 | #define __riscv_sf_vsettn_e32w2(atn) __riscv_sf_vsettn(atn, 2, 2); | |
| 142 | #define __riscv_sf_vsettk_e8w1(atk) __riscv_sf_vsettk(atk, 0, 1); | |
| 143 | #define __riscv_sf_vsettk_e8w2(atk) __riscv_sf_vsettk(atk, 0, 2); | |
| 144 | #define __riscv_sf_vsettk_e8w4(atk) __riscv_sf_vsettk(atk, 0, 3); | |
| 145 | #define __riscv_sf_vsettk_e16w1(atk) __riscv_sf_vsettk(atk, 1, 1); | |
| 146 | #define __riscv_sf_vsettk_e16w2(atk) __riscv_sf_vsettk(atk, 1, 2); | |
| 147 | #define __riscv_sf_vsettk_e16w4(atk) __riscv_sf_vsettk(atk, 1, 3); | |
| 148 | #define __riscv_sf_vsettk_e32w1(atk) __riscv_sf_vsettk(atk, 2, 1); | |
| 149 | #define __riscv_sf_vsettk_e32w2(atk) __riscv_sf_vsettk(atk, 2, 2); | |
| 150 | #define __riscv_sf_vtzero_t_e8w1(tile, atm, atn) \ | |
| 151 | __riscv_sf_vtzero_t(tile, atm, atn, 3, 1); | |
| 152 | #define __riscv_sf_vtzero_t_e8w2(tile, atm, atn) \ | |
| 153 | __riscv_sf_vtzero_t(tile, atm, atn, 3, 2); | |
| 154 | #define __riscv_sf_vtzero_t_e8w4(tile, atm, atn) \ | |
| 155 | __riscv_sf_vtzero_t(tile, atm, atn, 3, 4); | |
| 156 | #define __riscv_sf_vtzero_t_e16w1(tile, atm, atn) \ | |
| 157 | __riscv_sf_vtzero_t(tile, atm, atn, 4, 1); | |
| 158 | #define __riscv_sf_vtzero_t_e16w2(tile, atm, atn) \ | |
| 159 | __riscv_sf_vtzero_t(tile, atm, atn, 4, 2); | |
| 160 | #define __riscv_sf_vtzero_t_e16w4(tile, atm, atn) \ | |
| 161 | __riscv_sf_vtzero_t(tile, atm, atn, 4, 4); | |
| 162 | #define __riscv_sf_vtzero_t_e32w1(tile, atm, atn) \ | |
| 163 | __riscv_sf_vtzero_t(tile, atm, atn, 5, 1); | |
| 164 | #define __riscv_sf_vtzero_t_e32w2(tile, atm, atn) \ | |
| 165 | __riscv_sf_vtzero_t(tile, atm, atn, 5, 2); | |
| 166 | #if __riscv_v_elen >= 64 | |
| 167 | #define __riscv_sf_vsettnt_e64w1(atn) __riscv_sf_vsettnt(atn, 3, 1); | |
| 168 | #define __riscv_sf_vsettm_e64w1(atm) __riscv_sf_vsettm(atm, 3, 1); | |
| 169 | #define __riscv_sf_vsettn_e64w1(atn) __riscv_sf_vsettn(atn, 3, 1); | |
| 170 | #define __riscv_sf_vsettk_e64w1(atk) __riscv_sf_vsettk(atk, 3, 1); | |
| 171 | #define __riscv_sf_vtzero_t_e64w1(tile, atm, atn) \ | |
| 172 | __riscv_sf_vtzero_t(tile, atm, atn, 6, 1); | |
| 173 | #endif | |
| 118 | 174 | #endif //_SIFIVE_VECTOR_H_ |
lib/include/sm4evexintrin.h+2-2| ... | ... | @@ -14,8 +14,8 @@ |
| 14 | 14 | #define __SM4EVEXINTRIN_H |
| 15 | 15 | |
| 16 | 16 | #define __DEFAULT_FN_ATTRS512 \ |
| 17 | __attribute__((__always_inline__, __nodebug__, \ | |
| 18 | __target__("sm4,avx10.2-512"), __min_vector_width__(512))) | |
| 17 | __attribute__((__always_inline__, __nodebug__, __target__("sm4,avx10.2"), \ | |
| 18 | __min_vector_width__(512))) | |
| 19 | 19 | |
| 20 | 20 | static __inline__ __m512i __DEFAULT_FN_ATTRS512 |
| 21 | 21 | _mm512_sm4key4_epi32(__m512i __A, __m512i __B) { |
lib/include/smmintrin.h+77-59| ... | ... | @@ -17,14 +17,14 @@ |
| 17 | 17 | #include <tmmintrin.h> |
| 18 | 18 | |
| 19 | 19 | /* Define the default attributes for the functions in this file. */ |
| 20 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 21 | #define __DEFAULT_FN_ATTRS \ | |
| 22 | __attribute__((__always_inline__, __nodebug__, \ | |
| 23 | __target__("sse4.1,no-evex512"), __min_vector_width__(128))) | |
| 24 | #else | |
| 25 | 20 | #define __DEFAULT_FN_ATTRS \ |
| 26 | 21 | __attribute__((__always_inline__, __nodebug__, __target__("sse4.1"), \ |
| 27 | 22 | __min_vector_width__(128))) |
| 23 | ||
| 24 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 25 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 26 | #else | |
| 27 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 28 | 28 | #endif |
| 29 | 29 | |
| 30 | 30 | /* SSE4 Rounding macros. */ |
| ... | ... | @@ -439,9 +439,8 @@ |
| 439 | 439 | /// position in the result. When a mask bit is 1, the corresponding 64-bit |
| 440 | 440 | /// element in operand \a __V2 is copied to the same position in the result. |
| 441 | 441 | /// \returns A 128-bit vector of [2 x double] containing the copied values. |
| 442 | static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_blendv_pd(__m128d __V1, | |
| 443 | __m128d __V2, | |
| 444 | __m128d __M) { | |
| 442 | static __inline__ __m128d __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 443 | _mm_blendv_pd(__m128d __V1, __m128d __V2, __m128d __M) { | |
| 445 | 444 | return (__m128d)__builtin_ia32_blendvpd((__v2df)__V1, (__v2df)__V2, |
| 446 | 445 | (__v2df)__M); |
| 447 | 446 | } |
| ... | ... | @@ -466,9 +465,8 @@ static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_blendv_pd(__m128d __V1, |
| 466 | 465 | /// position in the result. When a mask bit is 1, the corresponding 32-bit |
| 467 | 466 | /// element in operand \a __V2 is copied to the same position in the result. |
| 468 | 467 | /// \returns A 128-bit vector of [4 x float] containing the copied values. |
| 469 | static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_blendv_ps(__m128 __V1, | |
| 470 | __m128 __V2, | |
| 471 | __m128 __M) { | |
| 468 | static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 469 | _mm_blendv_ps(__m128 __V1, __m128 __V2, __m128 __M) { | |
| 472 | 470 | return (__m128)__builtin_ia32_blendvps((__v4sf)__V1, (__v4sf)__V2, |
| 473 | 471 | (__v4sf)__M); |
| 474 | 472 | } |
| ... | ... | @@ -493,9 +491,8 @@ static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_blendv_ps(__m128 __V1, |
| 493 | 491 | /// position in the result. When a mask bit is 1, the corresponding 8-bit |
| 494 | 492 | /// element in operand \a __V2 is copied to the same position in the result. |
| 495 | 493 | /// \returns A 128-bit vector of [16 x i8] containing the copied values. |
| 496 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_blendv_epi8(__m128i __V1, | |
| 497 | __m128i __V2, | |
| 498 | __m128i __M) { | |
| 494 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 495 | _mm_blendv_epi8(__m128i __V1, __m128i __V2, __m128i __M) { | |
| 499 | 496 | return (__m128i)__builtin_ia32_pblendvb128((__v16qi)__V1, (__v16qi)__V2, |
| 500 | 497 | (__v16qi)__M); |
| 501 | 498 | } |
| ... | ... | @@ -542,8 +539,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_blendv_epi8(__m128i __V1, |
| 542 | 539 | /// \param __V2 |
| 543 | 540 | /// A 128-bit integer vector. |
| 544 | 541 | /// \returns A 128-bit integer vector containing the products of both operands. |
| 545 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi32(__m128i __V1, | |
| 546 | __m128i __V2) { | |
| 542 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 543 | _mm_mullo_epi32(__m128i __V1, __m128i __V2) { | |
| 547 | 544 | return (__m128i)((__v4su)__V1 * (__v4su)__V2); |
| 548 | 545 | } |
| 549 | 546 | |
| ... | ... | @@ -561,8 +558,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi32(__m128i __V1, |
| 561 | 558 | /// A 128-bit vector of [4 x i32]. |
| 562 | 559 | /// \returns A 128-bit vector of [2 x i64] containing the products of both |
| 563 | 560 | /// operands. |
| 564 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epi32(__m128i __V1, | |
| 565 | __m128i __V2) { | |
| 561 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 562 | _mm_mul_epi32(__m128i __V1, __m128i __V2) { | |
| 566 | 563 | return (__m128i)__builtin_ia32_pmuldq128((__v4si)__V1, (__v4si)__V2); |
| 567 | 564 | } |
| 568 | 565 | |
| ... | ... | @@ -669,8 +666,8 @@ _mm_stream_load_si128(const void *__V) { |
| 669 | 666 | /// \param __V2 |
| 670 | 667 | /// A 128-bit vector of [16 x i8] |
| 671 | 668 | /// \returns A 128-bit vector of [16 x i8] containing the lesser values. |
| 672 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi8(__m128i __V1, | |
| 673 | __m128i __V2) { | |
| 669 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 670 | _mm_min_epi8(__m128i __V1, __m128i __V2) { | |
| 674 | 671 | return (__m128i)__builtin_elementwise_min((__v16qs)__V1, (__v16qs)__V2); |
| 675 | 672 | } |
| 676 | 673 | |
| ... | ... | @@ -687,8 +684,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi8(__m128i __V1, |
| 687 | 684 | /// \param __V2 |
| 688 | 685 | /// A 128-bit vector of [16 x i8]. |
| 689 | 686 | /// \returns A 128-bit vector of [16 x i8] containing the greater values. |
| 690 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi8(__m128i __V1, | |
| 691 | __m128i __V2) { | |
| 687 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 688 | _mm_max_epi8(__m128i __V1, __m128i __V2) { | |
| 692 | 689 | return (__m128i)__builtin_elementwise_max((__v16qs)__V1, (__v16qs)__V2); |
| 693 | 690 | } |
| 694 | 691 | |
| ... | ... | @@ -705,8 +702,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi8(__m128i __V1, |
| 705 | 702 | /// \param __V2 |
| 706 | 703 | /// A 128-bit vector of [8 x u16]. |
| 707 | 704 | /// \returns A 128-bit vector of [8 x u16] containing the lesser values. |
| 708 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu16(__m128i __V1, | |
| 709 | __m128i __V2) { | |
| 705 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 706 | _mm_min_epu16(__m128i __V1, __m128i __V2) { | |
| 710 | 707 | return (__m128i)__builtin_elementwise_min((__v8hu)__V1, (__v8hu)__V2); |
| 711 | 708 | } |
| 712 | 709 | |
| ... | ... | @@ -723,8 +720,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu16(__m128i __V1, |
| 723 | 720 | /// \param __V2 |
| 724 | 721 | /// A 128-bit vector of [8 x u16]. |
| 725 | 722 | /// \returns A 128-bit vector of [8 x u16] containing the greater values. |
| 726 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu16(__m128i __V1, | |
| 727 | __m128i __V2) { | |
| 723 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 724 | _mm_max_epu16(__m128i __V1, __m128i __V2) { | |
| 728 | 725 | return (__m128i)__builtin_elementwise_max((__v8hu)__V1, (__v8hu)__V2); |
| 729 | 726 | } |
| 730 | 727 | |
| ... | ... | @@ -741,8 +738,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu16(__m128i __V1, |
| 741 | 738 | /// \param __V2 |
| 742 | 739 | /// A 128-bit vector of [4 x i32]. |
| 743 | 740 | /// \returns A 128-bit vector of [4 x i32] containing the lesser values. |
| 744 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi32(__m128i __V1, | |
| 745 | __m128i __V2) { | |
| 741 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 742 | _mm_min_epi32(__m128i __V1, __m128i __V2) { | |
| 746 | 743 | return (__m128i)__builtin_elementwise_min((__v4si)__V1, (__v4si)__V2); |
| 747 | 744 | } |
| 748 | 745 | |
| ... | ... | @@ -759,8 +756,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi32(__m128i __V1, |
| 759 | 756 | /// \param __V2 |
| 760 | 757 | /// A 128-bit vector of [4 x i32]. |
| 761 | 758 | /// \returns A 128-bit vector of [4 x i32] containing the greater values. |
| 762 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi32(__m128i __V1, | |
| 763 | __m128i __V2) { | |
| 759 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 760 | _mm_max_epi32(__m128i __V1, __m128i __V2) { | |
| 764 | 761 | return (__m128i)__builtin_elementwise_max((__v4si)__V1, (__v4si)__V2); |
| 765 | 762 | } |
| 766 | 763 | |
| ... | ... | @@ -777,8 +774,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi32(__m128i __V1, |
| 777 | 774 | /// \param __V2 |
| 778 | 775 | /// A 128-bit vector of [4 x u32]. |
| 779 | 776 | /// \returns A 128-bit vector of [4 x u32] containing the lesser values. |
| 780 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu32(__m128i __V1, | |
| 781 | __m128i __V2) { | |
| 777 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 778 | _mm_min_epu32(__m128i __V1, __m128i __V2) { | |
| 782 | 779 | return (__m128i)__builtin_elementwise_min((__v4su)__V1, (__v4su)__V2); |
| 783 | 780 | } |
| 784 | 781 | |
| ... | ... | @@ -795,8 +792,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu32(__m128i __V1, |
| 795 | 792 | /// \param __V2 |
| 796 | 793 | /// A 128-bit vector of [4 x u32]. |
| 797 | 794 | /// \returns A 128-bit vector of [4 x u32] containing the greater values. |
| 798 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1, | |
| 799 | __m128i __V2) { | |
| 795 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 796 | _mm_max_epu32(__m128i __V1, __m128i __V2) { | |
| 800 | 797 | return (__m128i)__builtin_elementwise_max((__v4su)__V1, (__v4su)__V2); |
| 801 | 798 | } |
| 802 | 799 | |
| ... | ... | @@ -1096,8 +1093,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu32(__m128i __V1, |
| 1096 | 1093 | /// \param __V |
| 1097 | 1094 | /// A 128-bit integer vector selecting which bits to test in operand \a __M. |
| 1098 | 1095 | /// \returns TRUE if the specified bits are all zeros; FALSE otherwise. |
| 1099 | static __inline__ int __DEFAULT_FN_ATTRS _mm_testz_si128(__m128i __M, | |
| 1100 | __m128i __V) { | |
| 1096 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1097 | _mm_testz_si128(__m128i __M, __m128i __V) { | |
| 1101 | 1098 | return __builtin_ia32_ptestz128((__v2di)__M, (__v2di)__V); |
| 1102 | 1099 | } |
| 1103 | 1100 | |
| ... | ... | @@ -1113,8 +1110,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testz_si128(__m128i __M, |
| 1113 | 1110 | /// \param __V |
| 1114 | 1111 | /// A 128-bit integer vector selecting which bits to test in operand \a __M. |
| 1115 | 1112 | /// \returns TRUE if the specified bits are all ones; FALSE otherwise. |
| 1116 | static __inline__ int __DEFAULT_FN_ATTRS _mm_testc_si128(__m128i __M, | |
| 1117 | __m128i __V) { | |
| 1113 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1114 | _mm_testc_si128(__m128i __M, __m128i __V) { | |
| 1118 | 1115 | return __builtin_ia32_ptestc128((__v2di)__M, (__v2di)__V); |
| 1119 | 1116 | } |
| 1120 | 1117 | |
| ... | ... | @@ -1131,8 +1128,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testc_si128(__m128i __M, |
| 1131 | 1128 | /// A 128-bit integer vector selecting which bits to test in operand \a __M. |
| 1132 | 1129 | /// \returns TRUE if the specified bits are neither all zeros nor all ones; |
| 1133 | 1130 | /// FALSE otherwise. |
| 1134 | static __inline__ int __DEFAULT_FN_ATTRS _mm_testnzc_si128(__m128i __M, | |
| 1135 | __m128i __V) { | |
| 1131 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1132 | _mm_testnzc_si128(__m128i __M, __m128i __V) { | |
| 1136 | 1133 | return __builtin_ia32_ptestnzc128((__v2di)__M, (__v2di)__V); |
| 1137 | 1134 | } |
| 1138 | 1135 | |
| ... | ... | @@ -1205,8 +1202,8 @@ static __inline__ int __DEFAULT_FN_ATTRS _mm_testnzc_si128(__m128i __M, |
| 1205 | 1202 | /// \param __V2 |
| 1206 | 1203 | /// A 128-bit integer vector. |
| 1207 | 1204 | /// \returns A 128-bit integer vector containing the comparison results. |
| 1208 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi64(__m128i __V1, | |
| 1209 | __m128i __V2) { | |
| 1205 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1206 | _mm_cmpeq_epi64(__m128i __V1, __m128i __V2) { | |
| 1210 | 1207 | return (__m128i)((__v2di)__V1 == (__v2di)__V2); |
| 1211 | 1208 | } |
| 1212 | 1209 | |
| ... | ... | @@ -1224,7 +1221,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi64(__m128i __V1, |
| 1224 | 1221 | /// A 128-bit vector of [16 x i8]. The lower eight 8-bit elements are |
| 1225 | 1222 | /// sign-extended to 16-bit values. |
| 1226 | 1223 | /// \returns A 128-bit vector of [8 x i16] containing the sign-extended values. |
| 1227 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi16(__m128i __V) { | |
| 1224 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1225 | _mm_cvtepi8_epi16(__m128i __V) { | |
| 1228 | 1226 | /* This function always performs a signed extension, but __v16qi is a char |
| 1229 | 1227 | which may be signed or unsigned, so use __v16qs. */ |
| 1230 | 1228 | return (__m128i) __builtin_convertvector( |
| ... | ... | @@ -1246,7 +1244,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi16(__m128i __V) { |
| 1246 | 1244 | /// A 128-bit vector of [16 x i8]. The lower four 8-bit elements are |
| 1247 | 1245 | /// sign-extended to 32-bit values. |
| 1248 | 1246 | /// \returns A 128-bit vector of [4 x i32] containing the sign-extended values. |
| 1249 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi32(__m128i __V) { | |
| 1247 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1248 | _mm_cvtepi8_epi32(__m128i __V) { | |
| 1250 | 1249 | /* This function always performs a signed extension, but __v16qi is a char |
| 1251 | 1250 | which may be signed or unsigned, so use __v16qs. */ |
| 1252 | 1251 | return (__m128i) __builtin_convertvector( |
| ... | ... | @@ -1266,7 +1265,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi32(__m128i __V) { |
| 1266 | 1265 | /// A 128-bit vector of [16 x i8]. The lower two 8-bit elements are |
| 1267 | 1266 | /// sign-extended to 64-bit values. |
| 1268 | 1267 | /// \returns A 128-bit vector of [2 x i64] containing the sign-extended values. |
| 1269 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi64(__m128i __V) { | |
| 1268 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1269 | _mm_cvtepi8_epi64(__m128i __V) { | |
| 1270 | 1270 | /* This function always performs a signed extension, but __v16qi is a char |
| 1271 | 1271 | which may be signed or unsigned, so use __v16qs. */ |
| 1272 | 1272 | return (__m128i) __builtin_convertvector( |
| ... | ... | @@ -1286,7 +1286,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi64(__m128i __V) { |
| 1286 | 1286 | /// A 128-bit vector of [8 x i16]. The lower four 16-bit elements are |
| 1287 | 1287 | /// sign-extended to 32-bit values. |
| 1288 | 1288 | /// \returns A 128-bit vector of [4 x i32] containing the sign-extended values. |
| 1289 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi32(__m128i __V) { | |
| 1289 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1290 | _mm_cvtepi16_epi32(__m128i __V) { | |
| 1290 | 1291 | return (__m128i) __builtin_convertvector( |
| 1291 | 1292 | __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4si); |
| 1292 | 1293 | } |
| ... | ... | @@ -1304,7 +1305,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi32(__m128i __V) { |
| 1304 | 1305 | /// A 128-bit vector of [8 x i16]. The lower two 16-bit elements are |
| 1305 | 1306 | /// sign-extended to 64-bit values. |
| 1306 | 1307 | /// \returns A 128-bit vector of [2 x i64] containing the sign-extended values. |
| 1307 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi64(__m128i __V) { | |
| 1308 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1309 | _mm_cvtepi16_epi64(__m128i __V) { | |
| 1308 | 1310 | return (__m128i) __builtin_convertvector( |
| 1309 | 1311 | __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1), __v2di); |
| 1310 | 1312 | } |
| ... | ... | @@ -1322,7 +1324,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi64(__m128i __V) { |
| 1322 | 1324 | /// A 128-bit vector of [4 x i32]. The lower two 32-bit elements are |
| 1323 | 1325 | /// sign-extended to 64-bit values. |
| 1324 | 1326 | /// \returns A 128-bit vector of [2 x i64] containing the sign-extended values. |
| 1325 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi32_epi64(__m128i __V) { | |
| 1327 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1328 | _mm_cvtepi32_epi64(__m128i __V) { | |
| 1326 | 1329 | return (__m128i) __builtin_convertvector( |
| 1327 | 1330 | __builtin_shufflevector((__v4si)__V, (__v4si)__V, 0, 1), __v2di); |
| 1328 | 1331 | } |
| ... | ... | @@ -1341,7 +1344,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi32_epi64(__m128i __V) { |
| 1341 | 1344 | /// A 128-bit vector of [16 x i8]. The lower eight 8-bit elements are |
| 1342 | 1345 | /// zero-extended to 16-bit values. |
| 1343 | 1346 | /// \returns A 128-bit vector of [8 x i16] containing the zero-extended values. |
| 1344 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi16(__m128i __V) { | |
| 1347 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1348 | _mm_cvtepu8_epi16(__m128i __V) { | |
| 1345 | 1349 | return (__m128i) __builtin_convertvector( |
| 1346 | 1350 | __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6, |
| 1347 | 1351 | 7), |
| ... | ... | @@ -1361,7 +1365,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi16(__m128i __V) { |
| 1361 | 1365 | /// A 128-bit vector of [16 x i8]. The lower four 8-bit elements are |
| 1362 | 1366 | /// zero-extended to 32-bit values. |
| 1363 | 1367 | /// \returns A 128-bit vector of [4 x i32] containing the zero-extended values. |
| 1364 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi32(__m128i __V) { | |
| 1368 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1369 | _mm_cvtepu8_epi32(__m128i __V) { | |
| 1365 | 1370 | return (__m128i) __builtin_convertvector( |
| 1366 | 1371 | __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4si); |
| 1367 | 1372 | } |
| ... | ... | @@ -1379,7 +1384,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi32(__m128i __V) { |
| 1379 | 1384 | /// A 128-bit vector of [16 x i8]. The lower two 8-bit elements are |
| 1380 | 1385 | /// zero-extended to 64-bit values. |
| 1381 | 1386 | /// \returns A 128-bit vector of [2 x i64] containing the zero-extended values. |
| 1382 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi64(__m128i __V) { | |
| 1387 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1388 | _mm_cvtepu8_epi64(__m128i __V) { | |
| 1383 | 1389 | return (__m128i) __builtin_convertvector( |
| 1384 | 1390 | __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1), __v2di); |
| 1385 | 1391 | } |
| ... | ... | @@ -1397,7 +1403,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi64(__m128i __V) { |
| 1397 | 1403 | /// A 128-bit vector of [8 x i16]. The lower four 16-bit elements are |
| 1398 | 1404 | /// zero-extended to 32-bit values. |
| 1399 | 1405 | /// \returns A 128-bit vector of [4 x i32] containing the zero-extended values. |
| 1400 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi32(__m128i __V) { | |
| 1406 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1407 | _mm_cvtepu16_epi32(__m128i __V) { | |
| 1401 | 1408 | return (__m128i) __builtin_convertvector( |
| 1402 | 1409 | __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4si); |
| 1403 | 1410 | } |
| ... | ... | @@ -1415,7 +1422,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi32(__m128i __V) { |
| 1415 | 1422 | /// A 128-bit vector of [8 x i16]. The lower two 16-bit elements are |
| 1416 | 1423 | /// zero-extended to 64-bit values. |
| 1417 | 1424 | /// \returns A 128-bit vector of [2 x i64] containing the zero-extended values. |
| 1418 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi64(__m128i __V) { | |
| 1425 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1426 | _mm_cvtepu16_epi64(__m128i __V) { | |
| 1419 | 1427 | return (__m128i) __builtin_convertvector( |
| 1420 | 1428 | __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1), __v2di); |
| 1421 | 1429 | } |
| ... | ... | @@ -1433,7 +1441,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi64(__m128i __V) { |
| 1433 | 1441 | /// A 128-bit vector of [4 x i32]. The lower two 32-bit elements are |
| 1434 | 1442 | /// zero-extended to 64-bit values. |
| 1435 | 1443 | /// \returns A 128-bit vector of [2 x i64] containing the zero-extended values. |
| 1436 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu32_epi64(__m128i __V) { | |
| 1444 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1445 | _mm_cvtepu32_epi64(__m128i __V) { | |
| 1437 | 1446 | return (__m128i) __builtin_convertvector( |
| 1438 | 1447 | __builtin_shufflevector((__v4su)__V, (__v4su)__V, 0, 1), __v2di); |
| 1439 | 1448 | } |
| ... | ... | @@ -1457,8 +1466,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu32_epi64(__m128i __V) { |
| 1457 | 1466 | /// A 128-bit vector of [4 x i32]. The converted [4 x i16] values are |
| 1458 | 1467 | /// written to the higher 64 bits of the result. |
| 1459 | 1468 | /// \returns A 128-bit vector of [8 x i16] containing the converted values. |
| 1460 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi32(__m128i __V1, | |
| 1461 | __m128i __V2) { | |
| 1469 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1470 | _mm_packus_epi32(__m128i __V1, __m128i __V2) { | |
| 1462 | 1471 | return (__m128i)__builtin_ia32_packusdw128((__v4si)__V1, (__v4si)__V2); |
| 1463 | 1472 | } |
| 1464 | 1473 | |
| ... | ... | @@ -1515,7 +1524,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi32(__m128i __V1, |
| 1515 | 1524 | /// \returns A 128-bit value where bits [15:0] contain the minimum value found |
| 1516 | 1525 | /// in parameter \a __V, bits [18:16] contain the index of the minimum value |
| 1517 | 1526 | /// and the remaining bits are set to 0. |
| 1518 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) { | |
| 1527 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1528 | _mm_minpos_epu16(__m128i __V) { | |
| 1519 | 1529 | return (__m128i)__builtin_ia32_phminposuw128((__v8hi)__V); |
| 1520 | 1530 | } |
| 1521 | 1531 | |
| ... | ... | @@ -1525,9 +1535,16 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) { |
| 1525 | 1535 | so we'll do the same. */ |
| 1526 | 1536 | |
| 1527 | 1537 | #undef __DEFAULT_FN_ATTRS |
| 1538 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 1528 | 1539 | #define __DEFAULT_FN_ATTRS \ |
| 1529 | 1540 | __attribute__((__always_inline__, __nodebug__, __target__("sse4.2"))) |
| 1530 | 1541 | |
| 1542 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 1543 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 1544 | #else | |
| 1545 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 1546 | #endif | |
| 1547 | ||
| 1531 | 1548 | /* These specify the type of data that we're comparing. */ |
| 1532 | 1549 | #define _SIDD_UBYTE_OPS 0x00 |
| 1533 | 1550 | #define _SIDD_UWORD_OPS 0x01 |
| ... | ... | @@ -2320,12 +2337,13 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) { |
| 2320 | 2337 | /// \param __V2 |
| 2321 | 2338 | /// A 128-bit integer vector. |
| 2322 | 2339 | /// \returns A 128-bit integer vector containing the comparison results. |
| 2323 | static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi64(__m128i __V1, | |
| 2324 | __m128i __V2) { | |
| 2340 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2341 | _mm_cmpgt_epi64(__m128i __V1, __m128i __V2) { | |
| 2325 | 2342 | return (__m128i)((__v2di)__V1 > (__v2di)__V2); |
| 2326 | 2343 | } |
| 2327 | 2344 | |
| 2328 | 2345 | #undef __DEFAULT_FN_ATTRS |
| 2346 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 2329 | 2347 | |
| 2330 | 2348 | #include <popcntintrin.h> |
| 2331 | 2349 |
lib/include/spirvintrin.h created+194| ... | ... | @@ -0,0 +1,194 @@ |
| 1 | //===-- spirvintrin.h - SPIR-V intrinsic functions ------------------------===// | |
| 2 | // | |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | // See https://llvm.org/LICENSE.txt for license information. | |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | // | |
| 7 | //===----------------------------------------------------------------------===// | |
| 8 | ||
| 9 | #ifndef __SPIRVINTRIN_H | |
| 10 | #define __SPIRVINTRIN_H | |
| 11 | ||
| 12 | #ifndef __SPIRV__ | |
| 13 | #error "This file is intended for SPIR-V targets or offloading to SPIR-V" | |
| 14 | #endif | |
| 15 | ||
| 16 | #ifndef __GPUINTRIN_H | |
| 17 | #error "Never use <spirvintrin.h> directly; include <gpuintrin.h> instead" | |
| 18 | #endif | |
| 19 | ||
| 20 | _Pragma("omp begin declare target device_type(nohost)"); | |
| 21 | _Pragma("omp begin declare variant match(device = {arch(spirv64)})"); | |
| 22 | ||
| 23 | // Type aliases to the address spaces used by the SPIR-V backend. | |
| 24 | #define __gpu_private __attribute__((address_space(0))) | |
| 25 | #define __gpu_constant __attribute__((address_space(2))) | |
| 26 | #define __gpu_local __attribute__((address_space(3))) | |
| 27 | #define __gpu_global __attribute__((address_space(1))) | |
| 28 | #define __gpu_generic __attribute__((address_space(4))) | |
| 29 | ||
| 30 | // Attribute to declare a function as a kernel. | |
| 31 | #define __gpu_kernel __attribute__((device_kernel, visibility("protected"))) | |
| 32 | ||
| 33 | // Returns the number of workgroups in the 'x' dimension of the grid. | |
| 34 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_blocks_x(void) { | |
| 35 | return __builtin_spirv_num_workgroups(0); | |
| 36 | } | |
| 37 | ||
| 38 | // Returns the number of workgroups in the 'y' dimension of the grid. | |
| 39 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_blocks_y(void) { | |
| 40 | return __builtin_spirv_num_workgroups(1); | |
| 41 | } | |
| 42 | ||
| 43 | // Returns the number of workgroups in the 'z' dimension of the grid. | |
| 44 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_blocks_z(void) { | |
| 45 | return __builtin_spirv_num_workgroups(2); | |
| 46 | } | |
| 47 | ||
| 48 | // Returns the 'x' dimension of the current workgroup's id. | |
| 49 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_block_id_x(void) { | |
| 50 | return __builtin_spirv_workgroup_id(0); | |
| 51 | } | |
| 52 | ||
| 53 | // Returns the 'y' dimension of the current workgroup's id. | |
| 54 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_block_id_y(void) { | |
| 55 | return __builtin_spirv_workgroup_id(1); | |
| 56 | } | |
| 57 | ||
| 58 | // Returns the 'z' dimension of the current workgroup's id. | |
| 59 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_block_id_z(void) { | |
| 60 | return __builtin_spirv_workgroup_id(2); | |
| 61 | } | |
| 62 | ||
| 63 | // Returns the number of workitems in the 'x' dimension. | |
| 64 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_threads_x(void) { | |
| 65 | return __builtin_spirv_workgroup_size(0); | |
| 66 | } | |
| 67 | ||
| 68 | // Returns the number of workitems in the 'y' dimension. | |
| 69 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_threads_y(void) { | |
| 70 | return __builtin_spirv_workgroup_size(1); | |
| 71 | } | |
| 72 | ||
| 73 | // Returns the number of workitems in the 'z' dimension. | |
| 74 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_threads_z(void) { | |
| 75 | return __builtin_spirv_workgroup_size(2); | |
| 76 | } | |
| 77 | ||
| 78 | // Returns the 'x' dimension id of the workitem in the current workgroup. | |
| 79 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_thread_id_x(void) { | |
| 80 | return __builtin_spirv_local_invocation_id(0); | |
| 81 | } | |
| 82 | ||
| 83 | // Returns the 'y' dimension id of the workitem in the current workgroup. | |
| 84 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_thread_id_y(void) { | |
| 85 | return __builtin_spirv_local_invocation_id(1); | |
| 86 | } | |
| 87 | ||
| 88 | // Returns the 'z' dimension id of the workitem in the current workgroup. | |
| 89 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_thread_id_z(void) { | |
| 90 | return __builtin_spirv_local_invocation_id(2); | |
| 91 | } | |
| 92 | ||
| 93 | // Returns the size of an wavefront, either 32 or 64 depending on hardware | |
| 94 | // and compilation options. | |
| 95 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_num_lanes(void) { | |
| 96 | return __builtin_spirv_subgroup_size(); | |
| 97 | } | |
| 98 | ||
| 99 | // Returns the id of the thread inside of an wavefront executing together. | |
| 100 | _DEFAULT_FN_ATTRS static __inline__ uint32_t __gpu_lane_id(void) { | |
| 101 | return __builtin_spirv_subgroup_local_invocation_id(); | |
| 102 | } | |
| 103 | ||
| 104 | // Returns the bit-mask of active threads in the current wavefront. This | |
| 105 | // implementation is incorrect if the target uses more than 64 lanes. | |
| 106 | _DEFAULT_FN_ATTRS static __inline__ uint64_t __gpu_lane_mask(void) { | |
| 107 | uint32_t [[clang::ext_vector_type(4)]] __mask = | |
| 108 | __builtin_spirv_subgroup_ballot(1); | |
| 109 | return __builtin_bit_cast(uint64_t, | |
| 110 | __builtin_shufflevector(__mask, __mask, 0, 1)); | |
| 111 | } | |
| 112 | ||
| 113 | // Copies the value from the first active thread in the wavefront to the rest. | |
| 114 | _DEFAULT_FN_ATTRS static __inline__ uint32_t | |
| 115 | __gpu_read_first_lane_u32(uint64_t __lane_mask, uint32_t __x) { | |
| 116 | return __builtin_spirv_subgroup_shuffle(__x, | |
| 117 | __builtin_ctzg(__gpu_lane_mask())); | |
| 118 | } | |
| 119 | ||
| 120 | // Returns a bitmask of threads in the current lane for which \p x is true. This | |
| 121 | // implementation is incorrect if the target uses more than 64 lanes. | |
| 122 | _DEFAULT_FN_ATTRS static __inline__ uint64_t __gpu_ballot(uint64_t __lane_mask, | |
| 123 | bool __x) { | |
| 124 | // The lane_mask & gives the nvptx semantics when lane_mask is a subset of | |
| 125 | // the active threads. | |
| 126 | uint32_t [[clang::ext_vector_type(4)]] __mask = | |
| 127 | __builtin_spirv_subgroup_ballot(__x); | |
| 128 | return __lane_mask & __builtin_bit_cast(uint64_t, __builtin_shufflevector( | |
| 129 | __mask, __mask, 0, 1)); | |
| 130 | } | |
| 131 | ||
| 132 | // Waits for all the threads in the block to converge and issues a fence. | |
| 133 | _DEFAULT_FN_ATTRS static __inline__ void __gpu_sync_threads(void) { | |
| 134 | __builtin_spirv_group_barrier(); | |
| 135 | } | |
| 136 | ||
| 137 | // Wait for all threads in the wavefront to converge, this is a noop on SPIR-V. | |
| 138 | _DEFAULT_FN_ATTRS static __inline__ void __gpu_sync_lane(uint64_t __lane_mask) { | |
| 139 | } | |
| 140 | ||
| 141 | // Shuffles the the lanes inside the wavefront according to the given index. | |
| 142 | _DEFAULT_FN_ATTRS static __inline__ uint32_t | |
| 143 | __gpu_shuffle_idx_u32(uint64_t __lane_mask, uint32_t __idx, uint32_t __x, | |
| 144 | uint32_t __width) { | |
| 145 | uint32_t __lane = __idx + (__gpu_lane_id() & ~(__width - 1)); | |
| 146 | return __builtin_spirv_subgroup_shuffle(__x, __lane); | |
| 147 | } | |
| 148 | ||
| 149 | // Returns a bitmask marking all lanes that have the same value of __x. | |
| 150 | _DEFAULT_FN_ATTRS static __inline__ uint64_t | |
| 151 | __gpu_match_any_u32(uint64_t __lane_mask, uint32_t __x) { | |
| 152 | return __gpu_match_any_u32_impl(__lane_mask, __x); | |
| 153 | } | |
| 154 | ||
| 155 | // Returns a bitmask marking all lanes that have the same value of __x. | |
| 156 | _DEFAULT_FN_ATTRS static __inline__ uint64_t | |
| 157 | __gpu_match_any_u64(uint64_t __lane_mask, uint64_t __x) { | |
| 158 | return __gpu_match_any_u64_impl(__lane_mask, __x); | |
| 159 | } | |
| 160 | ||
| 161 | // Returns the current lane mask if every lane contains __x. | |
| 162 | _DEFAULT_FN_ATTRS static __inline__ uint64_t | |
| 163 | __gpu_match_all_u32(uint64_t __lane_mask, uint32_t __x) { | |
| 164 | return __gpu_match_all_u32_impl(__lane_mask, __x); | |
| 165 | } | |
| 166 | ||
| 167 | // Returns the current lane mask if every lane contains __x. | |
| 168 | _DEFAULT_FN_ATTRS static __inline__ uint64_t | |
| 169 | __gpu_match_all_u64(uint64_t __lane_mask, uint64_t __x) { | |
| 170 | return __gpu_match_all_u64_impl(__lane_mask, __x); | |
| 171 | } | |
| 172 | ||
| 173 | // SPIR-V does not expose this, always return false. | |
| 174 | _DEFAULT_FN_ATTRS static __inline__ bool __gpu_is_ptr_local(void *ptr) { | |
| 175 | return 0; | |
| 176 | } | |
| 177 | ||
| 178 | // SPIR-V does not expose this, always return false. | |
| 179 | _DEFAULT_FN_ATTRS static __inline__ bool __gpu_is_ptr_private(void *ptr) { | |
| 180 | return 0; | |
| 181 | } | |
| 182 | ||
| 183 | // SPIR-V only supports 'OpTerminateInvocation' in fragment shaders. | |
| 184 | _DEFAULT_FN_ATTRS [[noreturn]] static __inline__ void __gpu_exit(void) { | |
| 185 | __builtin_trap(); | |
| 186 | } | |
| 187 | ||
| 188 | // This is a no-op as SPIR-V does not support it. | |
| 189 | _DEFAULT_FN_ATTRS static __inline__ void __gpu_thread_suspend(void) {} | |
| 190 | ||
| 191 | _Pragma("omp end declare variant"); | |
| 192 | _Pragma("omp end declare target"); | |
| 193 | ||
| 194 | #endif // __SPIRVINTRIN_H |
lib/include/stddefer.h created+19| ... | ... | @@ -0,0 +1,19 @@ |
| 1 | /*===---- stddefer.h - Standard header for 'defer' -------------------------=== | |
| 2 | * | |
| 3 | * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| 4 | * See https://llvm.org/LICENSE.txt for license information. | |
| 5 | * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| 6 | * | |
| 7 | *===-----------------------------------------------------------------------=== | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __CLANG_STDDEFER_H | |
| 11 | #define __CLANG_STDDEFER_H | |
| 12 | ||
| 13 | /* Provide 'defer' if '_Defer' is supported. */ | |
| 14 | #ifdef __STDC_DEFER_TS25755__ | |
| 15 | #define __STDC_VERSION_STDDEFER_H__ 202602L | |
| 16 | #define defer _Defer | |
| 17 | #endif | |
| 18 | ||
| 19 | #endif /* __CLANG_STDDEFER_H */ |
lib/include/tmmintrin.h+116-147| ... | ... | @@ -17,21 +17,21 @@ |
| 17 | 17 | #include <pmmintrin.h> |
| 18 | 18 | |
| 19 | 19 | /* Define the default attributes for the functions in this file. */ |
| 20 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 21 | #define __DEFAULT_FN_ATTRS \ | |
| 22 | __attribute__((__always_inline__, __nodebug__, \ | |
| 23 | __target__("ssse3,no-evex512"), __min_vector_width__(128))) | |
| 24 | #else | |
| 25 | 20 | #define __DEFAULT_FN_ATTRS \ |
| 26 | 21 | __attribute__((__always_inline__, __nodebug__, __target__("ssse3"), \ |
| 27 | 22 | __min_vector_width__(128))) |
| 28 | #endif | |
| 29 | 23 | |
| 30 | 24 | #define __trunc64(x) \ |
| 31 | 25 | (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0) |
| 32 | #define __anyext128(x) \ | |
| 26 | #define __zext128(x) \ | |
| 33 | 27 | (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \ |
| 34 | 1, -1, -1) | |
| 28 | 1, 2, 3) | |
| 29 | ||
| 30 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 31 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 32 | #else | |
| 33 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 34 | #endif | |
| 35 | 35 | |
| 36 | 36 | /// Computes the absolute value of each of the packed 8-bit signed |
| 37 | 37 | /// integers in the source operand and stores the 8-bit unsigned integer |
| ... | ... | @@ -45,9 +45,7 @@ |
| 45 | 45 | /// A 64-bit vector of [8 x i8]. |
| 46 | 46 | /// \returns A 64-bit integer vector containing the absolute values of the |
| 47 | 47 | /// elements in the operand. |
| 48 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 49 | _mm_abs_pi8(__m64 __a) | |
| 50 | { | |
| 48 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_abs_pi8(__m64 __a) { | |
| 51 | 49 | return (__m64)__builtin_elementwise_abs((__v8qs)__a); |
| 52 | 50 | } |
| 53 | 51 | |
| ... | ... | @@ -63,10 +61,9 @@ _mm_abs_pi8(__m64 __a) |
| 63 | 61 | /// A 128-bit vector of [16 x i8]. |
| 64 | 62 | /// \returns A 128-bit integer vector containing the absolute values of the |
| 65 | 63 | /// elements in the operand. |
| 66 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 67 | _mm_abs_epi8(__m128i __a) | |
| 68 | { | |
| 69 | return (__m128i)__builtin_elementwise_abs((__v16qs)__a); | |
| 64 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 65 | _mm_abs_epi8(__m128i __a) { | |
| 66 | return (__m128i)__builtin_elementwise_abs((__v16qs)__a); | |
| 70 | 67 | } |
| 71 | 68 | |
| 72 | 69 | /// Computes the absolute value of each of the packed 16-bit signed |
| ... | ... | @@ -81,10 +78,8 @@ _mm_abs_epi8(__m128i __a) |
| 81 | 78 | /// A 64-bit vector of [4 x i16]. |
| 82 | 79 | /// \returns A 64-bit integer vector containing the absolute values of the |
| 83 | 80 | /// elements in the operand. |
| 84 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 85 | _mm_abs_pi16(__m64 __a) | |
| 86 | { | |
| 87 | return (__m64)__builtin_elementwise_abs((__v4hi)__a); | |
| 81 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_abs_pi16(__m64 __a) { | |
| 82 | return (__m64)__builtin_elementwise_abs((__v4hi)__a); | |
| 88 | 83 | } |
| 89 | 84 | |
| 90 | 85 | /// Computes the absolute value of each of the packed 16-bit signed |
| ... | ... | @@ -99,10 +94,9 @@ _mm_abs_pi16(__m64 __a) |
| 99 | 94 | /// A 128-bit vector of [8 x i16]. |
| 100 | 95 | /// \returns A 128-bit integer vector containing the absolute values of the |
| 101 | 96 | /// elements in the operand. |
| 102 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 103 | _mm_abs_epi16(__m128i __a) | |
| 104 | { | |
| 105 | return (__m128i)__builtin_elementwise_abs((__v8hi)__a); | |
| 97 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 98 | _mm_abs_epi16(__m128i __a) { | |
| 99 | return (__m128i)__builtin_elementwise_abs((__v8hi)__a); | |
| 106 | 100 | } |
| 107 | 101 | |
| 108 | 102 | /// Computes the absolute value of each of the packed 32-bit signed |
| ... | ... | @@ -117,10 +111,8 @@ _mm_abs_epi16(__m128i __a) |
| 117 | 111 | /// A 64-bit vector of [2 x i32]. |
| 118 | 112 | /// \returns A 64-bit integer vector containing the absolute values of the |
| 119 | 113 | /// elements in the operand. |
| 120 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 121 | _mm_abs_pi32(__m64 __a) | |
| 122 | { | |
| 123 | return (__m64)__builtin_elementwise_abs((__v2si)__a); | |
| 114 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_abs_pi32(__m64 __a) { | |
| 115 | return (__m64)__builtin_elementwise_abs((__v2si)__a); | |
| 124 | 116 | } |
| 125 | 117 | |
| 126 | 118 | /// Computes the absolute value of each of the packed 32-bit signed |
| ... | ... | @@ -135,10 +127,9 @@ _mm_abs_pi32(__m64 __a) |
| 135 | 127 | /// A 128-bit vector of [4 x i32]. |
| 136 | 128 | /// \returns A 128-bit integer vector containing the absolute values of the |
| 137 | 129 | /// elements in the operand. |
| 138 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 139 | _mm_abs_epi32(__m128i __a) | |
| 140 | { | |
| 141 | return (__m128i)__builtin_elementwise_abs((__v4si)__a); | |
| 130 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 131 | _mm_abs_epi32(__m128i __a) { | |
| 132 | return (__m128i)__builtin_elementwise_abs((__v4si)__a); | |
| 142 | 133 | } |
| 143 | 134 | |
| 144 | 135 | /// Concatenates the two 128-bit integer vector operands, and |
| ... | ... | @@ -184,11 +175,12 @@ _mm_abs_epi32(__m128i __a) |
| 184 | 175 | /// An immediate operand specifying how many bytes to right-shift the result. |
| 185 | 176 | /// \returns A 64-bit integer vector containing the concatenated right-shifted |
| 186 | 177 | /// value. |
| 187 | #define _mm_alignr_pi8(a, b, n) \ | |
| 188 | ((__m64)__builtin_shufflevector( \ | |
| 189 | __builtin_ia32_psrldqi128_byteshift( \ | |
| 190 | __builtin_shufflevector((__v1di)(a), (__v1di)(b), 1, 0), \ | |
| 191 | (n)), __extension__ (__v2di){}, 0)) | |
| 178 | #define _mm_alignr_pi8(a, b, n) \ | |
| 179 | ((__m64)__builtin_shufflevector( \ | |
| 180 | (__v2di)__builtin_ia32_psrldqi128_byteshift( \ | |
| 181 | (__v16qi)__builtin_shufflevector((__v1di)(a), (__v1di)(b), 1, 0), \ | |
| 182 | (n)), \ | |
| 183 | __extension__(__v2di){}, 0)) | |
| 192 | 184 | |
| 193 | 185 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
| 194 | 186 | /// 128-bit vectors of [8 x i16]. |
| ... | ... | @@ -207,10 +199,9 @@ _mm_abs_epi32(__m128i __a) |
| 207 | 199 | /// destination. |
| 208 | 200 | /// \returns A 128-bit vector of [8 x i16] containing the horizontal sums of |
| 209 | 201 | /// both operands. |
| 210 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 211 | _mm_hadd_epi16(__m128i __a, __m128i __b) | |
| 212 | { | |
| 213 | return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b); | |
| 202 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 203 | _mm_hadd_epi16(__m128i __a, __m128i __b) { | |
| 204 | return (__m128i)__builtin_ia32_phaddw128((__v8hi)__a, (__v8hi)__b); | |
| 214 | 205 | } |
| 215 | 206 | |
| 216 | 207 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
| ... | ... | @@ -230,10 +221,9 @@ _mm_hadd_epi16(__m128i __a, __m128i __b) |
| 230 | 221 | /// destination. |
| 231 | 222 | /// \returns A 128-bit vector of [4 x i32] containing the horizontal sums of |
| 232 | 223 | /// both operands. |
| 233 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 234 | _mm_hadd_epi32(__m128i __a, __m128i __b) | |
| 235 | { | |
| 236 | return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b); | |
| 224 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 225 | _mm_hadd_epi32(__m128i __a, __m128i __b) { | |
| 226 | return (__m128i)__builtin_ia32_phaddd128((__v4si)__a, (__v4si)__b); | |
| 237 | 227 | } |
| 238 | 228 | |
| 239 | 229 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
| ... | ... | @@ -253,11 +243,10 @@ _mm_hadd_epi32(__m128i __a, __m128i __b) |
| 253 | 243 | /// destination. |
| 254 | 244 | /// \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both |
| 255 | 245 | /// operands. |
| 256 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 257 | _mm_hadd_pi16(__m64 __a, __m64 __b) | |
| 258 | { | |
| 259 | return __trunc64(__builtin_ia32_phaddw128( | |
| 260 | (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){})); | |
| 246 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadd_pi16(__m64 __a, | |
| 247 | __m64 __b) { | |
| 248 | return __trunc64(__builtin_ia32_phaddw128( | |
| 249 | (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){})); | |
| 261 | 250 | } |
| 262 | 251 | |
| 263 | 252 | /// Horizontally adds the adjacent pairs of values contained in 2 packed |
| ... | ... | @@ -277,11 +266,10 @@ _mm_hadd_pi16(__m64 __a, __m64 __b) |
| 277 | 266 | /// destination. |
| 278 | 267 | /// \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both |
| 279 | 268 | /// operands. |
| 280 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 281 | _mm_hadd_pi32(__m64 __a, __m64 __b) | |
| 282 | { | |
| 283 | return __trunc64(__builtin_ia32_phaddd128( | |
| 284 | (__v4si)__builtin_shufflevector(__a, __b, 0, 1), (__v4si){})); | |
| 269 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadd_pi32(__m64 __a, | |
| 270 | __m64 __b) { | |
| 271 | return __trunc64(__builtin_ia32_phaddd128( | |
| 272 | (__v4si)__builtin_shufflevector(__a, __b, 0, 1), (__v4si){})); | |
| 285 | 273 | } |
| 286 | 274 | |
| 287 | 275 | /// Horizontally adds, with saturation, the adjacent pairs of values contained |
| ... | ... | @@ -304,10 +292,9 @@ _mm_hadd_pi32(__m64 __a, __m64 __b) |
| 304 | 292 | /// destination. |
| 305 | 293 | /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated |
| 306 | 294 | /// sums of both operands. |
| 307 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 308 | _mm_hadds_epi16(__m128i __a, __m128i __b) | |
| 309 | { | |
| 310 | return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b); | |
| 295 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 296 | _mm_hadds_epi16(__m128i __a, __m128i __b) { | |
| 297 | return (__m128i)__builtin_ia32_phaddsw128((__v8hi)__a, (__v8hi)__b); | |
| 311 | 298 | } |
| 312 | 299 | |
| 313 | 300 | /// Horizontally adds, with saturation, the adjacent pairs of values contained |
| ... | ... | @@ -330,11 +317,10 @@ _mm_hadds_epi16(__m128i __a, __m128i __b) |
| 330 | 317 | /// destination. |
| 331 | 318 | /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated |
| 332 | 319 | /// sums of both operands. |
| 333 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 334 | _mm_hadds_pi16(__m64 __a, __m64 __b) | |
| 335 | { | |
| 336 | return __trunc64(__builtin_ia32_phaddsw128( | |
| 337 | (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){})); | |
| 320 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadds_pi16(__m64 __a, | |
| 321 | __m64 __b) { | |
| 322 | return __trunc64(__builtin_ia32_phaddsw128( | |
| 323 | (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){})); | |
| 338 | 324 | } |
| 339 | 325 | |
| 340 | 326 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
| ... | ... | @@ -354,10 +340,9 @@ _mm_hadds_pi16(__m64 __a, __m64 __b) |
| 354 | 340 | /// the destination. |
| 355 | 341 | /// \returns A 128-bit vector of [8 x i16] containing the horizontal differences |
| 356 | 342 | /// of both operands. |
| 357 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 358 | _mm_hsub_epi16(__m128i __a, __m128i __b) | |
| 359 | { | |
| 360 | return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b); | |
| 343 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 344 | _mm_hsub_epi16(__m128i __a, __m128i __b) { | |
| 345 | return (__m128i)__builtin_ia32_phsubw128((__v8hi)__a, (__v8hi)__b); | |
| 361 | 346 | } |
| 362 | 347 | |
| 363 | 348 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
| ... | ... | @@ -377,10 +362,9 @@ _mm_hsub_epi16(__m128i __a, __m128i __b) |
| 377 | 362 | /// the destination. |
| 378 | 363 | /// \returns A 128-bit vector of [4 x i32] containing the horizontal differences |
| 379 | 364 | /// of both operands. |
| 380 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 381 | _mm_hsub_epi32(__m128i __a, __m128i __b) | |
| 382 | { | |
| 383 | return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b); | |
| 365 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 366 | _mm_hsub_epi32(__m128i __a, __m128i __b) { | |
| 367 | return (__m128i)__builtin_ia32_phsubd128((__v4si)__a, (__v4si)__b); | |
| 384 | 368 | } |
| 385 | 369 | |
| 386 | 370 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
| ... | ... | @@ -400,11 +384,10 @@ _mm_hsub_epi32(__m128i __a, __m128i __b) |
| 400 | 384 | /// the destination. |
| 401 | 385 | /// \returns A 64-bit vector of [4 x i16] containing the horizontal differences |
| 402 | 386 | /// of both operands. |
| 403 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 404 | _mm_hsub_pi16(__m64 __a, __m64 __b) | |
| 405 | { | |
| 406 | return __trunc64(__builtin_ia32_phsubw128( | |
| 407 | (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){})); | |
| 387 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsub_pi16(__m64 __a, | |
| 388 | __m64 __b) { | |
| 389 | return __trunc64(__builtin_ia32_phsubw128( | |
| 390 | (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){})); | |
| 408 | 391 | } |
| 409 | 392 | |
| 410 | 393 | /// Horizontally subtracts the adjacent pairs of values contained in 2 |
| ... | ... | @@ -424,11 +407,10 @@ _mm_hsub_pi16(__m64 __a, __m64 __b) |
| 424 | 407 | /// the destination. |
| 425 | 408 | /// \returns A 64-bit vector of [2 x i32] containing the horizontal differences |
| 426 | 409 | /// of both operands. |
| 427 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 428 | _mm_hsub_pi32(__m64 __a, __m64 __b) | |
| 429 | { | |
| 430 | return __trunc64(__builtin_ia32_phsubd128( | |
| 431 | (__v4si)__builtin_shufflevector(__a, __b, 0, 1), (__v4si){})); | |
| 410 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsub_pi32(__m64 __a, | |
| 411 | __m64 __b) { | |
| 412 | return __trunc64(__builtin_ia32_phsubd128( | |
| 413 | (__v4si)__builtin_shufflevector(__a, __b, 0, 1), (__v4si){})); | |
| 432 | 414 | } |
| 433 | 415 | |
| 434 | 416 | /// Horizontally subtracts, with saturation, the adjacent pairs of values |
| ... | ... | @@ -451,10 +433,9 @@ _mm_hsub_pi32(__m64 __a, __m64 __b) |
| 451 | 433 | /// the destination. |
| 452 | 434 | /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated |
| 453 | 435 | /// differences of both operands. |
| 454 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 455 | _mm_hsubs_epi16(__m128i __a, __m128i __b) | |
| 456 | { | |
| 457 | return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b); | |
| 436 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 437 | _mm_hsubs_epi16(__m128i __a, __m128i __b) { | |
| 438 | return (__m128i)__builtin_ia32_phsubsw128((__v8hi)__a, (__v8hi)__b); | |
| 458 | 439 | } |
| 459 | 440 | |
| 460 | 441 | /// Horizontally subtracts, with saturation, the adjacent pairs of values |
| ... | ... | @@ -477,11 +458,10 @@ _mm_hsubs_epi16(__m128i __a, __m128i __b) |
| 477 | 458 | /// the destination. |
| 478 | 459 | /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated |
| 479 | 460 | /// differences of both operands. |
| 480 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 481 | _mm_hsubs_pi16(__m64 __a, __m64 __b) | |
| 482 | { | |
| 483 | return __trunc64(__builtin_ia32_phsubsw128( | |
| 484 | (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){})); | |
| 461 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsubs_pi16(__m64 __a, | |
| 462 | __m64 __b) { | |
| 463 | return __trunc64(__builtin_ia32_phsubsw128( | |
| 464 | (__v8hi)__builtin_shufflevector(__a, __b, 0, 1), (__v8hi){})); | |
| 485 | 465 | } |
| 486 | 466 | |
| 487 | 467 | /// Multiplies corresponding pairs of packed 8-bit unsigned integer |
| ... | ... | @@ -512,10 +492,9 @@ _mm_hsubs_pi16(__m64 __a, __m64 __b) |
| 512 | 492 | /// \a R5 := (\a __a10 * \a __b10) + (\a __a11 * \a __b11) \n |
| 513 | 493 | /// \a R6 := (\a __a12 * \a __b12) + (\a __a13 * \a __b13) \n |
| 514 | 494 | /// \a R7 := (\a __a14 * \a __b14) + (\a __a15 * \a __b15) |
| 515 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 516 | _mm_maddubs_epi16(__m128i __a, __m128i __b) | |
| 517 | { | |
| 518 | return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b); | |
| 495 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 496 | _mm_maddubs_epi16(__m128i __a, __m128i __b) { | |
| 497 | return (__m128i)__builtin_ia32_pmaddubsw128((__v16qi)__a, (__v16qi)__b); | |
| 519 | 498 | } |
| 520 | 499 | |
| 521 | 500 | /// Multiplies corresponding pairs of packed 8-bit unsigned integer |
| ... | ... | @@ -542,11 +521,10 @@ _mm_maddubs_epi16(__m128i __a, __m128i __b) |
| 542 | 521 | /// \a R1 := (\a __a2 * \a __b2) + (\a __a3 * \a __b3) \n |
| 543 | 522 | /// \a R2 := (\a __a4 * \a __b4) + (\a __a5 * \a __b5) \n |
| 544 | 523 | /// \a R3 := (\a __a6 * \a __b6) + (\a __a7 * \a __b7) |
| 545 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 546 | _mm_maddubs_pi16(__m64 __a, __m64 __b) | |
| 547 | { | |
| 548 | return __trunc64(__builtin_ia32_pmaddubsw128((__v16qi)__anyext128(__a), | |
| 549 | (__v16qi)__anyext128(__b))); | |
| 524 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 525 | _mm_maddubs_pi16(__m64 __a, __m64 __b) { | |
| 526 | return __trunc64(__builtin_ia32_pmaddubsw128((__v16qi)__zext128(__a), | |
| 527 | (__v16qi)__zext128(__b))); | |
| 550 | 528 | } |
| 551 | 529 | |
| 552 | 530 | /// Multiplies packed 16-bit signed integer values, truncates the 32-bit |
| ... | ... | @@ -563,10 +541,9 @@ _mm_maddubs_pi16(__m64 __a, __m64 __b) |
| 563 | 541 | /// A 128-bit vector of [8 x i16] containing one of the source operands. |
| 564 | 542 | /// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled |
| 565 | 543 | /// products of both operands. |
| 566 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 567 | _mm_mulhrs_epi16(__m128i __a, __m128i __b) | |
| 568 | { | |
| 569 | return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b); | |
| 544 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 545 | _mm_mulhrs_epi16(__m128i __a, __m128i __b) { | |
| 546 | return (__m128i)__builtin_ia32_pmulhrsw128((__v8hi)__a, (__v8hi)__b); | |
| 570 | 547 | } |
| 571 | 548 | |
| 572 | 549 | /// Multiplies packed 16-bit signed integer values, truncates the 32-bit |
| ... | ... | @@ -583,11 +560,10 @@ _mm_mulhrs_epi16(__m128i __a, __m128i __b) |
| 583 | 560 | /// A 64-bit vector of [4 x i16] containing one of the source operands. |
| 584 | 561 | /// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled |
| 585 | 562 | /// products of both operands. |
| 586 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 587 | _mm_mulhrs_pi16(__m64 __a, __m64 __b) | |
| 588 | { | |
| 589 | return __trunc64(__builtin_ia32_pmulhrsw128((__v8hi)__anyext128(__a), | |
| 590 | (__v8hi)__anyext128(__b))); | |
| 563 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 564 | _mm_mulhrs_pi16(__m64 __a, __m64 __b) { | |
| 565 | return __trunc64(__builtin_ia32_pmulhrsw128((__v8hi)__zext128(__a), | |
| 566 | (__v8hi)__zext128(__b))); | |
| 591 | 567 | } |
| 592 | 568 | |
| 593 | 569 | /// Copies the 8-bit integers from a 128-bit integer vector to the |
| ... | ... | @@ -610,10 +586,9 @@ _mm_mulhrs_pi16(__m64 __a, __m64 __b) |
| 610 | 586 | /// Bits [6:4] Reserved. \n |
| 611 | 587 | /// Bits [3:0] select the source byte to be copied. |
| 612 | 588 | /// \returns A 128-bit integer vector containing the copied or cleared values. |
| 613 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 614 | _mm_shuffle_epi8(__m128i __a, __m128i __b) | |
| 615 | { | |
| 616 | return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b); | |
| 589 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 590 | _mm_shuffle_epi8(__m128i __a, __m128i __b) { | |
| 591 | return (__m128i)__builtin_ia32_pshufb128((__v16qi)__a, (__v16qi)__b); | |
| 617 | 592 | } |
| 618 | 593 | |
| 619 | 594 | /// Copies the 8-bit integers from a 64-bit integer vector to the |
| ... | ... | @@ -635,13 +610,12 @@ _mm_shuffle_epi8(__m128i __a, __m128i __b) |
| 635 | 610 | /// destination. \n |
| 636 | 611 | /// Bits [2:0] select the source byte to be copied. |
| 637 | 612 | /// \returns A 64-bit integer vector containing the copied or cleared values. |
| 638 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 639 | _mm_shuffle_pi8(__m64 __a, __m64 __b) | |
| 640 | { | |
| 641 | return __trunc64(__builtin_ia32_pshufb128( | |
| 642 | (__v16qi)__builtin_shufflevector( | |
| 643 | (__v2si)(__a), __extension__ (__v2si){}, 0, 1, 0, 1), | |
| 644 | (__v16qi)__anyext128(__b))); | |
| 613 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 614 | _mm_shuffle_pi8(__m64 __a, __m64 __b) { | |
| 615 | return __trunc64(__builtin_ia32_pshufb128( | |
| 616 | (__v16qi)__builtin_shufflevector((__v2si)(__a), __extension__(__v2si){}, | |
| 617 | 0, 1, 0, 1), | |
| 618 | (__v16qi)__zext128(__b))); | |
| 645 | 619 | } |
| 646 | 620 | |
| 647 | 621 | /// For each 8-bit integer in the first source operand, perform one of |
| ... | ... | @@ -664,10 +638,9 @@ _mm_shuffle_pi8(__m64 __a, __m64 __b) |
| 664 | 638 | /// A 128-bit integer vector containing control bytes corresponding to |
| 665 | 639 | /// positions in the destination. |
| 666 | 640 | /// \returns A 128-bit integer vector containing the resultant values. |
| 667 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 668 | _mm_sign_epi8(__m128i __a, __m128i __b) | |
| 669 | { | |
| 670 | return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b); | |
| 641 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 642 | _mm_sign_epi8(__m128i __a, __m128i __b) { | |
| 643 | return (__m128i)__builtin_ia32_psignb128((__v16qi)__a, (__v16qi)__b); | |
| 671 | 644 | } |
| 672 | 645 | |
| 673 | 646 | /// For each 16-bit integer in the first source operand, perform one of |
| ... | ... | @@ -690,10 +663,9 @@ _mm_sign_epi8(__m128i __a, __m128i __b) |
| 690 | 663 | /// A 128-bit integer vector containing control words corresponding to |
| 691 | 664 | /// positions in the destination. |
| 692 | 665 | /// \returns A 128-bit integer vector containing the resultant values. |
| 693 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 694 | _mm_sign_epi16(__m128i __a, __m128i __b) | |
| 695 | { | |
| 696 | return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b); | |
| 666 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 667 | _mm_sign_epi16(__m128i __a, __m128i __b) { | |
| 668 | return (__m128i)__builtin_ia32_psignw128((__v8hi)__a, (__v8hi)__b); | |
| 697 | 669 | } |
| 698 | 670 | |
| 699 | 671 | /// For each 32-bit integer in the first source operand, perform one of |
| ... | ... | @@ -716,10 +688,9 @@ _mm_sign_epi16(__m128i __a, __m128i __b) |
| 716 | 688 | /// A 128-bit integer vector containing control doublewords corresponding to |
| 717 | 689 | /// positions in the destination. |
| 718 | 690 | /// \returns A 128-bit integer vector containing the resultant values. |
| 719 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 720 | _mm_sign_epi32(__m128i __a, __m128i __b) | |
| 721 | { | |
| 722 | return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b); | |
| 691 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 692 | _mm_sign_epi32(__m128i __a, __m128i __b) { | |
| 693 | return (__m128i)__builtin_ia32_psignd128((__v4si)__a, (__v4si)__b); | |
| 723 | 694 | } |
| 724 | 695 | |
| 725 | 696 | /// For each 8-bit integer in the first source operand, perform one of |
| ... | ... | @@ -742,11 +713,10 @@ _mm_sign_epi32(__m128i __a, __m128i __b) |
| 742 | 713 | /// A 64-bit integer vector containing control bytes corresponding to |
| 743 | 714 | /// positions in the destination. |
| 744 | 715 | /// \returns A 64-bit integer vector containing the resultant values. |
| 745 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 746 | _mm_sign_pi8(__m64 __a, __m64 __b) | |
| 747 | { | |
| 748 | return __trunc64(__builtin_ia32_psignb128((__v16qi)__anyext128(__a), | |
| 749 | (__v16qi)__anyext128(__b))); | |
| 716 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sign_pi8(__m64 __a, | |
| 717 | __m64 __b) { | |
| 718 | return __trunc64(__builtin_ia32_psignb128((__v16qi)__zext128(__a), | |
| 719 | (__v16qi)__zext128(__b))); | |
| 750 | 720 | } |
| 751 | 721 | |
| 752 | 722 | /// For each 16-bit integer in the first source operand, perform one of |
| ... | ... | @@ -769,11 +739,10 @@ _mm_sign_pi8(__m64 __a, __m64 __b) |
| 769 | 739 | /// A 64-bit integer vector containing control words corresponding to |
| 770 | 740 | /// positions in the destination. |
| 771 | 741 | /// \returns A 64-bit integer vector containing the resultant values. |
| 772 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 773 | _mm_sign_pi16(__m64 __a, __m64 __b) | |
| 774 | { | |
| 775 | return __trunc64(__builtin_ia32_psignw128((__v8hi)__anyext128(__a), | |
| 776 | (__v8hi)__anyext128(__b))); | |
| 742 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sign_pi16(__m64 __a, | |
| 743 | __m64 __b) { | |
| 744 | return __trunc64( | |
| 745 | __builtin_ia32_psignw128((__v8hi)__zext128(__a), (__v8hi)__zext128(__b))); | |
| 777 | 746 | } |
| 778 | 747 | |
| 779 | 748 | /// For each 32-bit integer in the first source operand, perform one of |
| ... | ... | @@ -796,15 +765,15 @@ _mm_sign_pi16(__m64 __a, __m64 __b) |
| 796 | 765 | /// A 64-bit integer vector containing two control doublewords corresponding |
| 797 | 766 | /// to positions in the destination. |
| 798 | 767 | /// \returns A 64-bit integer vector containing the resultant values. |
| 799 | static __inline__ __m64 __DEFAULT_FN_ATTRS | |
| 800 | _mm_sign_pi32(__m64 __a, __m64 __b) | |
| 801 | { | |
| 802 | return __trunc64(__builtin_ia32_psignd128((__v4si)__anyext128(__a), | |
| 803 | (__v4si)__anyext128(__b))); | |
| 768 | static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_sign_pi32(__m64 __a, | |
| 769 | __m64 __b) { | |
| 770 | return __trunc64( | |
| 771 | __builtin_ia32_psignd128((__v4si)__zext128(__a), (__v4si)__zext128(__b))); | |
| 804 | 772 | } |
| 805 | 773 | |
| 806 | #undef __anyext128 | |
| 774 | #undef __zext128 | |
| 807 | 775 | #undef __trunc64 |
| 808 | 776 | #undef __DEFAULT_FN_ATTRS |
| 777 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 809 | 778 | |
| 810 | 779 | #endif /* __TMMINTRIN_H */ |
lib/include/vaesintrin.h+1-2| ... | ... | @@ -19,8 +19,7 @@ |
| 19 | 19 | |
| 20 | 20 | /* Default attributes for ZMM forms. */ |
| 21 | 21 | #define __DEFAULT_FN_ATTRS_F \ |
| 22 | __attribute__((__always_inline__, __nodebug__, \ | |
| 23 | __target__("avx512f,evex512,vaes"), \ | |
| 22 | __attribute__((__always_inline__, __nodebug__, __target__("avx512f,vaes"), \ | |
| 24 | 23 | __min_vector_width__(512))) |
| 25 | 24 | |
| 26 | 25 | static __inline__ __m256i __DEFAULT_FN_ATTRS |
lib/include/xmmintrin.h+44-70| ... | ... | @@ -16,7 +16,6 @@ |
| 16 | 16 | |
| 17 | 17 | #include <mmintrin.h> |
| 18 | 18 | |
| 19 | typedef int __v4si __attribute__((__vector_size__(16))); | |
| 20 | 19 | typedef float __v4sf __attribute__((__vector_size__(16))); |
| 21 | 20 | typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16))); |
| 22 | 21 | |
| ... | ... | @@ -24,6 +23,8 @@ typedef float __m128_u __attribute__((__vector_size__(16), __aligned__(1))); |
| 24 | 23 | |
| 25 | 24 | /* Unsigned types */ |
| 26 | 25 | typedef unsigned int __v4su __attribute__((__vector_size__(16))); |
| 26 | typedef unsigned short __v8hu __attribute__((__vector_size__(16))); | |
| 27 | typedef unsigned char __v16qu __attribute__((__vector_size__(16))); | |
| 27 | 28 | |
| 28 | 29 | /* This header should only be included in a hosted environment as it depends on |
| 29 | 30 | * a standard library to provide allocation routines. */ |
| ... | ... | @@ -32,21 +33,12 @@ typedef unsigned int __v4su __attribute__((__vector_size__(16))); |
| 32 | 33 | #endif |
| 33 | 34 | |
| 34 | 35 | /* Define the default attributes for the functions in this file. */ |
| 35 | #if defined(__EVEX512__) && !defined(__AVX10_1_512__) | |
| 36 | #define __DEFAULT_FN_ATTRS \ | |
| 37 | __attribute__((__always_inline__, __nodebug__, __target__("sse,no-evex512"), \ | |
| 38 | __min_vector_width__(128))) | |
| 39 | #define __DEFAULT_FN_ATTRS_SSE2 \ | |
| 40 | __attribute__((__always_inline__, __nodebug__, \ | |
| 41 | __target__("sse2,no-evex512"), __min_vector_width__(128))) | |
| 42 | #else | |
| 43 | 36 | #define __DEFAULT_FN_ATTRS \ |
| 44 | 37 | __attribute__((__always_inline__, __nodebug__, __target__("sse"), \ |
| 45 | 38 | __min_vector_width__(128))) |
| 46 | 39 | #define __DEFAULT_FN_ATTRS_SSE2 \ |
| 47 | 40 | __attribute__((__always_inline__, __nodebug__, __target__("sse2"), \ |
| 48 | 41 | __min_vector_width__(128))) |
| 49 | #endif | |
| 50 | 42 | |
| 51 | 43 | #if defined(__cplusplus) && (__cplusplus >= 201103L) |
| 52 | 44 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr |
| ... | ... | @@ -239,10 +231,9 @@ _mm_div_ps(__m128 __a, __m128 __b) { |
| 239 | 231 | /// used in the calculation. |
| 240 | 232 | /// \returns A 128-bit vector of [4 x float] containing the square root of the |
| 241 | 233 | /// value in the low-order bits of the operand. |
| 242 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 243 | _mm_sqrt_ss(__m128 __a) | |
| 244 | { | |
| 245 | return (__m128)__builtin_ia32_sqrtss((__v4sf)__a); | |
| 234 | static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_sqrt_ss(__m128 __a) { | |
| 235 | __a[0] = __builtin_elementwise_sqrt(__a[0]); | |
| 236 | return __a; | |
| 246 | 237 | } |
| 247 | 238 | |
| 248 | 239 | /// Calculates the square roots of the values stored in a 128-bit vector |
| ... | ... | @@ -256,10 +247,8 @@ _mm_sqrt_ss(__m128 __a) |
| 256 | 247 | /// A 128-bit vector of [4 x float]. |
| 257 | 248 | /// \returns A 128-bit vector of [4 x float] containing the square roots of the |
| 258 | 249 | /// values in the operand. |
| 259 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 260 | _mm_sqrt_ps(__m128 __a) | |
| 261 | { | |
| 262 | return __builtin_ia32_sqrtps((__v4sf)__a); | |
| 250 | static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_sqrt_ps(__m128 __a) { | |
| 251 | return __builtin_elementwise_sqrt(__a); | |
| 263 | 252 | } |
| 264 | 253 | |
| 265 | 254 | /// Calculates the approximate reciprocal of the value stored in the |
| ... | ... | @@ -352,9 +341,7 @@ _mm_rsqrt_ps(__m128 __a) |
| 352 | 341 | /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the |
| 353 | 342 | /// minimum value between both operands. The upper 96 bits are copied from |
| 354 | 343 | /// the upper 96 bits of the first source operand. |
| 355 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 356 | _mm_min_ss(__m128 __a, __m128 __b) | |
| 357 | { | |
| 344 | static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_min_ss(__m128 __a, __m128 __b) { | |
| 358 | 345 | return __builtin_ia32_minss((__v4sf)__a, (__v4sf)__b); |
| 359 | 346 | } |
| 360 | 347 | |
| ... | ... | @@ -373,9 +360,8 @@ _mm_min_ss(__m128 __a, __m128 __b) |
| 373 | 360 | /// A 128-bit vector of [4 x float] containing one of the operands. |
| 374 | 361 | /// \returns A 128-bit vector of [4 x float] containing the minimum values |
| 375 | 362 | /// between both operands. |
| 376 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 377 | _mm_min_ps(__m128 __a, __m128 __b) | |
| 378 | { | |
| 363 | static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_min_ps(__m128 __a, | |
| 364 | __m128 __b) { | |
| 379 | 365 | return __builtin_ia32_minps((__v4sf)__a, (__v4sf)__b); |
| 380 | 366 | } |
| 381 | 367 | |
| ... | ... | @@ -398,9 +384,7 @@ _mm_min_ps(__m128 __a, __m128 __b) |
| 398 | 384 | /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the |
| 399 | 385 | /// maximum value between both operands. The upper 96 bits are copied from |
| 400 | 386 | /// the upper 96 bits of the first source operand. |
| 401 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 402 | _mm_max_ss(__m128 __a, __m128 __b) | |
| 403 | { | |
| 387 | static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_max_ss(__m128 __a, __m128 __b) { | |
| 404 | 388 | return __builtin_ia32_maxss((__v4sf)__a, (__v4sf)__b); |
| 405 | 389 | } |
| 406 | 390 | |
| ... | ... | @@ -419,9 +403,8 @@ _mm_max_ss(__m128 __a, __m128 __b) |
| 419 | 403 | /// A 128-bit vector of [4 x float] containing one of the operands. |
| 420 | 404 | /// \returns A 128-bit vector of [4 x float] containing the maximum values |
| 421 | 405 | /// between both operands. |
| 422 | static __inline__ __m128 __DEFAULT_FN_ATTRS | |
| 423 | _mm_max_ps(__m128 __a, __m128 __b) | |
| 424 | { | |
| 406 | static __inline__ __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_max_ps(__m128 __a, | |
| 407 | __m128 __b) { | |
| 425 | 408 | return __builtin_ia32_maxps((__v4sf)__a, (__v4sf)__b); |
| 426 | 409 | } |
| 427 | 410 | |
| ... | ... | @@ -1688,7 +1671,7 @@ _mm_cvtsi64_ss(__m128 __a, long long __b) { |
| 1688 | 1671 | /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the |
| 1689 | 1672 | /// converted value of the second operand. The upper 64 bits are copied from |
| 1690 | 1673 | /// the upper 64 bits of the first operand. |
| 1691 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2 | |
| 1674 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1692 | 1675 | _mm_cvtpi32_ps(__m128 __a, __m64 __b) |
| 1693 | 1676 | { |
| 1694 | 1677 | return (__m128)__builtin_shufflevector( |
| ... | ... | @@ -1714,7 +1697,7 @@ _mm_cvtpi32_ps(__m128 __a, __m64 __b) |
| 1714 | 1697 | /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the |
| 1715 | 1698 | /// converted value from the second operand. The upper 64 bits are copied |
| 1716 | 1699 | /// from the upper 64 bits of the first operand. |
| 1717 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2 | |
| 1700 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 1718 | 1701 | _mm_cvt_pi2ps(__m128 __a, __m64 __b) |
| 1719 | 1702 | { |
| 1720 | 1703 | return _mm_cvtpi32_ps(__a, __b); |
| ... | ... | @@ -2353,9 +2336,8 @@ void _mm_sfence(void); |
| 2353 | 2336 | /// \param __b |
| 2354 | 2337 | /// A 64-bit integer vector containing one of the source operands. |
| 2355 | 2338 | /// \returns A 64-bit integer vector containing the comparison results. |
| 2356 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 2357 | _mm_max_pi16(__m64 __a, __m64 __b) | |
| 2358 | { | |
| 2339 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2340 | _mm_max_pi16(__m64 __a, __m64 __b) { | |
| 2359 | 2341 | return (__m64)__builtin_elementwise_max((__v4hi)__a, (__v4hi)__b); |
| 2360 | 2342 | } |
| 2361 | 2343 | |
| ... | ... | @@ -2372,9 +2354,8 @@ _mm_max_pi16(__m64 __a, __m64 __b) |
| 2372 | 2354 | /// \param __b |
| 2373 | 2355 | /// A 64-bit integer vector containing one of the source operands. |
| 2374 | 2356 | /// \returns A 64-bit integer vector containing the comparison results. |
| 2375 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 2376 | _mm_max_pu8(__m64 __a, __m64 __b) | |
| 2377 | { | |
| 2357 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2358 | _mm_max_pu8(__m64 __a, __m64 __b) { | |
| 2378 | 2359 | return (__m64)__builtin_elementwise_max((__v8qu)__a, (__v8qu)__b); |
| 2379 | 2360 | } |
| 2380 | 2361 | |
| ... | ... | @@ -2391,9 +2372,8 @@ _mm_max_pu8(__m64 __a, __m64 __b) |
| 2391 | 2372 | /// \param __b |
| 2392 | 2373 | /// A 64-bit integer vector containing one of the source operands. |
| 2393 | 2374 | /// \returns A 64-bit integer vector containing the comparison results. |
| 2394 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 2395 | _mm_min_pi16(__m64 __a, __m64 __b) | |
| 2396 | { | |
| 2375 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2376 | _mm_min_pi16(__m64 __a, __m64 __b) { | |
| 2397 | 2377 | return (__m64)__builtin_elementwise_min((__v4hi)__a, (__v4hi)__b); |
| 2398 | 2378 | } |
| 2399 | 2379 | |
| ... | ... | @@ -2410,9 +2390,8 @@ _mm_min_pi16(__m64 __a, __m64 __b) |
| 2410 | 2390 | /// \param __b |
| 2411 | 2391 | /// A 64-bit integer vector containing one of the source operands. |
| 2412 | 2392 | /// \returns A 64-bit integer vector containing the comparison results. |
| 2413 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 2414 | _mm_min_pu8(__m64 __a, __m64 __b) | |
| 2415 | { | |
| 2393 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2394 | _mm_min_pu8(__m64 __a, __m64 __b) { | |
| 2416 | 2395 | return (__m64)__builtin_elementwise_min((__v8qu)__a, (__v8qu)__b); |
| 2417 | 2396 | } |
| 2418 | 2397 | |
| ... | ... | @@ -2428,9 +2407,8 @@ _mm_min_pu8(__m64 __a, __m64 __b) |
| 2428 | 2407 | /// A 64-bit integer vector containing the values with bits to be extracted. |
| 2429 | 2408 | /// \returns The most significant bit from each 8-bit element in \a __a, |
| 2430 | 2409 | /// written to bits [7:0]. |
| 2431 | static __inline__ int __DEFAULT_FN_ATTRS_SSE2 | |
| 2432 | _mm_movemask_pi8(__m64 __a) | |
| 2433 | { | |
| 2410 | static __inline__ int __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2411 | _mm_movemask_pi8(__m64 __a) { | |
| 2434 | 2412 | return __builtin_ia32_pmovmskb128((__v16qi)__zext128(__a)); |
| 2435 | 2413 | } |
| 2436 | 2414 | |
| ... | ... | @@ -2447,11 +2425,11 @@ _mm_movemask_pi8(__m64 __a) |
| 2447 | 2425 | /// \param __b |
| 2448 | 2426 | /// A 64-bit integer vector containing one of the source operands. |
| 2449 | 2427 | /// \returns A 64-bit integer vector containing the products of both operands. |
| 2450 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 2428 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2451 | 2429 | _mm_mulhi_pu16(__m64 __a, __m64 __b) |
| 2452 | 2430 | { |
| 2453 | return __trunc64(__builtin_ia32_pmulhuw128((__v8hi)__anyext128(__a), | |
| 2454 | (__v8hi)__anyext128(__b))); | |
| 2431 | return __trunc64(__builtin_ia32_pmulhuw128((__v8hu)__zext128(__a), | |
| 2432 | (__v8hu)__zext128(__b))); | |
| 2455 | 2433 | } |
| 2456 | 2434 | |
| 2457 | 2435 | /// Shuffles the 4 16-bit integers from a 64-bit integer vector to the |
| ... | ... | @@ -2530,8 +2508,8 @@ _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p) |
| 2530 | 2508 | // If there's a risk of spurious trap due to a 128-bit write, back up the |
| 2531 | 2509 | // pointer by 8 bytes and shift values in registers to match. |
| 2532 | 2510 | __p -= 8; |
| 2533 | __d128 = __builtin_ia32_pslldqi128_byteshift((__v2di)__d128, 8); | |
| 2534 | __n128 = __builtin_ia32_pslldqi128_byteshift((__v2di)__n128, 8); | |
| 2511 | __d128 = (__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)__d128, 8); | |
| 2512 | __n128 = (__m128i)__builtin_ia32_pslldqi128_byteshift((__v16qi)__n128, 8); | |
| 2535 | 2513 | } |
| 2536 | 2514 | |
| 2537 | 2515 | __builtin_ia32_maskmovdqu((__v16qi)__d128, (__v16qi)__n128, __p); |
| ... | ... | @@ -2550,11 +2528,10 @@ _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p) |
| 2550 | 2528 | /// \param __b |
| 2551 | 2529 | /// A 64-bit integer vector containing one of the source operands. |
| 2552 | 2530 | /// \returns A 64-bit integer vector containing the averages of both operands. |
| 2553 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 2554 | _mm_avg_pu8(__m64 __a, __m64 __b) | |
| 2555 | { | |
| 2556 | return __trunc64(__builtin_ia32_pavgb128((__v16qi)__anyext128(__a), | |
| 2557 | (__v16qi)__anyext128(__b))); | |
| 2531 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2532 | _mm_avg_pu8(__m64 __a, __m64 __b) { | |
| 2533 | return __trunc64(__builtin_ia32_pavgb128((__v16qu)__zext128(__a), | |
| 2534 | (__v16qu)__zext128(__b))); | |
| 2558 | 2535 | } |
| 2559 | 2536 | |
| 2560 | 2537 | /// Computes the rounded averages of the packed unsigned 16-bit integer |
| ... | ... | @@ -2570,11 +2547,10 @@ _mm_avg_pu8(__m64 __a, __m64 __b) |
| 2570 | 2547 | /// \param __b |
| 2571 | 2548 | /// A 64-bit integer vector containing one of the source operands. |
| 2572 | 2549 | /// \returns A 64-bit integer vector containing the averages of both operands. |
| 2573 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 | |
| 2574 | _mm_avg_pu16(__m64 __a, __m64 __b) | |
| 2575 | { | |
| 2576 | return __trunc64(__builtin_ia32_pavgw128((__v8hi)__anyext128(__a), | |
| 2577 | (__v8hi)__anyext128(__b))); | |
| 2550 | static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2551 | _mm_avg_pu16(__m64 __a, __m64 __b) { | |
| 2552 | return __trunc64( | |
| 2553 | __builtin_ia32_pavgw128((__v8hu)__zext128(__a), (__v8hu)__zext128(__b))); | |
| 2578 | 2554 | } |
| 2579 | 2555 | |
| 2580 | 2556 | /// Subtracts the corresponding 8-bit unsigned integer values of the two |
| ... | ... | @@ -2873,7 +2849,7 @@ _mm_movelh_ps(__m128 __a, __m128 __b) { |
| 2873 | 2849 | /// from the corresponding elements in this operand. |
| 2874 | 2850 | /// \returns A 128-bit vector of [4 x float] containing the copied and converted |
| 2875 | 2851 | /// values from the operand. |
| 2876 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2 | |
| 2852 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2877 | 2853 | _mm_cvtpi16_ps(__m64 __a) |
| 2878 | 2854 | { |
| 2879 | 2855 | return __builtin_convertvector((__v4hi)__a, __v4sf); |
| ... | ... | @@ -2891,7 +2867,7 @@ _mm_cvtpi16_ps(__m64 __a) |
| 2891 | 2867 | /// destination are copied from the corresponding elements in this operand. |
| 2892 | 2868 | /// \returns A 128-bit vector of [4 x float] containing the copied and converted |
| 2893 | 2869 | /// values from the operand. |
| 2894 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2 | |
| 2870 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2895 | 2871 | _mm_cvtpu16_ps(__m64 __a) |
| 2896 | 2872 | { |
| 2897 | 2873 | return __builtin_convertvector((__v4hu)__a, __v4sf); |
| ... | ... | @@ -2909,7 +2885,7 @@ _mm_cvtpu16_ps(__m64 __a) |
| 2909 | 2885 | /// from the corresponding lower 4 elements in this operand. |
| 2910 | 2886 | /// \returns A 128-bit vector of [4 x float] containing the copied and converted |
| 2911 | 2887 | /// values from the operand. |
| 2912 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2 | |
| 2888 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2913 | 2889 | _mm_cvtpi8_ps(__m64 __a) |
| 2914 | 2890 | { |
| 2915 | 2891 | return __builtin_convertvector( |
| ... | ... | @@ -2930,7 +2906,7 @@ _mm_cvtpi8_ps(__m64 __a) |
| 2930 | 2906 | /// operand. |
| 2931 | 2907 | /// \returns A 128-bit vector of [4 x float] containing the copied and converted |
| 2932 | 2908 | /// values from the source operand. |
| 2933 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2 | |
| 2909 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2934 | 2910 | _mm_cvtpu8_ps(__m64 __a) |
| 2935 | 2911 | { |
| 2936 | 2912 | return __builtin_convertvector( |
| ... | ... | @@ -2954,7 +2930,7 @@ _mm_cvtpu8_ps(__m64 __a) |
| 2954 | 2930 | /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the |
| 2955 | 2931 | /// copied and converted values from the first operand. The upper 64 bits |
| 2956 | 2932 | /// contain the copied and converted values from the second operand. |
| 2957 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2 | |
| 2933 | static __inline__ __m128 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR | |
| 2958 | 2934 | _mm_cvtpi32x2_ps(__m64 __a, __m64 __b) |
| 2959 | 2935 | { |
| 2960 | 2936 | return __builtin_convertvector( |
| ... | ... | @@ -3029,9 +3005,7 @@ _mm_cvtps_pi8(__m128 __a) |
| 3029 | 3005 | /// \returns A 32-bit integer value. Bits [3:0] contain the sign bits from each |
| 3030 | 3006 | /// single-precision floating-point element of the parameter. Bits [31:4] are |
| 3031 | 3007 | /// set to zero. |
| 3032 | static __inline__ int __DEFAULT_FN_ATTRS | |
| 3033 | _mm_movemask_ps(__m128 __a) | |
| 3034 | { | |
| 3008 | static __inline__ int __DEFAULT_FN_ATTRS_CONSTEXPR _mm_movemask_ps(__m128 __a) { | |
| 3035 | 3009 | return __builtin_ia32_movmskps((__v4sf)__a); |
| 3036 | 3010 | } |
| 3037 | 3011 |
lib/include/xopintrin.h+20-10| ... | ... | @@ -20,6 +20,14 @@ |
| 20 | 20 | #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xop"), __min_vector_width__(128))) |
| 21 | 21 | #define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("xop"), __min_vector_width__(256))) |
| 22 | 22 | |
| 23 | #if defined(__cplusplus) && (__cplusplus >= 201103L) | |
| 24 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr | |
| 25 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr | |
| 26 | #else | |
| 27 | #define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS | |
| 28 | #define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 | |
| 29 | #endif | |
| 30 | ||
| 23 | 31 | static __inline__ __m128i __DEFAULT_FN_ATTRS |
| 24 | 32 | _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C) |
| 25 | 33 | { |
| ... | ... | @@ -182,13 +190,13 @@ _mm_hsubq_epi32(__m128i __A) |
| 182 | 190 | return (__m128i)__builtin_ia32_vphsubdq((__v4si)__A); |
| 183 | 191 | } |
| 184 | 192 | |
| 185 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 193 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 186 | 194 | _mm_cmov_si128(__m128i __A, __m128i __B, __m128i __C) |
| 187 | 195 | { |
| 188 | 196 | return (__m128i)(((__v2du)__A & (__v2du)__C) | ((__v2du)__B & ~(__v2du)__C)); |
| 189 | 197 | } |
| 190 | 198 | |
| 191 | static __inline__ __m256i __DEFAULT_FN_ATTRS256 | |
| 199 | static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 192 | 200 | _mm256_cmov_si256(__m256i __A, __m256i __B, __m256i __C) |
| 193 | 201 | { |
| 194 | 202 | return (__m256i)(((__v4du)__A & (__v4du)__C) | ((__v4du)__B & ~(__v4du)__C)); |
| ... | ... | @@ -200,28 +208,28 @@ _mm_perm_epi8(__m128i __A, __m128i __B, __m128i __C) |
| 200 | 208 | return (__m128i)__builtin_ia32_vpperm((__v16qi)__A, (__v16qi)__B, (__v16qi)__C); |
| 201 | 209 | } |
| 202 | 210 | |
| 203 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 211 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 204 | 212 | _mm_rot_epi8(__m128i __A, __m128i __B) |
| 205 | 213 | { |
| 206 | return (__m128i)__builtin_ia32_vprotb((__v16qi)__A, (__v16qi)__B); | |
| 214 | return (__m128i)__builtin_elementwise_fshl((__v16qu)__A, (__v16qu)__A, (__v16qu)__B); | |
| 207 | 215 | } |
| 208 | 216 | |
| 209 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 217 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 210 | 218 | _mm_rot_epi16(__m128i __A, __m128i __B) |
| 211 | 219 | { |
| 212 | return (__m128i)__builtin_ia32_vprotw((__v8hi)__A, (__v8hi)__B); | |
| 220 | return (__m128i)__builtin_elementwise_fshl((__v8hu)__A, (__v8hu)__A, (__v8hu)__B); | |
| 213 | 221 | } |
| 214 | 222 | |
| 215 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 223 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 216 | 224 | _mm_rot_epi32(__m128i __A, __m128i __B) |
| 217 | 225 | { |
| 218 | return (__m128i)__builtin_ia32_vprotd((__v4si)__A, (__v4si)__B); | |
| 226 | return (__m128i)__builtin_elementwise_fshl((__v4su)__A, (__v4su)__A, (__v4su)__B); | |
| 219 | 227 | } |
| 220 | 228 | |
| 221 | static __inline__ __m128i __DEFAULT_FN_ATTRS | |
| 229 | static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 222 | 230 | _mm_rot_epi64(__m128i __A, __m128i __B) |
| 223 | 231 | { |
| 224 | return (__m128i)__builtin_ia32_vprotq((__v2di)__A, (__v2di)__B); | |
| 232 | return (__m128i)__builtin_elementwise_fshl((__v2du)__A, (__v2du)__A, (__v2du)__B); | |
| 225 | 233 | } |
| 226 | 234 | |
| 227 | 235 | #define _mm_roti_epi8(A, N) \ |
| ... | ... | @@ -766,5 +774,7 @@ _mm256_frcz_pd(__m256d __A) |
| 766 | 774 | |
| 767 | 775 | #undef __DEFAULT_FN_ATTRS |
| 768 | 776 | #undef __DEFAULT_FN_ATTRS256 |
| 777 | #undef __DEFAULT_FN_ATTRS_CONSTEXPR | |
| 778 | #undef __DEFAULT_FN_ATTRS256_CONSTEXPR | |
| 769 | 779 | |
| 770 | 780 | #endif /* __XOPINTRIN_H */ |