authorgravatar for robin@voetter.nlRobin Voetter <robin@voetter.nl> 2022-08-06 18:22:56+02:00
committergravatar for robin@voetter.nlRobin Voetter <robin@voetter.nl> 2022-10-12 20:34:41+02:00
log6b69dcfdd28145791da43979474fec29a13e24d0
tree35417291ba915132c681149fef4ca20094951ffb
parent5dd3d17c201f83b853fa1f1bf5e459fb1582c3cf
signature Commit is signed but in an unrecognized format.

amdgpu: add AmdgpuKernel calling convention

7 files changed, 27 insertions(+), 6 deletions(-)

lib/std/builtin.zig+1
......@@ -157,6 +157,7 @@ pub const CallingConvention = enum {
157157 SysV,
158158 Win64,
159159 PtxKernel,
160 AmdgpuKernel,
160161};
161162
162163/// This data structure is used by the Zig language code generation and
src/Sema.zig+4
......@@ -8141,6 +8141,10 @@ fn funcCommon(
81418141 .nvptx, .nvptx64 => null,
81428142 else => @as([]const u8, "nvptx and nvptx64"),
81438143 },
8144 .AmdgpuKernel => switch (arch) {
8145 .amdgcn => null,
8146 else => @as([]const u8, "amdgcn"),
8147 },
81448148 }) |allowed_platform| {
81458149 return sema.fail(block, cc_src, "callconv '{s}' is only available on {s}, not {s}", .{
81468150 @tagName(cc_workaround),
src/codegen/llvm.zig+5-1
......@@ -4425,7 +4425,7 @@ pub const FuncGen = struct {
44254425 .cmp_lt => try self.airCmp(inst, .lt, false),
44264426 .cmp_lte => try self.airCmp(inst, .lte, false),
44274427 .cmp_neq => try self.airCmp(inst, .neq, false),
4428
4428
44294429 .cmp_eq_optimized => try self.airCmp(inst, .eq, true),
44304430 .cmp_gt_optimized => try self.airCmp(inst, .gt, true),
44314431 .cmp_gte_optimized => try self.airCmp(inst, .gte, true),
......@@ -9807,6 +9807,10 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) llvm.Ca
98079807 .nvptx, .nvptx64 => .PTX_Kernel,
98089808 else => unreachable,
98099809 },
9810 .AmdgpuKernel => return switch (target.cpu.arch) {
9811 .amdgcn => .AMDGPU_KERNEL,
9812 else => unreachable,
9813 },
98109814 };
98119815}
98129816
src/stage1/all_types.hpp+2-1
......@@ -85,7 +85,8 @@ enum CallingConvention {
8585 CallingConventionAAPCSVFP,
8686 CallingConventionSysV,
8787 CallingConventionWin64,
88 CallingConventionPtxKernel
88 CallingConventionPtxKernel,
89 CallingConventionAmdgpuKernel
8990};
9091
9192// Stage 1 supports only the generic address space
src/stage1/analyze.cpp+9-3
......@@ -993,6 +993,7 @@ const char *calling_convention_name(CallingConvention cc) {
993993 case CallingConventionSysV: return "SysV";
994994 case CallingConventionWin64: return "Win64";
995995 case CallingConventionPtxKernel: return "PtxKernel";
996 case CallingConventionAmdgpuKernel: return "AmdgpuKernel";
996997 }
997998 zig_unreachable();
998999}
......@@ -1017,6 +1018,7 @@ bool calling_convention_allows_zig_types(CallingConvention cc) {
10171018 case CallingConventionAAPCSVFP:
10181019 case CallingConventionSysV:
10191020 case CallingConventionWin64:
1021 case CallingConventionAmdgpuKernel:
10201022 return false;
10211023 }
10221024 zig_unreachable();
......@@ -2019,6 +2021,9 @@ Error emit_error_unless_callconv_allowed_for_target(CodeGen *g, AstNode *source_
20192021 allowed_platforms = "nvptx and nvptx64";
20202022 }
20212023 break;
2024 case CallingConventionAmdgpuKernel:
2025 if (g->zig_target->arch != ZigLLVM_amdgcn)
2026 allowed_platforms = "amdgcn and amdpal";
20222027
20232028 }
20242029 if (allowed_platforms != nullptr) {
......@@ -3857,6 +3862,7 @@ static void resolve_decl_fn(CodeGen *g, TldFn *tld_fn) {
38573862 case CallingConventionSysV:
38583863 case CallingConventionWin64:
38593864 case CallingConventionPtxKernel:
3865 case CallingConventionAmdgpuKernel:
38603866 add_fn_export(g, fn_table_entry, buf_ptr(&fn_table_entry->symbol_name),
38613867 GlobalLinkageIdStrong, fn_cc);
38623868 break;
......@@ -6012,7 +6018,7 @@ Error type_has_bits2(CodeGen *g, ZigType *type_entry, bool *result) {
60126018
60136019bool fn_returns_c_abi_small_struct(FnTypeId *fn_type_id) {
60146020 ZigType *type = fn_type_id->return_type;
6015 return !calling_convention_allows_zig_types(fn_type_id->cc) &&
6021 return !calling_convention_allows_zig_types(fn_type_id->cc) &&
60166022 type->id == ZigTypeIdStruct && type->abi_size <= 16;
60176023}
60186024
......@@ -8698,7 +8704,7 @@ static LLVMTypeRef llvm_int_for_size(size_t size) {
86988704static LLVMTypeRef llvm_sse_for_size(size_t size) {
86998705 if (size > 4)
87008706 return LLVMDoubleType();
8701 else
8707 else
87028708 return LLVMFloatType();
87038709}
87048710
......@@ -8756,7 +8762,7 @@ static Error resolve_llvm_c_abi_type(CodeGen *g, ZigType *ty) {
87568762
87578763 LLVMTypeRef return_elem_types[] = {
87588764 LLVMVoidType(),
8759 LLVMVoidType(),
8765 LLVMVoidType(),
87608766 };
87618767 for (uint32_t i = 0; i <= eightbyte_index; i += 1) {
87628768 if (type_classes[i] == X64CABIClass_INTEGER) {
src/stage1/codegen.cpp+5-1
......@@ -216,6 +216,9 @@ static ZigLLVM_CallingConv get_llvm_cc(CodeGen *g, CallingConvention cc) {
216216 assert(g->zig_target->arch == ZigLLVM_nvptx ||
217217 g->zig_target->arch == ZigLLVM_nvptx64);
218218 return ZigLLVM_PTX_Kernel;
219 case CallingConventionAmdgpuKernel:
220 assert(g->zig_target->arch == ZigLLVM_amdgcn);
221 return ZigLLVM_AMDGPU_KERNEL;
219222
220223 }
221224 zig_unreachable();
......@@ -364,6 +367,7 @@ static bool cc_want_sret_attr(CallingConvention cc) {
364367 case CallingConventionSysV:
365368 case CallingConventionWin64:
366369 case CallingConventionPtxKernel:
370 case CallingConventionAmdgpuKernel:
367371 return true;
368372 case CallingConventionAsync:
369373 case CallingConventionUnspecified:
......@@ -3515,7 +3519,7 @@ static LLVMValueRef gen_soft_float_to_int_op(CodeGen *g, LLVMValueRef value_ref,
35153519
35163520 // Handle integers of non-pot bitsize by shortening them on the output
35173521 if (result_type != wider_type) {
3518 result = gen_widen_or_shorten(g, false, wider_type, result_type, result);
3522 result = gen_widen_or_shorten(g, false, wider_type, result_type, result);
35193523 }
35203524
35213525 return result;
src/stage1/ir.cpp+1
......@@ -11753,6 +11753,7 @@ static Stage1AirInst *ir_analyze_instruction_export(IrAnalyze *ira, Stage1ZirIns
1175311753 case CallingConventionSysV:
1175411754 case CallingConventionWin64:
1175511755 case CallingConventionPtxKernel:
11756 case CallingConventionAmdgpuKernel:
1175611757 add_fn_export(ira->codegen, fn_entry, buf_ptr(symbol_name), global_linkage_id, cc);
1175711758 fn_entry->section_name = section_name;
1175811759 break;