authorgravatar for andrew@ziglang.orgAndrew Kelley <andrew@ziglang.org> 2024-08-01 01:32:32-07:00
committergravatar for noreply@github.comGitHub <noreply@github.com> 2024-08-01 01:32:32-07:00
log8f7cbaa4c0cebc22613a33d212569cf221d6a3df
tree69f542e4fbe140e088924af02c731402f947c4d8
parentf17f73b4fa5640b7f070b80ada5e52e28e93608d
parent62a01851d9c433ea3f2e98cc986e75d32aece443
signaturebadge-check Signed by PGP key B5690EEEBB952194

Merge pull request #20870 from alexrp/target-cleanup-3

`std.Target`: Remove more dead OS/architecture tags

21 files changed, 42 insertions(+), 110 deletions(-)

lib/compiler/aro/aro/Compilation.zig+2-2
...@@ -363,7 +363,7 @@ fn generateSystemDefines(comp: *Compilation, w: anytype) !void {...@@ -363,7 +363,7 @@ fn generateSystemDefines(comp: *Compilation, w: anytype) !void {
363 \\#define __sparc_v9__ 1363 \\#define __sparc_v9__ 1
364 \\364 \\
365 ),365 ),
366 .sparc, .sparcel => try w.writeAll(366 .sparc => try w.writeAll(
367 \\#define __sparc__ 1367 \\#define __sparc__ 1
368 \\#define __sparc 1368 \\#define __sparc 1
369 \\369 \\
...@@ -534,7 +534,7 @@ pub fn generateBuiltinMacros(comp: *Compilation, system_defines_mode: SystemDefi...@@ -534,7 +534,7 @@ pub fn generateBuiltinMacros(comp: *Compilation, system_defines_mode: SystemDefi
534534
535 if (system_defines_mode == .include_system_defines) {535 if (system_defines_mode == .include_system_defines) {
536 try buf.appendSlice(536 try buf.appendSlice(
537 \\#define __VERSION__ "Aro 537 \\#define __VERSION__ "Aro
538 ++ @import("../backend.zig").version_str ++ "\"\n" ++538 ++ @import("../backend.zig").version_str ++ "\"\n" ++
539 \\#define __Aro__539 \\#define __Aro__
540 \\540 \\
lib/compiler/aro/aro/Driver/GCCDetector.zig+1-1
...@@ -376,7 +376,7 @@ fn collectLibDirsAndTriples(...@@ -376,7 +376,7 @@ fn collectLibDirsAndTriples(
376 biarch_libdirs.appendSliceAssumeCapacity(&RISCV32LibDirs);376 biarch_libdirs.appendSliceAssumeCapacity(&RISCV32LibDirs);
377 biarch_triple_aliases.appendSliceAssumeCapacity(&RISCV32Triples);377 biarch_triple_aliases.appendSliceAssumeCapacity(&RISCV32Triples);
378 },378 },
379 .sparc, .sparcel => {379 .sparc => {
380 lib_dirs.appendSliceAssumeCapacity(&SPARCv8LibDirs);380 lib_dirs.appendSliceAssumeCapacity(&SPARCv8LibDirs);
381 triple_aliases.appendSliceAssumeCapacity(&SPARCv8Triples);381 triple_aliases.appendSliceAssumeCapacity(&SPARCv8Triples);
382 biarch_libdirs.appendSliceAssumeCapacity(&SPARCv9LibDirs);382 biarch_libdirs.appendSliceAssumeCapacity(&SPARCv9LibDirs);
lib/compiler/aro/aro/target.zig+3-15
...@@ -53,13 +53,12 @@ pub fn intPtrType(target: std.Target) Type {...@@ -53,13 +53,12 @@ pub fn intPtrType(target: std.Target) Type {
53 .xcore,53 .xcore,
54 .hexagon,54 .hexagon,
55 .m68k,55 .m68k,
56 .spir,
57 .spirv32,56 .spirv32,
58 .arc,57 .arc,
59 .avr,58 .avr,
60 => return .{ .specifier = .int },59 => return .{ .specifier = .int },
6160
62 .sparc, .sparcel => switch (target.os.tag) {61 .sparc => switch (target.os.tag) {
63 .netbsd, .openbsd => {},62 .netbsd, .openbsd => {},
64 else => return .{ .specifier = .int },63 else => return .{ .specifier = .int },
65 },64 },
...@@ -133,7 +132,7 @@ pub fn defaultFunctionAlignment(target: std.Target) u8 {...@@ -133,7 +132,7 @@ pub fn defaultFunctionAlignment(target: std.Target) u8 {
133 return switch (target.cpu.arch) {132 return switch (target.cpu.arch) {
134 .arm, .armeb => 4,133 .arm, .armeb => 4,
135 .aarch64, .aarch64_be => 4,134 .aarch64, .aarch64_be => 4,
136 .sparc, .sparcel, .sparc64 => 4,135 .sparc, .sparc64 => 4,
137 .riscv64 => 2,136 .riscv64 => 2,
138 else => 1,137 else => 1,
139 };138 };
...@@ -427,7 +426,7 @@ pub fn ldEmulationOption(target: std.Target, arm_endianness: ?std.builtin.Endian...@@ -427,7 +426,7 @@ pub fn ldEmulationOption(target: std.Target, arm_endianness: ?std.builtin.Endian
427 .powerpc64le => "elf64lppc",426 .powerpc64le => "elf64lppc",
428 .riscv32 => "elf32lriscv",427 .riscv32 => "elf32lriscv",
429 .riscv64 => "elf64lriscv",428 .riscv64 => "elf64lriscv",
430 .sparc, .sparcel => "elf32_sparc",429 .sparc => "elf32_sparc",
431 .sparc64 => "elf64_sparc",430 .sparc64 => "elf64_sparc",
432 .loongarch32 => "elf32loongarch",431 .loongarch32 => "elf32loongarch",
433 .loongarch64 => "elf64loongarch",432 .loongarch64 => "elf64loongarch",
...@@ -467,13 +466,11 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {...@@ -467,13 +466,11 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
467 .powerpcle,466 .powerpcle,
468 .riscv32,467 .riscv32,
469 .sparc,468 .sparc,
470 .sparcel,
471 .thumb,469 .thumb,
472 .thumbeb,470 .thumbeb,
473 .x86,471 .x86,
474 .xcore,472 .xcore,
475 .nvptx,473 .nvptx,
476 .spir,
477 .kalimba,474 .kalimba,
478 .lanai,475 .lanai,
479 .wasm32,476 .wasm32,
...@@ -487,7 +484,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {...@@ -487,7 +484,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
487 .aarch64_be => copy.cpu.arch = .armeb,484 .aarch64_be => copy.cpu.arch = .armeb,
488 .nvptx64 => copy.cpu.arch = .nvptx,485 .nvptx64 => copy.cpu.arch = .nvptx,
489 .wasm64 => copy.cpu.arch = .wasm32,486 .wasm64 => copy.cpu.arch = .wasm32,
490 .spir64 => copy.cpu.arch = .spir,
491 .spirv64 => copy.cpu.arch = .spirv32,487 .spirv64 => copy.cpu.arch = .spirv32,
492 .loongarch64 => copy.cpu.arch = .loongarch32,488 .loongarch64 => copy.cpu.arch = .loongarch32,
493 .mips64 => copy.cpu.arch = .mips,489 .mips64 => copy.cpu.arch = .mips,
...@@ -513,7 +509,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -513,7 +509,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
513 .lanai,509 .lanai,
514 .m68k,510 .m68k,
515 .msp430,511 .msp430,
516 .sparcel,
517 .spu_2,512 .spu_2,
518 .xcore,513 .xcore,
519 .xtensa,514 .xtensa,
...@@ -526,7 +521,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -526,7 +521,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
526 .bpfel,521 .bpfel,
527 .nvptx64,522 .nvptx64,
528 .wasm64,523 .wasm64,
529 .spir64,
530 .spirv64,524 .spirv64,
531 .loongarch64,525 .loongarch64,
532 .mips64,526 .mips64,
...@@ -550,7 +544,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {...@@ -550,7 +544,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
550 .powerpcle => copy.cpu.arch = .powerpc64le,544 .powerpcle => copy.cpu.arch = .powerpc64le,
551 .riscv32 => copy.cpu.arch = .riscv64,545 .riscv32 => copy.cpu.arch = .riscv64,
552 .sparc => copy.cpu.arch = .sparc64,546 .sparc => copy.cpu.arch = .sparc64,
553 .spir => copy.cpu.arch = .spir64,
554 .spirv32 => copy.cpu.arch = .spirv64,547 .spirv32 => copy.cpu.arch = .spirv64,
555 .thumb => copy.cpu.arch = .aarch64,548 .thumb => copy.cpu.arch = .aarch64,
556 .thumbeb => copy.cpu.arch = .aarch64_be,549 .thumbeb => copy.cpu.arch = .aarch64_be,
...@@ -597,7 +590,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -597,7 +590,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
597 .riscv64 => "riscv64",590 .riscv64 => "riscv64",
598 .sparc => "sparc",591 .sparc => "sparc",
599 .sparc64 => "sparc64",592 .sparc64 => "sparc64",
600 .sparcel => "sparcel",
601 .s390x => "s390x",593 .s390x => "s390x",
602 .thumb => "thumb",594 .thumb => "thumb",
603 .thumbeb => "thumbeb",595 .thumbeb => "thumbeb",
...@@ -607,8 +599,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -607,8 +599,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
607 .xtensa => "xtensa",599 .xtensa => "xtensa",
608 .nvptx => "nvptx",600 .nvptx => "nvptx",
609 .nvptx64 => "nvptx64",601 .nvptx64 => "nvptx64",
610 .spir => "spir",
611 .spir64 => "spir64",
612 .spirv32 => "spirv32",602 .spirv32 => "spirv32",
613 .spirv64 => "spirv64",603 .spirv64 => "spirv64",
614 .kalimba => "kalimba",604 .kalimba => "kalimba",
...@@ -624,8 +614,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {...@@ -624,8 +614,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
624614
625 const llvm_os = switch (target.os.tag) {615 const llvm_os = switch (target.os.tag) {
626 .freestanding => "unknown",616 .freestanding => "unknown",
627 .ananas => "ananas",
628 .cloudabi => "cloudabi",
629 .dragonfly => "dragonfly",617 .dragonfly => "dragonfly",
630 .freebsd => "freebsd",618 .freebsd => "freebsd",
631 .fuchsia => "fuchsia",619 .fuchsia => "fuchsia",
lib/compiler/aro/aro/toolchains/Linux.zig-1
...@@ -357,7 +357,6 @@ fn getOSLibDir(target: std.Target) []const u8 {...@@ -357,7 +357,6 @@ fn getOSLibDir(target: std.Target) []const u8 {
357 .powerpc,357 .powerpc,
358 .powerpcle,358 .powerpcle,
359 .sparc,359 .sparc,
360 .sparcel,
361 => return "lib32",360 => return "lib32",
362 else => {},361 else => {},
363 }362 }
lib/compiler_rt/atomics.zig+1-1
...@@ -30,7 +30,7 @@ const largest_atomic_size = switch (arch) {...@@ -30,7 +30,7 @@ const largest_atomic_size = switch (arch) {
30 // On SPARC systems that lacks CAS and/or swap instructions, the only30 // On SPARC systems that lacks CAS and/or swap instructions, the only
31 // available atomic operation is a test-and-set (`ldstub`), so we force31 // available atomic operation is a test-and-set (`ldstub`), so we force
32 // every atomic memory access to go through the lock.32 // every atomic memory access to go through the lock.
33 .sparc, .sparcel => if (cpu.features.featureSetHas(.hasleoncasa)) @sizeOf(usize) else 0,33 .sparc => if (cpu.features.featureSetHas(.hasleoncasa)) @sizeOf(usize) else 0,
3434
35 // XXX: On x86/x86_64 we could check the presence of cmpxchg8b/cmpxchg16b35 // XXX: On x86/x86_64 we could check the presence of cmpxchg8b/cmpxchg16b
36 // and set this parameter accordingly.36 // and set this parameter accordingly.
lib/compiler_rt/clear_cache.zig+1-1
...@@ -41,7 +41,7 @@ fn clear_cache(start: usize, end: usize) callconv(.C) void {...@@ -41,7 +41,7 @@ fn clear_cache(start: usize, end: usize) callconv(.C) void {
41 else => false,41 else => false,
42 };42 };
43 const sparc = switch (arch) {43 const sparc = switch (arch) {
44 .sparc, .sparc64, .sparcel => true,44 .sparc, .sparc64 => true,
45 else => false,45 else => false,
46 };46 };
47 const apple = switch (os) {47 const apple = switch (os) {
lib/std/Target.zig+12-48
...@@ -17,8 +17,6 @@ pub const Os = struct {...@@ -17,8 +17,6 @@ pub const Os = struct {
1717
18 pub const Tag = enum {18 pub const Tag = enum {
19 freestanding,19 freestanding,
20 ananas,
21 cloudabi,
22 dragonfly,20 dragonfly,
23 freebsd,21 freebsd,
24 fuchsia,22 fuchsia,
...@@ -140,8 +138,6 @@ pub const Os = struct {...@@ -140,8 +138,6 @@ pub const Os = struct {
140 pub inline fn getVersionRangeTag(tag: Tag) @typeInfo(TaggedVersionRange).Union.tag_type.? {138 pub inline fn getVersionRangeTag(tag: Tag) @typeInfo(TaggedVersionRange).Union.tag_type.? {
141 return switch (tag) {139 return switch (tag) {
142 .freestanding,140 .freestanding,
143 .ananas,
144 .cloudabi,
145 .fuchsia,141 .fuchsia,
146 .ps3,142 .ps3,
147 .zos,143 .zos,
...@@ -202,7 +198,7 @@ pub const Os = struct {...@@ -202,7 +198,7 @@ pub const Os = struct {
202 .mips, .mipsel, .mips64, .mips64el => "mips",198 .mips, .mipsel, .mips64, .mips64el => "mips",
203 .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",199 .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
204 .riscv32, .riscv64 => "riscv",200 .riscv32, .riscv64 => "riscv",
205 .sparc, .sparcel, .sparc64 => "sparc",201 .sparc, .sparc64 => "sparc",
206 .x86, .x86_64 => "x86",202 .x86, .x86_64 => "x86",
207 else => @tagName(arch),203 else => @tagName(arch),
208 },204 },
...@@ -373,8 +369,6 @@ pub const Os = struct {...@@ -373,8 +369,6 @@ pub const Os = struct {
373 pub fn default(tag: Tag, arch: Cpu.Arch) VersionRange {369 pub fn default(tag: Tag, arch: Cpu.Arch) VersionRange {
374 return switch (tag) {370 return switch (tag) {
375 .freestanding,371 .freestanding,
376 .ananas,
377 .cloudabi,
378 .fuchsia,372 .fuchsia,
379 .ps3,373 .ps3,
380 .zos,374 .zos,
...@@ -560,8 +554,6 @@ pub const Os = struct {...@@ -560,8 +554,6 @@ pub const Os = struct {
560 .linux,554 .linux,
561 .windows,555 .windows,
562 .freestanding,556 .freestanding,
563 .ananas,
564 .cloudabi,
565 .fuchsia,557 .fuchsia,
566 .ps3,558 .ps3,
567 .zos,559 .zos,
...@@ -667,8 +659,6 @@ pub const Abi = enum {...@@ -667,8 +659,6 @@ pub const Abi = enum {
667 pub fn default(arch: Cpu.Arch, os: Os) Abi {659 pub fn default(arch: Cpu.Arch, os: Os) Abi {
668 return if (arch.isWasm()) .musl else switch (os.tag) {660 return if (arch.isWasm()) .musl else switch (os.tag) {
669 .freestanding,661 .freestanding,
670 .ananas,
671 .cloudabi,
672 .dragonfly,662 .dragonfly,
673 .ps3,663 .ps3,
674 .zos,664 .zos,
...@@ -1018,7 +1008,6 @@ pub const Cpu = struct {...@@ -1018,7 +1008,6 @@ pub const Cpu = struct {
1018 riscv64,1008 riscv64,
1019 sparc,1009 sparc,
1020 sparc64,1010 sparc64,
1021 sparcel,
1022 s390x,1011 s390x,
1023 thumb,1012 thumb,
1024 thumbeb,1013 thumbeb,
...@@ -1028,8 +1017,6 @@ pub const Cpu = struct {...@@ -1028,8 +1017,6 @@ pub const Cpu = struct {
1028 xtensa,1017 xtensa,
1029 nvptx,1018 nvptx,
1030 nvptx64,1019 nvptx64,
1031 spir,
1032 spir64,
1033 spirv,1020 spirv,
1034 spirv32,1021 spirv32,
1035 spirv64,1022 spirv64,
...@@ -1043,12 +1030,17 @@ pub const Cpu = struct {...@@ -1043,12 +1030,17 @@ pub const Cpu = struct {
1043 // LLVM tags deliberately omitted:1030 // LLVM tags deliberately omitted:
1044 // - aarch64_321031 // - aarch64_32
1045 // - r6001032 // - r600
1033 // - sparcel
1034 // - tce
1035 // - tcele
1046 // - le321036 // - le32
1047 // - le641037 // - le64
1048 // - amdil1038 // - amdil
1049 // - amdil641039 // - amdil64
1050 // - hsail1040 // - hsail
1051 // - hsail641041 // - hsail64
1042 // - spir
1043 // - spir64
1052 // - shave1044 // - shave
1053 // - renderscript321045 // - renderscript32
1054 // - renderscript641046 // - renderscript64
...@@ -1122,7 +1114,7 @@ pub const Cpu = struct {...@@ -1122,7 +1114,7 @@ pub const Cpu = struct {
11221114
1123 pub inline fn isSPARC(arch: Arch) bool {1115 pub inline fn isSPARC(arch: Arch) bool {
1124 return switch (arch) {1116 return switch (arch) {
1125 .sparc, .sparcel, .sparc64 => true,1117 .sparc, .sparc64 => true,
1126 else => false,1118 else => false,
1127 };1119 };
1128 }1120 }
...@@ -1172,14 +1164,12 @@ pub const Cpu = struct {...@@ -1172,14 +1164,12 @@ pub const Cpu = struct {
1172 .powerpc, .powerpcle => .PPC,1164 .powerpc, .powerpcle => .PPC,
1173 .riscv32 => .RISCV,1165 .riscv32 => .RISCV,
1174 .sparc => .SPARC,1166 .sparc => .SPARC,
1175 .sparcel => .SPARC,
1176 .thumb => .ARM,1167 .thumb => .ARM,
1177 .thumbeb => .ARM,1168 .thumbeb => .ARM,
1178 .x86 => .@"386",1169 .x86 => .@"386",
1179 .xcore => .XCORE,1170 .xcore => .XCORE,
1180 .xtensa => .XTENSA,1171 .xtensa => .XTENSA,
1181 .nvptx => .NONE,1172 .nvptx => .NONE,
1182 .spir => .NONE,
1183 .kalimba => .CSR_KALIMBA,1173 .kalimba => .CSR_KALIMBA,
1184 .lanai => .LANAI,1174 .lanai => .LANAI,
1185 .wasm32 => .NONE,1175 .wasm32 => .NONE,
...@@ -1192,7 +1182,6 @@ pub const Cpu = struct {...@@ -1192,7 +1182,6 @@ pub const Cpu = struct {
1192 .riscv64 => .RISCV,1182 .riscv64 => .RISCV,
1193 .x86_64 => .X86_64,1183 .x86_64 => .X86_64,
1194 .nvptx64 => .NONE,1184 .nvptx64 => .NONE,
1195 .spir64 => .NONE,
1196 .wasm64 => .NONE,1185 .wasm64 => .NONE,
1197 .amdgcn => .AMDGPU,1186 .amdgcn => .AMDGPU,
1198 .bpfel => .BPF,1187 .bpfel => .BPF,
...@@ -1225,14 +1214,12 @@ pub const Cpu = struct {...@@ -1225,14 +1214,12 @@ pub const Cpu = struct {
1225 .powerpc, .powerpcle => .POWERPC,1214 .powerpc, .powerpcle => .POWERPC,
1226 .riscv32 => .RISCV32,1215 .riscv32 => .RISCV32,
1227 .sparc => .Unknown,1216 .sparc => .Unknown,
1228 .sparcel => .Unknown,
1229 .thumb => .Thumb,1217 .thumb => .Thumb,
1230 .thumbeb => .Thumb,1218 .thumbeb => .Thumb,
1231 .x86 => .I386,1219 .x86 => .I386,
1232 .xcore => .Unknown,1220 .xcore => .Unknown,
1233 .xtensa => .Unknown,1221 .xtensa => .Unknown,
1234 .nvptx => .Unknown,1222 .nvptx => .Unknown,
1235 .spir => .Unknown,
1236 .kalimba => .Unknown,1223 .kalimba => .Unknown,
1237 .lanai => .Unknown,1224 .lanai => .Unknown,
1238 .wasm32 => .Unknown,1225 .wasm32 => .Unknown,
...@@ -1245,7 +1232,6 @@ pub const Cpu = struct {...@@ -1245,7 +1232,6 @@ pub const Cpu = struct {
1245 .riscv64 => .RISCV64,1232 .riscv64 => .RISCV64,
1246 .x86_64 => .X64,1233 .x86_64 => .X64,
1247 .nvptx64 => .Unknown,1234 .nvptx64 => .Unknown,
1248 .spir64 => .Unknown,
1249 .wasm64 => .Unknown,1235 .wasm64 => .Unknown,
1250 .amdgcn => .Unknown,1236 .amdgcn => .Unknown,
1251 .bpfel => .Unknown,1237 .bpfel => .Unknown,
...@@ -1279,7 +1265,6 @@ pub const Cpu = struct {...@@ -1279,7 +1265,6 @@ pub const Cpu = struct {
1279 .msp430,1265 .msp430,
1280 .nvptx,1266 .nvptx,
1281 .nvptx64,1267 .nvptx64,
1282 .sparcel,
1283 .powerpcle,1268 .powerpcle,
1284 .powerpc64le,1269 .powerpc64le,
1285 .riscv32,1270 .riscv32,
...@@ -1290,8 +1275,6 @@ pub const Cpu = struct {...@@ -1290,8 +1275,6 @@ pub const Cpu = struct {
1290 .wasm64,1275 .wasm64,
1291 .xcore,1276 .xcore,
1292 .thumb,1277 .thumb,
1293 .spir,
1294 .spir64,
1295 .ve,1278 .ve,
1296 .spu_2,1279 .spu_2,
1297 // GPU bitness is opaque. For now, assume little endian.1280 // GPU bitness is opaque. For now, assume little endian.
...@@ -1348,7 +1331,7 @@ pub const Cpu = struct {...@@ -1348,7 +1331,7 @@ pub const Cpu = struct {
1348 .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",1331 .powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
1349 .amdgcn => "amdgpu",1332 .amdgcn => "amdgpu",
1350 .riscv32, .riscv64 => "riscv",1333 .riscv32, .riscv64 => "riscv",
1351 .sparc, .sparc64, .sparcel => "sparc",1334 .sparc, .sparc64 => "sparc",
1352 .s390x => "s390x",1335 .s390x => "s390x",
1353 .x86, .x86_64 => "x86",1336 .x86, .x86_64 => "x86",
1354 .nvptx, .nvptx64 => "nvptx",1337 .nvptx, .nvptx64 => "nvptx",
...@@ -1375,7 +1358,7 @@ pub const Cpu = struct {...@@ -1375,7 +1358,7 @@ pub const Cpu = struct {
1375 .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features,1358 .powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features,
1376 .amdgcn => &amdgpu.all_features,1359 .amdgcn => &amdgpu.all_features,
1377 .riscv32, .riscv64 => &riscv.all_features,1360 .riscv32, .riscv64 => &riscv.all_features,
1378 .sparc, .sparc64, .sparcel => &sparc.all_features,1361 .sparc, .sparc64 => &sparc.all_features,
1379 .spirv32, .spirv64 => &spirv.all_features,1362 .spirv32, .spirv64 => &spirv.all_features,
1380 .s390x => &s390x.all_features,1363 .s390x => &s390x.all_features,
1381 .x86, .x86_64 => &x86.all_features,1364 .x86, .x86_64 => &x86.all_features,
...@@ -1405,7 +1388,7 @@ pub const Cpu = struct {...@@ -1405,7 +1388,7 @@ pub const Cpu = struct {
1405 .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),1388 .powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
1406 .amdgcn => comptime allCpusFromDecls(amdgpu.cpu),1389 .amdgcn => comptime allCpusFromDecls(amdgpu.cpu),
1407 .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),1390 .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
1408 .sparc, .sparc64, .sparcel => comptime allCpusFromDecls(sparc.cpu),1391 .sparc, .sparc64 => comptime allCpusFromDecls(sparc.cpu),
1409 .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu),1392 .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu),
1410 .s390x => comptime allCpusFromDecls(s390x.cpu),1393 .s390x => comptime allCpusFromDecls(s390x.cpu),
1411 .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu),1394 .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu),
...@@ -1497,7 +1480,7 @@ pub const Cpu = struct {...@@ -1497,7 +1480,7 @@ pub const Cpu = struct {
1497 .riscv32 => &riscv.cpu.generic_rv32,1480 .riscv32 => &riscv.cpu.generic_rv32,
1498 .riscv64 => &riscv.cpu.generic_rv64,1481 .riscv64 => &riscv.cpu.generic_rv64,
1499 .spirv32, .spirv64 => &spirv.cpu.generic,1482 .spirv32, .spirv64 => &spirv.cpu.generic,
1500 .sparc, .sparcel => &sparc.cpu.generic,1483 .sparc => &sparc.cpu.generic,
1501 .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline1484 .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline
1502 .s390x => &s390x.cpu.generic,1485 .s390x => &s390x.cpu.generic,
1503 .x86 => &x86.cpu.i386,1486 .x86 => &x86.cpu.i386,
...@@ -1519,7 +1502,7 @@ pub const Cpu = struct {...@@ -1519,7 +1502,7 @@ pub const Cpu = struct {
1519 .x86 => &x86.cpu.pentium4,1502 .x86 => &x86.cpu.pentium4,
1520 .nvptx, .nvptx64 => &nvptx.cpu.sm_20,1503 .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
1521 .s390x => &s390x.cpu.arch8,1504 .s390x => &s390x.cpu.arch8,
1522 .sparc, .sparcel => &sparc.cpu.v8,1505 .sparc => &sparc.cpu.v8,
1523 .loongarch64 => &loongarch.cpu.loongarch64,1506 .loongarch64 => &loongarch.cpu.loongarch64,
15241507
1525 else => generic(arch),1508 else => generic(arch),
...@@ -1704,7 +1687,6 @@ pub const DynamicLinker = struct {...@@ -1704,7 +1687,6 @@ pub const DynamicLinker = struct {
1704 .linux => switch (cpu.arch) {1687 .linux => switch (cpu.arch) {
1705 .x86,1688 .x86,
1706 .sparc,1689 .sparc,
1707 .sparcel,
1708 => init("/lib/ld-linux.so.2"),1690 => init("/lib/ld-linux.so.2"),
17091691
1710 .aarch64 => init("/lib/ld-linux-aarch64.so.1"),1692 .aarch64 => init("/lib/ld-linux-aarch64.so.1"),
...@@ -1773,8 +1755,6 @@ pub const DynamicLinker = struct {...@@ -1773,8 +1755,6 @@ pub const DynamicLinker = struct {
1773 .msp430,1755 .msp430,
1774 .amdgcn,1756 .amdgcn,
1775 .xcore,1757 .xcore,
1776 .spir,
1777 .spir64,
1778 .kalimba,1758 .kalimba,
1779 .lanai,1759 .lanai,
1780 .ve,1760 .ve,
...@@ -1811,8 +1791,6 @@ pub const DynamicLinker = struct {...@@ -1811,8 +1791,6 @@ pub const DynamicLinker = struct {
18111791
1812 // TODO go over each item in this list and either move it to the above list, or1792 // TODO go over each item in this list and either move it to the above list, or
1813 // implement the standard dynamic linker path code for it.1793 // implement the standard dynamic linker path code for it.
1814 .ananas,
1815 .cloudabi,
1816 .fuchsia,1794 .fuchsia,
1817 .ps3,1795 .ps3,
1818 .zos,1796 .zos,
...@@ -1865,13 +1843,11 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1865,13 +1843,11 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1865 .powerpc,1843 .powerpc,
1866 .powerpcle,1844 .powerpcle,
1867 .riscv32,1845 .riscv32,
1868 .sparcel,
1869 .thumb,1846 .thumb,
1870 .thumbeb,1847 .thumbeb,
1871 .x86,1848 .x86,
1872 .xcore,1849 .xcore,
1873 .nvptx,1850 .nvptx,
1874 .spir,
1875 .kalimba,1851 .kalimba,
1876 .lanai,1852 .lanai,
1877 .wasm32,1853 .wasm32,
...@@ -1890,7 +1866,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {...@@ -1890,7 +1866,6 @@ pub fn ptrBitWidth_cpu_abi(cpu: Cpu, abi: Abi) u16 {
1890 .riscv64,1866 .riscv64,
1891 .x86_64,1867 .x86_64,
1892 .nvptx64,1868 .nvptx64,
1893 .spir64,
1894 .wasm64,1869 .wasm64,
1895 .amdgcn,1870 .amdgcn,
1896 .bpfel,1871 .bpfel,
...@@ -1927,7 +1902,6 @@ pub fn stackAlignment(target: Target) u16 {...@@ -1927,7 +1902,6 @@ pub fn stackAlignment(target: Target) u16 {
1927 .mips,1902 .mips,
1928 .mipsel,1903 .mipsel,
1929 .sparc,1904 .sparc,
1930 .sparcel,
1931 => 8,1905 => 8,
1932 .aarch64,1906 .aarch64,
1933 .aarch64_be,1907 .aarch64_be,
...@@ -2088,7 +2062,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {...@@ -2088,7 +2062,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2088 .s390x,2062 .s390x,
2089 .sparc,2063 .sparc,
2090 .sparc64,2064 .sparc64,
2091 .sparcel,
2092 .wasm32,2065 .wasm32,
2093 .wasm64,2066 .wasm64,
2094 .loongarch32,2067 .loongarch32,
...@@ -2111,7 +2084,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {...@@ -2111,7 +2084,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2111 .solaris,2084 .solaris,
2112 .illumos,2085 .illumos,
2113 .haiku,2086 .haiku,
2114 .ananas,
2115 .fuchsia,2087 .fuchsia,
2116 .minix,2088 .minix,
2117 => switch (target.cpu.arch) {2089 => switch (target.cpu.arch) {
...@@ -2195,7 +2167,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {...@@ -2195,7 +2167,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2195 .mips64el,2167 .mips64el,
2196 .sparc,2168 .sparc,
2197 .sparc64,2169 .sparc64,
2198 .sparcel,
2199 .wasm32,2170 .wasm32,
2200 .wasm64,2171 .wasm64,
2201 .loongarch32,2172 .loongarch32,
...@@ -2307,7 +2278,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {...@@ -2307,7 +2278,6 @@ pub fn c_type_bit_size(target: Target, c_type: CType) u16 {
2307 .longdouble => return 80,2278 .longdouble => return 80,
2308 },2279 },
23092280
2310 .cloudabi,
2311 .ps3,2281 .ps3,
2312 .zos,2282 .zos,
2313 .rtems,2283 .rtems,
...@@ -2375,7 +2345,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2375,7 +2345,6 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2375 .xcore,2345 .xcore,
2376 .dxil,2346 .dxil,
2377 .loongarch32,2347 .loongarch32,
2378 .spir,
2379 .spirv32,2348 .spirv32,
2380 .kalimba,2349 .kalimba,
2381 .ve,2350 .ve,
...@@ -2392,13 +2361,11 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {...@@ -2392,13 +2361,11 @@ pub fn c_type_alignment(target: Target, c_type: CType) u16 {
2392 .mips,2361 .mips,
2393 .mipsel,2362 .mipsel,
2394 .sparc,2363 .sparc,
2395 .sparcel,
2396 .sparc64,2364 .sparc64,
2397 .lanai,2365 .lanai,
2398 .nvptx,2366 .nvptx,
2399 .nvptx64,2367 .nvptx64,
2400 .s390x,2368 .s390x,
2401 .spir64,
2402 .spirv64,2369 .spirv64,
2403 => 8,2370 => 8,
24042371
...@@ -2483,7 +2450,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2483,7 +2450,6 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2483 .xcore,2450 .xcore,
2484 .dxil,2451 .dxil,
2485 .loongarch32,2452 .loongarch32,
2486 .spir,
2487 .spirv32,2453 .spirv32,
2488 .kalimba,2454 .kalimba,
2489 .ve,2455 .ve,
...@@ -2507,13 +2473,11 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {...@@ -2507,13 +2473,11 @@ pub fn c_type_preferred_alignment(target: Target, c_type: CType) u16 {
2507 .mips,2473 .mips,
2508 .mipsel,2474 .mipsel,
2509 .sparc,2475 .sparc,
2510 .sparcel,
2511 .sparc64,2476 .sparc64,
2512 .lanai,2477 .lanai,
2513 .nvptx,2478 .nvptx,
2514 .nvptx64,2479 .nvptx64,
2515 .s390x,2480 .s390x,
2516 .spir64,
2517 .spirv64,2481 .spirv64,
2518 => 8,2482 => 8,
25192483
lib/std/atomic.zig-1
...@@ -478,7 +478,6 @@ pub const cache_line = switch (builtin.cpu.arch) {...@@ -478,7 +478,6 @@ pub const cache_line = switch (builtin.cpu.arch) {
478 .riscv32,478 .riscv32,
479 .riscv64,479 .riscv64,
480 .sparc,480 .sparc,
481 .sparcel,
482 .sparc64,481 .sparc64,
483 => 32,482 => 32,
484483
lib/std/builtin.zig+1-1
...@@ -615,7 +615,7 @@ pub const VaList = switch (builtin.cpu.arch) {...@@ -615,7 +615,7 @@ pub const VaList = switch (builtin.cpu.arch) {
615 else => VaListPowerPc,615 else => VaListPowerPc,
616 },616 },
617 .powerpc64, .powerpc64le => *u8,617 .powerpc64, .powerpc64le => *u8,
618 .sparc, .sparcel, .sparc64 => *anyopaque,618 .sparc, .sparc64 => *anyopaque,
619 .spirv32, .spirv64 => *anyopaque,619 .spirv32, .spirv64 => *anyopaque,
620 .s390x => VaListS390x,620 .s390x => VaListS390x,
621 .wasm32, .wasm64 => *anyopaque,621 .wasm32, .wasm64 => *anyopaque,
lib/std/c.zig+3-3
...@@ -5779,7 +5779,7 @@ pub const ucontext_t = switch (native_os) {...@@ -5779,7 +5779,7 @@ pub const ucontext_t = switch (native_os) {
5779 .x86 => 4,5779 .x86 => 4,
5780 .mips, .mipsel, .mips64, .mips64el => 14,5780 .mips, .mipsel, .mips64, .mips64el => 14,
5781 .arm, .armeb, .thumb, .thumbeb => 1,5781 .arm, .armeb, .thumb, .thumbeb => 1,
5782 .sparc, .sparcel, .sparc64 => if (@sizeOf(usize) == 4) 43 else 8,5782 .sparc, .sparc64 => if (@sizeOf(usize) == 4) 43 else 8,
5783 else => 0,5783 else => 0,
5784 }5784 }
5785 ]u32,5785 ]u32,
...@@ -6821,7 +6821,7 @@ pub const pthread_key_t = switch (native_os) {...@@ -6821,7 +6821,7 @@ pub const pthread_key_t = switch (native_os) {
6821pub const padded_pthread_spin_t = switch (native_os) {6821pub const padded_pthread_spin_t = switch (native_os) {
6822 .netbsd => switch (builtin.cpu.arch) {6822 .netbsd => switch (builtin.cpu.arch) {
6823 .x86, .x86_64 => u32,6823 .x86, .x86_64 => u32,
6824 .sparc, .sparcel, .sparc64 => u32,6824 .sparc, .sparc64 => u32,
6825 else => pthread_spin_t,6825 else => pthread_spin_t,
6826 },6826 },
6827 else => void,6827 else => void,
...@@ -6834,7 +6834,7 @@ pub const pthread_spin_t = switch (native_os) {...@@ -6834,7 +6834,7 @@ pub const pthread_spin_t = switch (native_os) {
6834 .powerpc, .powerpc64, .powerpc64le => i32,6834 .powerpc, .powerpc64, .powerpc64le => i32,
6835 .x86, .x86_64 => u8,6835 .x86, .x86_64 => u8,
6836 .arm, .armeb, .thumb, .thumbeb => i32,6836 .arm, .armeb, .thumb, .thumbeb => i32,
6837 .sparc, .sparcel, .sparc64 => u8,6837 .sparc, .sparc64 => u8,
6838 .riscv32, .riscv64 => u32,6838 .riscv32, .riscv64 => u32,
6839 else => @compileError("undefined pthread_spin_t for this arch"),6839 else => @compileError("undefined pthread_spin_t for this arch"),
6840 },6840 },
lib/std/os/linux.zig+1-3
...@@ -2496,7 +2496,7 @@ pub const E = switch (native_arch) {...@@ -2496,7 +2496,7 @@ pub const E = switch (native_arch) {
24962496
2497 pub const init = errnoFromSyscall;2497 pub const init = errnoFromSyscall;
2498 },2498 },
2499 .sparc, .sparcel, .sparc64 => enum(u16) {2499 .sparc, .sparc64 => enum(u16) {
2500 /// No error occurred.2500 /// No error occurred.
2501 SUCCESS = 0,2501 SUCCESS = 0,
25022502
...@@ -4843,7 +4843,6 @@ pub const MINSIGSTKSZ = switch (native_arch) {...@@ -4843,7 +4843,6 @@ pub const MINSIGSTKSZ = switch (native_arch) {
4843 => 2048,4843 => 2048,
4844 .loongarch64,4844 .loongarch64,
4845 .sparc,4845 .sparc,
4846 .sparcel,
4847 .sparc64,4846 .sparc64,
4848 => 4096,4847 => 4096,
4849 .aarch64,4848 .aarch64,
...@@ -4880,7 +4879,6 @@ pub const SIGSTKSZ = switch (native_arch) {...@@ -4880,7 +4879,6 @@ pub const SIGSTKSZ = switch (native_arch) {
4880 .aarch64_be,4879 .aarch64_be,
4881 .loongarch64,4880 .loongarch64,
4882 .sparc,4881 .sparc,
4883 .sparcel,
4884 .sparc64,4882 .sparc64,
4885 => 16384,4883 => 16384,
4886 .powerpc64,4884 .powerpc64,
lib/std/os/linux/ioctl.zig-1
...@@ -11,7 +11,6 @@ const bits = switch (@import("builtin").cpu.arch) {...@@ -11,7 +11,6 @@ const bits = switch (@import("builtin").cpu.arch) {
11 .powerpc64le,11 .powerpc64le,
12 .sparc,12 .sparc,
13 .sparc64,13 .sparc64,
14 .sparcel,
15 => .{ .size = 13, .dir = 3, .none = 1, .read = 2, .write = 4 },14 => .{ .size = 13, .dir = 3, .none = 1, .read = 2, .write = 4 },
16 else => .{ .size = 14, .dir = 2, .none = 0, .read = 2, .write = 1 },15 else => .{ .size = 14, .dir = 2, .none = 0, .read = 2, .write = 1 },
17};16};
src/Type.zig-3
...@@ -1602,7 +1602,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {...@@ -1602,7 +1602,6 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1602 .amdgcn,1602 .amdgcn,
1603 .riscv32,1603 .riscv32,
1604 .sparc,1604 .sparc,
1605 .sparcel,
1606 .s390x,1605 .s390x,
1607 .lanai,1606 .lanai,
1608 .wasm32,1607 .wasm32,
...@@ -1647,11 +1646,9 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {...@@ -1647,11 +1646,9 @@ pub fn maxIntAlignment(target: std.Target, use_llvm: bool) u16 {
1647 .csky,1646 .csky,
1648 .arc,1647 .arc,
1649 .m68k,1648 .m68k,
1650 .spir,
1651 .kalimba,1649 .kalimba,
1652 .spirv,1650 .spirv,
1653 .spirv32,1651 .spirv32,
1654 .spir64,
1655 .ve,1652 .ve,
1656 .spirv64,1653 .spirv64,
1657 .dxil,1654 .dxil,
src/Zcu.zig-3
...@@ -3248,12 +3248,10 @@ pub fn atomicPtrAlignment(...@@ -3248,12 +3248,10 @@ pub fn atomicPtrAlignment(
3248 .powerpcle,3248 .powerpcle,
3249 .riscv32,3249 .riscv32,
3250 .sparc,3250 .sparc,
3251 .sparcel,
3252 .thumb,3251 .thumb,
3253 .thumbeb,3252 .thumbeb,
3254 .x86,3253 .x86,
3255 .xcore,3254 .xcore,
3256 .spir,
3257 .kalimba,3255 .kalimba,
3258 .lanai,3256 .lanai,
3259 .wasm32,3257 .wasm32,
...@@ -3275,7 +3273,6 @@ pub fn atomicPtrAlignment(...@@ -3275,7 +3273,6 @@ pub fn atomicPtrAlignment(
3275 .riscv64,3273 .riscv64,
3276 .sparc64,3274 .sparc64,
3277 .s390x,3275 .s390x,
3278 .spir64,
3279 .wasm64,3276 .wasm64,
3280 .ve,3277 .ve,
3281 .spirv64,3278 .spirv64,
src/codegen/llvm.zig+1-14
...@@ -69,7 +69,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -69,7 +69,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
69 .riscv64 => "riscv64",69 .riscv64 => "riscv64",
70 .sparc => "sparc",70 .sparc => "sparc",
71 .sparc64 => "sparc64",71 .sparc64 => "sparc64",
72 .sparcel => "sparcel",
73 .s390x => "s390x",72 .s390x => "s390x",
74 .thumb => "thumb",73 .thumb => "thumb",
75 .thumbeb => "thumbeb",74 .thumbeb => "thumbeb",
...@@ -79,8 +78,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -79,8 +78,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
79 .xtensa => "xtensa",78 .xtensa => "xtensa",
80 .nvptx => "nvptx",79 .nvptx => "nvptx",
81 .nvptx64 => "nvptx64",80 .nvptx64 => "nvptx64",
82 .spir => "spir",
83 .spir64 => "spir64",
84 .spirv => "spirv",81 .spirv => "spirv",
85 .spirv32 => "spirv32",82 .spirv32 => "spirv32",
86 .spirv64 => "spirv64",83 .spirv64 => "spirv64",
...@@ -136,8 +133,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {...@@ -136,8 +133,6 @@ pub fn targetTriple(allocator: Allocator, target: std.Target) ![]const u8 {
136 .opencl,133 .opencl,
137 .glsl450,134 .glsl450,
138 .plan9,135 .plan9,
139 .ananas,
140 .cloudabi,
141 .minix,136 .minix,
142 .contiki,137 .contiki,
143 .other,138 .other,
...@@ -208,8 +203,6 @@ pub fn targetOs(os_tag: std.Target.Os.Tag) llvm.OSType {...@@ -208,8 +203,6 @@ pub fn targetOs(os_tag: std.Target.Os.Tag) llvm.OSType {
208 .opencl,203 .opencl,
209 .glsl450,204 .glsl450,
210 .plan9,205 .plan9,
211 .ananas,
212 .cloudabi,
213 .minix,206 .minix,
214 .contiki,207 .contiki,
215 => .UnknownOS,208 => .UnknownOS,
...@@ -282,7 +275,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {...@@ -282,7 +275,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
282 .riscv64 => .riscv64,275 .riscv64 => .riscv64,
283 .sparc => .sparc,276 .sparc => .sparc,
284 .sparc64 => .sparcv9, // In LLVM, sparc64 == sparcv9.277 .sparc64 => .sparcv9, // In LLVM, sparc64 == sparcv9.
285 .sparcel => .sparcel,
286 .s390x => .systemz,278 .s390x => .systemz,
287 .thumb => .thumb,279 .thumb => .thumb,
288 .thumbeb => .thumbeb,280 .thumbeb => .thumbeb,
...@@ -292,8 +284,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {...@@ -292,8 +284,6 @@ pub fn targetArch(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
292 .xtensa => .xtensa,284 .xtensa => .xtensa,
293 .nvptx => .nvptx,285 .nvptx => .nvptx,
294 .nvptx64 => .nvptx64,286 .nvptx64 => .nvptx64,
295 .spir => .spir,
296 .spir64 => .spir64,
297 .spirv => .spirv,287 .spirv => .spirv,
298 .spirv32 => .spirv32,288 .spirv32 => .spirv32,
299 .spirv64 => .spirv64,289 .spirv64 => .spirv64,
...@@ -473,7 +463,6 @@ const DataLayoutBuilder = struct {...@@ -473,7 +463,6 @@ const DataLayoutBuilder = struct {
473 .powerpcle,463 .powerpcle,
474 .riscv32,464 .riscv32,
475 .sparc,465 .sparc,
476 .sparcel,
477 .thumb,466 .thumb,
478 .thumbeb,467 .thumbeb,
479 .xtensa,468 .xtensa,
...@@ -12008,7 +11997,7 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {...@@ -12008,7 +11997,7 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
12008 llvm.LLVMInitializeRISCVAsmPrinter();11997 llvm.LLVMInitializeRISCVAsmPrinter();
12009 llvm.LLVMInitializeRISCVAsmParser();11998 llvm.LLVMInitializeRISCVAsmParser();
12010 },11999 },
12011 .sparc, .sparc64, .sparcel => {12000 .sparc, .sparc64 => {
12012 llvm.LLVMInitializeSparcTarget();12001 llvm.LLVMInitializeSparcTarget();
12013 llvm.LLVMInitializeSparcTargetInfo();12002 llvm.LLVMInitializeSparcTargetInfo();
12014 llvm.LLVMInitializeSparcTargetMC();12003 llvm.LLVMInitializeSparcTargetMC();
...@@ -12095,8 +12084,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {...@@ -12095,8 +12084,6 @@ pub fn initializeLLVMTarget(arch: std.Target.Cpu.Arch) void {
12095 },12084 },
1209612085
12097 // LLVM backends that have no initialization functions.12086 // LLVM backends that have no initialization functions.
12098 .spir,
12099 .spir64,
12100 .spirv,12087 .spirv,
12101 .spirv32,12088 .spirv32,
12102 .spirv64,12089 .spirv64,
src/glibc.zig+13-2
...@@ -122,6 +122,17 @@ pub fn loadMetaData(gpa: Allocator, contents: []const u8) LoadMetaDataError!*ABI...@@ -122,6 +122,17 @@ pub fn loadMetaData(gpa: Allocator, contents: []const u8) LoadMetaDataError!*ABI
122 return error.ZigInstallationCorrupt;122 return error.ZigInstallationCorrupt;
123 };123 };
124 const arch_tag = std.meta.stringToEnum(std.Target.Cpu.Arch, arch_name) orelse {124 const arch_tag = std.meta.stringToEnum(std.Target.Cpu.Arch, arch_name) orelse {
125 // TODO: Remove this on the next glibc abilists update.
126 if (mem.eql(u8, arch_name, "sparcel")) {
127 targets[i] = .{
128 .arch = .sparc,
129 .os = .linux,
130 .abi = .gnu,
131 };
132
133 continue;
134 }
135
125 log.err("abilists: unrecognized arch: '{s}'", .{arch_name});136 log.err("abilists: unrecognized arch: '{s}'", .{arch_name});
126 return error.ZigInstallationCorrupt;137 return error.ZigInstallationCorrupt;
127 };138 };
...@@ -394,7 +405,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![...@@ -394,7 +405,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![
394 const arch = comp.getTarget().cpu.arch;405 const arch = comp.getTarget().cpu.arch;
395 const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;406 const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;
396 const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;407 const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;
397 const is_sparc = arch == .sparc or arch == .sparcel or arch == .sparc64;408 const is_sparc = arch == .sparc or arch == .sparc64;
398 const is_64 = comp.getTarget().ptrBitWidth() == 64;409 const is_64 = comp.getTarget().ptrBitWidth() == 64;
399410
400 const s = path.sep_str;411 const s = path.sep_str;
...@@ -532,7 +543,7 @@ fn add_include_dirs_arch(...@@ -532,7 +543,7 @@ fn add_include_dirs_arch(
532 const is_x86 = arch == .x86 or arch == .x86_64;543 const is_x86 = arch == .x86 or arch == .x86_64;
533 const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;544 const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;
534 const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;545 const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;
535 const is_sparc = arch == .sparc or arch == .sparcel or arch == .sparc64;546 const is_sparc = arch == .sparc or arch == .sparc64;
536 const is_64 = target.ptrBitWidth() == 64;547 const is_64 = target.ptrBitWidth() == 64;
537548
538 const s = path.sep_str;549 const s = path.sep_str;
src/link/Elf.zig+1-1
...@@ -4901,7 +4901,7 @@ fn getLDMOption(target: std.Target) ?[]const u8 {...@@ -4901,7 +4901,7 @@ fn getLDMOption(target: std.Target) ?[]const u8 {
4901 .powerpc => return "elf32ppclinux",4901 .powerpc => return "elf32ppclinux",
4902 .powerpc64 => return "elf64ppc",4902 .powerpc64 => return "elf64ppc",
4903 .powerpc64le => return "elf64lppc",4903 .powerpc64le => return "elf64lppc",
4904 .sparc, .sparcel => return "elf32_sparc",4904 .sparc => return "elf32_sparc",
4905 .sparc64 => return "elf64_sparc",4905 .sparc64 => return "elf64_sparc",
4906 .mips => return "elf32btsmip",4906 .mips => return "elf32btsmip",
4907 .mipsel => return "elf32ltsmip",4907 .mipsel => return "elf32ltsmip",
src/link/Plan9/aout.zig+1-1
...@@ -110,7 +110,7 @@ pub const R_MAGIC = _MAGIC(HDR_MAGIC, 28); // arm64...@@ -110,7 +110,7 @@ pub const R_MAGIC = _MAGIC(HDR_MAGIC, 28); // arm64
110pub fn magicFromArch(arch: std.Target.Cpu.Arch) !u32 {110pub fn magicFromArch(arch: std.Target.Cpu.Arch) !u32 {
111 return switch (arch) {111 return switch (arch) {
112 .x86 => I_MAGIC,112 .x86 => I_MAGIC,
113 .sparc => K_MAGIC, // TODO should sparc64 and sparcel go here?113 .sparc => K_MAGIC, // TODO should sparc64 go here?
114 .mips => V_MAGIC,114 .mips => V_MAGIC,
115 .arm => E_MAGIC,115 .arm => E_MAGIC,
116 .aarch64 => R_MAGIC,116 .aarch64 => R_MAGIC,
src/target.zig+1-5
...@@ -138,7 +138,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -138,7 +138,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
138 .riscv64,138 .riscv64,
139 .sparc,139 .sparc,
140 .sparc64,140 .sparc64,
141 .sparcel,
142 .s390x,141 .s390x,
143 .thumb,142 .thumb,
144 .thumbeb,143 .thumbeb,
...@@ -148,8 +147,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {...@@ -148,8 +147,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
148 .xtensa,147 .xtensa,
149 .nvptx,148 .nvptx,
150 .nvptx64,149 .nvptx64,
151 .spir,
152 .spir64,
153 .spirv,150 .spirv,
154 .spirv32,151 .spirv32,
155 .spirv64,152 .spirv64,
...@@ -410,7 +407,7 @@ pub fn defaultFunctionAlignment(target: std.Target) Alignment {...@@ -410,7 +407,7 @@ pub fn defaultFunctionAlignment(target: std.Target) Alignment {
410 return switch (target.cpu.arch) {407 return switch (target.cpu.arch) {
411 .arm, .armeb => .@"4",408 .arm, .armeb => .@"4",
412 .aarch64, .aarch64_be => .@"4",409 .aarch64, .aarch64_be => .@"4",
413 .sparc, .sparcel, .sparc64 => .@"4",410 .sparc, .sparc64 => .@"4",
414 .riscv64 => .@"2",411 .riscv64 => .@"2",
415 else => .@"1",412 else => .@"1",
416 };413 };
...@@ -425,7 +422,6 @@ pub fn minFunctionAlignment(target: std.Target) Alignment {...@@ -425,7 +422,6 @@ pub fn minFunctionAlignment(target: std.Target) Alignment {
425 .riscv32,422 .riscv32,
426 .riscv64,423 .riscv64,
427 .sparc,424 .sparc,
428 .sparcel,
429 .sparc64,425 .sparc64,
430 => .@"2",426 => .@"2",
431 else => .@"1",427 else => .@"1",
test/behavior/align.zig-1
...@@ -95,7 +95,6 @@ test "alignment and size of structs with 128-bit fields" {...@@ -95,7 +95,6 @@ test "alignment and size of structs with 128-bit fields" {
95 .amdgcn,95 .amdgcn,
96 .riscv32,96 .riscv32,
97 .sparc,97 .sparc,
98 .sparcel,
99 .s390x,98 .s390x,
100 .lanai,99 .lanai,
101 .wasm32,100 .wasm32,
test/llvm_targets.zig-2
...@@ -87,8 +87,6 @@ const targets = [_]std.Target.Query{...@@ -87,8 +87,6 @@ const targets = [_]std.Target.Query{
87 .{ .cpu_arch = .sparc, .os_tag = .freestanding, .abi = .none },87 .{ .cpu_arch = .sparc, .os_tag = .freestanding, .abi = .none },
88 .{ .cpu_arch = .sparc, .os_tag = .linux, .abi = .gnu },88 .{ .cpu_arch = .sparc, .os_tag = .linux, .abi = .gnu },
89 .{ .cpu_arch = .sparc, .os_tag = .linux, .abi = .none },89 .{ .cpu_arch = .sparc, .os_tag = .linux, .abi = .none },
90 .{ .cpu_arch = .sparcel, .os_tag = .freestanding, .abi = .none },
91 .{ .cpu_arch = .sparcel, .os_tag = .linux, .abi = .gnu },
92 .{ .cpu_arch = .sparc64, .os_tag = .freestanding, .abi = .none },90 .{ .cpu_arch = .sparc64, .os_tag = .freestanding, .abi = .none },
93 .{ .cpu_arch = .sparc64, .os_tag = .linux, .abi = .gnu },91 .{ .cpu_arch = .sparc64, .os_tag = .linux, .abi = .gnu },
94 //.{ .cpu_arch = .spirv32, .os_tag = .opencl, .abi = .none },92 //.{ .cpu_arch = .spirv32, .os_tag = .opencl, .abi = .none },